[PATCH] Change AArch64 to return values in [2 x i64] instead of i128 where possible

[Pete Cooper]

Hi James, Tim

Currently something like EVT in llvm/Codegen is returned as an i128 by AArch64.  It is, however, passed as an argument as a [2 x i64].

This patch unifies the behavior so that values are passed/returned in the same way based on their types.  EVT for example, will now be returned as a [2 x i64].  

This makes a big difference to the kind of IR generated, as to get the upper 64-bits of an EVT we used to have to do a shift then truncate, but now can just do an extract value.  

Using llc compiled with LTO as an example binary, this patch saves only 200 bytes off the final binary size compiled with SelectionDAG, but saves 70KB if compiled with fast-isel.  This is because the i128’s aren’t really legal and were causing fast-isel to bail, but it can handle [2 x i64]’s fine.  So this results in 80,000 more instructions being handled by fast-isel and 7,000 BBs handled entirely in fast-isel.

Comments welcome.  I’ve added an LLVM test case in r235228, but if you have any other ideas about more extensive testing then let me know.

Cheers,
Pete

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