r228422 - Inline asm IR input register constraints don't have early clobber
Eric Christopher
echristo at gmail.com
Fri Feb 6 10:44:18 PST 2015
Author: echristo
Date: Fri Feb 6 12:44:18 2015
New Revision: 228422
URL: http://llvm.org/viewvc/llvm-project?rev=228422&view=rev
Log:
Inline asm IR input register constraints don't have early clobber
modifiers on them. If we have a matching output constraint with
an early clobber make sure we don't propagate that to the input
constraint.
Added:
cfe/trunk/test/CodeGen/inline-asm-matching-constraint.c
Modified:
cfe/trunk/lib/CodeGen/CGStmt.cpp
Modified: cfe/trunk/lib/CodeGen/CGStmt.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGStmt.cpp?rev=228422&r1=228421&r2=228422&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGStmt.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGStmt.cpp Fri Feb 6 12:44:18 2015
@@ -1957,10 +1957,9 @@ void CodeGenFunction::EmitAsmStmt(const
InputConstraint = SimplifyConstraint(InputConstraint.c_str(), getTarget(),
&OutputConstraintInfos);
- InputConstraint =
- AddVariableConstraints(InputConstraint,
- *InputExpr->IgnoreParenNoopCasts(getContext()),
- getTarget(), CGM, S, Info.earlyClobber());
+ InputConstraint = AddVariableConstraints(
+ InputConstraint, *InputExpr->IgnoreParenNoopCasts(getContext()),
+ getTarget(), CGM, S, false /* No EarlyClobber */);
llvm::Value *Arg = EmitAsmInput(Info, InputExpr, Constraints);
Added: cfe/trunk/test/CodeGen/inline-asm-matching-constraint.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/inline-asm-matching-constraint.c?rev=228422&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/inline-asm-matching-constraint.c (added)
+++ cfe/trunk/test/CodeGen/inline-asm-matching-constraint.c Fri Feb 6 12:44:18 2015
@@ -0,0 +1,11 @@
+// RUN: %clang_cc1 -emit-llvm %s -o - -triple powerpc64le-linux-gnu | FileCheck %s
+// Sadly since this requires a register constraint to trigger we have to set
+// a target here.
+void a(void) {
+ register unsigned long __sc_0 __asm__("r0");
+ __asm__ __volatile__("mfcr %0" : "=&r"(__sc_0) : "0"(__sc_0));
+}
+
+// Check that we can generate code for this correctly. The matching input
+// constraint should not have an early clobber on it.
+// CHECK: call i64 asm sideeffect "mfcr $0", "=&{r0},{r0}"(i64 %0)
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