[PATCH] Fix bug in Sema::ActOnGCCAsmStmt (PR21270)

[Richard Smith]

On Tue, Feb 3, 2015 at 12:55 PM, Reid Kleckner <rnk at google.com> wrote:

> lgtm
>
> +
> +// No warnings expected.
>
> Consider adding "// CHECK-NOT: warning:" to verify this.
>

Hmm, we really should teach -verify to be able to check for fixits so we
can avoid using FileCheck for this kind of test.


> On Tue, Feb 3, 2015 at 11:53 AM, Akira Hatanaka <ahatanak at gmail.com>
> wrote:
>
>> ping
>>
>> On Mon, Nov 3, 2014 at 1:07 PM, Akira Hatanaka <ahatanak at gmail.com>
>> wrote:
>>
>>> ping
>>>
>>> On Wed, Oct 15, 2014 at 9:27 AM, Akira Hatanaka <ahatanak at gmail.com>
>>> wrote:
>>>
>>>> There were mistakes in my previous email. The correct mapping should be
>>>> like this:
>>>>
>>>> %0 => "+r" (one) => ConstraintIdx = 0
>>>> %1 => "+r" (two) => ConstraintIdx = 1
>>>> %2 => "r" (three) => ConstraintIdx = 2
>>>> %3 => "+r" (one) => ConstraintIdx = 0
>>>> %4 => "+r" (two) => ConstraintIdx = 1
>>>>
>>>> On Wed, Oct 15, 2014 at 8:36 AM, Akira Hatanaka <ahatanak at gmail.com>
>>>> wrote:
>>>>
>>>>> The attached patch fixes a bug in Sema::ActOnGCCAsmStmt where it
>>>>> wasn't computing the corresponding ConstraintIdx from an operand number
>>>>> correctly when there were constraints with the '+' modifier.
>>>>>
>>>>> For example, when the following inline-asm statement is compiled,
>>>>>
>>>>> void g2(int one, int two, int three) {
>>>>>   asm volatile ("%0 %1 %2 %3 %4" : "+r" (one), "+r"(two) : "r"(three));
>>>>> }
>>>>>
>>>>> the existing code maps the operand number in the assembly template to
>>>>> ConstraintIdx in the following way:
>>>>>
>>>>> %0 => "+r" (one) => ConstraintIdx = 0
>>>>> %1 => "+r" (one) => ConstraintIdx = 0
>>>>> %2 => "+r" (two) => ConstraintIdx = 1
>>>>> %3 => "+r" (two) => ConstraintIdx = 1
>>>>> %4 => "+r" (three) => ConstraintIdx = 2
>>>>>
>>>>> The correct mapping should be like this:
>>>>>
>>>>> %0 => "+r" (one) => ConstraintIdx = 0
>>>>> %1 => "+r" (two) => ConstraintIdx = 1
>>>>> %3 => "+r" (three) => ConstraintIdx = 2
>>>>> %4 => "+r" (one) => ConstraintIdx = 0
>>>>> %5 => "+r" (two) => ConstraintIdx = 1
>>>>>
>>>>> I couldn't find the rule documented anywhere in the link below, but
>>>>> judging from the code I see in CodeGenFunction::EmitAsmStmt and the IR
>>>>> clang generates, I believe this is the correct way to find the
>>>>> corresponding constraint.
>>>>>
>>>>> https://gcc.gnu.org/onlinedocs/gcc/Extended-Asm.html
>>>>>
>>>>> This is the IR generated:
>>>>>
>>>>> %1 = tail call { i32, i32 } asm sideeffect "$0 $1 $2 $3 $4",
>>>>> "=r,=r,r,0,1"(i32 %three, i32 %one, i32 %two)
>>>>>
>>>>
>>>>
>>>
>>
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>
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