[PATCH] Preserve early clobber flag when using named registers in inline assembly.

[Daniel Sanders]

Hi atanasyan,

Named registers with the constraint "=&r" currently lose the early clobber flag
and turn into "=r" when converted to LLVM-IR. This patch correctly passes it on.

http://reviews.llvm.org/D7346

Files:
  lib/CodeGen/CGStmt.cpp
  test/CodeGen/asm-reg-var-local.c

Index: lib/CodeGen/CGStmt.cpp
===================================================================
--- lib/CodeGen/CGStmt.cpp
+++ lib/CodeGen/CGStmt.cpp
@@ -1863,7 +1863,10 @@
     // If this is a register output, then make the inline asm return it
     // by-value.  If this is a memory result, return the value by-reference.
     if (!Info.allowsMemory() && hasScalarEvaluationKind(OutExpr->getType())) {
-      Constraints += "=" + OutputConstraint;
+      Constraints += "=";
+      if (Info.earlyClobber())
+        Constraints += "&";
+      Constraints += OutputConstraint;
       ResultRegQualTys.push_back(OutExpr->getType());
       ResultRegDests.push_back(Dest);
       ResultRegTypes.push_back(ConvertTypeForMem(OutExpr->getType()));
Index: test/CodeGen/asm-reg-var-local.c
===================================================================
--- test/CodeGen/asm-reg-var-local.c
+++ test/CodeGen/asm-reg-var-local.c
@@ -2,6 +2,7 @@
 // Exercise various use cases for local asm "register variables".
 
 int foo() {
+// CHECK-LABEL: define i32 @foo()
 // CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
 
   register int a asm("rsi")=5;
@@ -22,3 +23,26 @@
 // CHECK:  [[TMP1:%[a-zA-Z0-9]+]] = load i32* [[A]]
 // CHECK:  ret i32 [[TMP1]]
 }
+
+int earlyclobber() {
+// CHECK-LABEL: define i32 @earlyclobber()
+// CHECK: [[A:%[a-zA-Z0-9]+]] = alloca i32
+
+  register int a asm("rsi")=5;
+// CHECK: store i32 5, i32* [[A]]
+
+  asm volatile("; %0 This asm defines rsi" : "=&r"(a));
+// CHECK: [[Z:%[a-zA-Z0-9]+]] = call i32 asm sideeffect "; $0 This asm defines rsi", "=&{rsi},~{dirflag},~{fpsr},~{flags}"()
+// CHECK: store i32 [[Z]], i32* [[A]]
+
+  a = 42;
+// CHECK:  store i32 42, i32* [[A]]
+
+  asm volatile("; %0 This asm uses rsi" : : "r"(a));
+// CHECK:  [[TMP:%[a-zA-Z0-9]+]] = load i32* [[A]]
+// CHECK:  call void asm sideeffect "; $0 This asm uses rsi", "{rsi},~{dirflag},~{fpsr},~{flags}"(i32 [[TMP]])
+
+  return a;
+// CHECK:  [[TMP1:%[a-zA-Z0-9]+]] = load i32* [[A]]
+// CHECK:  ret i32 [[TMP1]]
+}

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