r226136 - [Mips] Define macros `__mips_isa_rev` in case of mips32r6/mips64r6 options

[Simon Atanasyan]

Author: atanasyan
Date: Thu Jan 15 01:04:48 2015
New Revision: 226136

URL: http://llvm.org/viewvc/llvm-project?rev=226136&view=rev
Log:
[Mips] Define macros `__mips_isa_rev` in case of mips32r6/mips64r6 options

Modified:
    cfe/trunk/lib/Basic/Targets.cpp
    cfe/trunk/test/Preprocessor/init.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=226136&r1=226135&r2=226136&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Thu Jan 15 01:04:48 2015
@@ -5922,6 +5922,8 @@ public:
       Builder.defineMacro("__mips_isa_rev", "1");
     else if (CPUStr == "mips32r2")
       Builder.defineMacro("__mips_isa_rev", "2");
+    else if (CPUStr == "mips32r6")
+      Builder.defineMacro("__mips_isa_rev", "6");
 
     if (ABI == "o32") {
       Builder.defineMacro("__mips_o32");
@@ -6065,6 +6067,8 @@ public:
       Builder.defineMacro("__mips_isa_rev", "1");
     else if (CPUStr == "mips64r2")
       Builder.defineMacro("__mips_isa_rev", "2");
+    else if (CPUStr == "mips64r6")
+      Builder.defineMacro("__mips_isa_rev", "6");
 
     if (ABI == "n32") {
       Builder.defineMacro("__mips_n32");

Modified: cfe/trunk/test/Preprocessor/init.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/init.c?rev=226136&r1=226135&r2=226136&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/init.c (original)
+++ cfe/trunk/test/Preprocessor/init.c Thu Jan 15 01:04:48 2015
@@ -3442,6 +3442,15 @@
 // MIPS-ARCH-32R2:#define _MIPS_ISA _MIPS_ISA_MIPS32
 // MIPS-ARCH-32R2:#define __mips_isa_rev 2
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips-none-none \
+// RUN:            -target-cpu mips32r6 < /dev/null \
+// RUN:   | FileCheck -check-prefix MIPS-ARCH-32R6 %s
+//
+// MIPS-ARCH-32R6:#define _MIPS_ARCH "mips32r6"
+// MIPS-ARCH-32R6:#define _MIPS_ARCH_MIPS32R6 1
+// MIPS-ARCH-32R6:#define _MIPS_ISA _MIPS_ISA_MIPS32
+// MIPS-ARCH-32R6:#define __mips_isa_rev 6
+//
 // RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
 // RUN:            < /dev/null \
 // RUN:   | FileCheck -check-prefix MIPS-ARCH-DEF64 %s
@@ -3469,6 +3478,15 @@
 // MIPS-ARCH-64R2:#define _MIPS_ISA _MIPS_ISA_MIPS64
 // MIPS-ARCH-64R2:#define __mips_isa_rev 2
 //
+// RUN: %clang_cc1 -E -dM -ffreestanding -triple=mips64-none-none \
+// RUN:            -target-cpu mips64r6 < /dev/null \
+// RUN:   | FileCheck -check-prefix MIPS-ARCH-64R6 %s
+//
+// MIPS-ARCH-64R6:#define _MIPS_ARCH "mips64r6"
+// MIPS-ARCH-64R6:#define _MIPS_ARCH_MIPS64R6 1
+// MIPS-ARCH-64R6:#define _MIPS_ISA _MIPS_ISA_MIPS64
+// MIPS-ARCH-64R6:#define __mips_isa_rev 6
+//
 // Check MIPS float ABI macros
 //
 // RUN: %clang_cc1 -E -dM -ffreestanding \