[libcxxabi] r217585 - ARM Unwind syntax

[Renato Golin]

Author: rengolin
Date: Thu Sep 11 07:57:02 2014
New Revision: 217585

URL: http://llvm.org/viewvc/llvm-project?rev=217585&view=rev
Log:
ARM Unwind syntax

This patch fixes the bad argument that GAS accepted but the IAS didn't,
ie. {#0x20}, moving it to {0x20} which both accept. It also makes the
ARMv7+ save/restore correct by using VFP instructions rather than old
co-processor ones.

Fixes PR20529.

Modified:
    libcxxabi/trunk/src/Unwind/UnwindRegistersRestore.S
    libcxxabi/trunk/src/Unwind/UnwindRegistersSave.S

Modified: libcxxabi/trunk/src/Unwind/UnwindRegistersRestore.S
URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/Unwind/UnwindRegistersRestore.S?rev=217585&r1=217584&r2=217585&view=diff
==============================================================================
--- libcxxabi/trunk/src/Unwind/UnwindRegistersRestore.S (original)
+++ libcxxabi/trunk/src/Unwind/UnwindRegistersRestore.S Thu Sep 11 07:57:02 2014
@@ -347,7 +347,11 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li
   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instruction using the corresponding coprocessor mnemonic.
-  ldc p11, cr0, [r0], {#0x20}  @ fldmiad r0, {d0-d15}
+#if __ARM_ARCH < 7
+  ldc p11, cr0, [r0], {0x20}  @ fldmiad r0, {d0-d15}
+#else
+  vldmia r0, {d0-d15}
+#endif
   mov pc, lr
 
 @
@@ -358,7 +362,11 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm19restoreVFPWithFLDMXEPy)
-  ldc p11, cr0, [r0], {#0x21}  @ fldmiax r0, {d0-d15}
+#if __ARM_ARCH < 7
+  ldc p11, cr0, [r0], {0x21}  @ fldmiax r0, {d0-d15}
+#else
+  vldmia r0, {d0-d15} @ fldmiax is deprecated in ARMv7+ and now behaves like vldmia
+#endif
   mov pc, lr
 
 @
@@ -369,7 +377,11 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm12restoreVFPv3EPy)
-  ldcl p11, cr0, [r0], {#0x20}  @ vldm r0, {d16-d31}
+#if __ARM_ARCH < 7
+  ldcl p11, cr0, [r0], {0x20}  @ vldm r0, {d16-d31}
+#else
+  vldmia r0, {d16-d31}
+#endif
   mov pc, lr
 
 @

Modified: libcxxabi/trunk/src/Unwind/UnwindRegistersSave.S
URL: http://llvm.org/viewvc/llvm-project/libcxxabi/trunk/src/Unwind/UnwindRegistersSave.S?rev=217585&r1=217584&r2=217585&view=diff
==============================================================================
--- libcxxabi/trunk/src/Unwind/UnwindRegistersSave.S (original)
+++ libcxxabi/trunk/src/Unwind/UnwindRegistersSave.S Thu Sep 11 07:57:02 2014
@@ -318,7 +318,11 @@ DEFINE_LIBUNWIND_FUNCTION(unw_getcontext
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMDEPy)
-  stc p11, cr0, [r0], {#0x20}  @ fstmiad r0, {d0-d15}
+#if __ARM_ARCH < 7
+  stc p11, cr0, [r0], {0x20}  @ fstmiad r0, {d0-d15}
+#else
+  vstmia r0, {d0-d15}
+#endif
   mov pc, lr
 
 @
@@ -329,7 +333,11 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li
 @
   .p2align 2
 DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9libunwind13Registers_arm16saveVFPWithFSTMXEPy)
-  stc p11, cr0, [r0], {#0x21}  @ fstmiax r0, {d0-d15}
+#if __ARM_ARCH < 7
+  stc p11, cr0, [r0], {0x21}  @ fstmiax r0, {d0-d15}
+#else
+  vstmia r0, {d0-d15} @ fstmiax is deprecated in ARMv7+ and now behaves like vstmia
+#endif
   mov pc, lr
 
 @
@@ -347,7 +355,11 @@ DEFINE_LIBUNWIND_PRIVATE_FUNCTION(_ZN9li
   @ these registers implies they are, actually, available on the target, so
   @ it's ok to execute.
   @ So, generate the instructions using the corresponding coprocessor mnemonic.
-  stcl p11, cr0, [r0], {#0x20}  @ vldm r0, {d16-d31}
+#if __ARM_ARCH < 7
+  stcl p11, cr0, [r0], {0x20}  @ vstm r0, {d16-d31}
+#else
+  vstmia r0, {d16-d31}
+#endif
   mov pc, lr
 
 @