r215599 - ARM: Add mappings for ACLE prefetch intrinsics

Yi Kong Yi.Kong at arm.com
Wed Aug 13 16:20:15 PDT 2014


Author: kongyi
Date: Wed Aug 13 18:20:15 2014
New Revision: 215599

URL: http://llvm.org/viewvc/llvm-project?rev=215599&view=rev
Log:
ARM: Add mappings for ACLE prefetch intrinsics

Implement __pld, __pldx, __pli and __plix builtin intrinsics as specified in
ARM ACLE 2.0.

Modified:
    cfe/trunk/lib/Headers/arm_acle.h
    cfe/trunk/test/CodeGen/arm_acle.c
    cfe/trunk/test/Sema/arm_acle.c

Modified: cfe/trunk/lib/Headers/arm_acle.h
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/arm_acle.h?rev=215599&r1=215598&r2=215599&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/arm_acle.h (original)
+++ cfe/trunk/lib/Headers/arm_acle.h Wed Aug 13 18:20:15 2014
@@ -66,6 +66,29 @@ static __inline__ void __attribute__((al
 }
 #endif
 
+/* 8.6 Memory prefetch intrinsics */
+/* 8.6.1 Data prefetch */
+#define __pld(addr) __pldx(0, 0, 0, addr)
+
+#if __ARM_32BIT_STATE
+#define __pldx(access_kind, cache_level, retention_policy, addr) \
+  __builtin_arm_prefetch(addr, access_kind, 1)
+#else
+#define __pldx(access_kind, cache_level, retention_policy, addr) \
+  __builtin_arm_prefetch(addr, access_kind, cache_level, retention_policy, 1)
+#endif
+
+/* 8.6.2 Instruction prefetch */
+#define __pli(addr) __plix(0, 0, addr)
+
+#if __ARM_32BIT_STATE
+#define __plix(cache_level, retention_policy, addr) \
+  __builtin_arm_prefetch(addr, 0, 0)
+#else
+#define __plix(cache_level, retention_policy, addr) \
+  __builtin_arm_prefetch(addr, 0, cache_level, retention_policy, 0)
+#endif
+
 /* 8.7 NOP */
 static __inline__ void __attribute__((always_inline, nodebug)) __nop(void) {
   __builtin_arm_nop();

Modified: cfe/trunk/test/CodeGen/arm_acle.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm_acle.c?rev=215599&r1=215598&r2=215599&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/arm_acle.c (original)
+++ cfe/trunk/test/CodeGen/arm_acle.c Wed Aug 13 18:20:15 2014
@@ -62,6 +62,35 @@ void test_sevl(void) {
   __sevl();
 }
 
+/* 8.6 Memory prefetch intrinsics */
+/* 8.6.1 Data prefetch */
+// ARM-LABEL: test_pld
+// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 1)
+void test_pld() {
+  __pld(0);
+}
+
+// ARM-LABEL: test_pldx
+// AArch32: call void @llvm.prefetch(i8* null, i32 1, i32 3, i32 1)
+// AArch64: call void @llvm.prefetch(i8* null, i32 1, i32 1, i32 1)
+void test_pldx() {
+  __pldx(1, 2, 0, 0);
+}
+
+/* 8.6.2 Instruction prefetch */
+// ARM-LABEL: test_pli
+// ARM: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
+void test_pli() {
+  __pli(0);
+}
+
+// ARM-LABEL: test_plix
+// AArch32: call void @llvm.prefetch(i8* null, i32 0, i32 3, i32 0)
+// AArch64: call void @llvm.prefetch(i8* null, i32 0, i32 1, i32 0)
+void test_plix() {
+  __plix(2, 0, 0);
+}
+
 /* 8.7 NOP */
 // ARM-LABEL: test_nop
 // AArch32: call void @llvm.arm.hint(i32 0)

Modified: cfe/trunk/test/Sema/arm_acle.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Sema/arm_acle.c?rev=215599&r1=215598&r2=215599&view=diff
==============================================================================
--- cfe/trunk/test/Sema/arm_acle.c (original)
+++ cfe/trunk/test/Sema/arm_acle.c Wed Aug 13 18:20:15 2014
@@ -30,3 +30,10 @@ int32_t test_ssat_const_diag(int32_t t,
 int32_t test_usat_const_diag(int32_t t, const int32_t v) {
   return __usat(t, v);  // expected-error-re {{argument to {{.*}} must be a constant integer}}
 }
+
+/*
+ * Prefetch intrinsics
+ */
+void test_pldx_const_diag(int32_t i) {
+  __pldx(i, 0, 0, 0);  // expected-error-re {{argument to {{.*}} must be a constant integer}}
+}





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