[PATCH] ARM: Implement __builtin_arm_nop intrinsic

[Yi Kong]

Hi t.p.northover, rengolin,

This patch implements __builtin_arm_nop intrinsic for AArch32 and AArch64, which generates hint 0x0, the alias of NOP instruction.

This intrinsic is necessary to implement ACLE __nop intrinsic.

http://reviews.llvm.org/D4495

Files:
  include/clang/Basic/BuiltinsAArch64.def
  include/clang/Basic/BuiltinsARM.def
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/builtins-arm.c
  test/CodeGen/builtins-arm64.c

Index: include/clang/Basic/BuiltinsAArch64.def
===================================================================
--- include/clang/Basic/BuiltinsAArch64.def
+++ include/clang/Basic/BuiltinsAArch64.def
@@ -34,6 +34,9 @@
 BUILTIN(__builtin_arm_sev, "v", "")
 BUILTIN(__builtin_arm_sevl, "v", "")
 
+// NOP
+BUILTIN(__builtin_arm_nop, "v", "")
+
 // CRC32
 BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc")
 BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc")
Index: include/clang/Basic/BuiltinsARM.def
===================================================================
--- include/clang/Basic/BuiltinsARM.def
+++ include/clang/Basic/BuiltinsARM.def
@@ -74,6 +74,9 @@
 BUILTIN(__builtin_arm_sev, "v", "")
 BUILTIN(__builtin_arm_sevl, "v", "")
 
+// NOP
+BUILTIN(__builtin_arm_nop, "v", "")
+
 // Data barrier
 BUILTIN(__builtin_arm_dmb, "vUi", "nc")
 BUILTIN(__builtin_arm_dsb, "vUi", "nc")
Index: lib/CodeGen/CGBuiltin.cpp
===================================================================
--- lib/CodeGen/CGBuiltin.cpp
+++ lib/CodeGen/CGBuiltin.cpp
@@ -3040,6 +3040,9 @@
   unsigned HintID = static_cast<unsigned>(-1);
   switch (BuiltinID) {
   default: break;
+  case ARM::BI__builtin_arm_nop:
+    HintID = 0;
+    break;
   case ARM::BI__builtin_arm_yield:
   case ARM::BI__yield:
     HintID = 1;
@@ -3804,6 +3807,9 @@
   unsigned HintID = static_cast<unsigned>(-1);
   switch (BuiltinID) {
   default: break;
+  case AArch64::BI__builtin_arm_nop:
+    HintID = 0;
+    break;
   case AArch64::BI__builtin_arm_yield:
     HintID = 1;
     break;
Index: test/CodeGen/builtins-arm.c
===================================================================
--- test/CodeGen/builtins-arm.c
+++ test/CodeGen/builtins-arm.c
@@ -19,6 +19,12 @@
   res = __builtin_eh_return_data_regno(1);  // CHECK: store volatile i32 1
 }
 
+void nop() {
+  __builtin_arm_nop();
+}
+
+// CHECK: call {{.*}} @llvm.arm.hint(i32 0)
+
 void yield() {
   __builtin_arm_yield();
 }
Index: test/CodeGen/builtins-arm64.c
===================================================================
--- test/CodeGen/builtins-arm64.c
+++ test/CodeGen/builtins-arm64.c
@@ -16,6 +16,7 @@
 }
 
 void hints() {
+  __builtin_arm_nop();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 0)
   __builtin_arm_yield();  //CHECK: call {{.*}} @llvm.aarch64.hint(i32 1)
   __builtin_arm_wfe();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 2)
   __builtin_arm_wfi();    //CHECK: call {{.*}} @llvm.aarch64.hint(i32 3)
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