r212887 - Improve comments of ARM ACLE header file and tests
Saleem Abdulrasool
compnerd at compnerd.org
Sun Jul 13 16:54:57 PDT 2014
On Sat, Jul 12, 2014 at 3:48 PM, Yi Kong <Yi.Kong at arm.com> wrote:
> Author: kongyi
> Date: Sat Jul 12 17:48:13 2014
> New Revision: 212887
>
> URL: http://llvm.org/viewvc/llvm-project?rev=212887&view=rev
> Log:
> Improve comments of ARM ACLE header file and tests
>
> Include section number in ARM ACLE specification for easier navigation.
>
Thanks for doing this, I had a similar change that I was going to push.
> Modified:
> cfe/trunk/lib/Headers/arm_acle.h
> cfe/trunk/test/CodeGen/arm_acle.c
>
> Modified: cfe/trunk/lib/Headers/arm_acle.h
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/arm_acle.h?rev=212887&r1=212886&r2=212887&view=diff
>
> ==============================================================================
> --- cfe/trunk/lib/Headers/arm_acle.h (original)
> +++ cfe/trunk/lib/Headers/arm_acle.h Sat Jul 12 17:48:13 2014
> @@ -34,8 +34,8 @@
> extern "C" {
> #endif
>
> -/* Miscellaneous data-processing intrinsics */
> -
> +/* 9 DATA-PROCESSING INTRINSICS */
> +/* 9.2 Miscellaneous data-processing intrinsics */
> static __inline__ uint32_t __attribute__((always_inline, nodebug))
> __clz(uint32_t t) {
> return __builtin_clz(t);
> @@ -74,17 +74,20 @@ static __inline__ uint64_t __attribute__
> return __builtin_bswap64(t);
> }
>
> -
> /*
> - * Saturating intrinsics
> + * 9.4 Saturating intrinsics
> *
> * FIXME: Change guard to their corrosponding __ARM_FEATURE flag when Q
> flag
> * intrinsics are implemented and the flag is enabled.
> */
> +/* 9.4.1 Width-specified saturation intrinsics */
> #if __ARM_32BIT_STATE
> #define __ssat(x, y) __builtin_arm_ssat(x, y)
> #define __usat(x, y) __builtin_arm_usat(x, y)
> +#endif
>
> +/* 9.4.2 Saturating addition and subtraction intrinsics */
> +#if __ARM_32BIT_STATE
> static __inline__ int32_t __attribute__((always_inline, nodebug))
> __qadd(int32_t t, int32_t v) {
> return __builtin_arm_qadd(t, v);
> @@ -101,7 +104,7 @@ __qdbl(int32_t t) {
> }
> #endif
>
> -/* CRC32 intrinsics */
> +/* 9.7 CRC32 intrinsics */
> #if __ARM_FEATURE_CRC32
> static __inline__ uint32_t __attribute__((always_inline, nodebug))
> __crc32b(uint32_t a, uint8_t b) {
>
> Modified: cfe/trunk/test/CodeGen/arm_acle.c
> URL:
> http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/arm_acle.c?rev=212887&r1=212886&r2=212887&view=diff
>
> ==============================================================================
> --- cfe/trunk/test/CodeGen/arm_acle.c (original)
> +++ cfe/trunk/test/CodeGen/arm_acle.c Sat Jul 12 17:48:13 2014
> @@ -3,7 +3,8 @@
>
> #include <arm_acle.h>
>
> -/* Miscellaneous data-processing intrinsics */
> +/* 9 DATA-PROCESSING INTRINSICS */
> +/* 9.2 Miscellaneous data-processing intrinsics */
> // ARM-LABEL: test_rev
> // ARM: call i32 @llvm.bswap.i32(i32 %t)
> uint32_t test_rev(uint32_t t) {
> @@ -42,8 +43,10 @@ uint64_t test_clzll(uint64_t t) {
> return __clzll(t);
> }
>
> -/* Saturating intrinsics */
> +/* 9.4 Saturating intrinsics */
> #ifdef __ARM_32BIT_STATE
> +
> +/* 9.4.1 Width-specified saturation intrinsics */
> // AArch32-LABEL: test_ssat
> // AArch32: call i32 @llvm.arm.ssat(i32 %t, i32 1)
> int32_t test_ssat(int32_t t) {
> @@ -55,6 +58,8 @@ int32_t test_ssat(int32_t t) {
> int32_t test_usat(int32_t t) {
> return __usat(t, 2);
> }
> +
> +/* 9.4.2 Saturating addition and subtraction intrinsics */
> // AArch32-LABEL: test_qadd
> // AArch32: call i32 @llvm.arm.qadd(i32 %a, i32 %b)
> int32_t test_qadd(int32_t a, int32_t b) {
> @@ -77,7 +82,7 @@ int32_t test_qdbl() {
> }
> #endif
>
> -/* CRC32 intrinsics */
> +/* 9.7 CRC32 intrinsics */
> // ARM-LABEL: test_crc32b
> // AArch32: call i32 @llvm.arm.crc32b
> // AArch64: call i32 @llvm.aarch64.crc32b
>
>
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>
--
Saleem Abdulrasool
compnerd (at) compnerd (dot) org
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