r212173 - X86: inline all atomic operations up to 128-bits.

[Tim Northover]

Author: tnorthover
Date: Wed Jul  2 05:25:45 2014
New Revision: 212173

URL: http://llvm.org/viewvc/llvm-project?rev=212173&view=rev
Log:
X86: inline all atomic operations up to 128-bits.

The backend *can* cope with all of these now, so Clang should give it the
chance. On CPUs without cmpxchg16b (e.g. the original athlon64) LLVM can reform
the libcalls.

rdar://problem/13496295

Added:
    cfe/trunk/test/CodeGen/x86_64-atomic-128.c
Modified:
    cfe/trunk/lib/Basic/Targets.cpp

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=212173&r1=212172&r2=212173&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Wed Jul  2 05:25:45 2014
@@ -3292,10 +3292,8 @@ public:
     ComplexLongDoubleUsesFP2Ret = true;
 
     // x86-64 has atomics up to 16 bytes.
-    // FIXME: Once the backend is fixed, increase MaxAtomicInlineWidth to 128
-    // on CPUs with cmpxchg16b
     MaxAtomicPromoteWidth = 128;
-    MaxAtomicInlineWidth = 64;
+    MaxAtomicInlineWidth = 128;
   }
   BuiltinVaListKind getBuiltinVaListKind() const override {
     return TargetInfo::X86_64ABIBuiltinVaList;

Added: cfe/trunk/test/CodeGen/x86_64-atomic-128.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/x86_64-atomic-128.c?rev=212173&view=auto
==============================================================================
--- cfe/trunk/test/CodeGen/x86_64-atomic-128.c (added)
+++ cfe/trunk/test/CodeGen/x86_64-atomic-128.c Wed Jul  2 05:25:45 2014
@@ -0,0 +1,29 @@
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm -o - | FileCheck %s
+
+// All atomics up to 16 bytes should be emitted inline on x86_64. The
+// backend can reform __sync_whatever calls if necessary (e.g. the CPU
+// doesn't have cmpxchg16b).
+
+__int128 test_sync_call(__int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_sync_call
+  // CHECK: atomicrmw add i128
+  return __sync_fetch_and_add(addr, val);
+}
+
+__int128 test_c11_call(_Atomic __int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_c11_call
+  // CHECK: atomicrmw sub
+  return __c11_atomic_fetch_sub(addr, val, 0);
+}
+
+__int128 test_atomic_call(__int128 *addr, __int128 val) {
+  // CHECK-LABEL: @test_atomic_call
+  // CHECK: atomicrmw or
+  return __atomic_fetch_or(addr, val, 0);
+}
+
+__int128 test_expression(_Atomic __int128 *addr) {
+  // CHECK-LABEL: @test_expression
+  // CHECK: atomicrmw and
+  *addr &= 1;
+}