r211227 - tests: relax ms-intrinsics test
Saleem Abdulrasool
compnerd at compnerd.org
Wed Jun 18 14:48:45 PDT 2014
Author: compnerd
Date: Wed Jun 18 16:48:44 2014
New Revision: 211227
URL: http://llvm.org/viewvc/llvm-project?rev=211227&view=rev
Log:
tests: relax ms-intrinsics test
Relax the tests to allow for differences between release and debug builds. This
should fix the buildbots.
Thanks to Benjamin Kramer and Eric Christo for their invaluable tip that this
was release build specific issue.
Modified:
cfe/trunk/test/CodeGen/ms-intrinsics.c
Modified: cfe/trunk/test/CodeGen/ms-intrinsics.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/ms-intrinsics.c?rev=211227&r1=211226&r2=211227&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/ms-intrinsics.c (original)
+++ cfe/trunk/test/CodeGen/ms-intrinsics.c Wed Jun 18 16:48:44 2014
@@ -6,12 +6,11 @@ void *test_InterlockedExchangePointer(vo
}
// CHECK: define{{.*}}i8* @test_InterlockedExchangePointer(i8** %Target, i8* %Value){{.*}}{
-// CHECK: entry:
-// CHECK: %0 = bitcast i8** %Target to i32*
-// CHECK: %1 = ptrtoint i8* %Value to i32
-// CHECK: %2 = atomicrmw xchg i32* %0, i32 %1 seq_cst
-// CHECK: %3 = inttoptr i32 %2 to i8*
-// CHECK: ret i8* %3
+// CHECK: %[[TARGET:[0-9]+]] = bitcast i8** %Target to i32*
+// CHECK: %[[VALUE:[0-9]+]] = ptrtoint i8* %Value to i32
+// CHECK: %[[EXCHANGE:[0-9]+]] = atomicrmw xchg i32* %[[TARGET]], i32 %[[VALUE]] seq_cst
+// CHECK: %[[RESULT:[0-9]+]] = inttoptr i32 %[[EXCHANGE]] to i8*
+// CHECK: ret i8* %[[RESULT]]
// CHECK: }
void *test_InterlockedCompareExchangePointer(void * volatile *Destination,
@@ -20,14 +19,13 @@ void *test_InterlockedCompareExchangePoi
}
// CHECK: define{{.*}}i8* @test_InterlockedCompareExchangePointer(i8** %Destination, i8* %Exchange, i8* %Comparand){{.*}}{
-// CHECK: entry:
-// CHECK: %0 = bitcast i8** %Destination to i32*
-// CHECK: %1 = ptrtoint i8* %Exchange to i32
-// CHECK: %2 = ptrtoint i8* %Comparand to i32
-// CHECK: %3 = cmpxchg volatile i32* %0, i32 %2, i32 %1 seq_cst seq_cst
-// CHECK: %4 = extractvalue { i32, i1 } %3, 0
-// CHECK: %5 = inttoptr i32 %4 to i8*
-// CHECK: ret i8* %5
+// CHECK: %[[DEST:[0-9]+]] = bitcast i8** %Destination to i32*
+// CHECK: %[[EXCHANGE:[0-9]+]] = ptrtoint i8* %Exchange to i32
+// CHECK: %[[COMPARAND:[0-9]+]] = ptrtoint i8* %Comparand to i32
+// CHECK: %[[XCHG:[0-9]+]] = cmpxchg volatile i32* %[[DEST:[0-9]+]], i32 %[[COMPARAND:[0-9]+]], i32 %[[EXCHANGE:[0-9]+]] seq_cst seq_cst
+// CHECK: %[[EXTRACT:[0-9]+]] = extractvalue { i32, i1 } %[[XCHG]], 0
+// CHECK: %[[RESULT:[0-9]+]] = inttoptr i32 %[[EXTRACT]] to i8*
+// CHECK: ret i8* %[[RESULT:[0-9]+]]
// CHECK: }
long test_InterlockedExchange(long *Target, long Value) {
@@ -35,7 +33,6 @@ long test_InterlockedExchange(long *Targ
}
// CHECK: define{{.*}}i32 @test_InterlockedExchange(i32* %Target, i32 %Value){{.*}}{
-// CHECK: entry:
-// CHECK: %0 = atomicrmw xchg i32* %Target, i32 %Value seq_cst
-// CHECK: ret i32 %0
+// CHECK: %[[EXCHANGE:[0-9]+]] = atomicrmw xchg i32* %Target, i32 %Value seq_cst
+// CHECK: ret i32 %[[EXCHANGE:[0-9]+]]
// CHECK: }
More information about the cfe-commits
mailing list