[PATCH] [ARM64]Scalar right shift uint64_t by 64 generates incorrect result.

[Hao Liu]

Hi t.p.northover,

Hi Tim and other reviewers,

In the front end CGBuiltin.cpp, we generate incorrect code for scalar right shift uint64_t by 64, which is incorrectly transferred into "LSR X0, #63". 
So when we try to right shift 0xf000000000000000 by 64, the result is 0x1, but it should be 0x0.

As according to LLVM reference, the right shift amount of i64 should be [0, 63], we can't generate such IR like "lshr i64 %tmp, 64". To fix this problem, this patch just return 0 result when the shift amount is 64.

Ask for code review.

Thanks,
-Hao

http://reviews.llvm.org/D3755

Files:
  lib/CodeGen/CGBuiltin.cpp
  test/CodeGen/aarch64-neon-intrinsics.c
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