[PATCH] Support ARM's new naming scheme for architectures and instruction sets

Bernard Ogden bernard.ogden at arm.com
Thu Jan 16 02:01:03 PST 2014


Map aarch32* to armv8a (cortex-a53) and add new
-ma32 and -mt32 aliases to the -mno-thumb and -mthumb
options, respectively. Depends on change to Triple on
the LLVM side.

http://llvm-reviews.chandlerc.com/D2563

Files:
  include/clang/Driver/Options.td
  lib/Driver/Tools.cpp
  test/Driver/arm-cortex-cpus.c

Index: include/clang/Driver/Options.td
===================================================================
--- include/clang/Driver/Options.td
+++ include/clang/Driver/Options.td
@@ -1058,6 +1058,7 @@
 def mno_restrict_it: Flag<["-"], "mno-restrict-it">, Group<m_arm_Features_Group>,
   HelpText<"Allow generation of deprecated IT blocks for ARMv8. It is off by default for ARMv8 Thumb mode">;
 def marm : Flag<["-"], "marm">, Alias<mno_thumb>;
+def ma32 : Flag<["-"], "ma32">, Alias<mno_thumb>;
 def ffixed_r9 : Flag<["-"], "ffixed-r9">, Group<m_arm_Features_Group>,
   HelpText<"Reserve the r9 register (ARM only)">;
 def mcrc : Flag<["-"], "mcrc">, Group<m_arm_Features_Group>,
@@ -1171,6 +1172,7 @@
   HelpText<"Equivalent to -march=mips64r2">, Flags<[HelpHidden]>;
 def module_file_info : Flag<["-"], "module-file-info">, Flags<[DriverOption,CC1Option]>, Group<Action_Group>;
 def mthumb : Flag<["-"], "mthumb">, Group<m_Group>;
+def mt32 : Flag<["-"], "mt32">, Alias<mthumb>;
 def mtune_EQ : Joined<["-"], "mtune=">, Group<m_Group>;
 def multi__module : Flag<["-"], "multi_module">;
 def multiply__defined__unused : Separate<["-"], "multiply_defined_unused">;
Index: lib/Driver/Tools.cpp
===================================================================
--- lib/Driver/Tools.cpp
+++ lib/Driver/Tools.cpp
@@ -4531,6 +4531,7 @@
     .Case("thumbv7m", "cortex-m3")
     .Cases("armv7em", "armv7e-m", "cortex-m4")
     .Cases("thumbv7em", "thumbv7e-m", "cortex-m4")
+    .Cases("aarch32", "aarch32v8", "aarch32v8a", "aarch32v8-a", "cortex-a53")
     .Cases("armv8", "armv8a", "armv8-a", "cortex-a53")
     .Cases("thumbv8", "thumbv8a", "cortex-a53")
     .Case("ep9312", "ep9312")
Index: test/Driver/arm-cortex-cpus.c
===================================================================
--- test/Driver/arm-cortex-cpus.c
+++ test/Driver/arm-cortex-cpus.c
@@ -106,15 +106,28 @@
 
 // RUN: %clang -target armv8  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
 // RUN: %clang -target arm -march=armv8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target aarch32 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target arm -march=aarch32  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target aarch32v8 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target arm -march=aarch32v8  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
 // RUN: %clang -target armv8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
 // RUN: %clang -target arm -march=armv8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target aarch32v8a -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target arm -march=aarch32v8a  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
 // RUN: %clang -target arm -march=armv8-a  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
+// RUN: %clang -target arm -march=aarch32v8-a  -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A %s
 // CHECK-V8A: "-cc1"{{.*}} "-triple" "armv8-{{.*}}" "-target-cpu" "cortex-a53"
 
 // RUN: %clang -target armv8 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
 // RUN: %clang -target arm -march=armv8 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target aarch32 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target arm -march=aarch32 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target aarch32v8 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target arm -march=aarch32v8 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
 // RUN: %clang -target armv8a -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
 // RUN: %clang -target arm -march=armv8a -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target aarch32v8a -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
+// RUN: %clang -target arm -march=aarch32v8a -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-V8A-THUMB %s
 // CHECK-V8A-THUMB: "-cc1"{{.*}} "-triple" "thumbv8-{{.*}}" "-target-cpu" "cortex-a53"
 
 // ================== Check default Architecture on each Cortex CPU
@@ -158,3 +171,15 @@
 // RUN: %clang -target arm -mcpu=cortex-a53 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV8A-THUMB %s
 // RUN: %clang -target arm -mcpu=cortex-a57 -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-CPUV8A-THUMB %s
 // CHECK-CPUV8A-THUMB: "-cc1"{{.*}} "-triple" "thumbv8-{{.*}}
+
+// ================== Check arm/thumb forcing instructions
+// Use targets that default to arm instructions
+// RUN: %clang -target arm -mcpu=arm7tdmi -mthumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTHUMB %s
+// RUN: %clang -target aarch32v8 -mt32 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MTHUMB %s
+// CHECK-MTHUMB: "-cc1"{{.*}} "-triple" "thumb{{.*}}
+
+// Use targets that default to thumb instructions (note that it makes no sense to actually do this for M-profile targets)
+// RUN: %clang -target armv7m -marm -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARM %s
+// RUN: %clang -target armv7m -mno-thumb -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARM %s
+// RUN: %clang -target armv7m -ma32 -### -c %s 2>&1 | FileCheck -check-prefix=CHECK-MARM %s
+// CHECK-MARM: "-cc1"{{.*}} "-triple" "arm{{.*}}
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D2563.1.patch
Type: text/x-patch
Size: 5476 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/cfe-commits/attachments/20140116/38d489aa/attachment.bin>


More information about the cfe-commits mailing list