r196910 - [mips][msa] Correct sld and sldi builtins.

[Daniel Sanders]

Author: dsanders
Date: Tue Dec 10 05:37:00 2013
New Revision: 196910

URL: http://llvm.org/viewvc/llvm-project?rev=196910&view=rev
Log:
[mips][msa] Correct sld and sldi builtins.

Summary: The result register of these instructions is also the first operand.

Reviewers: jacksprat, dsanders

Reviewed By: dsanders

Differential Revision: http://llvm-reviews.chandlerc.com/D2362
Differential Revision: http://llvm-reviews.chandlerc.com/D2363


Modified:
    cfe/trunk/include/clang/Basic/BuiltinsMips.def
    cfe/trunk/test/CodeGen/builtins-mips-msa.c

Modified: cfe/trunk/include/clang/Basic/BuiltinsMips.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsMips.def?rev=196910&r1=196909&r2=196910&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsMips.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsMips.def Tue Dec 10 05:37:00 2013
@@ -783,15 +783,15 @@ BUILTIN(__builtin_msa_shf_b, "V16cV16cIU
 BUILTIN(__builtin_msa_shf_h, "V8sV8sIUi", "nc")
 BUILTIN(__builtin_msa_shf_w, "V4iV4iIUi", "nc")
 
-BUILTIN(__builtin_msa_sld_b, "V16cV16cUi", "nc")
-BUILTIN(__builtin_msa_sld_h, "V8sV8sUi", "nc")
-BUILTIN(__builtin_msa_sld_w, "V4iV4iUi", "nc")
-BUILTIN(__builtin_msa_sld_d, "V2LLiV2LLiUi", "nc")
+BUILTIN(__builtin_msa_sld_b, "V16cV16cV16cUi", "nc")
+BUILTIN(__builtin_msa_sld_h, "V8sV8sV8sUi", "nc")
+BUILTIN(__builtin_msa_sld_w, "V4iV4iV4iUi", "nc")
+BUILTIN(__builtin_msa_sld_d, "V2LLiV2LLiV2LLiUi", "nc")
 
-BUILTIN(__builtin_msa_sldi_b, "V16cV16cIUi", "nc")
-BUILTIN(__builtin_msa_sldi_h, "V8sV8sIUi", "nc")
-BUILTIN(__builtin_msa_sldi_w, "V4iV4iIUi", "nc")
-BUILTIN(__builtin_msa_sldi_d, "V2LLiV2LLiIUi", "nc")
+BUILTIN(__builtin_msa_sldi_b, "V16cV16cV16cIUi", "nc")
+BUILTIN(__builtin_msa_sldi_h, "V8sV8sV8sIUi", "nc")
+BUILTIN(__builtin_msa_sldi_w, "V4iV4iV4iIUi", "nc")
+BUILTIN(__builtin_msa_sldi_d, "V2LLiV2LLiV2LLiIUi", "nc")
 
 BUILTIN(__builtin_msa_sll_b, "V16cV16cV16c", "nc")
 BUILTIN(__builtin_msa_sll_h, "V8sV8sV8s", "nc")

Modified: cfe/trunk/test/CodeGen/builtins-mips-msa.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/builtins-mips-msa.c?rev=196910&r1=196909&r2=196910&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/builtins-mips-msa.c (original)
+++ cfe/trunk/test/CodeGen/builtins-mips-msa.c Tue Dec 10 05:37:00 2013
@@ -701,15 +701,15 @@ void test(void) {
   v8i16_r = __builtin_msa_shf_h(v8i16_a, 3); // CHECK: call <8  x i16> @llvm.mips.shf.h(
   v4i32_r = __builtin_msa_shf_w(v4i32_a, 3); // CHECK: call <4  x i32> @llvm.mips.shf.w(
 
-  v16i8_r = __builtin_msa_sld_b(v16i8_a, 10); // CHECK: call <16 x i8>  @llvm.mips.sld.b(
-  v8i16_r = __builtin_msa_sld_h(v8i16_a, 10); // CHECK: call <8  x i16> @llvm.mips.sld.h(
-  v4i32_r = __builtin_msa_sld_w(v4i32_a, 10); // CHECK: call <4  x i32> @llvm.mips.sld.w(
-  v2i64_r = __builtin_msa_sld_d(v2i64_a, 10); // CHECK: call <2  x i64> @llvm.mips.sld.d(
+  v16i8_r = __builtin_msa_sld_b(v16i8_r, v16i8_a, 10); // CHECK: call <16 x i8>  @llvm.mips.sld.b(
+  v8i16_r = __builtin_msa_sld_h(v8i16_r, v8i16_a, 10); // CHECK: call <8  x i16> @llvm.mips.sld.h(
+  v4i32_r = __builtin_msa_sld_w(v4i32_r, v4i32_a, 10); // CHECK: call <4  x i32> @llvm.mips.sld.w(
+  v2i64_r = __builtin_msa_sld_d(v2i64_r, v2i64_a, 10); // CHECK: call <2  x i64> @llvm.mips.sld.d(
 
-  v16i8_r = __builtin_msa_sldi_b(v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.sldi.b(
-  v8i16_r = __builtin_msa_sldi_h(v8i16_a, 3); // CHECK: call <8  x i16> @llvm.mips.sldi.h(
-  v4i32_r = __builtin_msa_sldi_w(v4i32_a, 3); // CHECK: call <4  x i32> @llvm.mips.sldi.w(
-  v2i64_r = __builtin_msa_sldi_d(v2i64_a, 3); // CHECK: call <2  x i64> @llvm.mips.sldi.d(
+  v16i8_r = __builtin_msa_sldi_b(v16i8_r, v16i8_a, 3); // CHECK: call <16 x i8>  @llvm.mips.sldi.b(
+  v8i16_r = __builtin_msa_sldi_h(v8i16_r, v8i16_a, 3); // CHECK: call <8  x i16> @llvm.mips.sldi.h(
+  v4i32_r = __builtin_msa_sldi_w(v4i32_r, v4i32_a, 3); // CHECK: call <4  x i32> @llvm.mips.sldi.w(
+  v2i64_r = __builtin_msa_sldi_d(v2i64_r, v2i64_a, 3); // CHECK: call <2  x i64> @llvm.mips.sldi.d(
 
   v16i8_r = __builtin_msa_sll_b(v16i8_a, v16i8_b); // CHECK: call <16 x i8>  @llvm.mips.sll.b(
   v8i16_r = __builtin_msa_sll_h(v8i16_a, v8i16_b); // CHECK: call <8  x i16> @llvm.mips.sll.h(