r196834 - [AArch64] Remove q and non-q intrinsic definitions from the NEON scalar reduce
Chad Rosier
mcrosier at codeaurora.org
Mon Dec 9 14:47:56 PST 2013
Author: mcrosier
Date: Mon Dec 9 16:47:55 2013
New Revision: 196834
URL: http://llvm.org/viewvc/llvm-project?rev=196834&view=rev
Log:
[AArch64] Remove q and non-q intrinsic definitions from the NEON scalar reduce
pairwise implementation, using an overloaded definition instead.
Modified:
cfe/trunk/lib/CodeGen/CGBuiltin.cpp
Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=196834&r1=196833&r2=196834&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Mon Dec 9 16:47:55 2013
@@ -1990,39 +1990,29 @@ static Value *EmitAArch64ScalarBuiltinEx
Int = Intrinsic::aarch64_neon_vpadd; s = "vpadd";
break;
case AArch64::BI__builtin_neon_vpadds_f32:
- Int = Intrinsic::aarch64_neon_vpfadd; s = "vpfadd";
- break;
case AArch64::BI__builtin_neon_vpaddd_f64:
- Int = Intrinsic::aarch64_neon_vpfaddq; s = "vpfaddq";
- break;
+ Int = Intrinsic::aarch64_neon_vpfadd;
+ s = "vpfadd"; AcrossVec = true; break;
// Scalar Reduce Pairwise Floating Point Max
case AArch64::BI__builtin_neon_vpmaxs_f32:
- Int = Intrinsic::aarch64_neon_vpmax; s = "vpmax";
- break;
case AArch64::BI__builtin_neon_vpmaxqd_f64:
- Int = Intrinsic::aarch64_neon_vpmaxq; s = "vpmaxq";
- break;
+ Int = Intrinsic::aarch64_neon_vpmax;
+ s = "vpmax"; AcrossVec = true; break;
// Scalar Reduce Pairwise Floating Point Min
case AArch64::BI__builtin_neon_vpmins_f32:
- Int = Intrinsic::aarch64_neon_vpmin; s = "vpmin";
- break;
case AArch64::BI__builtin_neon_vpminqd_f64:
- Int = Intrinsic::aarch64_neon_vpminq; s = "vpminq";
- break;
+ Int = Intrinsic::aarch64_neon_vpmin;
+ s = "vpmin"; AcrossVec = true; break;
// Scalar Reduce Pairwise Floating Point Maxnm
case AArch64::BI__builtin_neon_vpmaxnms_f32:
- Int = Intrinsic::aarch64_neon_vpfmaxnm; s = "vpfmaxnm";
- break;
case AArch64::BI__builtin_neon_vpmaxnmqd_f64:
- Int = Intrinsic::aarch64_neon_vpfmaxnmq; s = "vpfmaxnmq";
- break;
+ Int = Intrinsic::aarch64_neon_vpfmaxnm;
+ s = "vpfmaxnm"; AcrossVec = true; break;
// Scalar Reduce Pairwise Floating Point Minnm
case AArch64::BI__builtin_neon_vpminnms_f32:
- Int = Intrinsic::aarch64_neon_vpfminnm; s = "vpfminnm";
- break;
case AArch64::BI__builtin_neon_vpminnmqd_f64:
- Int = Intrinsic::aarch64_neon_vpfminnmq; s = "vpfminnmq";
- break;
+ Int = Intrinsic::aarch64_neon_vpfminnm;
+ s = "vpfminnm"; AcrossVec = true; break;
// The followings are intrinsics with scalar results generated AcrossVec vectors
case AArch64::BI__builtin_neon_vaddlv_s8:
case AArch64::BI__builtin_neon_vaddlv_s16:
More information about the cfe-commits
mailing list