r195069 - Add predicate for AArch64 crypto instructions.
Jiangning Liu
jiangning.liu at arm.com
Mon Nov 18 17:38:20 PST 2013
Author: jiangning
Date: Mon Nov 18 19:38:19 2013
New Revision: 195069
URL: http://llvm.org/viewvc/llvm-project?rev=195069&view=rev
Log:
Add predicate for AArch64 crypto instructions.
Modified:
cfe/trunk/include/clang/Basic/arm_neon.td
cfe/trunk/test/CodeGen/aarch64-neon-crypto.c
cfe/trunk/utils/TableGen/NeonEmitter.cpp
Modified: cfe/trunk/include/clang/Basic/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/arm_neon.td?rev=195069&r1=195068&r2=195069&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/arm_neon.td (original)
+++ cfe/trunk/include/clang/Basic/arm_neon.td Mon Nov 18 19:38:19 2013
@@ -129,6 +129,7 @@ class Inst <string n, string p, string t
bit isScalarShift = 0;
bit isVCVT_N = 0;
bit isA64 = 0;
+ bit isCrypto = 0;
// Certain intrinsics have different names than their representative
// instructions. This field allows us to handle this correctly when we
@@ -907,6 +908,7 @@ def VEXT_A64 : WInst<"vext", "dddi",
////////////////////////////////////////////////////////////////////////////////
// Crypto
+let isCrypto = 1 in {
def AESE : SInst<"vaese", "ddd", "QUc">;
def AESD : SInst<"vaesd", "ddd", "QUc">;
def AESMC : SInst<"vaesmc", "dd", "QUc">;
@@ -923,6 +925,7 @@ def SHA1SU0 : SInst<"vsha1su0", "dddd",
def SHA256H : SInst<"vsha256h", "dddd", "QUi">;
def SHA256H2 : SInst<"vsha256h2", "dddd", "QUi">;
def SHA256SU1 : SInst<"vsha256su1", "dddd", "QUi">;
+}
////////////////////////////////////////////////////////////////////////////////
// Permutation
Modified: cfe/trunk/test/CodeGen/aarch64-neon-crypto.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/CodeGen/aarch64-neon-crypto.c?rev=195069&r1=195068&r2=195069&view=diff
==============================================================================
--- cfe/trunk/test/CodeGen/aarch64-neon-crypto.c (original)
+++ cfe/trunk/test/CodeGen/aarch64-neon-crypto.c Mon Nov 18 19:38:19 2013
@@ -1,6 +1,8 @@
// REQUIRES: aarch64-registered-target
// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
-// RUN: -ffp-contract=fast -S -O3 -o - %s | FileCheck %s
+// RUN: -target-feature +crypto -S -O3 -o - %s | FileCheck %s
+// RUN: not %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +neon \
+// RUN: -S -O3 -o - %s 2>&1 | FileCheck --check-prefix=CHECK-NO-CRYPTO %s
// Test new aarch64 intrinsics and types
@@ -8,6 +10,7 @@
uint8x16_t test_vaeseq_u8(uint8x16_t data, uint8x16_t key) {
// CHECK: test_vaeseq_u8
+ // CHECK-NO-CRYPTO: warning: implicit declaration of function 'vaeseq_u8' is invalid in C99
return vaeseq_u8(data, key);
// CHECK: aese {{v[0-9]+}}.16b, {{v[0-9]+}}.16b
}
Modified: cfe/trunk/utils/TableGen/NeonEmitter.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/utils/TableGen/NeonEmitter.cpp?rev=195069&r1=195068&r2=195069&view=diff
==============================================================================
--- cfe/trunk/utils/TableGen/NeonEmitter.cpp (original)
+++ cfe/trunk/utils/TableGen/NeonEmitter.cpp Mon Nov 18 19:38:19 2013
@@ -2560,8 +2560,28 @@ void NeonEmitter::run(raw_ostream &OS) {
if (!isA64)
continue;
+ // Skip crypto temporarily, and will emit them all together at the end.
+ bool isCrypto = R->getValueAsBit("isCrypto");
+ if (isCrypto)
+ continue;
+
+ emitIntrinsic(OS, R, EmittedMap);
+ }
+
+ OS << "#ifdef __ARM_FEATURE_CRYPTO\n";
+
+ for (unsigned i = 0, e = RV.size(); i != e; ++i) {
+ Record *R = RV[i];
+
+ // Skip crypto temporarily, and will emit them all together at the end.
+ bool isCrypto = R->getValueAsBit("isCrypto");
+ if (!isCrypto)
+ continue;
+
emitIntrinsic(OS, R, EmittedMap);
}
+
+ OS << "#endif\n\n";
OS << "#endif\n\n";
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