Bug fix 12730: Add support for __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1, 2, 4, 8} on ARM

Renato Golin renato.golin at linaro.org
Mon Sep 30 00:57:01 PDT 2013


Hi Weiming,

As far as I understand, atomic operations are available since ARMv6 (ex.
ARM11), but not in v6M (ex. Cortex-M0), so you might need to change your
condition a little.

cheers,
--renato


On 25 September 2013 19:15, Weiming Zhao <weimingz at codeaurora.org> wrote:

> Hi,****
>
> ** **
>
> Please review the attached patch. I added the macro definitions for ARMv7
> or up.****
>
> ** **
>
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted
> by The Linux Foundation****
>
> ** **
>
> *From:* İsmail Dönmez [mailto:ismail at donmez.ws]
> *Sent:* Wednesday, September 25, 2013 2:44 AM
> *To:* weimingz at codeaurora.org
> *Cc:* Eli Friedman; cfe-commits at cs.uiuc.edu
>
> *Subject:* Re: Bug fix 12730: Add support for
> __GCC_HAVE_SYNC_COMPARE_AND_SWAP_{1, 2, 4, 8} on ARM****
>
> ** **
>
> Hi,****
>
> ** **
>
> On Sat, Sep 7, 2013 at 2:08 AM, Weiming Zhao <weimingz at codeaurora.org>
> wrote:****
>
> Hi Eli,****
>
>  ****
>
> I didn’t find much info about atomics for targets. I find two attributes
> are relevant: MaxAtomicPromoteWidth and  MaxAtomicInlineWidth, but they
> cannot be used to compute the macros.****
>
> Besides, even for the same target, the macros are dependent on CPU types.
> For example, for X86 target:****
>
>   if (CPU >= CK_i486) {****
>
>     Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1");****
>
>     Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2");****
>
>     Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4");****
>
>   }****
>
>   if (CPU >= CK_i586)****
>
>     Builder.defineMacro("__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8");****
>
> }****
>
> ** **
>
> How about adding these macros for only ARMv7 and up? Without this patch
> std::thread just fails on ARM so it would be rather nice to have this fixed
> in clang 3.4 release. ****
>
> ** **
>
> Regards.****
>
> ** **
>
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