[PATCH][AArch64] implement aarch64 neon instruction class AdvSIMD (shift)

[Hao Liu]

Hi,

Attached are patches to implement aarch64 neon instruction class AdvSIMD
(shift), which patches implemented 21 shift instructions and 4 convert
instructions. Most of them are implemented like ARMv7, except :
1)  SHRN is implemented by IR (lshr/ashr, tuncate) instead of IR intrinsics.
2)  There are some special instructions added in AArch64: shift narrow high,
which is implemented by combining shuffle vector and normal shift narrow
instructions.
3) Simplify  vshll_high_n/vmovl_high ACLE functions by calling vget_high and
vshll_n, instead of adding new __builtins.  In arm_neon.h, We can't write
code like:  
                       (int16x8_t)vshll_n_s8(vget_high_s8(__a), __b), 
     as there is a local variable in Macro vshll_n_s8 also named "__a".
Macro expanding will generate code like "__a = vget_high_s8(__a)", which
will report an error when compiling ACLE functions.
     So I make the generated code in arm_neon.h as following:
                       int8x8_t __a1 = vget_high_s8(__a);
                      (int16x8_t)vshll_n_s8(__a1, __b);

There are some changed in Clang as new types need to be supported:
1)  Add a new naming type 'm' in arm_neon.td to generate "half width
elements, same num elts", as there are some complicated  ACLE functions
can't be generated, such as "int8x16_t vqshrn_high_n_s16(int8x8_t,
int16x8_t, )".
2)  There is a minor bug about double type in ModType() NeonEmitter.cpp,
which will result in wrong NeonTypeFlages. Fix it by adding:  
              +      if (type == 'd')
              +        type = 'l';
3) Enable the range check for VCVT_N can check [1, 64] for floating-point
64-bit type in NeonEmitter.cpp.


Ask for review, please.

Thanks,
-Hao
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