[PATCH][AArch64] implement aarch64 neon instruction class AdvSIMD (3 diff)

[Jiangning Liu]

> Don't these have reasonably simple LLVM IR representations? For example:
>
> define <2 x i32> @addhn(<2 x i64> %lhs, <2 x i64> %rhs) {
>   %sum = add <2 x i64> %lhs, %rhs
>   %shift = shl <2 x i64> %sum, <i64 32, i64 32>
>   %trunc = trunc <2 x i64> %shift to <2 x i32>
>   ret <2 x i32> %trunc
> }
>
>
Do you mean to use lshr instead of shl, because addhn is to get high
narrow, so we could have,

define <2 x i32> @addhn(<2 x i64> %lhs, <2 x i64> %rhs) {
  %sum = add <2 x i64> %lhs, %rhs
  %shift = lshr <2 x i64> %sum, <i64 32, i64 32>
  %trunc = trunc <2 x i64> %shift to <2 x i32>
  ret <2 x i32> %trunc
}

Thanks,
-Jiangning
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