r178870 - AArch64: bring predefines in line with most recent ACLE document

Tim Northover Tim.Northover at arm.com
Fri Apr 5 07:08:55 PDT 2013


Author: tnorthover
Date: Fri Apr  5 09:08:55 2013
New Revision: 178870

URL: http://llvm.org/viewvc/llvm-project?rev=178870&view=rev
Log:
AArch64: bring predefines in line with most recent ACLE document

The prefixes and names used are now identical to 32-bit ARM, which is also
expected to remain unchanged.

If we made this change after a release, we'd probably have to support both
variants for a while, but I think since AArch64 exists only on trunk now, it's
acceptable to simply swap them now.

Modified:
    cfe/trunk/lib/Basic/Targets.cpp
    cfe/trunk/test/Preprocessor/aarch64-target-features.c

Modified: cfe/trunk/lib/Basic/Targets.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Basic/Targets.cpp?rev=178870&r1=178869&r2=178870&view=diff
==============================================================================
--- cfe/trunk/lib/Basic/Targets.cpp (original)
+++ cfe/trunk/lib/Basic/Targets.cpp Fri Apr  5 09:08:55 2013
@@ -3323,40 +3323,40 @@ public:
     // FIXME: these were written based on an unreleased version of a 32-bit ACLE
     // which was intended to be compatible with a 64-bit implementation. They
     // will need updating when a real 64-bit ACLE exists. Particularly pressing
-    // instances are: __AARCH_ISA_A32, __AARCH_ISA_T32, __ARCH_PCS.
-    Builder.defineMacro("__AARCH_ACLE",    "101");
-    Builder.defineMacro("__AARCH",         "8");
-    Builder.defineMacro("__AARCH_PROFILE", "'A'");
-
-    Builder.defineMacro("__AARCH_FEATURE_UNALIGNED");
-    Builder.defineMacro("__AARCH_FEATURE_CLZ");
-    Builder.defineMacro("__AARCH_FEATURE_FMA");
+    // instances are: __ARM_ARCH_ISA_ARM, __ARM_ARCH_ISA_THUMB, __ARM_PCS.
+    Builder.defineMacro("__ARM_ACLE",         "101");
+    Builder.defineMacro("__ARM_ARCH",         "8");
+    Builder.defineMacro("__ARM_ARCH_PROFILE", "'A'");
+
+    Builder.defineMacro("__ARM_FEATURE_UNALIGNED");
+    Builder.defineMacro("__ARM_FEATURE_CLZ");
+    Builder.defineMacro("__ARM_FEATURE_FMA");
 
     // FIXME: ACLE 1.1 reserves bit 4. Will almost certainly come to mean
     // 128-bit LDXP present, at which point this becomes 0x1f.
-    Builder.defineMacro("__AARCH_FEATURE_LDREX", "0xf");
+    Builder.defineMacro("__ARM_FEATURE_LDREX", "0xf");
 
     // 0xe implies support for half, single and double precision operations.
-    Builder.defineMacro("__AARCH_FP", "0xe");
+    Builder.defineMacro("__ARM_FP", "0xe");
 
     // PCS specifies this for SysV variants, which is all we support. Other ABIs
-    // may choose __AARCH_FP16_FORMAT_ALTERNATIVE.
-    Builder.defineMacro("__AARCH_FP16_FORMAT_IEEE");
+    // may choose __ARM_FP16_FORMAT_ALTERNATIVE.
+    Builder.defineMacro("__ARM_FP16_FORMAT_IEEE");
 
     if (Opts.FastMath || Opts.FiniteMathOnly)
-      Builder.defineMacro("__AARCH_FP_FAST");
+      Builder.defineMacro("__ARM_FP_FAST");
 
     if ((Opts.C99 || Opts.C11) && !Opts.Freestanding)
-      Builder.defineMacro("__AARCH_FP_FENV_ROUNDING");
+      Builder.defineMacro("__ARM_FP_FENV_ROUNDING");
 
-    Builder.defineMacro("__AARCH_SIZEOF_WCHAR_T",
+    Builder.defineMacro("__ARM_SIZEOF_WCHAR_T",
                         Opts.ShortWChar ? "2" : "4");
 
-    Builder.defineMacro("__AARCH_SIZEOF_MINIMAL_ENUM",
+    Builder.defineMacro("__ARM_SIZEOF_MINIMAL_ENUM",
                         Opts.ShortEnums ? "1" : "4");
 
     if (BigEndian)
-      Builder.defineMacro("__AARCH_BIG_ENDIAN");
+      Builder.defineMacro("__ARM_BIG_ENDIAN");
   }
   virtual void getTargetBuiltins(const Builtin::Info *&Records,
                                  unsigned &NumRecords) const {

Modified: cfe/trunk/test/Preprocessor/aarch64-target-features.c
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/test/Preprocessor/aarch64-target-features.c?rev=178870&r1=178869&r2=178870&view=diff
==============================================================================
--- cfe/trunk/test/Preprocessor/aarch64-target-features.c (original)
+++ cfe/trunk/test/Preprocessor/aarch64-target-features.c Fri Apr  5 09:08:55 2013
@@ -1,30 +1,32 @@
 // RUN: %clang -target aarch64-none-linux-gnu -x c -E -dM %s -o - | FileCheck %s
-// CHECK: __AARCH 8
 // CHECK: __AARCH64EL__
-// CHECK: __AARCH_ACLE 101
 // CHECK-NOT: __AARCH_ADVSIMD_FP
 // CHECK-NOT: __AARCH_FEATURE_ADVSIMD
-// CHECK-NOT: __AARCH_FEATURE_BIG_ENDIAN
-// CHECK: __AARCH_FEATURE_CLZ 1
-// CHECK: __AARCH_FEATURE_FMA 1
-// CHECK: __AARCH_FEATURE_LDREX 0xf
-// CHECK: __AARCH_FEATURE_UNALIGNED 1
-// CHECK: __AARCH_FP 0xe
-// CHECK-NOT: __AARCH_FP_FAST
-// CHECK: __AARCH_FP16_FORMAT_IEEE 1
-// CHECK: __AARCH_FP_FENV_ROUNDING 1
-// CHECK: __AARCH_PROFILE 'A'
-// CHECK: __AARCH_SIZEOF_MINIMAL_ENUM 4
-// CHECK: __AARCH_SIZEOF_WCHAR_T 4
+// CHECK: __ARM_ACLE 101
+// CHECK: __ARM_ARCH 8
+// CHECK: __ARM_ARCH_PROFILE 'A'
+// CHECK-NOT: __ARM_FEATURE_BIG_ENDIAN
+// CHECK: __ARM_FEATURE_CLZ 1
+// CHECK: __ARM_FEATURE_FMA 1
+// CHECK: __ARM_FEATURE_LDREX 0xf
+// CHECK: __ARM_FEATURE_UNALIGNED 1
+// CHECK: __ARM_FP 0xe
+// CHECK-NOT: __ARM_FP_FAST
+// CHECK: __ARM_FP16_FORMAT_IEEE 1
+// CHECK: __ARM_FP_FENV_ROUNDING 1
+// CHECK-NOT: __ARM_NEON_FP
+// CHECK-NOT: __ARM_NEON
+// CHECK: __ARM_SIZEOF_MINIMAL_ENUM 4
+// CHECK: __ARM_SIZEOF_WCHAR_T 4
 // CHECK: __aarch64__
 
 
 // RUN: %clang -target aarch64-none-linux-gnu -ffast-math -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-FASTMATH %s
-// CHECK-FASTMATH: __AARCH_FP_FAST
+// CHECK-FASTMATH: __ARM_FP_FAST
 
 // RUN: %clang -target aarch64-none-linux-gnu -fshort-wchar -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTWCHAR %s
-// CHECK-SHORTWCHAR: __AARCH_SIZEOF_WCHAR_T 2
+// CHECK-SHORTWCHAR: __ARM_SIZEOF_WCHAR_T 2
 
 // RUN: %clang -target aarch64-none-linux-gnu -fshort-enums -x c -E -dM %s -o - | FileCheck --check-prefix=CHECK-SHORTENUMS %s
-// CHECK-SHORTENUMS: __AARCH_SIZEOF_MINIMAL_ENUM 1
+// CHECK-SHORTENUMS: __ARM_SIZEOF_MINIMAL_ENUM 1
 





More information about the cfe-commits mailing list