[cfe-commits] r143596 - /cfe/trunk/lib/CodeGen/TargetInfo.cpp

[Eli Friedman]

On Wed, Jan 4, 2012 at 11:21 AM, Hatanaka, Akira <ahatanaka at mips.com> wrote:
> So I finally came up with a way to fix the alignment issue.
> Please review the attached patch & test case.
>
> The idea is to add a parameter to ABIArgInfo::getDirect that is used to set the size of a padding inserted before a byval aggregate. The test case shows padding is inserted before the first element of a 16-byte aligned byval structure when the first element is not aligned to a 16-byte boundary.

The one conceptual issue that I have with this patch is that measuring
the padding in bytes isn't very general or intuitive; how many
registers is 8 bytes?  What if some target needs to insert a float of
padding?  I think if target-specific code decides it needs an i64 of
padding, it should put the llvm::Type "i64" into ABIArgInfo, etc.

Some more comments for the target-independent changes would be nice.
Otherwise, mechanically, the patch looks fine.

-Eli