[cfe-commits] [PATCH] Change -mno-mmx so it doesn't imply -mno-sse
Eli Friedman
eli.friedman at gmail.com
Tue Jul 5 15:59:47 PDT 2011
Attached. The approach taken is that -mno-mmx doesn't do anything
except disable defining __MMX__ and prevent vector arguments from
being passed in registers on x86-32. This is consistent with gcc in
the sense that any valid code should give an equivalent result,
although we don't actually diagnose explicit MMX usage from inline asm
or builtins. Because of the way the backend is structured at the
moment, we can't actually tell the backend that MMX is disabled
without disabling SSE; however, it doesn't matter because we never
generate MMX code for IR that doesn't explicitly use the x86_mmx type.
This patch is messy, but it works, as far as I can tell, and I can't
think of any other usable approach; sending to cfe-commits first to
double-check that I'm not missing anything.
See also <rdar://problem/9694837>.
-Eli
-------------- next part --------------
Index: test/Sema/x86-builtin-palignr.c
===================================================================
--- test/Sema/x86-builtin-palignr.c (revision 134439)
+++ test/Sema/x86-builtin-palignr.c (working copy)
@@ -1,5 +1,5 @@
-// RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -verify -triple x86_64-pc-linux-gnu %s
-// RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -verify -triple i686-apple-darwin10 %s
+// RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -target-feature +mmx -verify -triple x86_64-pc-linux-gnu %s
+// RUN: %clang_cc1 -ffreestanding -fsyntax-only -target-feature +ssse3 -target-feature +mmx -verify -triple i686-apple-darwin10 %s
#include <tmmintrin.h>
Index: test/CodeGen/x86_32-arguments-darwin.c
===================================================================
--- test/CodeGen/x86_32-arguments-darwin.c (revision 134439)
+++ test/CodeGen/x86_32-arguments-darwin.c (working copy)
@@ -1,5 +1,4 @@
-// RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -emit-llvm -o %t %s
-// RUN: FileCheck < %t %s
+// RUN: %clang_cc1 -w -fblocks -triple i386-apple-darwin9 -target-cpu yonah -emit-llvm -o - %s | FileCheck %s
// CHECK: define signext i8 @f0()
char f0(void) {
Index: test/CodeGen/x86_32-arguments-linux.c
===================================================================
--- test/CodeGen/x86_32-arguments-linux.c (revision 134439)
+++ test/CodeGen/x86_32-arguments-linux.c (working copy)
@@ -1,4 +1,4 @@
-// RUN: %clang_cc1 -w -fblocks -triple i386-pc-linux-gnu -emit-llvm -o %t %s
+// RUN: %clang_cc1 -w -fblocks -triple i386-pc-linux-gnu -target-cpu pentium4 -emit-llvm -o %t %s
// RUN: FileCheck < %t %s
// CHECK: define void @f56(
Index: lib/Basic/Targets.cpp
===================================================================
--- lib/Basic/Targets.cpp (revision 134439)
+++ lib/Basic/Targets.cpp (working copy)
@@ -1110,18 +1110,18 @@
// most of the implementation can be shared.
class X86TargetInfo : public TargetInfo {
enum X86SSEEnum {
- NoMMXSSE, MMX, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
+ NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42
} SSELevel;
- enum AMD3DNowEnum {
- NoAMD3DNow, AMD3DNow, AMD3DNowAthlon
- } AMD3DNowLevel;
+ enum MMX3DNowEnum {
+ NoMMX3DNow, MMX, AMD3DNow, AMD3DNowAthlon
+ } MMX3DNowLevel;
bool HasAES;
bool HasAVX;
public:
X86TargetInfo(const std::string& triple)
- : TargetInfo(triple), SSELevel(NoMMXSSE), AMD3DNowLevel(NoAMD3DNow),
+ : TargetInfo(triple), SSELevel(NoSSE), MMX3DNowLevel(NoMMX3DNow),
HasAES(false), HasAVX(false) {
LongDoubleFormat = &llvm::APFloat::x87DoubleExtended;
}
@@ -1159,6 +1159,9 @@
virtual void getDefaultFeatures(const std::string &CPU,
llvm::StringMap<bool> &Features) const;
virtual void HandleTargetFeatures(std::vector<std::string> &Features);
+ virtual const char* getABI() const {
+ return MMX3DNowLevel == NoMMX3DNow ? "no-mmx" : "";
+ }
};
void X86TargetInfo::getDefaultFeatures(const std::string &CPU,
@@ -1190,23 +1193,31 @@
;
else if (CPU == "pentium-mmx" || CPU == "pentium2")
setFeatureEnabled(Features, "mmx", true);
- else if (CPU == "pentium3")
+ else if (CPU == "pentium3") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse", true);
- else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64")
+ } else if (CPU == "pentium-m" || CPU == "pentium4" || CPU == "x86-64") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse2", true);
- else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona")
+ } else if (CPU == "yonah" || CPU == "prescott" || CPU == "nocona") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse3", true);
- else if (CPU == "core2")
+ } else if (CPU == "core2") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "ssse3", true);
- else if (CPU == "penryn") {
+ } else if (CPU == "penryn") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse4", true);
Features["sse42"] = false;
- } else if (CPU == "atom")
+ } else if (CPU == "atom") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse3", true);
- else if (CPU == "corei7") {
+ } else if (CPU == "corei7") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse4", true);
setFeatureEnabled(Features, "aes", true);
} else if (CPU == "corei7-avx") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse4", true);
setFeatureEnabled(Features, "aes", true);
// setFeatureEnabled(Features, "avx", true);
@@ -1214,7 +1225,6 @@
setFeatureEnabled(Features, "mmx", true);
else if (CPU == "k6-2" || CPU == "k6-3" || CPU == "athlon" ||
CPU == "athlon-tbird" || CPU == "winchip2" || CPU == "c3") {
- setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "3dnow", true);
} else if (CPU == "athlon-4" || CPU == "athlon-xp" || CPU == "athlon-mp") {
setFeatureEnabled(Features, "sse", true);
@@ -1226,8 +1236,10 @@
} else if (CPU == "k8-sse3") {
setFeatureEnabled(Features, "sse3", true);
setFeatureEnabled(Features, "3dnowa", true);
- } else if (CPU == "c3-2")
+ } else if (CPU == "c3-2") {
+ setFeatureEnabled(Features, "mmx", true);
setFeatureEnabled(Features, "sse", true);
+ }
}
bool X86TargetInfo::setFeatureEnabled(llvm::StringMap<bool> &Features,
@@ -1243,34 +1255,31 @@
if (Name == "mmx")
Features["mmx"] = true;
else if (Name == "sse")
- Features["mmx"] = Features["sse"] = true;
+ Features["sse"] = true;
else if (Name == "sse2")
- Features["mmx"] = Features["sse"] = Features["sse2"] = true;
+ Features["sse"] = Features["sse2"] = true;
else if (Name == "sse3")
- Features["mmx"] = Features["sse"] = Features["sse2"] =
- Features["sse3"] = true;
+ Features["sse"] = Features["sse2"] = Features["sse3"] = true;
else if (Name == "ssse3")
- Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
+ Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = true;
else if (Name == "sse4" || Name == "sse4.2")
- Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
+ Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] = true;
else if (Name == "sse4.1")
- Features["mmx"] = Features["sse"] = Features["sse2"] = Features["sse3"] =
+ Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = true;
else if (Name == "3dnow")
- Features["3dnowa"] = true;
+ Features["mmx"] = Features["3dnow"] = true;
else if (Name == "3dnowa")
- Features["3dnow"] = Features["3dnowa"] = true;
+ Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = true;
else if (Name == "aes")
Features["aes"] = true;
else if (Name == "avx")
Features["avx"] = true;
} else {
if (Name == "mmx")
- Features["mmx"] = Features["3dnow"] = Features["3dnowa"] =
- Features["sse"] = Features["sse2"] = Features["sse3"] =
- Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
+ Features["mmx"] = Features["3dnow"] = Features["3dnowa"] = false;
else if (Name == "sse")
Features["sse"] = Features["sse2"] = Features["sse3"] =
Features["ssse3"] = Features["sse41"] = Features["sse42"] = false;
@@ -1328,18 +1337,25 @@
.Case("sse3", SSE3)
.Case("sse2", SSE2)
.Case("sse", SSE1)
- .Case("mmx", MMX)
- .Default(NoMMXSSE);
+ .Default(NoSSE);
SSELevel = std::max(SSELevel, Level);
- AMD3DNowEnum ThreeDNowLevel =
- llvm::StringSwitch<AMD3DNowEnum>(Features[i].substr(1))
+ MMX3DNowEnum ThreeDNowLevel =
+ llvm::StringSwitch<MMX3DNowEnum>(Features[i].substr(1))
.Case("3dnowa", AMD3DNowAthlon)
.Case("3dnow", AMD3DNow)
- .Default(NoAMD3DNow);
+ .Case("mmx", MMX)
+ .Default(NoMMX3DNow);
- AMD3DNowLevel = std::max(AMD3DNowLevel, ThreeDNowLevel);
+ MMX3DNowLevel = std::max(MMX3DNowLevel, ThreeDNowLevel);
}
+
+ // Don't tell the backend if we're turning off mmx; it will end up disabling
+ // SSE, which we don't want.
+ std::vector<std::string>::iterator it;
+ it = std::find(Features.begin(), Features.end(), "-mmx");
+ if (it != Features.end())
+ Features.erase(it);
}
/// X86TargetInfo::getTargetDefines - Return a set of the X86-specific #defines
@@ -1394,9 +1410,7 @@
case SSE1:
Builder.defineMacro("__SSE__");
Builder.defineMacro("__SSE_MATH__"); // -mfp-math=sse always implied.
- case MMX:
- Builder.defineMacro("__MMX__");
- case NoMMXSSE:
+ case NoSSE:
break;
}
@@ -1418,12 +1432,14 @@
}
// Each case falls through to the previous one here.
- switch (AMD3DNowLevel) {
+ switch (MMX3DNowLevel) {
case AMD3DNowAthlon:
Builder.defineMacro("__3dNOW_A__");
case AMD3DNow:
Builder.defineMacro("__3dNOW__");
- case NoAMD3DNow:
+ case MMX:
+ Builder.defineMacro("__MMX__");
+ case NoMMX3DNow:
break;
}
}
Index: lib/CodeGen/TargetInfo.cpp
===================================================================
--- lib/CodeGen/TargetInfo.cpp (revision 134439)
+++ lib/CodeGen/TargetInfo.cpp (working copy)
@@ -374,6 +374,7 @@
bool IsDarwinVectorABI;
bool IsSmallStructInRegABI;
+ bool IsMMXDisabled;
static bool isRegisterSize(unsigned Size) {
return (Size == 8 || Size == 16 || Size == 32 || Size == 64);
@@ -403,14 +404,15 @@
virtual llvm::Value *EmitVAArg(llvm::Value *VAListAddr, QualType Ty,
CodeGenFunction &CGF) const;
- X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p)
- : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p) {}
+ X86_32ABIInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m)
+ : ABIInfo(CGT), IsDarwinVectorABI(d), IsSmallStructInRegABI(p),
+ IsMMXDisabled(m) {}
};
class X86_32TargetCodeGenInfo : public TargetCodeGenInfo {
public:
- X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p)
- :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p)) {}
+ X86_32TargetCodeGenInfo(CodeGen::CodeGenTypes &CGT, bool d, bool p, bool m)
+ :TargetCodeGenInfo(new X86_32ABIInfo(CGT, d, p, m)) {}
void SetTargetAttributes(const Decl *D, llvm::GlobalValue *GV,
CodeGen::CodeGenModule &CGM) const;
@@ -701,6 +703,9 @@
const llvm::Type *IRType = CGT.ConvertTypeRecursive(Ty);
if (UseX86_MMXType(IRType)) {
+ if (IsMMXDisabled)
+ return ABIArgInfo::getDirect(llvm::IntegerType::get(getVMContext(),
+ 64));
ABIArgInfo AAI = ABIArgInfo::getDirect(IRType);
AAI.setCoerceToType(llvm::Type::getX86_MMXTy(getVMContext()));
return AAI;
@@ -3006,10 +3011,12 @@
case llvm::Triple::msp430:
return *(TheTargetCodeGenInfo = new MSP430TargetCodeGenInfo(Types));
- case llvm::Triple::x86:
+ case llvm::Triple::x86: {
+ bool DisableMMX = strcmp(getContext().Target.getABI(), "no-mmx") == 0;
+
if (Triple.isOSDarwin())
return *(TheTargetCodeGenInfo =
- new X86_32TargetCodeGenInfo(Types, true, true));
+ new X86_32TargetCodeGenInfo(Types, true, true, DisableMMX));
switch (Triple.getOS()) {
case llvm::Triple::Cygwin:
@@ -3020,12 +3027,13 @@
case llvm::Triple::OpenBSD:
case llvm::Triple::NetBSD:
return *(TheTargetCodeGenInfo =
- new X86_32TargetCodeGenInfo(Types, false, true));
+ new X86_32TargetCodeGenInfo(Types, false, true, DisableMMX));
default:
return *(TheTargetCodeGenInfo =
- new X86_32TargetCodeGenInfo(Types, false, false));
+ new X86_32TargetCodeGenInfo(Types, false, false, DisableMMX));
}
+ }
case llvm::Triple::x86_64:
switch (Triple.getOS()) {
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