[cfe-commits] r105875 - in /cfe/trunk: include/clang/Basic/BuiltinsARM.def lib/CodeGen/CGBuiltin.cpp lib/Headers/arm_neon.td

[Nate Begeman]

Author: sampo
Date: Fri Jun 11 22:11:41 2010
New Revision: 105875

URL: http://llvm.org/viewvc/llvm-project?rev=105875&view=rev
Log:
vbsl, vrev* is implemented via arm_neon.h

Modified:
    cfe/trunk/include/clang/Basic/BuiltinsARM.def
    cfe/trunk/lib/CodeGen/CGBuiltin.cpp
    cfe/trunk/lib/Headers/arm_neon.td

Modified: cfe/trunk/include/clang/Basic/BuiltinsARM.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/Basic/BuiltinsARM.def?rev=105875&r1=105874&r2=105875&view=diff
==============================================================================
--- cfe/trunk/include/clang/Basic/BuiltinsARM.def (original)
+++ cfe/trunk/include/clang/Basic/BuiltinsARM.def Fri Jun 11 22:11:41 2010
@@ -30,8 +30,6 @@
 BUILTIN(__builtin_neon_vaddhn_v, "V8cV16cV16ci", "n")
 BUILTIN(__builtin_neon_vaddl_v, "V16cV8cV8ci", "n")
 BUILTIN(__builtin_neon_vaddw_v, "V16cV16cV8ci", "n")
-BUILTIN(__builtin_neon_vbsl_v, "V8cV8cV8cV8ci", "n")
-BUILTIN(__builtin_neon_vbslq_v, "V16cV16cV16cV16ci", "n")
 BUILTIN(__builtin_neon_vcage_v, "V8cV8cV8ci", "n")
 BUILTIN(__builtin_neon_vcageq_v, "V16cV16cV16ci", "n")
 BUILTIN(__builtin_neon_vcagt_v, "V8cV8cV8ci", "n")
@@ -161,12 +159,6 @@
 BUILTIN(__builtin_neon_vrecpeq_v, "V16cV16ci", "n")
 BUILTIN(__builtin_neon_vrecps_v, "V8cV8cV8ci", "n")
 BUILTIN(__builtin_neon_vrecpsq_v, "V16cV16cV16ci", "n")
-BUILTIN(__builtin_neon_vrev16_v, "V8cV8ci", "n")
-BUILTIN(__builtin_neon_vrev16q_v, "V16cV16ci", "n")
-BUILTIN(__builtin_neon_vrev32_v, "V8cV8ci", "n")
-BUILTIN(__builtin_neon_vrev32q_v, "V16cV16ci", "n")
-BUILTIN(__builtin_neon_vrev64_v, "V8cV8ci", "n")
-BUILTIN(__builtin_neon_vrev64q_v, "V16cV16ci", "n")
 BUILTIN(__builtin_neon_vrhadd_v, "V8cV8cV8ci", "n")
 BUILTIN(__builtin_neon_vrhaddq_v, "V16cV16cV16ci", "n")
 BUILTIN(__builtin_neon_vrshl_v, "V8cV8cV8ci", "n")

Modified: cfe/trunk/lib/CodeGen/CGBuiltin.cpp
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/CodeGen/CGBuiltin.cpp?rev=105875&r1=105874&r2=105875&view=diff
==============================================================================
--- cfe/trunk/lib/CodeGen/CGBuiltin.cpp (original)
+++ cfe/trunk/lib/CodeGen/CGBuiltin.cpp Fri Jun 11 22:11:41 2010
@@ -991,7 +991,6 @@
   case ARM::BI__builtin_neon_vaddw_v:
     Int = usgn ? Intrinsic::arm_neon_vaddws : Intrinsic::arm_neon_vaddwu;
     return EmitNeonCall(CGM.getIntrinsic(Int, &Ty, 1), Ops, "vaddw");
-  // FIXME: vbsl -> or ((0 & 1), (0 & 2)) in arm_neon.h
   case ARM::BI__builtin_neon_vcale_v:
     std::swap(Ops[0], Ops[1]);
   case ARM::BI__builtin_neon_vcage_v: {
@@ -1218,7 +1217,6 @@
   case ARM::BI__builtin_neon_vrecpsq_v:
     return EmitNeonCall(CGM.getIntrinsic(Intrinsic::arm_neon_vrecps, &Ty, 1),
                         Ops, "vrecps");
-  // FIXME: rev16, 32, 16 -> shufflevector
   case ARM::BI__builtin_neon_vrhadd_v:
   case ARM::BI__builtin_neon_vrhaddq_v:
     Int = usgn ? Intrinsic::arm_neon_vrhaddu : Intrinsic::arm_neon_vrhadds;

Modified: cfe/trunk/lib/Headers/arm_neon.td
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/lib/Headers/arm_neon.td?rev=105875&r1=105874&r2=105875&view=diff
==============================================================================
--- cfe/trunk/lib/Headers/arm_neon.td (original)
+++ cfe/trunk/lib/Headers/arm_neon.td Fri Jun 11 22:11:41 2010
@@ -40,6 +40,10 @@
 def OP_LO    : Op;
 def OP_CONC  : Op;
 def OP_DUP   : Op;
+def OP_SEL   : Op;
+def OP_REV64 : Op;
+def OP_REV32 : Op;
+def OP_REV16 : Op;
 
 class Inst <string p, string t, Op o> {
   string Prototype = p;
@@ -298,9 +302,9 @@
 
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.27 Reverse vector elements (sdap endianness)
-def VREV64 : WInst<"dd", "csiUcUsUiPcPsfQcQsQiQUcQUsQUiQPcQPsQf">;
-def VREV32 : WInst<"dd", "csUcUsPcQcQsQUcQUsQPc">;
-def VREV16 : WInst<"dd", "cUcPcQcQUcQPc">;
+def VREV64 : Inst<"dd", "csiUcUsUiPcPsfQcQsQiQUcQUsQUiQPcQPsQf", OP_REV64>;
+def VREV32 : Inst<"dd", "csUcUsPcQcQsQUcQUsQPc", OP_REV32>;
+def VREV16 : Inst<"dd", "cUcPcQcQUcQPc", OP_REV16>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.28 Other single operand arithmetic
@@ -322,7 +326,7 @@
 def VEOR : Inst<"ddd",   "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_XOR>;
 def VBIC : Inst<"ddd",   "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_ANDN>;
 def VORN : Inst<"ddd",   "csilUcUsUiUlQcQsQiQlQUcQUsQUiQUl", OP_ORN>;
-def VBSL : SInst<"dudd", "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPs">;
+def VBSL : Inst<"dudd",  "csilUcUsUiUlfPcPsQcQsQiQlQUcQUsQUiQUlQfQPcQPs", OP_SEL>;
 
 ////////////////////////////////////////////////////////////////////////////////
 // E.3.30 Transposition operations