[cfe-commits] r57102 - /cfe/trunk/include/clang/AST/X86Builtins.def

[Daniel Dunbar]

Author: ddunbar
Date: Sun Oct  5 01:35:41 2008
New Revision: 57102

URL: http://llvm.org/viewvc/llvm-project?rev=57102&view=rev
Log:
Fix X86 palignr[128] builtins to match LLVM.

Modified:
    cfe/trunk/include/clang/AST/X86Builtins.def

Modified: cfe/trunk/include/clang/AST/X86Builtins.def
URL: http://llvm.org/viewvc/llvm-project/cfe/trunk/include/clang/AST/X86Builtins.def?rev=57102&r1=57101&r2=57102&view=diff

==============================================================================
--- cfe/trunk/include/clang/AST/X86Builtins.def (original)
+++ cfe/trunk/include/clang/AST/X86Builtins.def Sun Oct  5 01:35:41 2008
@@ -20,6 +20,11 @@
 // FIXME: In GCC, these builtins are defined depending on whether support for
 // MMX/SSE/etc is turned on. We should do this too.
 
+// FIXME: Ideally we would be able to pull this information from what
+// LLVM already knows about X86 builtins. We need to match the LLVM
+// definition anyway, since code generation will lower to the
+// intrinsic if one exists.
+
 BUILTIN(__builtin_ia32_emms  , "v", "")
 
 // FIXME: Are these nothrow/const?
@@ -397,8 +402,8 @@
 BUILTIN(__builtin_ia32_movshdup, "V4fV4f", "")
 BUILTIN(__builtin_ia32_movsldup, "V4fV4f", "")
 BUILTIN(__builtin_ia32_lddqu, "V16ccC*", "")
-BUILTIN(__builtin_ia32_palignr128, "V2LLiV2LLii", "")
-BUILTIN(__builtin_ia32_palignr, "V1LLiV1LLii", "")
+BUILTIN(__builtin_ia32_palignr128, "V2LLiV2LLiV2LLii", "")
+BUILTIN(__builtin_ia32_palignr, "V1LLiV1LLiV1LLis", "")
 BUILTIN(__builtin_ia32_vec_init_v2si, "V2iii", "")
 BUILTIN(__builtin_ia32_vec_init_v4hi, "V4sssss", "")
 BUILTIN(__builtin_ia32_vec_init_v8qi, "V8ccccccccc", "")