[all-commits] [llvm/llvm-project] cad1ee: [Clang][RISCV] Add packed narrowing shift intrinsi...
Vitaly Buka via All-commits
all-commits at lists.llvm.org
Sun Oct 4 13:46:42 PDT 2026
Branch: refs/heads/users/vitalybuka/spr/test-1
Home: https://github.com/llvm/llvm-project
Commit: cad1eecaac838c317e23ba2c4601408da4dcc3f5
https://github.com/llvm/llvm-project/commit/cad1eecaac838c317e23ba2c4601408da4dcc3f5
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-narrowing-shift.ll
Log Message:
-----------
[Clang][RISCV] Add packed narrowing shift intrinsics (#228726)
This patch adds the Packed Narrowing Shift intrinsics:
- `__riscv_pnsrl_s_u8x4`
- `__riscv_pnsrl_s_u16x2`
- `__riscv_pnsra_s_i8x4`
- `__riscv_pnsra_s_i16x2`
- `__riscv_pnsrar_s_i8x4`
- `__riscv_pnsrar_s_i16x2`
Commit: 894dad791c0124915dcf6b5093744c9307cffaf2
https://github.com/llvm/llvm-project/commit/894dad791c0124915dcf6b5093744c9307cffaf2
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[mlir][xegpu] Raise the reduction vector size to match maxReduceVectorSize (#225122)
`maxReduceVectorSize` was pinned at 1, so a lane reduced one element at
a time no
matter how much data it held. This raises it to 16 and makes the layout
computation actually spend it, so a lane's reduce vector matches the
per-lane
budget.
```cpp
- int64_t maxReduceVectorSize = 1; // could extend to spirv vector Size
+ int64_t maxReduceVectorSize = 16; // extend to spirv vector Size
```
The PR only raises the vector size for the innermost dim, and only when
that dim is reduced and carries a single lane.
The reason we don't raise vector size for outer dim: Raising the vector
size for the outer dim means the vector may be strided in flat element
order. In case that the producer is a shape_cast op, it causes a
potential convert_layout after shape_cast which assumes all lane data to
be contiguous.
As we simplify propagation rule, the trade-off is that the rule is
conservative since we don't know the information about producer due to
the backward propagation.
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: e3afe37ec59c4c5f689e2c92bd0b6f16cabf6fbf
https://github.com/llvm/llvm-project/commit/e3afe37ec59c4c5f689e2c92bd0b6f16cabf6fbf
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/Option/OptParser.td
M llvm/include/llvm/Option/Option.h
M llvm/lib/Option/Arg.cpp
M llvm/lib/Option/LibraryOptions.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Option/Option.cpp
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
Log Message:
-----------
[Option] Add FlagOrEq and SeparateOrEq option kinds (#228319)
FlagOrEq accepts -x and -x=v; SeparateOrEq accepts -x=v and -x v. The
name is stored without '=', and RenderEqStyle renders -x=v. BoolField
and ValueField use them, so a library option takes one table row instead
of a Joined twin plus a Flag or a Separate alias.
CGDataOptions.cpp.o shrinks from 4,977 to 4,370 bytes and
InstCombineCLOptions.cpp.o from 4,180 to 3,553.
Aided by Opus 5.5
Commit: d30940d9dc3690bc8433411ce9b1e9eca45f9e62
https://github.com/llvm/llvm-project/commit/d30940d9dc3690bc8433411ce9b1e9eca45f9e62
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
A llvm/include/llvm/ADT/BoolOrDefault.h
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
Log Message:
-----------
[Option] Add BoolOrDefault for OptionalBoolField and DefaultOnOffField (#228835)
The members of OptionalBoolField and DefaultOnOffField are
std::optional<bool>, on which `if (X)` tests whether the option is
given, not its value. Make them a new 1-byte `enum class BoolOrDefault :
uint8_t { Default, True, False }`, which does not convert to bool, and
read them with `valueOr(X, Default)`.
Aided by Opus 5.5
Commit: c275ebd64bf5b05e36a3a8e8b8daa32ba9a52aac
https://github.com/llvm/llvm-project/commit/c275ebd64bf5b05e36a3a8e8b8daa32ba9a52aac
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Use StorageT for temporary storage in DenseMapBase::grow (NFC) (#228802)
Without this patch, the non-relocatable path of DenseMapBase::grow
rehashes into a temporary DenseMapBase instance:
DenseMapBase Tmp(NumBuckets, ExactBucketCount{});
This patch switches to:
StorageT Tmp;
while converting initEmpty, initWithExactBucketCount, and moveFrom to
static helpers to operate directly on StorageT. This brings the
following benefits:
- grow() no longer calls the destructor for Tmp because StorageT does
not have one. Without this patch, we call Tmp.~DenseMapBase(), which
in turn calls destroyAll() even though the bucket array has no
elements to destruct. Even with inlining enabled, the host compiler
retains the body of destroyAll() because NumBuckets == 0 is set inside
moveFrom, which is marked LLVM_ATTRIBUTE_NOINLINE.
- We get to remove the following helpers as their only purpose is to
facilitate a temporary instance of DenseMapBase during grow():
- DenseMapBase::ExactBucketCount
- DenseMapBase::DenseMapBase(unsigned, ExactBucketCount)
- DenseMapStorage::kill()
- SmallDenseMapStorage::kill()
Assisted-by: Antigravity
Commit: 2c9a3d2870b263526d803b1ea6c5c98923a70d0f
https://github.com/llvm/llvm-project/commit/2c9a3d2870b263526d803b1ea6c5c98923a70d0f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M offload/Maintainers.md
Log Message:
-----------
offload: Remove Johannes from current maintainers (#228853)
Commit: 32d1053b64b5f26f06960e65da313879ec968086
https://github.com/llvm/llvm-project/commit/32d1053b64b5f26f06960e65da313879ec968086
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/LiveVariables.cpp
Log Message:
-----------
[CodeGen] Remove unused functions (NFC) (#228844)
LiveVariables::replaceKillInstruction: The last caller was removed on
October 1, 2026 in commit 8068182dd6fb1a8efae0291db1d2462d29025cd1.
TargetLoweringBase::getSupportedLibcallImpl: The last caller was
removed on October 24, 2025 in commit
26450db480761c0fedf319fc350178798ce7e547.
Assisted-by: Antigravity
Commit: eddb17da45c0d2c23d71a1cef3e09821989988f2
https://github.com/llvm/llvm-project/commit/eddb17da45c0d2c23d71a1cef3e09821989988f2
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#228843)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast.
Note that the if-then-else chain ends with:
} else
llvm_unreachable("Unhandled CausingFact type");
which guarantees that CausingFact is nonnull.
Assisted-by: Antigravity
Commit: b11606a912ae297cc4b9db6a7c59f44b0e326aa6
https://github.com/llvm/llvm-project/commit/b11606a912ae297cc4b9db6a7c59f44b0e326aa6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
M llvm/test/Transforms/SLPVectorizer/X86/dependent-seeds.ll
Log Message:
-----------
[SLP]Fix regressions after the fmul/fadd fusion cost changes
Revisit the standalone seeds skipped as dependent on the lanes of a
vectorized window, instead of dropping them until the next SLP run.
Do not credit the fusion of the root of a loop-carried fadd reduction:
the chain through the loop phi is bound by its latency, which the
vector code cuts.
Fixes regressions in RAJAPerf.
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/228720
Commit: f137bc0f5cad3bc498bbee0469223a815031846a
https://github.com/llvm/llvm-project/commit/f137bc0f5cad3bc498bbee0469223a815031846a
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/lib/CodeGen/Targets/X86.cpp
M clang/test/CodeGen/regparm-struct.c
Log Message:
-----------
[clang][X86] bring `regparm` in line with GCC (#227130)
Removes some divergences between GCC and Clang using `regparm`. In
particular
- All floats count as floats (previously `f16`, `f16b`, `long double`
and `f128` did not)
- Complex numbers are always passed via the stack
- Unions are always passed like integers
- Some changes to how wrapping structs (with a single non-ZST field) are
handled
I've tested this empirically (with abi-cafe)
---------
Co-authored-by: Reid Kleckner <rkleckner at nvidia.com>
Commit: 8b0127c14e18f5856afbc2cc61461e2ab7e67609
https://github.com/llvm/llvm-project/commit/8b0127c14e18f5856afbc2cc61461e2ab7e67609
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/test/OpenMP/parallel_for_loop_messages.cpp
Log Message:
-----------
[Clang][OpenMP][NFC] Add test for `class-type` data members as loop counters (#228831)
Fixes #140243
An OpenMP loop whose init assigns to a data member of class type, like
`for (a = x; ...)` with `I<int> a`, crashed in
`OpenMPIterationSpaceChecker::checkAndSetInit`. Such an assignment is an
`operator=` call, so it goes through the `CXXOperatorCallExpr` branch,
and two of the `setLCDeclAndLB` calls there took the bound from `BO`,
the `BinaryOperator` cast that had already failed and is null at that
point. The invalid code in the report is not needed: a valid loop over
an iterator-typed data member crashed the same way.
#203252 replaced those `BO->getRHS()` uses with `CE->getArg(1)` as part
of another fix, so the crash is gone on trunk and no source change is
needed. This PR only adds a regression test so the issue can be closed.
Commit: 751b3a4562e947a1bfc1169d480adc906a2f8e13
https://github.com/llvm/llvm-project/commit/751b3a4562e947a1bfc1169d480adc906a2f8e13
Author: Ivy Xu <ivyxu1337 at gmail.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/www/OpenProjects.html
Log Message:
-----------
[clang][www] Fix typos in OpenProjects page (#228822)
Fix various typos in Clang's [OpenProjects
page](https://clang.llvm.org/OpenProjects.html).
Assisted-by: Claude Sonnet 5.5
Commit: 5f9b69e99d5f1949273c3bf407b631072a15cac4
https://github.com/llvm/llvm-project/commit/5f9b69e99d5f1949273c3bf407b631072a15cac4
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/test/Parser/decltype-crash.cpp
R clang/test/Parser/decltype-gh188014.cpp
R clang/test/Parser/gh114815.cpp
Log Message:
-----------
[clang][test] Combine and clean up decltype parser tests NFC (#228889)
Follow-up #211221
Commit: ed390ca4d61b412e595757b35dcb4fff07147c9e
https://github.com/llvm/llvm-project/commit/ed390ca4d61b412e595757b35dcb4fff07147c9e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-syntax.cpp
Log Message:
-----------
[flang][OpenMP] Remove unnecessary check for extension clauses (#228878)
Remove the check for extension clauses. These now do have descriptors,
so the check guarding the descriptor retrieval is no longer necessary.
Commit: c819bff6a970e48f6084d6af0841fccc03b46f0b
https://github.com/llvm/llvm-project/commit/c819bff6a970e48f6084d6af0841fccc03b46f0b
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/Makefile
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/TestProcessLoadErrorPostmortem.py
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/main.c
M lldb/test/API/functionalities/postmortem/wow64_minidump/TestWow64MiniDump.py
Log Message:
-----------
[lldb] Replay the cached error from GetLoadImageUtilityFunction (#226986)
`Process::LoadImage` needs a live process to load a library: on POSIX it
makes the C library's `dlopen` run inside the debuggee, and on Windows
it makes `LoadLibraryExW` run there, both through a JIT-compiled
function call that needs a process to run the call in. On a core file
(or, on Windows, a saved minidump) there is no such process, so the load
fails every time. POSIX and Windows each lose the resulting error
message, but for two different reasons.
On POSIX, only the first failure is reported correctly. Load a corefile,
and load two libraries that do not exist shows this:
```
(lldb) process load /tmp/does-not-exist-1.dylib
error: failed to load '/tmp/does-not-exist-1.dylib': dlopen error: could not make function caller: Can't make a function caller without a process.
(lldb) process load /tmp/does-not-exist-2.dylib
error: failed to load '/tmp/does-not-exist-2.dylib': (null)
```
`Process::GetLoadImageUtilityFunction` builds the `UtilityFunction` that
performs the `dlopen` call, and caches it in the `Process` The cache is
a `llvm::call_once`: only the first caller's factory function actually
runs, and every later caller just gets the same cached pointer back,
whether or not the first attempt succeeded. Each caller had been passing
its own local `Status &error`, populated only when its own factory ran,
so any caller after the first got a `Status` nobody had written to.
On Windows the same missing-process failure loses its message on the
very first call, not just later ones. Loading a saved minidump and
calling `process load` twice shows this:
```
(lldb) process load /tmp/does-not-exist-1.dll
error: failed to load '/tmp/does-not-exist-1.dll': (null)
(lldb) process load /tmp/does-not-exist-2.dll
error: failed to load '/tmp/does-not-exist-2.dll': (null)
```
`process load` decides success or failure from the returned image token,
so it prints "failed to load" here at all; an SB API caller that checks
`error.Fail()` directly sees a false success on both calls. This is a
different bug from the POSIX one above: it is not about the cache
replaying a stale result, it is that `PlatformWindows::DoLoadImage`
never populated its `error` output parameter in the first place. Its
factory wrote the failure into a local `Status status` that nothing ever
read, instead of into the function's own `error` parameter.
Give the `Process` its own `Status` member alongside the cached
`UtilityFunction`, and have `GetLoadImageUtilityFunction` take an
`error` output parameter. The one factory call that runs stores its
result in the member; every call, whether or not it ran the factory,
copies the member back out to its caller. `Status` cannot be copied
directly because it wraps a move-only `llvm::Error`, so this uses
`Status::Clone()`, the pattern already used elsewhere in lldb to stash
an error and hand copies of it to more than one reader.
`DWARFUnit` uses the same technique to cache a load failure:
`ExtractUnitDIEIfNeeded` runs its loading step once per unit, guarded by
the member `m_has_parsed_non_skeleton_unit`, and stores any failure in
the member `m_dwo_error` via `SetDwoError`.
`SymbolFileDWARF::CalculateFrameVariableError` later reads it back with
`GetDwoError()` and clones it for its own caller.
Fix `PlatformWindows::DoLoadImage` the same way, by routing its factory
through the function's `error` parameter instead of the local `status`
that nothing read.
Add a test that saves a core file, loads it back, and calls
`SBProcess::LoadImage` twice with a path that cannot be opened. Both
calls must fail, with the same non-empty message. Add a second test,
using a checked-in Windows minidump in place of a core file, that does
the same thing against `PlatformWindows::DoLoadImage`.
---------
Co-authored-by: Charles Zablit <c_zablit at apple.com>
Commit: 7a7950df02b272fb99e5135e0e7f652b4fadf839
https://github.com/llvm/llvm-project/commit/7a7950df02b272fb99e5135e0e7f652b4fadf839
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/test/MC/Mips/unaligned-nops.s
Log Message:
-----------
[Mips] Emit 16-bit microMIPS NOPs for alignment (#228879)
Zero-filled halfword padding is not a complete microMIPS NOP. Emit
move $zero, $zero when alignment requires a two-byte instruction, then
use zero-encoded 32-bit NOPs for the remaining padding.
Handle an odd leading byte as data padding and preserve zero filling in
standard MIPS mode. Extend the unaligned-NOP test to cover both byte
orders, odd-sized data, and mode changes.
Assisted-by: OpenAI Codex # Testcases
Commit: 2f99c9c58eb656ae80f621d9afdfa700d693d78d
https://github.com/llvm/llvm-project/commit/2f99c9c58eb656ae80f621d9afdfa700d693d78d
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M lld/ELF/Arch/Mips.cpp
A lld/test/ELF/mips-micro-jump-region.s
Log Message:
-----------
[lld][Mips] Remove signed range check for R_MICROMIPS_26_S1 (#228880)
R_MICROMIPS_26_S1 encodes a shifted index within the current PC region,
not a signed absolute address. Applying the PC-relative relocation's
signed 27-bit check rejects valid destinations in higher address
regions.
Write the jump index without that check, as for R_MIPS_26, while
retaining
the signed range check for R_MICROMIPS_PC26_S1. Cover both jumps and
calls
at a high address in little- and big-endian objects.
Assisted-by: OpenAI Codex # Testcases
Commit: 22c49fe69417d8678b535d38fb115bf8371d8f73
https://github.com/llvm/llvm-project/commit/22c49fe69417d8678b535d38fb115bf8371d8f73
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
Log Message:
-----------
[Mips] Restrict microMIPS GP load folding to word loads (#228881)
Only LW has a GP-relative variant, so restrict the folding to LW_MM and
LW_MMR6.
Assisted-by: OpenAI Codex # Testcases
Commit: 092c5518e3f9d927d856619ff32a10c30f7b916f
https://github.com/llvm/llvm-project/commit/092c5518e3f9d927d856619ff32a10c30f7b916f
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/docs/ReleaseNotes.md
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bindings/OCaml/debuginfo.ml
Log Message:
-----------
[OCaml] Use DataLayout instead of string in (set_)data_layout (#228445)
Now that DataLayout is part of llvm rather than llvm_target, make use of
it in the `data_layout` and `set_data_layout` APIs.
Commit: 9068deb36344cc50c549d2d3238f76a167ce09b9
https://github.com/llvm/llvm-project/commit/9068deb36344cc50c549d2d3238f76a167ce09b9
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/test/MC/Mips/micromips-jump-instructions.s
Log Message:
-----------
[Mips] Add microMIPS hazard-barrier jump encodings (#228885)
Add microMIPS encodings for jr.hb and jalr.hb. Use BaseOpcode and MMRel
to map the standard opcodes to their microMIPS encodings.
Assisted-by: OpenAI Codex # Testcases
Commit: 9870703eb8e7fe5799abe68d0b8fee29e5bf504d
https://github.com/llvm/llvm-project/commit/9870703eb8e7fe5799abe68d0b8fee29e5bf504d
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uitofp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
Log Message:
-----------
[Loongarch] fix int to float conversion on non-MVT vector types (#228896)
fixes https://github.com/llvm/llvm-project/issues/228894
The code added in https://github.com/llvm/llvm-project/pull/202496 can
construct an invalid MVT (e.g. a 5-element vector, which is not
something any architecture has a specific register for). So, instead use
an `EVT` which is less restrictive.
Commit: 1f50f094b9e5acd52e6ba7270e238d79e440dc1e
https://github.com/llvm/llvm-project/commit/1f50f094b9e5acd52e6ba7270e238d79e440dc1e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/scev-check-unknown-prof.ll
Log Message:
-----------
[VPlan] Support pointer min/max bounds in VPlan memory runtime checks. (#225828)
Expand pointer-typed SCEV min/max expressions in VPSCEVExpander as
icmp + select (including profile metadata), matching SCEVExpander.
This allows modeling memory runtime checks with pointer min/max bounds
in VPlan, e.g. for accesses with a runtime stride of unknown sign.
Depends on https://github.com/llvm/llvm-project/pull/221483
PR: https://github.com/llvm/llvm-project/pull/225828
Commit: 2c06e1459d260a9ddd677fb66840966521e920f0
https://github.com/llvm/llvm-project/commit/2c06e1459d260a9ddd677fb66840966521e920f0
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MicroMipsInstrFormats.td
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/test/MC/Mips/micromips-control-instructions.s
Log Message:
-----------
[Mips] Add microMIPS CP0 move encodings (#228884)
Define the microMIPS MFC0 and MTC0 formats and instruction records for
pre-R6 targets, including the select field. Accept the two-operand forms
with an implicit select value of zero and add generic scheduling
entries.
Extend the control-instruction tests with explicit and implicit select
operands, checking both byte orders.
Assisted-by: OpenAI Codex # Testcases
Commit: f54e5523aa24cce5ca8eec7aae9c0a63bbb18ec7
https://github.com/llvm/llvm-project/commit/f54e5523aa24cce5ca8eec7aae9c0a63bbb18ec7
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/CodeGenOptions.cpp
A llvm/lib/CodeGen/CodeGenOptions.h
A llvm/lib/CodeGen/CodeGenOptions.td
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[CodeGen] Declare command line options in TableGen (#228911)
Move the cl::opts of TargetPassConfig.cpp and CodeGenPrepare.cpp into
CodeGenOptions.td, private to lib/CodeGen; other files will follow.
-enable-machine-outliner (cl::ValueOptional) and -regalloc
(RegisterPassParser) stay cl::opt.
CodeGenPrepare and its addressing-mode helpers hold
`const CodeGenOptions &Opts`; TargetPassConfig functions read
CodeGenOptions::Global. getCGPassBuilderOption() converts BoolOrDefault
members to the cl::boolOrDefault and std::optional<bool> fields of the
public CGPassBuilderOption. -basic-block-section-match-infer, which was
not cl::Hidden, is now listed by -help-hidden only.
Aided by Opus 5.5
Commit: f4bf388b08af193319e911cfae094ebe33dd1b88
https://github.com/llvm/llvm-project/commit/f4bf388b08af193319e911cfae094ebe33dd1b88
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/gather-gep-addressing-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/once-used-gep-index-seeds.ll
Log Message:
-----------
[SLP][NFC]Add tests with non-profitable GEPs vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228916
Commit: 6477cf1e836c0e5dfdf3b358d5aec1f4dc4ff132
https://github.com/llvm/llvm-project/commit/6477cf1e836c0e5dfdf3b358d5aec1f4dc4ff132
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-10-05 (Mon, 05 Oct 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
A llvm/test/CodeGen/LoongArch/lasx/vset-zero-test.ll
A llvm/test/CodeGen/LoongArch/lsx/vset-zero-test.ll
Log Message:
-----------
[LoongArch] Use [X]VSETNEZ.V/[X]VSETEQZ.V for whole-vector zero check (#226814)
Introduce `loongarch_vanynonzero` and `loongarch_vallzero` for checking
wether a vector has any non zero or all of them are zero, which could
simply some vector comparison such as the one below.
Before
```
xvseq.d $xr0, $xr0, $xr1
xvmskltz.d $xr0, $xr0
xvpickve2gr.wu $a0, $xr0, 0
xvpickve2gr.wu $a1, $xr0, 4
bstrins.d $a0, $a1, 3, 2
beqz $a0, .LBB2_2
```
After
```
xvseq.d $xr0, $xr0, $xr1
xvseteqz.v $fcc0, $xr0
bcnez $fcc0, .LBB2_2
```
This was largely used in early-exit loops such as `std::find`, the code
snippet after the patch could match the one witch gcc will generate.
Commit: 80cd965b6323b208519f8ab1d5ee86e4ea9862f4
https://github.com/llvm/llvm-project/commit/80cd965b6323b208519f8ab1d5ee86e4ea9862f4
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-10-05 (Mon, 05 Oct 2026)
Changed paths:
Log Message:
-----------
[LoongArch] Use [X]VSETNEZ.V/[X]VSETEQZ.V for whole-vector zero check (#226814)
Introduce `loongarch_vanynonzero` and `loongarch_vallzero` for checking
wether a vector has any non zero or all of them are zero, which could
simply some vector comparison such as the one below.
Before
```
xvseq.d $xr0, $xr0, $xr1
xvmskltz.d $xr0, $xr0
xvpickve2gr.wu $a0, $xr0, 0
xvpickve2gr.wu $a1, $xr0, 4
bstrins.d $a0, $a1, 3, 2
beqz $a0, .LBB2_2
```
After
```
xvseq.d $xr0, $xr0, $xr1
xvseteqz.v $fcc0, $xr0
bcnez $fcc0, .LBB2_2
```
This was largely used in early-exit loops such as `std::find`, the code
snippet after the patch could match the one witch gcc will generate.
Commit: 9e3c7d1d64c719874b309a3ecafc51508a1a9290
https://github.com/llvm/llvm-project/commit/9e3c7d1d64c719874b309a3ecafc51508a1a9290
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/MC/MCSymbolELF.cpp
Log Message:
-----------
[MC][ELF] Preserve bits 7:4 of st_other (#228882)
The ELF gABI defines visibility in the low bits of st_other and leaves
the upper bits without a generic meaning [1]. Architecture-specific ELF
extensions use these upper bits. MIPS uses bits 7:4 to identify MIPS16
code symbols with STO_MIPS_MIPS16 (0xf0).
MCSymbolELF currently accepts only bits 7:5, so setting STO_MIPS_MIPS16
triggers an assertion. Expand the storage to preserve bits 7:4 and shift
the adjacent internal flags accordingly.
[1] ELF gABI, Section 5.1, Symbol Table Entry:
https://gabi.xinuos.com/elf/05-symtab.html#symbol-table-entry
Assisted-by: OpenAI Codex
Commit: 9d947002dd923f011fcda156472bee2e2b149786
https://github.com/llvm/llvm-project/commit/9d947002dd923f011fcda156472bee2e2b149786
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/lib/CIR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRDiagnosticHandler.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/RegisterAllDialects.cpp
A clang/test/CIR/Input/cir-input-emit-cir.c
A clang/test/CIR/Input/cir-input-emit-cir.cpp
A clang/test/CIR/Input/cir-input-invalid.cir
M clang/test/CIR/Input/cir-input-unsupported.cir
M clang/unittests/CIR/CIRDiagnosticHandlerTest.cpp
Log Message:
-----------
[CIR] Parse .cir cc1 input and support -emit-cir from it (#228288)
Fill in the Language::CIR path of CIRGenAction::ExecuteAction: register
the ClangIR dialects, parse and verify the main file into a ModuleOp
with MLIR diagnostics routed through CIRDiagnosticHandler, and require
the module's cir.triple to match the target triple. A mismatch is an
error rather than an override, because CIR emitted by -emit-cir has
already been lowered for the target ABI of its own triple.
It is still unclear whether we should disallow any overrides of module
CIRGen attribues. At this point in time, I opt to go with a conservative
approach.
The CIR-to-CIR pipeline is not run, because -emit-cir output has already
been through it and its lowering passes are not idempotent; recording
the pipeline stage on the module is left for a follow-up. Other outputs
still report that ClangIR input is not yet supported.
`registerAllDialects` now registers the LLVM dialect. The data layout
spec that CIRGen attaches to every module uses LLVM pointer types as
keys, so parsing CIR needs it. Until now every CIR tool registered it on
top of registerAllDialects, and the CIRGen context only got it as a
dependency of the eagerly loaded OpenACC and OpenMP dialects.
Note: Parse errors point into the .cir input. Verifier errors on CIR
emitted by CIRGen carry locations in the original source file, which is
not loaded in the SourceManager, so they are reported without a location
for now; a TODO records the open question of where they should point and
how to best handle this.
The round-trip tests for C and C++ check that the re-emitted CIR is
byte-identical to the original.
Part of https://github.com/llvm/llvm-project/issues/227917.
Commit: 79d0d6eef73aa48385bafd3bd07814f0e5727860
https://github.com/llvm/llvm-project/commit/79d0d6eef73aa48385bafd3bd07814f0e5727860
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
Log Message:
-----------
[CIR][NFC] Fix indentation of op description (#228920)
Fix the indentation of the MatrixColumnMajorLoadOp description
Commit: 5e1edea790610e7ef8c5e06b6e5185fe5dd1c830
https://github.com/llvm/llvm-project/commit/5e1edea790610e7ef8c5e06b6e5185fe5dd1c830
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder.dockerfile
Log Message:
-----------
[libcxx] Add user to linux-builder docker image (#228933)
Accidentally didn't move this over when copying from the builder-base
image in 84812cba90fe0a0f95544a3ff01da1e61346a68d. Without these we run
as root by default which results in not throwing permission denied
errors when running the test suite.
Commit: c25440b13f078ad66a7c94d3a76d5dd4b4693bcf
https://github.com/llvm/llvm-project/commit/c25440b13f078ad66a7c94d3a76d5dd4b4693bcf
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9d94700 (#228931)
This fixes 9d947002dd923f011fcda156472bee2e2b149786 (#228288).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9d947002dd923f011fcda156472bee2e2b149786
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: f16e2e3a234e1112f3ab36b6b9c5246e535821a6
https://github.com/llvm/llvm-project/commit/f16e2e3a234e1112f3ab36b6b9c5246e535821a6
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
Revert "[AMDGPU] Disable V_WMMA_F{16|32}_16X16X128_[BF]P8_[BF]P8 on gfx1250-strict" (#228932)
Reverts llvm/llvm-project#228564
breaks build of hipCUB for gfx1250* LCOMPILER-2911
Commit: 775004cafb190e95b4827a46f11168b86eae1755
https://github.com/llvm/llvm-project/commit/775004cafb190e95b4827a46f11168b86eae1755
Author: lrzlin <linrunze at loongson.cn>
Date: 2026-10-05 (Mon, 05 Oct 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
A llvm/test/CodeGen/LoongArch/machine-sink-jumptable-edge-split.ll
Log Message:
-----------
[LoongArch] Implement getJumpTableIndex to allow splitting jump table edges (#228550)
This patch implements `getJumpTableIndex` so that `canSplitCriticalEdge`
can split an edge out of an indirect jump through a jump table by
rewriting the jump table entry. See
https://github.com/llvm/llvm-project/pull/224197 for a detailed
explaination.
Recognize the jump table address feeding the PseudoBRIND (and also the
32-bit's LD.W form):
```
%base = PseudoLA_PCREL %jump-table.N
%off = LDX_W %base, %index
%tgt = ADD_D %base, %off
%PseudoBRIND %tgt, 0
```
On SPEC CPU2006 `400.perlbench` this removes all stack accesses from the
`S_regmatch` dispatch block and reduces retired instructions by 2.6% and
L1D loads by 4.5% on the `checkspam` workload.
Commit: c3abaa1b7b14545dca51f22650edc12d9c819f16
https://github.com/llvm/llvm-project/commit/c3abaa1b7b14545dca51f22650edc12d9c819f16
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/debug-info-extract.ll
Log Message:
-----------
[SLP][NFC]Add a test with missing debug info node, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228935
Commit: 57bb10210726e7daff16954d96afb7c36f91cbd0
https://github.com/llvm/llvm-project/commit/57bb10210726e7daff16954d96afb7c36f91cbd0
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenOptions.td
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-andCmpBrToTBZ.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/fast-isel-int-ext2.ll
M llvm/test/CodeGen/ARM/constants.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/lower-insert-elt.ll
M llvm/test/CodeGen/Hexagon/postinc-offset.ll
M llvm/test/CodeGen/Hexagon/swp-carried-1.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
M llvm/test/CodeGen/Hexagon/swp-lots-deps.ll
M llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
M llvm/test/CodeGen/Hexagon/swp-tfri.ll
M llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
M llvm/test/CodeGen/Mips/brdelayslot.ll
M llvm/test/CodeGen/PowerPC/sink-side-effect.ll
M llvm/test/CodeGen/PowerPC/sms-iterator.ll
M llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
M llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
M llvm/test/CodeGen/Thumb/dyn-stackalloc.ll
M llvm/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll
M llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
M llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
M llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
M llvm/test/CodeGen/X86/and-sink.ll
M llvm/test/CodeGen/X86/avx512-i1test.ll
M llvm/test/CodeGen/X86/cmov.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
M llvm/test/CodeGen/X86/phi-immediate-factoring.ll
M llvm/test/CodeGen/X86/pr3366.ll
M llvm/test/CodeGen/X86/sext-i1.ll
M llvm/test/CodeGen/X86/sink-blockfreq.ll
M llvm/test/CodeGen/X86/split-store.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/baseoffs-sext-bug.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-recreate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-reuse.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/store-extract-division-ub.ll
Log Message:
-----------
[CodeGenPrepare] Prefix option names with cgp- (#228838)
Rename the CodeGenPrepare options so that they start with cgp-, and turn
the -disable-* options into positive options that default to true:
The section prefix options (-profile-guided-section-prefix, etc.) are
kept for now.
Aided by Opus 5.5
Commit: adbbef962ba3cd29bbddc6df9ac32348b8cdf3ca
https://github.com/llvm/llvm-project/commit/adbbef962ba3cd29bbddc6df9ac32348b8cdf3ca
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/CIR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRDiagnosticHandler.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/RegisterAllDialects.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Headers/riscv_packed_simd.h
A clang/test/CIR/Input/cir-input-emit-cir.c
A clang/test/CIR/Input/cir-input-emit-cir.cpp
A clang/test/CIR/Input/cir-input-invalid.cir
M clang/test/CIR/Input/cir-input-unsupported.cir
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/regparm-struct.c
M clang/test/OpenMP/parallel_for_loop_messages.cpp
M clang/test/Parser/decltype-crash.cpp
R clang/test/Parser/decltype-gh188014.cpp
R clang/test/Parser/gh114815.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M clang/unittests/CIR/CIRDiagnosticHandlerTest.cpp
M clang/www/OpenProjects.html
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_linux.cpp
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
A compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang/lib/Semantics/check-omp-syntax.cpp
M libcxx/utils/ci/docker/linux-builder.dockerfile
M lld/ELF/Arch/Mips.cpp
A lld/test/ELF/mips-micro-jump-region.s
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/Makefile
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/TestProcessLoadErrorPostmortem.py
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/main.c
M lldb/test/API/functionalities/postmortem/wow64_minidump/TestWow64MiniDump.py
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/docs/CommandLine.md
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ADT/BoolOrDefault.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/Option/OptParser.td
M llvm/include/llvm/Option/Option.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/CodeGenOptions.cpp
A llvm/lib/CodeGen/CodeGenOptions.h
A llvm/lib/CodeGen/CodeGenOptions.td
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCSymbolELF.cpp
M llvm/lib/Option/Arg.cpp
M llvm/lib/Option/LibraryOptions.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Option/Option.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MicroMipsInstrFormats.td
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bindings/OCaml/debuginfo.ml
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-andCmpBrToTBZ.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/fast-isel-int-ext2.ll
M llvm/test/CodeGen/ARM/constants.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/lower-insert-elt.ll
M llvm/test/CodeGen/Hexagon/postinc-offset.ll
M llvm/test/CodeGen/Hexagon/swp-carried-1.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
M llvm/test/CodeGen/Hexagon/swp-lots-deps.ll
M llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
M llvm/test/CodeGen/Hexagon/swp-tfri.ll
M llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uitofp.ll
A llvm/test/CodeGen/LoongArch/lasx/vset-zero-test.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
A llvm/test/CodeGen/LoongArch/lsx/vset-zero-test.ll
A llvm/test/CodeGen/LoongArch/machine-sink-jumptable-edge-split.ll
M llvm/test/CodeGen/Mips/brdelayslot.ll
M llvm/test/CodeGen/PowerPC/sink-side-effect.ll
M llvm/test/CodeGen/PowerPC/sms-iterator.ll
M llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
A llvm/test/CodeGen/RISCV/rvp-narrowing-shift.ll
M llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
M llvm/test/CodeGen/Thumb/dyn-stackalloc.ll
M llvm/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll
M llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
M llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
M llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
M llvm/test/CodeGen/X86/and-sink.ll
M llvm/test/CodeGen/X86/avx512-i1test.ll
M llvm/test/CodeGen/X86/cmov.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
M llvm/test/CodeGen/X86/phi-immediate-factoring.ll
M llvm/test/CodeGen/X86/pr3366.ll
M llvm/test/CodeGen/X86/sext-i1.ll
M llvm/test/CodeGen/X86/sink-blockfreq.ll
M llvm/test/CodeGen/X86/split-store.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
M llvm/test/MC/Mips/micromips-control-instructions.s
M llvm/test/MC/Mips/micromips-jump-instructions.s
M llvm/test/MC/Mips/unaligned-nops.s
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/baseoffs-sext-bug.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-recreate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-reuse.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/store-extract-division-ub.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/scev-check-unknown-prof.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
A llvm/test/Transforms/SLPVectorizer/X86/debug-info-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/dependent-seeds.ll
A llvm/test/Transforms/SLPVectorizer/X86/gather-gep-addressing-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/once-used-gep-index-seeds.ll
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
M offload/Maintainers.md
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[𝘀𝗽𝗿] changes introduced through rebase
Created using spr 1.3.7
[skip ci]
Commit: 1f01af97e29c3ad4d7173799595a1a81607fca1f
https://github.com/llvm/llvm-project/commit/1f01af97e29c3ad4d7173799595a1a81607fca1f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-04 (Sun, 04 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/CompileCommands.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/ABIVersions.def
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/Analysis/LifetimeSafety/Checker.cpp
M clang/lib/CIR/CMakeLists.txt
M clang/lib/CIR/FrontendAction/CIRDiagnosticHandler.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/RegisterAllDialects.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/Headers/riscv_packed_simd.h
A clang/test/CIR/Input/cir-input-emit-cir.c
A clang/test/CIR/Input/cir-input-emit-cir.cpp
A clang/test/CIR/Input/cir-input-invalid.cir
M clang/test/CIR/Input/cir-input-unsupported.cir
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/regparm-struct.c
M clang/test/OpenMP/parallel_for_loop_messages.cpp
M clang/test/Parser/decltype-crash.cpp
R clang/test/Parser/decltype-gh188014.cpp
R clang/test/Parser/gh114815.cpp
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M clang/unittests/CIR/CIRDiagnosticHandlerTest.cpp
M clang/www/OpenProjects.html
M compiler-rt/lib/asan/asan_thread.cpp
M compiler-rt/lib/hwasan/hwasan_linux.cpp
M compiler-rt/lib/lsan/lsan_thread.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_dl.h
A compiler-rt/test/lsan/TestCases/Linux/detached_thread_dlsym.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang/lib/Semantics/check-omp-syntax.cpp
M libcxx/utils/ci/docker/linux-builder.dockerfile
M lld/ELF/Arch/Mips.cpp
A lld/test/ELF/mips-micro-jump-region.s
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.h
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.h
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/Makefile
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/TestProcessLoadErrorPostmortem.py
A lldb/test/API/functionalities/load_unload/process-load-error-postmortem/main.c
M lldb/test/API/functionalities/postmortem/wow64_minidump/TestWow64MiniDump.py
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/docs/CommandLine.md
M llvm/docs/ReleaseNotes.md
A llvm/include/llvm/ADT/BoolOrDefault.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/CodeGen/LiveVariables.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/Option/OptParser.td
M llvm/include/llvm/Option/Option.h
M llvm/lib/CodeGen/CMakeLists.txt
A llvm/lib/CodeGen/CodeGenOptions.cpp
A llvm/lib/CodeGen/CodeGenOptions.h
A llvm/lib/CodeGen/CodeGenOptions.td
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/LiveVariables.cpp
M llvm/lib/CodeGen/RegisterUsageInfo.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
M llvm/lib/MC/MCSymbolELF.cpp
M llvm/lib/Option/Arg.cpp
M llvm/lib/Option/LibraryOptions.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Option/Option.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/LoongArch/LoongArchISelLowering.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
M llvm/lib/Target/LoongArch/LoongArchInstrInfo.h
M llvm/lib/Target/LoongArch/LoongArchLASXInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchLSXInstrInfo.td
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.cpp
M llvm/lib/Target/Mips/MicroMipsInstrFormats.td
M llvm/lib/Target/Mips/MicroMipsInstrInfo.td
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Bindings/OCaml/core.ml
M llvm/test/Bindings/OCaml/debuginfo.ml
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/and-sink.ll
M llvm/test/CodeGen/AArch64/arm64-andCmpBrToTBZ.ll
M llvm/test/CodeGen/AArch64/arm64-codegen-prepare-extload.ll
M llvm/test/CodeGen/AArch64/fast-isel-int-ext2.ll
M llvm/test/CodeGen/ARM/constants.ll
M llvm/test/CodeGen/ARM/vector-promotion.ll
M llvm/test/CodeGen/Hexagon/autohvx/lower-insert-elt.ll
M llvm/test/CodeGen/Hexagon/postinc-offset.ll
M llvm/test/CodeGen/Hexagon/swp-carried-1.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi12.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi6.ll
M llvm/test/CodeGen/Hexagon/swp-epilog-phi9.ll
M llvm/test/CodeGen/Hexagon/swp-lots-deps.ll
M llvm/test/CodeGen/Hexagon/swp-prolog-phi.ll
M llvm/test/CodeGen/Hexagon/swp-tfri.ll
M llvm/test/CodeGen/Hexagon/v6-unaligned-spill.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lasx/ir-instruction/uitofp.ll
A llvm/test/CodeGen/LoongArch/lasx/vset-zero-test.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sitofp.ll
M llvm/test/CodeGen/LoongArch/lsx/ir-instruction/uitofp.ll
A llvm/test/CodeGen/LoongArch/lsx/vset-zero-test.ll
A llvm/test/CodeGen/LoongArch/machine-sink-jumptable-edge-split.ll
M llvm/test/CodeGen/Mips/brdelayslot.ll
M llvm/test/CodeGen/PowerPC/sink-side-effect.ll
M llvm/test/CodeGen/PowerPC/sms-iterator.ll
M llvm/test/CodeGen/PowerPC/splitstore-check-volatile.ll
A llvm/test/CodeGen/RISCV/rvp-narrowing-shift.ll
M llvm/test/CodeGen/SystemZ/codegenprepare-splitstore.ll
M llvm/test/CodeGen/Thumb/dyn-stackalloc.ll
M llvm/test/CodeGen/Thumb2/2011-06-07-TwoAddrEarlyClobber.ll
M llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
M llvm/test/CodeGen/X86/2012-10-18-crash-dagco.ll
M llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
M llvm/test/CodeGen/X86/and-sink.ll
M llvm/test/CodeGen/X86/avx512-i1test.ll
M llvm/test/CodeGen/X86/cmov.ll
M llvm/test/CodeGen/X86/codegen-prepare-extload.ll
M llvm/test/CodeGen/X86/ins_subreg_coalesce-3.ll
M llvm/test/CodeGen/X86/phi-immediate-factoring.ll
M llvm/test/CodeGen/X86/pr3366.ll
M llvm/test/CodeGen/X86/sext-i1.ll
M llvm/test/CodeGen/X86/sink-blockfreq.ll
M llvm/test/CodeGen/X86/split-store.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
M llvm/test/MC/Mips/micromips-control-instructions.s
M llvm/test/MC/Mips/micromips-jump-instructions.s
M llvm/test/MC/Mips/unaligned-nops.s
M llvm/test/Transforms/CodeGenPrepare/ARM/sink-addrmode.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/ARM/sinkchain.ll
M llvm/test/Transforms/CodeGenPrepare/PowerPC/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/baseoffs-sext-bug.ll
M llvm/test/Transforms/CodeGenPrepare/X86/extend-sink-hoist.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/nonintegral.ll
M llvm/test/Transforms/CodeGenPrepare/X86/pr35658.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-recreate.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addr-reuse.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-base.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-select.ll
M llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-two-phi.ll
M llvm/test/Transforms/CodeGenPrepare/X86/split-store-alignment.ll
M llvm/test/Transforms/CodeGenPrepare/X86/store-extract-division-ub.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/scev-check-unknown-prof.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/c-ray.ll
A llvm/test/Transforms/SLPVectorizer/X86/debug-info-extract.ll
M llvm/test/Transforms/SLPVectorizer/X86/dependent-seeds.ll
A llvm/test/Transforms/SLPVectorizer/X86/gather-gep-addressing-cost.ll
A llvm/test/Transforms/SLPVectorizer/X86/once-used-gep-index-seeds.ll
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUPeepHoleOptimizer.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-inst-data.mlir
M mlir/test/Dialect/XeGPU/propagate-layout.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
M offload/Maintainers.md
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
combine test and fix
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/fe9d56399ae9...1f01af97e29c
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list