[all-commits] [llvm/llvm-project] 340c69: [CodeGen] Stop exporting cl::opts. NFC (#228728)

[Fangrui Song via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 340c69d7db052a43b6ed266dd7c4bb1a9c91c2ec
      https://github.com/llvm/llvm-project/commit/340c69d7db052a43b6ed266dd7c4bb1a9c91c2ec
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-10-03 (Sat, 03 Oct 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/CodeGen/LiveIntervals.h
    M llvm/include/llvm/CodeGen/MIR2Vec.h
    M llvm/include/llvm/CodeGen/MachineBlockHashInfo.h
    M llvm/include/llvm/CodeGen/MachinePipeliner.h
    M llvm/include/llvm/CodeGen/MachineScheduler.h
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
    M llvm/lib/CodeGen/LiveIntervals.cpp
    M llvm/lib/CodeGen/MIR2Vec.cpp
    M llvm/lib/CodeGen/MachineBlockHashInfo.cpp
    M llvm/lib/CodeGen/MachinePipeliner.cpp
    M llvm/lib/CodeGen/MachineScheduler.cpp
    M llvm/lib/CodeGen/RegAllocScore.cpp
    M llvm/lib/CodeGen/TargetPassConfig.cpp
    M llvm/lib/CodeGen/VLIWMachineScheduler.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/unittests/CodeGen/MIR2VecTest.cpp
    M llvm/unittests/CodeGen/RegAllocScoreTest.cpp

  Log Message:
  -----------
  [CodeGen] Stop exporting cl::opts. NFC (#228728)

AMDGPU reads -misched-prera-direction and -verify-misched, every
target's TTI reads -partial-unrolling-threshold through BasicTTIImpl.h,
and AsmPrinter reads -emit-bb-hash through extern declarations. Add
getters for them, move inline code that reads options (LiveIntervals,
MachinePipeliner, MIR2Vec) out of line, and let unittests use default
weights, so that the options can be file-local.

Aided by Opus 5.5



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