[all-commits] [llvm/llvm-project] 4c520f: [mlir][ROCDL] Add TargetInfo to replace Chipset, a...
Michael Kruse via All-commits
all-commits at lists.llvm.org
Sat Oct 3 08:54:06 PDT 2026
Branch: refs/heads/users/meinersbur/flang_numeric-limits
Home: https://github.com/llvm/llvm-project
Commit: 4c520f2ae12ffee271b55f904eba76dfc41b4ff0
https://github.com/llvm/llvm-project/commit/4c520f2ae12ffee271b55f904eba76dfc41b4ff0
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/ROCDLTargetInfo.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
A mlir/lib/Dialect/LLVMIR/IR/ROCDLTargetInfo.cpp
M mlir/unittests/Dialect/LLVMIR/CMakeLists.txt
A mlir/unittests/Dialect/LLVMIR/ROCDLTargetInfoTest.cpp
Log Message:
-----------
[mlir][ROCDL] Add TargetInfo to replace Chipset, allow features queries (#223562)
Add a new ROCDL::TargetInfo struct that parses AMDGPU triples and
target names using the same logic that Clang and LLVM
use (TargetParser) and maintains the set of features available on a
given GPU.
This is an improvement over the old `amdgpu::Chipset` struct since
that was just a version number and often became stale compared to the
knowledge exposed by LLVM, such as gfx1170 having OCP FP8 support even
though other gfx11 chips don't have it.
This struct also allows for moving to new-style
triples (amdgpu9.42-amd-amdhsa vs amdgcn-amd-amdhsa--gfx942, for
example), which is an ongoing migration in other parts of the compiler
that this PR lets us follow.
It also enables compiling for generic targets, like `gfx11-generic`,
which can be run on all chips in a generation.
The TargetInfo tracks the set of features available on a chip so you
can `.has()` a feature.
Finally, it copies over the handling of `:xnack` and `:sramecc`
modifiers from Clang, where the frontend converts them from "features"
into module flags. Here this is done with the
`migrateArchFeaturesToModuleFlags()` method, which downstream passes
will need to call.
This PR doesn't migrate any users to the new system, it's been split
for revewiability.
AI disclosure: I steered this, Claude wrote the code, I tried to clean
up the docs.
Commit: 101b9ffecf49f695520426ee351e2dfda05d817d
https://github.com/llvm/llvm-project/commit/101b9ffecf49f695520426ee351e2dfda05d817d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[Github] Run docs workflow on changes to utils/docs (#227101)
To ensure we catch any regressions premerge.
Commit: ed613a755b191d5f1c35b8d9a77223db4822c057
https://github.com/llvm/llvm-project/commit/ed613a755b191d5f1c35b8d9a77223db4822c057
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Fix the modules build after #224277 (#228223)
https://ci.swift.org/job/llvm.org/job/clang-stage2-Rthinlto/job/main/616/
rdar://188857378
Commit: 7380d5b2e42ce4ded08e986a6f773c3638c76439
https://github.com/llvm/llvm-project/commit/7380d5b2e42ce4ded08e986a6f773c3638c76439
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/machine-combiner-fma-chain.ll
A llvm/test/CodeGen/RISCV/machine-combiner-fma-chain.ll
A llvm/test/CodeGen/X86/machine-combiner-fma-chain.ll
Log Message:
-----------
[MachineCombiner][NFC]Add tests for long chain FMA reassociation, NFC (#224126)
Tests for https://github.com/llvm/llvm-project/pull/222676
Commit: 86e73536efe3d7c0282fc0eb482c46c099a3da50
https://github.com/llvm/llvm-project/commit/86e73536efe3d7c0282fc0eb482c46c099a3da50
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CAS/BuiltinObjectHasher.h
M llvm/lib/CAS/BuiltinObjectHasher.cpp
Log Message:
-----------
[CAS] Fix template export for unittest (#227908)
Commit: 353edd99a7f0edb8cfa9fa989797369dbb9ed8e2
https://github.com/llvm/llvm-project/commit/353edd99a7f0edb8cfa9fa989797369dbb9ed8e2
Author: yebinchon <yebin.chon at princeton.edu>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-global-addr.mlir
Log Message:
-----------
[flang][cuda] Resolve scalar constant address to device copy for reads (#227802)
Example test.cuf:
```
module m
integer, constant :: int_0_d = 2
end module
program test
use m
integer :: e(10)
e = 0
e = int_0_d
print *, e ! expect 2 (x10)
end program
```
During lowering, a data transfer from device to host is generated
because reads from a constant scalar consults the device copy. But the
address passed to the cudaMemcpy is the host shadow address. Depending
on the runtime, this is silently serviced as a host-to-host copy with no
issue, or crashes with illegal address.
This change resolves the constant scalar address to the device-side copy
early on in CUFDataTransferOpConversion. It does this early on before
looking at the kind of destination, so read of a constant scalar will be
resolved to the device copy regardless of whether the destination is a
scalar, array broadcast, or descriptor.
---------
Co-authored-by: Yebin Chon <ychon at nvidia.com>
Commit: e98c62dd3be473cb1d247eb35d6f2afd5e5912b8
https://github.com/llvm/llvm-project/commit/e98c62dd3be473cb1d247eb35d6f2afd5e5912b8
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[CAS] Fix template export for unittest (#227908)
Commit: 05390247f59c9f3eddda8f0613fa193b128539a4
https://github.com/llvm/llvm-project/commit/05390247f59c9f3eddda8f0613fa193b128539a4
Author: Vadim Kotov <11969390+vadimkotov at users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/dirent.yaml
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
A libc/src/__support/File/dir_scan_impl.h
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/scandir.cpp
A libc/src/dirent/scandir.h
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/dir_scan_impl_test.cpp
M libc/test/src/dirent/CMakeLists.txt
A libc/test/src/dirent/scandir_test.cpp
Log Message:
-----------
[libc] Implement scandir and its unit tests (#223198)
scandir is a POSIX function from <dirent.h> header that scans the directory and returns all files
contained within, optionally applying user-provided filtering and comparator functions.
Provide implementation which allows substituting the `Dir` class to allow for dependency
injection to cover various error cases.
Commit: 565bd792749195df85efd48c297acaff11644791
https://github.com/llvm/llvm-project/commit/565bd792749195df85efd48c297acaff11644791
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/Target/BorrowedStackFrame.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Target/BorrowedStackFrame.cpp
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb] Remove ConstString from Disassembler (#227810)
Disassembler was using it to store register names in its Operand class.
Commit: abb5ab28610f65dd9a3db4b7fccbf1797d57d524
https://github.com/llvm/llvm-project/commit/abb5ab28610f65dd9a3db4b7fccbf1797d57d524
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable e5m3 conversions on gfx1250-strict (#227861)
Fixes: LCOMPILER-2845
Commit: c396e382533e9cd059cf2b61172cd6922e1cd0f2
https://github.com/llvm/llvm-project/commit/c396e382533e9cd059cf2b61172cd6922e1cd0f2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/num-iters-for-store-load-conflict.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
Log Message:
-----------
[LAA,LV] Add additional dependence distance tests. (NFC) (#222109)
Add test with dependence on access of type i8, but widest type is i64
and test with multiple load/store forward deps.
Extra tests for https://github.com/llvm/llvm-project/pull/191867,
showing behavior changes.
PR: https://github.com/llvm/llvm-project/pull/222109
Commit: 75b218e7169e25e004391e879f3f41872f785df8
https://github.com/llvm/llvm-project/commit/75b218e7169e25e004391e879f3f41872f785df8
Author: thetruestblue <bblueconway at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/lit.cfg.py
Log Message:
-----------
[lit] Preload ASan runtime for ld64 tests on arm64 too (#227873)
get_asan_rtlib() only preloaded the runtime on x86 hosts. On arm64 this
silently skipped the preload, so ASan-instrumented libLTO.dylib aborts
when ld64 dlopen()s it.
rdar://188411900
Commit: 15cbda42e14b7aea32533183520df4f9eba1444c
https://github.com/llvm/llvm-project/commit/15cbda42e14b7aea32533183520df4f9eba1444c
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/ResolveImportedPathTest.cpp
Log Message:
-----------
[clang][Serialization] Fix latent bug in adjustFilenameForRelocatableAST (#227910)
This patch fixes a latent bug in `adjustFilenameForRelocatableAST`. It
relies on a null terminator, but `PreparePathForOutput` passes in a
`StringRef::data()` that has no null-terminator. Today this is benign as
nothing passes in a path that would hit the attempt at checking for a
null terminator, but future patches will.
The fix both makes the code safer by removing the C string usage, and
handles passing in the base path itself by representing it as `.` and
resolving that back to the (possibly relocated) base path on read.
No test on the writer part as it's not triggerable via an integration or
unit test.
Assisted-by: Claude Code: opus-5.5
Commit: af5f13accfaa1b568b6e77c13b053cac7a3c1f08
https://github.com/llvm/llvm-project/commit/af5f13accfaa1b568b6e77c13b053cac7a3c1f08
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFC][llvm-profdata] Introduce ProfdataError, makeError, and reportError (#228153)
Define ProfdataError, makeError, and reportError, and adapt
exitWithError and exitWithErrorCode to use reportError(makeError(...)).
This establishes the error infrastructure for propagating Error
up to main across incremental commits.
Assisted-by: Gemini
Commit: 07a68a0efe15ba15050b8dc71fb396be7b6059aa
https://github.com/llvm/llvm-project/commit/07a68a0efe15ba15050b8dc71fb396be7b6059aa
Author: Ambrose Leeb <aleeb at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Headers/__clang_cuda_builtin_vars.h
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
M clang/test/SemaCUDA/cuda-builtin-vars.cu
A llvm/test/Transforms/PhaseOrdering/nvptx-assume-special-register.ll
Log Message:
-----------
[CUDA] [Headers] Mark getters for `threadIdx` etc. as `const` (#228166)
The LLVM builtins these lower to are already effectively treated as
such, so this shouldn't cause any correctness issues. Adding this
attribute enables assumptions on these builtins; previously, such
assumptions would be discarded as Clang by default treats function calls
as having side-effects.
This patch also adds some optimiser tests to ensure assumptions
involving these builtins actually improve the resulting IR.
Tests were generated by Codex.
Fixes https://github.com/llvm/llvm-project/issues/181340.
Commit: 65c4536603fff8927228766057e594879bf70f9a
https://github.com/llvm/llvm-project/commit/65c4536603fff8927228766057e594879bf70f9a
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
Log Message:
-----------
[lldb] Remove unused method Platform::GetSDKDirectory (#227903)
Commit: 83f8ff5cb16573029caf5a39b02e8fa1b55c17dc
https://github.com/llvm/llvm-project/commit/83f8ff5cb16573029caf5a39b02e8fa1b55c17dc
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/select_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/select_mat-errors.hlsl
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/select_mat.ll
Log Message:
-----------
[Matrix] Implement matrix support for the `select` intrinsic (#227753)
Closes #184487.
This PR implements the matrix api for `select`, adds matrix codegen
tests, matrix sema tests, and SPIRV matrix backend tests. DirectX matrix
backend tests were not added because no DirectX backend changes were
made.
Assisted-by: Claude Opus 4.8
Commit: 6cb6a183150793de5d41894e879d82fd6e48dde7
https://github.com/llvm/llvm-project/commit/6cb6a183150793de5d41894e879d82fd6e48dde7
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[Matrix] Implement matrix support for the `select` intrinsic (#227753)
Closes #184487.
This PR implements the matrix api for `select`, adds matrix codegen
tests, matrix sema tests, and SPIRV matrix backend tests. DirectX matrix
backend tests were not added because no DirectX backend changes were
made.
Assisted-by: Claude Opus 4.8
Commit: fd0ffeea338eed99f799ce450cb744a9fab2b445
https://github.com/llvm/llvm-project/commit/fd0ffeea338eed99f799ce450cb744a9fab2b445
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
Log Message:
-----------
[flang] fix unused variable (NFC) (#227768)
Commit: 0319ac1a47d24b53c1f3da8b8bb26b931ef48d81
https://github.com/llvm/llvm-project/commit/0319ac1a47d24b53c1f3da8b8bb26b931ef48d81
Author: Mrgoudan <mrgoudan8888 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineInlineTests.cpp
Log Message:
-----------
[clangd] DefineInline: only trigger on the declaration that has the body (#227534)
The "Move function body to declaration" tweak (DefineInline) is offered on a redeclaration that follows the definition, and then fails when applied.
### Reproduction
```
printf 'void h(void) {}\nvoid h(void);\n' > /tmp/p3.c
clangd --check=/tmp/p3.c 2>&1 | grep -E 'DefineInline|All checks'
```
Before (also reproduces with clangd 17.0.6 and 19.1.7):
```
tweak: DefineInline ==> FAIL: Couldn't find semicolon for target declaration.
All checks completed, 1 errors
```
After:
```
All checks completed, 0 errors
```
### Cause
`DefineInline::prepare` guards on `Source->hasBody()`, which is true for
any declaration of a function that is defined anywhere in its redeclaration chain.
Selecting a redeclaration that comes after the definition therefore
passes the guard. `findTarget()` returns the canonical declaration, which in that order is the definition itself, so `Target != Source` and `prepare` succeeds.
`apply` then looks for a `;` after the definition's body and fails. The fix is to use `doesThisDeclarationHaveABody()`, which is true only for the declaration
that carries the body. The existing test only covered a prototype before the definition, where `Target == Source` masked the wrong guard; this adds the redeclaration-after-definition case.
Following review: also bail out when `Target` is itself a definition
(`isThisDeclarationADefinition()`, covering duplicated and deleted
definitions), and assert that `Source` has a body, since clangd disables
delayed template parsing for the main file.
This change was prepared with the assistance of an AI tool (Claude);
I have reviewed and tested it.
Commit: bd9847fdb7854e04dfbfe30d6d4e082baf641d71
https://github.com/llvm/llvm-project/commit/bd9847fdb7854e04dfbfe30d6d4e082baf641d71
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in order subcommand (#228154)
Change order_main to return Error and handle it with reportError
in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: 7e1eafc57669a23bc7d60afa14c90c9799ae7082
https://github.com/llvm/llvm-project/commit/7e1eafc57669a23bc7d60afa14c90c9799ae7082
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
A llvm/test/DebugInfo/AArch64/dbg-value-globaladdr-gisel.ll
A llvm/test/DebugInfo/ARM/dbg-value-globaladdr-rwpi.ll
A llvm/test/DebugInfo/COFF/globaladdr-codeview.ll
A llvm/test/DebugInfo/MIR/X86/globaladdr-mixed-locations.mir
A llvm/test/DebugInfo/MIR/X86/globaladdr-offset.mir
A llvm/test/DebugInfo/WebAssembly/dbg-value-globaladdr-pic.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr-rejected.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr.ll
A llvm/test/DebugInfo/X86/globaladdr-offset.ll
A llvm/test/DebugInfo/X86/globaladdr-tag-offset.ll
A llvm/test/DebugInfo/X86/got-equivalent.ll
A llvm/test/DebugInfo/X86/implicit-pointer-global.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
A llvm/test/DebugInfo/X86/variadic-global.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll
Log Message:
-----------
[DebugInfo] Support global addresses in variable locations (#218722)
This patch adds support for global address locations to SelectionDAG,
GlobalISel and AsmPrinter. The actual implementation is very similar to
how constants are being handled so most code changes are very
mechanical.
The motivation for adding global address support is the Swift compiler
and it is needed even in unoptimized code. For example, the standard
libary implements the empty array with a global "empty array storage"
singleton object, so it can show up as the location of array values.
Another very common use-case are references to type metadata, which is
also accessed via global symbols.
It is even possible to motivate this with a C exmple:
extern int g; int *p = &g;
also produces the dbg_value with a global value.
This patch adds an SDDbgOperand kind for a global address which gets
lowered to a MO_GlobalAddress DBG_VALUE operand, a DbgValueLocEntry, and
finally DW_OP_addrx/DW_OP_stack_value, similar to how global
DITemplateValueParameter are handled.
In AsmPrinter the address pool is preferred, its index is plain data
that both a DIE and the byte stream backing a location list can hold.
Before DWARF 5 the pool is only available under split DWARF, so fall
back to a relocated DW_OP_addr, which only a DIE can carry. Emit no
location at all when neither is possible.
Not handled are thread locals, which need DW_OP_form_tls_address,
dllimport, whose address requires a load from the import address table,
and ifuncs, whose symbol address is not the value of the pointer.
rdar://156549577
Assisted-by: Claude
Commit: c1baa612dd11cc3c3903b79a04902491d96f9d49
https://github.com/llvm/llvm-project/commit/c1baa612dd11cc3c3903b79a04902491d96f9d49
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/test/Instrumentation/SanitizerCoverage/interposable-symbol.ll
Log Message:
-----------
[SanitizerCoverage] Don't let noipa affect comdat selection (#228182)
On non-ELF targets, SanitizerCoverage only puts a function's coverage
arrays in a comdat if the function isn't interposable.
`isInterposable()`
also returns true for `noipa` function definitions by default, but
`noipa` doesn't affect linkage. Query
`isInterposable(/*CheckNoIPA=*/false)` so `noipa` functions get the same
comdat treatment as other functions with the same linkage.
This is one of a few refinements of noipa identified while working on
making optnone imply noipa - without these refinements,
optnone-implies-noipa, might substantially change clang -O0 codegen. I'm
open to discussing whether these refinements are the right direction,
though.
Assisted-By: Claude
Commit: 49f27c4141f4fccaa84e7f5d7950c15f150c2645
https://github.com/llvm/llvm-project/commit/49f27c4141f4fccaa84e7f5d7950c15f150c2645
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Add SRAMECC on/off mode capability (#225540)
Distinguish SRAMECC hardware support from selectable on/off modes,
mirroring XNACK. Preserve selectable modes on existing targets and use
the new capability for target-ID validation, defaults and printing,
module flags, and disassembly.
Commit: 7f1f916d4a27d2829eeeeabf09cdca64fa872330
https://github.com/llvm/llvm-project/commit/7f1f916d4a27d2829eeeeabf09cdca64fa872330
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisFP int SDNodeInfo::verifyNode. (#228260)
Assisted-by: Claude
Commit: 1524cec90a78ad6da741458ee6fdea4721894398
https://github.com/llvm/llvm-project/commit/1524cec90a78ad6da741458ee6fdea4721894398
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_version.cpp
Log Message:
-----------
[OpenMP][libomp] Cleanup OpenMP specification version information (#225427)
Make OpenMP specification version and date aligned with what is defined
in the CMake configuration.
Commit: 839d60d83cf92f6e0d2804bc00c08120f25fcc49
https://github.com/llvm/llvm-project/commit/839d60d83cf92f6e0d2804bc00c08120f25fcc49
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPConstructDecomposition.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/CodeGenOpenMP/target-parallel.c
Log Message:
-----------
[CIR][OpenMP] Add support for combined target parallel directives (#207019)
This patch adds support for handling combined target and parallel
directives. It also refactors the code so that the emission functions
can be easily combined to handle both the single and combine cases for
emitting directives.
Assisted-by: Cursor / claude-opus-4.8-medium
Commit: 72435d3cf2e601d53595715b42246b02d65f0966
https://github.com/llvm/llvm-project/commit/72435d3cf2e601d53595715b42246b02d65f0966
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
M clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
M clang/test/CIR/CodeGenCoroutines/coro-task.cpp
M clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/co-return.cir
R clang/test/CIR/IR/coro-body.cir
A clang/test/CIR/IR/coroutine.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/invalid-await.cir
M clang/test/CIR/IR/invalid-co-return.cir
R clang/test/CIR/IR/invalid-coro-body.cir
A clang/test/CIR/IR/invalid-coroutine.cir
M clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Add structured control flow for coroutine suspend points (#213191)
This PR adds 2 new ops for improving structured control flow in
coroutines, according to the redesign in this discussion:
https://github.com/llvm/llvm-project/pull/203802#discussion_r3464356343
One of the ops is `suspend_point`, which marks the point where a
coroutine should suspend and return control flow to the caller it's also
the point where the coroutine resumes from when it starts again. This op
must be inside the `cir.await` suspend region, and it works in pair with
the `CoroRetPoint` op, which marks the only exit point of the coroutine
so no matter how many awaits/suspend points exist in the body, they all
converge on the same exit path.
This will help the FlattenCFG pass know where to branch when flattening
the `cir.await` op. Previously we didn't have an exact point to branch
to when suspending a coroutine this gives us that.
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: c410892503e4ae39b336baee7cff21d1a159de73
https://github.com/llvm/llvm-project/commit/c410892503e4ae39b336baee7cff21d1a159de73
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in overlap subcommand (#228155)
Change overlap_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: 62a600b15deab177998f3c91afcf573de47dd9ea
https://github.com/llvm/llvm-project/commit/62a600b15deab177998f3c91afcf573de47dd9ea
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/tbl-loops.ll
Log Message:
-----------
[AArch64][GlobalISel] Add full reverse tbl loop test. NFC (#228276)
Add GISel test coverage whilst here too.
Commit: 15183167748a9a9f83d1dfbaaa942998490acf9d
https://github.com/llvm/llvm-project/commit/15183167748a9a9f83d1dfbaaa942998490acf9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in xor-and-or.ll (#228246)
c461d3cf5e8b9cd2e930d7a275ecdd485b6fcc29 previously attempted to fix
this, but was partially incorrect (propagation in
xor_logic_and_logic_or2_commuted picked up metadata from the wrong
select), and also partially incomplete. This patch fixes that by making
the conditions where we pull profile metadata simpler (now when the new
condition exactly matches a previous condition).
Commit: 7710aeb5bc1f7ad54dcc4b2a9826e0c67b60d5db
https://github.com/llvm/llvm-project/commit/7710aeb5bc1f7ad54dcc4b2a9826e0c67b60d5db
Author: Brad Smith <brad at comstyle.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M libunwind/src/Registers.hpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/ra_sign_state.pass.cpp
Log Message:
-----------
[compiler-rt][libunwind] Check elf_aux_info return value (#228190)
elf_aux_info() returns an errno value (0 on success) rather than -1
with errno set. Check the result and treat a failure as "no features
reported" instead of silently ignoring the error.
In compiler-rt, hwcap had no initializer, so a failed call left it
uninitialized. The libunwind users already started from zero, so the
change there only makes the error handling explicit.
Commit: 07b29f6b191014710ee357dd0ad64bdd3e586229
https://github.com/llvm/llvm-project/commit/07b29f6b191014710ee357dd0ad64bdd3e586229
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1524cec (#228273)
This fixes 1524cec90a78ad6da741458ee6fdea4721894398 (#225427).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1524cec90a78ad6da741458ee6fdea4721894398
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 42040049299b99c01fd841d0f123ffc7e5c13ac1
https://github.com/llvm/llvm-project/commit/42040049299b99c01fd841d0f123ffc7e5c13ac1
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: 21912d49dffb43588035dcb5b99558f93139ec60
https://github.com/llvm/llvm-project/commit/21912d49dffb43588035dcb5b99558f93139ec60
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: d4f6f06041126b3a343ddc21e6bacc19358cc022
https://github.com/llvm/llvm-project/commit/d4f6f06041126b3a343ddc21e6bacc19358cc022
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: 0791157af02871142368d001fd8c2c1fd2b3a2a6
https://github.com/llvm/llvm-project/commit/0791157af02871142368d001fd8c2c1fd2b3a2a6
Author: A. Jiang <de34 at live.cn>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
Log Message:
-----------
[libc++][test] Remove some `XFAIL` for LLVM libc in multi-threaded tests (#228036)
Recently, LLVM libc fixed https://llvm.org/PR194029 in
https://llvm.org/PR226134, so more libc++ tests passes with LLVM libc
now.
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 084db4ab7e3b3f32bf2c0a28ea4a0b1dc5a3651c
https://github.com/llvm/llvm-project/commit/084db4ab7e3b3f32bf2c0a28ea4a0b1dc5a3651c
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Remove unused `rules_android` dependency (#228174)
This dep appears to be unused. Though to note, it is still pulled in
through the `com_google_protobuf` dependency but there is no need to
explicitly pin it as a dependency to `llvm-project`
Commit: 56a27f76711691cb927cb4310531fc55db57b6f5
https://github.com/llvm/llvm-project/commit/56a27f76711691cb927cb4310531fc55db57b6f5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in show subcommand (#228156)
Change show_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: a9d345976e5ae9c67ba69f964843c82654606883
https://github.com/llvm/llvm-project/commit/a9d345976e5ae9c67ba69f964843c82654606883
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
Log Message:
-----------
[SandboxVectorizer] Add missing export to symbol used in test (#227879)
Commit: 41ae65c382010435be5c5187d0d214c497b90571
https://github.com/llvm/llvm-project/commit/41ae65c382010435be5c5187d0d214c497b90571
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Add missing export to symbol used in test (#227888)
Commit: 5c8e5ed14687b9b205ca90502976678302135b7f
https://github.com/llvm/llvm-project/commit/5c8e5ed14687b9b205ca90502976678302135b7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
A flang/test/Semantics/CUDA/cuf-device-data-host-read.cuf
Log Message:
-----------
[flang][cuda] Diagnose host reads of device data (#228271)
Host code may only use device data in a data transfer assignment or as
an
actual argument. When device data appeared anywhere else, such as in an
IF
condition, flang accepted it silently and lowered it to a plain host
load of
device memory:
subroutine s(h, a)
double precision :: h, a(10)
attributes(device) :: a
if (a(3) > 2.5d0) h = 1.0d0
end subroutine
The CUDA checker now emits an error when host code reads data with the
DEVICE or CONSTANT attribute in a scalar expression. These expressions
include IF and ELSE IF conditions, DO bounds, DO WHILE, SELECT CASE
selectors, STOP codes and allocate bounds.
Device data that is only designated is not read and is still accepted.
This
covers inquiry intrinsics (ALLOCATED, SIZE, LBOUND, ...), address
intrinsics
(LOC, C_LOC, C_DEVLOC), and variables passed as actual arguments.
Subscripts
of these designators are still checked, so f(d(n_dev)) is an error.
Managed and unified data are host accessible and are not diagnosed.
Device subprograms, CUF kernels and OpenACC compute constructs are
skipped.
Assignments keep their existing data transfer checks.
Commit: b55367c5102184b493edcde61fb2c7ec8a8e0f76
https://github.com/llvm/llvm-project/commit/b55367c5102184b493edcde61fb2c7ec8a8e0f76
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
A clang/test/CIR/CodeGenCUDA/global-addrspace-cast.cu
Log Message:
-----------
[CIR] Cast global addresses to their declared address space (#226649)
Opened to address a portion of
https://github.com/llvm/llvm-project/issues/226629
In CUDA, `__shared__ int sh` has type `int` but lives in AS 3. Classic
codegen casts the address to the declared type's AS where it's formed,
so users just see a generic pointer. We weren't doing that, so things
like `return &sh;` bitcast the slot instead, and NVPTX never got a
`cvta.shared`. This patch does the same cast in `getAddrOfGlobalVar` and
wherever static locals are fetched.
This also drops the comment claiming lowering would emit the cast for
us. That's only true for OpenCL, where the declared type already carries
the AS. LowerToLLVM never inserts casts on its own.
Assisted-by: Claude / Opus 5.5
Commit: 6c1d1068a26d789f0a7d0a4b40dc77189a0042ab
https://github.com/llvm/llvm-project/commit/6c1d1068a26d789f0a7d0a4b40dc77189a0042ab
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/get-member-addrspace.cpp
A clang/test/CIR/CodeGenHIP/inline-asm-multi-output-addrspace.hip
M clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
M clang/test/CIR/IR/invalid-struct.cir
Log Message:
-----------
[CIR] Propagate the record address space to get_member (#226650)
Addresses: https://github.com/llvm/llvm-project/issues/226629
A member lives in its record's address space, but a few `get_member`
builders always produced a default-AS pointer. On SPIR-V that's private,
so a SYCL kernel was reading its captured pointer through a private
pointer. This patch takes the AS from the base and adds a verifier check
so we catch any stragglers.
Assisted-by: Claude / Opus 5.5
Commit: b08cb38bd7bcacb1a740f2dd566eef19c2b9ae40
https://github.com/llvm/llvm-project/commit/b08cb38bd7bcacb1a740f2dd566eef19c2b9ae40
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-i64-sm20.ll
A llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-sub.ll
Log Message:
-----------
[AtomicExpand] Implement SUB → ADD(-x) and FSUB → FADD(-x) (#221425)
Implement ATOMIC_SUB → ATOMIC_ADD(-x) and ATOMIC_FSUB → ATOMIC_FADD(-x).
Many targets have atomic adds, but I don't think any have atomic subs.
This transform prevents cmpxchg expansion of atomic SUB. Enable these
transformations in NVPTX.
The integer variant exists in many different places currently. For
example, NVPTX currently expands it in DAG legalization.
begin AI generated
- SelectionDAG generic legalization:
[LegalizeDAG.cpp:3410](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp#L3410)
- GlobalISel generic legalization:
[LegalizerHelper.cpp:5117](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L5117)
- GlobalISel outlined-atomic libcall path, mapping SUB to negated
`LDADD`:
[LegalizerHelper.cpp:919](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L919)
and
[LegalizerHelper.cpp:973](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L973)
- X86 SelectionDAG, when the result is used:
[X86ISelLowering.cpp:33966](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/X86/X86ISelLowering.cpp#L33966)
- SystemZ i32/i64:
[SystemZISelLowering.cpp:5281](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp#L5281)
- SystemZ i8/i16, constant RHS only:
[SystemZISelLowering.cpp:5238](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp#L5238)
- BPF i32 and i64 instruction-selection patterns:
[BPFInstrInfo.td:1040](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/BPF/BPFInstrInfo.td#L1040)
and
[BPFInstrInfo.td:1062](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/BPF/BPFInstrInfo.td#L1062)
- LoongArch i8/i16 patterns:
[LoongArchInstrInfo.td:2314](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td#L2314)
- LoongArch i32/i64 patterns:
[LoongArchInstrInfo.td:2371](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td#L2371)
- AArch64 GlobalISel/LSE pattern:
[AArch64InstrAtomics.td:546](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AArch64/AArch64InstrAtomics.td#L546),
with the negating pattern machinery in
[AArch64InstrFormats.td:12625](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AArch64/AArch64InstrFormats.td#L12625)
- AMDGPU changes only `atomic sub 0` to `atomic add 0`:
[SIISelLowering.cpp:21345](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AMDGPU/SIISelLowering.cpp#L21345)
end AI generated
It looks like the only place that does the float transformation is
SPIRV:
begin AI generated
- SPIR-V converts `G_ATOMICRMW_FSUB` into `OpAtomicFAddEXT` with an
`OpFNegate`:
[SPIRVInstructionSelector.cpp:1413](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp#L1413),
with operand-negation machinery at
[SPIRVInstructionSelector.cpp:2614](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp#L2614)
end AI generated
I guess less targets have a native atomic fadd, but it looks like
Aarch64 and AMDGPU do, so this could be useful there.
AI assisted.
Commit: 79f415178fb162f390e8c4628001fb4b8ce3998b
https://github.com/llvm/llvm-project/commit/79f415178fb162f390e8c4628001fb4b8ce3998b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
R flang/test/Semantics/CUDA/cuf-device-data-host-read.cuf
Log Message:
-----------
Revert "[flang][cuda] Diagnose host reads of device data" (#228286)
Reverts llvm/llvm-project#228271
auto-merging was on by mistake
Commit: 52638665f52fa7254076d1acc9e1191c6fa1c0b3
https://github.com/llvm/llvm-project/commit/52638665f52fa7254076d1acc9e1191c6fa1c0b3
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
A clang/test/CIR/CodeGenHLSL/cxx-this-lvalue.hlsl
Log Message:
-----------
[CIR] Support CXXThisExpr in emitLValue (#227316)
Support `CXXThisExpr` in `CIRGenFunction::emitLValue` by wrapping
`loadCXXThisAddress()` into an LValue via `makeAddrLValue()`, matching
classic Clang codegen (`CGExpr.cpp:1865`).
This enables LValue contexts for `this`, such as member access
expressions via `this.field` in languages like HLSL where `this` is
reference-like.
Fixes #227193
Commit: d63124ff120577621c7a56a2bf1f47437cb3e9c7
https://github.com/llvm/llvm-project/commit/d63124ff120577621c7a56a2bf1f47437cb3e9c7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/CUDA/cuda-associate-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Look through associate names for managed and unified data (#228206)
IsCUDADeviceSymbol looks through an associate name: the name is device
data when its selector has device symbols. The managed and unified
predicates only handled object entities, so an associate name whose
selector is managed data was counted as device data that is not managed.
In host code, an element assignment such as
```
associate(px => g%x, py => g%y)
px%a(i,j) = r + px%s * real(py%n, 8)
end associate
```
where `a` and `y` are managed, was then classified as a data transfer.
This
emitted a `cuf.data_transfer` from a scalar value, which the verifier
rejects.
IsCUDADataAttrSymbol now gives an associate name the attribute of the
variable its selector designates. As in CollectEffectiveCudaSymbols, the
attribute of a component prevails over the one of its base.
IsCUDAManagedOrUnifiedSymbol is now built on it.
Commit: 20a018a6d9e13575b1aac2625e9db46b5da6676a
https://github.com/llvm/llvm-project/commit/20a018a6d9e13575b1aac2625e9db46b5da6676a
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Use `includes` for per-target lib/Target dirs to fix -Wmicrosoft-include (#228282)
This is a cleaner implementation to
https://github.com/llvm/llvm-project/pull/227867 which provides a more
accurate-to-cmake include path instead of silencing the error.
Commit: d661038374993004ac73b9f0eb483a2aac356174
https://github.com/llvm/llvm-project/commit/d661038374993004ac73b9f0eb483a2aac356174
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
M orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
A orc-rt/lib/bedrock/sys/windows/SocketHandle.cpp
Log Message:
-----------
[orc-rt] Updating socket handling on win to get it fully stubbed (#228038)
This also fixes a missing header.
Commit: 7df7d1e7c10c2c01d0b157fdf7bb3248e13a6370
https://github.com/llvm/llvm-project/commit/7df7d1e7c10c2c01d0b157fdf7bb3248e13a6370
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
M llvm/test/CodeGen/X86/data-section-prefix.ll
A llvm/test/CodeGen/X86/no-jt-prefix-sdp-disabled.ll
Log Message:
-----------
[StaticDataLayout] Only emit JT prefixes if enabled (#228222)
Previously we were unconditionally emitting section prefixes for jump
tables. This meant that even with SDP disabled, we would end up with a
.rodata.unlikely section. This is somewhat confusing and also makes
ablation experiments harder.
Commit: a3c098fec12330ec6fb7a352a56839ed9aeb082c
https://github.com/llvm/llvm-project/commit/a3c098fec12330ec6fb7a352a56839ed9aeb082c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in intrinsic-select.ll (#228295)
In these cases we're creating a new Select with the exact same
condition, so we can just copy the metadata.
Commit: 3fb83d789b3419da9d94e9e4bac065c9fdc482e7
https://github.com/llvm/llvm-project/commit/3fb83d789b3419da9d94e9e4bac065c9fdc482e7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in BootstrapInfoTest (#228305)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in BootstrapInfoTest.
Commit: 7b645c2ee1c9928f6cd7e7fa92cd432753f6a3af
https://github.com/llvm/llvm-project/commit/7b645c2ee1c9928f6cd7e7fa92cd432753f6a3af
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[mlir][xegpu] Block a convert_layout at a tile both layouts accept (#227892)
This PR makes `XeGPUBlockingPass::getTileShape` pick a
`convert_layout`'s tile per dimension instead of by total size.
Choosing by total size returns `inst_data = [8, 16]` over `[1, 64]`
because `128 >= 64`, leaving a 16-wide tile while the target needs
`lane_layout * lane_data = 16 * 4 = 64` columns. The blocked op is then
rejected as "invalid target layout, data cannot be evenly distributed".
Taking the larger `inst_data` per dim gives `[8, 64]`, which is valid
for both layouts since `inst_data` values are powers of two.
assisted-by-claude
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 14513d6afff0a81160f49ccac24e27b021aa4f5a
https://github.com/llvm/llvm-project/commit/14513d6afff0a81160f49ccac24e27b021aa4f5a
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/tools/clang-fuzzer/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/linalggen.bzl
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/tools/BUILD.bazel
Log Message:
-----------
[bazel] Replace various genrules with bazel_skylib rules (#228170)
Commit: a30a988cb67c9d1202e91985d3f8df1261f87df9
https://github.com/llvm/llvm-project/commit/a30a988cb67c9d1202e91985d3f8df1261f87df9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in ExecutorProcessInfoTest (#228307)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in ExecutorProcessInfoTest.
Commit: 7d6ff5b4e4419d505167416ba6ef199c6e35d4fb
https://github.com/llvm/llvm-project/commit/7d6ff5b4e4419d505167416ba6ef199c6e35d4fb
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M openmp/runtime/src/kmp_tasking.cpp
A openmp/runtime/test/tasking/omp_untied_task_cancel.c
A openmp/runtime/test/tasking/omp_untied_task_if0.c
A openmp/runtime/test/tasking/omp_untied_taskloop.f90
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
Commit: a0ebf45e62ddef239bbe824f3fb8485a19e7cd5d
https://github.com/llvm/llvm-project/commit/a0ebf45e62ddef239bbe824f3fb8485a19e7cd5d
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/MC/MCLFI.cpp
Log Message:
-----------
[MC] Fix MCLFI coding style. NFC (#228301)
Commit: d18bc2663bf587678450acc4f81ea4afc29f6e6b
https://github.com/llvm/llvm-project/commit/d18bc2663bf587678450acc4f81ea4afc29f6e6b
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
Log Message:
-----------
[orc-rt] Moving bootstrapinfo to make msvc++ happy (#228308)
Commit: 645790cb1740ab9ddac8e1a9168b49ca5cf4a420
https://github.com/llvm/llvm-project/commit/645790cb1740ab9ddac8e1a9168b49ca5cf4a420
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_offload.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
Log Message:
-----------
[compiler-rt] Add more common HSA utilities for memory and symbolization (#228297) (#228312)
Summary:
Adds memory pool management for different kinds of allocation. Intended
to be used for the in-progress concurrency sanitizer.
RFC:
discourse.llvm.org/t/rfc-a-thread-concurrency-sanitizer-for-gpus-in-compiler-rt/91113
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 6b122ae88eff63cc3e6ad3cd9a29a81faa6bb0dd
https://github.com/llvm/llvm-project/commit/6b122ae88eff63cc3e6ad3cd9a29a81faa6bb0dd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[compiler-rt] Add more common HSA utilities for memory and symbolization (#228297) (#228312)
Summary:
Adds memory pool management for different kinds of allocation. Intended
to be used for the in-progress concurrency sanitizer.
RFC:
discourse.llvm.org/t/rfc-a-thread-concurrency-sanitizer-for-gpus-in-compiler-rt/91113
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: a675e11f60838997749fe246646fc17aa44221de
https://github.com/llvm/llvm-project/commit/a675e11f60838997749fe246646fc17aa44221de
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/MCA/Support.h
M llvm/lib/MCA/InstrBuilder.cpp
Log Message:
-----------
[MCA] Explicitly instantiate and export template for unittest (#227893)
Commit: cddeb5505f748990cafd46eab11afe464571ea69
https://github.com/llvm/llvm-project/commit/cddeb5505f748990cafd46eab11afe464571ea69
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Initialize LLVM targets before parsing -mllvm (#228314)
readConfigs parses -mllvm before initLLVM initializes the targets, so an
option that a target registers at initialization (currently only Sparc
#227977)
is rejected as unknown.
Call initLLVM first, as the COFF, MachO, and wasm ports do. This will be
covered once a -mllvm used by lld/test/ELF/lto tests migrates.
Commit: 9f8331dfef1934581a6c342e879b3810d1187be8
https://github.com/llvm/llvm-project/commit/9f8331dfef1934581a6c342e879b3810d1187be8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in merge subcommand (#228157)
Change merge_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: f10d96f1ca662cf52d53558c4f0abce9b183d7a4
https://github.com/llvm/llvm-project/commit/f10d96f1ca662cf52d53558c4f0abce9b183d7a4
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[bazel] Replace various genrules with bazel_skylib rules (#228170)
Commit: 1aeecf7b46dc567da21e6d50f1a099a82c9e237d
https://github.com/llvm/llvm-project/commit/1aeecf7b46dc567da21e6d50f1a099a82c9e237d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unnecessary std::move call (#228083)
Commit: d6db026f11dfed121bde1820d443542adebdaad3
https://github.com/llvm/llvm-project/commit/d6db026f11dfed121bde1820d443542adebdaad3
Author: Haocong Lu <haoconglu at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
Log Message:
-----------
[CIR] Upstream missing support for floating point unary operator (#193215)
- Add Support for `__bf16/Float16/bfloat16/float128` scalar pre/post
increment and decrement.
- Add support for float vector increment and decrement, and add test
cases for both float vector and integer vector.
- Add test case for __bf16/Float16/bfloat16/double/long double/
float128 scalar unary operator with target `x86_64`.
- Part of task https://github.com/llvm/llvm-project/issues/192316
Commit: 5b5d81ca4a95f250488d9d164697a98096578e7f
https://github.com/llvm/llvm-project/commit/5b5d81ca4a95f250488d9d164697a98096578e7f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Skip `emitInitScope` for `EvalEmitter` (#228092)
The opcode ultimately doesn't do anything in `EvalEmitter`, so try to
skip it as early as possible.
Commit: 29e6b15d01aef1b82b6fc55c723c48b550585a41
https://github.com/llvm/llvm-project/commit/29e6b15d01aef1b82b6fc55c723c48b550585a41
Author: Jeewoong Kim <dnd414 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
A compiler-rt/test/msan/getaddrinfo-padding.cpp
M compiler-rt/test/msan/getaddrinfo-positive.cpp
A compiler-rt/test/sanitizer_common/TestCases/getaddrinfo.cpp
Log Message:
-----------
[compiler-rt][msan] Ignore addrinfo padding in getaddrinfo interceptor (#219124)
Avoid checking padding bytes in `struct addrinfo` in the `getaddrinfo`
interceptor.
The interceptor used a single `COMMON_INTERCEPTOR_READ_RANGE` for the
whole structure, which caused MSan to report uninitialized padding even
when all
named members were initialized.
Check each member separately instead.
Testing
- Added `getaddrinfo-padding.cpp` to cover the padding case
- Verified the new test fails before the fix and passes after the change
- Verified `getaddrinfo-positive.cpp` still reports uninitialized fields
- Ran `ninja -C build/runtimes/runtimes-bins check-msan` on AArch64
Linux
Fixes #162216
Commit: b6df24d6d08cfbfaef39c8c2cbd042d026a1cbc4
https://github.com/llvm/llvm-project/commit/b6df24d6d08cfbfaef39c8c2cbd042d026a1cbc4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in NativeDylibManagerTest (#228323)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in NativeDylibManagerTest.
Commit: 13c8c0505e6df4e3be7fad0efb16da18fb31e65b
https://github.com/llvm/llvm-project/commit/13c8c0505e6df4e3be7fad0efb16da18fb31e65b
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
[IRBuilder] Propagate fast-math flags to folding in CreateBinOpFMF (#227543)
Fast-math flags are used by InstSimplifyFolder, so we need to pass them
to the folding function in CreateBinOpFMF.
Commit: 56a012b96abbfd2d127068949130bda7663c7726
https://github.com/llvm/llvm-project/commit/56a012b96abbfd2d127068949130bda7663c7726
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/include/device.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/offloading/fortran/basic-target-parallel-do.f90
M offload/test/offloading/fortran/basic-target-parallel-reduction.f90
M offload/test/offloading/fortran/basic-target-teams-parallel-reduction.f90
M offload/test/offloading/fortran/default-mapper-nested-derived-type.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-nested-derived-type.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
M offload/test/offloading/fortran/explicit-and-implicit-record-field-mapping.f90
M offload/test/offloading/fortran/implicit-record-field-mapping.f90
M offload/test/offloading/fortran/target-custom-reduction-derivedtype.f90
M offload/test/offloading/fortran/target-no-loop.f90
M offload/test/offloading/fortran/target-parallel-do-collapse.f90
M offload/test/offloading/fortran/usm_derived_type_allocatable_member.f90
M offload/test/offloading/ompx_bare.c
M offload/test/offloading/ompx_bare_gridsize.c
M offload/test/offloading/ompx_bare_multi_dim.cpp
Log Message:
-----------
[offload][omp] Move strict threads & groups computation to libomptarget (#222607)
Move all computation related to strict threads and strict groups to
libomptarget as it's specific to OpenMP. This also removes all refrences
to ExecutionModes from the Plugin Interface.
With this, the data from the OpenMP kernel environment being used is
ReductionDataSize used to create the KLE, and maxNumThreads used by
RecordReplay. They're are purposely left for a future PR.
Assisted by Claude.
Commit: f6c78b8262f4849997ba8b6ec09a3061b874cd6c
https://github.com/llvm/llvm-project/commit/f6c78b8262f4849997ba8b6ec09a3061b874cd6c
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
A llvm/lib/MC/MCCLOptions.cpp
A llvm/lib/MC/MCCLOptions.h
A llvm/lib/MC/MCCLOptions.td
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/test/tools/llvm-mca/mc-schedule-options-help.test
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/unittests/Option/LibraryOpts.td
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[MC] Declare command line options in TableGen (#228321)
Move the cl::opts into MCCLOptions.td, except the -dx-* options, which
the DirectX backend reads and writes. The name avoids MCOptions, a
common variable name for MCTargetOptions.
New OptionsStruct member kinds replace cl:: features the port needs:
* OptionalBoolField, a std::optional<bool>, replaces cl::boolOrDefault
(-use-leb128-directives)
* EnumField replaces cl::values, showing its values as the -help-hidden
metavar
* DefaultOnOffField, an EnumField of std::optional<bool>, replaces the
file-local Default/Enable/Disable enum (-dwarf-extended-loc), which
DwarfDebug.cpp also defines for four options
Aided by Opus 5.5
Commit: 7ff7598d141bd55ddf7792710c1635bd3c1e842d
https://github.com/llvm/llvm-project/commit/7ff7598d141bd55ddf7792710c1635bd3c1e842d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SessionTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SessionTest (#228331)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SessionTest.
Commit: 0ff9f92868d6e5859d53ca601c097a64da3a140a
https://github.com/llvm/llvm-project/commit/0ff9f92868d6e5859d53ca601c097a64da3a140a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts (#228158)
[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts
Propagate Error from loadInput and mergeWriterContexts in
mergeInstrProfile,
supplementInstrProfile, and overlapInstrProfile. In mergeInstrProfile's
ThreadPool, catch errors from worker threads, stop scheduling new jobs,
and return the first encountered fatal error.
Ensure ~WriterContext() consumes any pending unhandled errors in
WriterContext::Errors upon destruction.
Not NFC as destructors are run on the stack and ThreadPool workers exit
earlier on error.
With all subcommands propagating llvm::Error to main, exitWithError,
exitWithErrorCode, and the LSan leak suppression workaround are no
longer needed.
Assisted-by: Gemini
Commit: 8c483601370e2b8fa8ddf4bdbf0a57eb6e9df6ac
https://github.com/llvm/llvm-project/commit/8c483601370e2b8fa8ddf4bdbf0a57eb6e9df6ac
Author: Haowei <haowei at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[Fuchsia] Escape ';' in STAGE2_ CMake variables (#228272)
When forwarding STAGE2_* variables to EXTRA_ARGS in Fuchsia.cmake and
Fuchsia-stage2-instrumented.cmake, semicolons in list values must be
replaced with '|' to match the LIST_SEPARATOR of ExternalProject_Add.
In 70cf616b331c, 'list(APPEND EXTRA_ARGS "-D${variableName}=...")' was
added using the raw '${${variableName}}' before replacing ';' with '|',
and Fuchsia-stage2-instrumented.cmake similarly omitted the ';' to '|'
replacement.
When a list variable like STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE contains
semicolon-separated '-D...' flags (such as CMAKE_EXE_LINKER_FLAGS),
appending it without escaping splits it into separate top-level CMake
arguments for stage2. Because STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE sorts
alphabetically after STAGE2_CMAKE_*_LINKER_FLAGS, its split flags
overwrite the stage2 linker flags with the stage0 toolchain's libc++.a,
causing stage2 link failures on macOS.
Commit: ee5435146cd1556b52219152f25c167819d4b6a1
https://github.com/llvm/llvm-project/commit/ee5435146cd1556b52219152f25c167819d4b6a1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/bedrock/SocketConnector.h
A orc-rt/include/orc-rt/bedrock/VettedPeer.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/VettedPeerTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
Log Message:
-----------
[orc-rt] Add VettedPeer, require it for the socket transport (#228336)
The controller at the other end of a channel can make the executor run
arbitrary code, so attaching to it is a trust decision.
VettedPeer<ChannelT> makes that decision explicit: it can only be made
through one of three named factories -- inherited, checked or unchecked
-- each naming the reason the peer is trusted.
createSimpleRemoteCAOverSocket now takes a VettedPeer<SocketHandle>
rather than a bare SocketHandle.
VettedPeer neither verifies nor records the reason. The factories exist
so that the decision can't be skipped by omission, and so that every
choice is visible in the source.
The socket:adopt connector trusts its socket as inherited, and documents
the resulting precondition on its callers.
Assisted-by: Claude
Commit: f0d14b73b1a586309483f81878d5c0e4d9c90cf7
https://github.com/llvm/llvm-project/commit/f0d14b73b1a586309483f81878d5c0e4d9c90cf7
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
A llvm/test/Analysis/CostModel/AMDGPU/cmp-select.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp.ll
A llvm/test/Analysis/CostModel/AMDGPU/select.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-cmp-select.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block-regpressure.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block.ll
Log Message:
-----------
[AMDGPU] Add getCmpSelInstrCost override to re-enable SimplifyCFG speculation for vector types (#208043)
Commit ["[CostModel] Handle all cost kinds in
getCmpSelInstrCost"](https://github.com/llvm/llvm-project/commit/0967957d7a94e1b5c749c6e963bdca25f3c6d749)
changed the base cost model to consider the type in the costs for
non-throughput cost kinds. This caused SimplifyCFG to stop folding
branches to selects on AMDGPU, since
vector selects now report higher costs that exceed the folding
threshold.
Add an getCmpSelInstrCost override for AMDGPU to partially restore the
old behavior by returning a constant unit cost for cost kind
`TCK_SizeAndLatency`. This affects speculative execution in SimplifyCFG
and SpeculativeExecution.
Commit: d950230a5d84c1654742963dc0d50fd94b11ab9d
https://github.com/llvm/llvm-project/commit/d950230a5d84c1654742963dc0d50fd94b11ab9d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
Log Message:
-----------
Revert "[ORC] Use __unw_add_dynamic_eh_frame_section/__unw_remove_dyn… (#227894)
…amic_eh_ frame_section in RegisterEHFrames.cpp (#212260)"
Revert commit d49626c811c304c047e028a80cedc0d377f49dfb due to link
failures on some platforms (see discussion in PR).
Commit: 63ba94451e85805bb5f3972d6b880ba4a9c287c4
https://github.com/llvm/llvm-project/commit/63ba94451e85805bb5f3972d6b880ba4a9c287c4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleNativeMemoryMapTest (#228335)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleNativeMemoryMapTest.
Commit: d3e9891b54da54deebe2a6df0eb67c8ec155fa65
https://github.com/llvm/llvm-project/commit/d3e9891b54da54deebe2a6df0eb67c8ec155fa65
Author: Jonas Rembser <jonas.rembser at cern.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/test/Interpreter/pretty-print.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Evaluate a void expression that has no trailing semicolon (#228334)
An expression statement without a semicolon at the end of an input is
replaced by a call to `__clang_Interpreter_SetValueNoAlloc` that
captures its value. For an expression of type `void`, the expression was
not an argument of that call and was dropped, so `f()` did not call `f`.
Build `(E, __clang_Interpreter_SetValueNoAlloc(...))` instead.
Fixes #219800.
Assisted-by: Claude Opus 5.5
Commit: 2901c5a52989f19e4691b027c0393b109c465dda
https://github.com/llvm/llvm-project/commit/2901c5a52989f19e4691b027c0393b109c465dda
Author: tinfengyu <1768309929 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
A llvm/test/CodeGen/RISCV/redundant-copy-elim-reg-imm.mir
M llvm/test/CodeGen/RISCV/redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xandesperf-redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
Log Message:
-----------
[RISCV] Eliminate redundant materializations after register comparison (#227673)
`RISCVRedundantCopyElimination` can eliminate redundant immediate
materializations when a branch establishes a known immediate value, but
does not handle register-register `BEQ`/`BNE` when one operand is a
non-zero immediate materialized in a register.
Extend the pass to recognize `ADDI` from `X0` and `QC_LI`
materializations before the branch. On the equality edge, reuse that
known immediate so an identical materialization in the successor can be
removed. `X0` is excluded as a target register because writes to it are
discarded.
Tests cover `BEQ`/`BNE`, both operand orders, clobbers, `X0`, RV32/RV64,
and the relevant Xqci and XAndes variants.
AI tool usage: OpenAI Codex assisted with this contribution. I reviewed
and take responsibility for the final changes.
Assisted-by: OpenAI Codex
Commit: c8344578d8a862527f165c8b348f1e50b6bd25c0
https://github.com/llvm/llvm-project/commit/c8344578d8a862527f165c8b348f1e50b6bd25c0
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Target/ThreadPlanStepOut.cpp
A lldb/test/API/functionalities/thread/step_out_inline/Makefile
A lldb/test/API/functionalities/thread/step_out_inline/TestThreadStepOutInline.py
A lldb/test/API/functionalities/thread/step_out_inline/main.c
Log Message:
-----------
[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)
To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.
In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.
For example, consider this backtrace:
```
frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]
```
This patch changes behavior as follows:
```
command before after
frame select 1; finish level3 line 12, no stop reason level2 line 21, step out
frame select 2; finish level3 line 12, no stop reason level1 line 29, step out
```
Commit: fb21c4495786f11f3a0abeb14836da97c9411b92
https://github.com/llvm/llvm-project/commit/fb21c4495786f11f3a0abeb14836da97c9411b92
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)
To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.
In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.
For example, consider this backtrace:
```
frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]
```
This patch changes behavior as follows:
```
command before after
frame select 1; finish level3 line 12, no stop reason level2 line 21, step out
frame select 2; finish level3 line 12, no stop reason level1 line 29, step out
```
Commit: 4172fa0b4fe78c5416d3ab1713c9e1327ed623b0
https://github.com/llvm/llvm-project/commit/4172fa0b4fe78c5416d3ab1713c9e1327ed623b0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleSymbolTableTest (#228343)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleSymbolTableTest.
The isA<StringError>() checks become Failed<StringError>(), with the
message checks folded in as a Property matcher on StringError::toString
so that both the type and the message are still verified.
Commit: 6818493add44f540191095c67a84b14add591d1c
https://github.com/llvm/llvm-project/commit/6818493add44f540191095c67a84b14add591d1c
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
Log Message:
-----------
[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
Commit: 298d3ac7533414b285be30b903f767038073289b
https://github.com/llvm/llvm-project/commit/298d3ac7533414b285be30b903f767038073289b
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/python/python-typemaps.swig
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
M lldb/test/API/python_api/process/read-mem-cstring/main.c
Log Message:
-----------
[lldb] Decode debuggee bytes to Python str with "replace" (#224010)
Reading a C string that is not valid UTF-8 raises `SystemError`, even
though
the read succeeded and the `SBError` reports success:
```
(lldb) script
>>> process.ReadCStringFromMemory(addr, 2048, lldb.SBError())
SystemError: <built-in function SBProcess_ReadCStringFromMemory> returned
NULL without setting an exception
```
The `argout` typemap built the result with `PythonString`, which
requires
valid UTF-8. On failure `PythonString::SetString` consumes the error,
and
`PythonException`'s constructor has already called `PyErr_Clear()`, so
the
typemap returns `nullptr` with no exception set.
Bytes read out of a debuggee are arbitrary, so decode them with the
"replace" error handler: undecodable bytes become U+FFFD instead of
failing.
Valid UTF-8 decodes as before. "surrogateescape" would keep the bytes
exactly
but raises `UnicodeEncodeError` when printed, which only moves the
failure.
This also covers `GetSTDOUT`, `GetSTDERR` and `GetAsyncProfileData`,
which
share the typemap, and the sibling typemap used by `SBFileSpec::GetPath`
and
`SBThread::GetStopDescription`, where a path or a target-supplied thread
name
is likewise not guaranteed to be UTF-8.
Assisted-by: claude
Commit: 7a0d631ecdae36abbf7af8de02fa631c03c2100e
https://github.com/llvm/llvm-project/commit/7a0d631ecdae36abbf7af8de02fa631c03c2100e
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/callees-metadata-escape.ll
Log Message:
-----------
[Attributor] Treat a use by an externally visible global as an escape (#228283)
AAGlobalValueInfo collects the in-module uses of a local function, and
AAIndirectCallInfo uses them to drop !callees targets whose address
cannot reach the call. It follows uses through global initializers
without checking whether the global is visible outside the module, so it
misses an address that escapes that way.
For an internal function whose address is stored in an external global
and that is called through a pointer argument, the Attributor drops the
only !callees target and replaces the call with unreachable. This
happens in the module pass, in the CGSCC pass when the function and the
caller are in one SCC, and in OpenMPOpt, which runs the Attributor on
OpenMP device code at -O1 and above.
Treat a use by a global without local linkage as an escape unless the
module is a closed world.
Commit: e895b5c5078a79d131911851aa2e0720c0101948
https://github.com/llvm/llvm-project/commit/e895b5c5078a79d131911851aa2e0720c0101948
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in CallSPSCITest (#228353)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in CallSPSCITest.
Commit: ce4bf0febce9ae3d039aa8a229f71b52c35ee9b4
https://github.com/llvm/llvm-project/commit/ce4bf0febce9ae3d039aa8a229f71b52c35ee9b4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Use integer VT for second argument of X86ISD::VPERMILPV in combineConcatVectorOps. (#228257)
Found by adding SDTCisInt support to verifySDNode
Assisted-by: Claude
Commit: cc2227d7899c0c8b30615e9b4c03e839a6b17c3e
https://github.com/llvm/llvm-project/commit/cc2227d7899c0c8b30615e9b4c03e839a6b17c3e
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
Log Message:
-----------
[AMDGPU] Remove unused prefix from branch relaxation test (#228344)
This was added spuriously in #175644.
Commit: 45000a516a6e331f8be46076bc6f1310201fb28b
https://github.com/llvm/llvm-project/commit/45000a516a6e331f8be46076bc6f1310201fb28b
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
Commit: 4c53405cace11d69e1f9870ca51626f366aa3110
https://github.com/llvm/llvm-project/commit/4c53405cace11d69e1f9870ca51626f366aa3110
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
Log Message:
-----------
[AMDGPU] Generalize deletion of redundant s_or_b32 of a 64-bit select (#228034)
When deleting s_or_b32 of the two halves of a 64-bit S_CSELECT, use
getSelectConstants instead of foldableSelect. This handles materialized
constants, and a select whose true value is 0 by inverting the SCC uses.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 9bb435a68b4e38983589da22fd2ff16e12532431
https://github.com/llvm/llvm-project/commit/9bb435a68b4e38983589da22fd2ff16e12532431
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/bindings/ocaml/executionengine/executionengine_ocaml.c
M llvm/bindings/ocaml/executionengine/llvm_executionengine.ml
M llvm/bindings/ocaml/executionengine/llvm_executionengine.mli
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/bindings/ocaml/target/llvm_target.ml
M llvm/bindings/ocaml/target/llvm_target.mli
M llvm/bindings/ocaml/target/target_ocaml.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/lib/IR/Core.cpp
M llvm/lib/Target/Target.cpp
M llvm/test/Bindings/OCaml/debuginfo.ml
M llvm/tools/llvm-c-test/targets.c
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/Passes/PassBuilderBindings/PassBuilderBindingsTest.cpp
M llvm/unittests/Target/TargetMachineOptionsTest.cpp
Log Message:
-----------
[llvm-c][ocaml] Move DataLayout bindings from Target to Core/IR (#227714)
DataLayout is part of IR (or "Core" in C API terminology), so bindings
for it should be defined there as well. They were part of Target for
historical reasons.
This is to avoid any layering issues with referencing DataLayout from IR
APIs.
Commit: db412aa8e5c7e056a106a3c414cb0b55d1868c40
https://github.com/llvm/llvm-project/commit/db412aa8e5c7e056a106a3c414cb0b55d1868c40
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
Log Message:
-----------
[Mips] Convert index to pointer type in lowerMSACopyIntr. (#228332)
The MipsISD::VEXTRACT_[SZ]EXT_ELT nodes expect a pointer sized index.
Found while trying to implement SDTCisPtrTy checking in verifySDNode.
Commit: 02ff559ee5e609df42ddd4422951b6fcddcd2140
https://github.com/llvm/llvm-project/commit/02ff559ee5e609df42ddd4422951b6fcddcd2140
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
Log Message:
-----------
[PowerPC] Correct the SDTypeProfile for VECSHL and FP_EXTEND_HALF. (#228341)
These used SDTCisPtrTy, but the operand is always created with i32 type.
Commit: bcaabf1ca733fc6b517905765eea2cdb60d7804e
https://github.com/llvm/llvm-project/commit/bcaabf1ca733fc6b517905765eea2cdb60d7804e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
Log Message:
-----------
[NFC][SPIR-V] Fix more CHECK lines that never fire in tests (#227962)
Follow-up to #227332
FileCheck ignores these lines, so the behavior they describe was
untested
- Typo `-NO:`, `-:`, `ACHECK:` and `OpCabilitity` (discard.ll,
inline_asm.ll, intel-usm-addrspaces.ll, merge-exit-break.ll,
SPV_KHR_bit_instructions.ll)
- Invalid directive `CHECK-4` (fp-simple-hierarchy.ll)
- Prefix no RUN line enables (cl_intel_sub_groups.ll,
cl_intel_subgroup_local_block_io.ll, negative.ll)
Commit: 2985550b8f5eb9f32376b3ae7fcfa37068f5f83a
https://github.com/llvm/llvm-project/commit/2985550b8f5eb9f32376b3ae7fcfa37068f5f83a
Author: Jonas Rembser <jonas.rembser at cern.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[clang-repl] Don't check printf output order in pretty-print.cpp (#228349)
The test added in #228334 checked the output of a JIT'd printf() with
CHECK-NEXT between lines that clang-repl prints itself. The C runtime
buffers the JIT'd code's stdout separately, so the order is not
guaranteed: on llvm-clang-x86_64-sie-win, "foo()" came after all of
clang-repl's output.
Remove that case. The case before it already checks that a void call
without a semicolon is executed (through the value of a variable it
sets), and so does the unit test ValueOfVoidCallExecutesTheCall.
Assisted-by: Claude Opus 5.5
Follows up on #228334, which introduced failures on Windows:
```
The Buildbot has detected a new failure on builder llvm-clang-x86_64-sie-win while building clang.
Full details are available at:
https://lab.llvm.org/buildbot/#/builders/46/builds/42212
Worker for this Build: sie-win-worker
Blamelist:
Frederik Harwath [<frederik.harwath at amd.com>](mailto:frederik.harwath at amd.com),
Jonas Rembser [<jonas.rembser at cern.ch>](mailto:jonas.rembser at cern.ch),
Lang Hames [<lhames at gmail.com>](mailto:lhames at gmail.com)
BUILD FAILED: failed test (failure)
Step 7 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'Clang :: Interpreter/pretty-print.cpp' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
# RUN: at line 1
z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe "int i = 10;" 'extern "C" int printf(const char*,...);' 'auto r1 = printf("i = %d\n", i);' | z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe --check-prefix=CHECK-DRIVER Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe' 'int i = 10;' 'extern "C" int printf(const char*,...);' 'auto r1 = printf("i = %d\n", i);'
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe' --check-prefix=CHECK-DRIVER 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# note: command had no output on stdout or stderr
# RUN: at line 6
cat Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp | z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe -Xcc -std=c++11 -Xcc -fno-delayed-template-parsing | z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# executed command: cat 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe' -Xcc -std=c++11 -Xcc -fno-delayed-template-parsing
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe' 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# .---command stderr------------
# | [1mZ:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp:101:16: [0m[0;1;31merror: [0m[1mCHECK-NEXT: is not on the line after the previous match
[0m# | [1m[0m// CHECK-NEXT: foo()
# | [0;1;32m ^
[0m# | [0;1;32m[0m[1m<stdin>:25:1: [0m[0;1;30mnote: [0m[1m'next' match was here
[0m# | [1m[0mfoo()
# | [0;1;32m^
[0m# | [0;1;32m[0m[1m<stdin>:23:10: [0m[0;1;30mnote: [0m[1mprevious match ended here
[0m# | [1m[0m(int) 100
# | [0;1;32m ^
[0m# | [0;1;32m[0m[1m<stdin>:24:1: [0m[0;1;30mnote: [0m[1mnon-matching line after previous match is here
[0m# | [1m[0mclang-repl> clang-repl... clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-re
pl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl>
# | [0;1;32m^
[0m# | [0;1;32m[0m
# | Input file: <stdin>
# | Check file: Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# |
# | -dump-input=help explains the following input dump.
# |
# | Input was:
# | <<<<<<
# | [1m[0m[0;1;90m 1: [0m[1m[0;1;46m[0m(const char[3]) "ab"[0;1;46m [0m
# | [0;1;32mcheck:10 ^~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 2: [0m[1m[0;1;46m[0m(int) 123456[0;1;46m [0m
# | [0;1;32mnext:13 ^~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 3: [0m[1m[0;1;46m[0m(char[2]) { '1', 'a' }[0;1;46m [0m
# | [0;1;32mnext:16 ^~~~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 4: [0m[1m[0;1;46m[0m(char[3]) "1a"[0;1;46m [0m
# | [0;1;32mnext:19 ^~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 5: [0m[1m[0;1;46m[0m(char[2][3][1]) { { { 'a' }, { 'b' }, { 'c' } }, { { 'd' }, { 'e' }, { 'f' } } }[0;1;46m [0m
# | [0;1;32mcheck:22 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 6: [0m[1m[0;1;46m[0m(S3) @0x1cf15f38540[0;1;46m [0m
...
Sincerely,
LLVM Buildbot
```
Commit: 69212dda8d0ebdcecd3f2ff034e1ae553f4ac9db
https://github.com/llvm/llvm-project/commit/69212dda8d0ebdcecd3f2ff034e1ae553f4ac9db
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_expand_load.ll
Log Message:
-----------
[AArch64] Adjust costs for masked CompressStore and ExpandLoad (#226950)
Currently, costs for the `llvm.expand.compressstore` and
`llvm.masked.expandload` are costs simply at 2 x the type legalization
cost. However, this does not properly represent the instructions that
are generated for these intrinsics.
The costs have been adjusted to better represent the cost of using these
intrinsics with SVE Instructions.
Commit: b31aad9bf7a8d9a50d65b0dc3be02146bf8dbb7a
https://github.com/llvm/llvm-project/commit/b31aad9bf7a8d9a50d65b0dc3be02146bf8dbb7a
Author: Mitch Briles <mitchbriles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
A llvm/test/CodeGen/AArch64/arm64_32-mops.ll
M llvm/test/CodeGen/AArch64/func-argpassing.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memmove.ll
A llvm/test/CodeGen/RISCV/memset.ll
Log Message:
-----------
[SelectionDAG] zext/trunc size of memory libcalls to target pointer size (#226672)
Fixes #226666
For `memcpy`, `memmove`, and `memset`, the value for the number of bytes
for the operation ("Size") used the type of the intrinsic. When the type
of Size was narrower than that of the "length" parameter of the libcall,
the value would be widened with ANY_EXTEND. On RISC-V, this can
materialize as a sign extension, which leads to writing `2^33` times as
many bytes.
Changes
- Zero-extends or truncates the Size to the target pointer width (Note
that GISel already does this correctly).
- Added new RISC-V/AArch64 tests, and updated existing ones.
Note that this also fixed an AArch64 crash. With `-mattr=+mops`, SD
crashed with any non-constant i32 length argument to one of these
libcalls with "unimplemented reg-to-reg copy"
Commit: 82cb0c273118a1d57378b71a133d3f33398de164
https://github.com/llvm/llvm-project/commit/82cb0c273118a1d57378b71a133d3f33398de164
Author: Artem Chikin <achikin at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.apinotes
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.h
M clang/test/APINotes/Inputs/Headers/ExportAs.apinotes
A clang/test/APINotes/Inputs/Headers/ExportAsCore.apinotes
M clang/test/APINotes/Inputs/Headers/ExportAsCore.h
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.apinotes
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
M clang/test/APINotes/properties.m
A clang/test/APINotes/slice-groups-exact.c
A clang/test/APINotes/slice-groups-order.c
A clang/test/APINotes/slice-groups.c
M clang/test/APINotes/versioned-version-independent.m
M clang/test/APINotes/versioned.m
Log Message:
-----------
[APINotes][Unversioned] Capture presence of versioned slices separately, and track different slice groups (#224860)
## Group versioned slices by lookup
Under `-fswift-version-independent-apinotes`, Clang attaches every
APINotes slice unapplied, wrapped in `SwiftVersionedAdditionAttr` or
`SwiftVersionedRemovalAttr`, and leaves the version selection to the
client. To redo that selection the client has to know which slices
compete with each other across different APINote lookups, and nothing in
the attributes said so.
The slices a client must choose between are the ones a single *lookup*
produced, not the ones a single APINotes reader supplied. Sema runs
selection once per lookup and applies every winner, and there can be
more than one lookup for the same declaration against the same reader. A
global function with a `Where:` parameter selector gets two: the broad
lookup, and the exact one.
For example, consider module `Bar`:
```
Name: Bar
Functions:
- Name: overloaded
SwiftName: 'broadBase()' # the broad lookup, unversioned
- Name: overloaded
Where:
Parameters:
- int
SwiftName: 'exactBase(_:)' # the exact lookup, unversioned
SwiftVersions:
- Version: 4
Functions:
- Name: overloaded
SwiftName: 'broadFour()' # the broad lookup, 4.0 slice
```
Each lookup selects its own winner and both are applied, so a client at
version 3.0 must end up with `broadFour()` from the broad lookup and
`exactBase(_:)` from the exact one.
If the two lookups were labelled with the reader they share, the client
would instead reconstruct one competition:
- Unversioned: `SwiftNameAttr "broadBase()"`
- Unversioned: `SwiftNameAttr "exactBase(_:)"`
- 4.0: `SwiftNameAttr "broadFour()"`
and select a single winner, dropping one of the two lookups entirely.
Instead, this change makes the attributes carry a slice group. One group
is one lookup: a second reader is a different lookup, and so is a
parameter selector query beside a broad one.
Sema applies each group's winner in turn, and when two winners set the
same key the last one applied owns it, so the order the groups were
applied in is part of what a consumer has to reproduce. Both facts were
previously implicit in Sema's control flow and discarded, because legacy
mode selected in-process and only the winner survived onto the
declaration.
The slice group numbering interleaves the two lookups per reader, giving
reader `i` the groups `2 * i` and `2 * i + 1`, so ascending group order
is application order. Numbering all the broad lookups before all the
selector lookups would instead apply them in the order 0, 2, 1, 3, and a
consumer sorting on the ordinal would pick the wrong winner.
## Capture presence of versioned slices separately
In addition to aggregating attributes with `SwiftVersionedAdditionAttr`
and `SwiftVersionedRemovalAttr`, we may need to also capture that an
APINotes file contained a versioned slice which may not have captured
any keyed attributes.
For example:
```
Name: Bar
Functions:
- Name: foo
SwiftName: 'fooBase()' # unversioned
SwiftVersions:
- Version: 4
Functions:
- Name: foo
SwiftName: 'fooFour()' # the 4.0 slice
- Version: 5
Functions:
- Name: foo
SwiftPrivate: true # the 5.0 slice
```
When picking which attributes/notes to apply, the algorithm is to select
from the lowest version slice at or above the client requested one, or
the unversioned slice otherwise. Suppose we have a client at version 3.
In this case, the client will have reconstructed the attributes as 3
options:
- Unversioned: `SwiftNameAttr "fooBase()"`
- 4.0: `SwiftNameAttr "fooFour()"`
- 5.0: `SwiftPrivateAttr`
According to the algorithm, slice 4 would win, so `foo` would get a name
`fooFour()` and **not** be private.
Now suppose there is instead a versioned slice which carries no keyed
attributes:
```
SwiftVersions:
- Version: 4
Functions:
- Name: foo # declared, no keys
```
With this slice, the client would have reconstructed just two
versioned-attribute options:
- Unversioned: `SwiftNameAttr "fooBase()"`
- 5.0: `SwiftPrivateAttr`
And according to the algorithm selected 5 and marked `foo` as private.
This is incorrect because the presence of the 4.0 slice still means that
it is the one that must be selected for this declaration.
This change adds a new (no spelling) attribute called
`SwiftVersionedSliceAttr` to capture existence of all versioned slices,
which the clients will then use to know which slice version to select
for a given declaration. It carries the same slice group as the addition
and removal wrappers, so a client groups it into the same competition as
its siblings.
Commit: 2e686411fa67e889c5ab4911bb690f63d4cdeb02
https://github.com/llvm/llvm-project/commit/2e686411fa67e889c5ab4911bb690f63d4cdeb02
Author: Artem Gindinson <gindinson at roofline.ai>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Utils/Utils.cpp
R mlir/test/Dialect/GPU/all-reduce-maxf.mlir
A mlir/test/Dialect/GPU/all-reduce-min-max.mlir
A mlir/test/Dialect/GPU/all-reduce-minimum-maximum.mlir
A mlir/test/Dialect/GPU/all-reduce-minimumnum-maximumnum.mlir
M mlir/test/Dialect/GPU/invalid.mlir
Log Message:
-----------
[mlir][gpu] Support `minimumnumf` and `maximumnumf` in GPU dialect (#226903)
Follow up on #221658. Add mirroring GPU reduction kinds and lower to
Arith/LLVM by mapping onto the vector combining kinds already in place.
Additionally, expand the LIT tests for all min/max kinds and include
vector test cases with `subgroup_reduce`.
Assisted-by: Codex
Commit: f7a4eb3216929c670c2d861098ad0b4cf5b86812
https://github.com/llvm/llvm-project/commit/f7a4eb3216929c670c2d861098ad0b4cf5b86812
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
Log Message:
-----------
[LV] Reject outer loops without integer induction. (#228137)
Bail out if we did not find any induction and WidestIndTy is null.
Otherwise we would crash.
Commit: 455f8ba10a9f1d2e6cede13b8c08bdfcd2de6fc5
https://github.com/llvm/llvm-project/commit/455f8ba10a9f1d2e6cede13b8c08bdfcd2de6fc5
Author: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDowngrade1p1To1p0.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/tosa-downgrade-1-1-to-1-0.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-valid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Support variadic batch dimensions in matmul ops (#226179)
Allow tosa.matmul and tosa.matmul_t operands and results to have rank
two or greater. Infer and verify right aligned broadcasting across their
leading batch dimensions.
Preserve TOSA 1.0 compatibility through target validation and restrict
the 1.1-to-1.0 downgrade to supported rank 3 cases. Extend level, shape
inference, verifier, validation, and downgrade coverage.
---------
Signed-off-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Commit: 128be64f5bfc34c85c6cd0eb9754377e2426aec2
https://github.com/llvm/llvm-project/commit/128be64f5bfc34c85c6cd0eb9754377e2426aec2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
M llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
Log Message:
-----------
X86: Mark the tile register defs of PLDTILECFGV dead (#228361)
ldtilecfg invalidates all tile registers, which the pseudo models by
listing them in Defs. Nothing reads them from the configuration
instruction itself, so mark them dead where the pseudo is built instead
of leaving it to be re-inferred.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: fdd70a3a97384c4e53dd1c83f369e774ca5722c3
https://github.com/llvm/llvm-project/commit/fdd70a3a97384c4e53dd1c83f369e774ca5722c3
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[docs] Reflect C++'s read-write and write-read coherence rules in the LLVM memory model (#217849)
Currently, the LLVM IR memory model as written allows behaviors of monotonic
atomic operations that violate C++'s [read-write](https://eel.is/c++draft/basic.exec#intro.races-13) and [write-read](https://eel.is/c++draft/basic.exec#intro.races-14) coherence rules.
This PR adds similar rules to the definition of the monotonic memory ordering
to make monotonic atomics behave more like C++'s relaxed atomics.
Without this, translating C++'s relaxed atomics into LLVM's monotonic atomics
is technically incorrect.
Example litmus tests:
1: read-write coherence
```
; thread 0
store atomic i32 1, ptr %p monotonic ; S1
; thread 1
%l0 = load atomic i32, ptr %p monotonic ; L0
store atomic i32 2, ptr %p monotonic ; S2
; thread 2
%l1 = load atomic i32, ptr %p monotonic ; L1
%l2 = load atomic i32, ptr %p monotonic ; L2
```
Here, C++'s [read-write coherence](https://eel.is/c++draft/basic.exec#intro.races-13) rule says that
the execution where `%l0 = 1; %l1 = 2; %l2 = 1` is not allowed (L0
happens-before S2, therefore L0 must read from a store before S2 in the
modification order. If L0 reads 1 from S1, S1 must therefore be before S2 in the
modification order, so the happens-before-ordered loads L1, L2 can't read them
in the opposite order due to read-read coherence.) So far, there is nothing
ruling out this execution in the LLVM memory model.
2: write-read coherence
```
; thread 0
store atomic i32 1, ptr %p monotonic ; S1
; thread 1
store atomic i32 2, ptr %p monotonic ; S2
%l0 = load atomic i32, ptr %p monotonic ; L0
; thread 2
%l1 = load atomic i32, ptr %p monotonic ; L1
%l2 = load atomic i32, ptr %p monotonic ; L2
```
Here, C++'s [write-read coherence](https://eel.is/c++draft/basic.exec#intro.races-14) rule says that
the execution where `%l0 = 1; %l1 = 1; %l2 = 2` is not allowed (S2
happens-before L0, therefore L0 must read from S2 or a later store in the
modification order. If L0 reads 1 from S1, S1 must therefore be after S2 in the
modification order, so the happens-before-ordered loads L1, L2 can't read them
in the opposite order due to read-read coherence.) So far, there is nothing
ruling out this execution in the LLVM memory model, either.
The read-read coherence constraint already existed in the LangRef, I've grouped
it together with the new constraints to improve readability.
Write-write coherence is implied by the earlier "All modification orders must be
compatible with the happens-before order." constraint but is still included in
the list explicitly for clarity.
Related change in our formal memory model: https://github.com/ROCm/formal-models/pull/3
Commit: 63dd4ca76b33e54be07fc45983395e5428a29a87
https://github.com/llvm/llvm-project/commit/63dd4ca76b33e54be07fc45983395e5428a29a87
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/fold-and-exec-wave32.mir
A llvm/test/CodeGen/AMDGPU/fold-and-exec.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy_const_compare.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-inside-divergent-cfg.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Fold away S_AND of a lane mask with EXEC (#227729)
Instruction selection inserts an S_AND with EXEC on branch conditions
unconditionally, because it has not analysed what produced the lane
mask: see the AndExec handling in AMDGPUDAGToDAGISel::SelectBRCOND and
the S_CBRANCH_SCC* case of SIInstrInfo::moveToVALU. The result of a
V_CMP already has 0 in the bits of all inactive lanes, so the AND is
redundant.
SIPreEmitPeephole::optimizeVccBranch already removes some of these, but
it runs after register allocation and only matches a V_CMP in the VOPC
(_e32) encoding writing physical VCC. That requires SIShrinkInstructions
to have set a VCC register allocation hint, which it only does when
canShrink() succeeds, so any V_CMP that is VOP3-only (source modifiers,
or two SGPR sources) keeps its AND.
Fold the AND away in SIFoldOperands instead, which runs before the
register coalescer, so the V_CMP result can be coalesced into VCC.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 1a92355c0354b9a3b62be64a42f6acc0484518a3
https://github.com/llvm/llvm-project/commit/1a92355c0354b9a3b62be64a42f6acc0484518a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
Log Message:
-----------
[IR] Suppress getGetElementPtr() deprecation in more places (#228364)
These methods are themselves deprecated. Clang does not warn for
them, but MSVC does.
Commit: 55be32fdbf8e677af036c3632e50c7798cbd2010
https://github.com/llvm/llvm-project/commit/55be32fdbf8e677af036c3632e50c7798cbd2010
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[IRBuilder] Propagate fast-math flags to folding in CreateBinOpFMF (#227543)
Fast-math flags are used by InstSimplifyFolder, so we need to pass them
to the folding function in CreateBinOpFMF.
Commit: e7f7422a14cfdd6d00fcf7e2e25bfd5a47897030
https://github.com/llvm/llvm-project/commit/e7f7422a14cfdd6d00fcf7e2e25bfd5a47897030
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/SanitizerCoverage.md
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
A compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_summary.cpp
Log Message:
-----------
[compiler-rt] Add print_coverage_summary to silence SanitizerCoverage dump logs (#228039)
When running a test suite of SanitizerCoverage-instrumented binaries,
the `SanitizerCoverage: … PCs written` summary on stderr can poison
FileCheck and cause unexpected failures.
There is no way to turn that print off today. At most you can use
`log_path`, but that still creates a text file per process. We could
have guard it on the verbosity option, but that would change the default
and may regress consumers that rely on this output.
This PR adds `print_coverage_summary` (default true). Set
`print_coverage_summary=0` to keep the dump log disable; .sancov files
are still written. The same guard is used on the Fuchsia path.
The new lit test is a copy of sanitizer_coverage_trace_pc_guard.cpp,
adapted to check the default print and print_coverage_summary=0.
Commit: f3778fb5b18178dcb6fe02b5b5335c8159e04d83
https://github.com/llvm/llvm-project/commit/f3778fb5b18178dcb6fe02b5b5335c8159e04d83
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
A llvm/test/CodeGen/AMDGPU/itofp-odd-width-load.ll
M llvm/test/CodeGen/AMDGPU/slp-int-to-fp.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for int to fp casts of loaded odd width integers (#227904)
Assisted-by: Claude Code Opus 5
Commit: c18f82867198144efa14c5ede97d911c7151efba
https://github.com/llvm/llvm-project/commit/c18f82867198144efa14c5ede97d911c7151efba
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/memory-widening-debug.ll
Log Message:
-----------
[LV][NFC] Add more debug when setting the widening decision (#227617)
Whilst debugging some vectorisation issues recently, I discovered the
vectoriser is very opaque about it's decision making process which makes
it very hard to figure out what is happening. I've added debug messages
to help the developer understand the process better.
Tests assisted by Codex (GPT-5.5)
Commit: 557c3bf999fc86f15cc91d4f9ccfa34c3b784fdc
https://github.com/llvm/llvm-project/commit/557c3bf999fc86f15cc91d4f9ccfa34c3b784fdc
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for ARGMIN (#227997)
- Add ARGMIN table gen
- Add validators and folders
- Add positive and negative tests
- Add compliance info
Signed-off-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Commit: 3f48e22a1f321d5d3341bd812803694cea588785
https://github.com/llvm/llvm-project/commit/3f48e22a1f321d5d3341bd812803694cea588785
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/ilist_iterator.h
M llvm/unittests/ADT/IListIteratorTest.cpp
Log Message:
-----------
[IList] Fix getNodeParent() interaction with const qualifiers (#228362)
In the old implementation getNodeParent() did not work at all on
`const_iterator` (because the body would fail to compile) and `const
iterator` (because the method was not marked const).
Fix this and add more unit tests for various combinations of constness.
It should be noted that `const iterator` behaves just like plain
`iterator` in that it returns a non-const parent pointer. Only
`const_iterator` returns a const parent pointer.
Commit: e6ef6b94b2910e4a1c380f135fc4975bec0f876f
https://github.com/llvm/llvm-project/commit/e6ef6b94b2910e4a1c380f135fc4975bec0f876f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AMDGPU/coalescer-subreg-undef-in-bundle.mir
Log Message:
-----------
[RegisterCoalescer] Update undef flags inside bundles (#227615)
When joining makes an earlier subregister def a partial redefinition,
JoinVals::pruneValues removes its undef flag. It only looked at the
instruction returned by getInstructionFromIndex, which for a bundle is
the BUNDLE header, so the def inside the bundle kept a stale undef flag
that disagreed with the header. Update all operands in the bundle.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: ec590781c1367562afafe96d4f9648a875f3934c
https://github.com/llvm/llvm-project/commit/ec590781c1367562afafe96d4f9648a875f3934c
Author: David Meng <davidmenggx at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters-main.cpp
Log Message:
-----------
[clang-tidy] Ignore parameters of `main` in `misc-const-correctness` (#228120)
The standard fixes the signature of `main`, so suggesting `const` for
its parameters is a false positive. The check warned on `char **argv`
but not on `char *argv[]`. The array form did not warn because the check
does not analyze array-style parameters.
The check now skips all parameters of `main`. Local variables inside
`main` are still checked.
Fixes https://github.com/llvm/llvm-project/issues/227988
Commit: a3b8700c9576ca89753a0cc23423f37ef3b6c17d
https://github.com/llvm/llvm-project/commit/a3b8700c9576ca89753a0cc23423f37ef3b6c17d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/SPIRV.cpp
A clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
Log Message:
-----------
[CIR][SPIR-V] Dispatch AMDGPU builtins on AMDGCN-flavored SPIR-V (#222018)
Mappings to classic codegen:
- spirv32/spirv64 arch switch:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/CGBuiltin.cpp#L129-L135
- spv -> amdgcn prefix handling:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/CGBuiltin.cpp#L6879-L6881
- `supportsLibCall()`:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/Targets/SPIR.cpp#L139-L142
Commit: d917e358c84b694c9e4250a270f4833acbfb8f41
https://github.com/llvm/llvm-project/commit/d917e358c84b694c9e4250a270f4833acbfb8f41
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
Log Message:
-----------
[CIR][AMDGPU] Use nsw add and ordered compare in logb lowering (#228004)
Align with classic codegen, which emits add nsw and fcmp one
Classic codegen code we are aligning with:
https://github.com/llvm/llvm-project/blob/8995a358fa77a669679594aa9857ba0e0b224ab1/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp#L2233-L2239
Commit: 4dfc4f5457efc21c8bed43dca7605f119ef35d5e
https://github.com/llvm/llvm-project/commit/4dfc4f5457efc21c8bed43dca7605f119ef35d5e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGenOpenCL/global-vars.cl
Log Message:
-----------
[CIR] Emit OpenCL file scope global variables (#228125)
Commit: 04dadc0275c8f781cbf4158299911a6fc822a28b
https://github.com/llvm/llvm-project/commit/04dadc0275c8f781cbf4158299911a6fc822a28b
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
A llvm/test/MC/Disassembler/RISCV/xmipslsp.txt
M llvm/test/MC/RISCV/xmips-invalid.s
Log Message:
-----------
[RISCV][MC] Restrict mips.ldp / mips.sdp to RV64 only (#227043)
The [P8700-F programmer’s
guide](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=11)
describes an RV64GCZbaZbb processor. Its
[`mips.ldp`](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=355)
writes two 64-bit values to two integer registers, while
[`mips.sdp`](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=364)
takes a 64-bit value from each of two integer registers.
Based on these info, this commit restricts their assembly and
disassembly to RV64.
AI Usage: Amp (GPT 6 Sol) was used to help with tests.
Co-authored-by: Amp <amp at ampcode.com>
Commit: d95d04c7a01299458bdf95b421a6cb8b2be15436
https://github.com/llvm/llvm-project/commit/d95d04c7a01299458bdf95b421a6cb8b2be15436
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/icmp-samesign.ll
Log Message:
-----------
[GVN] Replace icmp samesign with icmp flipped signedness (#227855)
Proof: https://alive2.llvm.org/ce/z/3uT_Ac
Commit: 5e8d0192f26f22f01c1ec669be0c30cb6e90386d
https://github.com/llvm/llvm-project/commit/5e8d0192f26f22f01c1ec669be0c30cb6e90386d
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libsycl/include/sycl/__impl/backend.hpp
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/detail/config.hpp
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
M libsycl/include/sycl/__impl/detail/kernel_submission.hpp
M libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/__impl/device_selector.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/include/sycl/__impl/group.hpp
M libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/handler.hpp
M libsycl/include/sycl/__impl/index_space_classes.hpp
M libsycl/include/sycl/__impl/nd_item.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
R libsycl/include/sycl/__spirv/spirv_types.hpp
R libsycl/include/sycl/__spirv/spirv_vars.hpp
A libsycl/include/sycl/__spirv/types.hpp
A libsycl/include/sycl/__spirv/vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/event_impl.cpp
M libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/handler_impl.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/detail/spinlock.hpp
M libsycl/src/detail/suppress_extra_warnings.hpp
M libsycl/src/device.cpp
M libsycl/src/device_selector.cpp
M libsycl/src/event.cpp
M libsycl/src/exception.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/handler.cpp
M libsycl/src/platform.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/.clang-format
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
M libsycl/test/basic/handler/handler_parallel_for_runtime.cpp
A libsycl/test/basic/handler/handler_single_task_named_functor.cpp
R libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/queue_single_task.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
R libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/Inputs/fill_memset_common.hpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/context/context_ctors.cpp
M libsycl/unittests/handler/memcpy.cpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
Log Message:
-----------
[libsycl] Generic code cleanup (#224330)
- aligns SYCL API parameter names with specification
- fixes doxygen keywords used in comments
- applies CamelCase to all non-SYCL 2020 vars and methods
- applies generic recomendations from LLVM coding standards
- fixes missing or redundant headers
- adds detail namespace to the helpers if missed
- a few tests were renamed to match their content
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 1f48c2f8f4021f016a62fe0cebf877c4c8f5dffd
https://github.com/llvm/llvm-project/commit/1f48c2f8f4021f016a62fe0cebf877c4c8f5dffd
Author: Samuel Newcome <97889602+SamNewcome at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M openmp/runtime/src/kmp_dispatch.cpp
M openmp/runtime/src/kmp_global.cpp
A openmp/runtime/test/worksharing/for/kmp_sched_set_get.c
A openmp/runtime/test/worksharing/for/kmp_sched_static_steal_ordered.c
Log Message:
-----------
[OpenMP] Corrects the setting of the Static_Steal schedule with `omp_set_schedule` (#227236)
Static-steal is considered a valid OMP scheduler by `kmp_runtime.cpp`'s
`__kmp_set_schedule` function. But when trying pass it to the setter, we
end up with a failure because it was not added to the `__kmp_sch_map` in
`kmp_global.cpp`.
This PR adds a test that each schedule in `kmp.h` can be set and gotten
by `omp_set_schedule` and `omp_get_schedule`, which fails with static
steal and a fix for `__kmp_sch_map`. To deal with static-steal set this
way with `ordered` loops, I added similar handling as with setting
static steal as an environment variable: gets converted to dynamic,
nonmonotonic when initialising the loop, so when combined with `ordered`
simply dynamic scheduling is used. A test that static-steal with
`ordered` works was added, which used to hang before adding this
handling.
This PR was made with AI assitance. All code was reviewed and where
necessary modified by myself.
Commit: 1e3586d70991f17251127bb4b3d5f1b9c9d3fc19
https://github.com/llvm/llvm-project/commit/1e3586d70991f17251127bb4b3d5f1b9c9d3fc19
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/RecordReplay.cpp
Log Message:
-----------
[Offload][OpenMP] Keep user Numblocks requested value for RecordReplay (#228345)
RecordReplay still uses the Numblocks value requested by the user so
keep passing that value through the PluginInterface for now.
Fixes issue introduced by #222607
Commit: 6fd74fd9516420bb49f9c6ced02bd95c9866d851
https://github.com/llvm/llvm-project/commit/6fd74fd9516420bb49f9c6ced02bd95c9866d851
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/absorbing-copyable-lane.ll
A llvm/test/Transforms/SLPVectorizer/X86/wide-load-absorbed-lane.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-optimal vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228385
Commit: f718ebe873411a562ef6e5c27da36d75b7aaec98
https://github.com/llvm/llvm-project/commit/f718ebe873411a562ef6e5c27da36d75b7aaec98
Author: pgerell <peter at gerell.se>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/requires_module.cpp
A clang/test/OpenMP/requires_pch.cpp
Log Message:
-----------
[clang][OpenMP] Keep 'requires' directives read from an AST file (#220058)
An OpenMP `requires` directive is recorded in Sema when the directive is
parsed
(`SemaOpenMP::ActOnOpenMPRequiresDirective`). Nothing repopulated that
list from an AST
file. A translation unit that gets its `requires` directive from a PCH
or a module
therefore behaves as if the directive were absent, and clang rejects
valid code.
`OMPRequiresDecl` is already serialized and eagerly deserialized, so the
declaration is
present in the AST. Only Sema's view of it was missing.
## Reproducer
```c++
// rev.h
#pragma omp requires reverse_offload
void foo();
```
```c++
// use.cpp
void bar(int argc) {
#pragma omp target device(ancestor : argc)
foo();
}
```
```
$ clang -cc1 -fopenmp -fopenmp-version=51 -fopenmp-targets=x86_64 -triple x86_64 \
-x c++ -emit-pch -o r.pch rev.h
$ clang -cc1 -fopenmp -fopenmp-version=51 -fopenmp-targets=x86_64 -triple x86_64 \
-include-pch r.pch -fsyntax-only use.cpp
use.cpp:2:20: error: device clause with ancestor device-modifier used without specifying 'requires reverse_offload'
```
The requirement is specified, so the diagnostic is a false positive. The
same code in a
single file compiles cleanly, because the directive is then parsed in
this TU.
`-fopenmp-targets=` matters. Without an offload target clang defers this
diagnostic and
then drops it, because a host compilation never flushes its deferred
diagnostics. That is
a separate bug, with a fix to follow, and it makes this false positive
reachable in the
default configuration too.
`reverse_offload` is the case with a directly observable diagnostic. The
same state feeds
every `hasRequiresDeclWithClause` query, so `dynamic_allocators` (on a
device compilation)
and `unified_shared_memory` (which changes implicit data-sharing instead
of emitting a
diagnostic) read it as well.
## Fix
Write the `requires` directives into the AST file and register them with
Sema, following
the existing `DeclsWithEffectsToVerify` pattern. This happens in
`ASTReader::UpdateSema`
rather than `ASTReader::InitializeSema` because `UpdateSema` runs after
every AST file is
loaded. A directive can come from a module loaded during the compilation
rather than up
front.
Tests cover both the PCH and the module path.
The contents of this PR is created with help from Claude Code and
ChatGPT.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: f6025b00141ed956ceaf0d06b6471360ab704401
https://github.com/llvm/llvm-project/commit/f6025b00141ed956ceaf0d06b6471360ab704401
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[lldb][Windows] Report a process exit once the process is gone (#228115)
When a debugged process exits, lldb and lldb-server report the exit
while Windows is still tearing the process down. Its executable and DLLs
are still loaded at that point, so a test that deletes or replaces one
of them right after the exit fails with `"access denied"`. This is what
makes `TestReplaceDLL` fail on Windows CI.
This patch reports the exit only after the debugger has released the
exit event and the process has fully terminated, which matches how POSIX
reports an exit.
On a Windows 11 host, `TestReplaceDLL` fails to delete `foo.dll` in 246
out of 640 runs before the change and in 0 of 1,600 after.
rdar://188918066
Commit: a0cbcd03575c21d4c9b3935ea30c4b32e4cc0ec7
https://github.com/llvm/llvm-project/commit/a0cbcd03575c21d4c9b3935ea30c4b32e4cc0ec7
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
Log Message:
-----------
Reland [AArch64][CostModel] Consider some nxv1 operations as legal (#214471) (#228371)
This is allowing some operations on vscale x 1 types, namely:
- load/store
- masked load/store
- arithmetic instructions like add/sub/mul
For those, there is already codegen coverage. See e.g.
- llvm/test/CodeGen/AArch64/sve-int-arith.ll
- llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
- llvm/test/CodeGen/AArch64/sve-masked-gather.ll
- llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
These types are relevant for enabling REVEC in LoopVectorizer. For
AArch64, the main target there is turning NEON vector sizes into SVE
vector size, i.e. using VF = "vscale x 1". For loops with mixed vector
and scalar types, we'll want to allow vectorising scalar types with such
a VF.
The original PR #214471 got reverted due to a failure in
llvm-test-suite. The codegen issue was fixed in #226939 and
llvm-test-suite passes locally now.
Commit: fe36d3fa8520adb7ce82ed06c5fd783691ed4995
https://github.com/llvm/llvm-project/commit/fe36d3fa8520adb7ce82ed06c5fd783691ed4995
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
Log Message:
-----------
[CIR] Convert null pointer constant types in target lowering (#228068)
The pass converted the cir.const result type but not the type inside its
`#cir.ptr` attribute, so the verifier rejected address-space null
constants
Commit: ba680de5049dbd0238d9e023ac60fcdf1e09fb48
https://github.com/llvm/llvm-project/commit/ba680de5049dbd0238d9e023ac60fcdf1e09fb48
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
Log Message:
-----------
[lldb][Windows] XFAIL TestExitDuringStep.py on ARM64 (#228392)
This is a follow up to https://github.com/llvm/llvm-project/pull/227318
which re-enabled `TestExitDuringStep.py` on Windows.
Those tests still fail on ARM64 Windows (see
https://github.com/llvm/llvm-project/pull/228391). XFAIL them for now.
Commit: adeb6eeb60e65feb4752fee68f02c07a076cbf64
https://github.com/llvm/llvm-project/commit/adeb6eeb60e65feb4752fee68f02c07a076cbf64
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Fix unused variable warning (#228383)
Commit: 70c82f1e02b43c6d45d12b098a703eebe7e300ef
https://github.com/llvm/llvm-project/commit/70c82f1e02b43c6d45d12b098a703eebe7e300ef
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-gathered-root-erased-scalars.ll
Log Message:
-----------
[SLP]Skip gathers with erased scalars in the cast context
The cast context of the reduction root is requested after the tree is
vectorized, when the scalars of the gathered root with the vectorized
subvector are already erased and have no operands, causes the crash.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5944875384
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228395
Commit: d0465230b17640603e69742c875f0eea65fc22fa
https://github.com/llvm/llvm-project/commit/d0465230b17640603e69742c875f0eea65fc22fa
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/regression/languages/c/lit.local.cfg
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Disable some builds on windows. Normalise amd64 (#228357)
Commit: 9a8edddf69c5130b39e9f99b6d6daeb0cfd79276
https://github.com/llvm/llvm-project/commit/9a8edddf69c5130b39e9f99b6d6daeb0cfd79276
Author: Alan Li <me at alanli.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/PHIElimination.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-subrange-liveintervals.mir
A llvm/test/CodeGen/Hexagon/phi-elim-subreg-lanes.mir
Log Message:
-----------
[PHIElim][AMDGPU]: shrink source subranges to lane-specific uses (#228073)
Commit: 40c3dc20b72eb09961c28eda7e0718e9c0425c80
https://github.com/llvm/llvm-project/commit/40c3dc20b72eb09961c28eda7e0718e9c0425c80
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/large-phi-search.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/preemit-peephole-scc-liveness-issue215745.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Enable StructurizeCFG SkipUniformRegions (#206739)
Fixes #204334
Commit: 9d872cbb70f3f525a39f2b964597ecfd2b8735e4
https://github.com/llvm/llvm-project/commit/9d872cbb70f3f525a39f2b964597ecfd2b8735e4
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/TokenKinds.def
M clang/test/Parser/MicrosoftExtensions.cpp
Log Message:
-----------
[clang] Fix crashes with inheritance model keywords (#228207)
The inheritance model keywords support a single underscore alias, but
that alias was never added to Attr.td. When we added typo correction
support for attributes in Clang 21, this uncovered a bug with these
keywords when a single underscore variant was used because the
hasAttribute() logic didn't know about these spellings. This adds the
correct spellings for the aliases to Attr.td.
While working on that, I noticed that we were missing an alias for
_single_inheritance, which is supported by MSVC, so that was added as a
drive-by fix.
Fixes #228003
Commit: a1067084901563a647374b1c15e888e92d777537
https://github.com/llvm/llvm-project/commit/a1067084901563a647374b1c15e888e92d777537
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
Log Message:
-----------
[Offload][L0][NFC] Remove staging buffers dead-code (#227979)
Async queues were the only user of Staging Buffers and as they were
removed this is now dead code we can remove.
Assisted by Claude.
Commit: 58d59f460cd740c50f66f782a87fa2a29f52ff25
https://github.com/llvm/llvm-project/commit/58d59f460cd740c50f66f782a87fa2a29f52ff25
Author: Alex Bradbury <asb at igalia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
Log Message:
-----------
[RISCV] Consider truncate semantics in performINSERT_VECTOR_ELTCombine (#228243)
This fixes a miscompile in performINSERT_VECTOR_ELTCombine dating back
to when it was added (#72675), but only just showing up through testing
when a recent unrelated change triggered vectorisation for a function
that trips it within Clang, leading to broken builds on some of the
two-stage RVV buildbots.
After type legalization the scalar binop can be wider than the vector
element type, with the insert implicitly truncating it. That isn't
equivalent for shifts and a similar bug was found and fixed in a
neighbouring combine in #81168. This patch just applies the same fix
(with the same comment even), avoiding the transform if the scalar type
doesn't match the element type.
I used an LLM to root cause the issue and produce the test case.
Commit: 2f97ec4d378c9087b69ab0ee6dc6454e15b299f0
https://github.com/llvm/llvm-project/commit/2f97ec4d378c9087b69ab0ee6dc6454e15b299f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/NVPTX/f128-no-libcall-error.ll
A llvm/test/CodeGen/X86/ppcf128-expand-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing FMA and ppcf128 expansion libcalls (#228094)
Previously this would hit a fatal error. Legalize to poison and report a proper
context error.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: e9e9512f2d0a1ca2462b0b8cec38742db923b71b
https://github.com/llvm/llvm-project/commit/e9e9512f2d0a1ca2462b0b8cec38742db923b71b
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Compat.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
Log Message:
-----------
[Offload][L0][NFC] Remove unused zexKernelGetArgumentSize dispatcher (#227589)
The KernelGetArgumentSize dispatcher is loaded during context init but
never called.
#218367 converted it to a ZeDispatcher but also removed its only
callers.
Argument sizes are now either not needed
(zeCommandListAppendLaunchKernelWithArguments) or come from
LaunchArgs.ArgSizes on the fallback path, so the driver query is no
longer used(other than debug printing).
This removes the now dead optional API declaration, the dispatcher
member, its loadExperimental call and the related debug output.
Not tested on actual GPU hardware however the plugin builds without
error(which I think should be sufficient check).
AI was only used in a review on unrelated changes which noted this dead
code.
Commit: 873f7ef7077fd5f3f6710a1dcb9a3371bd73124a
https://github.com/llvm/llvm-project/commit/873f7ef7077fd5f3f6710a1dcb9a3371bd73124a
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/compressed-debug-sections.test
A bolt/test/AArch64/zlib-compressed-debug-sections.s
A bolt/test/AArch64/zstd-compressed-debug-sections.s
M bolt/test/CMakeLists.txt
M bolt/test/lit.site.cfg.py.in
Log Message:
-----------
[BOLT] Support SHF_COMPRESSED DWARF debug sections. (#215835)
**Before:** BOLT will report an error when `--update-debug-sections` is
enabled and the input contains a `SHF_COMPRESSED` debug section, stating
that "`--update-debug-sections` requires uncompressed debug
information". This was implemented in #185662.
**After:** This patch follows up on this PR and adds support for
`SHF_COMPRESSED` debug information. BOLT now can decompress `zlib` /
`zstd` compressed debug information, update them and then recompress
with their original compression. This patch also validates compressed
debug sections, reporting an error if applicable. As mentioned in
#185662, legacy GNU-style compression is not handled.
Assisted-by: Codex
Commit: f698bf310346a643113604245c6f1e87fae139f4
https://github.com/llvm/llvm-project/commit/f698bf310346a643113604245c6f1e87fae139f4
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
A clang/test/Interpreter/CUDA/empty-device-module.cu
M clang/unittests/Interpreter/DeviceOffloadTest.cpp
Log Message:
-----------
[clang-repl] Fix PTX emission for CUDA inputs with no device code (#226977)
Previously, GeneratePTX() returned an error when PassManager::run()
returned false. That value reports whether any pass changed the module,
not whether emission succeeded. IIUC, addPassesToEmitFile() should be
the only failure point, which is already checked.
The check was harmless until e8b75c172810 ("[NVPTX] Add NewPM
boilerplate to NVPTXAssignValidGlobalNames"). Before it, that pass
returned true unconditionally (if the pass succeeded), so run() always
reported a change. Now a device module without a function definition,
produced in the case of host-only inputs, reports no change and fails
the check, falsely erroring out with `Failed to emit PTX code.` Due to
this, every host-only input to `clang-repl --cuda` is now rejected on
main. The host-supports-cuda lit probe consists mostly of such inputs,
so clang/test/Interpreter/CUDA reports UNSUPPORTED instead of failing.
I've also added a test with host-only inputs so a regression like this
could be caught.
Commit: ccafeec5625a44b90be71d9e4b9515d4d3ea6612
https://github.com/llvm/llvm-project/commit/ccafeec5625a44b90be71d9e4b9515d4d3ea6612
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-undef-phi-source.mir
Log Message:
-----------
CodeGen: Fix stale live range for undef PHI sources on split edges (#228057)
SplitCriticalEdge collects the PHI sources coming from the new block so
the trimming loop below does not undo the segment just added for them.
An undef operand gets no segment, but was still added to the set, so a
register that is only an undef PHI operand on the split edge kept the
stale extension of its live range through the new block.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: ea458d215c1e24654429e91f0d16100e7bf6c643
https://github.com/llvm/llvm-project/commit/ea458d215c1e24654429e91f0d16100e7bf6c643
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
Log Message:
-----------
[CIR][AMDGPU] Drop stale logb FIXME in amdgcnspirv-builtins.hip (NFC) (#228404)
#228004 made CIR emit nsw add and ordered compare for logb, so update
the SPIR-V checks to match
Fix failure appeared on main branch
Commit: 7e04d1b56db2d7ca799df2951e0bd6a6dcc78f7f
https://github.com/llvm/llvm-project/commit/7e04d1b56db2d7ca799df2951e0bd6a6dcc78f7f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/linear-clause03.f90
Log Message:
-----------
[flang][OpenMP] Improve check for LINEAR and ORDERED with argument (#228235)
The LINEAR clause is not allowed on a construct if an ORDERED clause
with an argument is present. The new message is clearer about the
argument to the ORDERED clause.
Commit: 1f4597bea45a30a7b08936948d89dc4824d6558c
https://github.com/llvm/llvm-project/commit/1f4597bea45a30a7b08936948d89dc4824d6558c
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
Commit: d7d8df90a24749ec7ebcc899ce1e147245e9fa65
https://github.com/llvm/llvm-project/commit/d7d8df90a24749ec7ebcc899ce1e147245e9fa65
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang-rt/test/Driver/fpe-trap-exec-denormal.f90
M flang-rt/test/Driver/fpe-trap-exec-divzero.f90
M flang-rt/test/Driver/fpe-trap-exec-inexact.f90
M flang-rt/test/Driver/fpe-trap-exec-overflow.f90
M flang-rt/test/Driver/fpe-trap-exec-underflow.f90
M flang-rt/test/Driver/fpe-trap-exec.f90
M flang-rt/test/lit.cfg.py
Log Message:
-----------
[Flang-RT] Skip SIGFPE tests under WSL1 (#227876)
The floating-point exceptions do not work under WSL1 because the SIGFPE
trap does not propagate to the application
(https://github.com/microsoft/WSL/issues/3657). Mark these tests as
UNSUPPORTED for wsl1.
The Subsystem For Windows detection mechanism is the same as for LLVM
(#137822).
Commit: 4a7dffd473c46eb64009ef8baa104cfcb1b4f927
https://github.com/llvm/llvm-project/commit/4a7dffd473c46eb64009ef8baa104cfcb1b4f927
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[Flang-RT] Skip SIGFPE tests under WSL1 (#227876)
The floating-point exceptions do not work under WSL1 because the SIGFPE
trap does not propagate to the application
(https://github.com/microsoft/WSL/issues/3657). Mark these tests as
UNSUPPORTED for wsl1.
The Subsystem For Windows detection mechanism is the same as for LLVM
(#137822).
Commit: 82f21f4b72d8219d84262f879c4de2edead8b3b5
https://github.com/llvm/llvm-project/commit/82f21f4b72d8219d84262f879c4de2edead8b3b5
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/AST/TemplateBase.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/TemplateBase.cpp
Log Message:
-----------
[clang][AST][NFC] Remove an overload of `ASTTemplateKWAndArgsInfo::initializeFrom` (#227942)
The FIXME comment on this overload:
```cpp
// FIXME: The parameter Deps is the result populated by this method, the
// caller doesn't need it since it is populated by computeDependence. remove
// it.
```
Commit: 41220aecafcc3cc1f8d2d45e198253440053e11e
https://github.com/llvm/llvm-project/commit/41220aecafcc3cc1f8d2d45e198253440053e11e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
Log Message:
-----------
[Analysis][NFC] Add SVE load/store tests for non-power-of-2 vectors (#228387)
Commit: 3a250378e6c4d25a1d9c08f1d8e04dd66262ffdd
https://github.com/llvm/llvm-project/commit/3a250378e6c4d25a1d9c08f1d8e04dd66262ffdd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
M llvm/test/Transforms/ConstraintElimination/large-constant-ints.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
M llvm/unittests/Analysis/ConstraintSystemTest.cpp
Log Message:
-----------
[ConstraintElim] Check if a single row implies a condition before FM. (#228369)
If a single row of the system implies the queried condition, the
condition holds without copying the system and running Fourier-Motzkin
elimination.
This overall can be slightly cheaper (although changes mostly in noise),
this also catches cases where FM gives up due to overflow, either when
combining rows with large coefficients or when negating a condition with
a constant of INT64_MAX.
In https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1555, it
leads to additional successful queries with end-to-end impact in ~900
files, mostly strengthening flags.
https://llvm-compile-time-tracker.com/compare.php?from=a90d9d26f746d913da12adf3bbb95a6735741e05&to=5f771faeedd4e65f180d288700f00b55ff00e6e3&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/228369
Commit: fb45017cd60cf012c85ce4f87498c26e49ca9e5e
https://github.com/llvm/llvm-project/commit/fb45017cd60cf012c85ce4f87498c26e49ca9e5e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
Log Message:
-----------
[lldb-dap][test] Migrate server mode tests (#227804)
Migrate TestDAP_server.py to the new lldb-dap test infrastructure.
test_server_port and test_server_unix_socket now run two sessions
concurrently.
Add test_breakpoints_in_multiple_sessions to check that a breakpoint set
in one session must not stop another.
Fix test_connection_timeout_at_server_start. It now waits for lldb-dap
to exit on its own before the teardown kills it.
The test now takes significantly less time.
Commit: d5a23954543f23c05b66ce70362da1a6f8491761
https://github.com/llvm/llvm-project/commit/d5a23954543f23c05b66ce70362da1a6f8491761
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/interleaved-accesses.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64][GlobalISel] Add deinterleave load and store test coverage. NFC (#228419)
Correct some NFC comments whilst here too.
Commit: 3e042b9b6709b08728787b08c42d66dab405a279
https://github.com/llvm/llvm-project/commit/3e042b9b6709b08728787b08c42d66dab405a279
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: c9d04b0aba2df08ee4c63bd3742ca91f8746987c
https://github.com/llvm/llvm-project/commit/c9d04b0aba2df08ee4c63bd3742ca91f8746987c
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: 66eb006e3a0fb7b3fa8a7ae403750054d3715642
https://github.com/llvm/llvm-project/commit/66eb006e3a0fb7b3fa8a7ae403750054d3715642
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/select-branch-weights.ll
Log Message:
-----------
[VPlan] Preserve the branch weights of scalarized selects. (#224968)
Update VPlan to also carry !prof for select instructions from original
IR. They are threaded through like for branches, and dropped for wide
selects.
This is part of addressing the remaining profcheck failures in
LoopVectorize: https://github.com/llvm/llvm-project/issues/161235.
PR: https://github.com/llvm/llvm-project/pull/224968
Commit: d94d6f87d76b224a13e82ae2a249e1090f853300
https://github.com/llvm/llvm-project/commit/d94d6f87d76b224a13e82ae2a249e1090f853300
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[IRBuilder] Remove custom insertion point type (#228117)
Historically, insertion points had to be represented as pairs of
BasicBlock and BasicBlock iterator, because an end() iterator did not
know which block it belongs to. This has changed some time ago (I think
as part of the debuginfo records change) and BasicBlock iterators now
have a reference to their parent block. So the canonical representation
of an insertion point is now just a BasicBlock iterator.
This makes the `IRBuilder::SetInsertPoint(BasicBlock::iterator)` API
handle end() iterators correctly (but still keeping the API with a
redundant block argument) and replaces the `IRBuilderBase::InsertPoint`
type (which was a pair of block and iterator) with a plain
`BasicBlock::iterator`.
This requires surprisingly many changes because IRBuilder insertion
points are heavily used in the OpenMP building. A small number of
non-mechanical changes were needed because the code was sometimes
relying on the fact that nothing enforced that the block and iterator
actually referred to the same block, and they diverged sometimes when
splitting. In those cases we need to make sure to get the original block
before splitting.
Commit: 330825ef3dc6228b49867213f4699708090f2ee5
https://github.com/llvm/llvm-project/commit/330825ef3dc6228b49867213f4699708090f2ee5
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9bb435a (#228360)
This fixes 9bb435a68b4e38983589da22fd2ff16e12532431 (#227714).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bb435a68b4e38983589da22fd2ff16e12532431
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: aed168736404872486cd6d71f0b283c5087cc76d
https://github.com/llvm/llvm-project/commit/aed168736404872486cd6d71f0b283c5087cc76d
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: 50e76b3587e37304d80e9a2d2197ca428fef2f74
https://github.com/llvm/llvm-project/commit/50e76b3587e37304d80e9a2d2197ca428fef2f74
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[Bazel] Fixes 9bb435a (#228360)
This fixes 9bb435a68b4e38983589da22fd2ff16e12532431 (#227714).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bb435a68b4e38983589da22fd2ff16e12532431
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4c93bc148a7f06581ef180a2f325e880ce03f97d
https://github.com/llvm/llvm-project/commit/4c93bc148a7f06581ef180a2f325e880ce03f97d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
CodeGen: Remove unnecessary Triple copy in AsmPrinter (#228428)
Commit: 874d708c2485b3b7eb828843f77fc511ce7cd564
https://github.com/llvm/llvm-project/commit/874d708c2485b3b7eb828843f77fc511ce7cd564
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang-cl] Parse (but don't support) /BE (#228381)
It's an undocumented CL option mentioned at
https://old.reddit.com/r/cpp/comments/1wudtq0/edg_c_fronted_now_released_as_open_source/pd3m2au/
Commit: 0dde058eb61f81213ce4ff5381c64fc0fcb4c068
https://github.com/llvm/llvm-project/commit/0dde058eb61f81213ce4ff5381c64fc0fcb4c068
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulhu.ll
Log Message:
-----------
[X86] Replace SSE pmulhw/pmulhuw target intrinsics with generic smulh/umulh (#227663)
Fixes #223627
Commit: b05bc1f7066a5298bbae9b438bbf6942015536df
https://github.com/llvm/llvm-project/commit/b05bc1f7066a5298bbae9b438bbf6942015536df
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
Log Message:
-----------
[CodeGen][NFC] Replace std::function with llvm::function_ref (#228431)
Replace `std::function` with `llvm::function_ref` for a perdicate
parameter that is only used during the call.
Commit: 32757891963d7a544dbcf6a52e8f7a7c67e273aa
https://github.com/llvm/llvm-project/commit/32757891963d7a544dbcf6a52e8f7a7c67e273aa
Author: hev <wangrui at loongson.cn>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
A lld/test/ELF/loongarch-relax-call-stress.s
A lld/test/ELF/loongarch-relax-pcrel-stress.s
Log Message:
-----------
[lld][LoongArch] Prevent relaxation oscillation for LA.PCRel and CALL (#226713)
Relaxation of pcalau12i+addi (relaxPCHi20Lo12, isInt<22>) and
call36/call30 (relaxMediumCall, isInt<28>) can oscillate: shrinking one
section moves a symbol, which flips isInt<N> for other sites and changes
bytesDropped again.
Follow the same approach as RISCV::relaxCall: after a few passes, do not
allow remove to increase beyond the previous pass's value (cur - delta).
Pass that cap as prevRemove into the two helpers; range checks may still
clear remove (0) when the target goes out of range.
Fixes #226712
Commit: 43bfdeef96d07dba07eae2285e7eba1f2afbacb3
https://github.com/llvm/llvm-project/commit/43bfdeef96d07dba07eae2285e7eba1f2afbacb3
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
An untied task inherits td_last_tied -- the innermost tied task the
thread is bound to -- from the task it suspends. That inheritance only
happened in __kmp_invoke_task(), so any path that made an untied task
the thread's current task without going through it left td_last_tied at
the NULL that __kmp_task_alloc() assigns. This causes a crash when
__kmp_task_is_allowed() dereferences NULL.
Move the inheritance into __kmp_task_start(), before it sets
th_current_task. Besides the if0 path, this also covers a cancelled
untied task, which is never invoked but still releases its dependences
while it is the current task, and the pattern task of an untied
taskloop, which the runtime starts and finishes directly.
Fixes #172938
Commit: d71228f97c01b0d0192dea60c822291b55099178
https://github.com/llvm/llvm-project/commit/d71228f97c01b0d0192dea60c822291b55099178
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/test/CIR/CodeGenHIP/string-literal-addrspace.hip
A clang/test/CIR/CodeGenOpenCL/string-literal-addrspace.cl
A clang/test/CIR/CodeGenSYCL/string-literal-addrspace-nyi.cpp
Log Message:
-----------
[CIR] Fix address space of string literals (#226996)
This commit fixes the address space of string literals in CIR. The
address space of string literals is determined by the AST type, which is
always the default address space for address space agnostic languages.
The global variable that holds the string literal may live in a
different address space, e.g. OpenCL constant address space or HIP
device address space. Therefore, we need to cast the global variable to
the pointer type of the AST type when emitting a reference to the string
literal.
Assisted-by: Claude Opus 5.5
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 08896666330f219e0346898c28fd8f5c811bc79e
https://github.com/llvm/llvm-project/commit/08896666330f219e0346898c28fd8f5c811bc79e
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
A clang/test/CIR/CodeGenCUDA/nounwind.cu
A clang/test/CIR/CodeGenOpenCL/nounwind.cl
M clang/test/CIR/CodeGenSYCL/kernel-caller-attributes.cpp
A clang/test/CIR/CodeGenSYCL/nounwind.cpp
Log Message:
-----------
[CIR] Implement device-wide nounwind attribute (#227016)
This commit implements the missing application of nounwind on device
functions and device calls. This leaves out OpenMP, similar to how OGCG
currently does not support it for OpenMP device functions.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 19223743331fbd313579f43f4c46c5a75e16b0be
https://github.com/llvm/llvm-project/commit/19223743331fbd313579f43f4c46c5a75e16b0be
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
Log Message:
-----------
[Offload][L0] Remove OMP_INFOTYPE from plugin (#227994)
Remove OpenMP specific debug types and unify everithing under ODBG with
OL debug types in the Level Zero plugin.
Assisted by Claude.
Commit: 2876f4b8e1d2310be1500618c3963e1f69911f7a
https://github.com/llvm/llvm-project/commit/2876f4b8e1d2310be1500618c3963e1f69911f7a
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip
Log Message:
-----------
[CIR][AMDGPU] Use intrinsic type for dpp signature detection (#226921)
This commit modifies the CIR code generation for AMDGPU to use the
intrinsic type for dpp builtin signature detection. This change ensures
that the correct intrinsic type is used when generating code for dpp
operations, instead of relying on hard-coded types.
This should also help simplify the implementation of other future
builtins, such as NVPTX wmma/mma load/store/mma.
Note that this is not an NFC as it changes the signedness in parts of
the builtin signatures. However, that change fits the signature
definitions and the signedness does not carry much meaning for these
builtins either way.
This is a follow-up to #226469.
Assisted-by: Claude Opus 5.5
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: ff36303fe271fb28820851751ccf02c580ff17ba
https://github.com/llvm/llvm-project/commit/ff36303fe271fb28820851751ccf02c580ff17ba
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[Offload][L0] Add support to print the driver build log (#228022)
The log is printed if the driver reported an error (only the first
lines) or in full if LIBOFFLOAD_LEVEL_ZERO_SHOW_BUILD_LOG env var is
set.
Assisted by Claude.
Commit: 82db5839b2261760b084c039956d83210a9f8434
https://github.com/llvm/llvm-project/commit/82db5839b2261760b084c039956d83210a9f8434
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Lower/OpenMP/optional-argument-map-4.f90
A offload/test/offloading/fortran/optional-mapped-arguments-5.f90
Log Message:
-----------
[Flang][OpenMP] Preserve absent OPTIONAL arguments in target mappings (#227343)
Generate empty mapping bounds for absent optional scalars and
explicit-shape arrays, preserving null pointers and preventing device
allocation or copies from null.
Co-authored-by: Codex <codex at openai.com>
Commit: fdfd37c0148b6186c19cc9ffa3f2cbfeb2948533
https://github.com/llvm/llvm-project/commit/fdfd37c0148b6186c19cc9ffa3f2cbfeb2948533
Author: Cristiano Lacerda <61819301+crisclacerda at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/test/Analysis/dead-stores.c
Log Message:
-----------
[clang][analyzer] Diagnose dead stores on parenthesized lvalues (#227176)
This commit fixes that `deadcode.DeadStores` previously failed to diagnose a
dead store when the assigned variable is wrapped in parentheses.
```c
int f(int input) {
int value;
(value) = input;
value = 2;
return value;
}
```
This change was made with assistance of an AI tool (OpenAI Codex), which
implemented the fix (IgnoreParens()) and the test.
I have found the false negative myself (on a real codebase that uses a
code generator) and ran the tests manually.
Commit: aae384ac9732f5dafb5fada6c7645d6d3f91505d
https://github.com/llvm/llvm-project/commit/aae384ac9732f5dafb5fada6c7645d6d3f91505d
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/GlobalISel/GMIR.md
M llvm/docs/GlobalISel/IRTranslator.md
M llvm/docs/GlobalISel/index.md
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/blockaddress-stale-addresstaken.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
M llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll
M llvm/test/CodeGen/AArch64/GlobalISel/fconstant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extends.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fixed-point-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-indirect-br-repeated-block.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-invoke-probabilities.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memcpy-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memfunc-undef.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memset-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-nneg-disjoint.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-split-vector-arg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-objects.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-tbaa.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-trunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vararg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vscale.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-weird-alloca-size.ll
M llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/threadlocal-address.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll
M llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async-non-entry-block.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/memsize-remarks.ll
M llvm/test/CodeGen/AArch64/speculative-load-intrinsic-mmo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-call-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll
M llvm/test/CodeGen/BPF/GlobalISel/ir-translator-ret.ll
M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-pic.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
M llvm/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir
M llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/add.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/big-endian.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/bitwise.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/pointers.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/split_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-fp128.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-mixed-types.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-scalar.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-vectors.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator-stackprotect.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-calllowering.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/insertelement.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/shufflevector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/splat_vector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ld.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-store.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/pointers/global-vars-untyped.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
M llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-inalloca.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
M llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
M llvm/test/DebugInfo/AArch64/dbg-value-globaladdr-gisel.ll
M llvm/test/Other/print-changed-machine.ll
Log Message:
-----------
Sync pass name between newPM and legacy for irtranslator (#227425)
The legacy pass name was change to newPM one. This is done for
consistency and having only one spelling for stop-after/before
Commit: e37801d959a029800caa3459bab795bc6584fbe0
https://github.com/llvm/llvm-project/commit/e37801d959a029800caa3459bab795bc6584fbe0
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
Log Message:
-----------
[AMDGPU] Remove redundant S_AND handling from optimizeVccBranch (#228417)
PR #227729 moved this optimization to SIFoldOperands::tryFoldAndExec
where it is more effective.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 3ade3984f41cbe5094e4333020e15203a93b1cb4
https://github.com/llvm/llvm-project/commit/3ade3984f41cbe5094e4333020e15203a93b1cb4
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Target/Platform.cpp
Log Message:
-----------
[lldb] Move debug-info SDK parsing from PlatformDarwin into Platform (#144396)
Move the default `GetSDKPathFromDebugInfo` and
`ResolveSDKPathFromDebugInfo` implementations from `PlatformDarwin` into
the base `Platform` class, so non-Darwin platforms get real SDK parsing
instead of an `UnimplementedError`.
`PlatformDarwin` now only overrides the Module overload, to detect
conflicting public/internal SDKs. No functional change on Darwin.
Follow up to:
- https://github.com/llvm/llvm-project/pull/224361
rdar://171905747
Commit: 5ea3e148786da2af5ed2594c88b9156f49d6f77f
https://github.com/llvm/llvm-project/commit/5ea3e148786da2af5ed2594c88b9156f49d6f77f
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
Log Message:
-----------
[clang-format] Handle Verilog dist (#224794)
This patch adds the space on the left of the `:=` operator. It is the
style used in the spec. Previously there was only one on the right.
old
```SystemVerilog
x dist {[100 : 102]:= 1, 200:= 2, 300:= 5};
```
new
```SystemVerilog
x dist {[100 : 102] := 1, 200 := 2, 300 := 5};
```
Commit: eb37e16f2de1d55106f5928e63eb92d4d40e2a66
https://github.com/llvm/llvm-project/commit/eb37e16f2de1d55106f5928e63eb92d4d40e2a66
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/test/msan/release_origin.c
Log Message:
-----------
[NFC][msan][test] Increase allocation size in release_origin.c (#228333)
On systems with many CPUs and 64 KiB pages (such as 192-CPU ppc64le on
`sanitizer-ppc64le-linux`), the kernel per-CPU RSS counter batch size
(24 MiB) exceeds the 20 MiB allocation in this test, so /proc/self/statm
may not reflect the RSS changes. Increase the allocation size to 100 MiB
and adjust the soft RSS limits accordingly.
Assisted-by: Gemini
Commit: 8a47c561cea67f48d54a4a17c5475b3a649425d7
https://github.com/llvm/llvm-project/commit/8a47c561cea67f48d54a4a17c5475b3a649425d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
A llvm/test/CodeGen/ARM/fast-isel-ext-dead-cpsr.ll
Log Message:
-----------
ARM: Mark cpsr def dead in FastISel integer extends (#227705)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 97beb893a52e1863d80bcb01c562316fbfce36c1
https://github.com/llvm/llvm-project/commit/97beb893a52e1863d80bcb01c562316fbfce36c1
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Log Message:
-----------
[lldb][Windows] Don't stack a new ReadFile on a timed-out one (#227759)
On Windows, `ConnectionGenericFile::Read` cleared `m_read_pending` when
a read was interrupted or timed out, even though its overlapped
`ReadFile` was still in flight.
The next Read then started a second ReadFile on the same OVERLAPPED and
buffer. When data finally arrived, both reads completed into one buffer
and the first part was lost. This made SwiftREPL tests like
`ExclusivityREPL` drop the first line of a program's output.
This patch makes it so an interrupted or timed-out read stays pending,
and the next Read waits on it. If it has already completed, Read
collects its result instead of blocking on an event that may have been
reset. Disconnect clears the pending state after `CancelIoEx`.
On a Windows PC with artificial 100% CPU usage, this reduced the failure
rate from 8/160 runs down to 0/160 runs.
Commit: b4bc2ce7de9e90af0ed925fb948d3c007676ccf7
https://github.com/llvm/llvm-project/commit/b4bc2ce7de9e90af0ed925fb948d3c007676ccf7
Author: irhs0 <happy.irhs at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
Log Message:
-----------
[Clang][X86] Add tests for AVX512 integer comparison intrinsics to be used in constexpr (#169452)
Covers the test for AVX512 comparison intrinsics mentioned in #162054
Next stage for #162054
Commit: 4a2ed5bc8ea94b4fb215ba82f23ae2df66beece3
https://github.com/llvm/llvm-project/commit/4a2ed5bc8ea94b4fb215ba82f23ae2df66beece3
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/include/device.h
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[offload][omp] Move OpenMP KLE to libomptarget (#223761)
Move preparations related to OpenMP KLE and dynamicCGroupMem fallback
out of the plugins into libomptarget.
Resructure Device::launch as it grew too large.
Assisted by Claude.
Commit: d4a06d8b5de60d290eda8c4b24fde00c57e15ca6
https://github.com/llvm/llvm-project/commit/d4a06d8b5de60d290eda8c4b24fde00c57e15ca6
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Compat.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
Log Message:
-----------
Revert "[Offload][L0][NFC] Remove unused zexKernelGetArgumentSize dispatcher" (#228485)
Reverts llvm/llvm-project#227589
Commit: e792fd9b23a5d3a02a824d8a69ed938ef6a342a0
https://github.com/llvm/llvm-project/commit/e792fd9b23a5d3a02a824d8a69ed938ef6a342a0
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
Log Message:
-----------
[VectorCombine] Preserve FMF when scalarizing FP intrinsics (#228211)
992ca79c83b0 refactored scalarizeOpOrCmp to pass IR flags during
instruction creation instead of copying them afterward. All branches
(compare, unary op, binary op) were updated to pass flags, but the
intrinsic branch was missed — CreateIntrinsic was called without an
FMFSource, silently dropping fast-math flags such as afn, arcp, and
contract.
This caused downstream crashes on targets where
the legalizer for G_FPOW requires the afn flag: VectorCombine
scalarized a vector llvm.pow(afn) into scalar llvm.pow calls without
afn.
Pass the original instruction's FMF to CreateIntrinsic via FMFSource,
guarded by isa<FPMathOperator> for non-FP intrinsic safety.
Fixes #192607 (partially — the original fix missed this case).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 7e18d9610ab30073144cc34d6e359ea24bd3a9b1
https://github.com/llvm/llvm-project/commit/7e18d9610ab30073144cc34d6e359ea24bd3a9b1
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
Log Message:
-----------
[mlir][MathToLLVM] Fix math.fpowi incorrectly being mapped to llvm.powi (#226089)
`math.fpowi` allows vector exponents, while `llvm.intr.powi` only takes
scalar exponents. This led to vector `math.fpowi` ops being lowered to
invalid IR.
This PR adds support for constant splat exponents, and leaves other
vector cases unconverted.
Commit: cb24ba3b310f7a97803fd2e975b62113efab93bc
https://github.com/llvm/llvm-project/commit/cb24ba3b310f7a97803fd2e975b62113efab93bc
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/reloc-alloc-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-no-symtab.test
Log Message:
-----------
[llvm-objcopy] Handle SHF_ALLOC relocation sections in relocatable files (#227204)
llvm-objcopy treats every SHF_ALLOC relocation section as dynamic and
requires its sh_link to refer to .dynsym. Linux livepatch modules
(ET_REL) contain SHF_ALLOC .klp.rela.* sections linked to .symtab
(SHF_ALLOC keeps them in module memory until the patched module loads),
so llvm-objcopy rejects them:
```
error: Link field value 4 in section .klp.rela.vmlinux.text is not a symbol table
```
A relocatable file has no dynamic symbol table, so treat all of its
relocation sections as static, as BFD does. Their symbol indexes are
then updated when the symbol table changes. Since SHF_ALLOC no longer
distinguishes RelocationSection from DynamicRelocationSection, record
the kind in RelocationSectionBase.
LLM-aided
Commit: 50e02cb7fd867c24b0e980e463c780ed0132147f
https://github.com/llvm/llvm-project/commit/50e02cb7fd867c24b0e980e463c780ed0132147f
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/lib/CGData/CMakeLists.txt
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/CMakeLists.txt
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/OptEmitter.cpp
A llvm/utils/TableGen/Basic/OptEmitter.h
A llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/Common/CMakeLists.txt
R llvm/utils/TableGen/Common/OptEmitter.cpp
R llvm/utils/TableGen/Common/OptEmitter.h
R llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/OptionRSTEmitter.cpp
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Common/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[TableGen] Generate library option structs with llvm-min-tblgen (#228338)
-gen-opt-parser-defs lives in llvm-tblgen, so a library whose options
are declared in TableGen (CGData, InstCombine, MC) waits for llvm-tblgen
to build before any of its sources compile, while it otherwise needs
only llvm-min-tblgen.
Move OptionParserEmitter and OptEmitter into TableGen/Basic, which
llvm-min-tblgen consists of, and generate those structs with
llvm-min-tblgen.
Aided by Opus 5.5
Commit: 58b70325a0548e6447dd6eeff9ea1e6f0426f6d2
https://github.com/llvm/llvm-project/commit/58b70325a0548e6447dd6eeff9ea1e6f0426f6d2
Author: Abdulmalek Almkainzi <aalmkainzi at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
A clang/test/Parser/c23-enum-generic-assoc.c
Log Message:
-----------
[Clang] Properly parse enumeration declarations with fixed underlying type in generic associations (#210353)
added a new `ParsingGenericAssociationType` flag that is managed by
`GenericAssociationTypeRAIIObject`. If that flag is true, when
encountering a `:` after enum name, try to parse next token as a type,
if successful, then that's the underlying type, if failed, then that is
the end of the enum declaration, and the colon will be parsed as the
generic association.
to check if the next tokens are a type, I added a new function
`isNextCXXTypeId`, which works the same as `isCXXTypeId`, but starts the
check one token ahead.
Fixed #207357
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: c4ce375075372d10ef4688ea04555005d4efaa4a
https://github.com/llvm/llvm-project/commit/c4ce375075372d10ef4688ea04555005d4efaa4a
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/instantiate-var-template.cpp
Log Message:
-----------
[Clang][Sema] Create LocalScope for Variable Template (#228280)
A variable template should create its own LocalScope, as it should be
opaque to other instantiations. This can occur when there are multiple
instantiations in the same lexical scope. The correct behavior is that
these instantiations should not be chained together.
Assisted-by: Claude # Test ReleaseNote
Fixes: #134148
Commit: fe1de64cb3c255ecf6f035ca3562c4550479f632
https://github.com/llvm/llvm-project/commit/fe1de64cb3c255ecf6f035ca3562c4550479f632
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/liboffload/API/Program.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/program/olIterateCompatibleDevices.cpp
Log Message:
-----------
[OFFLOAD] Add olIterateCompatibleDevices API (#226441)
Add a new API that iterates through all devices. For devices compatible
with the image (and their platform too) it calls the Callback.
Assisted by Claude.
Commit: e3ba0841a01eef468062f736e59ca7d014a4f11f
https://github.com/llvm/llvm-project/commit/e3ba0841a01eef468062f736e59ca7d014a4f11f
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/store_nd_3d_subview.mlir
Log Message:
-----------
[mlir][xegpu] Fix high-D nd base_height for non-packed plane strides (#225556)
CreateNdDescToXeVMPattern lowers a >2D nd descriptor by viewing the
source as one flattened 2D block surface. It set the surface height to
the product of all dims but the innermost, which is the right row extent
only when the leading (batch) planes are packed back to back. A subview
of a wider source leaves gaps between them, and the last planes end up
outside base_height, where the HW boundary check silently drops every
access to them.
This PR fixes the issue by using the following formula:
base_height = size[R-2] + sum_d (size[d] - 1) * (stride[d] /
stride[R-2])
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 48b67fee8cdc30afbb77e7e4629e2ba5704631c7
https://github.com/llvm/llvm-project/commit/48b67fee8cdc30afbb77e7e4629e2ba5704631c7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[OpenMPToLLVMIRTranslation] Save allocaIP after splitting (#228495)
allocatePrivateVars() splits the block, such that the original
saved insertion point now points into a different block. Move the
saving until after the call, so it uses the adjusted insertion
point.
This is an attempt to fix the amdgpu-clang-flang buildbot after
PR #228117.
Commit: 2b066829678436c9c82966c280466adfa82ba1aa
https://github.com/llvm/llvm-project/commit/2b066829678436c9c82966c280466adfa82ba1aa
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
Log Message:
-----------
[bazel] Keep lit tests on the platform-default runfiles mode (#228446)
rules_python 1.9.0 made `--enable_runfiles=true` the default for every
py_binary/py_test on Windows, applied through a per-target transition
(python/private/py_executable.bzl, `_add_config_setting_defaults`). This
caused the transitioned value differs from the top-level one, every lit
test gets an `-ST-<hash>` output directory, running into Windows
`MAX_PATH` issues resulting in failing tests with
```
Could not create process (...\mlir\mlir-opt.exe) due to
[WinError 267] The directory name is invalid
```
This change relies on the escape hatch from this transition by setting
`@rules_python//command_line_option:enable_runfiles` to `INHERIT` which
avoids the transition. This behavior is removed in rules_python 2.0.0
and thus upgrading beyond that threshold will break Windows tests.
Commit: 9df479b8d1fe53c38527caa1936dbda1ce9ec5c9
https://github.com/llvm/llvm-project/commit/9df479b8d1fe53c38527caa1936dbda1ce9ec5c9
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Stop forcing PIC on Windows (#228454)
CMake's LLVM_ENABLE_PIC defaults ON but is an explicit no-op on Windows:
the `elseif( WIN32 OR CYGWIN)` branch in HandleLLVMOptions.cmake is just
the comment "On Windows all code is PIC. MinGW warns if -fPIC is used."
In Bazel the same flag is fatal. rules_cc's auto-configured Windows
toolchain declares the `supports_pic` feature only in its non-MSVC
(mingw) branch. Building with this results in the following failure:
```
$ bazel build --nobuild --force_pic @llvm-project//llvm:Demangle
ERROR: local_config_cc/BUILD:340:13: in cc_toolchain rule @@...local_config_cc//:cc-compiler-x64_windows:
Error in fail: PIC compilation is requested but the toolchain does not support it (feature named 'supports_pic' is not enabled)
ERROR: Analysis of target '@@...local_config_cc//:cc-compiler-x64_windows' failed
ERROR: Analysis of target '@@+llvm_configure+llvm-project//llvm:Demangle' failed; build aborted: Analysis failed
```
Where building without it succeeds
```
$ bazel build --nobuild @llvm-project//llvm:Demangle
INFO: Analyzed target @@+llvm_configure+llvm-project//llvm:Demangle (110 packages loaded, 1760 targets configured).
```
Commit: ce7e1864de80d5695ddc064fb0a785125898af22
https://github.com/llvm/llvm-project/commit/ce7e1864de80d5695ddc064fb0a785125898af22
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Shard clang's analysis_flow_sensitive_tests (#228487)
The dataflow suite is 384 test cases across 22 files and grows with
every release. As one unsharded binary it runs for 135 s on a fast
agent, and on a slower one it overran Bazel's default 300s "moderate"
timeout on all three `--flaky_test_attempts`:
```
@llvm-project//clang/unittests:analysis_flow_sensitive_tests
TIMEOUT in 3 out of 3 in 300.1s
```
Give it the same declaration this file already uses for its other large
gtest binaries (ast_tests, ast_matchers_tests, format_tests,
rename_tests, tooling_tests, tooling_syntax_tests): `size = "medium"`
and `shard_count = 20`. Each shard then gets its own timeout for ~19
cases, which is a few seconds even on a slow machine.
Commit: 9f27e0165ddbd78385e2e3bc56fb747f2de18324
https://github.com/llvm/llvm-project/commit/9f27e0165ddbd78385e2e3bc56fb747f2de18324
Author: miyan <1138989048 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python] Avoid versioned Python DLL with stable ABI on Windows (#225794)
## Summary
On Windows, `add_mlir_python_extension` links every MLIR Python
extension and shared support library against `Python3_LIBRARY_RELEASE`,
even with `MLIR_ENABLE_PYTHON_STABLE_ABI=ON`. That adds a dependency on
the versioned Python DLL and prevents loading the abi3 modules with
another Python version.
nanobind's shared `-abi3` runtime already provides `Python::SABIModule`
as a public link dependency. Skip MLIR's extra versioned-library link
for stable ABI builds. Preserve it for non-stable and free-threaded
builds.
## Testing
Configured current upstream `main` (9120c137) with Python 3.12.11,
nanobind 2.9.2, clang-cl, Ninja, `MLIR_ENABLE_BINDINGS_PYTHON=ON`, and
`MLIR_ENABLE_PYTHON_STABLE_ABI=ON`, then built `_mlir.pyd`.
Before the change, `llvm-readobj --coff-imports` showed `python312.dll`
in both `_mlir.pyd` and `MLIRPythonSupport-mlir.dll`. Python 3.12 could
import and parse `module {}`, while Python 3.14 failed to load `_mlir`.
After the change, both binaries import only `python3.dll`. The same
build imports and parses `module {}` with Python 3.12 and 3.14. `git
diff --check` passes.
## AI assistance
OpenAI Codex assisted with the investigation, patch, testing, and
drafting this PR description.
Commit: e7e609e69ec43ce370f5e411ffb25076137955b7
https://github.com/llvm/llvm-project/commit/e7e609e69ec43ce370f5e411ffb25076137955b7
Author: David Spickett <david.spickett at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
Log Message:
-----------
[compiler-rt][hwasan][test] Temporarily disable hwasan_symbolize_stack_overflow.cpp (#228496)
HWASAN only keeps the lower 20 bits of the frame pointer, so if x plus
the access offset falls into the previous or following 1MB, the test
fails to realise that the access was done via. x.
This means it fails randomly on the buildbots, depending on ASLR and
other factors. See https://github.com/llvm/llvm-project/issues/228477
for details.
Commit: d9d72d603296da6188c8c8c1f56e6c515a4818a6
https://github.com/llvm/llvm-project/commit/d9d72d603296da6188c8c8c1f56e6c515a4818a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/X86/coalesce-commute-partial-def-implicit-read.mir
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
A llvm/test/CodeGen/X86/rematerialize-sub-super-reg-dead-flags.mir
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/CodeGen/X86/statepoint-ra.ll
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
Log Message:
-----------
RegisterCoalescer: Don't mark a remat def dead when the copy destination covers it (#226037)
When rematerializing into a physical register that is not exactly the copy's destination,
reMaterializeDef marks the rematerialized def dead and adds an implicit-def of the copy
destination. That is only correct when the rematerialized instruction defines more than the
copy asked for, so the extra part really is unused.
It is wrong when the def is covered by the copy destination, since then it is part of that live
value:
undef %0.sub_32bit:gr64 = MOV32ri -11
$rax = COPY %0
; coalesces to
dead $eax = MOV32ri -11, implicit-def $rax
$eax is the live low half of $rax, so it must not be dead. Only set the dead flag when the def
has register units the copy destination does not cover. This makes the dead flags consistent
with what LiveVariables would produce in these scenarios.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 101f57538b5b751c1b2e96f1936217e0bec48287
https://github.com/llvm/llvm-project/commit/101f57538b5b751c1b2e96f1936217e0bec48287
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/BuiltinTypes.def
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/PropertiesBase.td
A clang/include/clang/AST/Reflection.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
A clang/lib/AST/ByteCode/Reflect.h
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/AST/ast-dump-APValue-reflection.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-itanium.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-ms.cpp
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
R clang/test/CodeGenCXX/reflection-mangle-ms.cpp
A clang/test/PCH/reflection.cpp
A clang/test/PCH/reflection_include.h
A clang/test/Sema/reflection-meta-info.fail.cpp
A clang/test/Sema/reflection-meta-info.pass.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[clang]: support std::meta::info for primitive types (#190356)
This PR introduces std::meta::info type for reflection on primitive
types, as parsing right now only supports primitive types. This
implementation is based on the fork of @katzdm
For constant evaluation of std::meta::info, a new kind `Reflection` is
introduced in APValue::ValueKind.
For reflection mangling, the convention proposed in this issue is
applied - https://github.com/itanium-cxx-abi/cxx-abi/issues/208
Godbolt links:
Basic tests checked against gcc and clang fork:
https://godbolt.org/z/cj44oWcef
Expected fail tests checked against gcc and clang fork:
https://godbolt.org/z/d8aha3E63
Checked against gcc for mangling output: https://godbolt.org/z/bhb5YEY99
Commit: 662f00baf7bcfac0271f77f7496f5abcb2a6b33a
https://github.com/llvm/llvm-project/commit/662f00baf7bcfac0271f77f7496f5abcb2a6b33a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
A lldb/test/Shell/ObjectFile/ELF/gnu-debuglink-without-file-name.yaml
A lldb/test/Shell/ObjectFile/PECOFF/gnu-debuglink-without-file-name.yaml
Log Message:
-----------
[lldb] Don't crash on a .gnu_debuglink section without a file name (#228116)
A `.gnu_debuglink` section names the separate file that holds a binary's
debug info. When the section is empty, lldb crashes while loading the
binary, in both the `PECOFF` and `ELF` readers. `llvm-objcopy
--only-keep-debug` produces exactly such a section when it runs on a
binary that already has a debug link.
On Windows CI this crashes `TestSwiftSplitDebug` in `1/10` runs.
An empty or unterminated name is now treated as no debug link. New yaml
tests for both formats crash without the fix and pass with it.
Commit: 83c34fc0cbc9cef677297d3ab158f6901c128091
https://github.com/llvm/llvm-project/commit/83c34fc0cbc9cef677297d3ab158f6901c128091
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
Log Message:
-----------
[bazel] Mark llvm_repos_extension as reproducible (#228478)
This should remove unnecessary entries in `MODULE.bazel.lock` files
Commit: 69622642f6df6ada1f77587de44ce16e484d06a2
https://github.com/llvm/llvm-project/commit/69622642f6df6ada1f77587de44ce16e484d06a2
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
A clang/test/Sema/constexpr-builtin-stdc-memreverse8-typed.c
A clang/test/SemaCXX/constexpr-builtin-stdc-memreverse8.cpp
Log Message:
-----------
[clang] Add constexpr support for stdc_memreverse8 (#202402)
Implements constant expression evaluation in both the AST interpreter
(ExprConstant.cpp) and the bytecode interpreter (InterpBuiltin.cpp).
Adds constexpr tests for the typed variants
stdc_memreverse8u{8,16,32,64}
Follow up:#197358.
Commit: e6965d09301f0e6d8872a1fc974cf2f7d0463515
https://github.com/llvm/llvm-project/commit/e6965d09301f0e6d8872a1fc974cf2f7d0463515
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/block-in-critical-section.cpp
Log Message:
-----------
[NFC][analyzer] Replace BlockInCriticalSection MutexDescriptor with CallDescriptionMap (#224230)
Replace the variant-based matching in BlockInCriticalSectionChecker with
a CallDescriptionMap-based matching solution.
Aside from simplifying the implementation, this change has a secondary
goal of improving parity with PthreadLockChecker on the modeling side.
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
AI tools were used during the development of this change.
Commit: 25eada28e095f65baaef6bf9f7d2b9f439549ef8
https://github.com/llvm/llvm-project/commit/25eada28e095f65baaef6bf9f7d2b9f439549ef8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Narrow the mask when folding (vselect mask, (v16i8 (vtrunc (v8i64 x))), 0). (#228270)
vmtrunc expects the mask to have the same number of elements as the
source. Elements 8-15 of the result are always zero and don't require a
mask.
Found by adding SDTCisSameNumEltsAs to verifySDNode.
Assisted-by: Claude
Commit: 5a04c0a62947b12d1392abc71a5c72e88874e830
https://github.com/llvm/llvm-project/commit/5a04c0a62947b12d1392abc71a5c72e88874e830
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/MarkLive.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#228356)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
where the operands are known to be nonnull.
The operands are known to be nonnull in one of two ways:
- Preceding checks: In BPSectionOrderer.cpp,
reloc.getReferentInputSection() is called a few lines above (and the
caller checks r.referent.isNull()), guaranteeing the PointerUnion is
nonnull.
- Downstream code: The else or fallthrough branch unconditionally
calls cast<...> or dyn_cast<...> on the pointer, or dereferences it.
Assisted-by: Antigravity
Commit: c1b2dbb9b1094c47120a59a5b59ab3dbbc1e762a
https://github.com/llvm/llvm-project/commit/c1b2dbb9b1094c47120a59a5b59ab3dbbc1e762a
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/pr220959.ll
Log Message:
-----------
[CodeGen] Diagnose unsupported landingpad result types instead of asserting (#223205)
Fixes #220959
`SelectionDAGBuilder::visitLandingPad` reads the exception pointer and
the selector out of two registers, so it assumed the landingpad's result
type always decomposes into exactly two values and asserted otherwise.
LangRef doesn't promise that shape: it says how the personality
function's results are represented is target specific, the verifier only
checks that every landingpad in a function agrees on a type, and
`landingpad token` is already accepted. So `landingpad {}` (or
`landingpad i32`) is well-formed IR that the backend just can't lower,
and it took the whole compiler down with it.
Added a small `isExceptionPointerAndSelectorType` helper in
CodeGen/Analysis that checks the IR struct for a pointer-or-integer
exception object and an integer selector, which is what the lowering
actually consumes, and made both `visitLandingPad` and GlobalISel's
`translateLandingPad` check it before computing any value types.
SelectionDAG emits a `DiagnosticInfoUnsupported` error and lowers the
result to poison so compilation can carry on; GlobalISel fails the
translation and falls back. Added `llvm/test/CodeGen/X86/pr220959.ll`
with the empty struct from the report plus `i32`, a three-element struct
and `{ float, i32 }`, run at `-O2` and at `-O0` where FastISel hands the
landingpad back to SelectionDAG.
Commit: 76311659426a1c8ebb96480c9151f25af3b5f70d
https://github.com/llvm/llvm-project/commit/76311659426a1c8ebb96480c9151f25af3b5f70d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[LLVM] Add jhuber6 code owner files (#228501)
Summary:
Adds myself as an automatic reviewer to the core files that I created
and/or maintain.
Commit: a6ee5b1ee44136f2e7454186556b2b5f64323718
https://github.com/llvm/llvm-project/commit/a6ee5b1ee44136f2e7454186556b2b5f64323718
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[LLVM] Add jhuber6 code owner files (#228501)
Summary:
Adds myself as an automatic reviewer to the core files that I created
and/or maintain.
Commit: 25935c89b8c59dd14a1f263b61207e8b93732d90
https://github.com/llvm/llvm-project/commit/25935c89b8c59dd14a1f263b61207e8b93732d90
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Remove unnecessary check from (p)m(r)acc handling in LowerIntrinsic_WO_CHAIN. NFC (#228172)
This was rejecting MVT::i32 on RV64, but this check was mutually
exclusive with every other case handled in this block. We can let it go
to the final return SDValue().
I'm not sure we can even get to this case anyway since
ReplaceNodeResults should be called for an illegal MVT::i32 on RV64.
Commit: a86de2f60d03be1f57d60a699708dd576ffa42a5
https://github.com/llvm/llvm-project/commit/a86de2f60d03be1f57d60a699708dd576ffa42a5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-scheduled-order.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-runtime-stride-with-base-lane.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gep-mixed-index-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-zext-poison-lane.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP]Support copyable GEP/zext main ops and relax gather pointer compatibility
Extends copyable-element modeling to single-index scalar GEPs (copyable
lane = gep V, 0) and scalar zexts (copyable lane = zext of a truncated
constant), and treats constant-offset lanes (including the bare base
pointer) as compatible with any same-object pointer when classifying
gathered loads. Runtime-strided accesses like b[i*S] form a single
masked gather with a vectorized address splat(b) + zext(mul <0..7>, S)
instead of a strided-load/scalar-load/gather mix.
Fixes #63855
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/221599
Commit: bcd4ab8368a4278965a91ee7995b1b4404f9c6b9
https://github.com/llvm/llvm-project/commit/bcd4ab8368a4278965a91ee7995b1b4404f9c6b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
llvm-exegesis: Set the module triple and ABI-aware DataLayout (#228447)
The module used to assemble snippets only had a DataLayout set, which
was computed without the target ABI. Set the target triple on the
module, synthesize the "target-abi" module flag from the
TargetMachine's ABI option, and compute the DataLayout from it.
Without the ABI, a TargetMachine with a non-default ABI would hit the
incompatible DataLayout error when creating the MachineFunction.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 61e7c81c6ebc90a0f9996027853e0b8b5594bacc
https://github.com/llvm/llvm-project/commit/61e7c81c6ebc90a0f9996027853e0b8b5594bacc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocBasic.h
Log Message:
-----------
[CodeGen] Remove unused RABasic::UsableRegs (NFC) (#228351)
The last use was removed on June 20, 2012 in commit
03b87d5aaaa2399b9a537b6455bf564586894ff8.
Assisted-by: Antigravity
Commit: 5a1c296488818dab707d86b4762a96c04f89ea41
https://github.com/llvm/llvm-project/commit/5a1c296488818dab707d86b4762a96c04f89ea41
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/logical-convert.fir
Log Message:
-----------
[flang] Handle vector operands in logical op codegen (#225407)
FIR logical ops take `AnyLogicalOrIntegerLike` operands; this includes
vector types. This PR makes the `normalizeLogicalToI1` and
`extendI1ToType` utils type-agnostic so that they don't assert when
passing a non-scalar type.
Fixes e.g. the crash:
```mlir
; fir-opt --fir-to-llvm-ir="target=aarch64" crash.mlir
func.func @neqv_vector(%a: vector<4xi32>, %b: vector<4xi32>) -> vector<4xi32> {
%0 = fir.neqv %a, %b : vector<4xi32>
return %0 : vector<4xi32>
}
```
Commit: 04cff67bac4c949fea01151599cde96ad2967fe4
https://github.com/llvm/llvm-project/commit/04cff67bac4c949fea01151599cde96ad2967fe4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-dead-eflags.ll
Log Message:
-----------
X86: Mark the dead EFLAGS clobbers in FastISel i1 masking (#228044)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 7533de7a1400ef9a5fd8a8d2e9870a0863eba415
https://github.com/llvm/llvm-project/commit/7533de7a1400ef9a5fd8a8d2e9870a0863eba415
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Parser/message.h
M flang/lib/Parser/message.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang] Pass llvm::StringRef directly to message formatting (#228449)
Added an overload of MessageFormattedText::Convert for llvm::StringRef.
This removes the need to explicitly convert llvm::StringRef arguments to
std::string in calls to diagnostic functions (Say/Warn/Attach).
Only direct message arguments are changed; uses that feed
ToUpperCaseLetters (which takes std::string_view), llvm::Twine
concatenations, and variable initializers are left as-is. No behavioral
change.
Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
Commit: 5c38ca153312ea29871fcdd89a0a9ec678c9fb72
https://github.com/llvm/llvm-project/commit/5c38ca153312ea29871fcdd89a0a9ec678c9fb72
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/NVPTX/fenv-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing floating-point state libcalls (#228426)
Previously makeStateFunctionCall would hit a fatal error if the target has no
fegetenv/fesetenv/fegetmode/fesetmode implementation. Report a proper
context error and emit nothing.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 070264d5115d3faf3d29228009622e92cf18cdb8
https://github.com/llvm/llvm-project/commit/070264d5115d3faf3d29228009622e92cf18cdb8
Author: rdong8 <richarddong08 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Pin rules_cc_autoconf to 0.24.0 (#227956)
The GNU multiprecision deps (GMP, MPFR, MPC) bring in an old version of
`rules_cc_autoconf` that have some transitive includes pruned by newer
libc++:
```
external/rules_cc_autoconf+/autoconf/private/checker/debug_logger.h:43:33: error: no member named 'back_inserter' in namespace 'std'
43 | std::back_inserter(lower_level), ::tolower);
| ^~~~~~~~~~~~~
1 error generated.
```
This fix pins it to a newer version.
---------
Co-authored-by: Keith Smiley <keithbsmiley at gmail.com>
Commit: fc0993001ce85dc5f485ddb26bea29fd8ee15ac9
https://github.com/llvm/llvm-project/commit/fc0993001ce85dc5f485ddb26bea29fd8ee15ac9
Author: Arcadiy Ivanov <arcadiy at ivanov.biz>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
A llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-partial-unit-ref-addr.test
M llvm/unittests/CodeGen/DIETest.cpp
Log Message:
-----------
[AsmPrinter] Find a DIE's unit by its owner, not by its tag (#219660)
[AsmPrinter] Find a DIE's unit by its owner
Fix DIE::getUnitDie() for DW_TAG_partial_unit. The existing parent walk
recognizes unit roots by tag but omits partial units, so a cross-unit
DW_FORM_ref_addr can reach getDebugSectionOffset() without a unit and
assert.
Have getUnit() walk the parent chain until Owner contains a DIEUnit, then
derive getUnitDie() from that unit. A DIEUnit owns its unit DIE, so this
handles every unit root tag without maintaining another tag list and
still returns null for a DIE tree that no DIEUnit owns. Use
dwarf::isUnitType for the constructor assertion as well. Update the
DIEUnit comments to describe the owner-based walk.
Add unit coverage for all four unit root tags and an unowned DIE tree.
Add a dwarfutil test for resolving DW_FORM_ref_addr into a partial unit
with and without garbage collection. Keep that test on the classic
linker and omit --verify because of #219613 and #219365.
Fixes #219650.
Assisted-by: Claude Code
Commit: 08e245062b1028d09aadf8344d5d7e9177ce19d6
https://github.com/llvm/llvm-project/commit/08e245062b1028d09aadf8344d5d7e9177ce19d6
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Slide 1 up/down (#228049)
This patch supports packed slide 1 up/down intrinsics and codegen.
Commit: 2eda6f72ab01914b8aa1a13758e55ff57ad3b3d5
https://github.com/llvm/llvm-project/commit/2eda6f72ab01914b8aa1a13758e55ff57ad3b3d5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/mops-dead-nzcv.ll
Log Message:
-----------
AArch64/GlobalISel: Mark the MOPS pseudo NZCV def dead (#227643)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8aee09b1913ebd8f3bb26dd3165f2a645bb2fa80
https://github.com/llvm/llvm-project/commit/8aee09b1913ebd8f3bb26dd3165f2a645bb2fa80
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
[SYCL][Driver] Emit textual SPIR-V for device-only -S compilations (#227844)
With -fsycl -fsycl-device-only -S, the SYCL device backend step produced
textual LLVM IR. It now produces assembly, which for spirv64 is textual
SPIR-V from the SPIR-V backend. Adding -emit-llvm produces LLVM IR.
Commit: 47f4550f76ae4504966770405664c9665b1d861e
https://github.com/llvm/llvm-project/commit/47f4550f76ae4504966770405664c9665b1d861e
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
A flang/test/Analysis/AliasAnalysis/modref-call-null.fir
Log Message:
-----------
[flang] Treat null addresses as their own alias source (#228284)
A null pointer is associated with no address, so classifying it as an
allocation describes an object that does not exist. fir.absent and
address-typed fir.zero_bits both lower to that null. Recognizing the
null lets alias analysis keep it distinct from every object, including
other nulls, while a control-flow join of a null and an allocation is
still an allocation. A join whose every predecessor is a null is still a
null, and a call cannot read or write it.
One pattern this join has to recognize is a private copy that is either
freshly allocated or null:
%source_box = fir.load %source
%source_addr = fir.box_addr %source_box
%is_allocated = arith.cmpi ne, %source_addr, %null
%private_addr = fir.if %is_allocated -> !fir.heap<f32> {
%allocation = fir.allocmem f32
fir.result %allocation : !fir.heap<f32>
} else {
%null_allocation = fir.zero_bits !fir.heap<f32>
fir.result %null_allocation : !fir.heap<f32>
}
%private_box = fir.embox %private_addr : (!fir.heap<f32>) ->
!fir.box<!fir.heap<f32>>
%allocation is an allocation, %null_allocation is a null, and
%private_addr is an allocation: it is either new storage or no address,
so it cannot alias storage outside the branch.
Commit: 61914fd3ce4100d61859471f4fbc48db82185c0a
https://github.com/llvm/llvm-project/commit/61914fd3ce4100d61859471f4fbc48db82185c0a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
AArch64/GlobalISel: Mark the MOPS pseudo NZCV def dead (#227643)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d9c741c53f4c9402c93ef163c1d848ab3bec7511
https://github.com/llvm/llvm-project/commit/d9c741c53f4c9402c93ef163c1d848ab3bec7511
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add tests showing failure to convert 512-bit concats of 128-bit chains to X86ISD::SHUF128 nodes (#228512)
Commit: fea6c3c29ce4b70cf515de135e95736cfc2db50e
https://github.com/llvm/llvm-project/commit/fea6c3c29ce4b70cf515de135e95736cfc2db50e
Author: Anthony Latsis <alatsis at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Add SPIRVTypes.def to the module map (#228240)
Follow-up to https://github.com/llvm/llvm-project/pull/207077, which
added the file without listing it. Fixes "missing submodule
'Clang_Basic.SPIRVTypes'" in modular builds.
Commit: cd8c5d3359778db38df85cad46b71ee3777b2cff
https://github.com/llvm/llvm-project/commit/cd8c5d3359778db38df85cad46b71ee3777b2cff
Author: Riyaz Ahmad <riyaz86a at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
Log Message:
-----------
[compiler-rt][ubsan] Add powerpc64le support to offload UBSan HSA interceptors (#228007)
The HSA interceptor library was limited to` x86_64` and `aarch64`,
causing the `hsa-load-order` and `hsa-missing` lit tests to fail on
`powerpc64le`.
All dependencies (sanitizer_offload, RTSanitizerOffload,
llvm-libc-common-utilities)
are already available on powerpc64le Linux and the INTERCEPTOR macro
works
via standard ELF symbol interposition on that platform.
Add PPC64 to ALL_UBSAN_OFFLOAD_SUPPORTED_ARCH to extend support for
powerpc64le.
Co-authored-by: Riyaz Ahmad <riyaz.ahmad at ibm.com>
Commit: 62e30e3326d9b4e3948d242ccfee7aa4fc030ef3
https://github.com/llvm/llvm-project/commit/62e30e3326d9b4e3948d242ccfee7aa4fc030ef3
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fold neg/abs modifiers when mad-mix selects the low half (#223535)
selectVOP3PMadMixModsImpl re-runs the fneg/fabs match after rewriting Src to the 32-bit register the 16-bit value is a half of, but only did so on the isExtractHiElt path, not for isExtractLoElt.
The two halves are not symmetric. An fneg/fabs of a 32-bit float only touches bit 31, which is the sign bit of the high half, so folding it into a modifier on the selected high half is correct. The low half's sign bit is bit 15, which such an fneg/fabs leaves alone, so only a modifier that acts on each 16-bit element can be folded there. So the source must be a 2 x 16-bit vector to fold it.
Commit: 32681decfa6079748836719d9ddf8667fd2b81fc
https://github.com/llvm/llvm-project/commit/32681decfa6079748836719d9ddf8667fd2b81fc
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
A compiler-rt/test/asan/TestCases/Windows/intercept_memmove.cpp
Log Message:
-----------
[ASan][Windows] Intercept memcpy when the CRT provides it separately from memmove (#221491)
This is the third retry in a attempt to fix
https://github.com/llvm/llvm-project/issues/126077 (the other two
attempts being https://github.com/llvm/llvm-project/pull/192060 and
https://github.com/llvm/llvm-project/pull/193633)
I was looking at the wrong thing: I was trying to compare `&memcpy` and
`&memmove` in the ASan runtime itself; but the real problem in
https://github.com/llvm/llvm-project/issues/126077 was the dynamic CRT,
which provides non-aliased `&memcpy`.
Please see repro and output:
[output.txt](https://github.com/user-attachments/files/31870348/output.txt)
Historically, the CRT provided `memcpy` and `memmove` as a single
implementation, aliasing both symbols. Since Visual Studio 17.7
(vcruntime140.dll 14.38), [a rewrite of
`memmove`](https://devblogs.microsoft.com/cppblog/msvc-backend-updates-since-visual-studio-2022-version-17-3/)
has changed that. Instead of being aliased, `memcpy` now becomes a thunk
to `memmove`.
We now patch both symbols only if they are distinct (different
addresses). This currently applies only to the dynamic CRT, but if in
the future the static CRT provides two implementations, that should be
covered too.
Assisted by: Claude Fable 5
Fixes #126077
Commit: 9428f1b09f54d85f248b00d4e8aadb6cf0ad8098
https://github.com/llvm/llvm-project/commit/9428f1b09f54d85f248b00d4e8aadb6cf0ad8098
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
Log Message:
-----------
[CodeGen] Use SmallSetVector for getRegAllocationHints (#224472)
Change `TargetRegisterInfo::getRegAllocationHints` and all target
overrides to accept `SmallSetVector<MCPhysReg, 16> &Hints` instead of
`SmallVectorImpl`, structurally preventing duplicate register allocation
hints while preserving insertion order.
Assisted-by: Gemini
Link: #190139
Link: #193011
Link: #219007
Link: #224448
Link: #224451
Link: #224742
Commit: 2ff597266f56e275396fd684f3b1f2c28e4e47a4
https://github.com/llvm/llvm-project/commit/2ff597266f56e275396fd684f3b1f2c28e4e47a4
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
Log Message:
-----------
[clang][Modules] Reimplement Macro Expansion Record Source Location Delta Encoding (#223759)
Source location delta encoding was removed by
https://github.com/llvm/llvm-project/pull/145670 due to a difficult (and
eventually abandoned) bug fix
https://github.com/llvm/llvm-project/pull/145529.
This PR reimplements the encoding to avoid the bug, and adjusts the
order of the fields in the record so that delta encoding achieves more
savings relative to the order we had before.
Assisted by: Claude Code Opus 5.
Commit: c851fb6892a674a1388cf4231ed89244c331c3bf
https://github.com/llvm/llvm-project/commit/c851fb6892a674a1388cf4231ed89244c331c3bf
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M llvm/docs/LangRef.md
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
M llvm/include/llvm/IR/MDBuilder.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.h
M llvm/lib/IR/MDBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Analysis/MemorySSA/noalias-scope-decl.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
A llvm/test/Analysis/ScopedNoAliasAA/disjoint-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/fence-modref.ll
M llvm/test/Assembler/incomplete-ir-metadata.ll
A llvm/test/Bitcode/upgrade-alias-scope-domains.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
M llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-arguments-noalias-call-no-ptr-args.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-alias-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-noalias-kernargs.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-expand-unaligned-loads-noindexed.ll
M llvm/test/CodeGen/Hexagon/swp-conv3x3-nested.ll
M llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/memory-operands.mir
M llvm/test/CodeGen/PowerPC/non-simple-args-intrin.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-copy-memory.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-domain-order.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-scope-shared-across-functions.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/noalias-scope-decl.ll
M llvm/test/CodeGen/SystemZ/Large/branch-01.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/CodeGen/X86/memcpy-scoped-aa.ll
M llvm/test/CodeGen/X86/pr48727.ll
M llvm/test/DebugInfo/COFF/fortran-contained-proc.ll
M llvm/test/DebugInfo/Generic/sroa-samesize.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
M llvm/test/Transforms/DeadStoreElimination/scoped-noalias.ll
M llvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll
M llvm/test/Transforms/GVN/noalias.ll
M llvm/test/Transforms/GVN/rle-coerced-noalias.ll
M llvm/test/Transforms/IndVarSimplify/addrec_no_exec_on_every_iteration.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
M llvm/test/Transforms/Inline/AMDGPU/load-intrinsics.ll
M llvm/test/Transforms/Inline/noalias-calls-always.ll
M llvm/test/Transforms/Inline/noalias-calls.ll
M llvm/test/Transforms/Inline/noalias-calls2.ll
M llvm/test/Transforms/Inline/noalias-cs.ll
M llvm/test/Transforms/Inline/noalias-escape-source.ll
M llvm/test/Transforms/Inline/noalias.ll
M llvm/test/Transforms/Inline/noalias2.ll
M llvm/test/Transforms/Inline/noalias3.ll
M llvm/test/Transforms/Inline/pr48209.ll
M llvm/test/Transforms/Inline/pr50270.ll
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
M llvm/test/Transforms/InstCombine/bitcast-store.ll
M llvm/test/Transforms/InstCombine/fold-phi-load-metadata.ll
M llvm/test/Transforms/InstCombine/load-combine-metadata.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/memcpy-to-load.ll
A llvm/test/Transforms/InstCombine/noalias-scope-decl-disjoint-domain.ll
M llvm/test/Transforms/InstCombine/noalias-scope-decl.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/JumpThreading/free_instructions.ll
M llvm/test/Transforms/JumpThreading/noalias-scope-decl.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/LICM/AMDGPU/buffer-rsrc-ptrs.ll
M llvm/test/Transforms/LICM/dropped-tbaa.ll
M llvm/test/Transforms/LICM/hoist-metadata.ll
M llvm/test/Transforms/LICM/licm-ci.ll
M llvm/test/Transforms/LICM/pr42969.ll
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
M llvm/test/Transforms/LICM/scalar-promote.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/aa-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoopDeletion/noalias.ll
M llvm/test/Transforms/LoopDistribute/bounds-expansion-bug.ll
M llvm/test/Transforms/LoopDistribute/cross-partition-access.ll
M llvm/test/Transforms/LoopDistribute/followup.ll
M llvm/test/Transforms/LoopDistribute/no-reprocess.ll
M llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
M llvm/test/Transforms/LoopDistribute/outside-use.ll
M llvm/test/Transforms/LoopRotate/noalias.ll
M llvm/test/Transforms/LoopUnroll/noalias.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/cse-loads.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights-merged-mem-ops.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-threshold-with-force-metadata.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVersioning/add-phi-update-users.ll
M llvm/test/Transforms/LoopVersioning/crash-36998.ll
M llvm/test/Transforms/LoopVersioning/noalias-version-twice.ll
M llvm/test/Transforms/LoopVersioning/noalias.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
M llvm/test/Transforms/LowerInvoke/lowerinvoke.ll
M llvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll
M llvm/test/Transforms/MemCpyOpt/callslot_aa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_noalias.ll
M llvm/test/Transforms/MemCpyOpt/load-store-to-memcpy.ll
M llvm/test/Transforms/MemCpyOpt/memcpy.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-nonnull.ll
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
M llvm/test/Transforms/NewGVN/noalias.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
M llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/metadata.ll
M llvm/test/Transforms/Util/combine-alias-scope-metadata.ll
M llvm/test/Transforms/VectorCombine/alias.ll
M llvm/test/Verifier/alias-scope-metadata.ll
M llvm/test/Verifier/noalias_scope_decl.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll.expected
M llvm/test/tools/llubi/noalias_scope.ll
M llvm/unittests/MIR/MachineMetadata.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-alias-scopes.ll
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M polly/lib/CodeGen/IRBuilder.cpp
M polly/test/CodeGen/MemAccess/create_arrays.ll
M polly/test/CodeGen/annotated_alias_scopes.ll
M polly/test/CodeGen/invariant_load_alias_metadata.ll
M polly/test/CodeGen/scev-backedgetaken.ll
Log Message:
-----------
[IR] Add alias scope domains with disjoint scopes (#218768)
See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537
This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.
This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).
Commits to migrate passes to use disjoint scopes where that's an
option are future PRs.
AI disclosure: Claude did the coding on this one, I looked over it and
wrote this commit message
Commit: 0240730eff0d9c5ecbb152adc30a1104709c3250
https://github.com/llvm/llvm-project/commit/0240730eff0d9c5ecbb152adc30a1104709c3250
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/test/Analysis/AliasAnalysis/alias-analysis-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-4.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-6.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-7.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-9.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-allocatable.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-array.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-target.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-zero-offset-view-chain.fir
M flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
M flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
M flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/modref-alloc-free-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-external-name-conversion.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
M flang/test/Analysis/AliasAnalysis/modref-call-intent.fir
M flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
M flang/test/Analysis/AliasAnalysis/modref-call-recursive.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer-char-len.fir
M flang/test/Fir/CUDA/cuda-data-transfer-defer-acc-routine.mlir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
M flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
M flang/test/Fir/CUDA/cuda-sync-desc.mlir
M flang/test/Fir/CUDA/cuf-offload-livein-value-canonicalization.fir
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/any.fir
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/if-extra.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
M flang/test/Fir/FirToSCF/sum.fir
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
M flang/test/Fir/MIF/co_broadcast.mlir
M flang/test/Fir/MIF/co_max.mlir
M flang/test/Fir/MIF/co_min.mlir
M flang/test/Fir/MIF/co_sum.mlir
M flang/test/Fir/MIF/coarray-alloc.mlir
M flang/test/Fir/MIF/coarray_alloc_many_declare.mlir
M flang/test/Fir/MIF/cobound.mlir
M flang/test/Fir/MIF/coshape.mlir
M flang/test/Fir/MIF/form_team.mlir
M flang/test/Fir/MIF/get_team.mlir
M flang/test/Fir/MIF/image_index.mlir
M flang/test/Fir/MIF/num_images.mlir
M flang/test/Fir/MIF/sync_all.mlir
M flang/test/Fir/MIF/sync_images.mlir
M flang/test/Fir/MIF/sync_memory.mlir
M flang/test/Fir/MIF/sync_team.mlir
M flang/test/Fir/MIF/team_number.mlir
M flang/test/Fir/MIF/this_image.mlir
M flang/test/Fir/OpenACC/acc-erase-unused-kernel-allocations.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-clauses.mlir
M flang/test/Fir/OpenACC/acc-routine-to-gpu-func.fir
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Fir/OpenACC/device-ptr-to-cuf-kernel.mlir
M flang/test/Fir/OpenACC/legalize-data.fir
M flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-declare-storage.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-alloc.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-copy.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-free.mlir
M flang/test/Fir/OpenACC/propagate-attr-folding.fir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Fir/OpenACC/recipe-populate-private.mlir
M flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/Fir/OpenACC/use-device-canonicalizer.mlir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-coor-canonicalization.fir
M flang/test/Fir/boxproc-openmp.fir
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M flang/test/HLFIR/extents-of-shape-of.f90
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M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_compare.f90
M flang/test/Lower/Intrinsics/ieee_copy_sign.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
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M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_signbit.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/ierrno.f90
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M flang/test/Lower/Intrinsics/iparity.f90
M flang/test/Lower/Intrinsics/is_contiguous.f90
M flang/test/Lower/Intrinsics/is_iostat_value.f90
M flang/test/Lower/Intrinsics/ishft.f90
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M flang/test/Lower/Intrinsics/lbound.f90
M flang/test/Lower/Intrinsics/malloc.f90
M flang/test/Lower/Intrinsics/maxloc.f90
M flang/test/Lower/Intrinsics/maxval.f90
M flang/test/Lower/Intrinsics/merge.f90
M flang/test/Lower/Intrinsics/merge_bits.f90
M flang/test/Lower/Intrinsics/min.f90
M flang/test/Lower/Intrinsics/minloc.f90
M flang/test/Lower/Intrinsics/minval.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/Intrinsics/move_alloc.f90
M flang/test/Lower/Intrinsics/mvbits-unsigned.f90
M flang/test/Lower/Intrinsics/mvbits.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/test/Lower/Intrinsics/not.f90
M flang/test/Lower/Intrinsics/perror.f90
M flang/test/Lower/Intrinsics/product.f90
M flang/test/Lower/Intrinsics/putenv-func.f90
M flang/test/Lower/Intrinsics/putenv-sub.f90
M flang/test/Lower/Intrinsics/rand.f90
M flang/test/Lower/Intrinsics/real.f90
M flang/test/Lower/Intrinsics/reduce.f90
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M flang/test/Lower/Intrinsics/rrspacing.f90
M flang/test/Lower/Intrinsics/rtc.f90
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M flang/test/Lower/Intrinsics/selected_char_kind.f90
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M flang/test/Lower/Intrinsics/shape.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/Intrinsics/signal.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/sizeof.f90
M flang/test/Lower/Intrinsics/sum.f90
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M flang/test/Lower/Intrinsics/timef.f90
M flang/test/Lower/Intrinsics/tokenize.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/Intrinsics/transpose.f90
M flang/test/Lower/Intrinsics/transpose_opt.f90
M flang/test/Lower/Intrinsics/trim.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/Intrinsics/ubound01.f90
M flang/test/Lower/Intrinsics/unlink-func.f90
M flang/test/Lower/Intrinsics/unlink-sub.f90
M flang/test/Lower/Intrinsics/verify.f90
M flang/test/Lower/MIF/coarray_alloc_many_declare.f90
M flang/test/Lower/MIF/coarray_allocation.f90
M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/MIF/sync_all.f90
M flang/test/Lower/MIF/sync_images.f90
M flang/test/Lower/MIF/sync_memory.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenACC/acc-atomic-update-hlfir.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-common.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned.f90
M flang/test/Lower/OpenACC/acc-declare-interface-body.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
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M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
M flang/test/Lower/OpenACC/acc-no-create-array-section.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
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M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
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M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
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M flang/test/Lower/OpenMP/atomic-update-reassoc-fp.f90
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M flang/test/Lower/OpenMP/cancel.f90
M flang/test/Lower/OpenMP/cancellationpoint.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
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M flang/test/Lower/OpenMP/compiler-directives-loop.f90
M flang/test/Lower/OpenMP/composite_simd_linear.f90
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M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/copyprivate-equivalence.f90
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M flang/test/Lower/OpenMP/copyprivate5.f90
M flang/test/Lower/OpenMP/copyprivate6.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
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M flang/test/Lower/OpenMP/declare-reduction-allocatable-real.f90
M flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
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M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
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M flang/test/Lower/OpenMP/delayed-privatization-cuda-device-array.cuf
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M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/different_vars_lastprivate_barrier.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/dynamic-len-char-bounds-gen.f90
M flang/test/Lower/OpenMP/firstprivate-commonblock.f90
M flang/test/Lower/OpenMP/flush.f90
M flang/test/Lower/OpenMP/fuse01.f90
M flang/test/Lower/OpenMP/fuse02.f90
M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
M flang/test/Lower/OpenMP/groupprivate-modfile.f90
M flang/test/Lower/OpenMP/groupprivate.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/indirect-reference-privatization.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-sections-firstprivate.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/local-intrinsic-sized-array-map.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/metadirective-loop.f90
M flang/test/Lower/OpenMP/mismatched-bound-types.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/omp-declare-target-program-var.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
M flang/test/Lower/OpenMP/optional-argument-map.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex-mul.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
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M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-character.f90
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M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/reduction-array-element.f90
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M flang/test/Lower/OpenMP/reduction-equivalence.f90
M flang/test/Lower/OpenMP/requires-atomic-default-mem-order.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/scope.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
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M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/simd-linear.f90
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M flang/test/Lower/OpenMP/task-depend-array-section.f90
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M flang/test/Lower/OpenMP/task.f90
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M flang/test/Lower/OpenMP/taskgroup-task-array-reduction.f90
M flang/test/Lower/OpenMP/taskgroup-task_reduction01.f90
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M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M flang/test/Lower/OpenMP/threadprivate-char-array-chararray.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-hlfir.f90
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M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
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M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
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M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
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M flang/test/Lower/OpenMP/tile01.f90
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M flang/test/Lower/OpenMP/unroll-heuristic01.f90
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M flang/test/Lower/charconvert.f90
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M flang/test/Lower/complex-operations.f90
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M flang/test/Lower/dummy-argument-optional.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/equivalence-3.f
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/extrn_subp.f90
M flang/test/Lower/finit-local-exclusions.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-array.f90
M flang/test/Lower/forall/forall-construct-2.f90
M flang/test/Lower/forall/forall-construct-3.f90
M flang/test/Lower/forall/scalar-substring.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/host_module_variable_instantiation.f90
M flang/test/Lower/host_module_variable_instantiation_use_device.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/if-loc.f90
M flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/io-asynchronous.f90
M flang/test/Lower/io-char-array.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-item-list.f90
M flang/test/Lower/io-statement-clean-ups.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/memory-alloc.f90
M flang/test/Lower/namelist.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pause-statement.f90
M flang/test/Lower/percent-val-actual-argument.f90
M flang/test/Lower/percent-val-value-argument.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-disassociate.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/proc_pointer_hidden_by_generic.f90
M flang/test/Lower/rank-clause02.f90
M flang/test/Lower/reallocate-lhs.f90
M flang/test/Lower/repack-arrays.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/select-type-2.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Lower/submodule-async-volatile.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/transformational-intrinsics.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/user-defined-operators.f90
M flang/test/Lower/variable-common-viewed-as-module-var.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Lower/volatile-allocatable.f90
M flang/test/Lower/volatile-allocatable1.f90
M flang/test/Lower/volatile-derived-type-pointer.f90
M flang/test/Lower/volatile-derived-type.f90
M flang/test/Lower/volatile-openmp.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-openmp2.f03
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Lower/where-allocatable-assignments.f90
M flang/test/Lower/where.f90
M flang/test/Lower/zero-size.f90
M flang/test/Semantics/CUDA/cuda-managed-implicit-modfile.cuf
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/allocatable.f90
M flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/implicit_mapper.f90
M flang/test/Transforms/DoConcurrent/local_device.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/nested_derived_type_device.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/reduce_add.mlir
M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
M flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/DoConcurrent/reduce_local.mlir
M flang/test/Transforms/DoConcurrent/runtime_sized_array.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
M flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
M flang/test/Transforms/FIRToMemRef/alloca.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-op.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-slice-shift.mlir
M flang/test/Transforms/FIRToMemRef/complex.mlir
M flang/test/Transforms/FIRToMemRef/convert-opt.mlir
M flang/test/Transforms/FIRToMemRef/derived-types.mlir
M flang/test/Transforms/FIRToMemRef/index-overflow-flags.mlir
M flang/test/Transforms/FIRToMemRef/index.mlir
M flang/test/Transforms/FIRToMemRef/load-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-dynamic.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/load-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/logical.mlir
M flang/test/Transforms/FIRToMemRef/omp-wsloop-simd-private.mlir
M flang/test/Transforms/FIRToMemRef/reject-conversions.mlir
M flang/test/Transforms/FIRToMemRef/replace.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/FIRToMemRef/store-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/store-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/store-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/tbaa-tag.mlir
M flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/FIRToMemRef/view-op-wraps-array-coor.mlir
M flang/test/Transforms/FIRToMemRef/volatile-codegen.mlir
M flang/test/Transforms/FIRToMemRef/volatile.mlir
M flang/test/Transforms/OpenACC/acc-implicit-copy-reduction.fir
M flang/test/Transforms/OpenACC/acc-implicit-data-device-data.fir
M flang/test/Transforms/OpenACC/acc-implicit-data.fir
M flang/test/Transforms/OpenACC/acc-optimize-firstprivate-map.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-kernel-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/test/Transforms/OpenACC/offload-target-verifier.fir
M flang/test/Transforms/OpenMP/lower-workdistribute-runtime-assign-scalar.mlir
M flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
M flang/test/Transforms/constant-argument-globalisation.fir
M flang/test/Transforms/debug-107988.fir
M flang/test/Transforms/debug-92391.fir
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/debug-assumed-rank-array.fir
M flang/test/Transforms/debug-assumed-shape-array-2.fir
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-char-type-2.fir
M flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/debug-cuf-device-variable.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
M flang/test/Transforms/debug-dummy-argument.fir
M flang/test/Transforms/debug-fake-use-multiple-dimensions.fir
M flang/test/Transforms/debug-fake-use-multiple-returns.fir
M flang/test/Transforms/debug-fake-use.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-include-file.fir
M flang/test/Transforms/debug-local-constant.fir
M flang/test/Transforms/debug-local-global-storage-1.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-3.fir
M flang/test/Transforms/debug-omp-target-internal-proc.fir
M flang/test/Transforms/debug-omp-target-op-1.fir
M flang/test/Transforms/debug-omp-target-op-2.fir
M flang/test/Transforms/debug-proc-ptr.fir
M flang/test/Transforms/debug-use-stmt.fir
M flang/test/Transforms/debug-variable-array-dim.fir
M flang/test/Transforms/debug-variable-char-len.fir
M flang/test/Transforms/do-concurrent-localizer-boxchar.fir
M flang/test/Transforms/do-concurrent-localizer-dealloc-region.fir
M flang/test/Transforms/do-concurrent-localizer-init-region.fir
M flang/test/Transforms/do_concurrent-to-do_loop-unodered.fir
M flang/test/Transforms/function-attrs.fir
M flang/test/Transforms/licm-acc-compute-region.fir
M flang/test/Transforms/licm-allocmem-cufaloc.mlir
M flang/test/Transforms/licm-nested-hoist-aggressive.fir
M flang/test/Transforms/licm-non-addressable-resource.mlir
M flang/test/Transforms/licm.fir
M flang/test/Transforms/loop-versioning-with-repack-arrays.fir
M flang/test/Transforms/loop-versioning.fir
M flang/test/Transforms/lower-repack-arrays-openacc.fir
M flang/test/Transforms/lower-repack-arrays-openmp.fir
M flang/test/Transforms/lower-repack-arrays.fir
M flang/test/Transforms/omp-automap-to-target-data.fir
M flang/test/Transforms/omp-map-info-finalization-member-record.fir
M flang/test/Transforms/omp-map-info-finalization-name-loc.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M flang/test/Transforms/omp-reduction-cfg-conversion.fir
M flang/test/Transforms/optimize-array-repacking.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
M flang/test/Transforms/stack-arrays.fir
M flang/test/Transforms/tbaa-cray-pointer.fir
M flang/test/Transforms/tbaa-derived-type-records.fir
M flang/test/Transforms/tbaa-derived-with-descriptor.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-local-alloc-threshold.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-type-converter-boxproc.fir
M flang/test/Transforms/tbaa-value-dummy-arg.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
Log Message:
-----------
Make Flang dialect assembly formats strict properties compatible (#226602)
Enable strict properties in FIR, HLFIR, CUF, MIF, and FIRCG. Bind
inherent attributes explicitly in custom formats and update Flang
assembly checks.
Assisted-by: Codex
Commit: 7232ec8b92e50c4a1ac6a268a7ce8384941104ec
https://github.com/llvm/llvm-project/commit/7232ec8b92e50c4a1ac6a268a7ce8384941104ec
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
Log Message:
-----------
[NFC][sanitizer] Link LLVMOption and allow strtof in internal symbolizer (#228490)
Commit f6c78b8262f4 (#228321) moved MC command-line options into
`MCCLOptions.cpp` and added an `LLVMOption` dependency to `LLVMMC`.
Because
`MCAsmInfo.cpp` references `MCCLOptions::Global`, `MCCLOptions.cpp` and
its
generated option parser (which also calls `strtof` via `llvm::to_float`)
are
pulled into the internal symbolizer link.
Add `LLVMOption` to `build_symbolizer.sh` and `strtof U` to
`global_symbols.txt` so internal symbolizer builds and symbol
verification
succeed.
Fixes: https://lab.llvm.org/buildbot/#/builders/66/builds/38119
Assisted-by: Gemini
Commit: 2d91fec6daa9f64add1dcef41454b5066a208731
https://github.com/llvm/llvm-project/commit/2d91fec6daa9f64add1dcef41454b5066a208731
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc.ll
Log Message:
-----------
[X86] combineConcatVectorOps - ensure all suboperand concatenation types are simple (#228522)
Fixes #228264
Commit: 9919736e294ec0dd8cac981088911884aad9500d
https://github.com/llvm/llvm-project/commit/9919736e294ec0dd8cac981088911884aad9500d
Author: leovance <leovancekang at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-attrless-parallel-ancestors.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
Log Message:
-----------
[mlir][OpenACC] Diagnose unmapped parallel loops in GPU lowering (#225641)
ACCCGToGPU requires parallel dimensions to be assigned before lowering.
Diagnose scf.parallel operations without acc.par_dims inside
acc.compute_region before rewriting.
Keep barrier ancestor lookups within the current compute region so
enclosing host loops are not treated as GPU execution scopes.
Add diagnostic coverage for unmapped parallel loops in func.func and
gpu.func, including nested regions, and verify that surrounding host
loops remain valid. Give the launch-argument remapping test explicit
sequential dimensions.
Commit: 263476d17dbda3bd90ff0343bc580a563b795c15
https://github.com/llvm/llvm-project/commit/263476d17dbda3bd90ff0343bc580a563b795c15
Author: Naaz30 <75685808+Naaz30 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/invalid.mlir
Log Message:
-----------
[mlir][acc] Fixes Issue HostDataOp verifier crash on block-argument data operands (#228226)
Used dyn_cast_if_present in HostDataOp::verify so data operands with no
defining op (block arguments) emit "expect data entry operation as
defining op" instead of asserting in dyn_cast.
Fixes #226641
Commit: de45316ea7154cd9c0cbb956bb95193ac5bfa1ff
https://github.com/llvm/llvm-project/commit/de45316ea7154cd9c0cbb956bb95193ac5bfa1ff
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
Log Message:
-----------
[CIR][NFC] Fix missing enum elements warning (#228525)
Fix missing enum Reflection and MetaInfo elements warnings after #190356
Commit: 8c2682d5f851d56cdd6d58b87c157908c84d4e02
https://github.com/llvm/llvm-project/commit/8c2682d5f851d56cdd6d58b87c157908c84d4e02
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wide-alm-const.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-attrs-masked.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-active-lane-mask-all-false.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-scalable-active-lane-mask.ll
A llvm/test/Transforms/LoopVectorize/VPlan/foldable-active-lane-mask.ll
Log Message:
-----------
[VPlan] Constant-fold ActiveLaneMask intrinsics (#208852)
Fold get.active.lane.mask via the InstSimplifyFolder, in
tryToFoldLiveIns.
Commit: 944da4158b5347817aec787790219f42ab320801
https://github.com/llvm/llvm-project/commit/944da4158b5347817aec787790219f42ab320801
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Log Message:
-----------
[CIR][mlir] Use cached symbol tables for comdat lookups (#227127)
Every function or global with a comdat looked its selector up by name
with a linear scan of the comdat region, making CIR to LLVM lowering
quadratic in the number of comdats. This happened in three places:
- CIR's lowering of functions and globals: use the patterns' shared
SymbolTableCollection.
- The LLVM dialect comdat verifier, run on every function and global in
each verification: check the comdat in verifySymbolUses, which gets a
SymbolTableCollection.
- ModuleTranslation: use its existing SymbolTableCollection.
On the most expensive self-host TUs this cuts lowering from 30-96 s to
8-11 s and total compile time by 18-61%. Output is unchanged.
Commit: 409227b0ddba85cc0c612f17eb7646b6e5297eb4
https://github.com/llvm/llvm-project/commit/409227b0ddba85cc0c612f17eb7646b6e5297eb4
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
Log Message:
-----------
[Attributor] Remove unused functions (NFC) (#226906)
AA::isGPUGenericAddressSpace, AA::isGPUGlobalAddressSpace:
Introduced on April 27, 2026 in commit
97dc0fcbceea0871ab86ecf6d534be42b42bc7d3 without any callers.
AADepGraphNode::getDeps:
Introduced on July 28, 2020 in commit
5ee07dc53fcaaad35d33478e8702e443ac1cb058 without any callers.
IRPosition::getNumArgs, IRPosition::getArg:
Introduced on June 19, 2023 in commit
5186c2f9f83131f87ee3dc308ac5f18c019998c5 without any callers.
IRPosition::isReturnPosition (0-argument overload):
Introduced on April 17, 2020 in commit
8228153f87707e9760a648608806cdba5e58141c without any callers.
Attributor::ArgumentReplacementInfo::getReplacementTypes:
Introduced on October 10, 2019 in commit
751336340dabc58f178a24f7b169f33366316f70 without any callers.
BooleanState::setAssumed:
Introduced on October 20, 2019 in commit
1a74645a70b38b48ff93251f7e7e51b2ab2ab403 without any callers.
AAUndefinedBehavior::isAssumedToCauseUB,
AAUndefinedBehavior::isKnownToCauseUB (0-argument overloads):
Introduced on December 24, 2019 in commit
58f324a468ffc66398199f1a55218e10b718e495 without any callers.
AAIsDead::isLiveInstSet:
The last callers were removed on August 14, 2019 in commit
def9928204e76b33cac8a98d54e995b7a6bb145d.
AAInstanceInfo::isKnownUniqueForAnalysis:
Introduced on March 16, 2022 in commit
af30de7788e121ec626d412abb5bddebd7701aee without any callers.
AAPrivatizablePtr::isKnownPrivatizablePtr:
Introduced on October 30, 2019 in commit
89c2e733e80ee35921ad4aff8058c3ff9d933c54 without any callers.
PotentialValuesState::contains:
Introduced on June 21, 2022 in commit
bf789b1957efd2482e1dbd164d91a6612a450fe3 without any callers.
PotentialValuesState::intersectWith:
Introduced on August 7, 2020 in commit
c575ba28de2f24cb2fd602780029bdaa8e0ce4a5 without any callers.
AAPointerInfo::Access::setWrittenValueUnknown:
The last caller was removed on December 12, 2022 in commit
6a2305484e8726da026790f803edfe4dd2abf6ae.
AAPointerInfo::Access::getUniqueRange, AAPointerInfo::Access::addRange:
Introduced on December 12, 2022 in commit
6a2305484e8726da026790f803edfe4dd2abf6ae without any callers, leaving
AAPointerInfo::RangeList::insert (1-argument overload) and
AAPointerInfo::RangeList::getUnique without any callers.
AAPointerInfo::Access::hasUniqueRange:
The last caller was removed on January 22, 2023 in commit
538cd2e8833eccc47179add268609b5adc558465, leaving
AAPointerInfo::RangeList::isUnique without any callers.
Assisted-by: Antigravity
Commit: 6eeeb77e4f4e59b9e5b893538ac2d001eb082e24
https://github.com/llvm/llvm-project/commit/6eeeb77e4f4e59b9e5b893538ac2d001eb082e24
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisInt in SDNodeInfo::verifyNode. (#228511)
Assisted-by: Claude
Commit: da86223397858d30fc4207d89d700407f20449cd
https://github.com/llvm/llvm-project/commit/da86223397858d30fc4207d89d700407f20449cd
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
Log Message:
-----------
[NFC][SLP] Make choice of dyn_cast_or_null vs dyn_cast_or_present consistent (#228180)
Are functionally idenitical (dyn_cast_or_null is wrapper around
dyn_cast_if_present). Should be consistent within SLPVectorizer which
one we choose to use.
Commit: 1e97af82ecfe40614b317a0bebcbe431807f67ca
https://github.com/llvm/llvm-project/commit/1e97af82ecfe40614b317a0bebcbe431807f67ca
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/test/tools/llvm-cas/lit.local.cfg
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Support boot time on Windows and tolerate a moving boot time (#227433)
Compute the boot time on Windows from the current time and
GetTickCount64(), so that validate-if-needed can skip validation once
the data has been validated since boot.
A boot time computed from the current time moves when the clock is
adjusted, so a later computation during the same boot can be earlier
than the recorded one, which the exact comparison treated as a reboot.
Treat a recorded boot time that is not earlier than the current one
as the same boot instead, since a reboot always makes the boot time
later.
Commit: 4d7ad2874b98509e83c692665fd9803054f8a909
https://github.com/llvm/llvm-project/commit/4d7ad2874b98509e83c692665fd9803054f8a909
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/memtag.h
Log Message:
-----------
[scudo] Disable tagging when running with asan. (#227516)
The fuzzer defaults to running with asan, and adding tags to pointers
confuses asan and causes crashes. Therefore, disable memory tagging when
asan is detected.
Commit: 1f5252fbab55d88d88e912eebb46c6831ddb787f
https://github.com/llvm/llvm-project/commit/1f5252fbab55d88d88e912eebb46c6831ddb787f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/modref-call-null.fir
M flang/test/Lower/OpenMP/optional-argument-map-4.f90
Log Message:
-----------
[flang] Update leftover tests after merging #226602 (#228540)
#226602 Change the assembly format for the flang dialects. These tests
were likely newer than the last rebase of the PR and need some updates.
Commit: 08d73ebd6b67609886b86853c17327acf9c5f161
https://github.com/llvm/llvm-project/commit/08d73ebd6b67609886b86853c17327acf9c5f161
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[X86][NewPM] Add UnpackMachineBundlePass to x86 newPM pipeline (#228468)
The pass was not added to x86 newPM pipeline when the pass was ported
here: https://github.com/llvm/llvm-project/pull/184918
Commit: 1d07d16b78398848041e650d919d634c782e8309
https://github.com/llvm/llvm-project/commit/1d07d16b78398848041e650d919d634c782e8309
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Module.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Implement unsupported alignment check (#224081)
This patch implements the legality check for unsupported alignment by
the target.
Commit: 38e6c0073c423c3945a92d8bb4bf43db029b9d56
https://github.com/llvm/llvm-project/commit/38e6c0073c423c3945a92d8bb4bf43db029b9d56
Author: Yannick Daveluy <yannick.daveluy at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
A llvm/test/CodeGen/WebAssembly/tailcall-byval-musttail.ll
M llvm/test/CodeGen/WebAssembly/tailcall.ll
Log Message:
-----------
[WebAssembly] Do not tail call with byval arguments (#227491)
Resolve issue #66216 by preventing byval arguments from tail call.
`LowerCall` copies each byval argument into the caller's stack frame,
but when the call is lowered as a `return_call`, that frame is released
before the callee reads the copy. The existing check only rejected
arguments that are allocas in the IR. So byval arguments coming from a
global, or forwarded from the caller's own byval parameter, were
miscompiled. C++ non-virtual thunks forward parameters that way: on
wasm32 this hits any multiple-inheritance override taking `std::span` or
`std::string_view` by value.
Such calls are now lowered as regular calls, and a `musttail` call with
a byval argument reports an error instead of being miscompiled.
Fixes #66216.
Assisted-by: Claude Code
Commit: 672756a6f9ea9f4a25ce9a41aa35f10a6bd6149c
https://github.com/llvm/llvm-project/commit/672756a6f9ea9f4a25ce9a41aa35f10a6bd6149c
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/test/Sema/redefine_extname.c
M clang/test/Sema/redefine_extname.cpp
Log Message:
-----------
[Clang] Fix stale linkage cache when merging redeclarations (#222523)
A linkage query before a declaration is connected to a preceding static
declaration may leave stale cached linkage and trigger an assertion.
Invalidate cached linkage in Redeclarable::setPreviousDecl() so it is
recomputed from the complete redeclaration chain.
Assisted-by: GPT-5.6
This PR description was drafted with the assistance of AI. I personally
debugged, reviewed, and verified the code, and I fully understand the
changes.
Fixes https://github.com/llvm/llvm-project/issues/204759 and
https://github.com/llvm/llvm-project/issues/204754
Commit: 9e6cebb6b7e96c91225bf535c7c0e9313c49f313
https://github.com/llvm/llvm-project/commit/9e6cebb6b7e96c91225bf535c7c0e9313c49f313
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/OpenACCToLLVM/ACCAtomicPatterns.cpp
M mlir/test/Conversion/OpenACCToLLVM/atomic.mlir
Log Message:
-----------
[mlir][acc] Lower i1 and/or/xor atomic updates on the containing byte (#228551)
Example:
```mlir
acc.atomic.update %x : memref<i1> {
^bb0(%arg: i1):
%0 = arith.ori %arg, %val : i1
acc.yield %0 : i1
}
```
This lowered to an `atomicrmw` on `i1`, which LLVM rejects: atomics operate on
whole bytes or wider. Such updates come from combining a logical reduction such
as `any` or `all` across blocks.
Fix: an i1 occupies a byte, and and/or/xor keep a 0/1 byte 0/1, so zero-extend
the operand to i8 and apply the atomicrmw to the byte. Other operations on i1
are unchanged.
Commit: f7c5dafcb58b60e2fa9305be967c3960144412fd
https://github.com/llvm/llvm-project/commit/f7c5dafcb58b60e2fa9305be967c3960144412fd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[CIR][OpenACC] Correct enter-data wait merging behavior for all but d… (#228499)
…evnum.
We should be able to merge 'wait'. On the bug report, we determined that
'empty wait' should effectively override everything, so this patch
implements this. Also, waits without a devnum are the same as just the
same lists being merged.
The dialect still needs to figure out how to represent multiple
dev-nums, so this is left as an assert, and clang just won't be able to
get this to work yet.
Fixes: #227981
Commit: c2ced4b23408a3fa5ea4d8d97d57aac639036abe
https://github.com/llvm/llvm-project/commit/c2ced4b23408a3fa5ea4d8d97d57aac639036abe
Author: pzhengqc <55604844+pzhengqc at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
A llvm/test/CodeGen/AArch64/sext-asr.ll
Log Message:
-----------
[AArch64] Avoid folding sext into ALU when it can be folded with an asr (#228244)
With
```
%shr = ashr i32 %b, 2
%ext = sext i32 %shr to i64
%add = add nsw i64 %a, %ext
```
LLVM currently folds the sext into the add, and generates
```
asr w8, w1, #2
add x0, x0, w8, sxtw
```
This patch tries to avoid folding the sext into the add if it can be
folded with
an asr to form an SBFX. With this patch, LLVM generates the following
instead
which is more efficient on many Arm CPUs because an extending add is a
more
expensive operation.
```
sbfx x8, x1, #2, #30
add x0, x0, x8
```
This also fixes #224696 by avoiding folding the sext into add, thus
allowing the
machine combiner to fold the mul and add into an madd.
Commit: 074d9dcac6b6632b1930995f5cdf3d41bd51e263
https://github.com/llvm/llvm-project/commit/074d9dcac6b6632b1930995f5cdf3d41bd51e263
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/wide-string.cpp
Log Message:
-----------
[CIR] Fix handling of wide-string values >2^31. (#228101)
This showed up in Bruno's bug report, but is a pretty easy one. We were
using the wrong overload of IntAttr::get and ended up having the value
converted to a 64 bit, and it is obviously too big to fit back into the
32 bit value. This patch uses the APInt overload to make sure we keep
the size correct.
Commit: 48d9475bca12953450cf296516795e5b382a7352
https://github.com/llvm/llvm-project/commit/48d9475bca12953450cf296516795e5b382a7352
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-gang-reduction-store.mlir
Log Message:
-----------
[mlir][acc] Combine gang reduction stores across blocks safely (#228505)
Example:
```mlir
%bx = acc.par_width par_dim(#acc.par_dim<block_x>)
acc.compute_region launch(%kbx = %bx) ins(%a_res = %arg_res) : (memref<i32>) {
scf.parallel (%iv) = (%c0) to (%kbx) step (%c1) {
...
acc.reduction_accumulate %red to %acc <add> par_dims(#acc<par_dims[block_x]>) : i32 -> memref<i32>
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
%r = memref.load %acc[] : memref<i32>
acc.predicate_region {
memref.store %r, %a_res[] : memref<i32>
}
acc.yield
}
```
A store of a block-level reduction result is turned into a cross-block atomic
only when its region is predicated. A launch with no thread dims has nothing to
predicate, so every block stored its own partial result and the last one won.
Where the atomic was emitted, the destination was set to the reduction identity
by block 0 inside the kernel, which is not ordered against the other blocks'
atomics.
Fix: when the launch has no thread dims, use an always-true predicate so the
existing conversion applies. Store the identity from a single-thread launch
ahead of the kernel when its address does not depend on the launch; otherwise
keep the in-kernel store.
Commit: 44c19cc341bda8243bff7c8a2657e161931cda7c
https://github.com/llvm/llvm-project/commit/44c19cc341bda8243bff7c8a2657e161931cda7c
Author: RolandF77 <froese at ca.ibm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/PowerPC/cost-redadd.ll
A llvm/test/Transforms/LoopVectorize/PowerPC/redadd.ll
Log Message:
-----------
[PowerPC] Correct handling of add only partial reductions in cost model (#224109)
Fix add only partial reductions in PowerPC vector cost model.
Commit: d2ab08198f7943c8243e75e6cfde8585a01591ec
https://github.com/llvm/llvm-project/commit/d2ab08198f7943c8243e75e6cfde8585a01591ec
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
M clang/test/CIR/Transforms/switch-fold.cir
Log Message:
-----------
[CIR][CIRSimplify] Fix non-adjacent switch-case-merging (#228267)
We previously assumed that all switch cases in a switch were adjacent/in
the same scope while merging switch cases. This wasn't true, since a
case can be inside of a scope.
Skip out on merging them not only when they have something between them,
but also when they aren't exactly 'neighbors'.
Note: Claude helped diagnose and write my test case.
Commit: ffe323f10dd0243f2a054a714e8f41460ed384b6
https://github.com/llvm/llvm-project/commit/ffe323f10dd0243f2a054a714e8f41460ed384b6
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/Transforms/inline-asm-side-effects.cir
Log Message:
-----------
[CIR] Set memory effects of inline-asm-volatile correctly (#228261)
Inline-asm was set to have recursive memory effects, but it has no
blocks, so the result was it never was listed as having memory effects.
This patch sets it to have a read and write effect in the case where it
has side effects.
This showed up in the libcxx test, where we defeated the DoNotOptimze
macro by not properly respecting inline-asm side effects.
Commit: f29fd25726649b00a3b481f00b379f66f924ad63
https://github.com/llvm/llvm-project/commit/f29fd25726649b00a3b481f00b379f66f924ad63
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-global.cir
Log Message:
-----------
[CIR] Get Comdat groups correct for GlobalOp. (#227754)
A previous patch did this for FuncOp as it was causing problems. The
same problems exist for GlobalOp, particularly around template
variables.
This patch changes the 'comdat' value for GlobalOp to be a string, just
like FuncOp.
A custom printer needed to be added, but I was able to make FuncOp use
the same functionality.
ONE change that ended up happening: I removed the 'setComdat(bool)'. My
last patch actually BROKE this (since there was 1 case where it would
take a false!). Since this is pretty error-prone, I added a
'setSelfComdat, which is the common case, where it is set to be a
self-reference.
Commit: 73a1b728c08267ff604acea8cd33fb70845643d2
https://github.com/llvm/llvm-project/commit/73a1b728c08267ff604acea8cd33fb70845643d2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
Log Message:
-----------
[CIR] Add cast for __builtin_char_memchr (#228471)
The CIR operation has a result type of 'ptr<void>', but the
__builtin_char_memchr function returns 'ptr<char>'. This patch inserts a
bitcast in the handling of this builtin to make sure we get the type
correct.
Note that the createBitCast checks to make sure it isn't a noop first,
so there is no reason to add a conditional here.
Fixes: #228008
Commit: 96e6cbe44bcda4b8c4615c96aa6faa60fd3d2562
https://github.com/llvm/llvm-project/commit/96e6cbe44bcda4b8c4615c96aa6faa60fd3d2562
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
M llvm/test/CodeGen/X86/AMX/amx-across-func.ll
M llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
M llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
M llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
M llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
M llvm/test/CodeGen/X86/andnot-sink-not.ll
M llvm/test/CodeGen/X86/arg-copy-elide.ll
M llvm/test/CodeGen/X86/atomic-fp.ll
M llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/atomic-xor.ll
M llvm/test/CodeGen/X86/atomic64.ll
M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
M llvm/test/CodeGen/X86/avx512-intel-ocl.ll
M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/bfloat-calling-conv-no-sse2.ll
M llvm/test/CodeGen/X86/bittest-big-integer.ll
M llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/extractelement-index.ll
M llvm/test/CodeGen/X86/extractelement-load.ll
M llvm/test/CodeGen/X86/fma.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
M llvm/test/CodeGen/X86/i128-fp128-abi.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/inline-sse.ll
M llvm/test/CodeGen/X86/insertelement-var-index.ll
M llvm/test/CodeGen/X86/isel-x87.ll
M llvm/test/CodeGen/X86/long-double-abi-align.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
M llvm/test/CodeGen/X86/mingw-alloca.ll
M llvm/test/CodeGen/X86/mmx-arith.ll
M llvm/test/CodeGen/X86/mmx-intrinsics.ll
M llvm/test/CodeGen/X86/musttail-varargs.ll
M llvm/test/CodeGen/X86/nontemporal-loads-2.ll
M llvm/test/CodeGen/X86/nosse-vector.ll
M llvm/test/CodeGen/X86/packus.ll
M llvm/test/CodeGen/X86/pr216504.ll
M llvm/test/CodeGen/X86/pr32284.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34592.ll
M llvm/test/CodeGen/X86/pr34653.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/pr43866.ll
M llvm/test/CodeGen/X86/pr50782.ll
M llvm/test/CodeGen/X86/sdiv_fix.ll
M llvm/test/CodeGen/X86/sdiv_fix_sat.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
M llvm/test/CodeGen/X86/sse-intel-ocl.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-regcall.ll
M llvm/test/CodeGen/X86/sse-regcall4.ll
M llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
A llvm/test/CodeGen/X86/stack-realign-local-padding.ll
M llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
M llvm/test/CodeGen/X86/sttni.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/var-permute-512.ll
M llvm/test/CodeGen/X86/vec-strict-128.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
M llvm/test/CodeGen/X86/vec_ins_extract-1.ll
M llvm/test/CodeGen/X86/vec_insert-8.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-extend-inreg.ll
M llvm/test/CodeGen/X86/vector-extract-last-active.ll
M llvm/test/CodeGen/X86/vector-llrint.ll
M llvm/test/CodeGen/X86/vector-lrint.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
M llvm/test/CodeGen/X86/widen_arith-6.ll
M llvm/test/CodeGen/X86/x86-64-baseptr.ll
M llvm/test/DebugInfo/COFF/fpo-realign-alloca.ll
M llvm/test/DebugInfo/COFF/vframe-csr.ll
Log Message:
-----------
[X86] Don't allocate unused padding in front of realigned locals (#227495)
PEI aligns local objects relative to the incoming stack pointer, leaving
a gap between the CSRs and the first local. With the stack realigned
after the pushes, locals are addressed from the final stack pointer, so
that gap is never used: exclude it from the prologue's allocation.
Fixes #224278
Commit: ad114e57ac91caade1695a134c6f94e420632181
https://github.com/llvm/llvm-project/commit/ad114e57ac91caade1695a134c6f94e420632181
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/itofp-odd-width-load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
Log Message:
-----------
[AMDGPU] Legalize uniform 16-bit loads to match subword load instructions (#225097)
Generate better code for uniform16-bit loads.
First approach, added 16-bit load patterns in tablegen that created
subword load instructions.
Second and preferred approach legalizes uniform 16-bit loads to: `i16 =
trunc (zextload i16->i32)` which allows existing tablegen patterns to
match.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 6e16b1419271ba61fabde1cce577aa4d12d62cf4
https://github.com/llvm/llvm-project/commit/6e16b1419271ba61fabde1cce577aa4d12d62cf4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR] Correct array-new 'asserts' (#228461)
The assertion checked whether the value was signed (which just checks
the MSB), but didn't check if the expression itself was of signed
type. The result was a size_t expression in the upper half (that is,
MSB set!) would hit the assertion. This patch checks the sign of
the thing too, which still allows us to do the zext later.
Additionally, this test case ALSO overflows, so we make sure we handle
overflow correctly here as well.
Fixes: #227980
Commit: a4762bc259054102bf02b3d6039244bb70b4c427
https://github.com/llvm/llvm-project/commit/a4762bc259054102bf02b3d6039244bb70b4c427
Author: Corentin Kerisit <corentin.kerisit at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Add opt-in libunwind EH frame registration (#226148)
LLVM libunwind expects `__register_frame` to receive one FDE, while
non-Apple Bazel builds pass the whole `.eh_frame` section by default.
This can produce `FDE is really a CIE` when linking against LLVM
libunwind (see #43419).
Add `-- at llvm-project//llvm:use_libunwind_for_eh_frame_registration=true`
to set `HAVE_UNW_ADD_DYNAMIC_FDE` locally on `ExecutionEngine` and
`OrcTargetProcess`. Defaults and runtime linkage stay unchanged.
This follows the existing [`enable_abi_breaking_checks`
setting](https://github.com/llvm/llvm-project/blob/a8705c33dda2bb831ee6d6e0500b2d20bb902d0c/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel#L29-L41).
CMake already probes `__unw_add_dynamic_fde` for the same purpose.
Commit: 1f924cfebe818cd6c8a4528663b8418c917e1bd4
https://github.com/llvm/llvm-project/commit/1f924cfebe818cd6c8a4528663b8418c917e1bd4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
A clang/test/CIR/CodeGen/const-init-multi-base.cpp
Log Message:
-----------
[CIR] Fix base-class index in const-record when there is a vbase (#228484)
buidlRecordHelper didn't skip the 'virtual' bases like APValue did, so
the presence of a virtual base alone was enough to throw the index off.
This patch gets us slightly more in line with how this is done in
classic codegen.
It is really only reachable in C++26 because of the relaxed constexpr
rules iwth virtual bases, so it needs its own test.
Fixes: #228302
Commit: 4e0a7f20a90e7c9f41fe73ac337f00f93ebbbf12
https://github.com/llvm/llvm-project/commit/4e0a7f20a90e7c9f41fe73ac337f00f93ebbbf12
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Select the MASM BLAKE3 assembly for msvc-cl (#228560)
Add an `is_x86_64_windows_msvc` setting and `select` the
`_windows_msvc.asm` variants there; rules_cc's MSVC toolchains assemble
`.asm` with `ml64`. The pattern list loses its fixed `.S` suffix so one
list serves both file kinds.
Commit: 92c253c42b2744a530a3d1d3bfb4f5a798f9cdef
https://github.com/llvm/llvm-project/commit/92c253c42b2744a530a3d1d3bfb4f5a798f9cdef
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M polly/docs/ReleaseNotes.rst
M polly/include/polly/ScheduleTreeTransform.h
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScheduleTreeTransform.cpp
A polly/test/ScheduleOptimizer/isolate-complete-tiles-inner-levels.ll
A polly/test/ScheduleOptimizer/isolate-complete-tiles.ll
Log Message:
-----------
[Polly] Isolate complete tiles from partial tiles in the tiling path (#221087)
Tiling an iteration space whose extent is not a multiple of the tile
size gives every point loop a min() upper bound. The loop vectorizer
cannot pick a fixed vector factor for such a loop without a runtime
check, and it has to emit a scalar epilogue inside the tile loop, so the
loops that carry the whole runtime of a tiled kernel are the ones it
handles worst.
Isolating the complete tiles from the partial ones gives the point loops
of the complete tiles constant bounds. Polly already does this for the
loop it strip-mines in the prevectorization path, added in commit
ca7f5bb ("Full/partial tile separation for vectorization"); this applies
the same technique to the loops produced by the regular tiling.
getPartialTilePrefixes is generalized to all point dimensions at once as
getCompleteTilePrefixes, and the resulting isolate option, combined with
atomic for the remaining part, is attached to the tile band.
The new -polly-isolate-complete-tiles option is off by default: it is a
large win where variable trip counts were what blocked vectorization,
but it also grows the generated code, so the default behaviour is left
unchanged.
On PolyBench/C 4.2.1 with -O3 -march=native -polly
-polly-vectorizer=none on a Ryzen 7 9700X, minimum of 5 to 41 runs
pinned to one core, it changes the code of 23 of the 30 kernels and
improves their geometric mean by 37.6%: 2mm 6.9x, 3mm 6.4x, gemm 6.4x,
covariance 4.2x, syrk 2.6x, jacobi-1d 2.1x, mvt/bicg/atax about 1.5x,
gemver 1.39x, jacobi-2d 1.35x, symm 1.23x, lu 1.17x. Two kernels
regress: gesummv by 19% and deriche by 6 to 12%. Both are already at a
limit the transformation cannot move -- gesummv streams 27 MB at 24 GB/s
against a measured single-core peak of 29.8 GB/s, and deriche is
dominated by loops that carry a dependence and never vectorize -- so for
them the extra code is pure cost.
These numbers are for problem sizes known at compile time, which is what
PolyBench gives Polly once the kernel is inlined into main. With the
sizes passed as parameters instead (-Dstatic= -fno-inline-functions),
the option improves the geometric mean of the 11 kernels whose run time
the tiling changes by 30.5%, and doitgen, which it does not change with
constant sizes, by 5.4x; gesummv regresses by 18%.
The cost is code size and compile time: the .text of the benchmark
binaries is 3.5x larger in geometric mean over the 23 kernels, from
1.11x for doitgen to 5.6x for mvt, and compiling a kernel file takes
1.64x as long, from 1.05x to 2.4x.
Two further options isolate the inner tiling levels in the same way:
-polly-isolate-complete-tiles-2nd-level for -polly-2nd-level-tiling, and
-polly-isolate-complete-register-tiles for -polly-register-tiling, where
it removes the guards from the unrolled point loops, as the matrix
multiplication optimization already does for its micro-kernel (commit
9989088ee99a). A complete first-level tile does not make the inner tiles
complete: they are complete only when the inner tile size divides the
outer one, and not along the diagonal of a triangular or skewed domain.
Both are off by default as well, because whether they pay off depends on
the problem sizes. Relative to the same flags without them, the
geometric mean of the run time is 0.965 for the second level and 0.997
for the register tiles when the sizes are known at compile time, and
1.056 and 0.934 when they are parametric. In the parametric case they
also roughly double the compile time, and they make AST generation
exceed -polly-astgen-computeout on up to 13 kernels, after which Polly
keeps the original code.
Numerical output is unchanged: every kernel produces byte-identical
dumps with and without the options, in all the configurations measured
and with constant as well as parametric sizes, on the MINI and MEDIUM
datasets, as do the eight largest winners on LARGE.
Assisted-by: Claude Opus 5
---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: c666ea6d7cae32544d2b857bea0440e3990a2727
https://github.com/llvm/llvm-project/commit/c666ea6d7cae32544d2b857bea0440e3990a2727
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CodeGenUtils/StmtUtils.h
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/StmtUtils.cpp
M clang/test/CIR/CodeGen/misc-attrs.cpp
A clang/test/CIR/CodeGen/mustprogress.cpp
A clang/test/CIR/CodeGen/uwtable.cpp
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/invalid-func-attr.cir
Log Message:
-----------
[CIR] Implement mustprogress/uwtable attributes (#228093)
These are effectively on-by-default attributes for nearly every function
in the program, and allows LLVM to make better optimization decisions.
'mustprogress' is added any time we have forward progress guaranteeds by
language (C++11 and not finite-loops disabled via command line option).
`uwtable` forwards the 'unwind table' codegen opt to functions that
don't opt out of it (via attribute), and clarifies whether the function
has an entry in the unwind table. In some programs this can be
time-consuming, so they disable them.
Both of these showed up as a defficiency in a test suite, and resulted
in certain programs taking a huge amount of time to properly compile.
This patch adds both as the 'extended attributes' printing location to
functions.
Commit: e429baa2a3489144b967b6c4f0f5cec1ddd199ac
https://github.com/llvm/llvm-project/commit/e429baa2a3489144b967b6c4f0f5cec1ddd199ac
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR][ADT] Avoid isPointerIntoBucketsArray in RemoveFromUseList (NFC) (#228325)
RemoveFromUseList erases the entry from ValueHandles when removing the
sole remaining element in the doubly linked list. Without this patch,
after unlinking the tail element, it checks whether PrevPtr points into
the DenseMap bucket array:
if (Handles.isPointerIntoBucketsArray(PrevPtr)) {
Handles.erase(getValPtr());
This patch instead tags ValueHandleHead::Head with true via
PointerIntPair<ValueHandleBase *, 1, bool>, while leaving
ValueHandleBase::Next untagged. The tag bit allows RemoveFromUseList to
quickly determine whether it is removing the sole element in the list
without calling isPointerIntoBucketsArray.
Below is the breakdown of RemoveFromUseList calls and the perf stat -r10
comparison when compiling SLPVectorizer.ii with clang -O3:
Category Count %
---------------------------------------------------------
Non-tail element (Next != nullptr) 16,592,855 52.7%
Sole remaining element (erased) 8,198,144 26.0%
Tail of multi-element list (not erased) 6,714,742 21.3%
---------------------------------------------------------
Total 31,505,741 100.0%
Metric Base Test Delta
--------------------------------------------------------
instructions:u 194,745,673,762 194,513,892,029 -0.12%
cpu-cycles:u 141,184,939,025 141,042,112,760 -0.10%
time elapsed 54.9115s 54.8629s -0.09%
The instruction count decreases slightly because IsHead is readily
available from *PrevPtr. We do not need to chase
getValPtr()->getContext().pImpl or check bucket bounds when removing
the tail of a multi-element list.
With the final use of isPointerIntoBucketsArray gone, this patch removes
the following unused methods from DenseMapBase:
- isPointerIntoBucketsArray
- getPointerIntoBucketsArray
- getBucketsEnd
Assisted-by: Antigravity
Commit: f011bd8d1a8d9966dbe4770da9a5de5be3b2cfd8
https://github.com/llvm/llvm-project/commit/f011bd8d1a8d9966dbe4770da9a5de5be3b2cfd8
Author: Nick Riasanovsky <njriasan at meta.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
Log Message:
-----------
[NFC] Fix whitespace in NVPTXIntrinsics.td (#228553)
Fixes the whitespace in NVPTXIntrinsics.td as a followup of
https://github.com/llvm/llvm-project/pull/228303
Commit: 66b01663b5842909892e71d6a43a2ab87791e7d1
https://github.com/llvm/llvm-project/commit/66b01663b5842909892e71d6a43a2ab87791e7d1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CIR/IR/invalid-version.cir
M clang/test/CIR/IR/version.cir
M clang/test/CIR/Lowering/opencl-version-metadata.cir
Log Message:
-----------
[CIR][OpenCL] Emit opencl.spir.version metadata for SPIR targets (#228400)
Match classic CodeGen, which emits it on SPIR but not SPIR-V as SPIR
v2.0 requires
Commit: 839f8621d7256651de4aeae2c65993b87d62c29d
https://github.com/llvm/llvm-project/commit/839f8621d7256651de4aeae2c65993b87d62c29d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/TargetList.h
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/unittests/Protocol/MCPPluginTest.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/ExecutableModuleTest.cpp
Log Message:
-----------
[lldb] Track the target's executable instead of guessing (#228131)
When no module had type eTypeExecutable, Target::GetExecutableModule
returned the first image. A main executable can be a shared library,
such as an ELF PIE or firmware, and in the common case the fallback
found it. But a target with only libraries got one of them back as its
executable, and when the executable was removed, the next image took its
place.
Have the target remember which module is its executable, and return
nullptr when it has none. A target that only had libraries added to it
now reports no executable. Callers that dereferenced the result without
a check now handle nullptr.
Commit: 77f982cc4c29f7ca20690dd169c849d8a3cd0324
https://github.com/llvm/llvm-project/commit/77f982cc4c29f7ca20690dd169c849d8a3cd0324
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
A clang/test/CIR/IR/max-work-group-size.cir
A clang/test/CIR/Lowering/max-work-group-size.cir
Log Message:
-----------
[CIR][AMDGPU][SPIR-V] Emit max_work_group_size for HIP kernels (#227715)
Mirror SPIRVTargetCodeGenInfo::setTargetAttributes from classic codegen
Commit: 1dafadd18f0f30a52831d59fe13648092d626584
https://github.com/llvm/llvm-project/commit/1dafadd18f0f30a52831d59fe13648092d626584
Author: Thurston Dang <thurston at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/fp8-neon-fdot.ll
Log Message:
-----------
[msan] Handle Arm NEON FP8 FDOT2/FDOT4 (#227850)
This reuses the existing handleVectorDotProductIntrinsic().
Note: aarch64_neon_fp8_fdot{2,4}_lane is not handled by this patch,
because their individual numeric lane parameter differs from
handleVectorDotProductIntrinsic()'s odd/even lanes.
Commit: eff9c6b27f248a70c6130197ba4344e050ebcc92
https://github.com/llvm/llvm-project/commit/eff9c6b27f248a70c6130197ba4344e050ebcc92
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Revert "[IR] Reduce memory usage in metadata use tracking (NFC) (#221866)" (#228561)
This reverts commit 4f5877ff5b6e947123142f7e17ffd04850fd416a.
We've encountered non-determinism with this patch. See #228299 for
details.
Commit: f616c059510b54a56fa5cc88f75f83c1a88c6c85
https://github.com/llvm/llvm-project/commit/f616c059510b54a56fa5cc88f75f83c1a88c6c85
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
Log Message:
-----------
[CIR] Correct const lowering with potentially-overlapping-types. (#228506)
The below bug report found a case where our base lowering and our
const-record lowering got out of sync with no unique address, so this
patch makes sure we get it right.
Fixes: #228300
Commit: 4182cbcc42acead3d993a3be53c2569360637e3d
https://github.com/llvm/llvm-project/commit/4182cbcc42acead3d993a3be53c2569360637e3d
Author: Oscar Smith <oscardssmith at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/masked-gather-stale-capture.ll
Log Message:
-----------
[SLP][NFC] Precommit test for stale BatchAA after vectorizing a tree (#227928)
The current output sinks the store to %p8 below the masked gather that
loads from %p8, which is a miscompile.
Coauthored by Opus 5.5
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: 7bbbca018d8eb128cfc7cbe049b5acdec1472d09
https://github.com/llvm/llvm-project/commit/7bbbca018d8eb128cfc7cbe049b5acdec1472d09
Author: lexi-nadia <lexinadia at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Remove stale Bazel deps (#228580)
- Core's dependency on PluginCPlusPlusLanguageHeaders and
PluginObjCLanguageHeaders was removed in
897cc3ee429a62e1dfd77a602db96e9884671f93.
- Expression's dependency on PluginSymbolFileDWARFHeaders was removed in
59c5d531991ca6d3cdd7072a13331dd5b0a5b321.
- Interpreter's dependency on API was removed in
ed3d4a78ba8b23ab5d3fb629029695a03818d254.
These edges made LLDB core libraries transitively depend on plugins
(and, through :API, on every default plugin). The build passes with
layering_check after removing them.
Commit: bbbbdc1fe3de8ed1d6094daca0e91d83f95b5d30
https://github.com/llvm/llvm-project/commit/bbbbdc1fe3de8ed1d6094daca0e91d83f95b5d30
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/test/tools/clang_tidy_checks/hide_from_abi.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
Log Message:
-----------
[libcxx] Ensure CLANG_VERSION_MAJOR is defined in clang-tidy checks (#228127)
Otherwise the ifdefs around CLANG_VERSION_MAJOR for whether or not we
should be including ClangTidyModule.h or ClangTidyModuleRegistry.h are
all wrong given CLANG_VERSION_MAJOR is undefined.
This is needed for bumping the CI container.
Commit: 09a061222344326184524d731a076eb6067ae433
https://github.com/llvm/llvm-project/commit/09a061222344326184524d731a076eb6067ae433
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libcxx] Bump clang in CI container to v24 (#227930)
This is what we already install from CE, we just weren't properly
attributing it. This meant that clang-23 in the container was actually a
symlink to clang-24.
Commit: a20cff91b5a8e6db2207fdaede17b82d16ce1c42
https://github.com/llvm/llvm-project/commit/a20cff91b5a8e6db2207fdaede17b82d16ce1c42
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
R llvm/test/tools/llvm-objcopy/ELF/reloc-alloc-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-no-symtab.test
Log Message:
-----------
Revert "[llvm-objcopy] Handle SHF_ALLOC relocation sections in relocatable files" (#228572)
Reverts llvm/llvm-project#227204
Invalid cast triggers Ubsan report
https://lab.llvm.org/buildbot/#/builders/169/builds/27128
Commit: 65d6d9c8a189c3e6623fe974df5fe623bdde9f7a
https://github.com/llvm/llvm-project/commit/65d6d9c8a189c3e6623fe974df5fe623bdde9f7a
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/cmake/modules/LLDBStandalone.cmake
Log Message:
-----------
[lldb] Add extra logic to find llvm-nm in standalone builds (#227487)
If one builds LLDB standalone against an LLVM that builds but does not
export an llvm-nm target, then LLDB will fail to build when also using
dynamic script interpreters.
To account for this, we use the same logic for finding llvm-tblgen. I
intentionally did not deduplicate the logic because they are run in
slightly different scenarios. I plan on joining these together with a
macro once another tool is needed.
Commit: 143eb3cae4f0bcf8c0aea6cbaf04a9edf89fcfd7
https://github.com/llvm/llvm-project/commit/143eb3cae4f0bcf8c0aea6cbaf04a9edf89fcfd7
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/docs/resources/formatterbytecode.md
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add dictionary data type to formatter bytecode (#225955)
Add a dictionary data type to formatter bytecode.
This addition will help in two ways:
1. A subsequent change will use dictionaries to model "self" ("this")
2. Many formatters internal use a dictionary as an implementation
detail, and this will allow such formatters to be compiled/ported to
formatter bytecode
Assisted-by: claude
Commit: 6fb8776580a4a21a676cd7a424346c09aed81216
https://github.com/llvm/llvm-project/commit/6fb8776580a4a21a676cd7a424346c09aed81216
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable V_WMMA_F{16|32}_16X16X128_[BF]P8_[BF]P8 on gfx1250-strict (#228564)
Fixes: LCOMPILER-2899
Commit: 0767d2351b27b5774ef205ea8143445231476026
https://github.com/llvm/llvm-project/commit/0767d2351b27b5774ef205ea8143445231476026
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Emit TypeOption flags correctly as ULEB (#227399)
A formatter's flags are loaded as ULEB:
```cpp
uint64_t flags = extractor.getULEB128(cursor);
```
This change updates formatter_bytecode.py to emit the flags as ULEB as
well.
Assisted-by: claude
Commit: 4f28393db7302dc6c5952fd154fc9e7037330f7c
https://github.com/llvm/llvm-project/commit/4f28393db7302dc6c5952fd154fc9e7037330f7c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
Log Message:
-----------
[BFI] Remove AllowSynthetic parameter (#227469)
Support for synthetic profile information was mostly removed a while
ago. This parameter does nothing and was apparently left over, so remove
it.
Commit: bb92074ca096f1ac80aa3555491c99333814faa8
https://github.com/llvm/llvm-project/commit/bb92074ca096f1ac80aa3555491c99333814faa8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisEltOfVec in verifyNode. (#228519)
Assisted-by: Claude
Commit: 844897d9e4c45006c5bb66f170a0a24932099bc3
https://github.com/llvm/llvm-project/commit/844897d9e4c45006c5bb66f170a0a24932099bc3
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/CycleAnalysis.h
Log Message:
-----------
[CycleAnalysis] Add missing export to symbol used in test (#228316)
Commit: 1b13257b5fc2d7b44d9ef6c2b55bd854250a2d29
https://github.com/llvm/llvm-project/commit/1b13257b5fc2d7b44d9ef6c2b55bd854250a2d29
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/InstCombine/known-bits-bitcast-from-fp.ll
Log Message:
-----------
[KnownFPClass] Improve KnownFPClass::toKnownBits deductions for IEEE types (#223204)
Commit: 4ff941cbe521533c9480115dec21d7f0540cb6bb
https://github.com/llvm/llvm-project/commit/4ff941cbe521533c9480115dec21d7f0540cb6bb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
A clang/test/CIR/CodeGen/array-subscript-order.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/bitint-record-layout.c
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
Log Message:
-----------
[CIR] Correct array-subscript-ordering (#227899)
We had the comment about the ordering, but didn't get it right! C++17
requires we go left-to-right ordering, rather than it being UB, so
classic-codegen was changed at one point to do this all the time.
However, we only got a partial implementation of this, which results in
side-effects being noticable. This showed up in a test suite.
This patch does its best to just copy from classic-codegen.
Commit: 439c28996aae50467c2c1e18e10b901e33ddf279
https://github.com/llvm/llvm-project/commit/439c28996aae50467c2c1e18e10b901e33ddf279
Author: Denis <ffil.denn at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ConfigProvider.cpp
M clang-tools-extra/clangd/ConfigProvider.h
M clang-tools-extra/clangd/fuzzer/clangd-fuzzer.cpp
M clang-tools-extra/clangd/indexer/IndexerMain.cpp
A clang-tools-extra/clangd/test/indexer-clangd-config-relative-path.test
A clang-tools-extra/clangd/test/indexer-clangd-config.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
M clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
Log Message:
-----------
[clangd] Make clangd-indexer respect .clangd configuration files (#214951)
This support is currently behind an `--enable-config` flag which is
off by default.
The implementation reuses clangd's existing machinery where
appropriate, such as for loading config files, and for applying their
contents to the correct source files based on the config file's
location and any `If` clauses.
Due to limitations in the libTooling interfaces used in clangd-indexer's
implementation, configuration is currently only applied to source
files whose path is specified as an absolute path in the compilation
database.
Related discourse topic: https://discourse.llvm.org/t/honor-clangd-compileflags-overrides-in-clangd-indexer/91504
Commit: 257f252ae4476ec709085bc1a033bde1d22d7710
https://github.com/llvm/llvm-project/commit/257f252ae4476ec709085bc1a033bde1d22d7710
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/Interpreter/Interfaces/ScriptedProcessInterface.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/functionalities/scripted_process/addressable_bits_scripted_process.py
Log Message:
-----------
[lldb/Interpreter] Read Scripted Process addressable bits from its metadata (#227515)
This patch addresses post-merge feedback on #224701.
That change added a dedicated `get_addressable_bits` affordance to
scripted processes, which duplicates a property the process already has.
This patch removes it and reads the addressable bits from an optional
"addressable_bits" key in the dictionary returned by
`get_process_metadata` instead. `ScriptedProcess::DidLaunchOrAttach`
still passes the value to `SetAddressableBitMasks` before the first stop
is reported. When the key is missing, the setter is never called and the
process keeps the masks it inherits from the target.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 95bccb2675f90f6eea9e406344b05360ebad5f89
https://github.com/llvm/llvm-project/commit/95bccb2675f90f6eea9e406344b05360ebad5f89
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
Log Message:
-----------
[ARM] Use extract_subvector instead of vector_extract_subvec in ARMInstrNEON.td. NFC (#228542)
extract_subvector has a stricter SDTypeProfile than
vector_extract_subvec.
I'm investigating why we need vector_extract_subvec. The only other
users are in AArch64SVEInstrInfo.td so maybe something to do with
scalable vectors.
Commit: 9c3a8d5a0b5a24b73280eacf9f536bcede001ee8
https://github.com/llvm/llvm-project/commit/9c3a8d5a0b5a24b73280eacf9f536bcede001ee8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port b74b3ebf94c4c (#228411)
Commit: 0d3adab5e34fc8ff73734c62fabdbe8f9adfa08c
https://github.com/llvm/llvm-project/commit/0d3adab5e34fc8ff73734c62fabdbe8f9adfa08c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
Log Message:
-----------
[gn build] Port 8cb1d1566dbb2 (#228410)
Commit: 23345faf72b0f3dab56a794663a1dbfa5f2d0dba
https://github.com/llvm/llvm-project/commit/23345faf72b0f3dab56a794663a1dbfa5f2d0dba
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port 76df4ae44f0b (#228409)
Commit: ef126538b5f16c0b5284bbbbf6deea8307d8bced
https://github.com/llvm/llvm-project/commit/ef126538b5f16c0b5284bbbbf6deea8307d8bced
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/JITLink/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/JITLink/BUILD.gn
Log Message:
-----------
[gn build] Port 2820795b027eb (#228408)
Commit: dfabf2df7d27cbaf96b849251c36b8228762ee87
https://github.com/llvm/llvm-project/commit/dfabf2df7d27cbaf96b849251c36b8228762ee87
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-sqrt.ll
Log Message:
-----------
[KnownFPClass] Refine positive zero result for sqrt (#214987)
Refines `KnownFPClass::sqrt` for positive zero:
- Only `sqrt(x) == +0.0` iff `x` is `+0.0` or `x` flushes to `+0.0` in
the current denormal mode. The `-0.0` case was handled in a prior
commit.
AI disclosure:
I used OpenAI Codex (GPT-5.6-sol) to help generate the test updates,
which I reviewed and tested locally.
Commit: 90ac02ea8e0820cb5dcae2d62fe7c3e3523ae1f8
https://github.com/llvm/llvm-project/commit/90ac02ea8e0820cb5dcae2d62fe7c3e3523ae1f8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port b8afba677502d (#228412)
Commit: 43066b9e82859c619fc0fdb6349256d44fe44013
https://github.com/llvm/llvm-project/commit/43066b9e82859c619fc0fdb6349256d44fe44013
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
Log Message:
-----------
[gn build] Port 15cbda42e14b7 (#228406)
Commit: 0a9f9d51fdb14708f5c473ad9e94b10305e31ba4
https://github.com/llvm/llvm-project/commit/0a9f9d51fdb14708f5c473ad9e94b10305e31ba4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[TableGen][AArch64] Relax EnforceVectorSubVectorTypeIs for mixing fixed and scalable vectors. (#228552)
The minimum elements of a fixed subvector may be greater than or equal
to the minimum elements of the scalable vector when vscale is greater
than 1. With a fixed subvector and a scalable vector we now allow the
subvector to have the same minimum elements as the vector. That covers a
NEON subvector and a SVE vector.
It is possible to have a subvector with more minimum elements than the
vector when vscale is known to be greater than 1, but both RISC-V
vectors and SVE use custom isel rather than tablegen for those cases.
With that fixed, migrate AArch64 to use
extract_subvector/insert_subvector instead of
vector_extract_subvec/vector_insert_subvec. A follow up will remove
vector_extract_subvec/vector_insert_subvec.
Commit: 63238edbfd44d1d033657933c671fc22e830f336
https://github.com/llvm/llvm-project/commit/63238edbfd44d1d033657933c671fc22e830f336
Author: Michael Park <mcypark at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Support/ErrorOr.h
Log Message:
-----------
[llvm][Support] Remove stale `ErrorOr` documentation regarding user data. (#227796)
Optional user data support was removed from `ErrorOr` in ca35ffe6a239 in November 2013.
Commit: 318d8c3b0b5cd2b28869de20b1e326e28997c879
https://github.com/llvm/llvm-project/commit/318d8c3b0b5cd2b28869de20b1e326e28997c879
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals.ll
Log Message:
-----------
[SPIRV] Don't treat noipa aliasees as interposable in SPIRVPrepareGlobals (#228178)
SPIRVPrepareGlobals replaces aliases with their aliasee because the
backend can't lower GlobalAlias. It must skip aliasees that may be
replaced at link time, but `isInterposable()` also returns true for
`noipa` function definitions by default. `noipa` doesn't change which
definition is used at link time, so query
`isInterposable(/*CheckNoIPA=*/false)` so aliases of `noipa` functions
are still replaced.
This is one of a few refinements of noipa identified while working on
making optnone imply noipa - without these refinements,
optnone-implies-noipa, might substantially change clang -O0 codegen. I'm
open to discussing whether these refinements are the right direction,
though.
Assisted-By: Claude
Commit: 07e69cf1e68aada7cc635c906e6c265c2b7be354
https://github.com/llvm/llvm-project/commit/07e69cf1e68aada7cc635c906e6c265c2b7be354
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/NVPTX/fp128-compare-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing fp-compare libcall when softening (#228416)
Avoid fatal errors, and legalize to poison with a proper context error.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7bc1de45ec19c69e5236deb90b7d618969a78dec
https://github.com/llvm/llvm-project/commit/7bc1de45ec19c69e5236deb90b7d618969a78dec
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port c666ea6d7cae (#228615)
Commit: 937a402e7ef27302a2fdd41fc0fc682f7f5fe1e9
https://github.com/llvm/llvm-project/commit/937a402e7ef27302a2fdd41fc0fc682f7f5fe1e9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ABI/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[gn build] Port cd94d181b2e3 (#228616)
Commit: ff2e85345d1c412d9d743603f6773ce454322d4f
https://github.com/llvm/llvm-project/commit/ff2e85345d1c412d9d743603f6773ce454322d4f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/bolt/test/BUILD.gn
Log Message:
-----------
[gn] port 873f7ef7077fd5f3 (#228617)
Commit: 72a34143a29ba21289fa147334472cb0ca27093a
https://github.com/llvm/llvm-project/commit/72a34143a29ba21289fa147334472cb0ca27093a
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
A clang/test/CIR/IR/coro-noop.cir
A clang/test/CIR/Lowering/coro-noop.cir
Log Message:
-----------
[ClangIR] Support __builtin_coro_noop (#227573)
Support `__builtin_coro_noop` in ClangIR:
- Add `CIR_CoroNoopOp` (`cir.coro.intrinsic.noop`) in `CIROps.td` with
TableGen lowering to `llvm.coro.noop`.
- Handle `Builtin::BI__builtin_coro_noop` in `CIRGenBuiltin.cpp`.
- Add roundtrip (`clang/test/CIR/IR/coro-noop.cir`) and DirectToLLVM
lowering (`clang/test/CIR/Lowering/coro-noop.cir`) tests.
- Uncomment and test `__builtin_coro_noop()` in
`clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp` with both CIR and
LLVM checks for parity with classic Clang CodeGen.
Closes #227561
Commit: a07ace6151f5a76944379951a51bc395d17acfd5
https://github.com/llvm/llvm-project/commit/a07ace6151f5a76944379951a51bc395d17acfd5
Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
Log Message:
-----------
[AMDGPU][NFC] Extract GCNDownwardRPTracker::retireVirtReg (#228289)
Pull the per-register retirement logic out of advanceBeforeNext() into a
helper. The operand reference is replaced by the register argument.
A follow-up change needs to retire dying uses and dead defs at different
points in the walk, which requires this logic to be callable from more
than one place.
https://github.com/llvm/llvm-project/pull/228294 depends on this patch.
Assisted-by: Cursor/Claude Opus
Commit: 6dc0e52d1e7f7ebef472d00b7e4b1e8c8cba146f
https://github.com/llvm/llvm-project/commit/6dc0e52d1e7f7ebef472d00b7e4b1e8c8cba146f
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/linux/PythonRuntimeLoaderLinux.cpp
A lldb/source/Host/posix/PythonRuntimeLoaderPosix.cpp
M llvm/utils/gn/secondary/lldb/source/Host/BUILD.gn
Log Message:
-----------
[LLDB] Make PythonRuntimeLoader a posix platform library (#228598)
The symbol ForEachPythonRuntimeCandidate is required when python is
enabled on LLDB. However, it is only provided by Linux platform now.
Make such soure code be compiled under all Posix platform other than
Darwin or it causes link error.
Commit: 7d5ecf55175a01ac503961a8b46f0c4a1b83dee4
https://github.com/llvm/llvm-project/commit/7d5ecf55175a01ac503961a8b46f0c4a1b83dee4
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Remove NDEBUG and LLVM_ENABLE_DUMP guards around VPBlockBase::printOperand (#228326)
DominatorTreeBase::print calls the printOperand function of its NodeT
type unconditionally and the VPDominatorTree class is derrived from
DominatorTreeBase<VPBlockBase, false>.
This fixes the link with MSVC and LLVM_BUILD_LLVM_DYLIB_VIS=ON.
Commit: 06fb2cbb4e57137c07742aa1f6457a05007661f5
https://github.com/llvm/llvm-project/commit/06fb2cbb4e57137c07742aa1f6457a05007661f5
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/OpenMP/nvptx_target_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
A clang/test/OpenMP/target_map_section_inbounds.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
Log Message:
-----------
[OpenMP] Do not GEP 'inbounds' for multi-dimensional OpenMP device maps (#218436)
The C standard treats array subscripts as inbounds of the object, but
OpenMP section maps intentionally index from a host-relative base that
is not the mapped allocation. Drop inbounds on those GEPs so later
passes do not assume the slice lives inside the object.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: 6292b6e192d145579d80970260366ffb8489e107
https://github.com/llvm/llvm-project/commit/6292b6e192d145579d80970260366ffb8489e107
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleBridge.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleBridge.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleTV.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleTV.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteMacOSX.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteiOS.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteiOS.h
Log Message:
-----------
[lldb] Search both visionOS and XROS DeviceSupport directories (#228573)
Xcode now downloads visionOS shared cache symbols into
~/Library/Developer/Xcode/visionOS DeviceSupport, but
PlatformRemoteAppleXR only looked in "XROS DeviceSupport". As a result,
LLDB never found the expanded shared cache for visionOS devices and
failed to resolve symbols like `memcpy`, which breaks expression
evaluation and loading images into the inferior.
This makes `GetDeviceSupportDirectoryName` return a list of directory
names (renamed to `GetDeviceSupportDirectoryNames`) and have
`PlatformDarwinDevice` search each of them. visionOS returns both the
current and the legacy name; all other platforms keep their single name
for now.
rdar://189049149
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: feb8b100771af6b617efd3ef5b6ebcf51d858b9b
https://github.com/llvm/llvm-project/commit/feb8b100771af6b617efd3ef5b6ebcf51d858b9b
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
A llvm/test/tools/llvm-objcopy/MachO/discard-all-relocations.test
M llvm/test/tools/llvm-objcopy/MachO/indirect-symbol-table-copy.s
Log Message:
-----------
[llvm-objcopy][MachO] Fix use-after-free when stripping (#228607)
We must preserve symbols referenced by the indirect symbol table even
with strip all, and we must preserve symbols referenced by relocations
without strip all.
Fixes: https://github.com/llvm/llvm-project/issues/228595
Assisted-by: codex
Commit: 9d79d551a655dcc42eff7f7c40734e92a33f2049
https://github.com/llvm/llvm-project/commit/9d79d551a655dcc42eff7f7c40734e92a33f2049
Author: Oscar Smith <oscar.smith at juliahub.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/masked-gather-stale-capture.ll
Log Message:
-----------
[SLP] Reset BatchAA after vectorizing a tree (#227833)
Commit: 82290a03b3cc236fb5dd37eb4dd84b221adb5d08
https://github.com/llvm/llvm-project/commit/82290a03b3cc236fb5dd37eb4dd84b221adb5d08
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/test/CMakeLists.txt
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/llvm-cas/lit.local.cfg
M llvm/test/tools/llvm-cas/plugin-validation-crash.test
M llvm/test/tools/llvm-cas/plugin-validation.test
R llvm/tools/libCASPluginTest/CMakeLists.txt
R llvm/tools/libCASPluginTest/libCASPluginTest.cpp
R llvm/tools/libCASPluginTest/libCASPluginTest.exports
A llvm/unittests/CAS/CASPluginTest/CASPluginTest.cpp
A llvm/unittests/CAS/CASPluginTest/CASPluginTest.exports
A llvm/unittests/CAS/CASPluginTest/CMakeLists.txt
M llvm/unittests/CAS/CMakeLists.txt
M llvm/unittests/CAS/PluginCASTest.cpp
Log Message:
-----------
[CASPlugin] Move CASPluginTest next to the CAS unit tests (#227546)
Set up the CAS test plugin like CGTestPlugin: move it from
llvm/tools/libCASPluginTest to llvm/unittests/CAS/CASPluginTest and
build it as CASPluginTest${LLVM_PLUGIN_EXT}, without the lib prefix or
a version, so its name is the same on all platforms. The lit tests now
find it via %llvmshlibdir/CASPluginTest%pluginext instead of a
configured LLVM_CAS_PLUGIN_TEST_PATH, and CASTests gets its path from
the build system through the CAS_PLUGIN_PATH definition.
Commit: 2590e4e2d10606000821336f3a163a0ac6b4d77d
https://github.com/llvm/llvm-project/commit/2590e4e2d10606000821336f3a163a0ac6b4d77d
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Find .debug files using pseudo sysroot (#224845)
Unlike userspace processes, it is common to obtain kernel dump from a
machine (e.g. QEMU) which different from the machine debugging the dump.
In this case users need to run `target symbols add foo.debug` for the
kernel and each kernel object, which becomes quite inconvenient when the
machine had dozens of kernel modules loaded during the dump.
This patch adds functionality to the dynamic loader so that it loads
symbol files automatically when kernel or kenrel modules are loaded. It
assumes a pseudo sysroot. When kernel is located at
`/foo/boot/kernel/kernel`, it will look for
`foo/usr/lib/debug/boot/kernel/kernel.debug` and same for kernel
modules. In this case, the only thing users need to do is copying the
dumped machine's `/usr/lib/debug/boot` relative to `/boot` that is being
debugged.
Assisted-by: GPT
Commit: 30183cb96ab0fb33d4f7aebd5126e75b852f3ba3
https://github.com/llvm/llvm-project/commit/30183cb96ab0fb33d4f7aebd5126e75b852f3ba3
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Target/Process.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestObjCRuntimeNoInferiorCall.py
A lldb/test/API/functionalities/gdb_remote_client/libobjc.A.dylib.yaml
Log Message:
-----------
[lldb] Don't run code for CanJIT() while creating the ObjC runtime (#227555)
When libobjc lacks class_getMethodImplementation, the ObjC trampoline
handler calls CanJIT() to decide whether to warn. Without the _M
packet, CanJIT() allocated memory by calling mmap in the inferior.
Setting up that call unwinds the stack, which asks for the ObjC
runtime. The runtime isn't registered yet, so LLDB creates another one
and recurses until the stack overflows.
Ask the process plugin whether it can allocate memory instead of
trying it. ProcessGDBRemote probes the _M packet and otherwise checks
for an mmap symbol, neither of which runs code in the inferior.
rdar://188335027
Commit: 758aa4a9246f29af8576fde6f7e8ce9a0317e13b
https://github.com/llvm/llvm-project/commit/758aa4a9246f29af8576fde6f7e8ce9a0317e13b
Author: Trung Nguyen <git at trungnt2910.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/MachineSink.cpp
A llvm/test/CodeGen/X86/postra-machine-sink-eh-pad.mir
Log Message:
-----------
[CodeGen] Avoid sinking EH pad blocks (#224812)
EH pad blocks should not be sinkable since the control flow comes from
the unwinder instead of the predecessor.
This exclusion also matches the behavior of other sinkers.
Fixes #224802.
Commit: c45612d8a33513fd480a84585fb487c95fa67b1b
https://github.com/llvm/llvm-project/commit/c45612d8a33513fd480a84585fb487c95fa67b1b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in NativeDylibManagerSPSCITest (#228629)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in NativeDylibManagerSPSCITest.
Commit: 30b51648f1b577792670fd19647d253e5e941887
https://github.com/llvm/llvm-project/commit/30b51648f1b577792670fd19647d253e5e941887
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
Log Message:
-----------
[RISCV] Factor out LI/QC_LI matching in RISCVRedundantCopyElimination. NFC (#228610)
Assisted-by: Claude
Commit: 5db36554489df699c4e7449c44b9c4c465488f20
https://github.com/llvm/llvm-project/commit/5db36554489df699c4e7449c44b9c4c465488f20
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/SCF/IR/ValueBoundsOpInterfaceImpl.cpp
M mlir/test/Dialect/SCF/value-bounds-op-interface-impl.mlir
Log Message:
-----------
[mlir][scf] Fix scf.for value bounds for empty and unsigned loops (#226761)
Value bounds assumes that an `scf.for` result is `init + ceildiv(ub -
lb, step) * (yield - iter_arg)`. This is only true if the loop runs at
least once. When the loop does not run, `ceildiv(ub - lb, step)` is
negative instead of 0. For unsigned loops, `ub - lb` is computed as if
the bounds were signed, which also gives a wrong trip count. The
induction variable bounds of unsigned loops have the same signed
problem.
Example:
```mlir
%r = scf.for %iv = %c5 to %c2 step %c1 iter_args(%arg = %c7) -> index {
%n = arith.addi %arg, %c1 : index
scf.yield %n : index
}
%m = affine.min affine_map<(d0) -> (d0, 5)>(%r)
```
The loop does not run, so `%r` is 7 and `%m` should be 5. Value bounds
thinks `%r` is 4, so `affine-simplify-min-max` replaces `%m` with `%r`
and the result becomes 7.
Canonicalization usually removes a constant empty loop like this one,
but the analysis should not depend on that. The unsigned case is not
removed by canonicalization and gives wrong results too.
With this change, the result formula is used only for signed loops that
are known to run at least once, and unsigned loops get no induction
variable bounds.
Assisted-by: Claude
Co-authored-by: Matthias Springer <me at m-sp.org>
Commit: 194ce87926c8264d56f927a11a02dc5a86183bc3
https://github.com/llvm/llvm-project/commit/194ce87926c8264d56f927a11a02dc5a86183bc3
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/test/Driver/hip-profile-rocm-runtime.hip
Log Message:
-----------
[Clang][HIP] Skip internalization for non-LTO device links (#225859)
A non-LTO HIP device link can combine native relocatable objects with
bitcode libraries. This can happen with both RDC and non-RDC
compilation. LLD must resolve undefined symbols in the native objects
with definitions from the bitcode.
The LTO step processing the bitcode cannot see references from native
objects. Internalizing non-kernel functions can therefore hide
definitions that those objects need. Do not enable AMDGPU
internalization for these mixed non-LTO links.
LTO mode does not have this problem. It links the bitcode modules before
internalization, so the references are visible when symbols are
resolved. Keep internalization for LTO links and when compiling non-RDC
main modules.
Commit: e9352352a52711bd323a467a86da0f7bdf2754d9
https://github.com/llvm/llvm-project/commit/e9352352a52711bd323a467a86da0f7bdf2754d9
Author: Yaxun (Sam) Liu <yaxun.liu at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[Clang][HIP] Skip internalization for non-LTO device links (#225859)
A non-LTO HIP device link can combine native relocatable objects with
bitcode libraries. This can happen with both RDC and non-RDC
compilation. LLD must resolve undefined symbols in the native objects
with definitions from the bitcode.
The LTO step processing the bitcode cannot see references from native
objects. Internalizing non-kernel functions can therefore hide
definitions that those objects need. Do not enable AMDGPU
internalization for these mixed non-LTO links.
LTO mode does not have this problem. It links the bitcode modules before
internalization, so the references are visible when symbols are
resolved. Keep internalization for LTO links and when compiling non-RDC
main modules.
Commit: 8a0b352d3ef8c5c00fc71869c9b71c9903e7db9a
https://github.com/llvm/llvm-project/commit/8a0b352d3ef8c5c00fc71869c9b71c9903e7db9a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
A llvm/include/llvm/ExecutionEngine/Orc/BindCallControllerHandlerSPS.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/InProcessEPC.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
M llvm/unittests/ExecutionEngine/Orc/InProcessEPCTest.cpp
M llvm/unittests/ExecutionEngine/Orc/LazyCallThroughAndReexportsTest.cpp
Log Message:
-----------
[ORC] Replace JIT-dispatch handlers with call-controller handlers (#228628)
This is the executor-to-controller counterpart to Proxy: where Proxy
provides a uniform way to call functions in the executor,
call-controller handlers provide a uniform way for the executor to call
handlers in the controller.
Handlers are now registered as CallControllerHandlerBindings, which
decouples ExecutionSession's handler registration from
SimplePackedSerialization. The new bindCallControllerHandlerSPS utility
makes it easy to introduce a new SPS handler with a one-liner, using
either a lambda:
ES.registerCallControllerHandlers(
JD, bindCallControllerHandlerSPS<int32_t(int32_t, int32_t)>(
SymbolNameSpec::c("add_tag"),
[](unique_function<void(int32_t)> Return,
int32_t X, int32_t Y) {
Return(X + Y);
}));
or a method:
ES.registerCallControllerHandlers(
JD, bindCallControllerHandlerSPS<SPSError(SPSExecutorAddr)>(
SymbolNameSpec::c("foo_tag"), &FooInstance, &Foo::func));
Tag names are expressed as SymbolNameSpecs, so callers no longer need to
pre-mangle or intern them.
This replaces ExecutionSession's JIT-dispatch handler API
(JITDispatchHandlerAssociationMap, wrapAsyncWithSPS,
registerJITDispatchHandlers, runJITDispatchHandler) with:
- CallControllerHandlerBinding, which associates a tag name and
SymbolLookupFlags with a CallControllerHandlerFn.
- registerCallControllerHandlers, which takes a std::vector of bindings,
plus a variadic convenience overload so that bindings can be constructed
inline at the call site.
- bindCallControllerHandlerSPS (in the new
BindCallControllerHandlerSPS.h header), which replaces wrapAsyncWithSPS.
- runCallControllerHandler, which replaces runJITDispatchHandler.
Handlers now receive their argument bytes as a WrapperFunctionBuffer.
Tags are now looked up using each binding's lookup flags, which default
to RequiredSymbol. Previously all tags were looked up as weakly
referenced, and handlers for missing tags were silently dropped. A
missing tag is now an error unless its binding is weakly referenced.
Since SymbolNameSpec takes care of mangling, MachOPlatform no longer
needs the "__orc_rt_resolve_tag" -> "___orc_rt_resolve_tag" alias in
standardLazyCompilationAliases, and it has been removed.
All in-tree clients have been updated. JITLinkLazyReexportsTest.Basics
now defines __orc_rt_resolve_tag, which it previously relied on the weak
lookup to tolerate. New unit tests cover tag mangling, missing required
and weak tags, duplicate bindings, and already-registered tags.
Assisted-by: Claude
Commit: e8b9c1990a691bee7b42db18936e1c2892de6e68
https://github.com/llvm/llvm-project/commit/e8b9c1990a691bee7b42db18936e1c2892de6e68
Author: Divyansh Yadav <anshmcs at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
A llvm/test/CodeGen/RISCV/pr228084.ll
Log Message:
-----------
[RISCV] Don't truncate MaxAlignment to int when realigning the stack (#228225)
emitPrologue casts MaxAlignment to int before checking whether the mask
fits in an ANDI immediate. With an alloca of align 4294967296 the cast
gives 0, the isInt<12> check passes, and we emit `andi sp, sp, 0`.
Casting to int64_t instead makes this case use the srli/slli sequence.
This is the patch Mitch Briles posted on the issue, but with int64_t
instead of long, since long is only 32 bits on Windows hosts.
The test is RV64 only. On RV32 this alignment already fails with "Should
only materialize 32-bit constants for RV32" while setting up the frame
(before and after this change), so it couldn't go into
stack-realignment.ll alongside the RV32 run lines.
Fixes #228084
Co-authored-by: Mitch Briles <mitchbriles at gmail.com>
Commit: f8be54bc80fc677344e6639493894d32a12f0c47
https://github.com/llvm/llvm-project/commit/f8be54bc80fc677344e6639493894d32a12f0c47
Author: Matteo Di Iorio <matteo.diiorio2 at studio.unibo.it>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/BufferOptimizations.cpp
M mlir/test/Dialect/Bufferization/Transforms/buffer-hoisting.mlir
M mlir/test/Dialect/Bufferization/Transforms/buffer-loop-hoisting.mlir
M mlir/test/Dialect/Bufferization/Transforms/transform-ops.mlir
Log Message:
-----------
[mlir][bufferization] Fix placement walk crashes and invalid captures (#228050)
`findPlacementBlock`, which is shared by `buffer-hoisting` and
`buffer-loop-hoisting`, can move an allocation outside the operation
used to build the liveness analysis. For example, when
`transform.bufferization.buffer_loop_hoisting` targets a `scf.while`,
moving the allocation into the enclosing function block causes the
liveness lookup to crash.
The walk can also cross an `IsIsolatedFromAbove` operation and introduce
an illegal capture, or reach an unreachable enclosing block and
dereference a missing dominator node. The initial reachability check on
the allocation's block doesn't cover that second case.
This PR keeps allocations inside the analysis target and isolated
regions, and stops the walk before querying a dominator node for an
unreachable block. Movement between blocks within the same region
remains allowed.
I've also added regression tests for these cases, plus one that targets
the enclosing function and checks that the allocation still moves out of
the loop. On the base, the scope and unreachable-parent tests crash,
while the isolation test fails verification.
Changes were made by splitting them out of #226951, as suggested during
[review](https://github.com/llvm/llvm-project/pull/226951#pullrequestreview-5372976164).
The failures also reproduce without the exit-alias fallback presented in
that PR.
Validation:
Release build with assertions on macOS, `check-mlir` completed with 4052
passed and one expected failure.
Co-authored-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Co-authored-by: Matthias Springer <me at m-sp.org>
Commit: 5b0641b728a96c970221efda94e3fd6197711101
https://github.com/llvm/llvm-project/commit/5b0641b728a96c970221efda94e3fd6197711101
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/.clang-format
Log Message:
-----------
[mlir] Set WrapNamespaceBodyWithEmptyLines: Never (#221421)
MLIR predominantly writes namespace bodies without a wrapping empty
line: in mlir/lib and mlir/include 35% of bodies start with an empty
line and 32% end with one.
```
namespace ns { // no empty line below
struct A {
};
} // namespace ns // no empty live above
```
New code drifts the other way, partly related to LLM preference. Pin the
majority style using a clang-format 20 feature to stop further damage.
Commit: 8143db6025ae2092ca90f8b0efc43918a94df69f
https://github.com/llvm/llvm-project/commit/8143db6025ae2092ca90f8b0efc43918a94df69f
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M compiler-rt/lib/tsan/go/tsan_go.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
Log Message:
-----------
[NFC][TSan] Make Context::nreported atomic (#228602)
Make Context::nreported an atomic_uint32_t so that Finalize and
__tsan_report_count can read it without relying on report_mtx.
Assisted-by: Gemini
Commit: 140425be9bb3d80aa6e9c00e34ca516140ec1ff8
https://github.com/llvm/llvm-project/commit/140425be9bb3d80aa6e9c00e34ca516140ec1ff8
Author: Valentin Churavy <v.churavy at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M flang/docs/FlangDriver.md
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/unittests/Optimizer/HLFIRExtensionPointsTest.cpp
Log Message:
-----------
[flang] Add a MLIRToLLVMPassPipeline callbacks for plugins (#212195)
Expose the extension points of the HLFIR-to-FIR pass pipeline exposes extension points to plugins.
Follow-up to #212194
Assisted-by: Claude Code (Opus 5, Opus 5.5)
Commit: e141a4b162e965837859040c5da6b9f724d8d382
https://github.com/llvm/llvm-project/commit/e141a4b162e965837859040c5da6b9f724d8d382
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/include/llvm/Config/config.gni
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
R llvm/utils/gn/secondary/llvm/tools/libCASPluginTest/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-cas/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CAS/BUILD.gn
A llvm/utils/gn/secondary/llvm/unittests/CAS/CASPluginTest/BUILD.gn
Log Message:
-----------
[gn] port 82290a03b3cc a bit (CASPluginTest) (#228639)
Also disable llvm_enable_ondisk_cas for a bit until I can figure out how
to fix
dlopen(..../out/gn/lib/CASPluginTest.dylib, 0x0009):
symbol not found in flat namespace '__ZN4llvm4SHA15finalEv'
when running llvm/test/tools/llvm-cas lit tests. (The unit test passes.)
Commit: 0de9d9a7639bf648f26896e23b1d4cc1dc0457ea
https://github.com/llvm/llvm-project/commit/0de9d9a7639bf648f26896e23b1d4cc1dc0457ea
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/test/Dialect/Arith/canonicalize.mlir
Log Message:
-----------
[MLIR][arith] Fold or(a, or(a, b)) to or(a, b) (#228386)
`arith.andi` already folds `and(a, and(a, b))` to `and(a, b)`, but
`arith.ori` doesn't perform the equivalent fold, so using canonicalize
misses this opportunity.
Generalize the existing helper and use it for both ops.
Co-authored-by: Matthias Springer <me at m-sp.org>
Commit: d45ee87657a73e1029518287fb1fad03afee90f1
https://github.com/llvm/llvm-project/commit/d45ee87657a73e1029518287fb1fad03afee90f1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleRemoteCAOverSocketTest (#228642)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleRemoteCAOverSocketTest.
Commit: 259245637e29b933bccd75c9aec0828498a0d7df
https://github.com/llvm/llvm-project/commit/259245637e29b933bccd75c9aec0828498a0d7df
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port e95c8f57cc18 (#228646)
Commit: cc91bfe65be0b65700fa26b01ff00a9e3528f03d
https://github.com/llvm/llvm-project/commit/cc91bfe65be0b65700fa26b01ff00a9e3528f03d
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/reloc-alloc-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-no-symtab.test
Log Message:
-----------
Reland "[llvm-objcopy] Handle SHF_ALLOC relocation sections in relocatable files" (#228654)
This relands #227204, reverted by #228572 due to a UBSan failure in
compress-sections.s:
```
ELFObject.h:887:35: runtime error: load of value 190, which is not a valid value for type 'const bool'
```
--compress-sections on a relocation section creates a CompressedSection
that incorrectly keeps OriginalType SHT_RELA, so
RelocationSection::classof cast it and read
RelocationSectionBase::Dynamic. Set its OriginalType to SHT_PROGBITS,
which also fixes a TODO in Object::removeSections
Original description:
llvm-objcopy treats every SHF_ALLOC relocation section as dynamic and
requires its sh_link to refer to .dynsym. Linux livepatch modules
(ET_REL) contain SHF_ALLOC .klp.rela.* sections linked to .symtab
(SHF_ALLOC keeps them in module memory until the patched module loads),
so llvm-objcopy rejects them:
```
error: Link field value 4 in section .klp.rela.vmlinux.text is not a symbol table
```
A relocatable file has no dynamic symbol table, so treat all of its
relocation sections as static, as BFD does. Their symbol indexes are
then updated when the symbol table changes. Since SHF_ALLOC no longer
distinguishes RelocationSection from DynamicRelocationSection, record
the kind in RelocationSectionBase.
LLM-aided
Commit: 9a891dfc2c17fda49accc8c37cf4c2ddde6fa7d7
https://github.com/llvm/llvm-project/commit/9a891dfc2c17fda49accc8c37cf4c2ddde6fa7d7
Author: lntue <lntue at google.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M libc/CMakeLists.txt
M libc/src/__support/printf_core/CMakeLists.txt
Log Message:
-----------
[libc][cmake] Suppress -Wpsabi note on GCC and clean up resource-dir check. (#227968)
- Add `-Wno-psabi` to GCC compile options to suppress ABI change notes
for 80-bit long double unions.
- Pass `ERROR_QUIET` to clang-specific `--print-resource-dir` query in
`libc/CMakeLists.txt` so it does not output errors on GCC and MSVC.
Assisted-by: Gemini
Commit: a72683f5a2bf63c8ee6dfb3c510f298589db08fe
https://github.com/llvm/llvm-project/commit/a72683f5a2bf63c8ee6dfb3c510f298589db08fe
Author: lntue <lntue at google.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M libc/hdr/CMakeLists.txt
M libc/hdr/poll_macros.h
A libc/hdr/poll_overlay.h
M libc/hdr/sys_socket_macros.h
A libc/hdr/sys_socket_overlay.h
M libc/hdr/types/CMakeLists.txt
M libc/hdr/types/nfds_t.h
M libc/hdr/types/sa_family_t.h
M libc/hdr/types/socklen_t.h
M libc/hdr/types/struct_cmsghdr.h
M libc/hdr/types/struct_linger.h
M libc/hdr/types/struct_mmsghdr.h
M libc/hdr/types/struct_msghdr.h
M libc/hdr/types/struct_pollfd.h
M libc/hdr/types/struct_sockaddr.h
M libc/hdr/types/struct_sockaddr_storage.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc][hdr] Add poll and socket overlay headers for GCC overlay builds. (#227961)
When building LLVM libc in overlay mode with gcc/g++, alias and macro
redirections in GNU libc headers (such as ppoll and socket functions)
cause conflict with libc header declarations.
Fixes in this PR:
- Add `poll_overlay.h` and `sys_socket_overlay.h` to wrap system headers
before libc macros and type declarations in overlay mode.
- Update proxy headers in `libc/hdr/` and `libc/hdr/types/`.
- Update CMake and Bazel build files accordingly.
Assisted-by: Gemini
Commit: 5a3a399c2773bf4d86413e1855f6be2cf35da8af
https://github.com/llvm/llvm-project/commit/5a3a399c2773bf4d86413e1855f6be2cf35da8af
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
A llvm/test/Analysis/LoopCacheAnalysis/nestedloop-cost.ll
Log Message:
-----------
[LoopCacheAnalysis] Guard against bit-width overflow in computeRefCost (#224427)
In `computeRefCost()`, the non-consecutive access path estimates the
cache cost by multiplying the trip counts across outer loop dimensions.
Each multiplication ends up calling `getExtendedType()` to obtain an
integer type twice as wide as the current one.
For a deeply-nested loop (such as the 20-dimensional array found in this
change), it is possible for the doubling to exceed `MAX_INT_BITS`, which
triggers the following assert in `IntegerType::get()`.
```
Assertion failed: NumBits <= MAX_INT_BITS && "bitwidth too large", file llvm-project/llvm/lib/IR/Type.cpp, line 340, static IntegerType *llvm::IntegerType::get(LLVMContext &, unsigned int)()
```
This change checks whether the current integer width already exceeds
`MAX_INT_BITS / 2`. If this is true, the doubled width would overflow,
so we return `CacheCostTy::getInvalid()` instead of asserting.
Commit: a58d667a73a4fe91d11a5d43d98eb0020a76e91d
https://github.com/llvm/llvm-project/commit/a58d667a73a4fe91d11a5d43d98eb0020a76e91d
Author: wenhu1024 <96782898+wenhu1024 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
A llvm/test/CodeGen/NVPTX/lower-byval-args-icmp.ll
Log Message:
-----------
[NVPTX] Conservatively bail on unhandled byval pointer uses (#228439)
Commit: f475f085bf7ba0429d7a583a591a332eb1e56df3
https://github.com/llvm/llvm-project/commit/f475f085bf7ba0429d7a583a591a332eb1e56df3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Combine repeated code. NFC (#228163)
The body of these 2 if statements are identical and the if conditions
are equivalent to checking if the VT is XLenVT.
Commit: 0015ba584055f39bc729424ae77e3f5543169543
https://github.com/llvm/llvm-project/commit/0015ba584055f39bc729424ae77e3f5543169543
Author: lntue <lntue at google.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M libc/test/UnitTest/CMakeLists.txt
M libc/test/UnitTest/ExecuteFunctionUnix.cpp
M libc/test/src/math/smoke/AddTest.h
M libc/test/src/math/smoke/DivTest.h
M libc/test/src/math/smoke/MulTest.h
M libc/test/src/math/smoke/SubTest.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/UnitTest/BUILD.bazel
Log Message:
-----------
[libc][test] Fix death test timeouts and dead-code elimination in math tests. (#227966)
- In `ExecuteFunctionUnix.cpp`, call `prctl(PR_SET_DUMPABLE, 0)` in
child processes to prevent external core dump handlers (such as apport)
from intercepting expected crashes during death tests, eliminating 10s
poll timeouts under parallel lit runs.
- Close `pipe_fds[0]` properly in `invoke_in_subprocess` to avoid
leaking file descriptors.
- In math smoke test templates (`AddTest.h`, `SubTest.h`, `MulTest.h`,
`DivTest.h`), assign test function results to `[[maybe_unused]] volatile
OutType res` to prevent GCC from dead-code eliminating floating point
operations in `test_inexact_results` when FMA optimization is disabled.
Assisted-by: Gemini
Commit: 39e3785197388ebfa671e1f89943b022044c938c
https://github.com/llvm/llvm-project/commit/39e3785197388ebfa671e1f89943b022044c938c
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic-sve.c
M clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic.c
Log Message:
-----------
[CIR] Lowering for __builtin_reduce_assoc_fadd (#226095)
Added lowering for __builtin_reduce_assoc_fadd with the use of the new
implementation of CIR FastMathFlags, following same lowering path as
Classic Codegen.
Added tests for the same.
Commit: 4146a3d0ba40e0fdd675b0be2be0799a8630d4d7
https://github.com/llvm/llvm-project/commit/4146a3d0ba40e0fdd675b0be2be0799a8630d4d7
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV] Convert mask to scalable vector in lowerVPREDUCE. (#228219)
Assisted-by: Claude
Commit: b3e41fdb7435bc2080c62b4af7362fa89891393e
https://github.com/llvm/llvm-project/commit/b3e41fdb7435bc2080c62b4af7362fa89891393e
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/docs/HIPSupport.md
M clang/lib/CodeGen/CGException.cpp
A clang/test/CodeGenHipStdPar/unsupported-exceptions.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
A llvm/test/Transforms/HipStdPar/unsupported-exceptions.ll
Log Message:
-----------
[HIPStdPar] Report reachable C++ exceptions from GPU kernel (#228082)
HipStdPar removes all host functions which are unreachable but there can
be cases where some reachable function contains C++ exceptions it is
forced to device code and since GPU devices don't support C++ exceptions
it must be reported.
This change allows for any reachable C++ exception to be reported as
error.
Part of https://github.com/llvm/llvm-project/issues/221941
Commit: 0fae4df99cff6202ac9b49c2f09aa199d6c230bc
https://github.com/llvm/llvm-project/commit/0fae4df99cff6202ac9b49c2f09aa199d6c230bc
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/test/CodeGen/RISCV/fold-mem-offset.ll
Log Message:
-----------
[RISCV] Make sure ADDI isn't a frame index in RISCVMergeBaseOffsetOpt::foldLargeOffset. (#228635)
Fixes #228053
Commit: d97a5ad5e813605511f6b165cce7a8006303b971
https://github.com/llvm/llvm-project/commit/d97a5ad5e813605511f6b165cce7a8006303b971
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Make protected members of DenseMapBase private (NFC) (#228651)
Neither DenseMap nor SmallDenseMap accesses these members after #227063.
This patch also moves getMemorySize into the main public section.
Assisted-by: Antigravity
Commit: 0bdb3936ad4d68e2e98bb591f094c862b65ab569
https://github.com/llvm/llvm-project/commit/0bdb3936ad4d68e2e98bb591f094c862b65ab569
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/tools/llvm-objcopy/ELF/reserved-shndx.test
R llvm/test/tools/llvm-objcopy/ELF/section-index-unsupported.test
R llvm/test/tools/llvm-objcopy/ELF/unsupported-machine-specific-shndx.test
Log Message:
-----------
[llvm-objcopy,test] Reorganize reserved st_shndx tests (#228664)
Rename section-index-unsupported.test to reserved-shndx.test, fold
unsupported-machine-specific-shndx.test into it, and enhance it.
Commit: 6a61012344ec10ce7ec109d490fc201d1fa56bef
https://github.com/llvm/llvm-project/commit/6a61012344ec10ce7ec109d490fc201d1fa56bef
Author: hstk30-hw <hanwei62 at huawei.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
A llvm/test/CodeGen/AArch64/scalar_to_vector.ll
Log Message:
-----------
[AArch64][SelectionDAG] Avoid fold bitcast of scalar_to_vector to anyext in big-endian (#225442)
```
int_vt (bitcast (vec_vt (scalar_to_vector elt_vt:x)))
=> int_vt (any_extend elt_vt:x)
```
This pattern not legal in big-endian, so disable in big-endian.
Fix https://github.com/llvm/llvm-project/issues/225436
Commit: 2c352018732fbae6f6ea334c8e01610def782be0
https://github.com/llvm/llvm-project/commit/2c352018732fbae6f6ea334c8e01610def782be0
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/and-mask-variable.ll
M llvm/test/CodeGen/AArch64/fcvt-i256.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
M llvm/test/CodeGen/AArch64/shift.ll
Log Message:
-----------
[GlobalISel] [AArch64] Extend SelectShiftMask to handle ADD/SUB mod patterns (#225842)
AArch64 shift instructions only use the low log2(ShiftWidth) bits of the
shift amount, so shifting by X+N where N == 0 mod ShiftWidth is
equivalent to shifting by X alone.
This extends both SelectionDAG (SelectShiftMask) and GlobalISel
(selectShiftMask) implementations.
Part of the incremental work tracked in #224245 to replace
tryShiftAmountMod with ComplexPattern-based isel.
Depends on #223136.
Commit: 6cd72b33224f0c3002b41e0e356eb2ab94ab3545
https://github.com/llvm/llvm-project/commit/6cd72b33224f0c3002b41e0e356eb2ab94ab3545
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/index/IndexAction.cpp
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/CommentOptions.h
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/include/clang/Sema/AnalysisBasedWarnings.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaDecl.cpp
A clang/test/AST/ast-dump-comment-retention.cpp
A clang/test/Sema/Inputs/documentation-system-header-doc.h
A clang/test/Sema/Inputs/documentation-system-header.h
A clang/test/Sema/warn-documentation-comment-retention.cpp
A clang/test/Sema/warn-documentation-system-header-retained.cpp
A clang/test/Sema/warn-documentation-system-header.cpp
Log Message:
-----------
Reland "[clang] Don't add documentation comments to the AST if not requested (#206363)" (#221605)
The original PR caused a huge
[regression](https://llvm-compile-time-tracker.com/compare.php?from=aa1058e34a6127df91898829b0e60cbae3111cbf&to=e046dce4a4c80610b49d67bc02c85f86b1a6353d&stat=instructions:u)
The problem was that `areAllIgnored` ends up being called once per
declared entity, and each call walks all 26 diagnostics in
`-Wdocumentation` and `-Wdocumentation-pedantic`. So now the result is
cached and it's a performance
[improvement](https://llvm-compile-time-tracker.com/compare.php?from=5d063386f51b7d9925df7db5f05ec2f0a33f63c4&to=e8f7f96262a312739a990d1747a332ba6f1859b3&stat=instructions%3Au)
again.
The cache is keyed on the diagnostic state plus whether the location is
in a system header, because both change the answer. Keying it on the
state alone is wrong: a declaration coming from a system header would
cache "off" and silence the comments in the user's own code after it.
There is a test for that.
Also, Claude noticed that a similar thing is done in
`DoEmitAvailabilityWarning`, so i moved it out in the NFC to reuse it.
closes https://github.com/llvm/llvm-project/issues/165515
Assisted-By: Opus 5.
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: 6f88885684b09e68bb2f2fe5cc6963994c6e47bf
https://github.com/llvm/llvm-project/commit/6f88885684b09e68bb2f2fe5cc6963994c6e47bf
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenMP/Transforms/HostOpFiltering.cpp
M mlir/test/Dialect/OpenMP/host-op-filtering.mlir
Log Message:
-----------
[Flang][MLIR] Fix reset for OpenMP dyn_groupprivate clause (#228177)
Commit: 382e6ffb470947cb63eb2fde99a2b9e0813e2293
https://github.com/llvm/llvm-project/commit/382e6ffb470947cb63eb2fde99a2b9e0813e2293
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Treat call_once arguments as noescape (#224492)
call_once does not store the lambda in heap so consider all its
arguments as noescape.
Commit: 195c81658995a4b7531c30a12c5aef6cf2bbd671
https://github.com/llvm/llvm-project/commit/195c81658995a4b7531c30a12c5aef6cf2bbd671
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Core.cpp
Log Message:
-----------
ORC: Fix flaky OrcLazy tests (#228619)
I've seen this fail a few too many times so just let AI deal with it. I
don't
know anything about orc, but extending lifetime of lock_guard seems
plausible.
Notify lookupInitSymbols CV while holding the mutex
The init-symbol lookup completion callback decremented Count under
LookupMutex but called CV.notify_one() after releasing it. The waiting
thread could observe Count == 0, return from lookupInitSymbols, and
destroy the stack-allocated mutex and condition variable before the
callback signalled it. With concurrent compile threads the callback runs
on a dispatcher thread, so the late notify wrote into reused stack
memory, e.g. during endSession right after deinitialize.
This caused intermittent crashes in
ExecutionEngine/OrcLazy/multiple-compile-threads-basic.ll on macOS
(#50408, #126982). MachOPlatform and ELFNixPlatform already notify their
bootstrap condition variables under the mutex for the same reason.
Co-authored-by: Claude
[noreply at anthropic.com](mailto:noreply at anthropic.com)
Co-authored-by: Claude <noreply at anthropic.com>
Commit: 09648b667cbdef23b270bca1f7f33e5620f70cb9
https://github.com/llvm/llvm-project/commit/09648b667cbdef23b270bca1f7f33e5620f70cb9
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
Log Message:
-----------
[GlobalISel] [AArch64] Extend SelectShiftMask to handle ADD/SUB mod patterns (#225842)
AArch64 shift instructions only use the low log2(ShiftWidth) bits of the
shift amount, so shifting by X+N where N == 0 mod ShiftWidth is
equivalent to shifting by X alone.
This extends both SelectionDAG (SelectShiftMask) and GlobalISel
(selectShiftMask) implementations.
Part of the incremental work tracked in #224245 to replace
tryShiftAmountMod with ComplexPattern-based isel.
Depends on #223136.
Commit: 7516fa2ca8a47c15f5f31265f05c1157b56bb735
https://github.com/llvm/llvm-project/commit/7516fa2ca8a47c15f5f31265f05c1157b56bb735
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
Log Message:
-----------
[webkit.UncountedLambdaCapturesChecker] Treat call_once arguments as noescape (#224492)
call_once does not store the lambda in heap so consider all its
arguments as noescape.
Commit: 92ee37966563310901951b1b5a89bcbafbcea767
https://github.com/llvm/llvm-project/commit/92ee37966563310901951b1b5a89bcbafbcea767
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleRemoteCATest (#228672)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleRemoteCATest.
Commit: edeaf21083ce4e4c43e50100db2775a4f78ad7a5
https://github.com/llvm/llvm-project/commit/edeaf21083ce4e4c43e50100db2775a4f78ad7a5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/Thumb/optional-def-dead-cpsr.ll
Log Message:
-----------
ARM: Preserve the dead flag when activating the optional CPSR def (#227655)
This did not preserve the original dead flag, so it would be recomputed later by
LiveVariables or RegAllocFast.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 283cb39881e10a547dc59be0eb2f051135b39124
https://github.com/llvm/llvm-project/commit/283cb39881e10a547dc59be0eb2f051135b39124
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sys/darwin/StandaloneMachOUnwindInfoRegistrarTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in StandaloneMachOUnwindInfoRegistrar… (#228679)
…Test
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in StandaloneMachOUnwindInfoRegistrarTest.
Commit: 1e80bdc439e5034eecd5e667132aaab24636a188
https://github.com/llvm/llvm-project/commit/1e80bdc439e5034eecd5e667132aaab24636a188
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
Log Message:
-----------
CodeGen: Prefer getting the Triple from the Module when convenient (#228429)
Take the triple from the contextual module rather than TargetMachine when it's
already readily available.
Commit: 4aaffe88596a4de3570ebf887ed74fa3b8a90a0c
https://github.com/llvm/llvm-project/commit/4aaffe88596a4de3570ebf887ed74fa3b8a90a0c
Author: Michael Klemm <michael.klemm at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/requires03.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/requires06.f90
M flang/test/Semantics/OpenMP/requires07.f90
M flang/test/Semantics/OpenMP/requires08.f90
A flang/test/Semantics/OpenMP/requires11.f90
Log Message:
-----------
[Flang][OpenMP] Reset REQUIRES directive with new program unit (#227829)
A REQUIRES directive with unified_address, unified_shared_memory, or
reverse_offload must appear lexically before any device construct or
device routine is scoped to a program unit.
Commit: 51094783b642291cc29867fbaac520a2e858eb7b
https://github.com/llvm/llvm-project/commit/51094783b642291cc29867fbaac520a2e858eb7b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/support/AllocActionTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in AllocActionTest (#228680)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in AllocActionTest.
Commit: de20437cafa5d4e05b1e71008ef2b7c0a955d7c9
https://github.com/llvm/llvm-project/commit/de20437cafa5d4e05b1e71008ef2b7c0a955d7c9
Author: Shreesh Adiga <54449449+tantei3 at users.noreply.github.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M llvm/include/llvm/Support/CRC.h
Log Message:
-----------
[clang] Refactor CRC32 helper for x86 CRC builtins (#225774)
Move the reflected CRC32 calculation used by the x86 CRC builtins into
llvm::calculateReflectedCRC32() and reuse it from both the AST
interpreter and constant expression evaluator.
This removes duplicated CRC32 implementation logic from Clang. This is
planned to be used for implementing const folding CRC instructions for
x86 and AArch64 in the future in LLVM.
Based on suggestion in
https://github.com/llvm/llvm-project/pull/219452#discussion_r4070846498
Commit: 13b5de302c5efd3b8bbba20a3560018ac383a19f
https://github.com/llvm/llvm-project/commit/13b5de302c5efd3b8bbba20a3560018ac383a19f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64] Stop count cost once force-unroll threshold is reached (NFC). (#228247)
The cost is only used to compare against Aarch64ForceUnrollThreshold.
Stop counting when we reach it, to avoid unnecessary cost queries.
Reduces compile-time on AArch64 by -0.08%.
https://llvm-compile-time-tracker.com/compare.php?from=5ffb13d6d1f87195bba8af13366a152a7de2bfe0&to=18f3cab804f98653c6b3a56b6ac02c9f6960b672&stat=instructions:u
Commit: fdd93c0dc77eb314524bebb8b53db438f3dc1d7f
https://github.com/llvm/llvm-project/commit/fdd93c0dc77eb314524bebb8b53db438f3dc1d7f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
CodeGen: Prefer getting the Triple from the Module (#228620)
Take the triple from the contextual module rather than TargetMachine
when it's already readily available.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 67910b29d26511c68b6d2df956fd9e6a00b9db6b
https://github.com/llvm/llvm-project/commit/67910b29d26511c68b6d2df956fd9e6a00b9db6b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/unittests/Analysis/MemorySSATest.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M llvm/unittests/IR/DebugInfoTest.cpp
M llvm/unittests/IR/IRBuilderTest.cpp
M llvm/unittests/Transforms/Utils/SSAUpdaterBulkTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M polly/lib/CodeGen/BlockGenerators.cpp
M polly/lib/CodeGen/CodeGeneration.cpp
M polly/lib/CodeGen/IslExprBuilder.cpp
M polly/lib/CodeGen/IslNodeBuilder.cpp
Log Message:
-----------
[IRBuilder] Use SetInsertPoint without redundant BasicBlock argument (#228476)
Replace calls of `SetInsertPoint(BB, It)` with just
`SetInsertPoint(It)`. In preparation for deprecating that overload.
Commit: 6b3bdfea98b4dc21a45eb4f2b7b782d57f1c078a
https://github.com/llvm/llvm-project/commit/6b3bdfea98b4dc21a45eb4f2b7b782d57f1c078a
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Collect loop guards at most once in howManyLessThans (NFC). (#228687)
Add helper to collect loop guards once in howManyLessThans to avoid
repeated collections to limit compile-time increases if collection gets
more expensive (https://github.com/llvm/llvm-project/pull/228135) and
additional uses of loop guards are added to howManyLessThans (follow up)
Compile-time impact currently is in the noise
https://llvm-compile-time-tracker.com/compare.php?from=f81414dbe2ba478fa489730079263dbd546d18c0&to=171115fa4fa837b7ad9f9a6398e929a1a5866350&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/228687
Commit: c6b9e8e8600724204d85654070e6e5dc4b34643a
https://github.com/llvm/llvm-project/commit/c6b9e8e8600724204d85654070e6e5dc4b34643a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
Log Message:
-----------
[SLP][NFC]Add a test with non-profitable vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228695
Commit: 2bdc29f4239e7c0691ebf6f80903d5914c050bcf
https://github.com/llvm/llvm-project/commit/2bdc29f4239e7c0691ebf6f80903d5914c050bcf
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
Log Message:
-----------
[SLP]Pack unique consecutive loads instead of gathering duplicated lanes
A load bundle with duplicated lanes whose unique loads are consecutive
was kept as is and emitted as a masked gather. Pack the unique loads
into a single wide load plus a reuse shuffle, unless the target reports
the masked gather as cheaper.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228698
Commit: b028ea82203a25d29bf469286319a0e7b3daa1d5
https://github.com/llvm/llvm-project/commit/b028ea82203a25d29bf469286319a0e7b3daa1d5
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/test/CodeGen/ARM/inline-asm-clobber.ll
Log Message:
-----------
[ARM] fix `r14` aliasing `lr` on `thumb-1` (#225746)
Since https://github.com/llvm/llvm-project/pull/179740 `r14` is accepted
as an alias for `lr`, which works on `arm` and `thumb-2` targets, but
not on `thumb-1`
https://godbolt.org/z/WEEjMMj93
```llvm
; -mtriple=thumbv6m-none-eabi
define i32 @read_r14() nounwind {
start:
%1 = tail call i32 asm sideeffect alignstack "", "=&{r14},~{cc},~{memory}"()
ret i32 %1
}
```
Gives
```
error: register 'LR' allocated for constraint '{r14}' does not match required type
```
Apparently on `thumb-1` the register class of `lr` is not the same as
the class of `i32`. So, just truly make `{r14}` an alias for `{lr}`.
---
Found via https://github.com/rust-lang/rust/issues/163173.
We should backport this if we can.
Commit: 41618eade7104429cbd341cc97887935df170c65
https://github.com/llvm/llvm-project/commit/41618eade7104429cbd341cc97887935df170c65
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/support/sps/SimplePackedSerializationTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimplePackedSerializationTest (#228696)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimplePackedSerializationTest.
Commit: ef0f6d06eb188730224e9de54576aa69d4ee2d5f
https://github.com/llvm/llvm-project/commit/ef0f6d06eb188730224e9de54576aa69d4ee2d5f
Author: Shreesh Adiga <16567adigashreesh at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/include/llvm/Support/CRC.h
Log Message:
-----------
[Support] Add assert for DataBytes in calculateReflectedCRC32 (#228688)
Add an assertion to calculateReflectedCRC32 to check DataBytes is one of
the expected value (1, 2, 4, or 8 bytes).
Co-authored-by: Jared Wyles <jared.wyles at gmail.com>
Commit: cb474be5b5702bb48b7a6a31425cbe8497ac52df
https://github.com/llvm/llvm-project/commit/cb474be5b5702bb48b7a6a31425cbe8497ac52df
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/test/CodeGen/X86/taildup-callsiteinfo.mir
M llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-push-pop-stack-alloc.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
M llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-epilog-ops.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-prolog-ops.mir
M llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
Log Message:
-----------
[X86] Don't skip frame setup/destroy on SEH pseudos and regenerate tests (#225445)
As in title. Skipping setting setup/destroy flags caused pseudos to be
wrongly reordered by scheduling
Commit: e500488d4e50209e63cb34cbb49c61ec82cbceca
https://github.com/llvm/llvm-project/commit/e500488d4e50209e63cb34cbb49c61ec82cbceca
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/tools/OptionParserTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in OptionParserTest (#228701)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in OptionParserTest.
Commit: 321fea57c1adbbbca148789926a93afd90705e25
https://github.com/llvm/llvm-project/commit/321fea57c1adbbbca148789926a93afd90705e25
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/test/CodeGen/Mips/msa/compare_float.ll
Log Message:
-----------
[Mips][MSA] Fix commutability of unordered comparisons (#228567)
Remove IsCommutable from FCULT_W/D and FCULE_W/D, whose predicates are
directional. Extend the existing floating-point comparison tests to
check that reversed comparisons produce separate results.
Fixes: #228422
Commit: 21970fad0f647e437bec90cd73b3092dac29e8d9
https://github.com/llvm/llvm-project/commit/21970fad0f647e437bec90cd73b3092dac29e8d9
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleI6400.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec.ll
M llvm/test/CodeGen/Mips/msa/arithmetic_float.ll
M llvm/test/CodeGen/Mips/msa/buildvector-undef-loop.ll
Log Message:
-----------
[Mips][MSA] Lower vector fabs to BCLRI (#228532)
FMAX_A selects an original operand by magnitude and preserves its sign,
so fmax_a(x, x) does not implement fabs. Expand FABS_W and FABS_D to
clear bit 31 and bit 63 with BCLRI, and update their scheduling to match
the bit-clear instructions.
Fixes #228384.
Commit: 2c7b0d11bfeb8807081e63eee458066092a5a1cc
https://github.com/llvm/llvm-project/commit/2c7b0d11bfeb8807081e63eee458066092a5a1cc
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in InProcessControllerAccessTest (#228702)
Use the Error matchers introduced in 4c8a437d0487 in place of cantFail
on calls that can fail, so that a failure is reported as a test failure
rather than aborting the test binary (or, with assertions disabled,
going unnoticed).
Commit: 1e60b852a9d7f73ffed3540e9ea84aefde1b80ab
https://github.com/llvm/llvm-project/commit/1e60b852a9d7f73ffed3540e9ea84aefde1b80ab
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/PowerPC/ppcf128-constant-bitcast.ll
Log Message:
-----------
[PowerPC][SDAG] fix bitcast on ppc_f128 swapping the two halves (#208969)
fixes https://github.com/llvm/llvm-project/issues/44482
This is a long-standing issue
https://github.com/llvm/llvm-project/issues/44482, you can also see the
discrepancy in this small C program compiled with clang and GCC
https://godbolt.org/z/KK1q1EozM.
The representation of ppc_fp128 is endian-agnostic in that its
high-order double is stored at the lower address.
For example, 27.0 is represented in memory as `[0x403b000000000000,
0x0000000000000000]`. Bitcasting these 128 bits as an i128 on
little-endian means the upper 64 bits are `0x0000000000000000`, the
lower are `0x403b000000000000`.
But on big-endian the interpretation of the bytes is flipped, the upper
bits are now `0x403b000000000000` while the lower are in
`0x0000000000000000`.
The `bitcastToAPInt` does not account for endianness, so I've added a
manual rotation to put the right double in the expected place. This is
kind of fragile still, but at least fixes current issues.
---------
Co-authored-by: Amy Kwan <amy.kwan1 at ibm.com>
Commit: 284afa9de7eddc1fdd8798800e573d190dba7dff
https://github.com/llvm/llvm-project/commit/284afa9de7eddc1fdd8798800e573d190dba7dff
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
Log Message:
-----------
[flang][OpenMP] Move leftover functions from structure to loop, NFC (#228705)
There were some loop-related functions still left in the
check-omp-structure.cpp file. Move them to check-omp-loop.cpp.
Commit: cd8d3f00c51c2b5a0ebaad76d1a148ed0208953f
https://github.com/llvm/llvm-project/commit/cd8d3f00c51c2b5a0ebaad76d1a148ed0208953f
Author: n0ma <noam.bouillet at epitech.eu>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/Format/Format.h
M clang/lib/Format/Format.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/FormatTestJava.cpp
Log Message:
-----------
[clang-format] Allow one indent level before explicit access labels (#227704)
## Summary
With `IndentAccessModifiers: true`, clang-format indents record members
two levels even when the record has no explicit access label. Extend
`IndentAccessModifiers` with a third mode to allow one level until the
first explicit access label:
- `Never` (`false`): indent members one level and use
`AccessModifierOffset` for access labels.
- `Always` (`true`): indent members two levels, even without an explicit
access label.
- `AfterFirstAccessModifier`: indent members one level before the first
explicit access label and two levels from that label onward.
```yaml
IndentAccessModifiers: AfterFirstAccessModifier
```
It recognizes C++ and Qt access labels. When a record has no explicit
label, its members stay at one level.
The new behavior applies to C, C++, and Objective-C; other languages
treat the new mode like `Always`.
Existing configuration values `true` and `false` retain their behavior,
and style defaults are unchanged. C++ callers assigning a boolean
directly to `FormatStyle::IndentAccessModifiers` must now use the
corresponding enum value.
This makes the layout in #61631 possible without changing existing
configurations. It also addresses the related requests in #54333 and
#182566.
## Design point for review
If a record has members before its first explicit access label, those
members use one level, even when an access label appears later.
Reviewers may prefer a different option name or rule for that case.
## Development note
AI assisted with the fix as I'm not used to the codebase. I reviewed the
resulting patch and tests before submitting this PR.
Commit: 1f1a5b38374af3fc5afb52d91c91c0203b5edcdf
https://github.com/llvm/llvm-project/commit/1f1a5b38374af3fc5afb52d91c91c0203b5edcdf
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Integration/OpenMP/scope-allocate-clause.f90
A flang/test/Integration/OpenMP/semantic-override-clause-compound.f90
A flang/test/Integration/OpenMP/semantic-override-clause-werror.f90
A flang/test/Lower/OpenMP/compound-version-override.f90
M flang/test/Semantics/OpenMP/affinity-clause.f90
M flang/test/Semantics/OpenMP/allocate-clause-version.f90
M flang/test/Semantics/OpenMP/allocate_do1.f90
M flang/test/Semantics/OpenMP/atomic.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
M flang/test/Semantics/OpenMP/declare-target01.f90
M flang/test/Semantics/OpenMP/declare-target02.f90
M flang/test/Semantics/OpenMP/declare-target06.f90
M flang/test/Semantics/OpenMP/if-clause-45-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-45.f90
M flang/test/Semantics/OpenMP/if-clause-50-suggestion.f90
M flang/test/Semantics/OpenMP/if-clause-50.f90
M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
M flang/test/Semantics/OpenMP/threadset-clause.f90
Log Message:
-----------
[flang][OpenMP] Remember decision of allowing past/future clause (#227419)
When a deprecated or a future clause is used on a directive, and it is
allowed with a warning, remember that decision and consider that clause
allowed on that directive in all subsequent checks.
Introduce OpenMPDeprecated and OpenMPFuture warning categories
to guard these warnings (and the corresponding `-Wopenmp-deprecated`
and `-Wopenmp-future` options).
Commit: 5e3f47931ec57e7d215c7120b0f83938443e5ec1
https://github.com/llvm/llvm-project/commit/5e3f47931ec57e7d215c7120b0f83938443e5ec1
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/static-accessed-through-instance.md
R clang-tools-extra/docs/clang-tidy/checks/readability/static-accessed-through-instance.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.md
R clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.md
R clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/trailing-comma.md
R clang-tools-extra/docs/clang-tidy/checks/readability/trailing-comma.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.md
R clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/uniqueptr-delete-release.md
R clang-tools-extra/docs/clang-tidy/checks/readability/uniqueptr-delete-release.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.md
R clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.md
R clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-concise-preprocessor-directives.md
R clang-tools-extra/docs/clang-tidy/checks/readability/use-concise-preprocessor-directives.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [5/5] (#222032)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fifth part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: f38c56a690c26077ac35d3d43b4026a7dfa5a2b9
https://github.com/llvm/llvm-project/commit/f38c56a690c26077ac35d3d43b4026a7dfa5a2b9
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/static-accessed-through-instance.md
M clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.md
M clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.md
M clang-tools-extra/docs/clang-tidy/checks/readability/trailing-comma.md
M clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.md
M clang-tools-extra/docs/clang-tidy/checks/readability/uniqueptr-delete-release.md
M clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.md
M clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.md
M clang-tools-extra/docs/clang-tidy/checks/readability/use-concise-preprocessor-directives.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [5/5] (#222033)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fifth part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted (both Codex and AmpCode) cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: EugeneZelenko <eugene.zelenko at gmail.com>
Commit: 36207c0ed8417ceaf9c393d3704833dca9939633
https://github.com/llvm/llvm-project/commit/36207c0ed8417ceaf9c393d3704833dca9939633
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/cxx26.cpp
Log Message:
-----------
[clang][bytecode] Handle trivial CXXInheritedCtorInitExprs (#228352)
Commit: 2aa63fe0458bb5265756d05fa123df3d1b3a1dd6
https://github.com/llvm/llvm-project/commit/2aa63fe0458bb5265756d05fa123df3d1b3a1dd6
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M mlir/lib/Dialect/SparseTensor/IR/SparseTensorDialect.cpp
M mlir/test/Dialect/SparseTensor/roundtrip_encoding.mlir
M mlir/test/Dialect/SparseTensor/sparse_foreach.mlir
Log Message:
-----------
[mlir][sparse] Order the inferred lvlToDim results by dimension (#227674)
Commit: 971833ee5513f01a57439b15040887932af114fc
https://github.com/llvm/llvm-project/commit/971833ee5513f01a57439b15040887932af114fc
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M clang/docs/LanguageExtensions.md
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/builtin-align.c
M clang/test/SemaCXX/builtin-align-cxx.cpp
Log Message:
-----------
[Clang] Fix crash in alignment builtins with null pointers (#224549)
Clang can crash when evaluating __builtin_align_up,
__builtin_align_down, or __builtin_is_aligned with a null pointer.
Avoid querying base alignment for pointers without an underlying object
during constant evaluation.
Null pointers are handled as always aligned values, while other
base-less pointers are rejected rather than interpreted using their
numeric address.
Assisted-by: GPT-5.6
AI was used to assist with code analysis, debugging, and drafting the PR
description. I personally debugged, reviewed and verified the changes,
tested the code, and fully understand the submitted contribution.
Fixes https://github.com/llvm/llvm-project/issues/216999
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: ccee6a44e312ee2c724750b2b1d51df7265e9b67
https://github.com/llvm/llvm-project/commit/ccee6a44e312ee2c724750b2b1d51df7265e9b67
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M .github/CODEOWNERS
M .github/workflows/docs.yml
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/compressed-debug-sections.test
A bolt/test/AArch64/zlib-compressed-debug-sections.s
A bolt/test/AArch64/zstd-compressed-debug-sections.s
M bolt/test/CMakeLists.txt
M bolt/test/lit.site.cfg.py.in
M clang-tools-extra/clang-doc/tool/ClangDocMain.cpp
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/Compiler.cpp
M clang-tools-extra/clangd/ConfigProvider.cpp
M clang-tools-extra/clangd/ConfigProvider.h
M clang-tools-extra/clangd/fuzzer/clangd-fuzzer.cpp
M clang-tools-extra/clangd/index/IndexAction.cpp
M clang-tools-extra/clangd/indexer/IndexerMain.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
A clang-tools-extra/clangd/test/indexer-clangd-config-relative-path.test
A clang-tools-extra/clangd/test/indexer-clangd-config.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
M clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineInlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/static-accessed-through-instance.md
R clang-tools-extra/docs/clang-tidy/checks/readability/static-accessed-through-instance.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.md
R clang-tools-extra/docs/clang-tidy/checks/readability/string-compare.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.md
R clang-tools-extra/docs/clang-tidy/checks/readability/suspicious-call-argument.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/trailing-comma.md
R clang-tools-extra/docs/clang-tidy/checks/readability/trailing-comma.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.md
R clang-tools-extra/docs/clang-tidy/checks/readability/trivial-switch.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/uniqueptr-delete-release.md
R clang-tools-extra/docs/clang-tidy/checks/readability/uniqueptr-delete-release.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.md
R clang-tools-extra/docs/clang-tidy/checks/readability/uppercase-literal-suffix.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.md
R clang-tools-extra/docs/clang-tidy/checks/readability/use-anyofallof.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/use-concise-preprocessor-directives.md
R clang-tools-extra/docs/clang-tidy/checks/readability/use-concise-preprocessor-directives.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters-main.cpp
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
M clang/docs/ClangFormatStyleOptions.md
M clang/docs/HIPSupport.md
M clang/docs/LanguageExtensions.md
M clang/docs/ReleaseNotes.md
M clang/docs/SanitizerCoverage.md
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/BuiltinTypes.def
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/PropertiesBase.td
A clang/include/clang/AST/Reflection.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/CommentOptions.h
M clang/include/clang/Basic/Diagnostic.h
M clang/include/clang/Basic/DiagnosticIDs.h
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
A clang/include/clang/CodeGenUtils/StmtUtils.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/AnalysisBasedWarnings.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/include/module.modulemap
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
A clang/lib/AST/ByteCode/Reflect.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/Basic/Diagnostic.cpp
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPConstructDecomposition.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/SPIRV.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGGPUBuiltin.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGObjC.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenABITypes.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/lib/CodeGenUtils/StmtUtils.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/HIPAMD.cpp
M clang/lib/ExtractAPI/ExtractAPIConsumer.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/ASTUnit.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Headers/__clang_cuda_builtin_vars.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/Sema/AnalysisBasedWarnings.cpp
M clang/lib/Sema/Sema.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaAvailability.cpp
M clang/lib/Sema/SemaDecl.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.apinotes
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.h
M clang/test/APINotes/Inputs/Headers/ExportAs.apinotes
A clang/test/APINotes/Inputs/Headers/ExportAsCore.apinotes
M clang/test/APINotes/Inputs/Headers/ExportAsCore.h
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.apinotes
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
M clang/test/APINotes/properties.m
A clang/test/APINotes/slice-groups-exact.c
A clang/test/APINotes/slice-groups-order.c
A clang/test/APINotes/slice-groups.c
M clang/test/APINotes/versioned-version-independent.m
M clang/test/APINotes/versioned.m
M clang/test/AST/ByteCode/cxx26.cpp
A clang/test/AST/ast-dump-APValue-reflection.cpp
A clang/test/AST/ast-dump-comment-retention.cpp
M clang/test/Analysis/Checkers/WebKit/mock-types.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/block-in-critical-section.cpp
M clang/test/Analysis/dead-stores.c
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
A clang/test/CIR/CodeGen/array-subscript-order.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/bitint-record-layout.c
A clang/test/CIR/CodeGen/const-init-multi-base.cpp
A clang/test/CIR/CodeGen/get-member-addrspace.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/misc-attrs.cpp
A clang/test/CIR/CodeGen/mustprogress.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union.c
A clang/test/CIR/CodeGen/uwtable.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGen/wide-string.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
M clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic-sve.c
M clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic.c
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
A clang/test/CIR/CodeGenCUDA/global-addrspace-cast.cu
A clang/test/CIR/CodeGenCUDA/nounwind.cu
M clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
M clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
M clang/test/CIR/CodeGenCoroutines/coro-task.cpp
A clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
A clang/test/CIR/CodeGenHIP/inline-asm-multi-output-addrspace.hip
A clang/test/CIR/CodeGenHIP/string-literal-addrspace.hip
A clang/test/CIR/CodeGenHLSL/cxx-this-lvalue.hlsl
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
A clang/test/CIR/CodeGenOpenCL/global-vars.cl
A clang/test/CIR/CodeGenOpenCL/nounwind.cl
A clang/test/CIR/CodeGenOpenCL/string-literal-addrspace.cl
M clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/CodeGenOpenMP/target-parallel.c
M clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
M clang/test/CIR/CodeGenSYCL/kernel-caller-attributes.cpp
A clang/test/CIR/CodeGenSYCL/nounwind.cpp
A clang/test/CIR/CodeGenSYCL/string-literal-addrspace-nyi.cpp
M clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/co-return.cir
R clang/test/CIR/IR/coro-body.cir
A clang/test/CIR/IR/coro-noop.cir
A clang/test/CIR/IR/coroutine.cir
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-await.cir
M clang/test/CIR/IR/invalid-co-return.cir
R clang/test/CIR/IR/invalid-coro-body.cir
A clang/test/CIR/IR/invalid-coroutine.cir
M clang/test/CIR/IR/invalid-func-attr.cir
M clang/test/CIR/IR/invalid-global.cir
M clang/test/CIR/IR/invalid-struct.cir
M clang/test/CIR/IR/invalid-version.cir
A clang/test/CIR/IR/max-work-group-size.cir
M clang/test/CIR/IR/version.cir
A clang/test/CIR/Lowering/coro-noop.cir
A clang/test/CIR/Lowering/max-work-group-size.cir
M clang/test/CIR/Lowering/opencl-version-metadata.cir
A clang/test/CIR/Transforms/inline-asm-side-effects.cir
M clang/test/CIR/Transforms/switch-fold.cir
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
A clang/test/CodeGenCXX/reflection-emit-meta-info-itanium.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-ms.cpp
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
R clang/test/CodeGenCXX/reflection-mangle-ms.cpp
A clang/test/CodeGenHLSL/builtins/select_mat.hlsl
A clang/test/CodeGenHipStdPar/unsupported-exceptions.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
M clang/test/Driver/cl-options.c
M clang/test/Driver/hip-profile-rocm-runtime.hip
M clang/test/Driver/sycl-offload-jit.cpp
A clang/test/Interpreter/CUDA/empty-device-module.cu
M clang/test/Interpreter/pretty-print.cpp
M clang/test/OpenMP/nvptx_target_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/nvptx_target_teams_generic_loop_codegen.cpp
A clang/test/OpenMP/requires_module.cpp
A clang/test/OpenMP/requires_pch.cpp
A clang/test/OpenMP/target_map_section_inbounds.cpp
M clang/test/OpenMP/target_parallel_codegen.cpp
M clang/test/OpenMP/target_parallel_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_codegen.cpp
M clang/test/OpenMP/target_parallel_for_debug_codegen.cpp
M clang/test/OpenMP/target_parallel_for_simd_codegen.cpp
M clang/test/OpenMP/target_parallel_generic_loop_codegen-3.cpp
M clang/test/OpenMP/target_teams_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_simd_codegen.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
A clang/test/PCH/reflection.cpp
A clang/test/PCH/reflection_include.h
M clang/test/Parser/MicrosoftExtensions.cpp
A clang/test/Parser/c23-enum-generic-assoc.c
A clang/test/Sema/Inputs/documentation-system-header-doc.h
A clang/test/Sema/Inputs/documentation-system-header.h
M clang/test/Sema/builtin-align.c
A clang/test/Sema/constexpr-builtin-stdc-memreverse8-typed.c
M clang/test/Sema/redefine_extname.c
M clang/test/Sema/redefine_extname.cpp
A clang/test/Sema/reflection-meta-info.fail.cpp
A clang/test/Sema/reflection-meta-info.pass.cpp
A clang/test/Sema/warn-documentation-comment-retention.cpp
A clang/test/Sema/warn-documentation-system-header-retained.cpp
A clang/test/Sema/warn-documentation-system-header.cpp
M clang/test/SemaCUDA/cuda-builtin-vars.cu
M clang/test/SemaCXX/builtin-align-cxx.cpp
A clang/test/SemaCXX/constexpr-builtin-stdc-memreverse8.cpp
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/select_mat-errors.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M clang/test/SemaTemplate/instantiate-var-template.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/CIR/ControlFlowTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestCSharp.cpp
M clang/unittests/Format/FormatTestJava.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Interpreter/DeviceOffloadTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/ResolveImportedPathTest.cpp
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
M compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_offload.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
M compiler-rt/lib/scudo/standalone/memtag.h
M compiler-rt/lib/tsan/go/tsan_go.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.cpp
M compiler-rt/lib/tsan/rtl/tsan_rtl.h
M compiler-rt/lib/tsan/rtl/tsan_rtl_report.cpp
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
A compiler-rt/test/asan/TestCases/Windows/intercept_memmove.cpp
M compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
A compiler-rt/test/msan/getaddrinfo-padding.cpp
M compiler-rt/test/msan/getaddrinfo-positive.cpp
M compiler-rt/test/msan/release_origin.c
A compiler-rt/test/sanitizer_common/TestCases/getaddrinfo.cpp
A compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_summary.cpp
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/test/Driver/fpe-trap-exec-denormal.f90
M flang-rt/test/Driver/fpe-trap-exec-divzero.f90
M flang-rt/test/Driver/fpe-trap-exec-inexact.f90
M flang-rt/test/Driver/fpe-trap-exec-overflow.f90
M flang-rt/test/Driver/fpe-trap-exec-underflow.f90
M flang-rt/test/Driver/fpe-trap-exec.f90
M flang-rt/test/lit.cfg.py
M flang/docs/FlangDriver.md
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/Passes/Pipelines.h
M flang/include/flang/Parser/message.h
M flang/include/flang/Semantics/openmp-utils.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/FrontendActions.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/check-omp-variant.cpp
M flang/lib/Semantics/openmp-utils.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Support/Fortran-features.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-4.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-6.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-7.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-9.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-allocatable.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-array.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-target.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-zero-offset-view-chain.fir
M flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
M flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
M flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/modref-alloc-free-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-external-name-conversion.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
M flang/test/Analysis/AliasAnalysis/modref-call-intent.fir
M flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
A flang/test/Analysis/AliasAnalysis/modref-call-null.fir
M flang/test/Analysis/AliasAnalysis/modref-call-recursive.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer-char-len.fir
M flang/test/Fir/CUDA/cuda-data-transfer-defer-acc-routine.mlir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
M flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
M flang/test/Fir/CUDA/cuda-sync-desc.mlir
M flang/test/Fir/CUDA/cuf-offload-livein-value-canonicalization.fir
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/any.fir
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/if-extra.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
M flang/test/Fir/FirToSCF/sum.fir
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
M flang/test/Fir/MIF/co_broadcast.mlir
M flang/test/Fir/MIF/co_max.mlir
M flang/test/Fir/MIF/co_min.mlir
M flang/test/Fir/MIF/co_sum.mlir
M flang/test/Fir/MIF/coarray-alloc.mlir
M flang/test/Fir/MIF/coarray_alloc_many_declare.mlir
M flang/test/Fir/MIF/cobound.mlir
M flang/test/Fir/MIF/coshape.mlir
M flang/test/Fir/MIF/form_team.mlir
M flang/test/Fir/MIF/get_team.mlir
M flang/test/Fir/MIF/image_index.mlir
M flang/test/Fir/MIF/num_images.mlir
M flang/test/Fir/MIF/sync_all.mlir
M flang/test/Fir/MIF/sync_images.mlir
M flang/test/Fir/MIF/sync_memory.mlir
M flang/test/Fir/MIF/sync_team.mlir
M flang/test/Fir/MIF/team_number.mlir
M flang/test/Fir/MIF/this_image.mlir
M flang/test/Fir/OpenACC/acc-erase-unused-kernel-allocations.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-clauses.mlir
M flang/test/Fir/OpenACC/acc-routine-to-gpu-func.fir
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Fir/OpenACC/device-ptr-to-cuf-kernel.mlir
M flang/test/Fir/OpenACC/legalize-data.fir
M flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-declare-storage.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-alloc.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-copy.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-free.mlir
M flang/test/Fir/OpenACC/propagate-attr-folding.fir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Fir/OpenACC/recipe-populate-private.mlir
M flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/Fir/OpenACC/use-device-canonicalizer.mlir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-coor-canonicalization.fir
M flang/test/Fir/boxproc-openmp.fir
M flang/test/Fir/convert-to-llvm.fir
M flang/test/Fir/cse.fir
M flang/test/Fir/cuf-invalid.fir
M flang/test/Fir/cuf.mlir
M flang/test/Fir/declare-codegen.fir
M flang/test/Fir/declare.fir
M flang/test/Fir/declare_value-codegen.fir
M flang/test/Fir/dispatch.f90
M flang/test/Fir/do_concurrent.fir
M flang/test/Fir/dummy-scope-codegen.fir
M flang/test/Fir/dummy_scope.fir
M flang/test/Fir/embox.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/invalid.fir
M flang/test/Fir/logical-convert.fir
M flang/test/Fir/mem2reg.mlir
M flang/test/Fir/simd-nontemporal.fir
M flang/test/Fir/struct-return-x86-64.fir
M flang/test/Fir/target-rewrite-complex.fir
M flang/test/Fir/tbaa-codegen.fir
M flang/test/Fir/tbaa-codegen2.fir
M flang/test/HLFIR/all-lowering.fir
M flang/test/HLFIR/any-lowering.fir
M flang/test/HLFIR/apply-codegen.fir
M flang/test/HLFIR/as_expr-codegen-polymorphic.fir
M flang/test/HLFIR/as_expr-codegen.fir
M flang/test/HLFIR/assign-codegen.fir
M flang/test/HLFIR/assign-simple-routing.fir
M flang/test/HLFIR/associate-codegen.fir
M flang/test/HLFIR/associate.fir
M flang/test/HLFIR/assumed-type-actual-args.f90
M flang/test/HLFIR/assumed_shape_with_value_keyword.f90
M flang/test/HLFIR/boxchar_emboxing.f90
M flang/test/HLFIR/bufferize-associate-block-ordering.fir
M flang/test/HLFIR/bufferize-conditional.fir
M flang/test/HLFIR/bufferize-destroy-for-derived.fir
M flang/test/HLFIR/bufferize-end-associate-for-derived.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
M flang/test/HLFIR/bufferize-workshare.fir
M flang/test/HLFIR/bufferize01.fir
M flang/test/HLFIR/c_devptr_byvalue.cuf
M flang/test/HLFIR/c_ptr_byvalue.f90
M flang/test/HLFIR/call_with_poly_dummy.f90
M flang/test/HLFIR/char_assign.fir
M flang/test/HLFIR/char_extremum-bufferization.fir
M flang/test/HLFIR/cmpchar-lowering.fir
M flang/test/HLFIR/concat-bufferization.fir
M flang/test/HLFIR/convert-assign-inside-openacc-recipe.fir
M flang/test/HLFIR/count-lowering.fir
M flang/test/HLFIR/cshift-lowering.fir
M flang/test/HLFIR/declare-alloc-target.fir
M flang/test/HLFIR/declare-codegen.fir
M flang/test/HLFIR/declare.fir
M flang/test/HLFIR/designate-codegen-complex-part.fir
M flang/test/HLFIR/designate-codegen-component-refs.fir
M flang/test/HLFIR/designate-codegen.fir
M flang/test/HLFIR/dot_product-lowering.fir
M flang/test/HLFIR/dummy_scope.fir
M flang/test/HLFIR/element-codegen-issue-118922.fir
M flang/test/HLFIR/elemental-codegen-nested.fir
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/HLFIR/elemental-cse.fir
M flang/test/HLFIR/elemental-shallow-copy.fir
M flang/test/HLFIR/elemental-with-empty-check-codegen.fir
M flang/test/HLFIR/eoshift-lowering.fir
M flang/test/HLFIR/eval_in_mem-codegen.fir
M flang/test/HLFIR/expression-simplification.fir
M flang/test/HLFIR/extents-of-shape-of.f90
M flang/test/HLFIR/get_length_codegen.fir
M flang/test/HLFIR/getextent-codegen.fir
M flang/test/HLFIR/getextent.fir
M flang/test/HLFIR/index-lowering.fir
M flang/test/HLFIR/inline-elemental-multi-users.fir
M flang/test/HLFIR/inline-elemental.fir
M flang/test/HLFIR/inline-hlfir-assign-allocatable-expr.fir
M flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
M flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
M flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
M flang/test/HLFIR/inline-hlfir-assign-self-copy.fir
M flang/test/HLFIR/inline-hlfir-assign.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/HLFIR/invalid.fir
M flang/test/HLFIR/matmul-lowering.fir
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M flang/test/HLFIR/minloc-lowering.fir
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M flang/test/HLFIR/minval-maxval-issue-134308.fir
M flang/test/HLFIR/mul_transpose.f90
M flang/test/HLFIR/no_reassoc-codegen.fir
M flang/test/HLFIR/opt-array-slice-assign.fir
M flang/test/HLFIR/opt-bufferization-dealloc-conflict.fir
M flang/test/HLFIR/opt-bufferization-elemental-assign-shape.fir
M flang/test/HLFIR/opt-bufferization-eval_in_mem-with-associate.fir
M flang/test/HLFIR/opt-bufferization-eval_in_mem.fir
M flang/test/HLFIR/opt-bufferization-leslie3d.fir
M flang/test/HLFIR/opt-bufferization-non-realloc-assignment.fir
M flang/test/HLFIR/opt-bufferization-same-ptr-elemental.fir
M flang/test/HLFIR/opt-bufferization-skip-volatile.fir
M flang/test/HLFIR/opt-bufferization-tonto.fir
M flang/test/HLFIR/opt-bufferization.fir
M flang/test/HLFIR/opt-scalar-assign.fir
M flang/test/HLFIR/opt-variable-assign-omp.fir
M flang/test/HLFIR/optional_dummy.f90
M flang/test/HLFIR/order_assignments/array-temp-many-forall.f90
M flang/test/HLFIR/order_assignments/array-temp.fir
M flang/test/HLFIR/order_assignments/forall-codegen-no-conflict.fir
M flang/test/HLFIR/order_assignments/forall-pointer-assignment-codegen.fir
M flang/test/HLFIR/order_assignments/forall-proc-pointer-assignment-codegen.fir
M flang/test/HLFIR/order_assignments/impure-where.fir
M flang/test/HLFIR/order_assignments/inlined-stack-temp.fir
M flang/test/HLFIR/order_assignments/lhs-conflicts-codegen.fir
M flang/test/HLFIR/order_assignments/runtime-stack-temp.fir
M flang/test/HLFIR/order_assignments/saving-mask-and-rhs.fir
M flang/test/HLFIR/order_assignments/user-defined-assignment-finalization.fir
M flang/test/HLFIR/order_assignments/user-defined-assignment.fir
M flang/test/HLFIR/order_assignments/vector-subscripts-codegen.fir
M flang/test/HLFIR/order_assignments/vector-subscripts-scheduling.fir
M flang/test/HLFIR/order_assignments/where-after-cse.fir
M flang/test/HLFIR/order_assignments/where-codegen-no-conflict.fir
M flang/test/HLFIR/order_assignments/where-equivalent-subscripts.fir
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M flang/test/HLFIR/propagate-contiguous-attribute.fir
M flang/test/HLFIR/reshape-lowering.fir
M flang/test/HLFIR/separate-allocatable-assign.fir
M flang/test/HLFIR/set_length-codegen.fir
M flang/test/HLFIR/shapeof-lowering.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-all.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-any.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-cmpchar-scalar.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-count.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-dotproduct.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-index.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-matmul.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-maxloc.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-maxmin.fir
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M flang/test/HLFIR/simplify-hlfir-intrinsics-minloc.fir
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A flang/test/Integration/OpenMP/semantic-override-clause-compound.f90
A flang/test/Integration/OpenMP/semantic-override-clause-werror.f90
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M flang/test/Lower/Intrinsics/c_f_procpointer.f90
M flang/test/Lower/Intrinsics/c_f_strpointer.f90
M flang/test/Lower/Intrinsics/c_funloc-proc-pointers.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
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M flang/test/Lower/Intrinsics/mvbits-unsigned.f90
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M flang/test/Lower/Intrinsics/putenv-sub.f90
M flang/test/Lower/Intrinsics/rand.f90
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M flang/test/Lower/Intrinsics/reduce.f90
M flang/test/Lower/Intrinsics/rename.f90
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M flang/test/Lower/Intrinsics/ubound01.f90
M flang/test/Lower/Intrinsics/unlink-func.f90
M flang/test/Lower/Intrinsics/unlink-sub.f90
M flang/test/Lower/Intrinsics/verify.f90
M flang/test/Lower/MIF/coarray_alloc_many_declare.f90
M flang/test/Lower/MIF/coarray_allocation.f90
M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/MIF/sync_all.f90
M flang/test/Lower/MIF/sync_images.f90
M flang/test/Lower/MIF/sync_memory.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenACC/acc-atomic-update-hlfir.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-common.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned.f90
M flang/test/Lower/OpenACC/acc-declare-interface-body.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
M flang/test/Lower/OpenACC/acc-no-create-array-section.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
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M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
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M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
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M flang/test/Lower/OpenMP/compiler-directives-loop.f90
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M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
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M flang/test/Lower/OpenMP/delayed-privatization-cuda-device-array.cuf
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M flang/test/Lower/OpenMP/depend-complex.f90
M flang/test/Lower/OpenMP/depend-iterator.f90
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M flang/test/Lower/OpenMP/dynamic-len-char-bounds-gen.f90
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M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/indirect-reference-privatization.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-sections-firstprivate.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
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M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/local-intrinsic-sized-array-map.f90
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M flang/test/Lower/OpenMP/loop-pointer-variable.f90
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M flang/test/Lower/OpenMP/metadirective-loop.f90
M flang/test/Lower/OpenMP/mismatched-bound-types.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
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M flang/test/Lower/OpenMP/omp-declare-target-program-var.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
A flang/test/Lower/OpenMP/optional-argument-map-4.f90
M flang/test/Lower/OpenMP/optional-argument-map.f90
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M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
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M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
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M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
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M flang/test/Lower/OpenMP/parallel-reduction-complex-mul.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-character.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/OpenMP/privatization-proc-ptr.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/reduction-array-element.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/reduction-equivalence.f90
M flang/test/Lower/OpenMP/requires-atomic-default-mem-order.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/scope.f90
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M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/simd-linear.f90
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M flang/test/Lower/OpenMP/taskloop.f90
M flang/test/Lower/OpenMP/threadprivate-char-array-chararray.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-hlfir.f90
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M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
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M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-3.f90
M flang/test/Lower/OpenMP/threadprivate-host-association.f90
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M flang/test/Lower/OpenMP/threadprivate-pointer-allocatable.f90
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M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-use-association.f90
M flang/test/Lower/OpenMP/tile01.f90
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M flang/test/Lower/OpenMP/usm-descriptor-close-map.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
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M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
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M flang/test/Lower/box-address.f90
M flang/test/Lower/bug172157-3.f90
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M flang/test/Lower/call-by-value-attr.f90
M flang/test/Lower/call-character-array-to-polymorphic-pointer.f90
M flang/test/Lower/call.f90
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M flang/test/Lower/character-local-variables.f90
M flang/test/Lower/character-substrings.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/common-block-char0.f90
M flang/test/Lower/complex-operations.f90
M flang/test/Lower/complex-real.f90
M flang/test/Lower/components.f90
M flang/test/Lower/cray-pointer.f90
M flang/test/Lower/declare-with-storage.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-assignments.f90
M flang/test/Lower/dispatch.f90
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M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_concurrent_reduce_allocatable.f90
M flang/test/Lower/do_concurrent_reduce_associate.f90
M flang/test/Lower/dummy-argument-assumed-shape-optional.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-argument-optional-2.f90
M flang/test/Lower/dummy-argument-optional.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/equivalence-3.f
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/extrn_subp.f90
M flang/test/Lower/finit-local-exclusions.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-array.f90
M flang/test/Lower/forall/forall-construct-2.f90
M flang/test/Lower/forall/forall-construct-3.f90
M flang/test/Lower/forall/scalar-substring.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
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M flang/test/Lower/host_module_variable_instantiation_use_device.f90
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M flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
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M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/parent-component.f90
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M flang/test/Lower/percent-val-actual-argument.f90
M flang/test/Lower/percent-val-value-argument.f90
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M flang/test/Lower/pointer-association-polymorphic.f90
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M flang/test/Lower/pointer-results-as-arguments.f90
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M flang/test/Lower/submodule.f90
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M flang/test/Lower/volatile-allocatable1.f90
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M flang/test/Lower/volatile-derived-type.f90
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M flang/test/Lower/volatile-openmp2.f03
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M flang/test/Lower/volatile4.f90
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M flang/test/Semantics/OpenMP/allocate_do1.f90
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M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/clause-validity02.f90
M flang/test/Semantics/OpenMP/declarative-directive01.f90
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M flang/test/Semantics/OpenMP/declare-target06.f90
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M flang/test/Semantics/OpenMP/requires04.f90
M flang/test/Semantics/OpenMP/requires05.f90
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M flang/test/Semantics/OpenMP/requires07.f90
M flang/test/Semantics/OpenMP/requires08.f90
A flang/test/Semantics/OpenMP/requires11.f90
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M flang/test/Transforms/DoConcurrent/implicit_mapper.f90
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M flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/nested_derived_type_device.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
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M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
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M flang/test/Transforms/DoConcurrent/reduce_device_min.f90
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M flang/test/Transforms/FIRToMemRef/logical.mlir
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M flang/test/Transforms/FIRToMemRef/replace.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
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M flang/test/Transforms/FIRToMemRef/store-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/store-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/tbaa-tag.mlir
M flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/FIRToMemRef/view-op-wraps-array-coor.mlir
M flang/test/Transforms/FIRToMemRef/volatile-codegen.mlir
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M flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
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M flang/test/Transforms/omp-map-info-finalization-member-record.fir
M flang/test/Transforms/omp-map-info-finalization-name-loc.fir
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M flang/test/Transforms/omp-reduction-cfg-conversion.fir
M flang/test/Transforms/optimize-array-repacking.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
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M flang/test/Transforms/tbaa-cray-pointer.fir
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M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
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M flang/test/Transforms/tbaa-target-inlined-results.fir
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M flang/test/Transforms/tbaa4.fir
M flang/unittests/Optimizer/HLFIRExtensionPointsTest.cpp
M libc/CMakeLists.txt
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M libc/test/src/math/smoke/AddTest.h
M libc/test/src/math/smoke/DivTest.h
M libc/test/src/math/smoke/MulTest.h
M libc/test/src/math/smoke/SubTest.h
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
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M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libsycl/include/sycl/__impl/backend.hpp
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/detail/config.hpp
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
M libsycl/include/sycl/__impl/detail/kernel_submission.hpp
M libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/__impl/device_selector.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/include/sycl/__impl/group.hpp
M libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/handler.hpp
M libsycl/include/sycl/__impl/index_space_classes.hpp
M libsycl/include/sycl/__impl/nd_item.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
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M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
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M libsycl/src/detail/device_kernel_info.hpp
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M libsycl/src/detail/event_impl.hpp
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M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/handler_impl.hpp
M libsycl/src/detail/offload/offload_topology.hpp
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M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
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M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
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M libsycl/src/detail/spinlock.hpp
M libsycl/src/detail/suppress_extra_warnings.hpp
M libsycl/src/device.cpp
M libsycl/src/device_selector.cpp
M libsycl/src/event.cpp
M libsycl/src/exception.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/handler.cpp
M libsycl/src/platform.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/.clang-format
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
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A libsycl/test/basic/handler/handler_single_task_named_functor.cpp
R libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/queue_single_task.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
R libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/Inputs/fill_memset_common.hpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/context/context_ctors.cpp
M libsycl/unittests/handler/memcpy.cpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libunwind/src/Registers.hpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/ra_sign_state.pass.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Driver.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/MarkLive.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/SyntheticSections.cpp
A lld/test/ELF/loongarch-relax-call-stress.s
A lld/test/ELF/loongarch-relax-pcrel-stress.s
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/python/python-typemaps.swig
M lldb/cmake/modules/LLDBStandalone.cmake
M lldb/docs/resources/formatterbytecode.md
M lldb/examples/python/formatter_bytecode.py
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedProcessInterface.h
M lldb/include/lldb/Target/BorrowedStackFrame.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/TargetList.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/Host/CMakeLists.txt
R lldb/source/Host/linux/PythonRuntimeLoaderLinux.cpp
A lldb/source/Host/posix/PythonRuntimeLoaderPosix.cpp
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwinDevice.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleBridge.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleBridge.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleTV.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleTV.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleWatch.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteAppleXR.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteMacOSX.h
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteiOS.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformRemoteiOS.h
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/CMakeLists.txt
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/BorrowedStackFrame.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestObjCRuntimeNoInferiorCall.py
A lldb/test/API/functionalities/gdb_remote_client/libobjc.A.dylib.yaml
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/functionalities/scripted_process/addressable_bits_scripted_process.py
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
A lldb/test/API/functionalities/thread/step_out_inline/Makefile
A lldb/test/API/functionalities/thread/step_out_inline/TestThreadStepOutInline.py
A lldb/test/API/functionalities/thread/step_out_inline/main.c
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
M lldb/test/API/python_api/process/read-mem-cstring/main.c
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
A lldb/test/Shell/ObjectFile/ELF/gnu-debuglink-without-file-name.yaml
A lldb/test/Shell/ObjectFile/PECOFF/gnu-debuglink-without-file-name.yaml
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M lldb/unittests/Protocol/MCPPluginTest.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/ExecutableModuleTest.cpp
M llvm/bindings/ocaml/executionengine/executionengine_ocaml.c
M llvm/bindings/ocaml/executionengine/llvm_executionengine.ml
M llvm/bindings/ocaml/executionengine/llvm_executionengine.mli
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/bindings/ocaml/target/llvm_target.ml
M llvm/bindings/ocaml/target/llvm_target.mli
M llvm/bindings/ocaml/target/target_ocaml.c
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandLine.md
M llvm/docs/GlobalISel/GMIR.md
M llvm/docs/GlobalISel/IRTranslator.md
M llvm/docs/GlobalISel/index.md
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/ilist_iterator.h
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/include/llvm/Analysis/CycleAnalysis.h
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
M llvm/include/llvm/CAS/BuiltinObjectHasher.h
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
A llvm/include/llvm/ExecutionEngine/Orc/BindCallControllerHandlerSPS.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/MDBuilder.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/MCA/Support.h
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Module.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Support/CRC.h
M llvm/include/llvm/Support/ErrorOr.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.h
M llvm/lib/CAS/BuiltinObjectHasher.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/lib/CGData/CMakeLists.txt
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/ExpandIRInsts.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineSink.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocBasic.h
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/ShadowStackGCLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Core.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/InProcessEPC.cpp
M llvm/lib/ExecutionEngine/Orc/LazyReexports.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ReOptimizeLayer.cpp
M llvm/lib/ExecutionEngine/Orc/SelfExecutorProcessControl.cpp
M llvm/lib/ExecutionEngine/Orc/SimpleRemoteEPC.cpp
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/MDBuilder.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/LTO/ThinLTOCodeGenerator.cpp
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
A llvm/lib/MC/MCCLOptions.cpp
A llvm/lib/MC/MCCLOptions.h
A llvm/lib/MC/MCCLOptions.td
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
M llvm/lib/ObjCopy/MachO/MachOObjcopy.cpp
M llvm/lib/ObjCopy/MachO/MachOObject.h
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPURemoveIncompatibleFunctions.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/MVELaneInterleavingPass.cpp
M llvm/lib/Target/ARM/MVETailPredication.cpp
M llvm/lib/Target/CSKY/CSKYAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonAsmPrinter.cpp
M llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp
M llvm/lib/Target/Hexagon/HexagonVectorLoopCarriedReuse.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsScheduleGeneric.td
M llvm/lib/Target/Mips/MipsScheduleI6400.td
M llvm/lib/Target/Mips/MipsScheduleP5600.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXLowerArgs.cpp
M llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
M llvm/lib/Target/RISCV/RISCVMergeBaseOffset.cpp
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/SPIRV/SPIRVEmitIntrinsics.cpp
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/lib/Target/Target.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/X86/X86AsmPrinter.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86LowerAMXIntrinsics.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/X86/X86WinEHUnwindV2.cpp
M llvm/lib/Target/X86/X86WinEHUnwindV3.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/Coroutines/CoroFrame.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/HipStdPar/HipStdPar.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/InstCombine/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/ExpandMemCmp.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LoopBoundSplit.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopPredication.cpp
M llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
M llvm/lib/Transforms/Scalar/PartiallyInlineLibCalls.cpp
M llvm/lib/Transforms/Scalar/RewriteStatepointsForGC.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Scalar/Scalarizer.cpp
M llvm/lib/Transforms/Utils/AMDGPUEmitPrintf.cpp
M llvm/lib/Transforms/Utils/CallPromotionUtils.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/FlattenCFG.cpp
M llvm/lib/Transforms/Utils/IntegerDivision.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
M llvm/lib/Transforms/Utils/LowerMemIntrinsics.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyIndVar.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_expand_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp-select.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
A llvm/test/Analysis/CostModel/AMDGPU/select.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Analysis/LoopAccessAnalysis/num-iters-for-store-load-conflict.ll
A llvm/test/Analysis/LoopCacheAnalysis/nestedloop-cost.ll
M llvm/test/Analysis/MemorySSA/noalias-scope-decl.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
A llvm/test/Analysis/ScopedNoAliasAA/disjoint-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/fence-modref.ll
M llvm/test/Assembler/incomplete-ir-metadata.ll
M llvm/test/Bindings/OCaml/debuginfo.ml
A llvm/test/Bitcode/upgrade-alias-scope-domains.ll
M llvm/test/CMakeLists.txt
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/blockaddress-stale-addresstaken.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
M llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll
M llvm/test/CodeGen/AArch64/GlobalISel/fconstant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extends.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fixed-point-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-indirect-br-repeated-block.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-invoke-probabilities.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memcpy-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memfunc-undef.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memset-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-nneg-disjoint.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-split-vector-arg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-objects.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-tbaa.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-trunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vararg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vscale.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-weird-alloca-size.ll
M llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/threadlocal-address.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AArch64/and-mask-variable.ll
A llvm/test/CodeGen/AArch64/arm64_32-mops.ll
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async-non-entry-block.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/fcvt-i256.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/func-argpassing.ll
M llvm/test/CodeGen/AArch64/funnel-shift.ll
M llvm/test/CodeGen/AArch64/interleaved-accesses.ll
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
A llvm/test/CodeGen/AArch64/machine-combiner-fma-chain.ll
M llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AArch64/memsize-remarks.ll
M llvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
A llvm/test/CodeGen/AArch64/mops-dead-nzcv.ll
A llvm/test/CodeGen/AArch64/scalar_to_vector.ll
A llvm/test/CodeGen/AArch64/sext-asr.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
M llvm/test/CodeGen/AArch64/shift.ll
A llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
M llvm/test/CodeGen/AArch64/speculative-load-intrinsic-mmo.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
A llvm/test/CodeGen/AMDGPU/coalescer-subreg-undef-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/fold-and-exec-wave32.mir
A llvm/test/CodeGen/AMDGPU/fold-and-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
A llvm/test/CodeGen/AMDGPU/itofp-odd-width-load.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/large-phi-search.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-arguments-noalias-call-no-ptr-args.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-alias-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-noalias-kernargs.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AMDGPU/memcpy_const_compare.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-undef-phi-source.mir
A llvm/test/CodeGen/AMDGPU/phi-elimination-subrange-liveintervals.mir
M llvm/test/CodeGen/AMDGPU/preemit-peephole-scc-liveness-issue215745.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
M llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/slp-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-inside-divergent-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-call-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll
A llvm/test/CodeGen/ARM/fast-isel-ext-dead-cpsr.ll
M llvm/test/CodeGen/ARM/inline-asm-clobber.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
M llvm/test/CodeGen/BPF/GlobalISel/ir-translator-ret.ll
M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-expand-unaligned-loads-noindexed.ll
A llvm/test/CodeGen/Hexagon/phi-elim-subreg-lanes.mir
M llvm/test/CodeGen/Hexagon/swp-conv3x3-nested.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-pic.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
M llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
M llvm/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir
M llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/memory-operands.mir
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/add.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/big-endian.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/bitwise.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/pointers.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/split_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fabs_vec.ll
M llvm/test/CodeGen/Mips/msa/arithmetic_float.ll
M llvm/test/CodeGen/Mips/msa/buildvector-undef-loop.ll
M llvm/test/CodeGen/Mips/msa/compare_float.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/CodeGen/NVPTX/f128-no-libcall-error.ll
A llvm/test/CodeGen/NVPTX/fenv-no-libcall-error.ll
A llvm/test/CodeGen/NVPTX/fp128-compare-no-libcall-error.ll
A llvm/test/CodeGen/NVPTX/lower-byval-args-icmp.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-fp128.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-mixed-types.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-scalar.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-vectors.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator-stackprotect.ll
M llvm/test/CodeGen/PowerPC/non-simple-args-intrin.ll
A llvm/test/CodeGen/PowerPC/ppcf128-constant-bitcast.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-calllowering.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/insertelement.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/shufflevector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/splat_vector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ld.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-store.ll
M llvm/test/CodeGen/RISCV/fold-mem-offset.ll
A llvm/test/CodeGen/RISCV/machine-combiner-fma-chain.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memmove.ll
A llvm/test/CodeGen/RISCV/memset.ll
A llvm/test/CodeGen/RISCV/pr228084.ll
A llvm/test/CodeGen/RISCV/redundant-copy-elim-reg-imm.mir
M llvm/test/CodeGen/RISCV/redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
M llvm/test/CodeGen/RISCV/xandesperf-redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-copy-memory.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-domain-order.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-scope-shared-across-functions.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/select_mat.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/noalias-scope-decl.ll
M llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/pointers/global-vars-untyped.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
M llvm/test/CodeGen/SystemZ/Large/branch-01.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
A llvm/test/CodeGen/Thumb/optional-def-dead-cpsr.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
A llvm/test/CodeGen/WebAssembly/tailcall-byval-musttail.ll
M llvm/test/CodeGen/WebAssembly/tailcall.ll
M llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
M llvm/test/CodeGen/X86/AMX/amx-across-func.ll
M llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
M llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
M llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
M llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-inalloca.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
M llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
M llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
M llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
M llvm/test/CodeGen/X86/andnot-sink-not.ll
M llvm/test/CodeGen/X86/arg-copy-elide.ll
M llvm/test/CodeGen/X86/atomic-fp.ll
M llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/atomic-xor.ll
M llvm/test/CodeGen/X86/atomic64.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
M llvm/test/CodeGen/X86/avx512-intel-ocl.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/bfloat-calling-conv-no-sse2.ll
M llvm/test/CodeGen/X86/bittest-big-integer.ll
M llvm/test/CodeGen/X86/coalesce-commute-partial-def-implicit-read.mir
M llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
M llvm/test/CodeGen/X86/data-section-prefix.ll
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/extractelement-index.ll
M llvm/test/CodeGen/X86/extractelement-load.ll
A llvm/test/CodeGen/X86/fast-isel-dead-eflags.ll
M llvm/test/CodeGen/X86/fma.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
M llvm/test/CodeGen/X86/i128-fp128-abi.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/inline-sse.ll
M llvm/test/CodeGen/X86/insertelement-var-index.ll
M llvm/test/CodeGen/X86/isel-x87.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/long-double-abi-align.ll
A llvm/test/CodeGen/X86/machine-combiner-fma-chain.ll
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/memcpy-scoped-aa.ll
M llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
M llvm/test/CodeGen/X86/mingw-alloca.ll
M llvm/test/CodeGen/X86/mmx-arith.ll
M llvm/test/CodeGen/X86/mmx-intrinsics.ll
M llvm/test/CodeGen/X86/musttail-varargs.ll
A llvm/test/CodeGen/X86/no-jt-prefix-sdp-disabled.ll
M llvm/test/CodeGen/X86/nontemporal-loads-2.ll
M llvm/test/CodeGen/X86/nosse-vector.ll
M llvm/test/CodeGen/X86/packus.ll
A llvm/test/CodeGen/X86/postra-machine-sink-eh-pad.mir
A llvm/test/CodeGen/X86/ppcf128-expand-no-libcall-error.ll
M llvm/test/CodeGen/X86/pr216504.ll
A llvm/test/CodeGen/X86/pr220959.ll
M llvm/test/CodeGen/X86/pr32284.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34592.ll
M llvm/test/CodeGen/X86/pr34653.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/pr43866.ll
M llvm/test/CodeGen/X86/pr48727.ll
M llvm/test/CodeGen/X86/pr50782.ll
A llvm/test/CodeGen/X86/rematerialize-sub-super-reg-dead-flags.mir
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
M llvm/test/CodeGen/X86/sdiv_fix.ll
M llvm/test/CodeGen/X86/sdiv_fix_sat.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
M llvm/test/CodeGen/X86/sse-intel-ocl.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-regcall.ll
M llvm/test/CodeGen/X86/sse-regcall4.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
A llvm/test/CodeGen/X86/stack-realign-local-padding.ll
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
M llvm/test/CodeGen/X86/statepoint-ra.ll
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/sttni.ll
M llvm/test/CodeGen/X86/taildup-callsiteinfo.mir
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/var-permute-512.ll
M llvm/test/CodeGen/X86/vec-strict-128.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
M llvm/test/CodeGen/X86/vec_ins_extract-1.ll
M llvm/test/CodeGen/X86/vec_insert-8.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-extend-inreg.ll
M llvm/test/CodeGen/X86/vector-extract-last-active.ll
M llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
M llvm/test/CodeGen/X86/vector-llrint.ll
M llvm/test/CodeGen/X86/vector-lrint.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
M llvm/test/CodeGen/X86/vector-trunc.ll
M llvm/test/CodeGen/X86/widen_arith-6.ll
M llvm/test/CodeGen/X86/win64-eh-empty-block-2.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-errors.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-push-pop-stack-alloc.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-epilogs.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv2-too-many-instr.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv3-split-large.ll
M llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-epilog-ops.mir
M llvm/test/CodeGen/X86/win64-eh-unwindv3-too-many-prolog-ops.mir
M llvm/test/CodeGen/X86/x86-64-baseptr.ll
A llvm/test/DebugInfo/AArch64/dbg-value-globaladdr-gisel.ll
A llvm/test/DebugInfo/ARM/dbg-value-globaladdr-rwpi.ll
M llvm/test/DebugInfo/COFF/fortran-contained-proc.ll
M llvm/test/DebugInfo/COFF/fpo-realign-alloca.ll
A llvm/test/DebugInfo/COFF/globaladdr-codeview.ll
M llvm/test/DebugInfo/COFF/vframe-csr.ll
M llvm/test/DebugInfo/Generic/sroa-samesize.ll
A llvm/test/DebugInfo/MIR/X86/globaladdr-mixed-locations.mir
A llvm/test/DebugInfo/MIR/X86/globaladdr-offset.mir
M llvm/test/DebugInfo/MIR/X86/instr-ref-join-def-vphi.mir
A llvm/test/DebugInfo/WebAssembly/dbg-value-globaladdr-pic.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr-rejected.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
A llvm/test/DebugInfo/X86/globaladdr-offset.ll
A llvm/test/DebugInfo/X86/globaladdr-tag-offset.ll
A llvm/test/DebugInfo/X86/got-equivalent.ll
A llvm/test/DebugInfo/X86/implicit-pointer-global.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
A llvm/test/DebugInfo/X86/variadic-global.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/fp8-neon-fdot.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
M llvm/test/Instrumentation/SanitizerCoverage/interposable-symbol.ll
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
A llvm/test/MC/Disassembler/RISCV/xmipslsp.txt
M llvm/test/MC/RISCV/xmips-invalid.s
M llvm/test/Other/print-changed-machine.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-i64-sm20.ll
A llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-sub.ll
A llvm/test/Transforms/Attributor/callees-metadata-escape.ll
M llvm/test/Transforms/Attributor/nofpclass-sqrt.ll
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
M llvm/test/Transforms/ConstraintElimination/large-constant-ints.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
M llvm/test/Transforms/DeadStoreElimination/scoped-noalias.ll
M llvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll
A llvm/test/Transforms/GVN/icmp-samesign.ll
M llvm/test/Transforms/GVN/noalias.ll
M llvm/test/Transforms/GVN/rle-coerced-noalias.ll
A llvm/test/Transforms/HipStdPar/unsupported-exceptions.ll
M llvm/test/Transforms/IndVarSimplify/addrec_no_exec_on_every_iteration.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
M llvm/test/Transforms/Inline/AMDGPU/load-intrinsics.ll
M llvm/test/Transforms/Inline/noalias-calls-always.ll
M llvm/test/Transforms/Inline/noalias-calls.ll
M llvm/test/Transforms/Inline/noalias-calls2.ll
M llvm/test/Transforms/Inline/noalias-cs.ll
M llvm/test/Transforms/Inline/noalias-escape-source.ll
M llvm/test/Transforms/Inline/noalias.ll
M llvm/test/Transforms/Inline/noalias2.ll
M llvm/test/Transforms/Inline/noalias3.ll
M llvm/test/Transforms/Inline/pr48209.ll
M llvm/test/Transforms/Inline/pr50270.ll
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulhu.ll
M llvm/test/Transforms/InstCombine/bitcast-store.ll
M llvm/test/Transforms/InstCombine/fold-phi-load-metadata.ll
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/test/Transforms/InstCombine/known-bits-bitcast-from-fp.ll
M llvm/test/Transforms/InstCombine/load-combine-metadata.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/memcpy-to-load.ll
A llvm/test/Transforms/InstCombine/noalias-scope-decl-disjoint-domain.ll
M llvm/test/Transforms/InstCombine/noalias-scope-decl.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/test/Transforms/JumpThreading/free_instructions.ll
M llvm/test/Transforms/JumpThreading/noalias-scope-decl.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/LICM/AMDGPU/buffer-rsrc-ptrs.ll
M llvm/test/Transforms/LICM/dropped-tbaa.ll
M llvm/test/Transforms/LICM/hoist-metadata.ll
M llvm/test/Transforms/LICM/licm-ci.ll
M llvm/test/Transforms/LICM/pr42969.ll
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
M llvm/test/Transforms/LICM/scalar-promote.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/aa-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoopDeletion/noalias.ll
M llvm/test/Transforms/LoopDistribute/bounds-expansion-bug.ll
M llvm/test/Transforms/LoopDistribute/cross-partition-access.ll
M llvm/test/Transforms/LoopDistribute/followup.ll
M llvm/test/Transforms/LoopDistribute/no-reprocess.ll
M llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
M llvm/test/Transforms/LoopDistribute/outside-use.ll
M llvm/test/Transforms/LoopRotate/noalias.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-cmp-select.ll
M llvm/test/Transforms/LoopUnroll/noalias.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
A llvm/test/Transforms/LoopVectorize/AArch64/memory-widening-debug.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wide-alm-const.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-attrs-masked.ll
A llvm/test/Transforms/LoopVectorize/PowerPC/cost-redadd.ll
A llvm/test/Transforms/LoopVectorize/PowerPC/redadd.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-active-lane-mask-all-false.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-scalable-active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/cse-loads.ll
A llvm/test/Transforms/LoopVectorize/VPlan/foldable-active-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights-merged-mem-ops.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-threshold-with-force-metadata.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/select-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
M llvm/test/Transforms/LoopVersioning/add-phi-update-users.ll
M llvm/test/Transforms/LoopVersioning/crash-36998.ll
M llvm/test/Transforms/LoopVersioning/noalias-version-twice.ll
M llvm/test/Transforms/LoopVersioning/noalias.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
M llvm/test/Transforms/LowerInvoke/lowerinvoke.ll
M llvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll
M llvm/test/Transforms/MemCpyOpt/callslot_aa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_noalias.ll
M llvm/test/Transforms/MemCpyOpt/load-store-to-memcpy.ll
M llvm/test/Transforms/MemCpyOpt/memcpy.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-nonnull.ll
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
M llvm/test/Transforms/NewGVN/noalias.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
A llvm/test/Transforms/PhaseOrdering/nvptx-assume-special-register.ll
M llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-scheduled-order.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-runtime-stride-with-base-lane.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gep-mixed-index-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
A llvm/test/Transforms/SLPVectorizer/X86/absorbing-copyable-lane.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-zext-poison-lane.ll
A llvm/test/Transforms/SLPVectorizer/X86/duplicated-lane-consecutive-loads.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
A llvm/test/Transforms/SLPVectorizer/X86/masked-gather-stale-capture.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduction-gathered-root-erased-scalars.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
A llvm/test/Transforms/SLPVectorizer/X86/wide-load-absorbed-lane.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/metadata.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block-regpressure.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block.ll
M llvm/test/Transforms/Util/combine-alias-scope-metadata.ll
M llvm/test/Transforms/VectorCombine/alias.ll
M llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
M llvm/test/Verifier/alias-scope-metadata.ll
M llvm/test/Verifier/noalias_scope_decl.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll.expected
M llvm/test/tools/llubi/noalias_scope.ll
M llvm/test/tools/llvm-cas/lit.local.cfg
M llvm/test/tools/llvm-cas/plugin-validation-crash.test
M llvm/test/tools/llvm-cas/plugin-validation.test
A llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-partial-unit-ref-addr.test
M llvm/test/tools/llvm-mca/mc-schedule-options-help.test
Log Message:
-----------
Merge commit '971833ee5513f01a57439b15040887932af114fc' into HEAD
Commit: cefa9f8c99246547bccc90104ec386815fb4345f
https://github.com/llvm/llvm-project/commit/cefa9f8c99246547bccc90104ec386815fb4345f
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-03 (Sat, 03 Oct 2026)
Changed paths:
M flang-rt/lib/runtime/transformational.cpp
M flang-rt/unittests/Runtime/Transformational.cpp
M flang/lib/Decimal/big-radix-floating-point.h
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Semantics/openmp-utils.cpp
Log Message:
-----------
Avoid std::is_arithmetic_v, std::is_integral_v, std::is_unsigned_t
Compare: https://github.com/llvm/llvm-project/compare/54b21ecbce49...cefa9f8c9924
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