[all-commits] [llvm/llvm-project] 721b8c: [RISCV] Model interleave2 and deinterleave2 costs ...
Steven Wu via All-commits
all-commits at lists.llvm.org
Fri Oct 2 16:47:01 PDT 2026
Branch: refs/heads/users/cachemeifyoucan/spr/casplugin-move-casplugintest-next-to-the-cas-unit-tests
Home: https://github.com/llvm/llvm-project
Commit: 721b8cdac4f6186f772257aa739cc3fe2470c2de
https://github.com/llvm/llvm-project/commit/721b8cdac4f6186f772257aa739cc3fe2470c2de
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
Log Message:
-----------
[RISCV] Model interleave2 and deinterleave2 costs with Zvzip (#225752)
This PR extends the RISC-V TTI cost model to recognize
`llvm.vector.interleave2` and `llvm.vector.deinterleave2` when the Zvzip
extension is available.
The cost is computed based on the operand that holds the interleaved
data: the destination operand of `vzip.vv`, and the source operand of
`unzipe.v` or `unzipo.v`.
This is the first PR split out from #224991.
Assisted-By: Trae CLI (GPT-5)
Commit: 1f84168f595dab2e23aab4181997da0a7f486dc7
https://github.com/llvm/llvm-project/commit/1f84168f595dab2e23aab4181997da0a7f486dc7
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg-blockaddress.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg1.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg3-phis.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg4-multiple-duplicate-cfg-updates.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg5-del-phis-for-dead-block.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg6-dead-self-loop.ll
M llvm/test/lit.cfg.py
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/optdriver.cpp
M polly/docs/ReleaseNotes.rst
M polly/test/CodeGen/20100622.ll
M polly/test/CodeGen/20100708.ll
M polly/test/CodeGen/20100720-MultipleConditions.ll
M polly/test/CodeGen/LoopParallelMD/do_not_mutate_debug_info.ll
M polly/test/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll
M polly/test/CodeGen/LoopParallelMD/single_loop_param_parallel.ll
M polly/test/CodeGen/MemAccess/codegen_address_space.ll
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
M polly/test/CodeGen/MemAccess/codegen_simple.ll
M polly/test/CodeGen/MemAccess/codegen_simple_float.ll
M polly/test/CodeGen/MemAccess/codegen_simple_md.ll
M polly/test/CodeGen/MemAccess/codegen_simple_md_float.ll
M polly/test/CodeGen/MemAccess/create_arrays.ll
M polly/test/CodeGen/MemAccess/create_arrays_heap.ll
M polly/test/CodeGen/MemAccess/default_aligned_new_access_function.ll
M polly/test/CodeGen/MemAccess/generate-all.ll
M polly/test/CodeGen/MemAccess/invariant_base_ptr.ll
M polly/test/CodeGen/MemAccess/map_scalar_access.ll
M polly/test/CodeGen/MemAccess/multiple_types.ll
M polly/test/CodeGen/MemAccess/simple.ll
M polly/test/CodeGen/MemAccess/simple_analyze.ll
M polly/test/CodeGen/MemAccess/update_access_functions.ll
M polly/test/CodeGen/Metadata/basic_vec_annotate.ll
M polly/test/CodeGen/Metadata/fallback_vec_annotate.ll
M polly/test/CodeGen/Metadata/skip_vec_annotate_fp_dist1.ll
M polly/test/CodeGen/OpenMP/alias-metadata.ll
M polly/test/CodeGen/OpenMP/floord-as-argument-to-subfunction.ll
M polly/test/CodeGen/OpenMP/inlineasm.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded_different_bb.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointers_preloaded.ll
M polly/test/CodeGen/OpenMP/issue179135.ll
M polly/test/CodeGen/OpenMP/issue185313.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-iv.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values-2.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values-3.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values.ll
M polly/test/CodeGen/OpenMP/loop-bounds-reference-outer-ids.ll
M polly/test/CodeGen/OpenMP/mapped-phi-access.ll
M polly/test/CodeGen/OpenMP/matmul-parallel.ll
M polly/test/CodeGen/OpenMP/new_multidim_access.ll
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M polly/test/CodeGen/OpenMP/reference-argument-from-non-affine-region.ll
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M polly/test/CodeGen/OpenMP/single_loop_with_param.ll
M polly/test/CodeGen/OpenMP/two-parallel-loops-reference-outer-indvar.ll
M polly/test/CodeGen/RuntimeDebugBuilder/combine_different_values.ll
M polly/test/CodeGen/RuntimeDebugBuilder/stmt_tracing.ll
M polly/test/CodeGen/alias_metadata_too_many_arrays.ll
M polly/test/CodeGen/conflict-between-loop-invariant-code-hosting-and-escape-map-computation.ll
M polly/test/CodeGen/constant_condition.ll
M polly/test/CodeGen/debug-intrinsics.ll
M polly/test/CodeGen/exprModDiv.ll
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M polly/test/CodeGen/hoisting_1.ll
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M polly/test/CodeGen/inner_scev_sdiv_in_lb.ll
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M polly/test/CodeGen/invariant-load-dimension.ll
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M polly/test/CodeGen/invariant_cannot_handle_void.ll
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M polly/test/CodeGen/invariant_load_base_pointer_conditional_2.ll
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M polly/test/CodeGen/invariant_load_condition.ll
M polly/test/CodeGen/invariant_load_different_sized_types.ll
M polly/test/CodeGen/invariant_load_escaping.ll
M polly/test/CodeGen/invariant_load_escaping_second_scop.ll
M polly/test/CodeGen/invariant_load_in_non_affine_subregion.ll
M polly/test/CodeGen/invariant_load_loop_ub.ll
M polly/test/CodeGen/invariant_load_not_executed_but_in_parameters.ll
M polly/test/CodeGen/invariant_load_outermost.ll
M polly/test/CodeGen/invariant_load_parameters_cyclic_dependence.ll
M polly/test/CodeGen/invariant_load_ptr_ptr_noalias.ll
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M polly/test/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll
M polly/test/CodeGen/invariant_loads_from_struct_with_different_types_1.ll
M polly/test/CodeGen/invariant_loads_from_struct_with_different_types_2.ll
M polly/test/CodeGen/invariant_loads_ignore_parameter_bounds.ll
M polly/test/CodeGen/invariant_verify_function_failed.ll
M polly/test/CodeGen/invariant_verify_function_failed_2.ll
M polly/test/CodeGen/issue190459_1.ll
M polly/test/CodeGen/issue190459_2.ll
M polly/test/CodeGen/issue192208.ll
M polly/test/CodeGen/issue56692.ll
M polly/test/CodeGen/load_subset_with_context.ll
M polly/test/CodeGen/loop_with_condition.ll
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M polly/test/CodeGen/multiple-scops-in-a-row-disappearing.ll
M polly/test/CodeGen/multiple-types-invariant-load-2.ll
M polly/test/CodeGen/multiple-types-invariant-load.ll
M polly/test/CodeGen/multiple_sai_fro_same_base_address.ll
M polly/test/CodeGen/no-overflow-tracking.ll
M polly/test/CodeGen/non-affine-region-phi-references-in-scop-value.ll
M polly/test/CodeGen/non-affine-synthesized-in-branch.ll
M polly/test/CodeGen/non_affine_float_compare.ll
M polly/test/CodeGen/openmp_limit_threads.ll
M polly/test/CodeGen/param_div_div_div_2.ll
M polly/test/CodeGen/partial_write_array.ll
M polly/test/CodeGen/partial_write_emptyset.ll
M polly/test/CodeGen/partial_write_impossible_restriction.ll
M polly/test/CodeGen/partial_write_in_region.ll
M polly/test/CodeGen/partial_write_in_region_with_loop.ll
M polly/test/CodeGen/partial_write_mapped_scalar.ll
M polly/test/CodeGen/partial_write_mapped_scalar_subregion.ll
M polly/test/CodeGen/perf_monitoring.ll
M polly/test/CodeGen/perf_monitoring_cycles_per_scop.ll
M polly/test/CodeGen/perf_monitoring_trip_counts_per_scop.ll
M polly/test/CodeGen/phi_conditional_simple_1.ll
M polly/test/CodeGen/phi_loop_carried_float_escape.ll
M polly/test/CodeGen/pointer-type-expressions-2.ll
M polly/test/CodeGen/pointer-type-expressions.ll
M polly/test/CodeGen/pointer-type-pointer-type-comparison.ll
M polly/test/CodeGen/pointer_rem.ll
M polly/test/CodeGen/read-only-scalars.ll
M polly/test/CodeGen/reduction_2.ll
M polly/test/CodeGen/reduction_simple_binary.ll
M polly/test/CodeGen/reggen_domtree_crash.ll
M polly/test/CodeGen/region_multiexit_partialwrite.ll
M polly/test/CodeGen/run-time-condition-with-scev-parameters.ll
M polly/test/CodeGen/scev.ll
M polly/test/CodeGen/scev_expansion_in_nonaffine.ll
M polly/test/CodeGen/scop_expander_insert_point.ll
M polly/test/CodeGen/sequential_loops.ll
M polly/test/CodeGen/simple_nonaffine_loop.ll
M polly/test/CodeGen/single_do_loop_int_max_iterations.ll
M polly/test/CodeGen/single_do_loop_int_param_iterations.ll
M polly/test/CodeGen/single_do_loop_ll_max_iterations.ll
M polly/test/CodeGen/single_do_loop_one_iteration.ll
M polly/test/CodeGen/single_do_loop_scev_replace.ll
M polly/test/CodeGen/single_loop.ll
M polly/test/CodeGen/single_loop_int_max_iterations.ll
M polly/test/CodeGen/single_loop_ll_max_iterations.ll
M polly/test/CodeGen/single_loop_one_iteration.ll
M polly/test/CodeGen/single_loop_param.ll
M polly/test/CodeGen/single_loop_param_less_equal.ll
M polly/test/CodeGen/single_loop_param_less_than.ll
M polly/test/CodeGen/single_loop_zero_iterations.ll
M polly/test/CodeGen/split_edge_of_exit.ll
M polly/test/CodeGen/stack-overflow-in-load-hoisting.ll
M polly/test/CodeGen/test.ll
M polly/test/CodeGen/two-scops-in-row.ll
M polly/test/CodeGen/unpredictable-loop-unsynthesizable.ll
M polly/test/DeLICM/confused_order.ll
M polly/test/DeLICM/contradicting_assumed_context_and_domain.ll
M polly/test/DeLICM/load-in-cond-inf-loop.ll
M polly/test/DeLICM/map_memset_zero.ll
M polly/test/DeLICM/nomap_alreadymapped.ll
M polly/test/DeLICM/nomap_escaping.ll
M polly/test/DeLICM/nomap_occupied.ll
M polly/test/DeLICM/nomap_readonly.ll
M polly/test/DeLICM/nomap_spuriouswrite.ll
M polly/test/DeLICM/nomap_storagesize.ll
M polly/test/DeLICM/nomap_writewrite.ll
M polly/test/DeLICM/outofquota-greedycollapse.ll
M polly/test/DeLICM/outofquota-reverseDomain.ll
M polly/test/DeLICM/pass_existence.ll
M polly/test/DeLICM/pr41656.ll
M polly/test/DeLICM/pr48783.ll
M polly/test/DeLICM/reduction.ll
M polly/test/DeLICM/reduction_constant_selfconflict.ll
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M polly/test/DeLICM/reduction_looprotate_alwaystaken.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre_cond1.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre_cond2.ll
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M polly/test/DeLICM/reduction_looprotate_hoisted.ll
M polly/test/DeLICM/reduction_looprotate_licm.ll
M polly/test/DeLICM/reduction_looprotate_licm2.ll
M polly/test/DeLICM/reduction_looprotate_licm_double_write.ll
M polly/test/DeLICM/reduction_looprotate_licm_nopreheader.ll
M polly/test/DeLICM/reduction_looprotate_load.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_gvnpre.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_licm1.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_licm2.ll
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M polly/test/DeLICM/reduction_looprotate_readonly.ll
M polly/test/DeLICM/reduction_looprotate_synthesizable.ll
M polly/test/DeLICM/reduction_looprotate_undef.ll
M polly/test/DeLICM/reduction_overapproximate.ll
M polly/test/DeLICM/reduction_preheader.ll
M polly/test/DeLICM/reduction_unrelatedunusual.ll
M polly/test/DeLICM/reject_loadafterstore.ll
M polly/test/DeLICM/reject_outofquota.ll
M polly/test/DeLICM/reject_storeafterstore.ll
M polly/test/DeLICM/reject_storeinsubregion.ll
M polly/test/DeLICM/reject_unusualstore.ll
M polly/test/DeLICM/skip_maywrite.ll
M polly/test/DeLICM/skip_notinloop.ll
M polly/test/DeLICM/skip_scalaraccess.ll
M polly/test/DeadCodeElimination/chained_iterations.ll
M polly/test/DeadCodeElimination/chained_iterations_2.ll
M polly/test/DeadCodeElimination/computeout.ll
M polly/test/DeadCodeElimination/dead_iteration_elimination.ll
M polly/test/DeadCodeElimination/non-affine-affine-mix.ll
M polly/test/DeadCodeElimination/non-affine.ll
M polly/test/DeadCodeElimination/null_schedule.ll
M polly/test/DependenceInfo/computeout.ll
M polly/test/DependenceInfo/different_schedule_dimensions.ll
M polly/test/DependenceInfo/do_pluto_matmult.ll
M polly/test/DependenceInfo/fine_grain_dep_0.ll
M polly/test/DependenceInfo/generate_may_write_dependence_info.ll
M polly/test/DependenceInfo/infeasible_context.ll
M polly/test/DependenceInfo/may_writes_do_not_block_must_writes_for_war.ll
M polly/test/DependenceInfo/nonaffine-condition-buildMemoryAccess.ll
M polly/test/DependenceInfo/reduction_complex_location.ll
M polly/test/DependenceInfo/reduction_dependences_equal_non_reduction_dependences.ll
M polly/test/DependenceInfo/reduction_dependences_not_null.ll
M polly/test/DependenceInfo/reduction_indirect_access.ll
M polly/test/DependenceInfo/reduction_mixed_reduction_and_non_reduction_dependences.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum_2.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum_3.ll
M polly/test/DependenceInfo/reduction_multiple_reductions.ll
M polly/test/DependenceInfo/reduction_multiple_reductions_2.ll
M polly/test/DependenceInfo/reduction_only_reduction_like_access.ll
M polly/test/DependenceInfo/reduction_partially_escaping_intermediate_in_other_stmt.ll
M polly/test/DependenceInfo/reduction_privatization_deps.ll
M polly/test/DependenceInfo/reduction_privatization_deps_2.ll
M polly/test/DependenceInfo/reduction_privatization_deps_3.ll
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M polly/test/DependenceInfo/reduction_privatization_deps_5.ll
M polly/test/DependenceInfo/reduction_sequence.ll
M polly/test/DependenceInfo/reduction_simple_iv.ll
M polly/test/DependenceInfo/reduction_simple_iv_debug_wrapped_dependences.ll
M polly/test/DependenceInfo/reduction_simple_privatization_deps_2.ll
M polly/test/DependenceInfo/reduction_simple_privatization_deps_w_parameter.ll
M polly/test/DependenceInfo/reduction_two_reductions_different_rloops.ll
M polly/test/DependenceInfo/sequential_loops.ll
M polly/test/FlattenSchedule/gemm.ll
M polly/test/ForwardOpTree/atax.ll
M polly/test/ForwardOpTree/changed-kind.ll
M polly/test/ForwardOpTree/forward_from_region.ll
M polly/test/ForwardOpTree/forward_hoisted.ll
M polly/test/ForwardOpTree/forward_instruction.ll
M polly/test/ForwardOpTree/forward_into_region.ll
M polly/test/ForwardOpTree/forward_into_region_redundant_use.ll
M polly/test/ForwardOpTree/forward_load.ll
M polly/test/ForwardOpTree/forward_load_differentarray.ll
M polly/test/ForwardOpTree/forward_load_double_write.ll
M polly/test/ForwardOpTree/forward_load_fromloop.ll
M polly/test/ForwardOpTree/forward_load_indirect.ll
M polly/test/ForwardOpTree/forward_load_memset_after.ll
M polly/test/ForwardOpTree/forward_load_memset_before.ll
M polly/test/ForwardOpTree/forward_load_tripleuse.ll
M polly/test/ForwardOpTree/forward_load_unrelatedunusual.ll
M polly/test/ForwardOpTree/forward_phi_load.ll
M polly/test/ForwardOpTree/forward_readonly.ll
M polly/test/ForwardOpTree/forward_reusue.ll
M polly/test/ForwardOpTree/forward_store.ll
M polly/test/ForwardOpTree/forward_synthesizable_definloop.ll
M polly/test/ForwardOpTree/forward_synthesizable_indvar.ll
M polly/test/ForwardOpTree/forward_synthesizable_useinloop.ll
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M polly/test/ForwardOpTree/jacobi-1d.ll
M polly/test/ForwardOpTree/noforward_from_region.ll
M polly/test/ForwardOpTree/noforward_load_conditional.ll
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M polly/test/ForwardOpTree/noforward_outofquota.ll
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M polly/test/ForwardOpTree/noforward_phi.ll
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M polly/test/ForwardOpTree/noforward_synthesizable_unknownit.ll
M polly/test/ForwardOpTree/out-of-quota1.ll
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M polly/test/IstAstInfo/OpenMP/nested_loop_outer_parallel.ll
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M polly/test/IstAstInfo/OpenMP/single_loop_param_parallel.ll
M polly/test/IstAstInfo/OpenMP/single_loop_param_parallel_computeout.ll
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M polly/test/IstAstInfo/aliasing_parametric_simple_1.ll
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M polly/test/IstAstInfo/domain_bounded_only_with_context.ll
M polly/test/IstAstInfo/non_affine_access.ll
M polly/test/IstAstInfo/reduction_clauses_multidimensional_access.ll
M polly/test/IstAstInfo/reduction_clauses_onedimensional_access.ll
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M polly/test/IstAstInfo/reduction_different_reduction_clauses.ll
M polly/test/IstAstInfo/reduction_in_one_dimension.ll
M polly/test/IstAstInfo/reduction_loop_reversal.ll
M polly/test/IstAstInfo/reduction_modulo_and_loop_reversal_schedule.ll
M polly/test/IstAstInfo/reduction_modulo_and_loop_reversal_schedule_2.ll
M polly/test/IstAstInfo/reduction_modulo_schedule.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions.ll
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M polly/test/IstAstInfo/reduction_multiple_dimensions_4.ll
M polly/test/IstAstInfo/run-time-condition.ll
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M polly/test/IstAstInfo/simple-run-time-condition.ll
M polly/test/IstAstInfo/single_loop_strip_mine.ll
M polly/test/IstAstInfo/single_loop_uint_max_iterations.ll
M polly/test/IstAstInfo/single_loop_ull_max_iterations.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Bad-relation.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-No-accesses-key.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Not-enough-MemAcc.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Not-enough-statements.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Relation-mispelled.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Statements-mispelled.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Undeclared-ScopArrayInfo.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Wrong-number-dimensions.ll
M polly/test/JSONExporter/ImportAccesses/change-array-dims.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-Mispelled-type.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-Negative-size.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-name.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-sizes-key.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-type-key.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Context-mispelled.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Not-parameter-set.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Unvalid-Context.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Wrong-dimension.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-No-schedule-key.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Schedule-not-valid.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Statements-mispelled.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Wrong-number-statements.ll
M polly/test/MaximalStaticExpansion/load_after_store_same_statement.ll
M polly/test/MaximalStaticExpansion/read_from_original.ll
M polly/test/MaximalStaticExpansion/too_many_writes.ll
M polly/test/MaximalStaticExpansion/working_deps_between_inners.ll
M polly/test/MaximalStaticExpansion/working_deps_between_inners_phi.ll
M polly/test/MaximalStaticExpansion/working_expansion.ll
M polly/test/MaximalStaticExpansion/working_expansion_multiple_dependences_per_statement.ll
M polly/test/MaximalStaticExpansion/working_expansion_multiple_instruction_per_statement.ll
M polly/test/MaximalStaticExpansion/working_phi_expansion.ll
M polly/test/MaximalStaticExpansion/working_phi_two_scalars.ll
M polly/test/MaximalStaticExpansion/working_value_expansion.ll
M polly/test/PruneUnprofitable/prune_only_scalardeps.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-double.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-except-first.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-except-third.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner-carried.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner-third.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-simple.ll
M polly/test/ScheduleOptimizer/GreedyFuse/nofuse-simple.ll
M polly/test/ScheduleOptimizer/GreedyFuse/nofuse-with-middle.ll
M polly/test/ScheduleOptimizer/ManualOptimization/disable_nonforced.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_disable.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_double.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_full.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_heuristic.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_partial.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_partial_followup.ll
M polly/test/ScheduleOptimizer/SIMDInParallelFor.ll
M polly/test/ScheduleOptimizer/computeout.ll
M polly/test/ScheduleOptimizer/ensure-correct-tile-sizes.ll
M polly/test/ScheduleOptimizer/focaltech_test_detail_threshold-7bc17e.ll
M polly/test/ScheduleOptimizer/full_partial_tile_separation.ll
M polly/test/ScheduleOptimizer/line-tiling-2.ll
M polly/test/ScheduleOptimizer/line-tiling.ll
M polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout.ll
M polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout_2.ll
M polly/test/ScheduleOptimizer/one-dimensional-band.ll
M polly/test/ScheduleOptimizer/outer_coincidence.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm_2.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_11.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_12.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_13.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_14.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_15.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_16.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_17.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_18.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_19.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_2.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_20.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_21.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_22.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_24.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_25.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_3.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_4.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_5.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_6.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_7.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_8.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_9.ll
M polly/test/ScheduleOptimizer/pattern_matching_based_opts_splitmap.ll
M polly/test/ScheduleOptimizer/prevectorization-without-tiling.ll
M polly/test/ScheduleOptimizer/prevectorization.ll
M polly/test/ScheduleOptimizer/prevectorization_islbound.ll
M polly/test/ScheduleOptimizer/rectangular-tiling.ll
M polly/test/ScheduleOptimizer/schedule_computeout.ll
M polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
M polly/test/ScheduleOptimizer/tile_after_fusion.ll
M polly/test/ScheduleOptimizer/vivid-vbi-gen-vivid_vbi_gen_sliced-before-llvmreduced.ll
M polly/test/ScopDetect/aliasing_parametric_simple_1.ll
M polly/test/ScopDetect/aliasing_parametric_simple_2.ll
M polly/test/ScopDetect/aliasing_simple_1.ll
M polly/test/ScopDetect/aliasing_simple_2.ll
M polly/test/ScopDetect/base_pointer.ll
M polly/test/ScopDetect/base_pointer_load_setNewAccessRelation.ll
M polly/test/ScopDetect/base_pointer_setNewAccessRelation.ll
M polly/test/ScopDetect/callbr.ll
M polly/test/ScopDetect/collective_invariant_loads.ll
M polly/test/ScopDetect/cross_loop_non_single_exit.ll
M polly/test/ScopDetect/cross_loop_non_single_exit_2.ll
M polly/test/ScopDetect/dependency_to_phi_node_outside_of_region.ll
M polly/test/ScopDetect/detect-full-functions.ll
M polly/test/ScopDetect/dom-tree-crash.ll
M polly/test/ScopDetect/dot-scops-npm.ll
M polly/test/ScopDetect/dot-scops.ll
M polly/test/ScopDetect/error-block-always-executed.ll
M polly/test/ScopDetect/error-block-referenced-from-scop.ll
M polly/test/ScopDetect/error-block-unreachable.ll
M polly/test/ScopDetect/expand-region-correctly-2.ll
M polly/test/ScopDetect/expand-region-correctly.ll
M polly/test/ScopDetect/ignore_func_flag_regex.ll
M polly/test/ScopDetect/index_from_unpredictable_loop.ll
M polly/test/ScopDetect/index_from_unpredictable_loop2.ll
M polly/test/ScopDetect/indvars.ll
M polly/test/ScopDetect/intrinsics_1.ll
M polly/test/ScopDetect/intrinsics_2.ll
M polly/test/ScopDetect/intrinsics_3.ll
M polly/test/ScopDetect/invalid-latch-conditions.ll
M polly/test/ScopDetect/invalidate_scalar_evolution.ll
M polly/test/ScopDetect/invariant-load-before-scop.ll
M polly/test/ScopDetect/keep_going_expansion.ll
M polly/test/ScopDetect/mod_ref_read_pointer.ll
M polly/test/ScopDetect/more-than-one-loop.ll
M polly/test/ScopDetect/multidim-with-undef-size.ll
M polly/test/ScopDetect/multidim.ll
M polly/test/ScopDetect/multidim_indirect_access.ll
M polly/test/ScopDetect/multidim_two_accesses_different_delinearization.ll
M polly/test/ScopDetect/nested_loop_single_exit.ll
M polly/test/ScopDetect/non-affine-conditional.ll
M polly/test/ScopDetect/non-affine-float-compare.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopDetect/non-affine-loop.ll
M polly/test/ScopDetect/non-beneficial-loops-small-trip-count.ll
M polly/test/ScopDetect/non-constant-add-rec-start-expr.ll
M polly/test/ScopDetect/non-simple-memory-accesses.ll
M polly/test/ScopDetect/non_affine_loop_condition.ll
M polly/test/ScopDetect/only-one-affine-loop.ll
M polly/test/ScopDetect/only_func_flag.ll
M polly/test/ScopDetect/only_func_flag_regex.ll
M polly/test/ScopDetect/parametric-multiply-in-scev-2.ll
M polly/test/ScopDetect/parametric-multiply-in-scev.ll
M polly/test/ScopDetect/phi_with_multi_exiting_edges.ll
M polly/test/ScopDetect/profitability-large-basic-blocks.ll
M polly/test/ScopDetect/profitability-two-nested-loops.ll
M polly/test/ScopDetect/remove_all_children.ll
M polly/test/ScopDetect/report-scop-location.ll
M polly/test/ScopDetect/restrict-undef-size-scopdetect.ll
M polly/test/ScopDetect/run_time_alias_check.ll
M polly/test/ScopDetect/scev_remove_max.ll
M polly/test/ScopDetect/sequential_loops.ll
M polly/test/ScopDetect/simple_loop.ll
M polly/test/ScopDetect/simple_loop_non_single_entry.ll
M polly/test/ScopDetect/simple_loop_non_single_exit.ll
M polly/test/ScopDetect/simple_loop_non_single_exit_2.ll
M polly/test/ScopDetect/simple_loop_two_phi_nodes.ll
M polly/test/ScopDetect/simple_loop_with_param.ll
M polly/test/ScopDetect/simple_loop_with_param_2.ll
M polly/test/ScopDetect/simple_non_single_entry.ll
M polly/test/ScopDetect/skip_function_attribute.ll
M polly/test/ScopDetect/srem_with_parametric_divisor.ll
M polly/test/ScopDetect/statistics.ll
M polly/test/ScopDetect/switch-in-loop-patch.ll
M polly/test/ScopDetect/tlr_is_hoistable_load.ll
M polly/test/ScopDetectionDiagnostics/ReportAlias-01.ll
M polly/test/ScopDetectionDiagnostics/ReportEntry.ll
M polly/test/ScopDetectionDiagnostics/ReportFuncCall-01.ll
M polly/test/ScopDetectionDiagnostics/ReportIrreducibleRegion.ll
M polly/test/ScopDetectionDiagnostics/ReportIrreducibleRegionWithoutDebugLoc.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopBound-01.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopHasNoExit.ll
M polly/test/ScopDetectionDiagnostics/ReportMultipleNonAffineAccesses.ll
M polly/test/ScopDetectionDiagnostics/ReportNonAffineAccess-01.ll
M polly/test/ScopDetectionDiagnostics/ReportUnprofitable.ll
M polly/test/ScopDetectionDiagnostics/ReportUnreachableInExit.ll
M polly/test/ScopDetectionDiagnostics/ReportVariantBasePtr-01.ll
M polly/test/ScopDetectionDiagnostics/loop_has_multiple_exits.ll
M polly/test/ScopDetectionDiagnostics/loop_partially_in_scop-2.ll
M polly/test/ScopDetectionDiagnostics/loop_partially_in_scop.ll
M polly/test/ScopInfo/20110312-Fail-without-basicaa.ll
M polly/test/ScopInfo/20111108-Parameter-not-detected.ll
M polly/test/ScopInfo/2012-03-16-Crash-because-of-unsigned-in-scev.ll
M polly/test/ScopInfo/2015-10-04-Crash-in-domain-generation.ll
M polly/test/ScopInfo/Alias-0.ll
M polly/test/ScopInfo/Alias-1.ll
M polly/test/ScopInfo/Alias-2.ll
M polly/test/ScopInfo/Alias-3.ll
M polly/test/ScopInfo/Alias-4.ll
M polly/test/ScopInfo/BoundChecks/single-loop.ll
M polly/test/ScopInfo/BoundChecks/two-loops.ll
M polly/test/ScopInfo/NonAffine/div_backedge.ll
M polly/test/ScopInfo/NonAffine/div_domain.ll
M polly/test/ScopInfo/NonAffine/invariant_loads_dependent_in_non_affine_region.ll
M polly/test/ScopInfo/NonAffine/modulo_backedge.ll
M polly/test/ScopInfo/NonAffine/modulo_domain.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_1.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopInfo/NonAffine/non_affine_access_with_range_2.ll
M polly/test/ScopInfo/NonAffine/non_affine_but_sdiv.ll
M polly/test/ScopInfo/NonAffine/non_affine_but_srem.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_nested.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_affine_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_float_compare.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_condition.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
M polly/test/ScopInfo/NonAffine/non_affine_parametric_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_region_guaranteed_non-entry.ll
M polly/test/ScopInfo/NonAffine/whole-scop-non-affine-subregion-in-loop.ll
M polly/test/ScopInfo/aliasing_conditional_alias_groups_1.ll
M polly/test/ScopInfo/aliasing_conditional_alias_groups_2.ll
M polly/test/ScopInfo/aliasing_dead_access.ll
M polly/test/ScopInfo/aliasing_many_arrays_to_compare.ll
M polly/test/ScopInfo/aliasing_many_parameters_not_all_involved.ll
M polly/test/ScopInfo/aliasing_many_read_only_acesses.ll
M polly/test/ScopInfo/aliasing_multiple_alias_groups.ll
M polly/test/ScopInfo/aliasing_with_non_affine_access.ll
M polly/test/ScopInfo/allow-all-parameters-dereferencable.ll
M polly/test/ScopInfo/assume_gep_bounds.ll
M polly/test/ScopInfo/assume_gep_bounds_2.ll
M polly/test/ScopInfo/assume_gep_bounds_many.ll
M polly/test/ScopInfo/avoid_new_parameters_from_geps.ll
M polly/test/ScopInfo/bool-addrec.ll
M polly/test/ScopInfo/bounded_loop_assumptions.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations-2.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations-3.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations.ll
M polly/test/ScopInfo/bug_2010_10_22.ll
M polly/test/ScopInfo/bug_2011_1_5.ll
M polly/test/ScopInfo/bug_scev_not_fully_eval.ll
M polly/test/ScopInfo/cfg_consequences.ll
M polly/test/ScopInfo/complex-branch-structure.ll
M polly/test/ScopInfo/complex-condition.ll
M polly/test/ScopInfo/complex-expression.ll
M polly/test/ScopInfo/complex-loop-nesting.ll
M polly/test/ScopInfo/complex-successor-structure-2.ll
M polly/test/ScopInfo/complex-successor-structure-3.ll
M polly/test/ScopInfo/complex-successor-structure.ll
M polly/test/ScopInfo/complex_domain_binary_condition.ll
M polly/test/ScopInfo/complex_execution_context.ll
M polly/test/ScopInfo/cond_constant_in_loop.ll
M polly/test/ScopInfo/cond_in_loop.ll
M polly/test/ScopInfo/condition-after-error-block-2.ll
M polly/test/ScopInfo/condtion-after-error-block.ll
M polly/test/ScopInfo/const_srem_sdiv.ll
M polly/test/ScopInfo/constant-non-integer-branch-condition.ll
M polly/test/ScopInfo/constant_factor_in_parameter.ll
M polly/test/ScopInfo/constant_functions_outside_scop_as_unknown.ll
M polly/test/ScopInfo/constant_start_integer.ll
M polly/test/ScopInfo/debug_call.ll
M polly/test/ScopInfo/delinearize-together-all-data-refs.ll
M polly/test/ScopInfo/div_by_zero.ll
M polly/test/ScopInfo/do-not-model-error-block-accesses.ll
M polly/test/ScopInfo/eager-binary-and-or-conditions.ll
M polly/test/ScopInfo/early_exit_for_complex_domains.ll
M polly/test/ScopInfo/error-blocks-1.ll
M polly/test/ScopInfo/error-blocks-2.ll
M polly/test/ScopInfo/error-blocks-3.ll
M polly/test/ScopInfo/escaping_empty_scop.ll
M polly/test/ScopInfo/exit-phi-1.ll
M polly/test/ScopInfo/exit-phi-2.ll
M polly/test/ScopInfo/exit_phi_accesses-2.ll
M polly/test/ScopInfo/exit_phi_accesses.ll
M polly/test/ScopInfo/expensive-boundary-context.ll
M polly/test/ScopInfo/extract_constant_factor_introduces_new_parameter.ll
M polly/test/ScopInfo/full-function.ll
M polly/test/ScopInfo/granularity_same_name.ll
M polly/test/ScopInfo/granularity_scalar-indep.ll
M polly/test/ScopInfo/granularity_scalar-indep_cross-referencing-phi1.ll
M polly/test/ScopInfo/granularity_scalar-indep_cross-referencing-phi2.ll
M polly/test/ScopInfo/granularity_scalar-indep_epilogue.ll
M polly/test/ScopInfo/granularity_scalar-indep_epilogue_last.ll
M polly/test/ScopInfo/granularity_scalar-indep_noepilogue.ll
M polly/test/ScopInfo/granularity_scalar-indep_ordered-2.ll
M polly/test/ScopInfo/granularity_scalar-indep_ordered.ll
M polly/test/ScopInfo/i1_params.ll
M polly/test/ScopInfo/infeasible-rtc.ll
M polly/test/ScopInfo/infeasible_invalid_context.ll
M polly/test/ScopInfo/int2ptr_ptr2int.ll
M polly/test/ScopInfo/int2ptr_ptr2int_2.ll
M polly/test/ScopInfo/integers.ll
M polly/test/ScopInfo/inter-error-bb-dependence.ll
M polly/test/ScopInfo/inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll
M polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_bb_scalar_dep.ll
M polly/test/ScopInfo/intrinsics.ll
M polly/test/ScopInfo/invalid_add_rec_after_invariant_load_remapping.ll
M polly/test/ScopInfo/invalidate_iterator_during_MA_removal.ll
M polly/test/ScopInfo/invariant-load-instlist.ll
M polly/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
M polly/test/ScopInfo/invariant_load.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer_escaping.ll
M polly/test/ScopInfo/invariant_load_addrec_sum.ll
M polly/test/ScopInfo/invariant_load_base_pointer.ll
M polly/test/ScopInfo/invariant_load_base_pointer_conditional.ll
M polly/test/ScopInfo/invariant_load_base_pointer_in_conditional.ll
M polly/test/ScopInfo/invariant_load_branch_condition.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_2.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_3.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4b.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4c.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_5.ll
M polly/test/ScopInfo/invariant_load_complex_condition.ll
M polly/test/ScopInfo/invariant_load_condition.ll
M polly/test/ScopInfo/invariant_load_dereferenceable.ll
M polly/test/ScopInfo/invariant_load_distinct_parameter_valuations.ll
M polly/test/ScopInfo/invariant_load_in_non_affine.ll
M polly/test/ScopInfo/invariant_load_loop_ub.ll
M polly/test/ScopInfo/invariant_load_ptr_ptr_noalias.ll
M polly/test/ScopInfo/invariant_load_scalar_dep.ll
M polly/test/ScopInfo/invariant_load_stmt_domain.ll
M polly/test/ScopInfo/invariant_load_zext_parameter-2.ll
M polly/test/ScopInfo/invariant_load_zext_parameter.ll
M polly/test/ScopInfo/invariant_load_zextended_in_own_execution_context.ll
M polly/test/ScopInfo/invariant_loads_complicated_dependences.ll
M polly/test/ScopInfo/invariant_loads_cyclic_dependences.ll
M polly/test/ScopInfo/invariant_loop_bounds.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-1.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-2.ll
M polly/test/ScopInfo/isl_aff_out_of_bounds.ll
M polly/test/ScopInfo/isl_trip_count_01.ll
M polly/test/ScopInfo/isl_trip_count_02.ll
M polly/test/ScopInfo/isl_trip_count_03.ll
M polly/test/ScopInfo/isl_trip_count_multiple_exiting_blocks.ll
M polly/test/ScopInfo/issue187922.ll
M polly/test/ScopInfo/issue190128.ll
M polly/test/ScopInfo/licm_load.ll
M polly/test/ScopInfo/licm_potential_store.ll
M polly/test/ScopInfo/licm_potential_store_mssa.ll
M polly/test/ScopInfo/licm_reduction_nested.ll
M polly/test/ScopInfo/long-compile-time-alias-analysis.ll
M polly/test/ScopInfo/long-sequence-of-error-blocks-2.ll
M polly/test/ScopInfo/long-sequence-of-error-blocks.ll
M polly/test/ScopInfo/loop-multiexit-succ-cond.ll
M polly/test/ScopInfo/loop_affine_bound_0.ll
M polly/test/ScopInfo/loop_affine_bound_1.ll
M polly/test/ScopInfo/loop_affine_bound_2.ll
M polly/test/ScopInfo/loop_carry.ll
M polly/test/ScopInfo/many-scalar-dependences.ll
M polly/test/ScopInfo/max-loop-depth.ll
M polly/test/ScopInfo/memcpy-raw-source.ll
M polly/test/ScopInfo/memcpy.ll
M polly/test/ScopInfo/memmove.ll
M polly/test/ScopInfo/memset.ll
M polly/test/ScopInfo/memset_null.ll
M polly/test/ScopInfo/mismatching-array-dimensions.ll
M polly/test/ScopInfo/mod_ref_access_pointee_arguments.ll
M polly/test/ScopInfo/mod_ref_read_pointee_arguments.ll
M polly/test/ScopInfo/mod_ref_read_pointer.ll
M polly/test/ScopInfo/mod_ref_read_pointers.ll
M polly/test/ScopInfo/modulo_zext_1.ll
M polly/test/ScopInfo/modulo_zext_2.ll
M polly/test/ScopInfo/modulo_zext_3.ll
M polly/test/ScopInfo/multi-scop.ll
M polly/test/ScopInfo/multidim-shrunk-element-type.ll
M polly/test/ScopInfo/multidim_2d-diagonal-matrix.ll
M polly/test/ScopInfo/multidim_2d_outer_parametric_offset.ll
M polly/test/ScopInfo/multidim_2d_parametric_array_static_loop_bounds.ll
M polly/test/ScopInfo/multidim_2d_with_modref_call.ll
M polly/test/ScopInfo/multidim_2d_with_modref_call_2.ll
M polly/test/ScopInfo/multidim_3d_parametric_array_static_loop_bounds.ll
M polly/test/ScopInfo/multidim_fixedsize_different_dimensionality.ll
M polly/test/ScopInfo/multidim_fixedsize_multi_offset.ll
M polly/test/ScopInfo/multidim_fold_constant_dim.ll
M polly/test/ScopInfo/multidim_fold_constant_dim_zero.ll
M polly/test/ScopInfo/multidim_fortran_2d.ll
M polly/test/ScopInfo/multidim_fortran_2d_params.ll
M polly/test/ScopInfo/multidim_fortran_2d_with_modref_call.ll
M polly/test/ScopInfo/multidim_fortran_srem.ll
M polly/test/ScopInfo/multidim_gep_pointercast.ll
M polly/test/ScopInfo/multidim_gep_pointercast2.ll
M polly/test/ScopInfo/multidim_invalid_dimension.ll
M polly/test/ScopInfo/multidim_ivs_and_integer_offsets_3d.ll
M polly/test/ScopInfo/multidim_ivs_and_parameteric_offsets_3d.ll
M polly/test/ScopInfo/multidim_many_references.ll
M polly/test/ScopInfo/multidim_nested_start_integer.ll
M polly/test/ScopInfo/multidim_nested_start_share_parameter.ll
M polly/test/ScopInfo/multidim_only_ivs_2d.ll
M polly/test/ScopInfo/multidim_only_ivs_3d.ll
M polly/test/ScopInfo/multidim_only_ivs_3d_cast.ll
M polly/test/ScopInfo/multidim_only_ivs_3d_reverse.ll
M polly/test/ScopInfo/multidim_param_in_subscript-2.ll
M polly/test/ScopInfo/multidim_param_in_subscript.ll
M polly/test/ScopInfo/multidim_parameter_addrec_product.ll
M polly/test/ScopInfo/multidim_single_and_multidim_array.ll
M polly/test/ScopInfo/multidim_srem.ll
M polly/test/ScopInfo/multidim_with_bitcast.ll
M polly/test/ScopInfo/multiple-binary-or-conditions.ll
M polly/test/ScopInfo/multiple-types-access-offset-not-dividable-by-element-size.ll
M polly/test/ScopInfo/multiple-types-non-affine-2.ll
M polly/test/ScopInfo/multiple-types-non-affine.ll
M polly/test/ScopInfo/multiple-types-non-power-of-two-2.ll
M polly/test/ScopInfo/multiple-types-non-power-of-two.ll
M polly/test/ScopInfo/multiple-types-two-dimensional-2.ll
M polly/test/ScopInfo/multiple-types-two-dimensional.ll
M polly/test/ScopInfo/multiple-types.ll
M polly/test/ScopInfo/multiple_exiting_blocks.ll
M polly/test/ScopInfo/multiple_exiting_blocks_two_loop.ll
M polly/test/ScopInfo/multiple_latch_blocks.ll
M polly/test/ScopInfo/nested-loops.ll
M polly/test/ScopInfo/no-scalar-deps-in-non-affine-subregion.ll
M polly/test/ScopInfo/non-affine-region-phi.ll
M polly/test/ScopInfo/non-affine-region-with-loop-2.ll
M polly/test/ScopInfo/non-affine-region-with-loop.ll
M polly/test/ScopInfo/non-precise-inv-load-1.ll
M polly/test/ScopInfo/non-precise-inv-load-2.ll
M polly/test/ScopInfo/non-precise-inv-load-3.ll
M polly/test/ScopInfo/non-precise-inv-load-4.ll
M polly/test/ScopInfo/non-precise-inv-load-5.ll
M polly/test/ScopInfo/non-precise-inv-load-6.ll
M polly/test/ScopInfo/non-pure-function-call.ll
M polly/test/ScopInfo/non-pure-function-calls-causes-dead-blocks.ll
M polly/test/ScopInfo/non-pure-function-calls.ll
M polly/test/ScopInfo/non_affine_access.ll
M polly/test/ScopInfo/non_affine_region_1.ll
M polly/test/ScopInfo/non_affine_region_2.ll
M polly/test/ScopInfo/non_affine_region_3.ll
M polly/test/ScopInfo/non_affine_region_4.ll
M polly/test/ScopInfo/nonaffine-buildMemoryAccess.ll
M polly/test/ScopInfo/not-a-reduction.ll
M polly/test/ScopInfo/opaque-struct.ll
M polly/test/ScopInfo/out-of-scop-use-in-region-entry-phi-node.ll
M polly/test/ScopInfo/parameter-constant-division.ll
M polly/test/ScopInfo/parameter_in_dead_statement.ll
M polly/test/ScopInfo/parameter_product.ll
M polly/test/ScopInfo/parameter_with_constant_factor_in_add.ll
M polly/test/ScopInfo/partially_invariant_load_1.ll
M polly/test/ScopInfo/partially_invariant_load_2.ll
M polly/test/ScopInfo/phi-in-non-affine-region.ll
M polly/test/ScopInfo/phi_after_error_block.ll
M polly/test/ScopInfo/phi_condition_modeling_1.ll
M polly/test/ScopInfo/phi_condition_modeling_2.ll
M polly/test/ScopInfo/phi_conditional_simple_1.ll
M polly/test/ScopInfo/phi_loop_carried_float.ll
M polly/test/ScopInfo/phi_scalar_simple_1.ll
M polly/test/ScopInfo/phi_scalar_simple_2.ll
M polly/test/ScopInfo/phi_with_invoke_edge.ll
M polly/test/ScopInfo/pointer-comparison-no-nsw.ll
M polly/test/ScopInfo/pointer-comparison.ll
M polly/test/ScopInfo/pointer-type-expressions.ll
M polly/test/ScopInfo/pointer-used-as-base-pointer-and-scalar-read.ll
M polly/test/ScopInfo/polly-timeout-parameter-bounds.ll
M polly/test/ScopInfo/pr38218.ll
M polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll
M polly/test/ScopInfo/process_added_dimensions.ll
M polly/test/ScopInfo/pwaff-complexity-bailout.ll
M polly/test/ScopInfo/ranged_parameter.ll
M polly/test/ScopInfo/ranged_parameter_2.ll
M polly/test/ScopInfo/ranged_parameter_wrap.ll
M polly/test/ScopInfo/ranged_parameter_wrap_2.ll
M polly/test/ScopInfo/read-only-scalar-used-in-phi-2.ll
M polly/test/ScopInfo/read-only-scalar-used-in-phi.ll
M polly/test/ScopInfo/read-only-scalars.ll
M polly/test/ScopInfo/read-only-statements.ll
M polly/test/ScopInfo/reduction_alternating_base.ll
M polly/test/ScopInfo/reduction_chain_partially_outside_the_scop.ll
M polly/test/ScopInfo/reduction_different_index.ll
M polly/test/ScopInfo/reduction_different_index1.ll
M polly/test/ScopInfo/reduction_disabled_multiplicative.ll
M polly/test/ScopInfo/reduction_double.ll
M polly/test/ScopInfo/reduction_escaping_intermediate.ll
M polly/test/ScopInfo/reduction_escaping_intermediate_2.ll
M polly/test/ScopInfo/reduction_escaping_intermediate_3.ll
M polly/test/ScopInfo/reduction_if.ll
M polly/test/ScopInfo/reduction_indirect_access.ll
M polly/test/ScopInfo/reduction_indirect_access_2.ll
M polly/test/ScopInfo/reduction_invalid_different_operators.ll
M polly/test/ScopInfo/reduction_invalid_overlapping_accesses.ll
M polly/test/ScopInfo/reduction_long_reduction_chain.ll
M polly/test/ScopInfo/reduction_long_reduction_chain_double_use.ll
M polly/test/ScopInfo/reduction_multiple_different_operators.ll
M polly/test/ScopInfo/reduction_multiple_loops_array_sum.ll
M polly/test/ScopInfo/reduction_multiple_loops_array_sum_1.ll
M polly/test/ScopInfo/reduction_multiple_simple_binary.ll
M polly/test/ScopInfo/reduction_non_overlapping_chains.ll
M polly/test/ScopInfo/reduction_only_reduction_like_access.ll
M polly/test/ScopInfo/reduction_simple_fp.ll
M polly/test/ScopInfo/reduction_simple_w_constant.ll
M polly/test/ScopInfo/reduction_simple_w_iv.ll
M polly/test/ScopInfo/reduction_two_identical_reads.ll
M polly/test/ScopInfo/redundant_parameter_constraint.ll
M polly/test/ScopInfo/region-with-instructions.ll
M polly/test/ScopInfo/remarks.ll
M polly/test/ScopInfo/required-invariant-loop-bounds.ll
M polly/test/ScopInfo/restriction_in_dead_block.ll
M polly/test/ScopInfo/run-time-check-many-array-disjuncts.ll
M polly/test/ScopInfo/run-time-check-many-parameters.ll
M polly/test/ScopInfo/run-time-check-many-piecewise-aliasing.ll
M polly/test/ScopInfo/run-time-check-read-only-arrays.ll
M polly/test/ScopInfo/same-base-address-scalar-and-array.ll
M polly/test/ScopInfo/scalar.ll
M polly/test/ScopInfo/scalar_dependence_cond_br.ll
M polly/test/ScopInfo/scalar_to_array.ll
M polly/test/ScopInfo/scev-div-with-evaluatable-divisor.ll
M polly/test/ScopInfo/scev-invalidated.ll
M polly/test/ScopInfo/schedule-const-post-dominator-walk-2.ll
M polly/test/ScopInfo/schedule-const-post-dominator-walk.ll
M polly/test/ScopInfo/schedule-constuction-endless-loop1.ll
M polly/test/ScopInfo/schedule-constuction-endless-loop2.ll
M polly/test/ScopInfo/schedule-incorrectly-contructed-in-case-of-infinite-loop.ll
M polly/test/ScopInfo/scop-affine-parameter-ordering.ll
M polly/test/ScopInfo/sign_wrapped_set.ll
M polly/test/ScopInfo/simple_loop_1.ll
M polly/test/ScopInfo/simple_loop_2.ll
M polly/test/ScopInfo/simple_loop_unsigned.ll
M polly/test/ScopInfo/simple_loop_unsigned_2.ll
M polly/test/ScopInfo/simple_loop_unsigned_3.ll
M polly/test/ScopInfo/simple_nonaffine_loop_not.ll
M polly/test/ScopInfo/smax.ll
M polly/test/ScopInfo/statistics.ll
M polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll
M polly/test/ScopInfo/stmt_split_no_after_split.ll
M polly/test/ScopInfo/stmt_split_no_dependence.ll
M polly/test/ScopInfo/stmt_split_on_store.ll
M polly/test/ScopInfo/stmt_split_on_synthesizable.ll
M polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll
M polly/test/ScopInfo/stmt_split_phi_in_stmt.ll
M polly/test/ScopInfo/stmt_split_scalar_dependence.ll
M polly/test/ScopInfo/stmt_split_within_loop.ll
M polly/test/ScopInfo/stmt_with_read_but_without_sideffect.ll
M polly/test/ScopInfo/switch-1.ll
M polly/test/ScopInfo/switch-2.ll
M polly/test/ScopInfo/switch-3.ll
M polly/test/ScopInfo/switch-4.ll
M polly/test/ScopInfo/switch-5.ll
M polly/test/ScopInfo/switch-6.ll
M polly/test/ScopInfo/switch-7.ll
M polly/test/ScopInfo/tempscop-printing.ll
M polly/test/ScopInfo/test-wrapping-in-condition.ll
M polly/test/ScopInfo/truncate-1.ll
M polly/test/ScopInfo/truncate-2.ll
M polly/test/ScopInfo/truncate-3.ll
M polly/test/ScopInfo/two-loops-one-infinite.ll
M polly/test/ScopInfo/two-loops-right-after-each-other.ll
M polly/test/ScopInfo/undef_in_cond.ll
M polly/test/ScopInfo/unnamed_nonaffine.ll
M polly/test/ScopInfo/unnamed_stmts.ll
M polly/test/ScopInfo/unpredictable_nonscop_loop.ll
M polly/test/ScopInfo/unprofitable_scalar-accs.ll
M polly/test/ScopInfo/unsigned-condition.ll
M polly/test/ScopInfo/unsigned-division-1.ll
M polly/test/ScopInfo/unsigned-division-2.ll
M polly/test/ScopInfo/unsigned-division-3.ll
M polly/test/ScopInfo/unsigned-division-4.ll
M polly/test/ScopInfo/unsigned-division-5.ll
M polly/test/ScopInfo/unsigned_wrap_uge.ll
M polly/test/ScopInfo/unsigned_wrap_ugt.ll
M polly/test/ScopInfo/unsigned_wrap_ule.ll
M polly/test/ScopInfo/unsigned_wrap_ult.ll
M polly/test/ScopInfo/user-assumption-cached-precondition.ll
M polly/test/ScopInfo/user_context.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-signed-conditional.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-signed.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-unsigned.ll
M polly/test/ScopInfo/user_provided_assumptions.ll
M polly/test/ScopInfo/user_provided_assumptions_2.ll
M polly/test/ScopInfo/user_provided_assumptions_3.ll
M polly/test/ScopInfo/user_provided_non_dominating_assumptions.ll
M polly/test/ScopInfo/variant_base_pointer.ll
M polly/test/ScopInfo/variant_load_empty_domain.ll
M polly/test/ScopInfo/wraping_signed_expr_0.ll
M polly/test/ScopInfo/wraping_signed_expr_1.ll
M polly/test/ScopInfo/wraping_signed_expr_2.ll
M polly/test/ScopInfo/wraping_signed_expr_3.ll
M polly/test/ScopInfo/wraping_signed_expr_4.ll
M polly/test/ScopInfo/wraping_signed_expr_5.ll
M polly/test/ScopInfo/wraping_signed_expr_6.ll
M polly/test/ScopInfo/wraping_signed_expr_7.ll
M polly/test/ScopInfo/wraping_signed_expr_slow_1.ll
M polly/test/ScopInfo/wraping_signed_expr_slow_2.ll
M polly/test/ScopInfo/zero_ext_of_truncate.ll
M polly/test/ScopInfo/zero_ext_of_truncate_2.ll
M polly/test/ScopInfo/zero_ext_space_mismatch.ll
M polly/test/ScopInfo/zext-loop-bound-unbounded.ll
M polly/test/ScopInliner/ignore-declares.ll
M polly/test/ScopInliner/invariant-load-func.ll
M polly/test/ScopInliner/simple-inline-loop.ll
M polly/test/Simplify/coalesce_3partials.ll
M polly/test/Simplify/coalesce_disjointelements.ll
M polly/test/Simplify/coalesce_overlapping.ll
M polly/test/Simplify/coalesce_partial.ll
M polly/test/Simplify/dead_access_load.ll
M polly/test/Simplify/dead_access_phi.ll
M polly/test/Simplify/dead_access_value.ll
M polly/test/Simplify/dead_instruction.ll
M polly/test/Simplify/emptyaccessdomain.ll
M polly/test/Simplify/exit_phi_accesses-2.ll
M polly/test/Simplify/func-b320a7.ll
M polly/test/Simplify/gemm.ll
M polly/test/Simplify/nocoalesce_differentvalues.ll
M polly/test/Simplify/nocoalesce_elementmismatch.ll
M polly/test/Simplify/nocoalesce_readbetween.ll
M polly/test/Simplify/nocoalesce_writebetween.ll
M polly/test/Simplify/notdead_region_exitphi.ll
M polly/test/Simplify/notdead_region_innerphi.ll
M polly/test/Simplify/notredundant_region_loop.ll
M polly/test/Simplify/notredundant_region_middle.ll
M polly/test/Simplify/notredundant_synthesizable_unknownit.ll
M polly/test/Simplify/out-of-scop-use-in-region-entry-phi-node.ll
M polly/test/Simplify/overwritten.ll
M polly/test/Simplify/overwritten_3phi.ll
M polly/test/Simplify/overwritten_3store.ll
M polly/test/Simplify/overwritten_implicit_and_explicit.ll
M polly/test/Simplify/overwritten_loadbetween.ll
M polly/test/Simplify/overwritten_scalar.ll
M polly/test/Simplify/pass_existence.ll
M polly/test/Simplify/phi_in_regionstmt.ll
M polly/test/Simplify/pr33323.ll
M polly/test/Simplify/redundant.ll
M polly/test/Simplify/redundant_differentindex.ll
M polly/test/Simplify/redundant_partialwrite.ll
M polly/test/Simplify/redundant_region.ll
M polly/test/Simplify/redundant_region_scalar.ll
M polly/test/Simplify/redundant_scalarwrite.ll
M polly/test/Simplify/redundant_storebetween.ll
M polly/test/Simplify/scalability1.ll
M polly/test/Simplify/scalability2.ll
M polly/test/Simplify/sweep_mapped_phi.ll
M polly/test/Simplify/sweep_mapped_value.ll
M polly/test/Simplify/ununsed_read_in_region_entry.ll
M polly/test/Support/Plugins.ll
M polly/test/Support/defaultpipelines.ll
M polly/test/Support/dumpfunction.ll
M polly/test/Support/dumpmodule.ll
M polly/test/Support/exportjson.ll
M polly/test/Support/isl-args.ll
M polly/test/Support/pipelineposition.ll
M polly/test/Support/pollyDebug.ll
M polly/test/lit.site.cfg.in
M polly/test/polly.ll
Log Message:
-----------
[Plugins] Load pass plugins after parsing the command line (#226773)
opt and llc load -load-pass-plugin plugins from a cl::opt callback while
parsing argv, so that the options a plugin registers are recognized
later on the command line. cl::callback is to be removed to enable
migration to a TableGen-based option representation
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
Load plugins after cl::ParseCommandLineOptions. A loaded plugin's
options are no longer accepted as ordinary options; pass them with
-plugin-arg=<plugin>,<arg> instead. Prefix each Polly option in Polly
tests with -plugin-arg=Polly, and each IRTransforms example option with
-plugin-arg=SimplifyCFG,.
LLM-aided
Commit: 935c0d5a3e704b8b21a1738d1e0ea8305f855a37
https://github.com/llvm/llvm-project/commit/935c0d5a3e704b8b21a1738d1e0ea8305f855a37
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
Log Message:
-----------
[Offload] Fix dangling memory references / leaks (#227411)
Summary:
Two small tweaks. First, the allocator creates memory for the type via
placement new, but does not deallocate it with the destructor. This is
UB and is fixed by explicitly callling the type's destructor. Second,
the plugins were only 'released', which was likely just being confused
with `reset`. Release returns the pointer, essentially giving up
ownership, but we never take the pointer so it just dangles. The correct
spelling is 'reset'.
Commit: 6ff5cc95eca5ac6971405a16fd9c06b8fa650377
https://github.com/llvm/llvm-project/commit/6ff5cc95eca5ac6971405a16fd9c06b8fa650377
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Widening Unzip (#227211)
Commit: aa797754ed4fb37fc4649171b3121e437923d007
https://github.com/llvm/llvm-project/commit/aa797754ed4fb37fc4649171b3121e437923d007
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fix 667cfbec38942e08bd67fa51cc05e63686dd01b9 (#227544)
Commit: c4825a0b9a57b3016de5f3c82f14c5c17c470b96
https://github.com/llvm/llvm-project/commit/c4825a0b9a57b3016de5f3c82f14c5c17c470b96
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/lib/Target/RISCV/RISCVVectorUtils.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
Log Message:
-----------
[RISCV] Model Zvzip VPAIR shuffle costs (#227177)
Model pair-even and pair-odd shuffle costs using vpaire.vv and
vpairo.vv when the Zvzip extension is available.
Add a new file `RISCVVectorUtils.h` to share shuffle-mask
helpers between ISel lowering and TTI. Also move `isPairEven`
and `isPairOdd` into the new file and reuse them in TTI.
This is the second PR split out from #224991.
Assisted-by: TRAE CLI (GPT-5)
Commit: e199f2bc57e18ab530d5704b485e5c19f5de20ae
https://github.com/llvm/llvm-project/commit/e199f2bc57e18ab530d5704b485e5c19f5de20ae
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M bolt/lib/Core/HashUtilities.cpp
Log Message:
-----------
[BOLT][Core] avoid string temporaries in block hashing. (#213510)
Commit: 6281eb5d56b6ffd988a4d0fb7ed9a4652a7d8af5
https://github.com/llvm/llvm-project/commit/6281eb5d56b6ffd988a4d0fb7ed9a4652a7d8af5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-libstdcxx.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
Log Message:
-----------
[libc++] Run Linux benchmarks on the premerge k8s runner set (#227547)
The Linux benchmarking machine was still using the
llvm-premerge-libcxx-runners runner set, which doesn't exist anymore.
Moving to K8s also requires specifying the Docker image to use in
machines.json.
As a drive-by, drop the manual Python installation since a suitable
version of Python should already exist in the image.
Commit: 1502b675469afcd0d2490ba83a96fccf4da7dc4d
https://github.com/llvm/llvm-project/commit/1502b675469afcd0d2490ba83a96fccf4da7dc4d
Author: Skywaterr <jleung12333 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
Fix typo in comment for ConstantInt get method (#227493)
Originally found this typo from docs generated by Doxygen.
Commit: d01219d32dbe64d5a108ad644c294cf7289f28b1
https://github.com/llvm/llvm-project/commit/d01219d32dbe64d5a108ad644c294cf7289f28b1
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenObjCXX/objc-atomic-ownership-recovery.mm
Log Message:
-----------
[Sema] Return RecoveryExpr for ARC atomic ownership error (#224849)
`BuiltinAtomicOverloaded` returned a bare `ExprError()` on the ARC
ownership check and made CodeGen hit `llvm_unreachable`.
so return a `RecoveryExpr` instead so bad data can't reach codegen.
Fixes #222528.
Commit: 35871857cfedb85c79f5480cc648ae4f046ed673
https://github.com/llvm/llvm-project/commit/35871857cfedb85c79f5480cc648ae4f046ed673
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
Log Message:
-----------
[SelectionDAG] Keep inline asm clobbers live when read by a glued CopyFromReg (#227203)
PR #227026 marks every clobber def dead, but a flag output such as X86
`={@ccz}` is lowered to a glued `CopyFromReg $eflags` whose only
definition is the `~{flags}` clobber. With EXPENSIVE_CHECKS the verifier
reports "Using an undefined physical register" for the SETcc that reads
EFLAGS (bittest-intrin.ll, inline-asm-flag-output.ll, pr40737.ll).
Don't set the dead flag on a clobber that overlaps a physical register
read by a glued CopyFromReg.
Aided by Opus 5.5
Commit: 474a93b60800715d828ebd6160abb0b46eb54fee
https://github.com/llvm/llvm-project/commit/474a93b60800715d828ebd6160abb0b46eb54fee
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
Log Message:
-----------
[compiler-rt] Fix failing HSA test after #226551 (#227552)
Summary:
Internal symbolization fails this test due to RTLD_NEXT.
Commit: 675d1bddd047a6bb5ff705ece5b4ca9622ba9ed3
https://github.com/llvm/llvm-project/commit/675d1bddd047a6bb5ff705ece5b4ca9622ba9ed3
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[compiler-rt] Fix failing HSA test after #226551 (#227552)
Summary:
Internal symbolization fails this test due to RTLD_NEXT.
Commit: 2982b53a05e7ea959309a8ab7ae259f72f4e7bb5
https://github.com/llvm/llvm-project/commit/2982b53a05e7ea959309a8ab7ae259f72f4e7bb5
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/ThreadPlanStack.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestEmptyThreadList.py
Log Message:
-----------
[lldb] Fix unbounded recursion on an empty thread list (#227396)
ThreadPlanStackMap::Update runs inside UpdateThreadListIfNeeded, but
looked up threads with FindThreadByID, which refreshes the list again.
UpdateThreadListIfNeeded always refreshes an empty list, so a stop that
reports no threads recursed until the stack overflowed.
Look threads up without refreshing. PruneThreadPlans relied on that
lookup to refresh the list, so have it refresh the list itself.
PS: I ran into this when stepping through a Wasm module running under
the WebAssembly Micro Runtime (WAMR). The new test case mimics that
interaction.
rdar://157254463
Commit: f87fd43dbd9bbd5b7ad2bc9762eb7c969f48c263
https://github.com/llvm/llvm-project/commit/f87fd43dbd9bbd5b7ad2bc9762eb7c969f48c263
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/scripted_extensions/TestScriptedExtensionsDiagnostics.py
Log Message:
-----------
[lldb/Interpreter] Report scripted hook failures via Debugger::ReportError (#227508)
This patch addresses post-merge feedback on #225292.
`ReportScriptedHookError` formatted the error through a
`CommandReturnObject` whose immediate streams pointed at the hook's
output stream. Since no command is involved, this patch reports the
failure with `Debugger::ReportError` instead, which is the diagnostic
channel other scripted extensions already use when they have no caller
to return an error to.
This patch also makes the default `HandleModuleLoaded` and
`HandleModuleUnloaded` implementations in `ScriptedHookInterface` return
`llvm::errc::not_supported` rather than success, since they are only
invoked when the scripted class implements the corresponding method.
The scripted stop hook tests now assert on the diagnostic event rather
than on the debugger's output.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 54d06fb5c7ddce0c28e5bbb0d1a1eceea9870a9b
https://github.com/llvm/llvm-project/commit/54d06fb5c7ddce0c28e5bbb0d1a1eceea9870a9b
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Don't skip the else branch of an if statement with a condition variable and a trivial then branch (#227262)
Previously, when an `if` statement had a condition variable and a
trivial then branch, `TraverseIfStmt` skipped the entire statement. That
is correct for the condition variable, which is null in the else branch,
but it also skipped the else branch, which caused a missing warning for
any raw pointer/reference local variable declared there. This still
exempts the condition variable but traverses the else branch when it is
not trivial.
Commit: dc887712dab0a5d1f234f9c4a0942c1ff2999a70
https://github.com/llvm/llvm-project/commit/dc887712dab0a5d1f234f9c4a0942c1ff2999a70
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/exclude.txt
M libc/include/sys/random.yaml
M libc/src/sys/random/CMakeLists.txt
A libc/src/sys/random/getentropy.h
M libc/src/sys/random/linux/CMakeLists.txt
A libc/src/sys/random/linux/getentropy.cpp
M libc/test/src/sys/random/linux/CMakeLists.txt
A libc/test/src/sys/random/linux/getentropy_test.cpp
Log Message:
-----------
[libc] Implement getentropy in sys/random (#226501)
Implement the standard POSIX.1-2024 function `getentropy` in
`<sys/random.h>`, bringing `<sys/random.h>` to 100% completion.
Fixes #226458
Commit: e6e5ade05a9b645beb37ce1dd5142f6a923b1eae
https://github.com/llvm/llvm-project/commit/e6e5ade05a9b645beb37ce1dd5142f6a923b1eae
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-objdump/ELF/RISCV/mapping-sym-isa-disassembly.s
M llvm/test/tools/llvm-objdump/ELF/RISCV/mapping-sym-isa-mattr-conflict.s
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][RISC-V] Do not leak file-level features into $x<ISA> regions (#227513)
Previously, RISCVISATargetCache::get initialized per-region features from
Base.SubtargetInfo->getFeatureString(), which already included the
file-level Tag_RISCV_arch and --mattr flags. Because RISCVISAInfo::toFeatures()
only emits "+ext" for extensions present in the "$x<ISA>" mapping symbol
(and never "-ext"), any extension enabled in Tag_RISCV_arch or via a
conflicting --mattr remained enabled even in regions whose "$x<ISA>"
mapping symbol disabled it.
Start from an empty SubtargetFeatures instead and populate it from the
parsed "$x<ISA>" mapping symbol (plus non-conflicting --mattr flags).
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227513
Commit: 4f5877ff5b6e947123142f7e17ffd04850fd416a
https://github.com/llvm/llvm-project/commit/4f5877ff5b6e947123142f7e17ffd04850fd416a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Reduce memory usage in metadata use tracking (NFC) (#221866)
This patch reduces the memory footprint of metadata use tracking.
Currently, ReplaceableUses uses:
SmallDenseMap<void *, std::pair<OwnerTy, uint64_t>, 4>
where the uint64_t records insertion order. The problem is that
once it exceeds 2 elements, it allocates 64 buckets (~1.5 KB). In large
compilations with debug info, thousands of metadata nodes have 3 or 4
uses, leading to significant overhead.
With this patch, uses are stored directly in a SmallVector:
struct UseEntry {
void *Ref;
OwnerTy Owner;
};
SmallVector<UseEntry, 4> UseMap;
// In addRef:
UseMap.push_back({Ref, Owner});
SmallVector stores up to 4 elements inline (~87% of metadata nodes)
without heap allocation, up from 2 elements (~64% of metadata nodes)
with SmallDenseMap. It also provides a deterministic array order,
eliminating the need to sort uses by an explicit ID in several places.
For the rare nodes with more than 32 uses, an on-demand
DenseMap<void *, unsigned> (IndexMap) is lazily allocated to map each
Ref to its index in UseMap.
To support this representation efficiently:
- For nodes with up to 32 uses, IndexMap remains null and findRef scans
UseMap backwards from the end, taking advantage of temporal locality
since recently added references are typically dropped or moved first.
- Once UseMap exceeds 32 entries, IndexMap is allocated to provide O(1)
lookups in findRef, and is reset once UseMap shrinks back to 16 or
fewer entries so it cannot thrash.
- In dropRef, the removed entry is overwritten with UseMap.back() and
the back is popped, keeping removals O(1) from any position while
maintaining a deterministic order.
Benchmark results:
Base Test
File Max RSS Max RSS Delta Wall Time
-----------------------------------------------------------------
SLPVectorizer.ii 1343 MB 1207 MB -10.14% 43.48s -> 42.80s
SemaOpenMP.ii 1358 MB 1196 MB -11.95% 34.42s -> 33.71s
X86ISelLowering.ii 881 MB 838 MB -4.85% 26.23s -> 26.03s
-----------------------------------------------------------------
Total 3582 MB 3241 MB -9.52% 104.13s -> 102.53s
Geometric Mean -9.03% -1.47%
- Compilation flags: -O3 -g -fdebug-info-for-profiling -flto=thin
- Max RSS & Wall Time: average of 3 runs after 1 warmup run.
Thanks to Fangrui Song for exempting ConstantData from metadata use
tracking (#223303), suggesting the swap-and-pop removal in dropRef, and
providing the LargeUseList unit test (#227186).
Assisted-by: Antigravity
Commit: 3bf8c1ae4bcf1feea80ba9461a361b66817a0dce
https://github.com/llvm/llvm-project/commit/3bf8c1ae4bcf1feea80ba9461a361b66817a0dce
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/ValueMap.h
Log Message:
-----------
[IR] Remove ValueMap::{is,get}PointerIntoBucketsArray (NFC) (#227496)
Both functions were introduced on October 22, 2009 in commit
4546d3123506be9fad18fa1132e5ea45145b2ffe without any callers.
Assisted-by: Antigravity
Commit: 40e834bb7054cacfff0c68c0b76c0a4dba7f2ab8
https://github.com/llvm/llvm-project/commit/40e834bb7054cacfff0c68c0b76c0a4dba7f2ab8
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoY.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvy/rvy-invalid-operands.mir
M llvm/test/MC/RISCV/rvy-build-attributes.s
M llvm/test/MC/RISCV/rvy-invalid-attributes.s
M llvm/test/MC/RISCV/rvy/rvy-basic-invalid.s
M llvm/test/MC/RISCV/rvy/rvy-basic.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISC-V][MC][RVY] Update to v0.9.10 specification (#227554)
Update the experimental 'Y' base ISA to 0.9.10 (0p910) and sync the base
RVY instruction encodings and mnemonics with the v0.9.10 draft
specification (https://github.com/riscv/riscv-cheri/releases/tag/v0.9.10-ar20260929):
* Replace `SRLIY` and the `yhir` alias with a dedicated 2-operand `YHIR`
instruction (`funct7 = 0b1111010`, `funct5 = 0b00111`), and remove the
now-unused `uimm7_eq_xlen` operand support.
* Drop `PACKY` in favor of `YHIW` (`rd = YGPR`, `rs1 = GPR`, `rs2 = GPR`).
* Rename `YSUNSEAL` to `YUNSEALS` and add `YSEALE` (`funct7 = 0b0010111`,
`rs1 = x0`).
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227554
Commit: 58e77af2bbdd95632a03787737627dda52e9cf07
https://github.com/llvm/llvm-project/commit/58e77af2bbdd95632a03787737627dda52e9cf07
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Diagnose destructors called on string pointers (#227283)
They are immutable, so diagnose accordingly.
Commit: e0f3c0a384c05cdb0685a5dad437a423e399cfb9
https://github.com/llvm/llvm-project/commit/e0f3c0a384c05cdb0685a5dad437a423e399cfb9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
Log Message:
-----------
[clang][bytecode][NFC] Simplify Descriptor::getLocation() (#227266)
`DeclOrExpr` already has a function for this, so just forward a call to
it.
Commit: ded546ad82656ce6605ee2f2aa60c78dec70d95f
https://github.com/llvm/llvm-project/commit/ded546ad82656ce6605ee2f2aa60c78dec70d95f
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Transforms/InferAddressSpaces/NVPTX/address-space-join.ll
Log Message:
-----------
[InferAddressSpaces] Insert fixup casts before cloned user during rewriting phase (#226987)
After reworking `operandWithNewAddressSpaceOrCreatePoison` in #225161 in
order to handle joins of different address spaces in the lattice to a
more specific address space, ensure that casts created during the fix-up
phase of poison uses are placed before the cloned user, as the latter
has already been inserted above the original instruction in
`cloneValueWithNewAddressSpace`.
Commit: 65e323a85f0d2e63a5f6c97e8ce2bd8e989aacf4
https://github.com/llvm/llvm-project/commit/65e323a85f0d2e63a5f6c97e8ce2bd8e989aacf4
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/diag-disabled-vectorization-msgs.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[LV][NFC] Fix erroneous debug message emitted during legality checks (#226162)
We erroneously state that we can vectorise the loop, since
LoopVectorizationLegality is no longer the oracle in matters of
legality. Many of the legality checks have been moved to vplan
construction, such as when attempting to vectorise some early exit
loops. It's very confusing to see debug output that says:
We can vectorize this loop.
Not vectorising the loop because of ...
I've updated the debug message to be more ambiguous.
After this patch I intend to follow up with another one to fix the
equally incorrect
LV: Vectorization is possible but not beneficial.
debug message, which assumes the reason for choosing a scalar VF is
because of the cost model. However, for some early exit loops we simply
failed to create any vector vplans!
Commit: 18ef19fb83d9d3fa369481bb0537be4fdf5552fb
https://github.com/llvm/llvm-project/commit/18ef19fb83d9d3fa369481bb0537be4fdf5552fb
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-unfold-load-eflags-liveintervals.mir
Log Message:
-----------
[TwoAddressInstruction] Drop physreg ranges after unfolding a load (#227538)
Since #225174 LiveIntervals is computed before TwoAddressInstructions.
When tryInstructionTransform() unfolds a load, e.g. OR64rm into
MOV64rm + OR64rr, it calls repairIntervalsInRange(). That function
only repairs virtual registers. If the regunit range of a physreg def
of the original instruction ($eflags here) was already cached, it
keeps a value defined at the slot of the erased instruction.
The machine verifier then reports "No instruction at VNInfo def index"
and later passes hit `LR.verify()` in LiveIntervals::HMEditor. This
broke the MSan bootstrap build of clang/lib/Sema/SemaAPINotes.cpp.
Drop the cached regunit ranges for the physregs of the unfolded
instruction so they are recomputed on demand. MachineBasicBlock.cpp
already does the same after repairIntervalsInRange().
Assisted-by: Gemini
Commit: e3bae380eb23076b081ad7db1e8f6a36c5261eb3
https://github.com/llvm/llvm-project/commit/e3bae380eb23076b081ad7db1e8f6a36c5261eb3
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
Log Message:
-----------
[mlir][affine] Fix crash when rolling back vectorization of reduction loops (#226912)
Reductions introduce operations outside of the created loop, that are
users of said loop. When rolling back (e.g. when an op inside the loop
being vectorized is not vectorizable), only the created loop is deleted,
which leads to the error: “operation destroyed but still has uses”.
This PR fixes this by recursively deleting users of the newly created
loop before removing it when rolling back.
Commit: cf28b9f7fa4c4dec8f209b7059586df6234c7a25
https://github.com/llvm/llvm-project/commit/cf28b9f7fa4c4dec8f209b7059586df6234c7a25
Author: Szymon Sobieszek <71835447+Kavu849 at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/strlen.ll
Log Message:
-----------
[LoopIdiom] Fix 64-to-32-bit stride truncation in strlen idiom recognition (#227406)
This patch fixes a silent miscompile where loops with massive strides
(e.g., 0x100000001 or 0x2000000000000001) were incorrectly optimized
into strlen calls.
Previously, getZExtValue() was truncated to a 32-bit unsigned integer,
causing some massive strides to appear as a stride of 1. Furthermore,
the OpWidth check relied on multiplication (StepSize * 8), which is
vulnerable to 64-bit integer overflow.
By upgrading StepSize to uint64_t and using division (OpWidth / 8), we
ensure the optimization is safely aborted for massive strides without
risking arithmetic overflow.
Commit: 7778bb2082b8e64528b691f1b7a7016e8bd64860
https://github.com/llvm/llvm-project/commit/7778bb2082b8e64528b691f1b7a7016e8bd64860
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR][ADT] Update ValueHandle PrevPtr via move constructor (NFC) (#227484)
In LLVMContextImpl::ValueHandles, the first ValueHandleBase node's
PrevPtr points directly to the head pointer inside the DenseMap
bucket, so relocating a bucket invalidates that PrevPtr.
This patch wraps the head pointer in ValueHandleHead, whose move
constructor updates Head->setPrevPtr(&Head) whenever a bucket is
relocated by grow() or erase(). Specifically, this allows us to:
- Simplify ValueHandleBase::AddToUseList by removing the manual
reallocation check and linear fixup loop after insertion.
- Use the standard one-argument Handles.erase(getValPtr()) in
ValueHandleBase::RemoveFromUseList instead of the private callback
erase, addressing the TODO there.
- Remove friend class ValueHandleBase, the two-argument callback
erase(Key, OnMoved), and the OnMoved callback parameter on
eraseFromFilledBucket from DenseMap.h.
Assisted-by: Antigravity
Commit: 7c9ae52cfdce9b7fc6f06b1a5f3a54f9a2f2d0ec
https://github.com/llvm/llvm-project/commit/7c9ae52cfdce9b7fc6f06b1a5f3a54f9a2f2d0ec
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-mixed-early-clobber-tied-defs.ll
A llvm/test/CodeGen/X86/twoaddr-mixed-early-clobber-tied-defs.mir
Log Message:
-----------
TwoAddressInstructions: Use the per-operand early clobber flag for tied copies (#227581)
The live interval update for the copy inserted for a tied operand ended
the new segment at getRegSlot(IsEarlyClobber), using a flag computed
once per instruction for any tied pairs. Use the flag
of the def actually being processed.
With an inline asm mixing "=&r" and "=r" outputs tied to the same input,
the copy for the plain def ended at the early clobber slot, leaving a
hole before its own def. That splits the live range into multiple
connected components and asserts in updatePressureDiffs.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a5a1b5834ad33167aa119091a96931d526c9c962
https://github.com/llvm/llvm-project/commit/a5a1b5834ad33167aa119091a96931d526c9c962
Author: Santanu Das <santdas at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-ptrchase.ll
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-tied-operands-hvx.ll
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-tied-operands.ll
Log Message:
-----------
[Hexagon] Fix hwloop trip count for post-increment load induction (#225411)
A pointer-chasing loop whose exit test is a null check was miscompiled
into a hardware loop with a bogus trip count.
A post-increment load defines two registers:
%3, %11 = L2_loadri_pi %1(tied-def 1), 4
%11 is the incremented address (tied to the base), but %3 is the value
loaded from memory, which bears no relation to the base. The helper only
checked that the base register is defined by the PHI, never that the
register feeding the PHI back from the latch is the incremented address.
Here the PHI is fed by %3 -- so the loop was treated as bumping its
induction variable by a constant 4 per iteration, and getLoopTripCount
derived a count from the numeric value of head.
Require that the register feeding the PHI is the post-incremented
address, located through the base operand's tie rather than a fixed
operand index: the tied def is operand 1 for loads (L2_loadri_pi,
V6_vL32b_pi) but operand 0 for stores (S2_storeri_pi, V6_vS32b_pi), and
predicated forms shift both positions.
---------
Co-authored-by: quic-santdas <quic_santdas at qti.qualcomm.com>
Commit: 8a4f05540f342752d937813ed16220bb74af66b4
https://github.com/llvm/llvm-project/commit/8a4f05540f342752d937813ed16220bb74af66b4
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
A llvm/test/Transforms/LoopLoadElim/wrap-predicate-from-dependence-analysis.ll
Log Message:
-----------
[LAA] Honor no-wrap predicates already in PSE in isNoWrap (#226430)
getPtrStride checks pointer wrapping assuming PSE's predicate holds.
Before #203787, isNoWrap used `PSE.hasNoOverflow` to see NUSW flags
recorded by `setNoOverflow`. Removing that bookkeeping made queries that
cannot add predicates accept only static no-wrap facts, ignoring NUSW
predicates LAA already added for the pointer.
LoopLoadElimination's `isDependenceDistanceOfOne` makes these queries
for each forwarding candidate's load and store. A pointer needing a wrap
predicate (e.g. a non-inbounds GEP where null is valid) is rejected with
"Pointer may wrap", although dependence analysis already added the
predicate and LLE versions the loop on all PSE predicates. Recurrences
such as `A[i] -= B[i-1] * A[i-1]` then reload `A[i-1]` each iteration
instead of reusing the stored value.
When isNoWrap cannot add predicates, check whether PSE's predicate
implies the AddRec's NUSW wrap predicate. Callers allowed to add
predicates are unchanged: they collect it, and adding an implied
predicate to PSE is a no-op. The change introduces no new predicates.
This also restores the pre-#203787 check order in
`retry-runtime-checks-after-dependence-analysis.ll`. When rebuilding
checks after dependence analysis, the first pass again accepts pointers
such as `%gep.b` with previously added NUSW predicates, rather than
deferring them to the second pass.
Motivation: For `A[i] -= B[i-1] * A[i-1]; C[i] = ...` with may-aliasing
`C` preventing GVN forwarding (addrspace(1), `opt -O3`, n=256), losing
forwarding makes the loop 2.4x slower on Zen 5: LLVM 22 takes 318 ns,
main 780 ns, and the patch 320 ns. Compile time is unchanged for a
synthetic loop with 512 accesses needing wrap predicates (±1%
instructions in `print<access-info>`).
Assisted by: Codex 5.5, Astra 6
Part of a series of patches developed while migrating Julia to LLVM 23
Commit: 4076fac4836f46de9a9a0caff669ec20c698d150
https://github.com/llvm/llvm-project/commit/4076fac4836f46de9a9a0caff669ec20c698d150
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
docs: Remove Johannes' office hours (#227350)
Commit: ed327377a67f812a13ca783ffab67efff11a80fb
https://github.com/llvm/llvm-project/commit/ed327377a67f812a13ca783ffab67efff11a80fb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Move past-end check into CheckFinalLoad (#227181)
It makes more sense there. Also remove the one of for non-const
pointers, since that one isn't needed anymore
Commit: d80ae72a1cb9858eed5b01cd12d7707a2e2b6670
https://github.com/llvm/llvm-project/commit/d80ae72a1cb9858eed5b01cd12d7707a2e2b6670
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/builtin-memcpy.c
M clang/test/CIR/CodeGenCUDA/uniform-work-group-size.cu
M clang/test/CIR/CodeGenHIP/atomic-classify.hip
M clang/test/CIR/CodeGenHIP/builtin-bool-result.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
M clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
Log Message:
-----------
[CIR][NFC][AMDGPU] Use new triple in CIR tests (#226972)
Commit: 73a0b12b8ee34b9d2858cf6ca60a6154145a52ca
https://github.com/llvm/llvm-project/commit/73a0b12b8ee34b9d2858cf6ca60a6154145a52ca
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
A llvm/test/Transforms/CodeGenPrepare/X86/store-extract-division-ub.ll
Log Message:
-----------
[CodeGenPrepare] don't promote sdiv/srem by -1 (#218737)
`store-extract` promotion was widening sdiv/srem to the vector type
without checking if thats safe or not... and INT_MIN lane / -1 is UB.
skip sdiv/srem by -1 in `shouldPromote`, rest still promotes fine.
Fixes #218570
Commit: 87e5a59ebde0a2517cbf8f816582779be6194fe1
https://github.com/llvm/llvm-project/commit/87e5a59ebde0a2517cbf8f816582779be6194fe1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Log Message:
-----------
TwoAddressInstructions: Use a range loop to move the copy chain (#227296)
Cleanup some messy iterator work.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 0170d3c340a2e69c8a000f32f9f8c368e6ba13b0
https://github.com/llvm/llvm-project/commit/0170d3c340a2e69c8a000f32f9f8c368e6ba13b0
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg-blockaddress.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg1.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg3-phis.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg4-multiple-duplicate-cfg-updates.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg5-del-phis-for-dead-block.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg6-dead-self-loop.ll
M llvm/test/Feature/load_extension.ll
M llvm/test/lit.cfg.py
M polly/docs/ReleaseNotes.rst
M polly/lib/Support/RegisterPasses.cpp
M polly/test/lit.site.cfg.in
Log Message:
-----------
[Plugins] Address review comments on -plugin-arg (#227545)
Address comments after #226773:
* Accept an empty argument again (-plugin-arg=<plugin>,). Tested by
tut-simplify-cfg1.ll
* Reject an argument for a name shared by several plugins.
* Remove parsePassPluginCommandLine. Polly and the Bye example, which
keep cl::opt, call cl::ParseCommandLineOptions from ParseArguments.
* Drop cl::opt from the IRTransforms example: ParseArguments takes v1,
v2 or v3.
* Test -plugin-arg diagnostics.
LLM-aided
Commit: 6a7ac2035ab788519b8cc9880972d6fa789d018f
https://github.com/llvm/llvm-project/commit/6a7ac2035ab788519b8cc9880972d6fa789d018f
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A mlir/test/Pass/remark-final-pass-failure.mlir
R mlir/test/Pass/remark-final-verify-diagnostics.mlir
Log Message:
-----------
[mlir] Test the final-policy remark on a failing pipeline without verification (#227276)
#226258 changed mlir-opt to finalize the remark policy on every exit from
`performActions`, including when the pass pipeline fails. Before that, a
failing pipeline returned early, and remarks deferred by
`--remark-policy=final` were only emitted later from `~MLIRContext`. By then
the `SourceMgrDiagnosticHandler` had been destroyed, so the remarks were
silently dropped.
The test added in #226258, `remark-final-verify-diagnostics.mlir`, does not
catch this regression: it runs with `--verify-diagnostics`, and before #226258
the verifier's callback was never unregistered from the context. That leaked
callback still received the remark emitted from `~MLIRContext`, so the test
passed with or without the fix.
Replace it with `remark-final-pass-failure.mlir`, which runs the same failing
pipeline without `--verify-diagnostics` and checks the printed remark with
FileCheck. This test fails before #226258 and passes after it.
Assisted-by: Claude Code (Claude Opus 5.5)
Commit: c9df11991d971c1bf16e58fd4b5350c0865ba616
https://github.com/llvm/llvm-project/commit/c9df11991d971c1bf16e58fd4b5350c0865ba616
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
R llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
R llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
A llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use.mir
M llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
AMDGPU: Use LiveIntervals instead of LiveVariables in SIOptimizeVGPRLiveRange (#227252)
Drop the LiveVariables dependency and only use LiveIntervals.
The legacy pass manager cannot schedule a pass requiring both
LiveIntervals and LiveVariables here, since LiveVariables (and its
UnreachableMachineBlockElim dependency) invalidates the LiveIntervals
just computed for it. In the AMDGPU pipeline, anchor the pass after
MachineLoopInfo instead of PHIElimination so LiveIntervals is computed
before PHIElimination, which is required anyway: the pass needs SSA and
introduces new PHIs. Preserving SlotIndexes keeps the transitive last-user
chain intact.
Since LiveVariables is no longer maintained past this point, PHIElimination
now splits critical edges using LiveIntervals, which accounts for most
of the test churn: LiveIntervalCalc drops kill flags and adds dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d49626c811c304c047e028a80cedc0d377f49dfb
https://github.com/llvm/llvm-project/commit/d49626c811c304c047e028a80cedc0d377f49dfb
Author: Milica Kovacevic <mkovacevic at baylibre.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
Log Message:
-----------
[ORC] Use __unw_add_dynamic_eh_frame_section/__unw_remove_dynamic_eh_ frame_section in RegisterEHFrames.cpp (#212260)
The ORC runtime already uses __unw_add_dynamic_eh_frame_section to avoid
'FDE is really a CIE' errors on libunwind. Apply the same approach to
the non-ORC-runtime EH frame registration path.
Solves issue: https://github.com/llvm/llvm-project/issues/55681
Commit: e0e92856cddf40e96b609ae3c086a095fb2a67ba
https://github.com/llvm/llvm-project/commit/e0e92856cddf40e96b609ae3c086a095fb2a67ba
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
Log Message:
-----------
[orc-rt] Install missing public headers. (#227578)
These headers were accidentally left out of the installed header list in
previous commits.
Commit: 4da9e8181bade846548967361835e55503383d15
https://github.com/llvm/llvm-project/commit/4da9e8181bade846548967361835e55503383d15
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/Sparc/SparcSchedule.td
Log Message:
-----------
[SPARC] Refine instruction itinerary classes (#225328)
Split up itinerary classes to better match the LEON5 scheduling
information.
Changes:
- Split integer and floating-point loads into IIC_ld, IIC_fpu_ld, and
IIC_fpu_ldd.
- Split floating-point stores into IIC_fpu_st and IIC_fpu_std.
- Separate direct calls (IIC_call) from jumps and JMPLs (IIC_jmp).
- Rename IIC_ldstub to IIC_atomic and use it for LDSTUB, SWAP, and CASA.
- Add distinct integer-branch and floating-point-branch classes.
- Add a dedicated floating-point compare class.
Commit: 36e9bff64557a2f4b4bf537c8327fec2a1d5b0cf
https://github.com/llvm/llvm-project/commit/36e9bff64557a2f4b4bf537c8327fec2a1d5b0cf
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Demarcate VPIs that gen scalars (NFC) (#196207)
Certain VPInstruction opcodes generate single-scalars, others generate
vectors, and there are yet others that could generate either. Make this
clear in the code, by factoring the exact condition and asserting on
each opcode. This also makes it clear that the handling for
Logical(And|Or) is incomplete, and lays the groundwork for further
extending the opcodes handles by VPInstruction.
Commit: b5d50687b1f2991200b9985a78e5841717f8f108
https://github.com/llvm/llvm-project/commit/b5d50687b1f2991200b9985a78e5841717f8f108
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/tools/obj2yaml/obj2yaml.cpp
Log Message:
-----------
[obj2yaml] Return from main on error instead of calling exit (#227594)
The `Fatal` lambda introduced by #224965 calls exit(1) while heap
objects are live. On the "failed to open" path the pointer to the
heap-allocated ToolOutputFile is dead, so LeakSanitizer reports a leak.
PR #227444 worked around this by defining `__lsan_is_turned_off`.
Properly fix the lsan failure by making the error callback record the
failure and return 1 from main.
LLM-aided
Commit: 4039ff22ef1894220e6f3f04100c695e0b9d9a1e
https://github.com/llvm/llvm-project/commit/4039ff22ef1894220e6f3f04100c695e0b9d9a1e
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
Log Message:
-----------
[AMDGPU][NFC] Use CHECK-NEXT for hidden_dynamic_lds_size in hsa-metadata-hidden-args-v5.ll (#227556)
NFC test change to align with rocm amd-staging.
Commit: d6048f5ff3bdd934508a585a92ba010834981b7c
https://github.com/llvm/llvm-project/commit/d6048f5ff3bdd934508a585a92ba010834981b7c
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/test/Dialect/SCF/one-shot-bufferize-analysis.mlir
Log Message:
-----------
[mlir][bufferization] Skip parallel analysis without parallel regions (#227202)
One-Shot Bufferize currently runs parallel-region conflict analysis even
when the analyzed IR has no parallel regions. This can repeatedly walk
long reverse use-def chains without being able to find a parallel-region
conflict.
Commit: a187057dfe16b215dc44c4be7937ceccebe9882a
https://github.com/llvm/llvm-project/commit/a187057dfe16b215dc44c4be7937ceccebe9882a
Author: Julien Villette <julien.villette at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64][NeoverseV1/V2] Fix ASIMD FP convert and round scheduling (#224046)
Measured on Neoverse V1 and V2 hardware with unrolled loops of
independent instances, using perf inst_spec/op_spec counters for the
micro-op counts. Both cores measure identically on every test below.
| Instruction | uop | Latency | RThroughput | was |
|----------------------|-----|---------|-------------|-----------|
| fcvtas h0, h1 | 1 | 3 | 0.50 | 4/6/1.00 |
| fcvtas s0, s1 | 1 | 3 | 0.50 | 2/4/1.00 |
| fcvtzs w0, s1, #1 | 1 | 3 | 1.00 | 1/3/0.50 |
| fcvtas v0.4s, v1.4s | 1 | 4 | 1.00 | 2 uops |
| fcvtas v0.8h, v1.8h | 1 | 6 | 2.00 | 4/6/1.00 |
| frinta v0.8h, v1.8h | 1 | 6 | 2.00 | 4/6/1.00 |
| bfcvtn v0.4h, v0.4s | 1 | 4 | 1.00 | 1/4/0.50 |
Scalar H and S conversions were grouped with wider vector forms; they
measure the same as the D-form F32 row, so they move there.
Fixed-point conversions to a general register were missed by the InstRW
regex on V1, which now covers the "ri" suffix as V2 already did.
On V2 the reworked classes are new definitions, since the originals are
shared with the SVE and reciprocal-estimate rules; on V1 they had no
other user and are updated in place.
Commit: 420f6d1b1f277b8861ef7454164b5a940d1bcf24
https://github.com/llvm/llvm-project/commit/420f6d1b1f277b8861ef7454164b5a940d1bcf24
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/__string/extern_template_lists.h
M libcxx/include/string
Log Message:
-----------
[libc++] Optimize basic_string::operator= (#224535)
This improves a few things in the long string code path. Specifically:
- The null terminator is copied from the assigned-from string instead of
setting it manually
- various branches have been removed via `__assume`s that are known
- `memmove` is tail-called by updating the pointer and size of the
string first and not returning `this` anymore
- the allocating path is outlined into a separate function, which
basically amounts to manual shrink-wrapping (this should be removed once
LLVM is able to do this on its own)
Commit: cd94d181b2e39bfb0720fd383f17a2f0eefed3d0
https://github.com/llvm/llvm-project/commit/cd94d181b2e39bfb0720fd383f17a2f0eefed3d0
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/Targets/AMDGPU.cpp
A llvm/unittests/ABI/AMDGPUTargetInfoTest.cpp
M llvm/unittests/ABI/CMakeLists.txt
Log Message:
-----------
[ABI][AMDGPU] Add AMDGPU target ABI classifier to the LLVM ABI library (#220177)
**Summary:**
- Port the classic CodeGen AMDGPUABIInfo call-convention classifier to
the new language-agnostic LLVM ABI library.
**Changes:**
- LLVM ABI library. AMDGPUTargetInfo implements return, kernel-argument,
and regular-argument classification.
- Unit tests covering the classifier's argument/return branches.
Relates to issue: https://github.com/llvm/llvm-project/issues/220471
Pre-requisite PRs: #224994, #225005, #225009
Assisted by: Claude Opus 4.8
Commit: 52b80c07ed558a459e7b230b7f6cd213dcd11760
https://github.com/llvm/llvm-project/commit/52b80c07ed558a459e7b230b7f6cd213dcd11760
Author: purnima shrivastava <purnimashrivastava05 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/test/Dialect/Affine/loop-fusion.mlir
Log Message:
-----------
[mlir][affine] Handle generic memory ops in loop fusion dependence analysis (#224657)
`affine-loop-fusion` collects generic memory-effecting operations such
as `vector.transfer_read`, but `mayDependence()` later relied on
`getMemRef()`, which only handled affine/memref loads and stores and
could crash on other memory operations.
This change uses the existing memory-effect handling to check memref
accesses generically and adds a reduced regression test.
Tests:
* `build/bin/llvm-lit mlir/test/Dialect/Affine -v`
* 73/73 tests passed
Fixes #224224.
AI Tool Disclosure:
AI tools were used to assist the code base exploration and understanding
the code design. I independently reviewed every line of the final
changes and validated the implementation and tests.
Co-authored-by: Purnima Shrivastava <purnimashrivastava05 at .com>
Commit: 2c298348bfe15a69788e83ea64831873dcfd3c58
https://github.com/llvm/llvm-project/commit/2c298348bfe15a69788e83ea64831873dcfd3c58
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
Log Message:
-----------
[mlir][vector] Use `ShapeCastOp` in `castAwayContractionLeadingOneDim` (#226524)
Use `ShapeCastOp`, instead of `ExtractOp` and `BroadcastOp`, to drop the
leading unit dimension in `castAwayContractionLeadingOneDim`. This PR
continues the work started in:
* #208752, #210902, #211777, #219499, #219494
Essentially, this implements the approach already agreed on in the
previous PRs. See also #196206, which originally implemented this change
and was subsequently reverted in #199546.
`TransposeOp`s are left intact in light of the ongoing discussion about
whether folding `TransposeOp` into `ShapeCastOp` is valid, see e.g.
https://github.com/llvm/llvm-project/pull/219611.
Note that in the tests, `TransposeOp`s are nevertheless replaced with
`ShapeCastOp`s. This is due to the existing `TransposeOp` folders.
Commit: 3390613ccf0fbbb40026dcbabb36fce444f79480
https://github.com/llvm/llvm-project/commit/3390613ccf0fbbb40026dcbabb36fce444f79480
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
Log Message:
-----------
AMDGPU: Update test introduced by #221821 after #227252 (#227621)
Fix midair collision test failure.
Commit: b1e1a2be9e26f6e7343708ae8be22bd54807c040
https://github.com/llvm/llvm-project/commit/b1e1a2be9e26f6e7343708ae8be22bd54807c040
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[llvm] Pass `/Brepro` via `add_link_options()` (#227416)
In modern CMake, editing `CMAKE_` variables directly is discouraged.
`/Brepro` should be passed via `add_link_options()` with a `LINKER:`
prefix to be portable.
This fixes issues for downstream consumers like Swift whose linker
driver needs the linker arguments to be prefixed.
---------
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Commit: 4c4b4b93c9ac359acc3782a92fc7efe204f218c5
https://github.com/llvm/llvm-project/commit/4c4b4b93c9ac359acc3782a92fc7efe204f218c5
Author: Lucian Popescu <lucian.popescu187 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/support/test_iterators.h
Log Message:
-----------
[libc++] Fix rvalue_iterator arithmetic operators in tests (#220686)
`rvalue_iterator` holds an `it_` member, not an `it`. This issue was
found while force-instantiating the template members. In current tests
the problematic code seems to be unreachable.
Commit: 5b56cd69ef57d97f16d2bab7c0a1406debe05ec8
https://github.com/llvm/llvm-project/commit/5b56cd69ef57d97f16d2bab7c0a1406debe05ec8
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/MC/AArch64/retired-register-names.s
Log Message:
-----------
[AArch64] Add retired POE2 system registers to retired-register-names.s (#226945)
Add retired POE2 system registers to retired-register-names.s
Commit: 4a66966a8a523eccf7b1a3552b0f2a20124abc76
https://github.com/llvm/llvm-project/commit/4a66966a8a523eccf7b1a3552b0f2a20124abc76
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
Log Message:
-----------
[lldb][test] Fix test_listener_event_process_state (TestMultithreaded.py) on Windows on Arm (#227605)
This test expects to be sent function names by another thread. Function
names are allowed to be null, but the sending thread only sent them when
they were non-null.
On Windows on Arm, for whatever reasion, all the functions have no name
during the test. This is despite lldb being able to show them:
```
* thread #1, stop reason = breakpoint 1.1
* frame #0: 0x00007ff71d191008 inferior_program`int next(void) at inferior.cpp:6:13
frame #1: 0x00007ff71d19107c inferior_program`main at inferior.cpp:13:9
frame #2: 0x00007ff71d1cc994 inferior_program`
```
The test is not about whether we parse debug info properly, and I am not
about to dive into that anyway. So I think it's better to adapt the test
to only care that some function was found. The function's name is just a
token to say that, empty or otherwise.
Commit: 082fe79e68b81352290afcd8661874bed7e61074
https://github.com/llvm/llvm-project/commit/082fe79e68b81352290afcd8661874bed7e61074
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
A clang/test/SemaOpenCL/builtins-amdgcn-gfx13-exclusive-scan-types.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exclusive.scan.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for gfx13 exclusive scan (#226078)
Commit: 0f5654d7c77bbfb809af1b6dcb0f328374f3f83a
https://github.com/llvm/llvm-project/commit/0f5654d7c77bbfb809af1b6dcb0f328374f3f83a
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/half-convert.ll
Log Message:
-----------
[RISCV][GlobalIsel] Use Zfhmin for G_FPEXT from f16 to f32 (#227225)
fcvt.s.h is available with Zfhmin. Use the __extendhfsf2 libcall without
it.
Commit: e0a2355cb95fe055372fdb59abc7257e6c0bb969
https://github.com/llvm/llvm-project/commit/e0a2355cb95fe055372fdb59abc7257e6c0bb969
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_depends_on.cpp
M libsycl/test/basic/handler/handler_parallel_for_arg_restrictions.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
M libsycl/test/basic/handler/handler_parallel_for_runtime.cpp
M libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/index_space_classes_negative.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/no_rdc_multi_tu.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
M libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
Log Message:
-----------
[libsycl][NFC] Add licence headers to tests (#227327)
Adds file headers according to LLVM Coding guidelines.
LLVM's rules don't explicitly require or exclude the header in tests.
The C++ runtime libraries (libc++, libc++abi, libunwind, libc) add it
anyway.
The compiler and offload/openmp test suites mostly don't.
Following the footsteps of libcxx.
Assisted-by: Claude Code.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 457e5bad6d6b7012a123a9272c9deb83dc3d6c04
https://github.com/llvm/llvm-project/commit/457e5bad6d6b7012a123a9272c9deb83dc3d6c04
Author: Gurvir Dhillon <gman.dhillon at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/divceil.ll
Log Message:
-----------
[InstCombine] Use context instruction in divceil overflow check (#227158)
Divceil optimization only happens if we can prove x + y - 1 does not
overflow. Originally, a SimplifyQuery with no context instruction was
passed to checkDivCeilNUW which made it so that the optimization never
happened if the bound came from an assume. This meant that even when an
assume proved that x + y - 1 did not overflow, the optimization did not
happen.
This change passes SQ.getWithInstruction(&I) so the range of x is
computed at the add being folded, and assumes that apply there are used
when deciding whether we can fold.
Fixes #220849
AI Disclosure: I used Claude to help explain LLVM concepts while I was
trying to understand the problem. It also walked me through syntax,
helper functions that I should utilize, good test cases, and general
formatting for things like test case comments.
Commit: 4dd9d22d4f0c8da881557d5bd95ac0ce25df79f8
https://github.com/llvm/llvm-project/commit/4dd9d22d4f0c8da881557d5bd95ac0ce25df79f8
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/lib/Support/RegisterPasses.cpp
M polly/test/lit.site.cfg.in
Log Message:
-----------
[Polly] Remove non-goal TODO (#227638)
Apply post-commit review changes of #227545.
`%loadNPMPolly` is necessary to conditionally load the Polly plugin and
not having to repreat a lot of options in each regression test. It
cannot be spelled out in each individual test. Apply this change as
discussed in
https://github.com/llvm/llvm-project/pull/227545#discussion_r4142513423.
It could replaced with a tool substitution instead.
Also prefer use the default-sized `SmallVector` as by the LLVM
programmer's manual:
https://llvm.org/docs/ProgrammersManual.html#llvm-adt-smallvector-h.
Commit: 2820795b027eb68e3c3a0f1ad1ddd36aaeb8730a
https://github.com/llvm/llvm-project/commit/2820795b027eb68e3c3a0f1ad1ddd36aaeb8730a
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/elfnix_tls.mips.S
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-helper.c
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-main.c
A compiler-rt/test/orc/TestCases/Linux/mips/external-branch-stub.test
A compiler-rt/test/orc/TestCases/Linux/mips/lit.local.cfg.py
A compiler-rt/test/orc/TestCases/Linux/mips/trivial-tls.c
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_mips.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
A llvm/include/llvm/ExecutionEngine/JITLink/mips.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/COFFLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
A llvm/lib/ExecutionEngine/JITLink/ELF_mips.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/XCOFFLinkGraphBuilder.cpp
A llvm/lib/ExecutionEngine/JITLink/mips.cpp
M llvm/lib/ExecutionEngine/Orc/COFFAutoImportGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/SectCreate.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_abs16_data.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_ehframe.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_got_ordering.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_invalid_abi.yaml
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_micromips_unsupported.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_minimal.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_n64_compound_relocations.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_pc16_errors.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_pc18_aligned_base.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_r6_external_branch_stub.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_relocations.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unmatched_hi16.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unsupported_packed_relocation.yaml
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unsupported_tls.s
A llvm/test/ExecutionEngine/JITLink/Mips/lit.local.cfg
M llvm/unittests/ExecutionEngine/JITLink/AArch32ErrorTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/AArch64Tests.cpp
M llvm/unittests/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/unittests/ExecutionEngine/JITLink/COFFLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MachOLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MemoryManagerErrorTests.cpp
A llvm/unittests/ExecutionEngine/JITLink/MipsTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/StubsTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/X86_64Tests.cpp
M llvm/unittests/ExecutionEngine/Orc/LinkGraphLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/MemoryMapperTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[JITLink][Mips] Add ELF backend (#224578)
Add support for O32, N32, and N64 relocatable ELF objects in both byte
orders. Handle O32 implicit addends and HI/LO pairing, N32 relocation
groups, and N64 packed relocations. Preserve the MIPS64 ISA triple for
N32 while recording its four-byte pointer ABI in LinkGraph.
Implement absolute, PC-relative, GP/GOT, and compound fixups, GOT-backed
$t9 call stubs, and EH-frame support. Use MIPS-specific GOT keys for
target, addend, and exact/page entries, and collect GP-relative content
into one ordered region. Support standard MIPS ISAs, including release-6
stubs.
Integrate GD/LD TLS with ELFNixPlatform and add an assembly resolver
that reads the thread pointer with rdhwr before calling the existing C
implementation. Honor explicit MIPS relocation-model requests while
retaining the static default. JITLink remains opt-in and RuntimeDyld
remains the default.
Add focused relocation, ABI, GOT/stub, EH-frame, and TLS tests.
Assisted-by: chatgpt-5.6-sol
Commit: d6fc9961eb4e33e46ac4ab17b7bb1f87eacd96c4
https://github.com/llvm/llvm-project/commit/d6fc9961eb4e33e46ac4ab17b7bb1f87eacd96c4
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
Log Message:
-----------
[lldb] Skip minidump reload test on unsupported architectures (#227634)
`TestMinidumpReloadCrash.py` runs `process save-core
--plugin-name=minidump` on any architecture, so it fails on 32-bit arm:
```
error: failed to save core file for process to '.../process.core':
architecture arm not supported.
```
`ArchThreadContexts::prepareRegisterContext` in
`MinidumpFileBuilder.cpp`
builds a thread context for x86_64 and aarch64 only, so `AddThreadList`
rejects any other architecture. Gate the test like the other minidump
save-core tests.
Commit: 67f26e15725a56f302737c576e3f6f52a97cc4ac
https://github.com/llvm/llvm-project/commit/67f26e15725a56f302737c576e3f6f52a97cc4ac
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Restore dropped EXEC/SCC defs on SI_KILL_F32_COND_IMM (#227604)
These pseudos may clobber scc, so they need the def on the instruction
definition. c16f776028dd added a let block over the defm, overriding the
[EXEC, SCC] defs in the base PseudoInstKill class.
With the defs gone, selection was free to leave a compare result in SCC
across the kill. #134718 then marked SCC live-in to the split block to
satisfy the verifier, which can probably cleaned up. The result is
visible in skip-if-dead.ll: in scc_use_after_kill_inst the s_cbranch_scc0 after
the kill consumed the exec update's SCC instead of the s_cmp_lg_u32 it was
selected for.
Pass the extra defs as a multiclass parameter so an override cannot drop
the mandatory ones again. Selection now sinks the compare past the kill,
so SCC is never live across it and the dead flags from a3cf6f45fb68 are
correct as written.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: e9ec9b53a070aa0548ffe98e3f7142a929ca134c
https://github.com/llvm/llvm-project/commit/e9ec9b53a070aa0548ffe98e3f7142a929ca134c
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
Log Message:
-----------
[MLIR][Vector] Fix typo from #226524 (#227642)
Commit: 0dba1ee8ed09517eb397bdd48dd28e253b3cc117
https://github.com/llvm/llvm-project/commit/0dba1ee8ed09517eb397bdd48dd28e253b3cc117
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/docs/ReleaseNotes.rst
Log Message:
-----------
[Polly] Remove previous release's ReleaseNotes (#227644)
Only include changes after the 23.x release:
https://github.com/llvm/llvm-project/blob/release/23.x/polly/docs/ReleaseNotes.rst
Commit: 5f376e4dc0504c30aeccc5997f72455bc620b0de
https://github.com/llvm/llvm-project/commit/5f376e4dc0504c30aeccc5997f72455bc620b0de
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Target/ThreadPlan.cpp
M lldb/test/API/functionalities/thread/step_until/TestStepUntilAPI.py
Log Message:
-----------
[lldb] Share the address lookup of thread until and StepOverUntil (#226978)
`thread until` and `SBThread::StepOverUntil` turned their targets into
addresses using different code. This commit introduces a helper function
`GetStepUntilAddresses` to unify behavior and the error message.
It resolves lines as `thread until` did: a line without line table
entries resolves to the nearest following line with entries. For
StepOverUntil, a line that is only the call site of an inlined function
now resolves that way too.
The wording of errors is that of `thread until`.
Commit: d9b12f5c63ff211229a1809a6878c32fc166c14a
https://github.com/llvm/llvm-project/commit/d9b12f5c63ff211229a1809a6878c32fc166c14a
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
Log Message:
-----------
[clangd] Extract to Function: mark unmodified captured parameters const
Every captured variable was always passed by non-const reference, even when the extracted code never modifies it, resulting in misleading function signatures.
Determine, for each captured variable, whether it's ever (possibly) mutated within the extraction zone, and add `const` to the parameter's type when it isn't. Still passed by reference either way, to avoid a copy.
The check is folded directly into the existing zone traversal (`captureZoneInfo`'s `ExtractionZoneVisitor`), so its cost stays proportional to the size of the code being extracted. Direct mutations (assignment, increment/decrement, non-const method calls, explicit casts to non-const reference, non-const-reference call arguments, ...) are recognized precisely from each occurrence's immediate syntactic context. Anything that aliases a captured variable (a reference bound to it, its address taken, capture by reference in a lambda, a forwarding-reference call argument, a non-const-ref range-for loop variable) is conservatively treated as a possible mutation, without tracing whether the alias itself is later mutated -- trading a little precision in alias-heavy code for a simple, linear-cost check.
Array-typed captures are never made const, since array-to-pointer decay and array-element mutation have enough edge cases that it wasn't worth special-casing for a rare pattern.
Assisted-by: Claude
Commit: 5b11db216d0484ab02d367604937f002cfb4f33a
https://github.com/llvm/llvm-project/commit/5b11db216d0484ab02d367604937f002cfb4f33a
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[RISCV][P-ext] Support Packed Widening Unzip (#227211)
Commit: 43bd07b665ec5496750fe12011af5f9d317b22ab
https://github.com/llvm/llvm-project/commit/43bd07b665ec5496750fe12011af5f9d317b22ab
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A lldb/include/lldb/Host/windows/PathUtils.h
M lldb/source/Host/windows/FileSystem.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/windows/PathUtilsTest.cpp
Log Message:
-----------
[lldb][Windows] Strip the extended-length prefix from host and process paths (#227373)
This patch introduces a helper function to strip the extended-length
path prefix from windows paths.
Commit: b63ea1c16751bf205d43ecb4f9a2c010c0a4daa6
https://github.com/llvm/llvm-project/commit/b63ea1c16751bf205d43ecb4f9a2c010c0a4daa6
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Lock the thread list when lldb-server accesses it (#226974)
`NativeProcessProtocol::Threads()` returns a `LockingAdaptedIterable`
that holds `m_threads_mutex` for the lifetime of the iteration, so
callers may hold references into `m_threads` across the loop body. On
Windows, this is only done when removing threads:
```
// OnCreateThread
m_threads.push_back(std::move(thread));
...
// OnExitThread
std::lock_guard<std::recursive_mutex> guard(m_threads_mutex);
llvm::erase_if(m_threads, ...);
```
`m_threads` is a `std::vector<std::unique_ptr<NativeThreadProtocol>>`.
When the debug-event thread appends and the vector reallocates, every
reference held by a concurrent iteration on the main loop dangles. This
takes lldb-server down with an access violation:
```
Exception Code: 0xC0000005
#0 NativeThreadProtocol::GetID NativeThreadProtocol.h:40
#1 GetJSONThreadsInfo GDBRemoteCommunicationServerLLGS.cpp:819
#4 Handle_jThreadsInfo
#8 GetPacketAndSendResponse
#9 DataAvailableCallback :1271
```
---
This patch takes `m_threads_mutex` everywhere `NativeProcessWindows`
touches `m_threads`: when adding threads in `OnDebuggerConnected` and
`OnCreateThread`, and when reading them in `Resume`, `StopThread`,
`UpdateThreads`, the halt path of `HandleBreakpointException`, and
`OnLoadDll`/`OnUnloadDll`.
Commit: 09a15dd428e2efee99b46f5fd36d351a2609b0f7
https://github.com/llvm/llvm-project/commit/09a15dd428e2efee99b46f5fd36d351a2609b0f7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/initializer_list.cpp
Log Message:
-----------
[clang][bytecode] Fix initializer-list edge cases (#227587)
Namely, initializer lists for primitive types and discarding the result
of an initializer list.
Commit: d4a422c6d70883ad1a29596b61a1141844402c07
https://github.com/llvm/llvm-project/commit/d4a422c6d70883ad1a29596b61a1141844402c07
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu-flat.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
Log Message:
-----------
AMDGPU: Mark SCC clobber dead when moving scalar branches to VALU (#227635)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 0f972d1311b25ce948aa373b4bd3946d8cd6fdab
https://github.com/llvm/llvm-project/commit/0f972d1311b25ce948aa373b4bd3946d8cd6fdab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap-gfx11.mir
Log Message:
-----------
AMDGPU: Mark scc clobbers in the simulated trap expansion dead (#227633)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: fa189b0b2a0324a56e41fb8908cfee1211fa4244
https://github.com/llvm/llvm-project/commit/fa189b0b2a0324a56e41fb8908cfee1211fa4244
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/matrix.c
Log Message:
-----------
[clang][bytecode] Reject matrix lvalue-to-rvalue casts in non-HLSL (#227305)
To fix test/CodeGen/AArch64/abi-classify-return-types.c.
The code path in the existing tests in
`test/SemaHLSL/Types/BuiltinMatrix/MatrixConstantExpr.hlsl` don't go
though `CheckLiteralType()`, so aren't rejected.
Commit: 957dc609b1e033f2febfa96795309a3517691988
https://github.com/llvm/llvm-project/commit/957dc609b1e033f2febfa96795309a3517691988
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
Log Message:
-----------
AMDGPU/GlobalISel: Mark SCC clobbers on control flow pseudos dead (#227636)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: df361f8543d1a2fad3f52532ccc6197fc12e3155
https://github.com/llvm/llvm-project/commit/df361f8543d1a2fad3f52532ccc6197fc12e3155
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/__numeric/saturation_arithmetic.h
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Optimize vector::emplace_back slow path (#222016)
This improves the code size of the slow path by removing some redundant
checks.
Commit: 92074f0af6c34bedaf661c46c4663979f83557bb
https://github.com/llvm/llvm-project/commit/92074f0af6c34bedaf661c46c4663979f83557bb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Pass result type to VPBuilder::createSingleScalarOp (NFC). (#227659)
This removes another use of the underlying value to get the result type
for casts. For other recipes, it just adds an additional consistency
check for now.
Commit: 2032d7a2f64eb37a24a997605f60713e2815cc7d
https://github.com/llvm/llvm-project/commit/2032d7a2f64eb37a24a997605f60713e2815cc7d
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/WritingAnLLVMPass.md
M llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
Log Message:
-----------
[llvm][test][CGPluginTest] Avoid __attribute__((constructor)) for MSVC (#227310)
`__attribute__((constructor))` isn't supported by MSVC. This patch
replaces the initializer function with a static object whose constructor
performs the pass registration.
Commit: f34ff31c6521b4fa62a24122743d1e76a6756087
https://github.com/llvm/llvm-project/commit/f34ff31c6521b4fa62a24122743d1e76a6756087
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpHelpers.h
Log Message:
-----------
[clang][bytecode] Check `diagnosing()` in `Invalid()` (#227640)
In large C TUs, it happens pretty frequently that we reject something
via `Invalid()`, but nobody ever gets to see the diagnostics we emit.
Just don't emit a diagnostic in that case.
Commit: 9e47955ee962499879f570800a97bb58629be5f9
https://github.com/llvm/llvm-project/commit/9e47955ee962499879f570800a97bb58629be5f9
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
Log Message:
-----------
[clang][bytecode] Move builtin-id check to compilation phase (#227646)
First, a builtin won't magically become constexpr between two
compilations of the same builtin id, so we're re-doing the check over
and over again for every call of a builtin function, which is
unnecessary.
Second, in the case where the builtin _isn't_ constexpr, there was a
diagnostic discrepancy between the two evaluators. We now correctly
reject the builtin call before even trying to evaluate its arguments.
Commit: e1205b15d31b0d62c343bd29cdf70c1e0f954ca2
https://github.com/llvm/llvm-project/commit/e1205b15d31b0d62c343bd29cdf70c1e0f954ca2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/float_args.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/gloal_address_pic.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/implicit_def.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/stack_args.mir
M llvm/test/CodeGen/Mips/GlobalISel/instruction-select/var_arg.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/global_address.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/implicit_def.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/stack_args.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/var_arg.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/float_args.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/global_address.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/global_address_pic.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/implicit_def.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/stack_args.mir
M llvm/test/CodeGen/Mips/GlobalISel/regbankselect/var_arg.mir
Log Message:
-----------
Mips/GlobalISel: Update MIR tests with calls to mark $ra dead (#227647)
Call lowering marks JAL/JALRPseudo implicit $ra defs dead, so update
MIR test inputs match the current IRTranslator output.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 574328ff02b42034e7ba05b69b100e5f852644b6
https://github.com/llvm/llvm-project/commit/574328ff02b42034e7ba05b69b100e5f852644b6
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Transforms/BUILD.bazel
Log Message:
-----------
[Bazel] Add ViewLikeInterface dependency to FIROpenACCTransforms (#227575)
Fixes FIROpenACCTransforms bazel layering failure introduced in commit
83826c271b0d, where ACCEraseUnusedKernelAllocations.cpp includes
mlir/Interfaces/ViewLikeInterface.h.
Commit: e1ffb858458c6280e51ab9370fa7ccc5c49c0764
https://github.com/llvm/llvm-project/commit/e1ffb858458c6280e51ab9370fa7ccc5c49c0764
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Format MLIR BUILD.bazel (#227577)
Commit: 5f7f8aec603b0f1144052c179352d3379fc8e424
https://github.com/llvm/llvm-project/commit/5f7f8aec603b0f1144052c179352d3379fc8e424
Author: LiRvs-Miria <1753531985 at qq.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.cpp
Log Message:
-----------
[lldb][Linux] Fix false watchpoint stop on single-step when hw debug regset read fails (#226880)
On aarch64 Linux, the kernel reports instruction single-step exceptions
as SIGTRAP/TRAP_HWBKPT. NativeProcessLinux::MonitorSIGTRAP handles
si_code 0, TRAP_TRACE and TRAP_HWBKPT in the same case, so every
instruction-level stop goes through GetWatchpointHitIndex().
NativeRegisterContextLinux_arm64::GetWatchpointHitIndex() reads the
hardware debug registers via PTRACE_GETREGSET(NT_ARM_HW_WATCH /
NT_ARM_HW_BREAK). On kernels where those regsets are unavailable, the
read fails with EINVAL and GetWatchpointHitIndex() returns an error
without assigning `wp_index`. NativeProcessLinux declares `wp_index`
uninitialized, logs the error, and then still tests it.
Observed behavior on Cortex-A35, OpenWrt, PREEMPT_RT 6.1.82-rt27:
- lldb-dap next/stepOver advances a single instruction (PC + 4)
- the stopped event reports description "watchpoint -1", reason
"breakpoint"
Fix in two places, following the contract that `GetWatchpointHitIndex()`
must always assign `wp_index` (`LLDB_INVALID_INDEX32` when there is no
hit or on error), as the base class default and the other
implementations already do:
- `NativeRegisterContextDBReg::GetWatchpointHitIndex()` assigns
`LLDB_INVALID_INDEX32` before any early return, so the error path leaves
a defined value. This also stops the entry `LLDB_LOG` from reading an
uninitialized `wp_index`.
- `NativeProcessLinux::MonitorSIGTRAP` checks `error.Success()` before
testing the `wp_index`/`bp_index` out-params, so an out-param is never
read after a failed call.
With these changes, when the hardware debug register read fails,
execution falls through to normal trace-stop handling; genuine
watchpoint hits behave exactly as before. On kernels without the
hw-debug regsets, hardware watchpoints/breakpoints are unavailable
anyway; software breakpoints (BRK) and single-stepping are unaffected.
AI tool usage: I used an AI assistant to help analyze the root cause and
draft this PR description. The code change and testing were done by me.
Commit: 06a09420732f5b4aecbedbee97c5d14888cf3bf0
https://github.com/llvm/llvm-project/commit/06a09420732f5b4aecbedbee97c5d14888cf3bf0
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
A lldb/test/API/functionalities/module_aliased_path/Makefile
A lldb/test/API/functionalities/module_aliased_path/TestModuleAliasedPath.py
A lldb/test/API/functionalities/module_aliased_path/foo.c
A lldb/test/API/functionalities/module_aliased_path/main.c
Log Message:
-----------
[lldb][Windows] Report module paths the way the loader spelled them (#226492)
On Windows, when creating a target, the path gets canonicalized:
Consider a subst mapping from `C:\S` to `S:\`. A target created with
`S:\a.exe` becomes `C:\S\a.exe`.
The process reports `C:\S\a.exe`, lldb adds a second module for a file
it already has, and breakpoints get a stale unresolved location next to
the real one. This is why swift-ci's Windows tests, which run from a
`T:` subst drive, fail with `2 != 1`.
This patch matches what lldb-server does on Linux: report the paths the
loader used instead.
- DLL load events use `lpImageName`, or the loader's module list on
attach.
- The executable's path comes from
`PEB::ProcessParameters->ImagePathName`.
- `ObjectFilePECOFF::ParseDependentModules` no longer resolves dependent
DLL paths with `real_path`.
- `DynamicLoaderWindowsDYLD::DidAttach` loads the process's modules even
when it does not know the target's executable path.
When the paths differ only in case, the on-disk spelling is kept.
Tested on Windows x86_64 from a subst drive. The patch fixes 37 API
tests failures.
The patch adds a regression test `functionalities/module_aliased_path`
that fails without the fix.
Requires:
- https://github.com/llvm/llvm-project/pull/227373
Commit: 2a6247359ee523096aaf28297bd2ac09c721ce66
https://github.com/llvm/llvm-project/commit/2a6247359ee523096aaf28297bd2ac09c721ce66
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Constants.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/unittests/IR/ConstantsTest.cpp
Log Message:
-----------
[IR] Deprecate ConstantExpr::getGetElementPtr() (#227601)
This deprecates various `ConstantExpr::getGetElementPtr()` overloads, in
favor of either `ConstantExpr::getPtrAdd()`, or the overload taking a
`DataLayout` (which converts GEP indices to ptradd).
Part of the ptradd migration.
Commit: 07130d0c375045e5bb369bb4d174d489c8103363
https://github.com/llvm/llvm-project/commit/07130d0c375045e5bb369bb4d174d489c8103363
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
A llvm/test/CodeGen/SPARC/getpcx-dead-o7.ll
Log Message:
-----------
Sparc: Mark GETPCX scratch %o7 def dead (#227676)
The GETPCX expansion uses %o7 only inside the emitted sequence, so the
implicit def is dead. Set the flag when the pseudo is built instead of
leaving it for later recovery.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 309d1d7efc0e6edd858aeeebda24f479de6c7ae4
https://github.com/llvm/llvm-project/commit/309d1d7efc0e6edd858aeeebda24f479de6c7ae4
Author: MishkaSimakov <msimakov661 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/SemaCXX/constant-expression-cxx11.cpp
Log Message:
-----------
[clang][NFC] Add regression test for issue 111378 (#224605)
Added a regression test for
https://github.com/llvm/llvm-project/issues/111378 in
`SemaCXX/constant-expression-cxx11.cpp`.
The bug itself was fixed in the commit
`dc28f9d087324f77db81e7192648a17ebf036125` which addressed a different
issue.
Verified that the test passes now, and that it fails on commit
`eebb50afaf27961b21847950179febdd20a98866` (previous to the bug fix
commit).
Also verified that the test fails when removing the fix from the current
version of the code.
Fixes #111378
Commit: 3541139d540e09b7c3af734b14543238b0ffaad9
https://github.com/llvm/llvm-project/commit/3541139d540e09b7c3af734b14543238b0ffaad9
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/pch.h
Log Message:
-----------
[CodeGen](NFC) Add `AliasAnalysis.h` to the CodeGen PCH (#227683)
After #226533, `MachineScheduler.h` no longer transitively includes
`AliasAnalysis.h` meaning its contents was dropped from the CodeGen PCH.
As such, a number of CPP files end up pulling it in manually and
regressing the size of TUs size significantly (see [this
comparison](https://llvm-compile-time-tracker.com/compare_clang.php?from=05a75e831476a8446d9319f56ce46851da86fb68&to=91b08a503f4f712ea8ce83dc3887f8be7738e95a&stat=instructions%3Au&sortBy=absolute-difference)).
Add `AliasAnalysis.h` to the CodeGen PCH to avoid this issue.
Thanks to @aengelke for pointing this out.
Commit: 5023684dff225519cbb714370a94a675487d5a28
https://github.com/llvm/llvm-project/commit/5023684dff225519cbb714370a94a675487d5a28
Author: Sander de Smalen <sander.desmalen at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64SMEAttributes.h
A llvm/test/CodeGen/AArch64/sme-non-lazy-save-za.ll
Log Message:
-----------
[AArch64][SME] Emit unimplemented error for non-lazy-save of ZA. (#227608)
A non-lazy-save of ZA is required when the caller has both ZA and ZT0
state and calls a function with a shared-ZA interface that only shares
ZT0.
This case is already rejected by Clang but LLVM compiles it without
generating a save of ZA.
Commit: a651871a3f3f8aef58ae03d2fa81dcc1481b633c
https://github.com/llvm/llvm-project/commit/a651871a3f3f8aef58ae03d2fa81dcc1481b633c
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/do-loop-branch-to-loop-end.f90
Log Message:
-----------
[flang] Keep a loop unstructured when its END DO is branched to from outside (#227597)
A loop whose body branching is self-contained is lowered structurally,
with the body folded into a region. Its END DO is not part of that body:
it becomes the structured loop's terminator rather than a block of its
own. A branch from outside the loop targeting a label on the END DO
therefore had nothing to land on, and lowering crashed.
Such a loop no longer qualifies for that form. A branch from within the
body is unaffected: it is CYCLE-like and lands on the boundary the
structured form already provides.
Ran against the llvm-test-suite and the reported failure in
https://lab.llvm.org/buildbot/#/builders/198/builds/15502 and all green.
Commit: 739a4306427e1be1cd02058ecb108ce1b2dc2916
https://github.com/llvm/llvm-project/commit/739a4306427e1be1cd02058ecb108ce1b2dc2916
Author: Arun Thangamani <arun.thangamani at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/X86/Transforms/VectorContractToAMXDotProduct.cpp
M mlir/test/Dialect/X86/AMX/vector-contract-to-tiled-dp.mlir
Log Message:
-----------
[mlir][x86] Add extra patterns for AMX nano-kernel lowering (acc with zero constant) (#222513)
This patch extends AMX nano-kernel lowering for `zero-initialization
constant` of input accumulation
(https://github.com/llvm/llvm-project/pull/204327).
Commit: bdf5228e7a3daf2211400087212702259d8ef8b4
https://github.com/llvm/llvm-project/commit/bdf5228e7a3daf2211400087212702259d8ef8b4
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
A flang/test/Semantics/CUDA/cuda-pinned-implicit-modfile.cuf
Log Message:
-----------
[flang][cuda] Record implicit pinned attribution in module files (#225315)
Under `-gpu=mem:pinned` an unattributed `ALLOCATABLE` is attributed as
`pinned` by the compiler. The module file therefore spelled an
implicitly applied `PINNED` the same as one the user wrote, and a reader
treated it as a user requirement: adding `-gpu=mem:pinned` to a module's
build rejected its OpenACC-only consumers over an attribute the user
never wrote.
Record the implicit attribution for pinned as well, so it is written as
`PINNED(IMPLICIT)` and consumers can tell the two apart.
Commit: d1e09e13067747ed3bfe3b2690715c606f619cb6
https://github.com/llvm/llvm-project/commit/d1e09e13067747ed3bfe3b2690715c606f619cb6
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/bitcast.ll
M llvm/test/CodeGen/SPIRV/const-array-in-struct.ll
M llvm/test/CodeGen/SPIRV/duplicate-types.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/arithmetic-fence.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memmove.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/memset.ll
M llvm/test/CodeGen/SPIRV/no-i8-type-duplication.ll
M llvm/test/CodeGen/SPIRV/no-opbitcast-between-identical-types.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/struct.ll
M llvm/test/CodeGen/SPIRV/switch-no-jump-table.ll
Log Message:
-----------
[NFC][SPIR-V] Fix CHECK lines that never fire in tests (#227332)
FileCheck ignores these lines, so the behavior they describe was
untested
- Typo `-NO:` for `-NOT:` (no-opbitcast-between-identical-types.ll,
no-i8-type-duplication.ll, arithmetic-fence.ll,
translate-aggregate-uaddo.ll)
- Prefix no RUN line enables (memmove.ll, memset.ll, struct.ll,
bitcast.ll)
- Invalid directive `CHECK-4` and `CHECK-SPIRV-DAG-COUNT-7`
(switch-no-jump-table.ll, const-array-in-struct.ll)
- No FileCheck in RUN line and no array type emitted
(duplicate-types.ll)
Commit: 6b26457a0ef2994de54606eb5c356cb897cadda2
https://github.com/llvm/llvm-project/commit/6b26457a0ef2994de54606eb5c356cb897cadda2
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/vector-reduce-fadd.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Legalize G_VECREDUCE_FADD (#223909)
Commit: e83d464473fa4fa2856cfaa4d434afb78e043db6
https://github.com/llvm/llvm-project/commit/e83d464473fa4fa2856cfaa4d434afb78e043db6
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/slp-int-to-fp.ll
Log Message:
-----------
[NFC][AMDGPU] Add SLP to asm tests for int to fp casts (#227344)
Runs the SLP vectorizer and llc on int to fp casts whose vectorization
decision depends on the cast cost, so the asm shows the effect of the
cost model.
Commit: 850b1f7288316cf9092ae7e57fb13f6b47815050
https://github.com/llvm/llvm-project/commit/850b1f7288316cf9092ae7e57fb13f6b47815050
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/gdb_remote_client/TestEmptyThreadList.py
Log Message:
-----------
[lldb][test] Change vCont handling in TestEmptyThreadList.py (#227703)
The `def vCont` handler is triggered only for `vCont;c`, not other
`vCont...`. This test only sometimes sends this, so sometimes it
produced a UnexpectedPacketException.
(though it "passes" still, somehow)
To fix this, declare a vCont handler for the colon c version, and let
`def other` handle the rest.
Commit: e011bda76aab5f9d59c3e74397416b2aec745c46
https://github.com/llvm/llvm-project/commit/e011bda76aab5f9d59c3e74397416b2aec745c46
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/test/Driver/amdgpu-toolchain.c
Log Message:
-----------
[AMDGPU] Stop trying to link AMDGPU ASan from compiler-rt (#227388)
Summary:
As I am building sanitizers in the standard `compiler-rt` location, we
still need to maintain compatibility with the old DeviceRTL usage.
Ideally this will be replaced in the near term, but for now we should
suppress the compiler from trying to link a `-lclang_rt.asan` that
doesn't exist.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: b0e35e5f4132e4c70517ced0ae13e762cd2ab05c
https://github.com/llvm/llvm-project/commit/b0e35e5f4132e4c70517ced0ae13e762cd2ab05c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-offload-binary.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/ObjectYAML/OffloadYAML.h
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/OffloadYAML.cpp
A llvm/test/ObjectYAML/Offload/compressed-zlib.yaml
A llvm/test/ObjectYAML/Offload/compressed.yaml
A llvm/test/ObjectYAML/Offload/malformed-compressed-offset.yaml
M llvm/test/ObjectYAML/Offload/malformed-version.yaml
A llvm/test/tools/llvm-objdump/Offloading/compressed.test
A llvm/test/tools/llvm-offload-binary/compress.test
M llvm/tools/llvm-objdump/OffloadDump.cpp
M llvm/tools/llvm-objdump/OffloadDump.h
M llvm/tools/llvm-objdump/llvm-objdump.cpp
M llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
M llvm/tools/obj2yaml/offload2yaml.cpp
M llvm/unittests/Object/OffloadingTest.cpp
Log Message:
-----------
[Offloading] Add support for compressed OffloadBinary types (#222774)
Summary:
Offload binaries are used to store many heterogenous architectures into
a singel offloading blob. These lists can get very large so this PR adds
the option to compress them with the LLVM provided compression
libraries.
The implementation is quite simple, we simply compress all the buffers
after the header into a single compressed blob, then re-construct the
header. Extracting is the reverse.
The biggest change is that the offload binary now **owns** the memory,
whereas before we simply took a reference to it. This is necessary
because the decompression must create new memory compared to what the
user provided. This adds an extra copy internally, but it also
simplifies the V2 additions.
This does not wire up any clang/HIP support, just providing the
functionality.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: b96b66160ace30c2b5eef1f4afdb14c95ecc26cd
https://github.com/llvm/llvm-project/commit/b96b66160ace30c2b5eef1f4afdb14c95ecc26cd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/exit-count-greater-than.ll
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
M llvm/test/CodeGen/Thumb2/LowOverheadLoops/arm_cmplx_dot_prod_f32.ll
M llvm/test/CodeGen/Thumb2/mve-pipelineloops.ll
Log Message:
-----------
[SCEV] Use howManyLessThans to implement howManyGreaterThans. (#226846)
Update howManyLessThans to support inverting the analyzed comparison and
analyze LHS > RHS as ~LHS < ~RHS.
howManyLessThans should now handle all cases howManyGreaterThans did
(and a few more, see improvements in
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1443).
howManyLessThans now accepts an Inverted argument, which analyzes ~LHS <
~RHS, without materializing the inverted operands explicitly, which can
pessimize results.
I tried to update all code paths where this is possible without too many
changes. A few code paths need bigger changes, and are skipped for now.
PR: https://github.com/llvm/llvm-project/pull/226846
Commit: d9db16754e4aae37319c94422d6f6c1bbcade08d
https://github.com/llvm/llvm-project/commit/d9db16754e4aae37319c94422d6f6c1bbcade08d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
Log Message:
-----------
[lldb][Windows] Improve process_is_running check (#227308)
The current implementation of `process_is_running` uses
[`tasklist`](https://learn.microsoft.com/en-us/windows-server/administration/windows-commands/tasklist)
on Windows. It prints each CSV field through ShowMessage, which calls
`GetConsoleOutputCP`. From a benchmark at desk, when under load, this
call takes `~85ms` instead of `~10us`. This causes tests to time out
when listing a large amount of processes when running check-lldb.
This patch asks the kernel about the one process instead of listing all
of them with tasklist.
rdar://188700994
Commit: 9fb78fc2451015af1df8c0efa8ca5ac6a987e2b3
https://github.com/llvm/llvm-project/commit/9fb78fc2451015af1df8c0efa8ca5ac6a987e2b3
Author: Vy Nguyen <vyng at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
M llvm/test/Transforms/LICM/hoist-speculatable-load.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
Log Message:
-----------
[ValueTracking] Support multiple predecessors in willNotFreeBetween (#223580)
Previously, `willNotFreeBetween` only walked backward along a linear
chain of single-predecessor blocks, bailing out whenever control flow
branched and merged (eg., conditional `if-else` blocks before a loop
preheader).
This PR generalises the backward walk to use a worklist over all
predecessors from `CtxBB` to `AssumeBB` (bounded by
`MaxInstrsToCheckForFree`). This enables LICM( and possibly other
passes) to prove dereferenceability and hoist invariant loads across
merging control flow when no path contains a freeing instruction.
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Co-authored-by: Antonio Frighetto <me at antoniofrighetto.com>
Commit: 2aa480bae38ad5f2c305d28dd5a2d515a8fca254
https://github.com/llvm/llvm-project/commit/2aa480bae38ad5f2c305d28dd5a2d515a8fca254
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/unittests/Analysis/ScalarEvolutionTest.cpp
Log Message:
-----------
[SCEV] Remove expensive inverted reasoning from isImpliedCond. (#227302)
The constructing the inverted expressions and the additional reasoning
is quite expensive (0.35% for CTMark O3), for marginal gain (3 small
regressions on
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1494)
I think that should allow us to spend compile-time on SCEV on areas with
higher impact.
2 of those could be recovered by constant-based reasoning about the
inverted condition.
Compile-time improvements:
stage1-O3: -0.35%
stage1-ReleaseThinLTO: -0.32%
stage1-ReleaseLTO-g: -0.28%
stage1-aarch64-O3: -0.31%
stage2-O3: -0.32%
stage2-clang: -0.06%
https://llvm-compile-time-tracker.com/compare.php?from=197c16add5b16f4bd68c4f4bae115723e74330e2&to=30dc497653f0daafd602d29a1ead334599055619&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/227302
Commit: a4aea75c443158c949637bda27d22669879e0e54
https://github.com/llvm/llvm-project/commit/a4aea75c443158c949637bda27d22669879e0e54
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
A flang/test/Fir/cg-rewrite-compile-time-only-block-args.fir
Log Message:
-----------
[flang][codegen] Rebuild compile-time-only block arguments in cg-rewrite (#227624)
A fir.shape, fir.shape_shift, fir.shift or fir.slice only describes an
array at compile time. cg-rewrite reads one through its defining op and
folds it into the code-gen form, so none of these types has an LLVM
lowering and none is expected to reach codegen.
A pass that merges two blocks differing only in such a value passes it
as a block argument instead, and a block argument has no defining op.
The fold then finds nothing to read: a slice is dropped, leaving a
descriptor for the whole array rather than the section, and a shape
reaches a cast on a null defining op.
Rebuild the value in the block. The operands behind it are integers,
which can be block arguments, so take those as arguments, forward them
along each branch, and build the value from them at the top of the
block. The merge is kept and no block is duplicated.
Commit: b9c40729b28600a01a5503a4a73acfae55540cf2
https://github.com/llvm/llvm-project/commit/b9c40729b28600a01a5503a4a73acfae55540cf2
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[lldb][Windows] Improve process_is_running check (#227308)
The current implementation of `process_is_running` uses
[`tasklist`](https://learn.microsoft.com/en-us/windows-server/administration/windows-commands/tasklist)
on Windows. It prints each CSV field through ShowMessage, which calls
`GetConsoleOutputCP`. From a benchmark at desk, when under load, this
call takes `~85ms` instead of `~10us`. This causes tests to time out
when listing a large amount of processes when running check-lldb.
This patch asks the kernel about the one process instead of listing all
of them with tasklist.
rdar://188700994
Commit: f2b09c5382e5a34818c337a70498e85bc35b03e9
https://github.com/llvm/llvm-project/commit/f2b09c5382e5a34818c337a70498e85bc35b03e9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/epilogue-vectorization-printing.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-and-scalarize-only.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-metadata.ll
M llvm/test/Transforms/LoopVectorize/WebAssembly/memory-interleave.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-load-i8.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i16.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i32.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i64.ll
M llvm/test/Transforms/LoopVectorize/X86/CostModel/masked-store-i8.ll
Log Message:
-----------
[VPlan] Print metadata via ModuleSlotTracker. (#203982)
Since #220390 (dd7236de), ModuleSlotTracker assigns stable metadata
IDs to metadata not inserted in a module yet.
Reuse a ModuleSlotTracker instance when printing metadata
for recipes. This should guarantee stable, numeric IDs for metadata in all
cases, and we should no longer need the `vplan-print-metadata` option.
PR: https://github.com/llvm/llvm-project/pull/203982
Commit: 24fc2824a239219f89e6c18739f856d4509a3a4e
https://github.com/llvm/llvm-project/commit/24fc2824a239219f89e6c18739f856d4509a3a4e
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/main.cpp
Log Message:
-----------
[lldb] Wait for file to start test_attach_commandline_continue_app_exits (#227317)
`test_attach_commandline_continue_app_exits` starts an inferior that
exits 3s after writing its syncfile. Under load the harness and
lldb-server take longer than that to reach `DebugActiveProcess`. On
Windows, the attach fails with `ERROR_ACCESS_DENIED` and lldb-server
exits without connecting, and the test waits 60s in `accept()`.
This patch gives the inferior a `waitfile:` argument and create the file
once the stub has attached.
rdar://188700994
Commit: 4f9feb85267c08ec29ea8bb2f80a3d0cd7ab925f
https://github.com/llvm/llvm-project/commit/4f9feb85267c08ec29ea8bb2f80a3d0cd7ab925f
Author: Gheorghe-Teodor Bercea <gt.bercea at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/DIContext.h
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
A llvm/test/tools/llvm-dwarfdump/AMDGPU/DW_AT_LLVM_address_space.yaml
M llvm/tools/llvm-dwarfdump/llvm-dwarfdump.cpp
Log Message:
-----------
[llvm-dwarfdump] Print symbolic names for DW_AT_LLVM_address_space (#220728)
DW_AT_LLVM_address_space is already defined in Dwarf.def, and
dwarf::AddressSpaceString() already maps its values to names, resolving
target-specific spaces through the triple. Nothing wired the two
together,
so the attribute was only ever printed as a bare integer.
Add a GetNameForDWARFAddressSpace callback to DIDumpOptions, alongside
the
existing GetNameForDWARFReg, and have llvm-dwarfdump populate it from
the
triple of the object being dumped. Values with no name for the target
continue to print as plain integers.
DWARFDie.cpp already special-cases other DW_AT_LLVM_* attributes such as
DW_AT_LLVM_virtual_call_origin, so this follows the existing pattern.
Commit: 49063b8d952d3876eabe9bf6b372cb9d95446b13
https://github.com/llvm/llvm-project/commit/49063b8d952d3876eabe9bf6b372cb9d95446b13
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpHelpers.h
Log Message:
-----------
[clang][bytecode] Split `CheckRange` into `Pointer` and `PtrView` variants (#227719)
The previous version copied the `Pointer`, which is bad because that
inserts the new pointer into the linked list of the block. Changing to
`const T &` seems to regress the `PtrView` variant though, so bite the
bullet and accept the code duplication.
Commit: a822257b516c0171efc283c6be5e2fdc3728b5a3
https://github.com/llvm/llvm-project/commit/a822257b516c0171efc283c6be5e2fdc3728b5a3
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang/docs/LanguageExtensions.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinTemplates.td
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/Import/builtin-template/Inputs/S.cpp
M clang/test/Import/builtin-template/test.cpp
M clang/test/PCH/dedup_types.cpp
A clang/test/SemaTemplate/sort-types-builtin.cpp
Log Message:
-----------
[Clang] Implement `__builtin_sort_pack` (#225025)
This is a rework of #152118.
Like `__builtin_dedup_pack`, `__builtin_sort_pack` is a builtin that
operates a pack->pack transform, sorting the pack.
This is useful to implement efficiently some libraries like std::exec,
which rely on sorted variants types etc to establish equivalence.
Fixes #154966
Assisted-By: Opus 5.
Commit: bc5a643607599ba5dcf3cab3316cb762b33928ed
https://github.com/llvm/llvm-project/commit/bc5a643607599ba5dcf3cab3316cb762b33928ed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
Log Message:
-----------
AMDGPU: Mark SCC clobbers dead in GlobalISel waterfall loops (#227637)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 1f07fbff46ebf1e8871a30bf4bd6fc8fdcf0d4af
https://github.com/llvm/llvm-project/commit/1f07fbff46ebf1e8871a30bf4bd6fc8fdcf0d4af
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/HTTP/HTTPClient.cpp
Log Message:
-----------
[llvm] Report a WinHttpQueryDataAvailable failure instead of ending the body (#226514)
When `WinHttpQueryDataAvailable` fails, it can be because of a timeout.
We currently don't handle that case and report success instead.
This patch handles the timeout case by returning an error instead.
List of possible error values:
https://learn.microsoft.com/en-us/windows/win32/api/winhttp/nf-winhttp-winhttpquerydataavailable#return-value
Commit: 169c6b25035659b7551a57165b662db19db7a9d0
https://github.com/llvm/llvm-project/commit/169c6b25035659b7551a57165b662db19db7a9d0
Author: Daniil Dudkin <unterumarmung at yandex.ru>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
Log Message:
-----------
[clang-tidy] `use-ranges`: preserve output results (#196037)
Preserve used output iterator results for output algorithm replacements
by appending `.out` where the ranges algorithm returns an algorithm
result object.
Fix #110223
Assisted by Codex.
Commit: 76fed34ef56db87dfcc9cea82ad57f4a51d8718f
https://github.com/llvm/llvm-project/commit/76fed34ef56db87dfcc9cea82ad57f4a51d8718f
Author: Prabhu Rajasekaran <prabhukr at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
A llvm/test/DebugInfo/ARM/call-site-callee-operand.ll
Log Message:
-----------
[ARM] Implement getCalleeOperand in ARMBaseInstrInfo (#218739)
In ARM/Thumb targets, calls that encode predicate operands before the
target operand (tBL, tBLXi, tBLXr, tBLXr_noip, tBLXNSr) place the callee
at operand index 2 rather than 0.
Override TargetInstrInfo::getCalleeOperand in ARMBaseInstrInfo to return
operand 2 for these Thumb call instructions and delegate to the base
implementation for all other calls.
Add target unit tests in CalleeOperandTest.cpp covering both Thumb and
ARM call opcodes.
Assisted-by: Gemini
Commit: 6cb8584a22334623c901e9bb9b2b80f750bd47e5
https://github.com/llvm/llvm-project/commit/6cb8584a22334623c901e9bb9b2b80f750bd47e5
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU] Fold sudot intrinsics with a zero multiplicand (#226479)
Replace sudot4 and sudot8 with their accumulator when either
multiplicand is zero.
For example:
```
sudot4(sign0, x, sign1, 0, acc, clamp)
->
acc
```
Commit: bbf884bc157a588b8d1f7115c1f3cb8a954aa796
https://github.com/llvm/llvm-project/commit/bbf884bc157a588b8d1f7115c1f3cb8a954aa796
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/TargetMachine.cpp
Log Message:
-----------
CodeGen: Move SupportsDefaultOutlining from TargetOptions to TargetMachine (#227691)
This flag is not an option passed down to a target, it is a capability reported by
one. It is only written by backend TargetMachine constructors. Move it into
TargetMachine, next to the vaguely similar O0WantsFastISel.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 6bb86c2af2bad73178451aa3c8cb68eb4b837f96
https://github.com/llvm/llvm-project/commit/6bb86c2af2bad73178451aa3c8cb68eb4b837f96
Author: DeanSturtevant1 <dsturtevant at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
Log Message:
-----------
[SelectionDAG] Clear Known.One sign bit for ISD::FABS in computeKnownBits (#227457)
In `SelectionDAG::computeKnownBits`, `ISD::FABS` previously called
`Known.makeNonNegative()` after computing the known bits of its operand.
If the operand's sign bit was already known to be 1, `makeNonNegative()`
would only set `Known.Zero`'s sign bit without clearing `Known.One`'s
sign bit, resulting in a conflicting `KnownBits` state.
Explicitly set `Known.Zero`'s sign bit and clear `Known.One`'s sign bit
for `ISD::FABS`, and add a unit test.
Commit: 7ad649c95921a4ea1a4cf4d960fa946632b43a57
https://github.com/llvm/llvm-project/commit/7ad649c95921a4ea1a4cf4d960fa946632b43a57
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/CodeGen/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes a4aea75 (#227724)
This fixes a4aea75c443158c949637bda27d22669879e0e54 (#227624).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=a4aea75c443158c949637bda27d22669879e0e54
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4103c42711877449d20e10766b1976f753a719d7
https://github.com/llvm/llvm-project/commit/4103c42711877449d20e10766b1976f753a719d7
Author: Haram Jeong <91401364+haramj at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/test/Transforms/InstCombine/icmp-usub-sat.ll
Log Message:
-----------
[InstCombine] Fold comparisons of llvm.usub.sat result with its LHS (#214108)
Fold comparisons between the result of `llvm.usub.sat(X, C)` and the
original
left-hand side when `C` is a nonzero constant.
For `C != 0`:
```llvm
%sat = call iN @llvm.usub.sat.iN(iN %x, iN C)
%cmp = icmp eq iN %sat, %x
```
can be folded to:
```llvm
%cmp = icmp eq iN %x, 0
```
Similarly:
```llvm
%sat = call iN @llvm.usub.sat.iN(iN %x, iN C)
%cmp = icmp ult iN %sat, %x
```
can be folded to:
```llvm
%cmp = icmp ne iN %x, 0
```
This also handles the commuted equality form:
```llvm
icmp eq iN %x, %sat
```
The fold does not require the intrinsic to have one use, so if the
`usub.sat`
result is used elsewhere, only the comparison is canonicalized and the
intrinsic remains live.
Proofs: https://alive2.llvm.org/ce/z/ZmAzBE
Fixes #213832
Commit: 362a60ebc50e399983914a51b939dfbe11df15de
https://github.com/llvm/llvm-project/commit/362a60ebc50e399983914a51b939dfbe11df15de
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/outer-loop-memory-safety.ll
Log Message:
-----------
[LV] Reject non-simple outer-loop memory accesses. (#226212)
Reject loops with atomic or volatile access early in
canVectorizeOuterLoops. We cannot safely vectorize those instructions.
And at the VPlan-level, we do not model non-simple loads/stores etc, so
we cannot easily detect them (without reaching to the underlying
instructions).
Reject them at the outset, like in the inner loop path.
Without the checks, the newly added tests crash.
PR: https://github.com/llvm/llvm-project/pull/226212
Commit: 4b91c605bfe5872e7175b887c043549e34d2901d
https://github.com/llvm/llvm-project/commit/4b91c605bfe5872e7175b887c043549e34d2901d
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/condprop.ll
A llvm/test/Transforms/GVN/inverse-cmp.ll
Log Message:
-----------
[GVN] Replace cmp with not instruction if inv cmp is found (#223171)
proof: https://alive2.llvm.org/ce/z/AbheFF
Commit: 088f62a2d1c0cd124326d358a66421d837d728e0
https://github.com/llvm/llvm-project/commit/088f62a2d1c0cd124326d358a66421d837d728e0
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/__support/str_to_float.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/stdlib/strtod_test.cpp
Log Message:
-----------
[libc] Fix str_to_float.h clinger_fast_math for negative exponents. (#227391)
* Correctly handle inequality comparison with `exp10` when it equals
`INT32_MIN` and cannot be negated.
* When rounding mode is non-nearest, add missing handling of negative
exponents as in the nearest-mode fast-path above.
Both of these issues resulted in out-of-bounds access of
`POWERS_OF_TEN_ARRAY`.
While here, rename `exp10` to `exp_10` in str_to_float.h to disambiguate
from the C23 `exp10()` function. Also rename `exp2` to `exp_2` for
consistency.
Co-authored-by: @mxms0
Assisted-by: Automated tooling, human reviewed.
Commit: 233a25d068a9323211dd1f32c7a83e72751826ef
https://github.com/llvm/llvm-project/commit/233a25d068a9323211dd1f32c7a83e72751826ef
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/CMakeLists.txt
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVMIR] Restore constant folding for global initializer GEPs (#227651)
Before #226904, a GEP in a global initializer went through
IRBuilder::CreateGEP, and MLIR's IRBuilder<TargetFolder> folded the
result
with ConstantFoldConstant. That combines nested GEPs, folds null and
integer
bases, and infers inbounds and nuw when the offset stays within the
global.
Building the constant expression directly skipped the folder, so the
output
lost those flags.
Fold the constant again. This also applies to inrange GEPs, which used
to
bypass the folder; the only visible difference there is that an inbounds
GEP with a non-negative offset now also gets nuw.
CIR's vtable, VTT and constant pointer tests check for the inferred
flags
(for example CIR/CodeGen/vtt.cpp) and have failed since #226904.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: 995b10a038ee4ae3451fb50c3514763dfa09f6ac
https://github.com/llvm/llvm-project/commit/995b10a038ee4ae3451fb50c3514763dfa09f6ac
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/docs/Remarks.md
M mlir/include/mlir/IR/Remarks.h
M mlir/lib/IR/Remarks.cpp
M mlir/test/Pass/remark-final.mlir
M mlir/unittests/IR/RemarkTest.cpp
Log Message:
-----------
[MLIR] Emit final-policy remarks in deterministic order (#224616)
`RemarkEmittingPolicyFinal` stores remarks in a `DenseSet` whose hash
covers the location pointer and the process hash seed, so `finalize()`
emitted them in bucket order. That order depends on the build
configuration and on memory layout, which is why
`mlir/test/Pass/remark-final.mlir` used `CHECK-DAG`.
The engine already assigns every remark a `RemarkId` from a monotonic
counter when it is created, and the set already keeps the newer of two
remarks with the same identity. `finalize()` now sorts the drained
remarks by that ID before emitting. Remarks come out in creation order,
a replaced identity takes the position of its last report, and linked
remarks still follow their parent.
Behaviour change: order only. The identity, `DenseMapInfo<Remark>` and
the header are unchanged. Only remarks handed to the policy outside the
engine have no ID; the unit tests that do so assert unordered or single
results.
Creation order is deterministic for a single-threaded pipeline. When
passes report from several threads the IDs come from a shared counter
and depend on scheduling; #227360 adds the lock and a source-position
sort for that case, on top of this change.
Whether the identity itself is right is a separate question for a
follow-up: the docs say a later `passed` replaces an earlier `failed` at
the same location, but `kind` has been part of the key since #180953, so
both are shown today. This PR leaves the docs as they are on that point.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: 9060d938ad7bd10111d9a84c3bf8ea7955b2904e
https://github.com/llvm/llvm-project/commit/9060d938ad7bd10111d9a84c3bf8ea7955b2904e
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/lib/Frontend/OpenMP/OMPDescriptors.cpp
Log Message:
-----------
[OpenMP] Remove redundant namespace qualifications, NFC (#227465)
Commit: 622b141186fd215904f2ac86fe9821ac87e40508
https://github.com/llvm/llvm-project/commit/622b141186fd215904f2ac86fe9821ac87e40508
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-vectorized-loop.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-profitable vectorization in vectorized loops, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227751
Commit: 66768776d38088cc1d7871fb45ce2ca7494399ee
https://github.com/llvm/llvm-project/commit/66768776d38088cc1d7871fb45ce2ca7494399ee
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Use a member instead of global function for a use (#227713)
Commit: fa7903e9e206004a9613662eca539d3342807231
https://github.com/llvm/llvm-project/commit/fa7903e9e206004a9613662eca539d3342807231
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/Decomposer.cpp
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/unittests/Frontend/OpenMPDecompositionTest.cpp
Log Message:
-----------
[OpenMP] Allow overriding clause-allowed-on-directive in decomposition (#227418)
Construct decomposition needs to know which clause is allowed on which
directive in a given OpenMP spec version. To allow implementations to
conditionally allow clauses from future (or past) versions, require the
helper class to implement the isClauseAllowedOnDirective check.
Commit: fdcce89c57fc7dbc6624a800f4e1c8a10674109d
https://github.com/llvm/llvm-project/commit/fdcce89c57fc7dbc6624a800f4e1c8a10674109d
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
A mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
Log Message:
-----------
[mlir][tosa] Lower MAX_POOL2D_ADAPTIVE to Linalg (#225675)
Legalize max_pool2d_adaptive with constant shape operands through the
existing max_pool2d conversion.
Assisted-by: Codex
Commit: 724cf76230e2b9de78b022cf556e694fc2ff8e64
https://github.com/llvm/llvm-project/commit/724cf76230e2b9de78b022cf556e694fc2ff8e64
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
Log Message:
-----------
[SSAF] Close unsafe-buffer reachability over override families (#213319)
An unsafe pointer reaching one override's parameter is equally unsafe in
every sibling and base override of that method, because the call site picks
the target dynamically. Without closing over the families, reachability
depended on which override the extractor happened to see the flow through, so a
fix suggested for the base could be contradicted by a derived override.
- Mirroring is level-preserving: families relate slot entities, so a reachable
EPL propagates only to the same pointer level on its family members.
- Mirroring happens inside the pointer-flow search, so flows out of a mirrored
EPL are followed too.
- Type-constrained slots are never mirrored onto, so C3 still holds.
§4 of rdar://179151603
Assisted-By: claude
Commit: 0c34c62d2b70b4814aeae57de50879d7253e93f4
https://github.com/llvm/llvm-project/commit/0c34c62d2b70b4814aeae57de50879d7253e93f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-vectorized-loop.ll
Log Message:
-----------
[SLP]Use tighter runtime alias checks cost bound in vectorized loops
The scalar loop left by the loop vectorizer runs only a few iterations
or the ranges its runtime checks found overlapping, where the versioning
checks, executed on each iteration, are unlikely to pay off. Bound their
cost by 10% of the guarded scalar region cost in such loops, controlled
by -slp-vec-loop-rt-checks-cost-percent.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227756
Commit: 72f86196835d8603f71b826ff98bd5d3e9ea4f1e
https://github.com/llvm/llvm-project/commit/72f86196835d8603f71b826ff98bd5d3e9ea4f1e
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
Log Message:
-----------
[GlobalISel][KnownFPClass] Fix `computeKnownFPClass` for `G_INTRINSIC_FPTRUNC_ROUND` (#223741)
Fixes https://github.com/llvm/llvm-project/issues/221010
`G_INTRINSIC_FPTRUNC_ROUND` was mistakenly grouped with the
round-to-integer functions. I have fixed it by having it use the
`G_FPTRUNC` logic.
Commit: 0206846e12b5d9126758112aa9e410fe0c69c6b6
https://github.com/llvm/llvm-project/commit/0206846e12b5d9126758112aa9e410fe0c69c6b6
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/alphasort.cpp
A libc/src/dirent/alphasort.h
M libc/src/string/CMakeLists.txt
M libc/src/string/strcoll.cpp
M libc/src/string/strcoll_l.cpp
M libc/src/string/string_utils.h
M libc/test/src/dirent/CMakeLists.txt
A libc/test/src/dirent/alphasort_test.cpp
Log Message:
-----------
[libc] Implement alphasort in dirent (#226487)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function `alphasort`
in `<dirent.h>`, bringing functions declared in `dirent.yaml` to 100%
completion.
Fixes #226457
Commit: c90c5946e7d3943e8e4d426f0a321f7560255c16
https://github.com/llvm/llvm-project/commit/c90c5946e7d3943e8e4d426f0a321f7560255c16
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
M lldb/test/API/functionalities/thread/thread_exit/TestThreadExit.py
Log Message:
-----------
[lldb] Improve thread counting in tests (#227312)
When a test checks how many threads a process created it uses
`process.GetNumThreads()`. This does not account for the fact that the
OS (Windows) can add threads on its own between 2 stops:
On Windows, when an `std::thread` starts, an `ntdll!TppWorkerThread` is
started as well (see [this SO
thread](https://stackoverflow.com/questions/34822072/why-does-windows-10-start-extra-threads-in-my-program)).
That thread raises `CREATE_THREAD_DEBUG_EVENT` only once it first runs,
which can be after the next stop.
This patch introduces `get_threads_in_executable` which only counts the
test's own threads rather than the OS worker threads.
rdar://188700994
Commit: e87dfe22fb87066df78dfa13f5e2ed80122b4869
https://github.com/llvm/llvm-project/commit/e87dfe22fb87066df78dfa13f5e2ed80122b4869
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
Log Message:
-----------
[RISCV] Add Zilx loads to getJumpTableIndex. (#227557)
Commit: adea68fd6515e904a82ad96b77aa51c352c5aae7
https://github.com/llvm/llvm-project/commit/adea68fd6515e904a82ad96b77aa51c352c5aae7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
R llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/utils/gn/secondary/llvm/lib/CodeGen/BUILD.gn
Log Message:
-----------
CodeGen: Move SupportsDebugEntryValues from TargetOptions to TargetMachine (#227700)
This is a capability reported by the target rather than an option to the
target. It has no command line flag or frontend plumbing to write it.
I'm not sure if we really need this; Triple::supportsDebugEntryValues()
exists although these don't entirely agree today.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 9488c46651de0fbec038e6b8578c1e651d89e576
https://github.com/llvm/llvm-project/commit/9488c46651de0fbec038e6b8578c1e651d89e576
Author: Alexander Johnston <alexander.johnston at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/HLSLIntrinsics.td
A clang/include/clang/Basic/HLSLPackedTypes.def
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/AST/HLSL/int8_t4_packed.hlsl
A clang/test/AST/HLSL/uint8_t4_packed.hlsl
A clang/test/CodeGenHLSL/packed-types.hlsl
A clang/test/SemaHLSL/Types/packed-types-error.hlsl
A clang/test/SemaHLSL/Types/packed-types-size.hlsl
M clang/tools/libclang/CIndex.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[HLSL] Add Packed Types for pack_ and unpack_ intrinsics (#224277)
Adds the int8_t4_packed and uint8_t4_packed types for HLSL.
These are used by the SM6.6 pack_ and unpack_ intrinsics.
The types are convertible to and from uint and each other, as describe
in the DirectX Specs.
Commit: 3ad8fe1622045a8e48dad395115088f021a962e1
https://github.com/llvm/llvm-project/commit/3ad8fe1622045a8e48dad395115088f021a962e1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/epilog-vectorization-function-entry-count.ll
Log Message:
-----------
[LV] Add epilogue tests for functions with entry count (NFC). (#227747)
Add tests vectorizing the epilogue of loops without branch weights in
functions with an entry count.
This adds test coverage for adding profile data to epilogue skeleton
without branch weights.
Commit: 80e8c0a59189bc4c4954b6ebe2d08ee8f4b8c904
https://github.com/llvm/llvm-project/commit/80e8c0a59189bc4c4954b6ebe2d08ee8f4b8c904
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
A clang/test/CodeGen/debug-info-line0-lexical-block.c
Log Message:
-----------
[DebugInfo] Fill Column 0 if Line is not found (#227559)
It is possible that user specified line 0 as the start of the line in C
language (using `# 0`). However, it is rejected by the Lexer as we have
no line but still carries column information. As a result, we fill
column to 0 if we cannot find line.
Assisted-by: Claude # Test
Fixes: #56186
Commit: a6ac6a01991550af4792402e6f0afb7ffee37508
https://github.com/llvm/llvm-project/commit/a6ac6a01991550af4792402e6f0afb7ffee37508
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/test/MC/AMDGPU/gfx11_asm_mimg_features.s
M llvm/test/MC/AMDGPU/mimg-err.s
M llvm/test/MC/AMDGPU/mimg.s
M llvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
M llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_mimg_features.txt
Log Message:
-----------
[AMDGPU] Fix extra whitespace when disassembling some MIMG instructions (#227632)
Commit: 6ba7cc00c940912ee6f8663a9e3026994920d478
https://github.com/llvm/llvm-project/commit/6ba7cc00c940912ee6f8663a9e3026994920d478
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++] Remove unused generalization from the libc++ benchmarking pipeline (#227369)
I initially tried reusing the same workflow file to run libc++ and
libstdc++ benchmarks, but since then I have given up on that approach.
As part of that, I had generalized the workflow and machines.json to
support not building the library. Since that capability won't be useful,
I am removing the generalization to simplify (a bit) the workflow and
machines.json.
Also introduce a `pr-benchmarks` key in machines.json to explicitly opt
into the PR benchmarking job: otherwise we'd have to implicitly key off
of the existence of `cmake-cache`, which is awkward.
Commit: 16a1f7e557e52fbf75b007fe7ed90158b8171961
https://github.com/llvm/llvm-project/commit/16a1f7e557e52fbf75b007fe7ed90158b8171961
Author: Yashas Andaluri <yandalur at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
Log Message:
-----------
[Hexagon] Enable aggressive RDF copy propagation by default (#225142)
Enable AggressiveRDFCopy algorithm by default, instead of the old
RDFCopy algorithm.
Commit: c7eee36cb7fcf433cf7ccb0c9355bbfdeee2256f
https://github.com/llvm/llvm-project/commit/c7eee36cb7fcf433cf7ccb0c9355bbfdeee2256f
Author: Yeoul Na <yeoul_na at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/Decl.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Sema/SemaType.cpp
Log Message:
-----------
[BoundsSafety][NFC] Add the count-refill logic for late-parsed bounds attributes (#224556)
Introduce the machinery that fills in a late-parsed bounds attribute's
argument once the enclosing record is complete, without wiring it up
yet. Nothing creates an incomplete CountAttributedType or records
one for completion at this point, so this is inert -- the functions are
unused and behavior is unchanged. Activation follows in the next
commit.
Assisted-by: Opus 4.8
Commit: ef4a19d2cd7ae5d5e42003c6bc239af912eed611
https://github.com/llvm/llvm-project/commit/ef4a19d2cd7ae5d5e42003c6bc239af912eed611
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
A llvm/test/CodeGen/AMDGPU/promote-alloca-homogeneous-struct.ll
Log Message:
-----------
Reland "[AMDGPU] PromoteAlloca: flatten homogeneous structs to vectors" (#221058) (#223790)
This relands #217055
The original commit revealed a latent issue in eliminateFrameIndex in
SIRegisterInfo where SCC can be clobbered before reading it on
gfx900/gfx90a. This change itself has no known issues.
Commit: 552ea17e0a93262e78813994c0abc6cea23bfb55
https://github.com/llvm/llvm-project/commit/552ea17e0a93262e78813994c0abc6cea23bfb55
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/isfpclass.c
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/wasm.c
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Transforms/SimplifyCFG/switch-range-to-icmp.ll
M llvm/unittests/Analysis/ValueTrackingTest.cpp
Log Message:
-----------
[ValueTracking] Handle zext/sext in computeConstantRange (#227726)
Commit: 24df73cb7311d9a66d132c7fcd20feac2fbae36d
https://github.com/llvm/llvm-project/commit/24df73cb7311d9a66d132c7fcd20feac2fbae36d
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes commit 4f9feb85267c08ec29ea8bb2f80a3d0cd7ab925f (#227767)
Adds missing dependency
Commit: 0a5b663d6474a958ef953cd6615de550957b8525
https://github.com/llvm/llvm-project/commit/0a5b663d6474a958ef953cd6615de550957b8525
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementRowColFlags.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
Log Message:
-----------
[Clang][HLSL] Keep matrix SSA values in column-major order (#227087)
Keep matrix register values in canonical column-major order while
preserving
the declared matrix layout for memory accesses.
Construct elementwise matrix casts in column-major lane order and use
column-major indexing when extracting elements from SSA values. Continue
to
use layout-aware indexing for LValues and other physical memory
operations.
Materialize matrix prvalues through the matrix-aware scalar store path
so
row-major temporaries are transposed at the register-to-memory boundary.
Add coverage for matrix indexing, casts, swizzles, transposed prvalues,
and
explicit row-major out-parameter accesses.
Assisted by Copilot via GPT 5.6-sol
Commit: 7e89fb5d646ef2d4b18520a8300818b5b94ef587
https://github.com/llvm/llvm-project/commit/7e89fb5d646ef2d4b18520a8300818b5b94ef587
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/DataFormatters/TypeSynthetic.cpp
Log Message:
-----------
[lldb] Fix logic bugs in BytecodeSyntheticChildren (#227483)
Fix a pair of bugs in `BytecodeSyntheticChildren`.
1. Fix conditions that should compare with `>= 0` (not `> 0`)
2. Fix an inverted conditional when checking if a formatter implements
`@get_child_index`
Assisted-by: claude
Commit: 85a5d0a53df92dc384058e8738777f81a78a0f69
https://github.com/llvm/llvm-project/commit/85a5d0a53df92dc384058e8738777f81a78a0f69
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Core/IOHandler.cpp
Log Message:
-----------
[REPL][Windows] Don't redraw the prompt into redirected REPL output (#227755)
On Windows without `libedit`, `IOHandlerEditline::PrintAsync` re-printed
the prompt after every async output chunk, even when stdout is not a
console. When REPL output is redirected, as in lit tests, `"> "` lands
in the middle of the program's output, which made `SwiftREPL` tests like
`ExclusivityREPL` flaky.
The prompt is now redrawn only when the handler is interactive and
stdout is a console that can erase it.
Commit: 65051a3c32709971db58e2388f1eaae1edeb146a
https://github.com/llvm/llvm-project/commit/65051a3c32709971db58e2388f1eaae1edeb146a
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
Log Message:
-----------
[Clang][HLSL] Emit constant matrix values in column-major order (#227356)
Emit matrix APValues in the canonical column-major register layout,
independent of the selected matrix memory layout.
When a constant is used as a row-major memory initializer, reorder its
elements at the register-to-memory boundary. This preserves the physical
layout of global and static row-major matrices while ensuring constexpr
matrix expressions produce canonical register values.
Assisted by Cop-pilot GPT 5.6-Sol
Commit: 6b9d37acbd572a8a07bf51c3784ddfd4ead2944c
https://github.com/llvm/llvm-project/commit/6b9d37acbd572a8a07bf51c3784ddfd4ead2944c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
Log Message:
-----------
[CodeGen] Remove unused InstructionMoveBefore (NFC) (#227586)
The last use was removed on December 15, 2023 in commit
163aeca33d4adb97e8599584409457ca14b1419b.
Assisted-by: Antigravity
Commit: db409ffcf81de44fb2b3644b2fe28eebf4b69df0
https://github.com/llvm/llvm-project/commit/db409ffcf81de44fb2b3644b2fe28eebf4b69df0
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/constexpr-ptr-offset.cpp
M clang/test/CIR/CodeGen/global-ptr-init.cpp
M clang/test/CIR/CodeGen/globals.cpp
M clang/test/CIR/CodeGen/self-ref-temporaries.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
Log Message:
-----------
[CIR] Fix failing tests after #226904 (#227523)
A number of CIR tests were checking LLVM IR output for GEP statements
that contained `inbounds` and `nuw` flags that had been added by LLVM's
constant folder. Following
https://github.com/llvm/llvm-project/pull/226904 these are no longer
produced.
This change updates the tests to match the current output.
Assisted-by: Cursor / claude-opus-5.5
Commit: b8afba677502d531efd5c6096e23b46ef488da96
https://github.com/llvm/llvm-project/commit/b8afba677502d531efd5c6096e23b46ef488da96
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
A clang/include/clang/CodeGenUtils/BackendDiagnosticHandler.h
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
A clang/lib/CodeGenUtils/BackendDiagnosticHandler.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/test/CIR/CodeGen/attr-error.c
A clang/test/CIR/Diagnostics/attr-error.c
A clang/test/CIR/Diagnostics/inline-asm-backend-diagnostic.c
Log Message:
-----------
[CodeGen][CIR] Split out Backend Diags to utils, impl CIR error-attr (#225966)
So first, the motivation for this is the `error` attribute, which
applies to a function and diagnoses if it 'survives' into the backend as
a call. In order to do this, we need to add the
dontcall-error/dontcall-warn attributes to functions.
The call operation ALSO needs the srcloc to be present, so this threads
that through as well. Note this is pretty fragile in classic-codegen, so
we inherit some fragility from that source location as well.
HOWEVER, in order to get diagnostics to work properly in the backend, we
need to consume them. This patch ALSO extracts the handling for that
from CodeGenAction.cpp into CodeGenUtils, plus uses it from both sides.
Disclaimer: I ended up using Claude to do a lot of the refactoring. It
was mostly copy/paste with some minor changes to generalize it, but
Cladue helped.
Commit: ffb3120b0aae71d16c275bfb4a56b8633897fdae
https://github.com/llvm/llvm-project/commit/ffb3120b0aae71d16c275bfb4a56b8633897fdae
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
M clang/test/CIR/Transforms/switch-fold.cir
Log Message:
-----------
[CIR] Don't 'simplify' switch-case if there is something in the way. (#227437)
The simplify case code was assuming that cases were mergeable, and
didn't realize that code in the middle (like the goto in the test case)
meant they couldn't be re-joined. This patch adds that to the
CIRSimplify logic to make sure we con't try to combine cases that have
something 'in between'.
Commit: ea8ba8302eea264706354d92e7c9027ceae4f0b4
https://github.com/llvm/llvm-project/commit/ea8ba8302eea264706354d92e7c9027ceae4f0b4
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/split-gep.ll
A llvm/test/Transforms/SeparateConstOffsetFromGEP/NVPTX/trunc-ext.ll
Log Message:
-----------
[SeparateConstOffsetFromGEP] Fix offsets across trunc and ext (#225195)
Stop extracting offsets from arithmetic through a truncation followed by
sign or zero extension.
[Compiler Explorer reproducer](https://godbolt.org/z/xK1WTT7nY) and
[Alive2 counterexample](https://alive2.llvm.org/ce/z/KWcMNZ).
Commit: 91d88a48f449d54b5004c83399dc2281cb549734
https://github.com/llvm/llvm-project/commit/91d88a48f449d54b5004c83399dc2281cb549734
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byval-union-padding.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byval-union-padding.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-tail-padding.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-variadic.c
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-call.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
Log Message:
-----------
[CIR] Preserve padding bytes across a byval argument (#224672)
Fill the parameter's own slot in the callee with a copy from the
object's address rather than a store of a loaded record value. At the
call site, pass the object's own address, or fill the byval slot the
same way when it cannot be passed. A store writes only the fields of the
record's type and leaves its padding unwritten, which for a union can be
another member's live data. A _BitInt keeps its load and store, since
those are its conversion to and from memory.
Assisted-by: Cursor / claude-opus-5
Commit: 521f9e58a7e2389ccbf7893627857fe19da43c8a
https://github.com/llvm/llvm-project/commit/521f9e58a7e2389ccbf7893627857fe19da43c8a
Author: Emilio Cota <ecg at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/masked-divrem.ll
Log Message:
-----------
[msan] handle llvm.masked.{udiv,sdiv,urem,srem} intrinsics (#225363)
Check the divisor and propagate the dividend's shadow on active lanes,
poisoning disabled result lanes. This poisoning is consistent with
the definition of these intrinsics; see #189705 (9ba774566).
This gets rid of false positives from inactive input lanes since
visitInstruction() was checking every operand across all lanes,
active or not.
Depends on: https://github.com/llvm/llvm-project/pull/227462
Commit: 8be6a5f1a1881a3e75800a6648f728a33594bfb8
https://github.com/llvm/llvm-project/commit/8be6a5f1a1881a3e75800a6648f728a33594bfb8
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
A flang/test/Lower/OpenACC/acc-on-device-interface.f90
Log Message:
-----------
[flang][cuda] Lower on_device() declared by an interface to cuf.on_device (#227498)
on_device() was lowered to cuf.on_device only when it came from the
cudadevice module. A program that declares on_device() itself, through
an
interface body or an EXTERNAL statement (for example with !$acc routine
seq),
got a plain call to on_device_ that nothing folded, and linking failed.
Move on_device into the regular CUDA intrinsic handler table and drop
the
separate BIND(C) table. Remove bind(c) from the on_device interface in
the
cudadevice module, since the handler now does the lowering and the
binding
label is no longer used.
In a CUDA Fortran or OpenACC compilation, look up the CUDA intrinsic
handlers
for a reference to an external procedure that is only declared (by an
interface body or an EXTERNAL statement) and not defined in the
compilation
unit. Dummy procedures, procedure pointers, procedures with a binding
label,
and procedures defined in the same file keep their normal call.
Commit: 6bd33ddfc3cc0cb2278b7f30d349b38475a3e607
https://github.com/llvm/llvm-project/commit/6bd33ddfc3cc0cb2278b7f30d349b38475a3e607
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Option/OptTable.h
M llvm/include/llvm/Option/Option.h
M llvm/lib/Option/OptTable.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[Option] Shrink Info from 24 to 16 bytes (#227582)
Move Flags, Visibility, and Param (getNumArgs() for `MultiArg`) into
`InfoExtra` and narrow `PrefixesOffset` to 8 bits. Outside clang, Flags
and Visibility take a handful of values per table; clang has 436
distinct InfoExtra rows for 3871 options.
clang's Info and InfoExtra tables shrink from 96,968 to 72,400 bytes.
LLM-aided
Commit: cb23668ed2c1a876db0eb0284b7aa15e0b1258d4
https://github.com/llvm/llvm-project/commit/cb23668ed2c1a876db0eb0284b7aa15e0b1258d4
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-libstdcxx.yml
M .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx/build-at-commit/action.yml
Log Message:
-----------
[libc++] Inline the build-at-commit composite action into the benchmark workflows (#227750)
Yet another twist in the endless saga of setting up performance
benchmarking infrastructure for libc++. Since the recent switch to
Kubernetes runners, there are now two layers of "pods". First, there's
the runner pod which executes the Github action itself. It's the one
that loads the Docker image specified in the Github workflow and then
launches it.
Then, there's the workflow/job pod, which executes the actual Docker
image and the commands described in `steps` in the workflow file.
This causes problems because the workflow pod is the only one that has
access to the checked out monorepo (since it's checked out within the
running Docker container). This means the runner pod does not have
access to composite actions stored in the repository, which leads to
errors like:
Can't find 'action.yml', 'action.yaml' or 'Dockerfile' under '/home/runner/_work/<...>/libcxx/build-at-commit'.
IIUC, the consequence is that we can't use composite actions from these
runners, basically. Consequently, this patch goes back to hardcoding the
build-at-commit command in the benchmarking jobs.
Commit: bc7009760b8c4f6e4f603542cb5c24be46e87a81
https://github.com/llvm/llvm-project/commit/bc7009760b8c4f6e4f603542cb5c24be46e87a81
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/CIR/ABILowering.md
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
A clang/test/CIR/CodeGen/asm-label-redirect-variadic.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-avx.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect-variadic-virtual.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect-variadic.c
M clang/test/CIR/IR/invalid-call.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-variadic-call-test-target-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-indirect-variadic.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-variadic-nyi.cir
Log Message:
-----------
[CIR] Lower variadic arguments through an indirect call (#227477)
On x86_64, CallConvLowering now classifies an indirect call with
ellipsis arguments from its own operands, as it does a direct variadic
call. Those arguments stay out of the retyped callee's function type, as
in classic CodeGen.
The cir.call verifier now checks indirect calls against the callee
pointer's function type, and CIRGen's asm-label redirect keeps a
variadic declaration's ellipsis instead of dropping it.
Assisted-by: Claude Code / claude-opus-5-5
Commit: ebfc0d74c387a924e0f87e80e71468bbb2d506f3
https://github.com/llvm/llvm-project/commit/ebfc0d74c387a924e0f87e80e71468bbb2d506f3
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/test/Transforms/InstCombine/nonnull-select.ll
Log Message:
-----------
[InstCombine] Fix select combine with null_pointer_is_valid. (#227168)
When null_pointer_is_valid is set, make sure we don't treat an inbounds
gep of "ptr null" as poison.
While I'm here, also write out the justification of
simplifyNonNullOperand, since it's pretty unintuitive.
Fixes #227002
Commit: 268e5ba1d99152e5f00e1d8432969a6ba11245fd
https://github.com/llvm/llvm-project/commit/268e5ba1d99152e5f00e1d8432969a6ba11245fd
Author: Addmisol <addmisol9 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
A llvm/test/Transforms/InstCombine/icmp-eq-select-self.ll
Log Message:
-----------
[InstCombine] Fold icmp eq/ne X, select(icmp pred X, P, C1, C2) to set membership (#226756)
## Summary
- Add InstCombine fold for `icmp eq/ne X, select(icmp pred X, P, C1,
C2)` pattern
- Transforms self-referential select comparisons into simple set
membership tests
- Handles all icmp predicates (signed, unsigned) and commuted operands
## Details
When we have code like:
```llvm
%cond = icmp sgt i32 %x, 0
%s = select i1 %cond, i32 2, i32 0
%r = icmp eq i32 %x, %s
The comparison can only be true when X equals one of the select's constant arms. This patch recognizes when:
1. The select condition compares X with a constant P
2. C1 (true arm) satisfies the condition
3. C2 (false arm) does not satisfy the condition
And folds to (X == C1) | (X == C2) for eq, or (X != C1) & (X != C2) for ne.
```
## Proofs
Alive2 proofs:
- Basic case: https://alive2.llvm.org/ce/z/LMpt7A
- Generalized proof with symbolic constants:
https://alive2.llvm.org/ce/z/ZMrWVm
The generalized proof shows correctness for any C1, C2, P where C1
satisfies the condition and C2 does not.
Fixes https://github.com/llvm/llvm-project/issues/223249
---------
Signed-off-by: addmisol <addmisol9 at gmail.com>
Commit: ec86f8228e33176474d8f167037a0a028f137eb2
https://github.com/llvm/llvm-project/commit/ec86f8228e33176474d8f167037a0a028f137eb2
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/CodeGen/CGBuiltin.cpp
A clang/test/CodeGenHLSL/builtins/abs_mat.hlsl
A clang/test/SemaHLSL/BuiltIns/abs_mat-errors.hlsl
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/abs_mat.ll
Log Message:
-----------
[Matrix] Implement matrix support for the `abs` intrinsic (#227131)
Closes #184491.
This PR implements the matrix api for `abs` in `HLSLintrinsics.td`, adds
matrix codegen tests, matrix sema tests, and SPIRV matrix backend tests.
DirectX matrix backend tests were not added because no DirectX backend
changes were made.
Assisted-by: Claude Opus 4.8
Commit: a135d2f1a576f2fbf55e1b40796dbd8c652e52a2
https://github.com/llvm/llvm-project/commit/a135d2f1a576f2fbf55e1b40796dbd8c652e52a2
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Add Analysis dependency to LLVMToLLVMIRTranslation (#227785)
Fixes LLVMToLLVMIRTranslation bazel layering failure introduced in
commit 233a25d068a9, where LLVMToLLVMIRTranslation.cpp includes
llvm/Analysis/ConstantFolding.h.
Commit: adc6bbf0f3e433e4f5681180fb9aa79724eae6af
https://github.com/llvm/llvm-project/commit/adc6bbf0f3e433e4f5681180fb9aa79724eae6af
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
Log Message:
-----------
[CIR][NFC] Add missing enum elements to TypeInfoIsInStandardLibrary (#227781)
Fix warning for missing enum element in the TypeInfoIsInStandardLibrary
helper function after #224277 is merged
Commit: 7ae4aabf6d49ac1a3a5a9a6d7bc0e8778d66ee43
https://github.com/llvm/llvm-project/commit/7ae4aabf6d49ac1a3a5a9a6d7bc0e8778d66ee43
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad_int24.ll
M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/permute.ll
M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
A llvm/test/CodeGen/AMDGPU/phi-constant-operand-regclass.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
M llvm/test/CodeGen/AMDGPU/rem_i128.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
M llvm/test/CodeGen/AMDGPU/sink-fmul-fadd.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll
Log Message:
-----------
[SelectionDAG] Take phi op divergence from the op not the phi (#220853)
When creating registers for phi operands, take the type and the
IsDivergent bit from the operand not from the result of the phi node.
In practice this only affects AMDGPU and only affects constants used as
operands to a divergent phi. The effect is to put the constant into an
SGPR even if the result of the phi is a VGPR.
As well as fixing a correctness problem that arose when enabling
-structurizecfg-skip-uniform-regions, this has a small overall effect in
increasing SALU usage but reducing VALU usage. Overall register usage is
generally unaffected, except in some regalloc stress tests.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: bc5b9040d28773b03d4d9ec3ca50271bdf776d77
https://github.com/llvm/llvm-project/commit/bc5b9040d28773b03d4d9ec3ca50271bdf776d77
Author: Philipp Dominik Schubert <philipp.schubert at sonarsource.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
R clang/test/CodeGenCXX/attr-annotate-constructor.cpp
R clang/test/CodeGenCXX/attr-annotate-destructor.cpp
A clang/test/CodeGenCXX/attr-annotate-member-functions.cpp
Log Message:
-----------
[clang][CodeGen] Fix stack-use-after-return in deferred annotations (#226942)
CodeGenModule::DeferredAnnotations was keyed by StringRef, but not every
mangled name passed to GetOrCreateLLVMFunction outlives the call.
CodeGenVTables::maybeEmitThunk mangles the thunk name into a stack-local
SmallString and hands it to GetAddrOfThunk, so for an annotated virtual
function the map retained a reference into a frame that was gone by the
time EmitGlobalAnnotations looked the key up.
ASan reports this as a stack-use-after-return in EmitGlobalAnnotations,
with the freed frame being maybeEmitThunk's 'Name'. The user-visible
effect is that annotations silently disappear from the this-adjusting
thunks once the dead frame has been reused.
Make the key own its storage, using StringMap<unsigned> as the MapVector
map type so lookups still hash a StringRef without allocating.
The clang/test/CodeGenCXX/attr-annotate-member-functions.cpp test has
been created with help of an AI.
Commit: ce33479e64404b06eb2f34d83bbd58e4301c1908
https://github.com/llvm/llvm-project/commit/ce33479e64404b06eb2f34d83bbd58e4301c1908
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZclsd.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZilsd.td
M llvm/test/MC/RISCV/corev/XCVelw-invalid.s
M llvm/test/MC/RISCV/rv32d-invalid.s
M llvm/test/MC/RISCV/rv32f-invalid.s
M llvm/test/MC/RISCV/rv32q-invalid.s
M llvm/test/MC/RISCV/rv32zilsd-invalid.s
M llvm/test/MC/RISCV/rvi-pseudos-invalid.s
M llvm/test/MC/RISCV/rvzfhmin-invalid.s
M llvm/test/MC/RISCV/xqcilo-pseudos-invalid.s
Log Message:
-----------
[RISC-V][MC] Reject x0 as the address/temporary register for load/store pseudos (#227512)
Using the zero register as the destination for integer load pseudos or as
the temporary register for floating-point load and store pseudos is
illegal since it is used to synthesize the target address, and using x0
would mean the auipc/qc.e.li result is ignored and we access an invalid
location.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227512
Commit: 7d812d2b8aad397ed65a664ca2304500ba311b3f
https://github.com/llvm/llvm-project/commit/7d812d2b8aad397ed65a664ca2304500ba311b3f
Author: Zaara Syeda <syzaara at ca.ibm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/test/CodeGen/keep-inline-functions.cpp
M clang/test/CodeGenCXX/attr-used.cpp
Log Message:
-----------
[Clang] Retain constructor/destructor variants when symbol must be kept (#226572)
With -mconstructor-aliases, complete constructor and destructor variants
with discardable-if-unused linkage can be silently replaced in the IR
(RAUW) rather than emitted as distinct symbols. This prevents
-fkeep-inline-functions and `__attribute__((used))` from retaining the
complete (C1/D1) variants.
Skip RAUW when the declaration requires its symbol to be kept by
introducing structorSymbolMustBeRetained(), which returns true when`
__attribute__((used)) `is present or -fkeep-inline-functions is active
for an inline definition that is not available_externally.
Assisted-by: IBM Bob
Commit: 9ef03f1c32b41b7bcdfd02ea97559a6fadeb440b
https://github.com/llvm/llvm-project/commit/9ef03f1c32b41b7bcdfd02ea97559a6fadeb440b
Author: David Parks <djp at david-parks.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A flang-rt/include/flang-rt/runtime/array.h
M flang-rt/include/flang-rt/runtime/environment.h
R flang-rt/lib/runtime/array.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-server.cpp
A flang-rt/test/Runtime/fort_convert.f90
M flang/docs/RuntimeEnvironment.md
Log Message:
-----------
Flang improve fidelity of unformatted I/O endianness with FORT_CONVERT_UNIT (#223831)
Add further fidelity to specifying desired endianness of unformatted I/O
file on a per unit basis with the `FORT_CONVERT_UNIT` environment
variable.
To reviewers (friends) I'm not sure about:
1. The correct function prefixing for the FLANG runtime environment.
2. How to test/validate on Windows
3. How to test/validate with CUDA runtime support enabled
Thank you.
https://discourse.llvm.org/t/runtime-unformatted-i-o-conversion-between-big-and-little-endian-formats/91751
Documentation for new environment variable:
## `FORT_CONVERT_UNIT`
Determines the data conversion applied to specific unformatted I/O
units.
```
FORT_CONVERT_UNIT= mode | mode ';' exception | exception ;
mode: 'NATIVE' | 'LITTLE_ENDIAN' | 'BIG_ENDIAN' | 'SWAP';
exception: mode ':' unit_list | unit_list ;
unit_list: unit_spec | unit_list ',' unit_spec ;
unit_spec: integer | integer '-' integer ;
integer: [0-9]+ ;
```
The endianness of unformatted files is determined in the following
order:
1. The host processor's native endianness.
5. The setting of the `-fconvert=<mode>` flang compiler command-line
option.
6. The global setting from the `FORT_CONVERT=mode` or
`FORT_CONVERT_UNIT=mode`
environment variables. Contradictory mode settings between
`FORT_CONVERT` and
`FORT_CONVERT_UNIT` result in `FORT_CONVERT_UNIT` taking priority.
7. The explicit setting of the `CONVERT=` specifier in the `OPEN`
statement for
a particular unit.
8. The exception setting for an individual unit or range of units from
the
`FORT_CONVERT_UNIT` environment variable.
### Examples
* If the `FORT_CONVERT`, `FORT_CONVERT_UNIT`, and `CONVERT=` specifier
in the
`OPEN` statement are all missing, no data conversion is performed for
unformatted I/O; the host processor's native encoding is used.
* If the environment variable `FORT_CONVERT=BIG_ENDIAN` is set and no
`CONVERT=` specifier is present in the `OPEN` statement, input is
assumed to
be big-endian, and output is emitted in big-endian format.
* On a little-endian host, if the environment variable
`FORT_CONVERT=SWAP` is
set and the `CONVERT=LITTLE_ENDIAN` specifier is present in the `OPEN`
statement, the `OPEN` statement takes precedence: input is assumed to be
little-endian, and output is emitted in little-endian format.
* If unit 10 is opened on a little-endian host with the environment
variable
`FORT_CONVERT=SWAP`, `FORT_CONVERT_UNIT=BIG_ENDIAN:10`, and an `OPEN`
statement for unit 10 with the `CONVERT=LITTLE_ENDIAN` specifier, the
`BIG_ENDIAN:10` exception from the `FORT_CONVERT_UNIT` environment
variable
takes precedence: input is assumed to be big-endian, and output is
emitted
in big-endian format.
### Notes
1. `<mode>` values specified with the runtime environment variables
`FORT_CONVERT` or `FORT_CONVERT_UNIT` are case-insensitive.
2. `<mode>` values specified with the flang command-line option
`-fconvert=<mode>` are case-sensitive and include:
`mode: 'native' | 'little-endian' | 'big-endian' | 'swap';`
3. `unit_spec` supports ranges separated by a hyphen. Ranges must denote
positive unit numbers, and the starting unit (LHS) must be less than or
equal
to the ending unit (RHS).
4. Unit numbers and ranges can be specified multiple times with
different
`modes`, with the last (rightmost) `exception` taking priority. For
example:
`FORT_CONVERT_UNIT="LITTLE_ENDIAN:10,11,15-20;BIG_ENDIAN:19"`
The conversion for unit 19 will be `BIG_ENDIAN`.
5. If an `exception` is not prefixed with `mode:`, `mode` is assumed to
be
`BIG_ENDIAN`. For example:
`FORT_CONVERT_UNIT="20-25;LITTLE_ENDIAN:26-27"`
Regardless of the host processor's endianness, units 20 through 25 will
be
treated as big-endian for both input and output, while units 26 and 27
will be
treated as little-endian for both input and output.
---------
Co-authored-by: Slava Zakharin <szakharin at nvidia.com>
Commit: a146f7b20f870c3241e92da680ae2af81863a9cc
https://github.com/llvm/llvm-project/commit/a146f7b20f870c3241e92da680ae2af81863a9cc
Author: Benjamin Kramer <benny.kra at googlemail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes for commit b8afba677502 (#227808)
Add missing //llvm:CodeGen, //llvm:Core, and //llvm:Demangle
dependencies to clang:codegen_utils, and add :codegen_utils to
clang:cir_frontend_action.
Commit: 1641cf35d5c2df2f2ca39b710ff4ced4f011d98f
https://github.com/llvm/llvm-project/commit/1641cf35d5c2df2f2ca39b710ff4ced4f011d98f
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[Bazel] Fix dependencies for codegen_utils and cir_frontend_action (#227812)
Fixes bazel build failure introduced in commit b8afba677502:
- Added //llvm:CodeGen, //llvm:Core, and //llvm:Demangle to
codegen_utils deps for BackendDiagnosticHandler.
- Added :codegen_utils to cir_frontend_action deps as CIRGenAction.cpp
includes clang/CodeGenUtils/BackendDiagnosticHandler.h.
Commit: 27d52f9b7efbc36e0ccd5a5fab955962e8a24e5d
https://github.com/llvm/llvm-project/commit/27d52f9b7efbc36e0ccd5a5fab955962e8a24e5d
Author: Michael Park <mcypark at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
A llvm/test/ThinLTO/X86/type_test_no_vtable.ll
Log Message:
-----------
[WPD] Remove type test assumes through PHI and select nodes (#224155)
Commit: d815ce2a54bf99adecdf5b1c2fca58057599bd35
https://github.com/llvm/llvm-project/commit/d815ce2a54bf99adecdf5b1c2fca58057599bd35
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/tools/llubi/intr_int_arith.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Add support for [su]mulh (#227801)
Commit: c822c7678cc5d317813ab851d71d687f041b1b57
https://github.com/llvm/llvm-project/commit/c822c7678cc5d317813ab851d71d687f041b1b57
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
M llvm/test/CodeGen/AMDGPU/slp-int-to-fp.ll
Log Message:
-----------
[AMDGPU] Model the cost of the expanded integer to/from floating point casts (#223572)
No instruction converts to or from a 64 bit integer, and narrow vector lanes are converted one at a time. Price these expansions by the FP64 rate, sdwa and 16 bit instruction support, and price i33 to i63 like i64 and bf16 like f32 plus rounding.
Assisted-by: Claude Code Opus 5
Commit: f2333935b119f4b6d05e09b93f15fc07c601a842
https://github.com/llvm/llvm-project/commit/f2333935b119f4b6d05e09b93f15fc07c601a842
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Frontend/FrontendOptions.h
M flang/include/flang/Parser/options.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
A flang/test/Parser/fixed-line-length-none-char-continuation.f
A flang/test/Parser/fixed-line-length-none-hollerith-continuation.f
Log Message:
-----------
[flang] Fix continued literals incorrect padding with -ffixed-line-length=none (#225051)
`-ffixed-line-length=none` and `=0` were implemented as a column limit
of 1000000. This led to `PadOutCharacterLiteral` inserting a million
blank characters when the flag was used. This PR fixes this by making
the `fixedFormColumns` param an optional type. No padding being inserted
is coherent with `gfortran`'s behavior when the equivalent flag is
passed.
Examples of Fujitsu test suite tests that trigger this behavior:
`0001_0073`, `0131_0048`, `0131_0052`, `0161_0003`.
NOTE: This also makes it so lines over one million characters don't get
silently truncated.
Commit: a9a9c8a8b85c0de6161b35cc3bf165458160b6c4
https://github.com/llvm/llvm-project/commit/a9a9c8a8b85c0de6161b35cc3bf165458160b6c4
Author: Demetrius Kanios <demetrius at kanios.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/EHPersonalities.h
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
Log Message:
-----------
[CodeGen][WebAssembly] Reserve a personality for the D language (#224883)
Now that #209282 is merged, languages/code may choose to create and use
personality functions other than `__gxx_wasm_personality_v0` on
WebAssembly. However said personality must still be
`isScopedEHPersonality` and recognized as a Wasm personality for
everything to function correctly.
This reserves a `EHPersonality::Wasm_D` (symbol
`_d_eh_personality_wasm`) for future use by the D programming language.
Commit: 3c7e3271a31891418af22f4dbddbb6949b1f8ec4
https://github.com/llvm/llvm-project/commit/3c7e3271a31891418af22f4dbddbb6949b1f8ec4
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/test/CIR/CodeGen/agg-atomic-cast.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
M clang/test/CIR/CodeGen/cast.c
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/union-agg-init.cpp
M clang/test/CIR/CodeGen/var-arg-aggregate.c
A clang/test/CIR/Transforms/abi-lowering/coerce-record-return-from-memory.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
Log Message:
-----------
[CIR] Coerce record returns from memory like CreateCoercedLoad (#227482)
Read a coerced record return straight from the alloca it was loaded
from. If that isn't possible, copy the record's bytes into a coercion
slot and read from there. Neither path stores the record as a value. A
union stored as a value keeps only its storage member and loses the
bytes that are padding in that member.
Assisted-by: Claude Code / Claude Opus 5.5
Commit: 6a0713e9129efe7e8b355e157a9a12aa8ac606b0
https://github.com/llvm/llvm-project/commit/6a0713e9129efe7e8b355e157a9a12aa8ac606b0
Author: Thurston Dang <thurston at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/AArch64/fp8-neon-fdot.ll
Log Message:
-----------
[msan][test] Add tests for Arm NEON fp8 fdot (#225230)
Forked from llvm/test/CodeGen/AArch64/fp8-neon-fdot.ll
These intrinsics are currently handled strictly. Future work should
propagate the shadows.
Commit: 5e85e1345fb7f64ae2ce85d5cd2c670e99e6f6cc
https://github.com/llvm/llvm-project/commit/5e85e1345fb7f64ae2ce85d5cd2c670e99e6f6cc
Author: Prashanth <ping at starone01.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
M mlir/test/Conversion/VectorToSCF/vector-to-scf.mlir
Log Message:
-----------
[mlir][vector] Fix VectorToSCF in-bounds check for negative indices (#224843)
generateInBoundsCheck used a signed comparison (sgt) to guard the
runtime in-bounds branch. A negative dynamic index satisfies the signed
comparison against the upper bound and is incorrectly treated as
in-bounds, permitting an out-of-bounds access.
Switch to an unsigned comparison (ugt): a negative value reinterpreted
as unsigned becomes larger than any valid bound, so the existing
upper-bound check alone now also correctly rejects negative indices.
Fixes #223258
Commit: 98507d56103ae4062c9b9406f8001a6d476dadfb
https://github.com/llvm/llvm-project/commit/98507d56103ae4062c9b9406f8001a6d476dadfb
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/test/SemaTemplate/concepts.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #216729 (#227778)
I sort of forgot that `template` was allowed in
non-template contexts...
Fixes #226663
Commit: 087e566be567c44a7e6ef68b3c986bd1f7b0b27f
https://github.com/llvm/llvm-project/commit/087e566be567c44a7e6ef68b3c986bd1f7b0b27f
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/constexpr-ptr-offset.cpp
M clang/test/CIR/CodeGen/global-ptr-init.cpp
M clang/test/CIR/CodeGen/globals.cpp
M clang/test/CIR/CodeGen/self-ref-temporaries.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
Log Message:
-----------
Revert "[CIR] Fix failing tests after #226904" (#227817)
Reverts llvm/llvm-project#227523
The tests this change was meant to fix were fixed in a different way by
https://github.com/llvm/llvm-project/pull/227651, so my change
reintroduced a CI failure rather than fixing one.
Commit: 4a7bd81a77fe1d55299f688fdf09399ad31bee3c
https://github.com/llvm/llvm-project/commit/4a7bd81a77fe1d55299f688fdf09399ad31bee3c
Author: Alison Zhang <alisonxzhang at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-mc/line_end_with_space.test
Log Message:
-----------
[llvm-mc][test] Fix line_end_with_space test portability for AIX (#226573)
AIX's `echo` does not support the `-n` flag, causing
`llvm/test/tools/llvm-mc/line_end_with_space.test` to fail
(https://lab.llvm.org/buildbot/#/builders/231/builds/1249). This patch
updates the test to use `printf` instead.
Prior to commit 1b1a935b6ff0, llvm-mc would exit 0 so the test passed.
Since that commit makes llvm-mc exit non-zero when `byteArrayFromString`
reports an error, the `-n` token printed by AIX's echo now causes the
test to fail.
Commit: 6302d8af34718726be567369c2ac76616ceb5e9f
https://github.com/llvm/llvm-project/commit/6302d8af34718726be567369c2ac76616ceb5e9f
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
A llvm/test/CodeGen/AMDGPU/post-ra-16bit-mov-folding-src-is-first-dst.ll
M llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
Log Message:
-----------
[AMDGPU] Fix v_mov_b16 pair merging when the second mov reads the first (#227502)
`SIPostRA16BitMovFolding` merges a lo16/hi16 `v_mov_b16` pair into one
32-bit instruction that reads both sources before writing the
destination. If the second mov reads the half written by the first, the
merged instruction sees the old value:
```
v_mov_b16 v1.h, 0
v_mov_b16 v1.l, v1.h
=> v_lshrrev_b32 v1, 16, v1
```
Skip the merge in that case. Also turn the EXEC-write assert in the scan
loop into a bail-out, since it does nothing in release builds.
This miscompiled rocPRIM, rocThrust and MIOpen kernels on gfx11 and
gfx12. The new `.ll` test is reduced from the rocPRIM int8 radix sort
kernel.
Assisted-by: Cursor
Commit: c8570422cabf2d34529c58350b13a6c6f1bbe76a
https://github.com/llvm/llvm-project/commit/c8570422cabf2d34529c58350b13a6c6f1bbe76a
Author: Michael Park <mcypark at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[WPD] Remove type test assumes through PHI and select nodes (#224155)
Commit: adbd59f4af87cccaa8a4f83c35d3ceb605c3e17c
https://github.com/llvm/llvm-project/commit/adbd59f4af87cccaa8a4f83c35d3ceb605c3e17c
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
A llvm/test/Transforms/PGOProfile/counter_promo_grow.ll
Log Message:
-----------
[PGO] Avoid dangling references when LoopToCandidates grows (#227579)
PGOCounterPromoter::promoteCandidates sinks profile counter load/store
updates out of a loop L to its exit blocks.
This patch fixes the following assertion failure (and a
heap-use-after-free in -DNDEBUG builds):
assert(LoopToCandidates.isPointerIntoBucketsArray(Ptr) &&
"References into LoopToCandidates might be invalid");
where LoopToCandidates is:
DenseMap<Loop *, SmallVector<LoadStorePair, 8>> &LoopToCandidates;
Without this patch:
Cand = {nullptr, nullptr};
attempts to update an element of SmallVector<LoadStorePair, 8> stored
inline inside a DenseMap bucket. The problem is that promoting L's
counter right before this assignment may insert the enclosing Loop * as
a new key into LoopToCandidates, triggering DenseMap::grow() and
invalidating Cand.
This patch fixes the issue by moving LoopToCandidates[&L] into a local
SmallVector in PGOCounterPromoter::run before promoting L's candidates,
allowing us to remove the assertion. Note that LoopToCandidates[&L] is
never accessed again after run() because loops are processed from
innermost to outermost.
The added test populates the initial 64-bucket LoopToCandidates map
with 47 entries, consisting of 46 simple loops and 1 nested loop whose
outer loop has no direct counter increment. Promoting the inner
loop's counter inserts the outer loop as the 48th entry, triggering
DenseMap::grow() at the 3/4 load factor threshold.
Assisted-by: Antigravity
Commit: 8673c6f2cda8ddb4363e58af8d773977454d51d8
https://github.com/llvm/llvm-project/commit/8673c6f2cda8ddb4363e58af8d773977454d51d8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/tools/CMakeLists.txt
Log Message:
-----------
[CMake] Give LLVM_EXTERNAL_PROJECTS installs a default component (#227799)
Summary:
These LLVM external projects are intended to be extension points for
extra utilitie shipped through LLVM. LLVM tries to provide dedicated
components to its targets, so we should create one by default in LLVM
for these external dependencies.
Commit: b60c46d11bd399f3bc9d4f1215ecc18ddae06484
https://github.com/llvm/llvm-project/commit/b60c46d11bd399f3bc9d4f1215ecc18ddae06484
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/epilogue-vectorization-printing.ll
Log Message:
-----------
[VPlan] Add epilogue VPlan print tests with AnyOf and FindIV (NFC) (#227827)
Add printing tests with epilogue loops with AnyOf and FindIV reductions.
They need special handling for their resume values, which is not
yet modeled in VPlan.
Commit: cd4a743905b27afafc26915091b29137e9d0c385
https://github.com/llvm/llvm-project/commit/cd4a743905b27afafc26915091b29137e9d0c385
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/test/CodeGen/X86/expand-large-fp-optnone.ll
A llvm/test/CodeGen/X86/fast-isel-dead-implicit-defs.ll
M llvm/test/CodeGen/X86/fast-isel-sext-dead-eflags.ll
Log Message:
-----------
FastISel: Mark implicit physreg defs dead when emitting instructions (#227598)
fastEmitInst_* callers only use the explicit result, so the implicit
physical register defs of the emitted instruction are unused.
InstrEmitter would mark these as dead, but fast isel would end up
relying on
later dead flag computation in LiveVariables or RegAllocFast.
The X86 with-overflow lowering is the one caller that reads an implicit
def, so handle that separately.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5f1a54781d8f984b5434060e9cd02775b0ec241a
https://github.com/llvm/llvm-project/commit/5f1a54781d8f984b5434060e9cd02775b0ec241a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[CMake] Give LLVM_EXTERNAL_PROJECTS installs a default component (#227799)
Summary:
These LLVM external projects are intended to be extension points for
extra utilitie shipped through LLVM. LLVM tries to provide dedicated
components to its targets, so we should create one by default in LLVM
for these external dependencies.
Commit: 1074dbabfe77d3a4422436afba8ed6fceaa8a4f4
https://github.com/llvm/llvm-project/commit/1074dbabfe77d3a4422436afba8ed6fceaa8a4f4
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/IR/invalid-matrix.cir
Log Message:
-----------
[CIR] Add Matrix transpose operation (#227372)
Add support for the built-in matrix transpose operation
Issue #221772
Commit: d4ab2ae81d5dd369d554873189e92b95de53ffef
https://github.com/llvm/llvm-project/commit/d4ab2ae81d5dd369d554873189e92b95de53ffef
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[CMake] Give LLVM_EXTERNAL_PROJECTS installs a default component (#227799)
Summary:
These LLVM external projects are intended to be extension points for
extra utilitie shipped through LLVM. LLVM tries to provide dedicated
components to its targets, so we should create one by default in LLVM
for these external dependencies.
Commit: 539b68e1888bba1db4545310b7b7286050c955b4
https://github.com/llvm/llvm-project/commit/539b68e1888bba1db4545310b7b7286050c955b4
Author: Arkadiusz Bokowy <arkadiusz.bokowy at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Do not set AtStartOfBlock if not check by test case (#227680)
Setting `KeepEmptyLines.AtStartOfBlock` to `false` in the
`RemovesEmptyLines` test case is misleading, because the check that
follows does not verify this option. It does not matter whether it is
set to `true` or `false`.
Commit: a0868d59ea99e56ddc60288878b63068af650ab1
https://github.com/llvm/llvm-project/commit/a0868d59ea99e56ddc60288878b63068af650ab1
Author: Arkadiusz Bokowy <arkadiusz.bokowy at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ClangFormatStyleOptions.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/Format/Format.h
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Add KeepEmptyLines.AtEndOfBlock option (#224223)
Add support for the AtEndOfBlock option in KeepEmptyLines configuration,
which controls whether empty lines are preserved before closing braces.
This feature works in pair with AtStartOfBlock for control of empty
lines at the beginning and end of blocks.
The default is false, which should maintain backward compatibility by
removing empty lines before closing braces. When set to true, empty
lines before closing braces are preserved respecting MaxEmptyLinesToKeep
limit.
Closes #22073 and #171003
Commit: 7fcd9732be7d03f2ae338a73953b3423afefc57c
https://github.com/llvm/llvm-project/commit/7fcd9732be7d03f2ae338a73953b3423afefc57c
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
A clang/test/CIR/CodeGen/cleanup-scope-label-attr-block.cpp
Log Message:
-----------
[CIR][CodeGen] Fix wrong destructor placement for label and attributed statements (#226194)
Currently, using this as a sample:
```cpp
#include <cstdio>
struct S {
~S() { puts("~S"); }
};
int main() {
my_label: {
S s;
}
puts("after block");
}
```
with `bin/clang++ test.cpp -fclangir -emit-llvm -S -o -`, in the IR, we
can see that `puts` is called first and the destructor is called
**_later_**. So, when this is built through ClangIR, the output is:
```
after block
~S
```
but it should be (through the OGCG):
```
~S
after block
```
This PR fixes the placement of the destructor, so the object is
destroyed at the end of the labeled block and not in the outer scope.
The bug also occurred for attributed statements (e.g. `[[likely]]`).
Added a lit test.
Commit: e1bcf98233962c26e3a82ae326fb2f8922e0635a
https://github.com/llvm/llvm-project/commit/e1bcf98233962c26e3a82ae326fb2f8922e0635a
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[RISC-V][MC] Reject x0 as the address/temporary register for load/store pseudos (#227512)
Using the zero register as the destination for integer load pseudos or as
the temporary register for floating-point load and store pseudos is
illegal since it is used to synthesize the target address, and using x0
would mean the auipc/qc.e.li result is ignored and we access an invalid
location.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227512
Commit: dd741af4ab7808634e071a8be78909ca22d40861
https://github.com/llvm/llvm-project/commit/dd741af4ab7808634e071a8be78909ca22d40861
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/inst-count-tie-reg-pressure.ll
Log Message:
-----------
[SLP][NFC]Add a test with the missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227860
Commit: f01fdbb2991a10ec7f02fecb3d30fcf4fc639db8
https://github.com/llvm/llvm-project/commit/f01fdbb2991a10ec7f02fecb3d30fcf4fc639db8
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
Log Message:
-----------
[AMDGPU] Price narrow integer to bfloat vector casts (#225342)
A vector lane of 9 to 15 or 17 to 31 bits converted to bfloat got the generic cost, which leaves out the rounding. Such a lane is converted to f32 first like any other narrow lane, so price it as the f32 conversion of the same source plus the rounding. Lanes of 8 and 16 bits keep their cost.
Commit: 4f2ac3dfb8c0ffe105849361ac4592c5325c5737
https://github.com/llvm/llvm-project/commit/4f2ac3dfb8c0ffe105849361ac4592c5325c5737
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/inst-count-tie-reg-pressure.ll
Log Message:
-----------
[SLP]Ignore the extracts in the instruction-count with high register pressure
In loops, the instruction-count check scales the tree entries by the
trip count, but not the extracts for the external users, so the extracts
just break the ties of the scaled counts.
With the fused fmul/fadd costing such ties reject the relaxation trees
of the reported kernel, the loop body stays scalar and spills. If more
values of the tree type are live in the block than there are registers,
ignore the extracts when they are the only reason to reject the tree.
Fixes the regression, reported in
https://github.com/llvm/llvm-project/pull/226117#issuecomment-5913566646
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227864
Commit: 82e4c9e0ac744a2c732ee8861b7162e04be75f6d
https://github.com/llvm/llvm-project/commit/82e4c9e0ac744a2c732ee8861b7162e04be75f6d
Author: UebelAndre <github at uebelandre.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Add `USE_CLANG_CL` for proper rules_cc toolchain resolution (#227859)
This change updates the `rules_cc` auto-configured toolchain to more
accurately represent a clang-cl toolchain.
Relates to: https://github.com/bazelbuild/rules_cc/pull/858
Commit: cf46406f7ebc929d422a549e739c34904f47232a
https://github.com/llvm/llvm-project/commit/cf46406f7ebc929d422a549e739c34904f47232a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV] Remove riscv_mulh_i32/riscv_mulhu_u32 intrinsics. (#227819)
These are redundant with the llvm.smulh/umulh intrinsics that were
recently added.
This changes codegen because smulh/umulh are currently generically type
legalized with extends+mul+srli instead of using pmulh(u).w. This isn't
always a regression. Sometimes we are able to prove the inputs are
already extended or we use mul(u).w00 and sometimes we needed a sext.w
after the pmulh(u).w. I will handle this as a follow up as it will
affect more tests.
Commit: 229b9b2f4e20840a8280174fa08385fd9e36844b
https://github.com/llvm/llvm-project/commit/229b9b2f4e20840a8280174fa08385fd9e36844b
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fminnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fadd.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fmul.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fsub.bf16.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Legalize odd bf16 vectors (#226707)
Simplify `moreElementsIf` and `clampMaxNumElements` to just
`clampMaxNumElementsStrict` for `MinNumMaxNumIeee` and `MinNumMaxNum`.
Use `clampMaxNumElementsStrict` for `FSubActions`. This is the only
functional change.
Add testing for v3bf16 and v5b16.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 642daaf27dd0cda7127d35bad1a3fe705a267918
https://github.com/llvm/llvm-project/commit/642daaf27dd0cda7127d35bad1a3fe705a267918
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/large-phi-search.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
A llvm/test/CodeGen/AMDGPU/optimize-compare-cselect.mir
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/s-cluster-barrier.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/setcc64.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Fold compares of S_CSELECT of two different constants (#227772)
If sX = S_CSELECT* A, B with A != B, then sX == A exactly when SCC was
set, so comparing sX with A or B recomputes SCC or its inverse:
s_cmp_eq_* sX, A => SCC s_cmp_lg_* sX, A => !SCC
s_cmp_eq_* sX, B => !SCC s_cmp_lg_* sX, B => SCC
Generalize optimizeCmpSelect to handle this for any pair of distinct
constants, instead of only S_CSELECT* (non-zero imm), 0 compared with 0.
Also try optimizeCmpSelect for S_CMP_EQ_U64.
This removes thousands of "s_cselect_b32 sN, 1, 0; s_cmp_lg_u32 sN, 1"
sequences from the AMDGPU codegen tests. They come from branches on an
inverted i1: the setcc against true is promoted to a compare with 1.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 9b617f8cd57f6c88e14c4a91f276d35f9af2dab6
https://github.com/llvm/llvm-project/commit/9b617f8cd57f6c88e14c4a91f276d35f9af2dab6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/test/CodeGen/MIR/Generic/basic-blocks.mir
A llvm/test/CodeGen/MIR/Generic/machine-basic-block-max-bytes-for-alignment-errors.mir
Log Message:
-----------
MIR: Serialize MachineBasicBlock::MaxBytesForAlignment (#227139)
Fix missing serialization of another field. The alignment was
already handled. The name is a bit verbose. Some places call it
"MaxSkip" which matches the name of the 2nd operand to the .p2align
directive this corresponds to.
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: ac7b7519445b8fddb382008b452ee48bffb75908
https://github.com/llvm/llvm-project/commit/ac7b7519445b8fddb382008b452ee48bffb75908
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/cmake/caches/Apple-lldb-macOS.cmake
M lldb/cmake/modules/AddLLDB.cmake
M lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
Log Message:
-----------
[lldb] Fix adding shared ScriptInterpreter libraries to LLDB.framework (#223782)
These libraries were already being added to the framework in the build
tree but installation rules were still putting it in `/lib`. I pulled
the Python and Lua logic into a separate function and changed the
install logic when LLDB_BUILD_FRAMEWORK is enabled.
Commit: ea0be90fd97a0cd0e927b427e08aa3539e830b57
https://github.com/llvm/llvm-project/commit/ea0be90fd97a0cd0e927b427e08aa3539e830b57
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/lib/Semantics/check-cuda.cpp
A flang/test/Semantics/CUDA/cuf-managed-component-rhs.cuf
Log Message:
-----------
[flang][cuda] Count managed symbols per component chain in assignment check (#227825)
The check for a device to host transfer with more than one device object
on the right hand side compares the number of unique device symbols with
the number of managed or unified symbols, to allow the case where every
object is managed. The two counts were computed differently: device
symbols are counted once per component chain, while managed symbols were
counted individually. When both a derived type object and its component
are managed, the component chain contributed one device symbol but two
managed symbols, so the counts never matched and a valid assignment was
rejected:
```
type(t), managed, allocatable :: s(:) ! t has a managed component a
real, managed, allocatable :: b(:,:), c(:,:)
x = (b(i,j) - s(1)%a(i,j)) * c(i,j)
! error: More than one reference to a CUDA object on the right hand
! side of the assignment
```
This shows up with -gpu=mem:managed, where allocatable variables and
components are implicitly managed.
Count managed or unified symbols from the same per-chain set used for
device symbols, so the two counts can be compared.
Commit: e61a355ea7dad6311139bef70e0562d75c6fed1c
https://github.com/llvm/llvm-project/commit/e61a355ea7dad6311139bef70e0562d75c6fed1c
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/test/integration/src/pthread/pthread_equal_test.cpp
Log Message:
-----------
[libc] Handle PTHREAD_NULL in pthread_equal (#227856)
POSIX.1-2024 specifies that pthread_equal must accept PTHREAD_NULL for
either or both arguments. Previously, Thread::operator== dereferenced
attrib->tid, which crashed when passed a null or zero-initialized
pthread_t.
Compare Thread::attrib pointers directly in an inline constexpr
operator== in thread.h, matching how Thread::join and
pthread_getunique_np identify threads. Added PTHREAD_NULL test cases to
pthread_equal_test and updated file headers in the touched files.
Assisted-by: Automated tooling, human reviewed.
Commit: b74b3ebf94c4cae14edf1fcbe6078690e14f093c
https://github.com/llvm/llvm-project/commit/b74b3ebf94c4cae14edf1fcbe6078690e14f093c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
R llvm/include/llvm/Analysis/SyntheticCountsUtils.h
M llvm/lib/Analysis/CMakeLists.txt
R llvm/lib/Analysis/SyntheticCountsUtils.cpp
Log Message:
-----------
[Analysis] Delete SyntheticCountsUtils (#227741)
This isn't used anywhere, presumably getting dropped after we deleted
much of the rest of the synthetic profile infrastructure.
Commit: 4336fef7b86f086b62739448f33ceccce4dbdaa3
https://github.com/llvm/llvm-project/commit/4336fef7b86f086b62739448f33ceccce4dbdaa3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/split-node-reused-phi-insertion-point.ll
Log Message:
-----------
[SLP]Do not pre-cache the last instruction for split nodes
Their insertion point depends on the vector values of the already emitted
nodes, pre-caching may place them before the values they use.
Fixes https://godbolt.org/z/evG5Tba4j
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227878
Commit: a67f4353a08c319a7fef6da1cc0dc9f24e22fa10
https://github.com/llvm/llvm-project/commit/a67f4353a08c319a7fef6da1cc0dc9f24e22fa10
Author: Daniel Donenfeld <ddonenfeld at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/test/CodeGen/NVPTX/intr-range.ll
A llvm/test/Transforms/InstCombine/NVPTX/intrinsic-range.ll
Log Message:
-----------
[NVPTX] Add range attributes for cluster rank intrinsics to preserve signed non-negativity (#224727)
Adds `range` properties in `IntrinsicsNVVM.td` for:
* `llvm.nvvm.read.ptx.sreg.cluster.ctarank`
* `llvm.nvvm.read.ptx.sreg.cluster.nctarank`
The CTA rank is encoded in a single byte within a shared pointer, so the
max value of ctarank is 255 and the number of CTAs is one greater. This
enables InstCombine to apply signed-division optimizations (e.g. sdiv X,
16 -\> shift-based form) that require X \>= 0.
---------
Co-authored-by: Alex MacLean <amaclean at nvidia.com>
Commit: 17065e8ad007fa47db2e8541ba00b4fe06cd0205
https://github.com/llvm/llvm-project/commit/17065e8ad007fa47db2e8541ba00b4fe06cd0205
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/docs/ReleaseNotes.rst
M polly/lib/Transform/MatmulOptimizer.cpp
A polly/test/ScheduleOptimizer/pattern-matching-based-opts-packed-arrays.ll
Log Message:
-----------
[Polly] Allocate packed arrays of matrix multiplication on heap (#226163)
Problem: The matrix multiplication optimization copies blocks of its
operands into the arrays Packed_A and Packed_B. Their sizes are derived
from the cache parameters rather than from the operands; with the
default parameters, Packed_B takes 4 MiB even for a 100x100 product.
They are allocated with alloca in the entry block of the function, so
two optimized multiplications in one function exceed the default 8 MiB
stack: two products of 100x100 int32 matrices declared as VLAs and
inlined into main crash with a segmentation fault.
Solution: Allocate a packed array on the heap, with malloc at the start
of the SCoP and free at its exit, only if it is larger than
-polly-pattern-matching-max-stack-array-size (1 MiB by default), and
keep smaller ones on the stack. -1 keeps all of them on the stack, 0
puts all of them on the heap. With the default parameters, Packed_B goes
to the heap and Packed_A (192 KiB) stays on the stack.
Default size depends only on the cache parameters. The default
parameters are 32 KiB L1 and 256 KiB L2, both 8-way: the X86 TTI reports
these for every CPU, and they are the Polly defaults for targets whose
TTI reports none. With them, for gemm with float and double on x86-64
(generic, skylake-avx512, znver4) and AArch64 (generic, neoverse-v2), I
get:
- Packed_A: 192 KiB in all cases. It is sized to fit into the L2 cache
and takes at most (1 - 2/associativity) of it.
- Packed_B: 3 to 4 MiB. It holds 256
(-polly-pattern-matching-nc-quotient) micro-panels sized for the L1
cache.
Two Packed_B already exceed the default 8 MiB stack, so Packed_B has to
go to the heap, while Packed_A fits on the stack, like any threshold
from 192 KiB to 3 MiB. I chose 1 MiB because it also keeps Packed_A on
the stack if the L2 parameters are set for current CPUs with up to about
1.25 MiB of L2 (768 KiB for 1 MiB 8-way, 1 MiB for 1.25 MiB 10-way). It
also limits each array on the stack to 1/8 of the default 8 MiB stack of
Linux and macOS.
Assisted-by: Claude (Anthropic)
Commit: 66813bafefc24420a0a7f8fed0aef775f56c71a8
https://github.com/llvm/llvm-project/commit/66813bafefc24420a0a7f8fed0aef775f56c71a8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86LFIRewritePass.cpp
A llvm/test/CodeGen/X86/lfi-align-sjlj.ll
Log Message:
-----------
X86: Remove redundant SJLJ landing pad alignment in X86LFIRewritePass (#227295)
X86LFIRewritePass separately scanned for blocks holding a call site's landing pad label.
With SJLJ exception handling the dispatch block reaches those blocks through an indirect
jump, and they are no longer marked as EH pads by the time this pass runs, so they would
otherwise be missed.
EmitSjLjDispatchBlock puts those blocks in a jump table, so they are already aligned as jump
table targets. Dropping it removes the use of the TargetOptions exception model field from
this in preparation for its removal.
The new test checks the landing pad alignment, which was previously untested.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 1c5f27be3fa4b965ecc040bcf212e0a5fc6cceb2
https://github.com/llvm/llvm-project/commit/1c5f27be3fa4b965ecc040bcf212e0a5fc6cceb2
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/lib/FileCheck/FileCheck.cpp
Log Message:
-----------
[FileCheck] Inline destructors to avoid missing symbols with hidden visibility (#225978)
Commit: 982cf1a388ff1b2f0dea7ae11ab8e15d4820a343
https://github.com/llvm/llvm-project/commit/982cf1a388ff1b2f0dea7ae11ab8e15d4820a343
Author: Justin Stitt <justinstitt at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/docs/UsersManual.md
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/VarBypassDetector.cpp
M clang/lib/CodeGen/VarBypassDetector.h
A clang/test/CodeGen/trivial-auto-var-init-bypass.c
M clang/test/CodeGenCXX/trivial-auto-var-init.cpp
Log Message:
-----------
[Clang] Initialize bypassed variables w/ trivial-auto-var-init (#181937)
When -ftrivial-auto-var-init=zero or -ftrivial-auto-var-init=pattern is
enabled, variables whose declarations are bypassed by goto or switch
statements were silently left uninitialized. This patch ensures they are
initialized, matching GCC 16's behavior.
The initialization is emitted at the jump source rather than the jump
target. This ensures correctness in loops: a goto whose source and
destination are both inside the variable's scope does not spuriously
reinitialize it, while a goto that actually bypasses the declaration
does. For computed gotos (where jump sources cannot be determined
statically), we fall back to initializing in the entry block.
The simplest example of the old behavior is:
```c
switch (x) {
int y;
case 1:
return y; // y is used but never initialized under -ftrivial-auto-var-init=
};
```
... and with this PR we ensure `y` is initialized by hoisting the
`-ftrivial-auto-var-init=` store to the jump site.
This PR came about after discussion on
https://github.com/llvm/llvm-project/pull/178318 revealed the
discrepancies between trunk Clang and GCC16 when handling these
"bypassed" variable declarations under `-ftrivial-auto-var-init=`. We'll
probably end up closing that PR as this one renders it pointless.
Fixes: https://github.com/KSPP/linux/issues/125
Signed-off-by: Justin Stitt <justinstitt at google.com>
Commit: 0a9f172d35d472b2b421a6aae19f6aae9e40b805
https://github.com/llvm/llvm-project/commit/0a9f172d35d472b2b421a6aae19f6aae9e40b805
Author: Daniil Dudkin <unterumarmung at yandex.ru>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaCXX/constexpr-call-stack.cpp
A clang/test/SemaCXX/constexpr-float-call-stack.cpp
Log Message:
-----------
[clang] Avoid stack exhaustion in recursive `constexpr` calls (#201706)
Guard constexpr function-call evaluation with
`runWithSufficientStackSpace` so deeply recursive calls use a fresh
stack before exhausting the current one. This prevents crashes during
both constexpr analysis and constant folding during LLVM IR generation,
including recursive floating-point expressions.
Fixes #201418
Fixes #200673
Assisted by Codex.
Commit: 440d6f7efda64c220231a0ca1280bc810bec22db
https://github.com/llvm/llvm-project/commit/440d6f7efda64c220231a0ca1280bc810bec22db
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
A flang/test/Fir/CUDA/cuda-data-transfer-char-len.fir
Log Message:
-----------
[flang][cuda] Keep length parameters when boxing in data transfer conversion (#227883)
When lowering cuf.data_transfer, CUFOpConversion creates descriptors for
non-descriptor operands in emboxSrc, emboxDst and asHLFIREntity. The
shape
was taken from the defining fir.declare/hlfir.declare, but the length
type
parameters were dropped. For a character entity with a non-constant
length
(e.g. an automatic `character(len=l) :: str(n)` assigned to a managed or
device array), this produced a fir.embox of !fir.char<1,?> without
typeparams, which later hit the `!lenParams.empty()` assertion in
EmboxCommonConversion::getCharacterByteSize during FIR to LLVM codegen.
Retrieve the type parameters from the declare alongside the shape and
pass
them when creating the box. Lengths already present in the type are
elided,
matching FirOpBuilder::createBox.
Commit: b4643ba5638f1b906a39120b1f48164aa879089f
https://github.com/llvm/llvm-project/commit/b4643ba5638f1b906a39120b1f48164aa879089f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Lower/ConvertVariable.cpp
M flang/test/Lower/CUDA/cuda-derived.cuf
Log Message:
-----------
[flang][cuda] Do not use cuf.alloc for derived-type function results (#227863)
Local variables of a derived type with device allocatable components
are allocated in managed memory with cuf.alloc/cuf.free. This also
applied to function results, but the storage of a derived-type function
result is replaced by the caller-provided buffer in the AbstractResult
pass. Allocating it with cuf.alloc is therefore incorrect, and the
matching cuf.free would release memory that is returned to the caller.
Skip function results in needCUDAAlloc so that they are lowered to a
regular fir.alloca. Explicit device/managed/shared/pinned attributes
on the symbol are still honored.
Commit: 2a93d3d75630341539a5495ea07b6a0782eaebf7
https://github.com/llvm/llvm-project/commit/2a93d3d75630341539a5495ea07b6a0782eaebf7
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
A llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-i64-sm20.ll
Log Message:
-----------
[NVPTX] Support native 64-bit atomic add/sub pre-SM32 (#222471)
64-bit min/max/and/or/xor require SM32 but add/sub don't.
Commit: 087e855e4c28089966c1d404c99508b350f95769
https://github.com/llvm/llvm-project/commit/087e855e4c28089966c1d404c99508b350f95769
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
Log Message:
-----------
AMDGPU: Update test after serializing max-bytes-for-alignment (#227895)
Test added after initial PR
Commit: 595f4e166be28797c21db13cf460d6226eec49dc
https://github.com/llvm/llvm-project/commit/595f4e166be28797c21db13cf460d6226eec49dc
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Fix GTE operator typo in formatter_bytecode.py (#224767)
Commit: 578ddf9bc058836131d53c4ac30d4b22ec8bf3b1
https://github.com/llvm/llvm-project/commit/578ddf9bc058836131d53c4ac30d4b22ec8bf3b1
Author: Daniel Paoliello <danpao at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaARM.cpp
M clang/test/Sema/builtins-microsoft-arm64.c
Log Message:
-----------
[clang][AArch64] Fix range check for _Read/_WriteStatusReg (#227052)
PR #187290 added a range check of `[0x4000, 0x7fff]` to the
`_ReadStatusReg` and `_WriteStatusReg` builtins. Since `op0 == 2`
registers have bit 14 clear and encode below 0x4000, that check was
incorrect.
This change widens the range back to `[0x0, 0x7fff]` and adds a
regression test.
Fixes #226777
Assisted by: Claude Opus 5 (via VS Code).
Commit: 1c7ca866e4a3fc1c983d055d4526edcc7871cedb
https://github.com/llvm/llvm-project/commit/1c7ca866e4a3fc1c983d055d4526edcc7871cedb
Author: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgRelayoutOps.td
M mlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/BlockPackMatmul.cpp
M mlir/lib/Dialect/Linalg/Transforms/DataLayoutPropagation.cpp
M mlir/lib/Dialect/Linalg/Transforms/PackAndUnpackPatterns.cpp
M mlir/lib/Dialect/Linalg/Transforms/TilingInterfaceImpl.cpp
M mlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/test/Dialect/Linalg/transform-lower-pack.mlir
M mlir/test/Dialect/Linalg/transform-op-pack.mlir
Log Message:
-----------
[mlir][linalg] Document and diagnose pack/unpack memref limits (#225773)
Scoped down from the [original
RFC](https://discourse.llvm.org/t/rfc-transformation-support-for-linalg-pack-linalg-unpack-on-memrefs/91832)
per discussion in #225650.
- Replace/add the `// TODO: Support Memref Pack/UnPackOp...` comment
across all sites with a comment stating the actual invariant, pointing
to #225650 for the reasoning.
- Document the invariant in the `Linalg_PackOp`/`Linalg_UnPackOp`
descriptions.
- Emit a dedicated diagnostic from `structured.pack`, `lower_pack`,
`lower_unpack`, and tiling when the target has memref operands, instead
of a generic/silent failure.
- Add test coverage for the new diagnostics, previously untested.
---------
Signed-off-by: Federico Bruzzone <federico.bruzzone.i at gmail.com>
Commit: 7afdf831920a0b01aef1b4e39ce1a918d7b1c139
https://github.com/llvm/llvm-project/commit/7afdf831920a0b01aef1b4e39ce1a918d7b1c139
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/save-core/TestDAP_save_core.py
Log Message:
-----------
[lldb-dap][test] Let tests run under both stdio and server adapter modes (#227435)
Add create_debug_adapter(), which picks stdio or server mode based on
self.run_as_server. This allows tests to run under both modes when
toggling `LLDBDAP_RUN_AS_SERVER`, rather than being pinned to stdio.
Commit: fa45fecae6bb18a24a9ff0aaa674fb80b83ceccc
https://github.com/llvm/llvm-project/commit/fa45fecae6bb18a24a9ff0aaa674fb80b83ceccc
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
A clang/test/CIR/CodeGenSYCL/embed-offload-object.cpp
A clang/test/CIR/CodeGenSYCL/gpu-rdc-mangled-name.cpp
A clang/test/CIR/CodeGenSYCL/sycl-external.cpp
Log Message:
-----------
[CIR][SYCL] Enable relocatable device code for SYCL (#226596)
Emit `sycl_external` functions with sycl-module-id, allow -fgpu-rdc
mangling, and embed offload objects in the host.
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: f1ad1f04e39a0f49ff9d9b78fba895a7102ef765
https://github.com/llvm/llvm-project/commit/f1ad1f04e39a0f49ff9d9b78fba895a7102ef765
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Interfaces/ValueBoundsOpInterface.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize-analysis.mlir
Log Message:
-----------
[mlir][ValueBounds] Skip analysis for identical slice components (#226894)
One-Shot Bufferize repeatedly compares subset slices whose offsets,
sizes, and strides often reuse the same SSA values and attributes. Avoid
constructing a ValueBounds constraint set when the two OpFoldResults are
already identical, while preserving the existing solver fallback for
distinct values.
Commit: 77489c05e1c327e4acc7047fb7b3eebf114e02b0
https://github.com/llvm/llvm-project/commit/77489c05e1c327e4acc7047fb7b3eebf114e02b0
Author: Aaditya Agarwal <aadityaagarwal894 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/IR/BufferizationOps.cpp
M mlir/lib/Dialect/Bufferization/Transforms/FuncBufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir
M mlir/test/Dialect/Bufferization/canonicalize.mlir
Log Message:
-----------
[MLIR][Bufferization] Fix IdentityLayoutMap allocation at function boundaries (#227253)
Resolves silent data corruption when passing subviews across function
boundaries under `LayoutMapOption::IdentityLayoutMap`.
### The Problem
When the `IdentityLayoutMap` option is specified for function boundary
bufferization, all function parameters are expected to have a fully
contiguous, zero-offset layout. However, if a caller passes a non-unit
stride or offset view (e.g. the result of `tensor.extract_slice`), the
bufferization pass incorrectly lowered this to a `memref.cast`.
Since `memref.cast` strips layout metadata but leaves the base pointer
unchanged, this caused silent wrong-value loads in the callee (reading
from offset 0 regardless of the actual dynamic offset).
### The Solution
This patch intercepts the operand materialization logic in
`FuncBufferizableOpInterfaceImpl.cpp` (specifically during `CallOp`
bufferization). It introduces an explicit layout compatibility check:
- If the source buffer type has a non-identity layout, **AND**
- The destination buffer type requires an identity layout (due to
`IdentityLayoutMap`),
The pass now forces a deep copy instead of a cast. It actively extracts
the dynamic extents from the destination shape, uses the user-defined
`BufferizationOptions::allocationFn` to materialize a fresh contiguous
buffer, and then invokes `BufferizationOptions::memCpyFn` to copy the
data safely.
### Testing
- Added a minimal reproducer to
`mlir/test/Dialect/Bufferization/Transforms/one-shot-module-bufferize.mlir`
that validates an allocation and copy are emitted rather than an illegal
`memref.cast`.
Fixes #83276
Co-authored-by: openhands <openhands at all-hands.dev>
Commit: 080f929e6df7b59f775a0f13f13a11960af0cc98
https://github.com/llvm/llvm-project/commit/080f929e6df7b59f775a0f13f13a11960af0cc98
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/workflows/release-binaries.yml
Log Message:
-----------
[Github] Automatically derive python version in release-binaries (#227795)
Makes updating the python version easier, especially for renovate.
Assisted By: LLM
Commit: 2a1a6d12b51e7d2abe72d796c3efafc249792a0c
https://github.com/llvm/llvm-project/commit/2a1a6d12b51e7d2abe72d796c3efafc249792a0c
Author: Mend Renovate <bot at renovateapp.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies (#226856)
This PR contains the following updates:
| Package | Type | Update | Change |
|---|---|---|---|
|
[actions/attest-build-provenance](https://redirect.github.com/actions/attest-build-provenance)
| action | minor | `v4.1.1` → `v4.2.2` |
| [docker/login-action](https://redirect.github.com/docker/login-action)
| action | minor | `v4.4.0` → `v4.6.0` |
|
[github/codeql-action](https://redirect.github.com/github/codeql-action)
| action | minor | `v4.37.0` → `v4.38.2` |
|
[hendrikmuhs/ccache-action](https://redirect.github.com/hendrikmuhs/ccache-action)
| action | patch | `v1.2.23` → `v1.2.24` |
|
[ossf/scorecard-action](https://redirect.github.com/ossf/scorecard-action)
| action | patch | `v2.4.3` → `v2.4.4` |
|
[pypa/gh-action-pypi-publish](https://redirect.github.com/pypa/gh-action-pypi-publish)
| action | patch | `v1.14.0` → `v1.14.2` |
| [python](https://redirect.github.com/actions/python-versions) |
uses-with | patch | `3.14.6` → `3.14.7` |
|
[zizmorcore/zizmor-action](https://redirect.github.com/zizmorcore/zizmor-action)
| action | patch | `v0.6.2` → `v0.6.4` |
---
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: e14b35b1cb309ea2beb2e027a52c36d1f1b33605
https://github.com/llvm/llvm-project/commit/e14b35b1cb309ea2beb2e027a52c36d1f1b33605
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/DropEquivalentBufferResults.cpp
M mlir/test/Dialect/Bufferization/Transforms/drop-equivalent-buffer-results.mlir
Log Message:
-----------
[mlir][bufferization] Make equivalent result removal order-independent (#227752)
After bufferization, in-place tensor results commonly become memref
results that are equivalent to function arguments. These results are
redundant and should be removed before later calling-convention
conversions such as buffer-results-to-out-params.
DropEquivalentBufferResults currently visits each function once in
module order. If a caller precedes its callee, rewriting the callee can
expose an equivalent result in the caller after it has already been
visited. This makes the transformation depend on function order and may
require running the pass repeatedly.
Use a caller-driven worklist to revisit affected functions until no more
results can be dropped. Refresh stored call operations after rewriting
them so recursive call graphs can also converge safely. Termination is
guaranteed because each propagation step is triggered by removing a
function result.
Add regression coverage for a caller-before-callee case and for a
recursive function where rewriting a self-call exposes another
equivalent result.
Fixes #226940.
Commit: e00ff4440bb6c30621b33e3b90f92547f79a71ff
https://github.com/llvm/llvm-project/commit/e00ff4440bb6c30621b33e3b90f92547f79a71ff
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/SparseTensor/Transforms/Passes.td
A mlir/test/Dialect/SparseTensor/stage_sparse_ops.mlir
Log Message:
-----------
[mlir][sparse] Register bufferization dialect in stage pass (#227550)
StageSparseOperations may create bufferization.dealloc_tensor while
staging conversions. Register the dialect as a pass dependency and add a
standalone regression test.
Commit: 3743a27e0c75e19c28478a4a9248e0bab68f3347
https://github.com/llvm/llvm-project/commit/3743a27e0c75e19c28478a4a9248e0bab68f3347
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg-sm60.ll
M llvm/test/CodeGen/NVPTX/cmpxchg.ll
Log Message:
-----------
[NVPTX] Properly support acquire/release/acq_rel atomics pre-SM70 by emitting membars (#222449)
acquire/release/acq_rel are not supported semantics on pre-SM70 atomics.
We need to implement these by relaxing the atomic to "relaxed" and then
surounding it with membars. This makes the atomic sequentially
consistent, which is a superset of acquire-release behavior. We already
do this for pre-SM70 atomic that cmpxchg expand, just not for atomics
that otherwise are natively supported.
Commit: 4350d12c88cd947c3fb2b5e0bd4b22804e98a586
https://github.com/llvm/llvm-project/commit/4350d12c88cd947c3fb2b5e0bd4b22804e98a586
Author: Yusuke MINATO <minato.yusuke at fujitsu.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang-rt/lib/runtime/product.cpp
M flang-rt/unittests/Runtime/Reduction.cpp
Log Message:
-----------
[flang-rt] Consider NaN and the signedness of zero for PRODUCT (#226918)
Currently, the result of PRODUCT can be calculated in three places:
1. Constant folding in Semantics
2. The runtime library
3. Inlined code
However, only the runtime ignores NaN and the signedness of zero. This patch
fixes this discrepancy.
Fixes #211437
---------
Co-authored-by: Eugene Epshteyn <eepshteyn at nvidia.com>
Commit: 17fdd96472a946ebc7ddf7bc19e1458c4aa8aaea
https://github.com/llvm/llvm-project/commit/17fdd96472a946ebc7ddf7bc19e1458c4aa8aaea
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
A llvm/include/llvm/Option/LibraryOptions.h
A llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/Support/CommandLine.h
A llvm/lib/CGData/CGDataOptions.cpp
A llvm/lib/CGData/CGDataOptions.h
A llvm/lib/CGData/CGDataOptions.td
M llvm/lib/CGData/CMakeLists.txt
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/Option/CMakeLists.txt
A llvm/lib/Option/LibraryOptions.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Option/CMakeLists.txt
A llvm/unittests/Option/LibraryOptionsTest.cpp
A llvm/unittests/Option/LibraryOpts.td
M llvm/unittests/Support/CommandLineTest.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/CGData/BUILD.gn
M llvm/utils/gn/secondary/llvm/lib/Option/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Option/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Option] Declare library command line options in TableGen (#226087)
Implement the first step of
https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877:
the TableGen backend, the cl:: dispatch, and LLVMCGData's 13 cl::opts as
the first migrated library.
A .td with an `OptionsStruct` def declares a library's options with
`BoolField` (`-x`, `-x=<bool>`) and `ValueField` (`-x=v`,
`-x v`). `-gen-opt-parser-defs` generates a struct with one member per
option, a `Global` instance, the option table, and `apply(const Arg &)`.
A member is named after its option (`-codegen-data-generate` sets
`codegen_data_generate`) unless the defm names it.
`cl::ParseCommandLineOptions` keeps owning argv: a static
`opt::RegisterLibraryOptions<T>` registers the struct as a
`cl::LibraryOptions`, and an argument naming none of cl::'s options is
dispatched to the library that declares it. `-help-hidden` lists library
options (`let Hidden = 0 in` also lists them in `-help`),
`ResetAllOptionOccurrences` restores their defaults, and a name shared
with a cl::opt or another library is a fatal error.
An options struct is private to its library; other libraries use getters
and setters instead of `extern cl::opt`. For example, LTO calls
`cgdata::thinLTOTwoRounds()`.
Aided by Opus 5.5
Commit: 14304b90ece21e882060c0346d5196fa567aaab4
https://github.com/llvm/llvm-project/commit/14304b90ece21e882060c0346d5196fa567aaab4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV] Re-generate rvp-intrinsics.c using common prefix. NFC (#227836)
The common prefix was added while widening unzip was in review.
Commit: d87168d18c03b962aad7166bfeb2323ecf0e500d
https://github.com/llvm/llvm-project/commit/d87168d18c03b962aad7166bfeb2323ecf0e500d
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Transforms/Attributor/nofpclass-fadd-fsub.ll
Log Message:
-----------
[Attributor][NFC] rename fadd_double --> fadd_self (#227931)
I have renamed `fadd_double` to `fadd_self` in `nofpclass-fadd-fsub.ll`
to make it clear that it refers to doubling `x += x` and **not** the
`double` type.
This makes it consistent with other tests that use the name
`fadd_double` to refer to the `double` type.
Commit: 15d801334e531eb49f1624add593483d4fe9e020
https://github.com/llvm/llvm-project/commit/15d801334e531eb49f1624add593483d4fe9e020
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
Log Message:
-----------
[AMDGPU] Use isGFX125xOnly as the assembler predicate for tensor load/store (#227887)
The VIMAGE_TENSOR gfx1250 real instructions are only available on
GFX125x, so predicate the assembler on isGFX125xOnly rather than on the
HasTDMInsts feature.
Commit: 6a7945b744e251cd6c843521a5e918e364a49dc5
https://github.com/llvm/llvm-project/commit/6a7945b744e251cd6c843521a5e918e364a49dc5
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/lib/Optimizer/OpenACC/Transforms/ACCEraseUnusedKernelAllocations.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/test/Fir/OpenACC/acc-erase-unused-kernel-allocations.mlir
Log Message:
-----------
[flang][openacc] Erase unused stack allocations in compute regions (#227807)
ACCEraseUnusedKernelAllocations only deleted unused fir.allocmem. A
dynamic fir.alloca, memref.alloca, or memref.alloc inside
acc.compute_region has the same problem: fir.declare's debug effect and
the matching free keep it alive through ordinary dead-code elimination,
and lowering turns it into a checked device malloc.
Delete those allocations when they have no uses, or when every use is
fir.freemem, memref.dealloc, a view such as fir.convert, or fir.declare.
A load, store, or other memory use still keeps the allocation.
This can happen when using stack arrays flags which replace the
fir.allocmem
Commit: 640e1c693814b0607ccde86745c963b2cf89fcb8
https://github.com/llvm/llvm-project/commit/640e1c693814b0607ccde86745c963b2cf89fcb8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Remove riscv_pmulh(u)intrinsics. (#227846)
These are redundant with the llvm.smulh/umulh intrinsics that were added
recently.
Strangely we don't have clang IRgen tests for these intrinsics/builtins,
but we do have a cross-project test for assembly.
Commit: 8bac1794587de8ab94b83d9203471fb2d9bfc520
https://github.com/llvm/llvm-project/commit/8bac1794587de8ab94b83d9203471fb2d9bfc520
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/OpenACC/Transforms/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 6a7945b (#227939)
This fixes 6a7945b744e251cd6c843521a5e918e364a49dc5 (#227807).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=6a7945b744e251cd6c843521a5e918e364a49dc5
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 78b41db99465e265738675c45e7bf5b74b4ab4b7
https://github.com/llvm/llvm-project/commit/78b41db99465e265738675c45e7bf5b74b4ab4b7
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Transforms/IntRangeOptimizations.cpp
M mlir/test/Dialect/Arith/int-range-opts.mlir
Log Message:
-----------
[mlir][arith] Handle unsigned moduli in int-range optimizations (#224933)
`DeleteTrivialRem` reads constant moduli as signed values, causing
`remui` operations with sign-bit-set moduli to be rejected. Keep the
modulus as an `APInt` and apply signedness according to the remainder
operation.
Fixes #224630
Commit: 391952621b361a782a1a6f9d0877ea4b52f704de
https://github.com/llvm/llvm-project/commit/391952621b361a782a1a6f9d0877ea4b52f704de
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Transforms/Attributor/nofpclass-atan2.ll
Log Message:
-----------
[KnownFPClass][NFC] Update ATTR values for atan2 tests (#224797)
Ran the following command since it was not run for
https://github.com/llvm/llvm-project/pull/223176
```
llvm/utils/update_test_checks.py \
--opt-binary build/bin/opt \
llvm/test/Transforms/Attributor/nofpclass-atan2.ll
```
Commit: c4ff7a767a271c02dd37312999c80f404219dd30
https://github.com/llvm/llvm-project/commit/c4ff7a767a271c02dd37312999c80f404219dd30
Author: Ming Yan <nexming7 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/explicit_outer_nonuniform_inner.ll
M llvm/test/Transforms/LoopVectorize/explicit_outer_uniform_diverg_branch.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_early_exit.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_inner_loop_exits.ll
Log Message:
-----------
[LV] Use SCEV loop-uniformity for outer-loop branch legality (#199632)
This patch refactors the outer-loop vectorization branch legality checks
to reason about conditional branches directly instead of using the old
recursive inner-loop shape check.
The new check allows conditional branches when their condition is
either:
- loop-invariant with respect to the vectorized outer loop, or
- a compare whose operands are both SCEV loop-uniform with respect to
the vectorized outer loop.
Divergent conditional branches are still rejected, now with a more
specific diagnostic.
Commit: 6f761a90eb9e344ae9f7a1534e50400f964a97e3
https://github.com/llvm/llvm-project/commit/6f761a90eb9e344ae9f7a1534e50400f964a97e3
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M flang/docs/OpenACC-extensions.md
M flang/include/flang/Lower/LoweringOptions.def
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
A flang/test/Lower/OpenACC/acc-kernels-do-concurrent-independent-flag.f90
Log Message:
-----------
[flang][OpenACC] Preserve DO CONCURRENT independence in kernels loops (#227775)
`DO CONCURRENT` asserts that its iterations may execute independently.
When it is directly associated with a combined OpenACC `KERNELS LOOP`,
Flang currently lowers the loop as `auto`, unless an explicit `seq`,
`auto`, or `independent` clause is present. This patch adds a
default-enabled extension that preserves the `DO CONCURRENT`
independence assertion by lowering the loop as `independent`. This
behavior is OpenACC-conforming. Explicit loop parallelism clauses
continue to take precedence.
The extension can be disabled with:
`-fno-openacc-acc-kernels-do-concurrent-independent`
This patch also documents the extension and adds lowering tests for its
enabled and disabled behavior.
Commit: 9a66279ffbcfcdb32ba31b295121e1877db293aa
https://github.com/llvm/llvm-project/commit/9a66279ffbcfcdb32ba31b295121e1877db293aa
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
A clang/test/CIR/CodeGenSYCL/address-space-lang.cpp
Log Message:
-----------
[CIR][SYCL] Map SYCL address spaces to CIR language address spaces (#226598)
Commit: 76e096c2df3328fa276a4764a3612392da5dc3bd
https://github.com/llvm/llvm-project/commit/76e096c2df3328fa276a4764a3612392da5dc3bd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M cross-project-tests/CMakeLists.txt
Log Message:
-----------
[cross-project-tests] Add llvm-readobj as a dependency (#227950)
cross-project-tests/riscv/lto-inline-asm-abi.c uses it
Hopefully this will fix failures like
https://github.com/llvm/llvm-project/actions/runs/36810997644
Commit: 1f5222198a9100743929084e575efae874b1b2fb
https://github.com/llvm/llvm-project/commit/1f5222198a9100743929084e575efae874b1b2fb
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/test/CIR/CodeGen/new-array-in-ternary.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
Log Message:
-----------
[CIR][EH] Fix scope for partial array cleanup (#227838)
There was a bug in CIR where if an array whose elements required
destruction was initialized with an ILE, we weren't properly closing the
EH cleanup scope after the initialization completed, so it enclosed the
rest of the function. The result was that if anything later in the
function threw an exception, it would trigger both the normal
destruction of the array and the leftover EH "partial" cleanup, leading
to a double-free.
This change fixes that problem by introducing a CleanupDeactivationScope
around the init list processing (where we already had a MissingFeature
marker saying this was needed). The EH cleanup scope is now closed when
the CleanupDeactivationScope object goes out of scope.
This change also caused some observable changes to existing tests where
we were previously behaving incorrectly.
Assisted-by: Cursor / various models
Commit: 0eb361482695dd32a01760d334805ea1bde4ccf6
https://github.com/llvm/llvm-project/commit/0eb361482695dd32a01760d334805ea1bde4ccf6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Prevent accidental matches in riscv_packed_simd.c. NFC (#227830)
The function name is printeded multiple times in the output. We need to
make sure we are matching an instruction mnemonic. The way other
existing test cases do this is by checking for a space after the
instruction name. We don't need to do this if the mnemonic contains a
period since those are replaced with underscores in the function name.
Commit: ba8dc064464d5785323977c5c50e02f62b895caa
https://github.com/llvm/llvm-project/commit/ba8dc064464d5785323977c5c50e02f62b895caa
Author: Yingwei Zheng <dtcxzyw2333 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/tools/llubi/intr_int_arith.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Add support for pext/pdep (#227803)
Commit: 6ad1b7b7eb17918257f479c3a9e4abffaf7148b1
https://github.com/llvm/llvm-project/commit/6ad1b7b7eb17918257f479c3a9e4abffaf7148b1
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
Log Message:
-----------
[flang][NFC] Split the OpenACC construct lowering into two lanes (#227706)
genFIR(OpenACCConstruct) decided twice, in three places, whether the
construct it lowers is structured, and reassigned the evaluation it
works from halfway through: before the descent that evaluation is the
construct, after it the loop the directive absorbs. Everything
downstream had to know which one it was holding.
Give each form its own function and leave genFIR to choose between them.
One lane allocates the exit selector, lowers the evaluations the
construct holds, and emits the jump table; the other reads the collapse
clauses, descends to the absorbed depth, and lowers what is inside it.
The prologue and epilogue are short enough to state in both rather than
share.
Commit: ccac700c68e92a7eabcb2f745789978213f16f2d
https://github.com/llvm/llvm-project/commit/ccac700c68e92a7eabcb2f745789978213f16f2d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/zext-bool-add-sub.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in zext-bool-add-sub.ll (#227949)
Mark the profiles for the created selects as unknown as we cannot know
anything about the distribution of the condition in the general case.
Commit: 1854a889a3239e9d7391d65fc7c7dfae684fe63d
https://github.com/llvm/llvm-project/commit/1854a889a3239e9d7391d65fc7c7dfae684fe63d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Fix CopyMemory handling of a lone memory operands mask (#226969)
Fix `spirv.CopyMemory` with a lone memory operands mask, which per spec
applies to both operands
Verifier no longer rejects MakePointerVisible on it
Commit: e670c7a8c0bfb3f83741ad3735e4419b44761e0c
https://github.com/llvm/llvm-project/commit/e670c7a8c0bfb3f83741ad3735e4419b44761e0c
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CIR/CIRToCIRPasses.h
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/LibOpt.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-avx.c
Log Message:
-----------
[CIR] Make ASTContext optional in runCIRToCIRPasses (#227128)
Read the triple and the new cir.target_abi attribute from the module
instead of the ASTContext, erroring if either is missing, so the
CIR-to-CIR pipeline can run without a live AST. Part of preparing for:
https://discourse.llvm.org/t/rfc-clangir-making-cir-pipeline-boundaries-first-class-driver-artifacts/90998/15
---------
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: 1e8550c234507ef5b70d508f18b98f9bb0ebc07b
https://github.com/llvm/llvm-project/commit/1e8550c234507ef5b70d508f18b98f9bb0ebc07b
Author: David Green <david.green at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
Log Message:
-----------
[AArch64] Add CSEL for canCreateUndefOrPoisonForTargetNode (#226946)
These nodes cannot create posion, so we can push freeze up through them
like elsewhere in DAG.
Commit: fb9a5dcc6b51ead53c52873adba81a27b26326a9
https://github.com/llvm/llvm-project/commit/fb9a5dcc6b51ead53c52873adba81a27b26326a9
Author: David Green <david.green at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[AArch64] Add CSEL for canCreateUndefOrPoisonForTargetNode (#226946)
These nodes cannot create posion, so we can push freeze up through them
like elsewhere in DAG.
Commit: dd1d329d7b693a01f492324dbd1eedf20325f5ae
https://github.com/llvm/llvm-project/commit/dd1d329d7b693a01f492324dbd1eedf20325f5ae
Author: Larry Meadows <Lawrence.Meadows at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
M llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
Log Message:
-----------
[AMDGPU] Restore the EXEC-write assert in SIPostRA16BitMovFolding (#227890)
#227502 turned the assert into a bail-out. The backend assumes EXEC is
not written in the middle of a basic block, so restore the assert and
drop the test that wrote EXEC between the movs.
Assisted-by: Cursor
Commit: c4e40dc23d9166005960f7e1430c1b473982e13a
https://github.com/llvm/llvm-project/commit/c4e40dc23d9166005960f7e1430c1b473982e13a
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[CODEOWNERS] Request notifications (#227742)
The author is finding the mix of searches on the GitHub UI and the
notifications on PRs on which their review was explicitly requested in
their inbox a bit difficult to manage. They hence request notifications
for all PRs touching VPlan, LoopAccessAnalysis, LoopIdiomRecognize,
SCEVPatternMatch, and PatternMatchHelpers in their inbox, as a start.
Commit: f0fe3b560a7935fe2625f02a3bd52c67f048dcc0
https://github.com/llvm/llvm-project/commit/f0fe3b560a7935fe2625f02a3bd52c67f048dcc0
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/Todo/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/Todo/acc-unstructured-loop-construct.f90
A flang/test/Lower/OpenACC/acc-collapse-force-unstructured-body.f90
A flang/test/Lower/OpenACC/acc-directive-loop-bounds.f90
A flang/test/Lower/OpenACC/acc-unstructured-combined-construct.f90
M flang/test/Lower/OpenACC/acc-unstructured-internals.f90
A flang/test/Lower/OpenACC/acc-unstructured-loop-construct.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
A flang/test/Lower/OpenMP/wsloop-directive-loop-bounds.f90
Log Message:
-----------
[flang] Let a directive keep the loop it owns when its body branches (#227707)
A loop whose branching is confined to its body keeps its structured
form, but the construct holding it stayed Unstructured. A directive does
not merely contain such a loop, it owns it, and its lowering reads the
construct's own classification to decide whether the loop op carries its
bounds. The directive was left with a bounds-free loop that nothing
could partition, and the loop it owns became a second one nested inside.
Reclassify a directive construct once the loops it holds no longer need
it to stay Unstructured. Children are visited first, so those loops have
already been reclassified by the time the construct is reached. A
construct whose branching leaves it is untouched, as is one holding a
branch of its own.
Taking a loop over also means genFIR(DoConstruct) -- where a plain loop
folds a body whose branching stays inside it into a region -- never runs
for that loop, so fold its body through the same helper. A construct
that takes over no loop, acc data or acc parallel without a loop
directive, keeps having its own evaluations lowered.
The cases this enables move out of the Todo tests, which asserted the
lowering was not yet implemented. The one whose EXIT leaves the loop
stays there.
Commit: d8c62b730f84536805d7a4a837a1f81ceac207b5
https://github.com/llvm/llvm-project/commit/d8c62b730f84536805d7a4a837a1f81ceac207b5
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/lib/Target/Sparc/CMakeLists.txt
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
A llvm/lib/Target/Sparc/SparcOptions.td
M llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/unittests/Option/LibraryOpts.td
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/Target/Sparc/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Sparc] Declare command line options in TableGen (#227977)
Move the cl::opts into SparcOptions.td. SparcSubtarget.h declares the
struct and SparcSubtarget.cpp holds the generated definitions.
LLVMInitializeSparcTarget registers the options, so they cost no static
initializer. SparcTargetMachine holds a reference to
SparcOptions::Global, and SparcSubtarget forwards it, so code reads
Subtarget.getCLOpts() rather than the global.
`OptionsStruct<prefix = "sparc-">` is new: it strips the shared prefix
from member names, so -sparc-bpcc-offset-bits sets bpcc_offset_bits.
Aided by Opus 5.5
Commit: e95c8f57cc184df85c4ffedb91fdf1d50744e11c
https://github.com/llvm/llvm-project/commit/e95c8f57cc184df85c4ffedb91fdf1d50744e11c
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A clang/include/clang/CodeGenUtils/ModuleUtils.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/ModuleUtils.cpp
Log Message:
-----------
[CIR][CodeGen][NFCI] Share the COMDAT and common-linkage predicates (#223419)
Deduplicates `shouldBeInCOMDAT` and `isVarDeclStrongDefinition` between
CIR and
classic CodeGen into `ModuleUtils.h`.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: d7e4505dd447d115d85fdea45cd71030ac1d86ee
https://github.com/llvm/llvm-project/commit/d7e4505dd447d115d85fdea45cd71030ac1d86ee
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll
Log Message:
-----------
[SCEV] Extend cache-lookup for AR (NFC) (#218927)
It allows us to improve some code, but it cannot be used in getAR
without making functional changes.
Commit: dc3fae371843efd0775430862b6e487f3cfae82d
https://github.com/llvm/llvm-project/commit/dc3fae371843efd0775430862b6e487f3cfae82d
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[MLIR] Emit final-policy remarks in deterministic order (#224616)
`RemarkEmittingPolicyFinal` stores remarks in a `DenseSet` whose hash covers the location pointer and the process hash seed, so `finalize()` emitted them in bucket order. That order depends on the build configuration and on memory layout, which is why `mlir/test/Pass/remark-final.mlir` used `CHECK-DAG`.
The engine already assigns every remark a `RemarkId` from a monotonic counter when it is created, and the set already keeps the newer of two remarks with the same identity. `finalize()` now sorts the drained remarks by that ID before emitting. Remarks come out in creation order, a replaced identity takes the position of its last report, and linked remarks still follow their parent.
Behaviour change: order only. The identity, `DenseMapInfo<Remark>` and the header are unchanged. Only remarks handed to the policy outside the engine have no ID; the unit tests that do so assert unordered or single results.
Creation order is deterministic for a single-threaded pipeline. When passes report from several threads the IDs come from a shared counter and depend on scheduling; #227360 adds the lock and a source-position sort for that case, on top of this change.
Whether the identity itself is right is a separate question for a follow-up: the docs say a later `passed` replaces an earlier `failed` at the same location, but `kind` has been part of the key since #180953, so both are shown today. This PR leaves the docs as they are on that point.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: 778dd2c1b8050f69bee779893c27e7647c07eff3
https://github.com/llvm/llvm-project/commit/778dd2c1b8050f69bee779893c27e7647c07eff3
Author: Julien Villette <julien.villette at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
Log Message:
-----------
[AArch64][NeoverseV1] Load/Store Register Half with scaling (#222282)
On Neoverse V1, LDRH/STRH with scaling has a specific execution compared
to other LDR/STR.
Opcode | Latency | Pipelines
-------------------------------------------
Common LDR | 4 | L
LDRH with scaling | 5 | I, L
Common STR | 1 | L01, D
STRH with scaling | 2 | I, L01, D
Verified on Neoverse V1 with micro benchmarks and compared all
addressing mode variantes. Neoverse V2 is unaffected (confirmed by SOG
documentation and microbenchmarks).
Commit: 150f9dcdb4f06219f36031ab6d5b56fdc8499e88
https://github.com/llvm/llvm-project/commit/150f9dcdb4f06219f36031ab6d5b56fdc8499e88
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/ThreadPlan.cpp
A lldb/test/API/functionalities/inline-frame-pc/Makefile
A lldb/test/API/functionalities/inline-frame-pc/TestInlineFrameUntil.py
A lldb/test/API/functionalities/inline-frame-pc/main.c
Log Message:
-----------
[lldb] Reject thread until targets outside of an inline frame's function (#227800)
`thread until -f N <line>` rejects a line outside of the function of
frame N.
Before this patch, for an inline frame, it checked the concrete
function, not the inlined function, so it accepted lines of other
inlined functions. The until plan then ignored a hit of such a target,
because it is not in the scope of frame N.
This commit changes GetStepUntilAddresses to only accepts an address if
its innermost inlined function is the one of frame N, as it does for a
regular frame.
As a before/after example, consider this backtrace:
```
frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]
```
This patch changes behavior as follows:
```
command gdb lldb before lldb after
until -f 1 <later line in frame 2> that line process exits error
until -f 2 <later line in frame 1> that line process exits error
Commit: 8995a358fa77a669679594aa9857ba0e0b224ab1
https://github.com/llvm/llvm-project/commit/8995a358fa77a669679594aa9857ba0e0b224ab1
Author: Kewen Meng <Kewen.Meng at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-nonoverlapping-subrange.mir
Log Message:
-----------
[LLVM] Skip non-overlapping subranges (#227852)
Add guard to skip subranges that not live in the interval.
fix to: https://github.com/llvm/llvm-project/pull/227252
Passed local libc tests:
```
Total Discovered Tests: 814
Passed: 814 (100.00%)
```
assisted by: cursor
Commit: 95d9c12377674769957169e8afa612d4c6ecda59
https://github.com/llvm/llvm-project/commit/95d9c12377674769957169e8afa612d4c6ecda59
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Share relocateBucket across DenseMap.h (NFC) (#227970)
This patch moves relocateBucket from SmallDenseMapStorage into namespace
densemap::detail and uses it in DenseMapBase::moveFrom and
DenseMapBase::eraseFromFilledBucket as well.
Assisted-by: Antigravity
Commit: bfd7810d5d91f7123eb7428d0db06ebf2bb4bd73
https://github.com/llvm/llvm-project/commit/bfd7810d5d91f7123eb7428d0db06ebf2bb4bd73
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgNamedPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-named-invalid.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg-pipeline.mlir
Log Message:
-----------
[mlir][tosa] Lower AVG_POOL2D_ADAPTIVE to Linalg (#225637)
Register the adaptive average-pool canonicalization with the named
TOSA-to-Linalg conversion and mark the operation illegal so constant
shape operands lower through the established avg_pool2d path.
Add coverage for padding-aware floating-point pooling and quantized
integer pooling with nonzero zero points.
Assited-by: Codex
Commit: c7e84033591028fe0e205157955e3e6c5c8f228e
https://github.com/llvm/llvm-project/commit/c7e84033591028fe0e205157955e3e6c5c8f228e
Author: David Green <david.green at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/branch-cond-split-fcmp.ll
Log Message:
-----------
Revert "[AArch64] Add CSEL for canCreateUndefOrPoisonForTargetNode (#226946)" (#227992)
This reverts commit 1e8550c234507ef5b70d508f18b98f9bb0ebc07b due to
buildbot / bootstrap failures not seen in other testing.
Commit: dba7cf58a954901133c3275b7b16b7ccca079375
https://github.com/llvm/llvm-project/commit/dba7cf58a954901133c3275b7b16b7ccca079375
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
A llvm/test/Transforms/InstCombine/libcall-fpmath.ll
Log Message:
-----------
[SimplifyLibCalls] Preserve !fpmath when replacing libcalls. (#227886)
As pointed out in https://github.com/llvm/llvm-project/pull/227697,
replaceUnaryCall and replaceBinaryCall drop !fpmath.
Transfer it to the created intrinsics.
PR: https://github.com/llvm/llvm-project/pull/227886
Commit: da95f72aa9c168846411134cbc93e2e0b267a28e
https://github.com/llvm/llvm-project/commit/da95f72aa9c168846411134cbc93e2e0b267a28e
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
A llvm/test/Transforms/LoopIdiom/memset-inline-intrinsic.ll
Log Message:
-----------
[LoopIdiom] Don't convert `memset.inline` into `memset` (#227650)
Also remove an old and invalid FIXME and reword comments to clarify why we
don't turn inline intrinsics into non-inline versions.
There were 2 places where we check for `memcpy.inline`:
1. `processLoopMemCpy`
2. `processLoopStoreOfLoopLoad`
(1) calls (2). Because (1) didn't properly check for inline intrinsics (2)
needed to check for them as well. With (1) fixed, (2) doesn't need to check. So
the check is made an assertion.
A copy of (1) exists for `memset.inline` as well, in `processLoopMemSet`, but
(2) didn't exist in `processLoopStridedStore`, causing the bug where we convert
a `memset.inline` into `memset`.
Update `processLoopMemSet` checks the same way as (1) and add the same
assertion in (2) to `processLoopStridedStore`.
- Fixes the bug where we convert `memset.inline` to `memset`.
- Makes the checks in `memset` and `memcpy` handling paths consistent with each
other.
Only tests for `memset` are added. `memcpy` paths already covered by existing
test file `memcpy-inline-intrinsic.ll` in the same directory.
Commit: eb7c25df7553aae66e992f29ba9dab42a062ecb9
https://github.com/llvm/llvm-project/commit/eb7c25df7553aae66e992f29ba9dab42a062ecb9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
Log Message:
-----------
[ConstraintElim] Check top-level GEP flags, object size first (NFC) (#227270)
Collecting the offsets for GEPs can be relatively expensive. First check
the GEP flags of the outer GEP and exit if they are not NUW.
Also look through the outer GEP to get the base pointer, and check size
before collecting offsets.
This saves a small amount of compile-time w/o impacting results:
https://llvm-compile-time-tracker.com/compare.php?from=194c292ff93cf82be3064c94d405b9171d776164&to=423cf820d0c2f1f828d14a7838c9f86af8b9044a&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/227270
Commit: 4be402e459e2fa1e98826c99e3fcef4121729e26
https://github.com/llvm/llvm-project/commit/4be402e459e2fa1e98826c99e3fcef4121729e26
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
A flang/lib/Optimizer/Transforms/O0CanonicalizerPass.cpp
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Integration/OpenMP/parallel-private-reduction-worstcase.f90
A flang/test/Integration/array-assignment-entry-debug.f90
A flang/test/Integration/array-assignment-entry-paths.f90
M flang/test/Integration/cold_array_repacking.f90
A flang/test/Transforms/o0-canonicalize.mlir
Log Message:
-----------
[flang] disable cf canonicalization patterns at O0 to preserve line location (#227770)
This patch is a follow up to #202065 and intends to preserve at least one loop
header instructions for each expanded array expressions at O0 so that breakpoint
set on array expression statements that are expanded inline fire once (an not at
each iteration which happens when the only instruction with the statement line
location is in the loop body). CF canonicalization patterns may remove branch
instructions that are the only valid breakpoint position for an array expression
statement from the source.
To solve this, this patch adds a new canonicalization pass that allows skipping
ControlFlow dialect pattern registration at O0.
This replaces #227306 approach that was using a debug pattern filtering
approach instead of using a new pass.
Assisted-by: AI
Commit: c6afcd0b4ab5f089572bb8a2f8a9134fc5c59fc5
https://github.com/llvm/llvm-project/commit/c6afcd0b4ab5f089572bb8a2f8a9134fc5c59fc5
Author: Julien Villette <julien.villette at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64][NeoverseV1/V2] Fix FMULX scalar latency (#224540)
The "ASIMD FP multiply" InstRW regex required a "v" suffix, so the
scalar register-register forms FMULX16, FMULX32 and FMULX64 fell back to
a generic class with latency 2.
Measured on Neoverse V1 and V2 hardware with a single dependency chain:
3 cycles, the same as the vector forms and as FMUL, matching the SOG
row.
Commit: 86a445a3f6e3ee145fd9523a6360626b1df99fd1
https://github.com/llvm/llvm-project/commit/86a445a3f6e3ee145fd9523a6360626b1df99fd1
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
A llvm/test/Transforms/InstCombine/smulh.ll
A llvm/test/Transforms/InstCombine/umulh.ll
Log Message:
-----------
[InstCombine] Add generic smulh/umulh identity folds (#227335)
Added baseline smulh/umulh tests branched from equivalent x86 pmulh/pmulhu tests
Added generic generic smulh/umulh identity folds that match the x86 pmulh (commutative) folds:
[su]mulh(x,undef) -> 0
[su]mulh(x,0) -> 0
umulh(x,1) -> 0
smulh(x,1) -> sra(x,bw-1) // signsplat
Prep work for #223627
Commit: 018a9e4a74ba5d383351bda907a8b116bc5d8c47
https://github.com/llvm/llvm-project/commit/018a9e4a74ba5d383351bda907a8b116bc5d8c47
Author: Tomohiro Kashiwada <kikairoya at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Support/Compiler.h
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
Log Message:
-----------
[ORC] Define `LLVM_HAS_ATTRIBUTE_WEAK` and guard `__unw_*_dynamic_eh_frame_section` by it (#227709)
#212260 causes a linker error on Cygwin, which expands
`LLVM_ATTRIBUTE_WEAK` to empty:
```
ld.lld: error: undefined symbol: __unw_add_dynamic_eh_frame_section
>>> referenced by libLLVMOrcTargetProcess.a(RegisterEHFrames.cpp.o):(llvm::orc::registerEHFrameSection(void const*, unsigned long))
>>> referenced by libLLVMOrcTargetProcess.a(RegisterEHFrames.cpp.o):(registerEHFrameWrapper(llvm::orc::ExecutorAddrRange))
```
---------
Co-authored-by: Lang Hames <lhames at gmail.com>
Commit: 180b69dfdf76a1d42cc00489ce3c885f4c434a29
https://github.com/llvm/llvm-project/commit/180b69dfdf76a1d42cc00489ce3c885f4c434a29
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
[IRBuilder] Remove FPMathTag and OpBundles constructor arguments (#228013)
Remove the FPMathTag and OpBundles IRBuilder constructor arguments,
which are never used in tree. The setDefaultFPMathTag() and
setDefaultOperandBundles() APIs can be used instead.
Commit: 326789c0a3686fa47466ae92e9c9013073799673
https://github.com/llvm/llvm-project/commit/326789c0a3686fa47466ae92e9c9013073799673
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Share the memory operands mask verifier between both masks (#225520)
Verify the `CopyMemory` Target and Source masks through one shared
function instead of a separate Source path
Originally discussed in https://github.com/llvm/llvm-project/pull/213621
Commit: 5b46a5d578269aca9e1f74b79f23bddc7af9a2b5
https://github.com/llvm/llvm-project/commit/5b46a5d578269aca9e1f74b79f23bddc7af9a2b5
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVAtomicOps.td
M mlir/lib/Dialect/SPIRV/IR/AtomicOps.cpp
M mlir/test/Dialect/SPIRV/IR/atomic-ops.mlir
Log Message:
-----------
[mlir][SPIR-V] Verify memory semantics for AtomicLoad/Store/Exchange/CompareExchange ops (#212990)
Commit: d287e55d03029586399adab02977679e74c51f2d
https://github.com/llvm/llvm-project/commit/d287e55d03029586399adab02977679e74c51f2d
Author: Dmitriy Smirnov <dmitriy.smirnov at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
Log Message:
-----------
[MLIR][VectorToGPU] Cache slice analysis in getOpToConvert (#221795)
ConvertVectorToGPU spent a lot of time rebuilding the same backward and
forward slices for overlapping vector/MMA use-def components, which was
especially visible on int8 cases.
This change caches backward slices, forward slices, and
supportsMMaMatrixType() results per operation, and marks fully expanded
components as already analyzed. That avoids repeatedly rediscovering and
revalidating the same component from multiple seeds without changing the
lowering itself.
The resulting conversion is unchanged, but compile time for the affected
int8 case drops significantly.
---------
Co-authored-by: Thomas Preud'homme <thomas.preudhomme at arm.com>
Commit: 24cfc481238a957453c869378ff5bad10ce3ff09
https://github.com/llvm/llvm-project/commit/24cfc481238a957453c869378ff5bad10ce3ff09
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove the EpilogueVectorizerMainLoop hierarchy level (NFC). (#227885)
EpilogueVectorizerMainLoop no longer overrides
createVectorizedLoopSkeleton; all it contributes are two debug traces.
Vectorize the main loop with a plain InnerLoopVectorizer and emit the
debug traces for both the main and the epilogue loop from processLoop,
removing the printDebugTraces* hooks.
That leaves InnerLoopAndEpilogueVectorizer with a single subclass and a
single member only used by the debug traces, so fold it into
EpilogueVectorizerEpilogueLoop and drop the member.
Commit: 255694c1d3db5aa3bc87bc9b27dbf1ffe3fab65c
https://github.com/llvm/llvm-project/commit/255694c1d3db5aa3bc87bc9b27dbf1ffe3fab65c
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_loop.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/mubuf-offset-private.ll
M llvm/test/CodeGen/AMDGPU/set-wave-priority.ll
M llvm/test/MC/AMDGPU/gfx1150_asm_salu_float.s
Log Message:
-----------
[AMDGPU] Add missing colons to FileCheck directives in tests (NFC) (#227999)
Commit: 9d9c4426fb0e0f0a43b283678acaafd22d6dfe8a
https://github.com/llvm/llvm-project/commit/9d9c4426fb0e0f0a43b283678acaafd22d6dfe8a
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
A llvm/test/CodeGen/ARM/fast-isel-call-be-softfp.ll
Log Message:
-----------
[ARM][FastISel] Fix soft-float f64 register pair order on big endian (#227172)
Under the soft-float ABI an f64 argument or return value is passed in a
core register pair which is ordered like any other 64-bit value in core
registers: on big-endian targets the register holding the most
significant word comes first.
FastISel materialized the pair with VMOVRRD/VMOVDRR in little-endian
order on both endiannesses, disagreeing with the SelectionDAG ISel paths
and miscompiling soft-float f64 argument passing and returns for armebv7
targets at -O0.
VMOVRRD moves Dn[31:0] to Rt and Dn[63:32] to Rt2, and VMOVDRR reads
them symmetrically, so swap the destination/source pair when the data
layout is big-endian, mirroring the big-endian handling already present
in ARMISelLowering.
Fixes #227171
Commit: d844ab7db8aafe8c5de2131b5f066f8b9b80bc1c
https://github.com/llvm/llvm-project/commit/d844ab7db8aafe8c5de2131b5f066f8b9b80bc1c
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/base-init-eh.cpp
M clang/test/CIR/CodeGen/base-to-derived.cpp
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/cleanup-derived-to-base-ref.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/derived-to-base.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit-strict.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/temporary-materialization-adjust.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/pure-ptr-arithmetic.cir
Log Message:
-----------
[CIR] Extract CIR_ClassCastOp base class for BaseClassAddrOp and DerivedClassAddrOp (#195478)
Both ops have identical structure (arguments, results, assembly format)
and differ only in mnemonic and description. Extract a shared TableGen
base class to eliminate the duplication.
Improve the assembly format to be more consistent with the rest of CIR.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: 7a632629eed2562fbcb0374c97ba94740a914c0a
https://github.com/llvm/llvm-project/commit/7a632629eed2562fbcb0374c97ba94740a914c0a
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine-true16.mir
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sdot4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/merge-out-of-order-ldst.ll
M llvm/test/CodeGen/AMDGPU/shift-select.ll
M llvm/test/CodeGen/AMDGPU/token-factor-inline-limit-test.ll
M llvm/test/CodeGen/AMDGPU/triv-disjoint-mem-access-neg-offset.mir
M llvm/test/CodeGen/AMDGPU/vector-alloca-bitcast.ll
Log Message:
-----------
[AMDGPU] Fix misspelled FileCheck prefixes and suffixes in tests (NFC) (#228001)
FileCheck ignores these directives, so the checks never ran
Commit: 530bcc34727376393c1b3a70bbe4f9f23e2e4f80
https://github.com/llvm/llvm-project/commit/530bcc34727376393c1b3a70bbe4f9f23e2e4f80
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
Log Message:
-----------
[llvm] Pass insertion point directly to IRBuilder ctor (NFC) (#228019)
Pass insertion point directly to the ctor instead of calling
SetInsertPoint(). Also remove redundant SetCurrentDebugLocation()
calls, which SetInsertPoint() already does.
Commit: 9eb8ba1438c64085de1cf958eaf29ba9918a1ce2
https://github.com/llvm/llvm-project/commit/9eb8ba1438c64085de1cf958eaf29ba9918a1ce2
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/frem-power2.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/funnel-shift.ll
M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
M llvm/test/CodeGen/AArch64/select_const.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
M llvm/test/CodeGen/AArch64/shift.ll
Log Message:
-----------
[GlobalISel] [AArch64] Skip redundant shift amount masking during isel (#223136)
AArch64 shift instructions (LSL/LSR/ASR) only use the low 5 bits (i32)or
6 bits (i64) of the shift amount. When the shift amount is masked with
an AND that was introduced by legalization of a narrow type zext, or is
a G_ZEXT itself, the operation is redundant and can be skipped during
instruction selection.
This mirrors what AArch64DAGToDAGISel::tryShiftAmountMod does for
SelectionDAG, bringing GlobalISel to parity for i32 shift amounts with
narrow shift amount types (i8, i16).
Before (GlobalISel shl i32 with i8 shift amount):
and w8, w1, #0xff
lsl w0, w0, w8
After (matches SelectionDAG):
lsl w0, w0, w1
Part of the incremental work tracked in
https://github.com/llvm/llvm-project/issues/224245 to replace
tryShiftAmountMod with ComplexPattern-based isel.
Commit: e496d3c1f3e60b27d8b016c0b36ecb89653ae38f
https://github.com/llvm/llvm-project/commit/e496d3c1f3e60b27d8b016c0b36ecb89653ae38f
Author: konoongg <120199924+konoongg at users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/add.ll
M llvm/test/Transforms/InstCombine/fadd.ll
Log Message:
-----------
[InstCombine] Drop one-use check in matchesSquareSum for (a*a) (#228020)
The pattern `(a * a) + (((a * 2) + b) * b)` is equivalent to `(a + b) *
(a + b)`. The current implementation requires the `a * a` subexpression
to have a single use, which prevents the fold when `a * a` is used
elsewhere. This check is unnecessary: we can still perform the fold and
keep the original `a * a` instruction for other uses.
For example, with an extra use of `a * a`:
%1 = mul i32 %a, %a
%2 = mul i32 %a, 2
%3 = add i32 %2, %b
%4 = mul i32 %3, %b
%5 = add i32 %4, %1
%6 = mul i32 %1, %1
After this change, InstCombine produces:
%1 = add i32 %a, %b
%2 = mul i32 %1, %1
%3 = mul i32 %a, %a
%4 = mul i32 %3, %3
This reduces the instruction count from 6 to 4, even though `a * a` is
now computed both explicitly (for the extra use) and implicitly as part
of `(a + b) * (a + b)`.
The same applies to the floating-point (fadd) variant. Both are
updated together.
Commit: 79b6b7aca7384ae07b42f28d258cb6fa6d1df45c
https://github.com/llvm/llvm-project/commit/79b6b7aca7384ae07b42f28d258cb6fa6d1df45c
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
Log Message:
-----------
[AMDGPU] Early exit in getSelectConstants. NFC. (#228023)
Commit: 4b3ddb66a8defeb4caa7194ab78d182a70044424
https://github.com/llvm/llvm-project/commit/4b3ddb66a8defeb4caa7194ab78d182a70044424
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/merge-m0.mir
Log Message:
-----------
[AMDGPU] Don't merge M0 initializations across calls that clobber M0 (#221963)
hoistAndMergeSGPRInits collected clobbers only from
MRI.def_instructions(M0),
which lists explicit defs. Calls clobber M0 via a regmask and were
therefore
invisible, so M0 inits were merged and hoisted across them and the
required
re-init after a call was dropped. Scan the function using
modifiesRegister.
Issue: https://github.com/llvm/llvm-project/issues/221212
Commit: be26b1af2bd9c18be1477ca5b828157a4cefebc3
https://github.com/llvm/llvm-project/commit/be26b1af2bd9c18be1477ca5b828157a4cefebc3
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/unittests/Analysis/ConstraintSystemTest.cpp
Log Message:
-----------
[ConstraintElim] Skip rows implied by a single existing row. (#227688)
There are a number of cases where we add duplicated rows (e.g. from
transferring facts between the signed and unsigned systems, or from
tightening a non-strict bound using !=).
Before adding rows, check if the system already has a row that the same
variable coefficient and a constant that is <= the current constant.
This helps reduce compile-time, as each row adds extra work during
constraint solving:
stage1-O3: -0.02%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.02%
stage1-aarch64-O3: -0.00%
stage2-O3: -0.01%
stage2-clang: -0.00%
https://llvm-compile-time-tracker.com/compare.php?from=5da194580292bc90f6577f3959dda3a9bb6d5366&to=67f7d35c131b156663342cfae20d55e7a4187196&stat=instructions:u
The impact depends on the specific module and mostly in cases where the
number of facts is on the larger side. See additional compile-time
impact here
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1527
Fewer rows in the system can improve results in a few cases where we
previously hit the maximum rows cutoff:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1526.
PR: https://github.com/llvm/llvm-project/pull/227688
Commit: 7f5794c102a0caa350f6791e7ef541ec065d093f
https://github.com/llvm/llvm-project/commit/7f5794c102a0caa350f6791e7ef541ec065d093f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/test/Transforms/InstCombine/smulh.ll
M llvm/test/Transforms/InstCombine/umulh.ll
Log Message:
-----------
[InstCombine] SimplifyDemandedVectorElts - add smulh/umulh handling (#228027)
Commit: fec418c78fe1e10016f893f3293a276093ebdfc1
https://github.com/llvm/llvm-project/commit/fec418c78fe1e10016f893f3293a276093ebdfc1
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/VPlan/early_exit_with_stores_vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/vectorization-remarks-missed.ll
M llvm/test/Transforms/LoopVectorize/early_exit_combined_exits.ll
A llvm/test/Transforms/LoopVectorize/early_exit_combined_exits_epilogue.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_with_stores.ll
M llvm/test/Transforms/LoopVectorize/fold-epilogue-tail.ll
M llvm/test/Transforms/LoopVectorize/uncountable-single-exit-loops.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/countable-and-uncountable-exits-combined.ll
Log Message:
-----------
[LV] Vectorize uncountable early exit store loops with combined conditions (#205109)
Support the case where both the countable and uncountable exit
conditions have been combined by earlier passes.
Commit: 0704576db68c95ec1835771965824ba4ed4924cb
https://github.com/llvm/llvm-project/commit/0704576db68c95ec1835771965824ba4ed4924cb
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/dpp-err.s
M llvm/test/MC/AMDGPU/gfx9-asm-err.s
M llvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_err.txt
Log Message:
-----------
[AMDGPU] Reject 64-bit VOP1 DPP on gfx8/gfx9 (#220834)
64-bit DPP needs FeatureDPALU_DPP (gfx90a+), but HasDPALU_DPP is missing
GCN3Encoding gate that HasDPP has
Commit: ec1f5ecb04250392ed48388621050d7cdcc5f3f3
https://github.com/llvm/llvm-project/commit/ec1f5ecb04250392ed48388621050d7cdcc5f3f3
Author: Caroline Newcombe <caroline.newcombe at hpe.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/test/Lower/OpenMP/collapse-imperfect-nest.f90
R flang/test/Lower/OpenMP/collapse-target-intervening-todo.f90
A offload/test/offloading/fortran/target-teams-distribute-collapse-intervening.f90
Log Message:
-----------
[flang][OpenMP] Sink intervening code unguarded into collapsed loop body (#225159)
### Summary
Lower intervening code in a collapsed imperfect loop nest by sinking it
unguarded into the innermost `omp.loop_nest` body, so it executes once
per collapsed logical iteration. Per OpenMP 6.0 6.4.3.
An earlier implementation of this work guarded intervening code so that
it ran once per enclosing iteration. That required recomputing the inner
loop's bounds inside the region — and in a `target` region, either
accessing or re-evaluating
the enclosing `omp.target`'s `host_eval` bounds (#223475) — which
overcomplicates the solution and is not required by the spec. Sinking
the intervening code removes all bound arithmetic from the region, while
the execution count remains within the permitted range.
### Notes
Fixes #199092
Assisted-by: Copilot
Commit: a9c5e57c03413e31a9293a4d938402e6204ff888
https://github.com/llvm/llvm-project/commit/a9c5e57c03413e31a9293a4d938402e6204ff888
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaExpr.cpp
M clang/test/Sema/fp16vec-sema.c
M clang/test/Sema/vector-ops.c
M clang/test/SemaCXX/vector.cpp
Log Message:
-----------
[clang] Fix crash with follow-on diagnostics w/invalid logical operator (#227837)
If the logical operator involves a vector operand, we perform special
vector-specific checks. `CheckVectorOperands()` returns a null QualType
to signal there was an issue, and `CheckVectorLogicalOperands()` was
using that signal to decide to report an "invalid operands to binary
expression" diagnostic. However, `CheckVectorOperands()` also sometimes
modifies the given LHS and RHS values and when that happens, the caller
cannot assume they're still valid on a null QualType return. This was
causing a crash from `CheckVectorLogicalOperands()` because it was
attempting to use those newly invalidated expressions.
This fixes the crash by letting `CheckVectorOperands()` report the
diagnostics directly and removing the fallback logic from
`CheckVectorLogicalOperands()`. This also helpfully removes some
unhelpful follow-on diagnostics in other cases where we would report
"cannot convert operands" followed by "invalid operands to binary
expression".
Fixes #227588
Commit: e996ce0d9ad6443a7ea3f88ccb0a8e114b0e840e
https://github.com/llvm/llvm-project/commit/e996ce0d9ad6443a7ea3f88ccb0a8e114b0e840e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/maxbandwidth-regpressure.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predication_costs.ll
Log Message:
-----------
[LV][NFC] Print more debug to account for mismatch in final costs (#227757)
After printing out the costs of recipes we then print out the total
cost, including the cost per lane. Unfortunately, the final cost often
doesn't match the total of all the recipe costs due to extra precomputed
costs and reg spill costs. This PR adds the missing information.
Commit: 66008b77b133f797e80c84a00dee4ac091283e22
https://github.com/llvm/llvm-project/commit/66008b77b133f797e80c84a00dee4ac091283e22
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/unittests/Frontend/EnumSetTest.cpp
Log Message:
-----------
[OpenMP] Add default value for Size argument in EnumSet (#227853)
Most of the interesting enums cover a contiguous range of values, and
define members First_ and Last_. By subtracting the underlying values
one can get the number of elements in the enum.
Commit: a04805eff3ccd42bf8cd6056d6c75f63f42a2522
https://github.com/llvm/llvm-project/commit/a04805eff3ccd42bf8cd6056d6c75f63f42a2522
Author: Hari Limaye <hari.limaye at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
Log Message:
-----------
SLP: Remove artificial shifts from min-bitwidth test (NFC) (#222634)
Replace shifts by zero with zero constants, using a slightly negative
threshold to preserve the test signal. This allows a future update to
the cost of foldable shifts.
Commit: 0489b48e2f2e2374bee7db19483322307d19b8bf
https://github.com/llvm/llvm-project/commit/0489b48e2f2e2374bee7db19483322307d19b8bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
Log Message:
-----------
Mips/GlobalISel: Fix adding $gp to calls as a def instead of a use (#227679)
A PIC call needs $gp to point at the GOT for the lazy binding stub.
SelectionDAG adds it as an ordinary argument register. GlobalISel
instead added it as an implicit def, which killed the $gp copy set up
right before the call.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d240a0be972335f43fc2bacc4b124e72a32f74d4
https://github.com/llvm/llvm-project/commit/d240a0be972335f43fc2bacc4b124e72a32f74d4
Author: David Spickett <david.spickett at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
M lldb/test/API/functionalities/thread/thread_exit/TestThreadExit.py
Log Message:
-----------
[lldb][test] Use external debug info on Arm in TestExitDuringStep and TestThreadExit (#228047)
Arm has to care about Arm and Thumb modes, so without the separate debug
info file installed by libc6-dbg on Linux, we cannot backtrace if the
starting point is in a libc function.
This is the case for these tests where a thread may be stopped in a libc
syscall wrapper.
As the backtrace wasn't working, the code added by #227312 did not see
that some threads were part of the main executable, which made both
these tests fail on Arm Linux.
It's possible we should be running more tests on Arm with this option
on, but for now I just want to get the bot back to green.
More details in https://github.com/llvm/llvm-project/issues/228014.
Commit: 2ccba9abdcdb293df159015d04611ed220ac86fe
https://github.com/llvm/llvm-project/commit/2ccba9abdcdb293df159015d04611ed220ac86fe
Author: Karthika Devi C <kartc at qti.qualcomm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
A polly/test/ScopInfo/assume_in_non_affine_subregion.ll
Log Message:
-----------
[Polly] Fix assertion in addUserAssumptions for unreachable blocks (#227311)
ScopBuilder::addUserAssumptions() crashes when an llvm.assume call
resides in a block that has no entry in InvalidDomainMap. This happens
when __builtin_unreachable() is converted to llvm.assume by earlier
passes, but Polly's buildDomainsWithBranchConstraints() skips the block
(e.g. due to an UnreachableInst terminator), leaving its
InvalidDomainMap entry uninitialized.
Skip such assumptions instead of asserting.
Fixes #226718
Commit: a938559a914538ef3ee82aaa323820e26cd62cf5
https://github.com/llvm/llvm-project/commit/a938559a914538ef3ee82aaa323820e26cd62cf5
Author: Alok Kumar Sharma <AlokKumar.Sharma at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/pull-conditional-binop-through-shift.ll
Log Message:
-----------
[InstCombine] Keep branch weights when folding a shift through a select (#227987)
Pulling a binop out of a select and through a constant shift rebuilds
the select, and the new one was losing the original branch weights. Copy
!prof so the weights stay attached to the same condition.
Commit: 3013507d8e702c40d0ee1ac1ee4d551742092fa8
https://github.com/llvm/llvm-project/commit/3013507d8e702c40d0ee1ac1ee4d551742092fa8
Author: Deepak Shirke <deepakshirke509 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[GlobalISel] [AArch64] Skip redundant shift amount masking during isel (#223136)
AArch64 shift instructions (LSL/LSR/ASR) only use the low 5 bits (i32)or
6 bits (i64) of the shift amount. When the shift amount is masked with
an AND that was introduced by legalization of a narrow type zext, or is
a G_ZEXT itself, the operation is redundant and can be skipped during
instruction selection.
This mirrors what AArch64DAGToDAGISel::tryShiftAmountMod does for
SelectionDAG, bringing GlobalISel to parity for i32 shift amounts with
narrow shift amount types (i8, i16).
Before (GlobalISel shl i32 with i8 shift amount):
and w8, w1, #0xff
lsl w0, w0, w8
After (matches SelectionDAG):
lsl w0, w0, w1
Part of the incremental work tracked in
https://github.com/llvm/llvm-project/issues/224245 to replace
tryShiftAmountMod with ComplexPattern-based isel.
Commit: 956278f0f570085eb9a2bc2a1de32d142aeb233f
https://github.com/llvm/llvm-project/commit/956278f0f570085eb9a2bc2a1de32d142aeb233f
Author: Maddy Dunn <madeleine.dunn at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add MXFP support for GATHER (#227710)
Change-Id: I007889a6d934c8588feae7d2c5a023df60c85ca5
Signed-off-by: Madeleine Dunn <madeleine.dunn at arm.com>
Commit: 8068182dd6fb1a8efae0291db1d2462d29025cd1
https://github.com/llvm/llvm-project/commit/8068182dd6fb1a8efae0291db1d2462d29025cd1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/test/CodeGen/Hexagon/two-addr-tied-subregs.mir
M llvm/test/CodeGen/SystemZ/twoaddr-kill.mir
M llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
M llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
M llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
M llvm/test/CodeGen/X86/twoaddr-dbg-value.mir
Log Message:
-----------
CodeGen: Remove LiveVariables use from TwoAddressInstructionPass (#225176)
Now that LiveIntervals is computed unconditionally before TwoAddressInstructions
in the pipeline, the pass no longer needs LiveVariables.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 53fb269f4658238671cebdf22fbd46e3fd3eab45
https://github.com/llvm/llvm-project/commit/53fb269f4658238671cebdf22fbd46e3fd3eab45
Author: KRM7 <krisztian.rugasi at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
Log Message:
-----------
[AArch64] Select ADDHN instead of SHRN when possible (#225094)
The throughput of the ADDHN instruction is either double or the same as
the throughput of the SHRN instruction almost everywhere, so it's better
to use ADDHN when possible.
Commit: e8848e5fedbad3f20c9412eedf84fc35f6e5229a
https://github.com/llvm/llvm-project/commit/e8848e5fedbad3f20c9412eedf84fc35f6e5229a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
R llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-nonoverlapping-subrange.mir
M llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir
Log Message:
-----------
AMDGPU: Merge live interval critical edge splitting tests (#228051)
Commit: 40fd2805ed4972efbee7709282b09aa82109cdfd
https://github.com/llvm/llvm-project/commit/40fd2805ed4972efbee7709282b09aa82109cdfd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-vectorized-loop.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-profitable vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228063
Commit: e091030344213b586640dd451c3e1d1abfccea4f
https://github.com/llvm/llvm-project/commit/e091030344213b586640dd451c3e1d1abfccea4f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-vectorized-loop.ll
Log Message:
-----------
[SLP]Cost fused fmul and fadd as fmuladd in runtime checks bound
Price a contractable fmul and its fadd/fsub user as one fmuladd in the
scalar cost, so fast-math blocks get the same bound as the fmuladd form.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228066
Commit: 9e68623a0fc91093dea8b1a8c70ed074615f3138
https://github.com/llvm/llvm-project/commit/9e68623a0fc91093dea8b1a8c70ed074615f3138
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/lib/Lex/LiteralSupport.cpp
Log Message:
-----------
[clang][NFC] Suppress octal literal warnings in system macros via TableGen (#228035)
I am not sure if I misunderstood #192490. I discovered that the current
diagnostic engine actually already possesses this kind of attribute. It
simply wasn't being utilized previously. I have partially reverted the
changes from #192481. However, since I am uncertain whether modifying
the warnings related to binary literals might have side effects, I have
decided not to alter that part for the time being, pending the initial
review.
Commit: 8f43e15459f42a11e2194e47252d4dc7efe5d581
https://github.com/llvm/llvm-project/commit/8f43e15459f42a11e2194e47252d4dc7efe5d581
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
M llvm/test/CodeGen/AArch64/sme-avoid-coalescing-locally-streaming.ll
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
M llvm/test/CodeGen/AArch64/sme-streaming-checkvl-mir.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-landingpads.ll
Log Message:
-----------
AArch64: Remove unnecessary NZCV def from PSTATE write instructions (#228058)
PstateWriteSimple is the base class for the MSR immediate forms that
write a single PSTATE field. None of those fields is NZCV, so these do
not clobber the condition flags.
XAFLAG and AXFLAG do write the flags, but they already have their own
Uses/Defs of NZCV.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8d63a4d4cc75f018a7e376ba1247f9e343438600
https://github.com/llvm/llvm-project/commit/8d63a4d4cc75f018a7e376ba1247f9e343438600
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpHelpers.h
Log Message:
-----------
[clang][bytecode][NFC] Don't take a pointer in CheckArraySize (#227976)
We used to assign a new value to NumElements, but we don't anymore.
Commit: 0f265897950acf12e9924e6e19e8e35ce5807337
https://github.com/llvm/llvm-project/commit/0f265897950acf12e9924e6e19e8e35ce5807337
Author: Graham Hunter <graham.hunter at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/PatternMatch.h
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/unittests/IR/PatternMatch.cpp
Log Message:
-----------
[PatternMatch] match splats from an all-zeroes shufflevector (#228016)
Extends splat pattern matching to recognize
shufflevector(insertelement(elt, 0), any_value, zeroinitializer) in
addition to constant splats.
Commit: 72c5d98ac848ccca87291511eb6120d918764af6
https://github.com/llvm/llvm-project/commit/72c5d98ac848ccca87291511eb6120d918764af6
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[CODEOWNERS] Drop hard-notification for VPlan (#228056)
The author has successfully migrated the notifications that the VPlan
line was previously serving with an approximation, by gaining access to
the pr-subscribers vectorizers group. The author has already opened a
request to further narrow the notifications with the creation of a
vectorizers-loopvectorize label and group, which should be almost
equivalent to the dropped line. As the line no longer serves any
purpose, and creates unnecessary confusion, drop it.
Commit: 76999494a553fc0aa6b06f99c77461cf134ee8d1
https://github.com/llvm/llvm-project/commit/76999494a553fc0aa6b06f99c77461cf134ee8d1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
Log Message:
-----------
CodeGen: Check subrange liveness directly when trimming split edges (#228055)
SplitCriticalEdge trims the stale extension of a live range into the newly created
block. The subrange guard used overlaps(StartIndex, EndIndex), which only
happens to be equivalent to the containment removeSegment requires.
StartIndex is an index created for the new block, and EndIndex is the block end
index the live-out segments already end at, so no pre-existing segment endpoint
falls between them.
Check liveAt(PrevIndex) instead, mirroring the same condition on the main range.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8e83c685ab6d901f0833d716a27ab0166a69e52f
https://github.com/llvm/llvm-project/commit/8e83c685ab6d901f0833d716a27ab0166a69e52f
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Transforms/Attributor/nofpclass-fptrunc.ll
M llvm/test/Transforms/Attributor/nofpclass-log.ll
M llvm/test/Transforms/Attributor/nofpclass-sin-cos.ll
M llvm/test/Transforms/Attributor/nofpclass-trig.ll
Log Message:
-----------
[KnownFPClass] Add tests for FTPZ|DAPZ and dynamic denormal modes (#227943)
Commit: 04826e0fb6d7024580c354e6c04cc5a6b5ad8e86
https://github.com/llvm/llvm-project/commit/04826e0fb6d7024580c354e6c04cc5a6b5ad8e86
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Move `GVNPass` and `GVNLeaderMap` out of `GVN.h` and into 'GVN.cpp` (NFC) (#226234)
Rename `GVNPass` to `GVNPassImpl`.Leave in the header only the class for
interfacing with the pass manager.
Commit: f81414dbe2ba478fa489730079263dbd546d18c0
https://github.com/llvm/llvm-project/commit/f81414dbe2ba478fa489730079263dbd546d18c0
Author: Rumo <mail at rumo.dev>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/docs/ReleaseNotes.md
M clang/test/Index/annotate-tokens-pp.c
M clang/test/Index/annotate-tokens.c
M clang/test/Index/blocks.c
M clang/test/Index/load-stmts.cpp
M clang/test/Index/print-type.c
M clang/test/Index/recursive-cxx-member-calls.cpp
A clang/test/Index/unaryop.cpp
M clang/tools/libclang/CIndex.cpp
Log Message:
-----------
Add retrieval of unary operator spelling and python bindings (#219983)
Adds handling for unary operators in clang_getCursorSpelling() and
provides representations in Python for unary operator kinds as well as a
property to retrieve the UnaryOperator of a cursor.
The changeset is modeled after a972a394afcb276abb3029d0f2753d4403e379c2,
which introduced similar features for binary operators.
---------
Co-authored-by: Erik Julian Radermacher <erik.radermacher at uni-osnabrueck.de>
Commit: 65aee7abaeca14516a739148ad4488317b3785a2
https://github.com/llvm/llvm-project/commit/65aee7abaeca14516a739148ad4488317b3785a2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
A llvm/test/Transforms/LoopVectorize/outer-loop-legality-remarks.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-unvectorizable-types.ll
Log Message:
-----------
[LV] Bail out if loop nest contains non-widenable types. (#226463)
Currently all instructions are widened during outer-loop vectorization.
That requires the result types of all instructions to be widen-able.
Update canVectorizeOuterLoop to check the types of all instructions, via
a shared helper.
The newly added tests crash w/o the extra checks.
PR: https://github.com/llvm/llvm-project/pull/226463
Commit: 245f3e1d8118309a3338958e66bfd977a99cacd0
https://github.com/llvm/llvm-project/commit/245f3e1d8118309a3338958e66bfd977a99cacd0
Author: Rumo <mail at rumo.dev>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
Add retrieval of unary operator spelling and python bindings (#219983)
Adds handling for unary operators in clang_getCursorSpelling() and
provides representations in Python for unary operator kinds as well as a
property to retrieve the UnaryOperator of a cursor.
The changeset is modeled after a972a394afcb276abb3029d0f2753d4403e379c2,
which introduced similar features for binary operators.
---------
Co-authored-by: Erik Julian Radermacher <erik.radermacher at uni-osnabrueck.de>
Commit: 8f53182d7ea3e5978b10024cd2a4e315a456b9d4
https://github.com/llvm/llvm-project/commit/8f53182d7ea3e5978b10024cd2a4e315a456b9d4
Author: Eugene Epshteyn <eepshteyn at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-designator.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/expression.cpp
A flang/test/Evaluate/fold-implied-shape-section.f90
A flang/test/Integration/PowerPC/ppc-vec-shift-parameter.f90
A flang/test/Lower/HLFIR/call-parameter-array-arg.f90
A flang/test/Lower/HLFIR/call-parameter-boz.f90
A flang/test/Lower/HLFIR/call-parameter-defined-assign.f90
A flang/test/Lower/HLFIR/call-parameter-sections.f90
M flang/test/Lower/HLFIR/calls-constant-expr-arg.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/call-by-value-attr.f90
M flang/test/Semantics/PowerPC/ppc-vector-intrinsics.f90
A flang/test/Semantics/call-parameter-boz.f90
A flang/test/Semantics/call-parameter-seq-assoc.f90
Log Message:
-----------
[flang] Associate named constant actual arguments with their storage (#222986)
Named constants (PARAMETER) used as actual arguments were folded to
anonymous values before call analysis, so a whole named array passed to
an explicit-shape dummy went through an unnecessary temporary, and an
array element could not start an element sequence association at all
(bogus "Whole scalar actual argument may not be associated with a dummy
argument array" errors). For OpenACC programs that place module
PARAMETERs in device memory with `!$acc declare copyin`, the temporary
also breaks `default(present)` lookups, because the call no longer
refers to the constant's storage.
Retain eligible named-constant designators (whole arrays and array
elements) through argument analysis so that argument association can use
the constant's storage.
Element sequence association with an array VALUE dummy is kept rejected
(with a "not yet" message) and will be addressed in the future PR.
Depends on #222101, which has landed (c89948739b16): compiler-generated
copy-out no longer writes back unmodified bytes, so forwarding read-only
storage through a dummy lacking INTENT(IN) stays safe.
Assisted-by: AI
Commit: 9d9b912ddc4239e5347dc001770589d05d4de929
https://github.com/llvm/llvm-project/commit/9d9b912ddc4239e5347dc001770589d05d4de929
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/test/Transforms/InstCombine/pull-conditional-binop-through-shift.ll
M llvm/test/Transforms/InstCombine/shift.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Misc fixups for #227987 (#228076)
* Use ProfcheckDisableMetadataFixes so we can properly ablate this fix
with the rest.
* Use UTC for updating the tests rather than modifying them manually.
* Use existing functions in tests rather than duplicating coverage.
* Update profcheck-xfail.txt
Commit: ee0fac8539ed16b48a4f817f9a7d69ab5887a8a8
https://github.com/llvm/llvm-project/commit/ee0fac8539ed16b48a4f817f9a7d69ab5887a8a8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Log Message:
-----------
AMDGPU: Remove update-only LiveVariables maintenance from SILowerControlFlow (#225178)
This was only maintained, never relied on. Part of staged LiveVariables removal.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 11983bf00b67b377070742ea20d0fb7fa0414179
https://github.com/llvm/llvm-project/commit/11983bf00b67b377070742ea20d0fb7fa0414179
Author: David Zbarsky <dzbarsky at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/unittests/ASTMatchers/Dynamic/RegistryTest.cpp
Log Message:
-----------
[clang][ASTMatchers] Share variadic dyn-cast matcher marshalling (#202941)
Replace the templated variadic dyn-cast matcher descriptor with one
implementation parameterized by base and derived AST node kinds, while
preserving the typed conversion and derived-kind restriction.
On arm64 Release builds, this reduces stripped `clang-query` by 721,456
bytes, the affected objects by 768,528 bytes, and object relocations by
9,495.
Work towards #202616
AI tool disclosure: Co-authored with OpenAI Codex.
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: 5e06f6305d531e8d0372b45f1de4dd178051572f
https://github.com/llvm/llvm-project/commit/5e06f6305d531e8d0372b45f1de4dd178051572f
Author: Weiwei C <weiwei.chen at modular.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
A llvm/test/CodeGen/Hexagon/hvx-attr-inline-compat.ll
Log Message:
-----------
[hexagon] Add hexagon_hvx function attribute. (#223771)
- [x] Add hexagon_hvx function attribute to be used to annotate function
that contains hand written hvx instructions.
- [x] Add logic to prevent these functions being inlined into or inline
other functions that don't have the same attributes.
- [x] Add tests.
Commit: 3a27201f108ab550f589debd0208cbd35651b58d
https://github.com/llvm/llvm-project/commit/3a27201f108ab550f589debd0208cbd35651b58d
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStepUntil.h
M lldb/source/Target/ThreadPlanStepUntil.cpp
Log Message:
-----------
[lldb][NFC] Simplify ThreadPlanStepUntil (#228065)
Use range-based for loops over the until points, return early instead of
nesting, and move the code that enables or disables the until points
into SetUntilPointsEnabled.
Commit: 7270dbc7b6aa5c66d9ac81f1b45dcde1cb715c93
https://github.com/llvm/llvm-project/commit/7270dbc7b6aa5c66d9ac81f1b45dcde1cb715c93
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
A llvm/test/CodeGen/Mips/Fast-ISel/branch-dead-at.ll
Log Message:
-----------
Mips: Mark the assembler temporary def dead in FastISel branches (#227689)
The conditional branch emitted by FastISel reserves $at for long branch
expansion, which only uses it as a scratch.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 76df4ae44f0b4acbf1d7dee6cc26139255854d29
https://github.com/llvm/llvm-project/commit/76df4ae44f0b4acbf1d7dee6cc26139255854d29
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A clang/include/clang/CodeGenUtils/EHPersonality.h
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/EHPersonality.cpp
Log Message:
-----------
[CIR][CodeGen][NFC] Extract the EHPersonality struct into CodeGenUtils (#223420)
Deduplicates the `EHPersonality` struct and its personality constants between
CIR and classic CodeGen into `EHPersonality.h`. The `EHPersonality::get`
factories become `getEHPersonality` overloads, since the shared struct cannot
name either CodeGenModule.
Assisted-by: Claude Code (Claude Fable 5.1).
Commit: c7fa49485f26aad50c408e49df4a462f97c9b39b
https://github.com/llvm/llvm-project/commit/c7fa49485f26aad50c408e49df4a462f97c9b39b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/unordered-fcmp-select.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in uordered-fcmp-select.ll (#228090)
The condition simply gets inverted so we can directly propagate the
branch weights and then swap them afterwards.
Commit: 72d9e0b9b93ab52aa1b444e49b22d55ee11b8535
https://github.com/llvm/llvm-project/commit/72d9e0b9b93ab52aa1b444e49b22d55ee11b8535
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[ADT] Share relocateBucket across DenseMap.h (NFC) (#227970)
Commit: 575ecec99e625526a3009cd3348f7c68eaefbb46
https://github.com/llvm/llvm-project/commit/575ecec99e625526a3009cd3348f7c68eaefbb46
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[SDPatternMatch] Simplify MaxMin_match. NFC (#227947)
Remove EffectiveOperands and m_SpecificOpc since we no longer need to
match VP nodes.
Use . instead of -> for calling getOperand, getOpcode, and
getNumOperands.
Commit: 6822bba41b6f8b4d677f1950c5e2bd0d4f5564ed
https://github.com/llvm/llvm-project/commit/6822bba41b6f8b4d677f1950c5e2bd0d4f5564ed
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[CIR] Make ASTContext optional in runCIRToCIRPasses (#227128)
Read the triple and the new cir.target_abi attribute from the module
instead of the ASTContext, erroring if either is missing, so the
CIR-to-CIR pipeline can run without a live AST. Part of preparing for:
https://discourse.llvm.org/t/rfc-clangir-making-cir-pipeline-boundaries-first-class-driver-artifacts/90998/15
---------
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: b6ab2a0a68244224ee97222ad9281830109f855a
https://github.com/llvm/llvm-project/commit/b6ab2a0a68244224ee97222ad9281830109f855a
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/CIR/FrontendAction/CIRGenAction.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
A clang/test/CIR/Input/cir-input-ast-action.cir
A clang/test/CIR/Input/cir-input-preamble.cir
A clang/test/CIR/Input/cir-input-unsupported.cir
A clang/test/Frontend/cir-input-not-built.cir
M clang/test/Frontend/lit.local.cfg
Log Message:
-----------
[clang][CIR] Route .cir cc1 input to the ClangIR frontend action (#227156)
Add `FrontendAction::hasCIRSupport()` and extend the IR bypass in
BeginSourceFile to `Language::CIR`. CIRGenAction opts in and, for now,
reports that ClangIR input is not yet supported; parsing and lowering
follow in separate patches. Actions without CIR support report
`err_ast_action_on_cir`. ClangIR input implies `-fclangir*`, since no
other pipeline can consume it.
This is part of the experimental .cir round-trip capability discussed in
https://discourse.llvm.org/t/90998; the input format carries no
stability guarantee.
\* Happy to emit diagnostics here if we want to be more defensive on
this.
---------
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: 0ce2cdcad90fe6454b259e49d68a8340f666190a
https://github.com/llvm/llvm-project/commit/0ce2cdcad90fe6454b259e49d68a8340f666190a
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/utils/TableGen/AsmWriterEmitter.cpp
Log Message:
-----------
[TableGen] Allow AsmWriter to generate uint64_t tables. NFC. (#227641)
Each OpInfo entry in the generated AMDGPUInstPrinter::getMnemonic
carries 8 bytes of data. Previously GenAsmWriter would split that into
two uint32_t tables for no good reason. Generating a single uint64_t
table makes for shorter output and slightly better generated code.
Commit: c97e17aebde35d8dc7cf16c6785229f45a063a17
https://github.com/llvm/llvm-project/commit/c97e17aebde35d8dc7cf16c6785229f45a063a17
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/include/L0Program.h
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[Offload][L0][NFC] Remove old ELF format support (#228011)
After we switched to using Offload Binary (for OpenMP) or direct SPIR-V
images (for SYCL) this support is not used anymore.
Assisted by Claude.
Commit: 70a007805c4864df36645b16b99cb191f78de097
https://github.com/llvm/llvm-project/commit/70a007805c4864df36645b16b99cb191f78de097
Author: Igor Kirillov <igor.kirillov at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging-i128.ll
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging-limits.ll
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging.ll
Log Message:
-----------
[LAA] Add stencil group merging to reduce runtime pointer checks (#187252)
Take this loop, where S is only known at runtime:
for (i = 0; i < N; i++)
Out[i] = In[i - S] + In[i - 1] + In[i] + In[i + 1] + In[i + S];
groupChecks puts In[i - 1], In[i] and In[i + 1] in one group, because
their bounds differ by a constant. In[i - S] and In[i + S] differ from
the rest by a multiple of S, so each stays in its own group. That is
3 groups for In and 3 checks against Out. With two or three strides,
as in 3D stencils, the count grows fast. The Einstein Toolkit / Cactus
CCZ4 code has loops with thousands of checks, and the vectorizer gives
up on them.
This patch adds mergeStencilGroups, which runs after groupChecks. For
the loop above it makes one group for In, from In[i - S] to In[i + S].
One check against Out is enough, plus a check that 1 <= S <= Max.
For each set of groups with the same DependencySetId and AliasSetId:
- Write the offset of every member from a base member as
C + sum(Coeff * Stride), where each Stride is loop-invariant.
- Keep only the members that can be the lowest or the highest address.
Example: if S >= 1, In[i - 1] is never below In[i - S], so it is
dropped. The merged bounds are a umin over the Starts and a umax
over the Ends of the members that are left. These are real member
addresses, so the merge computes no new address.
- Add predicates 1 <= Stride <= Max where SCEV cannot prove them. Max
keeps the offsets from overflowing the index type.
- Merge only if the number of checks goes down. Stride predicates and
extra umin/umax operands count as checks.
A set is not merged if it has a write, a read that does not run on
every iteration, a forked pointer, a pointer PHI outside the loop
header, members with different ranges or steps, or an index wider
than 64 bits. Nothing is merged above -stencil-merge-max-groups
groups (default 4096).
The new flag -stencil-runtime-check-merge controls the merge:
- off (default): no merging;
- auto: merge only when there are more checks than
-vectorize-memory-check-threshold, where the vectorizer gives up;
- force: always try to merge.
To share that threshold, VectorizeMemoryCheckThreshold moves from
LoopVectorize.cpp into VectorizerParams.
Assisted-by: Claude and ChatGPT
Commit: 8da79c7af5425f209543a4c866e280517f31a95b
https://github.com/llvm/llvm-project/commit/8da79c7af5425f209543a4c866e280517f31a95b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
A llvm/test/CodeGen/AArch64/machine-sme-abi-dead-nzcv.ll
M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
Log Message:
-----------
AArch64: Mark status flag clobbers dead in SME ABI pass (#228042)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 4eb6e48a98823f275cb4ebe779645126e54c0a46
https://github.com/llvm/llvm-project/commit/4eb6e48a98823f275cb4ebe779645126e54c0a46
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/test/Target/LLVMIR/omptarget-wsloop.mlir
Log Message:
-----------
[OpenMP] Fix missing implicit barriers in device worksharing loops (#227735)
Device worksharing lowering discarded `NeedsBarrier`, omitting implicit
barriers after loops without `nowait`. Forward the requirement and emit
the barrier outside the outlined loop body, ensuring all participating
threads synchronise.
Co-authored-by: Codex <codex at openai.com>
Commit: a28ddaaca4613075f6cde6b8bd64663ec018778b
https://github.com/llvm/llvm-project/commit/a28ddaaca4613075f6cde6b8bd64663ec018778b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SpillPlacement.h
Log Message:
-----------
[CodeGen] Remove unused SpillPlacement::Linked (NFC) (#227989)
The last use was removed on May 19, 2016 in commit
b926bdac4c18e0f31d827dec482f207856e88e1e.
Assisted-by: Antigravity
Commit: fe0f2bb14bd920118af7e3575cb25b1f30408bcb
https://github.com/llvm/llvm-project/commit/fe0f2bb14bd920118af7e3575cb25b1f30408bcb
Author: Shengxin Pei <TPPPP72 at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/test/C/C23/n2549.c
Log Message:
-----------
[clang] Suppress binary literal warnings in system macros (#228095)
Follow up #228035
Close #192490
Commit: 556b112ec32d836a6239349c99ffa9b43d6ee7c3
https://github.com/llvm/llvm-project/commit/556b112ec32d836a6239349c99ffa9b43d6ee7c3
Author: Jonas Paulsson <paulson1 at linux.ibm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/test/Instrumentation/DataFlowSanitizer/abilist.ll
M llvm/test/Instrumentation/DataFlowSanitizer/abilist_aggregate.ll
M llvm/test/Instrumentation/DataFlowSanitizer/basic.ll
A llvm/test/Instrumentation/DataFlowSanitizer/instrumented-args-exts.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_abilist.ll
M llvm/test/Instrumentation/DataFlowSanitizer/shadow-args-zext.ll
Log Message:
-----------
[DataFlowSanitizer] Properly add ext attributes on arguments as needed. (#225443)
TargetLibraryInfo is used to compute the extension attributes, in part by a new
getExtAttrForI8Param() method. It currently always returns ZExt (or SExt) but is
used so that a target can easily override this if needed.
Commit: bd036a99ee70486e5c6c989c084b9804c817ee64
https://github.com/llvm/llvm-project/commit/bd036a99ee70486e5c6c989c084b9804c817ee64
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Host/HostNativeThreadBase.h
M lldb/include/lldb/Host/windows/HostThreadWindows.h
M lldb/source/Host/common/HostNativeThreadBase.cpp
M lldb/source/Host/windows/HostThreadWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
Log Message:
-----------
[lldb][Windows] Move extended info to host thread (#227470)
I want to add support for reading thread locals on Windows. To do this,
we need to know the address of the TEB. This was implemented for
`TargetThreadWindows`, but when using lldb-server, we didn't have this
info. As a first step, move this to the `HostThreadWindows`, so both the
target thread and native thread can call it.
Commit: a7f8ead8f959c0867993d64c0525f446d02d511f
https://github.com/llvm/llvm-project/commit/a7f8ead8f959c0867993d64c0525f446d02d511f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
Log Message:
-----------
CodeGen: Drop the LiveVariables parameter from convertToThreeAddress (#225182)
This was used for analysis updates, but now the analysis is being removed.
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 8cb1d1566dbb237f161685f624d1e32d6b919c1f
https://github.com/llvm/llvm-project/commit/8cb1d1566dbb237f161685f624d1e32d6b919c1f
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Interpreter/Interpreter.cpp
A clang/test/Interpreter/CUDA/device-module-verifier.cu
M clang/unittests/Interpreter/CMakeLists.txt
A clang/unittests/Interpreter/DeviceOffloadTest.cpp
Log Message:
-----------
[clang-repl] Flush CUDA device bootstrap module before the first PTU (#226975)
The host path sets the bootstrap module aside with CacheCodeGenModule()
once the initial action has run, so the first PTU starts from a fresh
module. The CUDA device path skipped this step. The device module that
HandleTranslationUnit had already finalized during bootstrap stayed
current, and the first device PTU finalized it a second time, resulting
in CodeGen adding every module flag twice. The IR verifier then rejects
the module.
To reproduce, on a build with assertions, or with
`-fverify-intermediate-code` (hidden on release builds since the driver
disables the verifier there), the first input to `clang-repl --cuda`
fails:
```
module flag identifiers must be unique (or of 'require' type)
!"nvvm-reflect-ftz"
module flag identifiers must be unique (or of 'require' type)
!"PIC Level"
module flag identifiers must be unique (or of 'require' type)
!"frame-pointer"
fatal error: error in backend: Broken module found, compilation aborted!
```
Tested on 22.x and main. The `host-supports-cuda` lit probe also hits
this: clang/test/Interpreter/CUDA reports UNSUPPORTED instead of
failing.
After, the first device module carries each flag once and the verifier
accepts it. The probe passes and the CUDA tests run on an assertions
build.
Commit: cce31d71009135088cd09345bca279f1d1fbb848
https://github.com/llvm/llvm-project/commit/cce31d71009135088cd09345bca279f1d1fbb848
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/Analysis/LoopAccessAnalysis/runtime-checks-may-not-return-call.ll
Log Message:
-----------
[LAA] Add tests with loops with may-not-return calls (NFC) (#228102)
Add tests for runtime-check bounds of loops containing a call that may
not return.
Commit: a36eb0cf1af188e88522bcfc8a8cba3bd2ad5fa8
https://github.com/llvm/llvm-project/commit/a36eb0cf1af188e88522bcfc8a8cba3bd2ad5fa8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/test/API/api/multithreaded/TestMultithreaded.py
Log Message:
-----------
[lldb][test] Disable test_python_stop_hook on AArch64 Linux (#228114)
It has beeen flakey on our buildbot. See
https://github.com/llvm/llvm-project/issues/225860 for details.
Commit: 85c141a162683301e1250142ffd1a1c20c5df7e2
https://github.com/llvm/llvm-project/commit/85c141a162683301e1250142ffd1a1c20c5df7e2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXCodeGenPassBuilder.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/test/CodeGen/NVPTX/llc-pipeline-npm.ll
Log Message:
-----------
NVPTX: Drop LiveVariables from the register allocation pipeline (#225183)
The optimized RegAlloc pipeline ran LiveVariables only to satisfy
PHIElimination and TwoAddressInstruction, both of which no longer need it.
Remove the LiveVariables run (and, in the new pass manager, the
UnreachableMachineBlockElim that was there only as a LiveVariables
prerequisite).
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 73ed9a9f1b5dafa53cba0f68ea51131aaa79fed7
https://github.com/llvm/llvm-project/commit/73ed9a9f1b5dafa53cba0f68ea51131aaa79fed7
Author: Cheng-Chieh Liu <jay87406 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDistribute.cpp
M mlir/test/Dialect/Vector/vector-warp-distribute.mlir
Log Message:
-----------
[mlir][Vector] Reject scalable reduction in warp distribution (#225267)
`WarpOpReduction` distributes a `vector.reduction` across warp lanes by
computing `numElements = vectorType.getShape()[0] / warpSize` and
building the per-lane type as a plain `VectorType::get({numElements},
...)`, with no check for a scalable operand.
For a scalable reduction vector, e.g. `vector<[32]xf32>` with warp size
32, this silently drops the scalable marker: the per-lane type becomes
the fixed `vector<1xf32>` instead of `vector<[1]xf32>`, so only 32 total
elements get reduced across lanes instead of `32*vscale`.
Reject a scalable reduction operand before any IR is created, and add a
negative test.
Commit: 4bd89081cd1d9196fedcc800ea4de9f5e371660b
https://github.com/llvm/llvm-project/commit/4bd89081cd1d9196fedcc800ea4de9f5e371660b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Fix confusing variable names. NFC (#227973)
Commit: 9e15ea87cd635d0dac62cb5755523c9bbbd20429
https://github.com/llvm/llvm-project/commit/9e15ea87cd635d0dac62cb5755523c9bbbd20429
Author: Nerixyz <nerixdev at outlook.de>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/source/Host/windows/HostThreadWindows.cpp
Log Message:
-----------
[lldb][Windows] Fix import of NtQueryInformationThread (#227471)
`NtQueryInformationThread` is from `ntdll.dll`, not `Kernel32.dll`. We
never tested this. I'll add a test in the next PR when testing the
gdb-remote handler.
Commit: 92d88bb0c5dcc613b59ede5aad40a1b9341a7fe7
https://github.com/llvm/llvm-project/commit/92d88bb0c5dcc613b59ede5aad40a1b9341a7fe7
Author: Daniil Dudkin <unterumarmung at yandex.ru>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
R clang/test/SemaCXX/constexpr-call-stack.cpp
R clang/test/SemaCXX/constexpr-float-call-stack.cpp
Log Message:
-----------
Revert "[clang] Avoid stack exhaustion in recursive `constexpr` calls" (#228110)
Reverts llvm/llvm-project#201706
See
https://github.com/llvm/llvm-project/pull/201706#issuecomment-5934225006
Commit: a90d9d26f746d913da12adf3bbb95a6735741e05
https://github.com/llvm/llvm-project/commit/a90d9d26f746d913da12adf3bbb95a6735741e05
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/Passes.td
M mlir/lib/Dialect/Vector/Transforms/VectorMaskElimination.cpp
A mlir/test/Dialect/Vector/eliminate-masks-invalid-options.mlir
M mlir/test/Dialect/Vector/eliminate-masks.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Add an eliminate-vector-masks pass (#226517)
Commit: 285f5ab36c33d4ba1ee4c2db2f0b52fc84f12e4c
https://github.com/llvm/llvm-project/commit/285f5ab36c33d4ba1ee4c2db2f0b52fc84f12e4c
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
A lld/test/ELF/aarch64-tls-le-ldst.s
M lld/test/ELF/aarch64-tls-le.s
Log Message:
-----------
[lld][AArch64] Support R_AARCH64_TLSLE_LDST*_TPREL_LO12 (#227629)
Follow-up to #227173. Support the non-NC local-exec TLS load/store
relocations, emitted for `ldr/str xN, [xN, :tprel_lo12:sym]` (previously
"unknown relocation"). They resolve like the `_NC` variants — imm12
holds bits 11:scale of the TP offset — plus an unsigned 12-bit range
check on the full offset. Boundaries and encodings verified identical to
GNU ld 2.46.
Testing: new `aarch64-tls-le-ldst.s` (encodings, out-of-range boundary,
alignment); extended `aarch64-tls-le.s`; full `lld/test/ELF` passes.
Commit: c16c93955e8468e67f622146c744cd302d05464c
https://github.com/llvm/llvm-project/commit/c16c93955e8468e67f622146c744cd302d05464c
Author: Grigory Pastukhov <gpastukhov at meta.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/X86/eh-frame-hdr-sdata8.s
Log Message:
-----------
[BOLT] Support DW_EH_PE_sdata8 encoding in .eh_frame_hdr (#227847)
BOLT always wrote .eh_frame_hdr with 4-byte offsets, truncating those
beyond
2GB. Use 8-byte encoding when needed, as lld does since #179089.
Assisted-By: Opus 5.5
Commit: 8b066a46fcef066dc6d40794cdd79423eb31d311
https://github.com/llvm/llvm-project/commit/8b066a46fcef066dc6d40794cdd79423eb31d311
Author: Akira Hatanaka <ahatanak at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/test/CodeGenObjC/class-stubs.m
Log Message:
-----------
[ObjC] Don't place references to class stubs in __objc_superrefs (#227507)
Loading a reference to a class stub calls objc_loadClassref, which
updates the reference in place. The __objc_superrefs section is a
constant section, so a reference to a class stub cannot be placed there.
Emit such references without a section instead.
rdar://184656330
Commit: d0c882a37955edfc3f7354676506bd0e50946862
https://github.com/llvm/llvm-project/commit/d0c882a37955edfc3f7354676506bd0e50946862
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
A flang/test/Fir/cg-rewrite-unfoldable-slice.fir
Log Message:
-----------
[flang][codegen] Report a shape or slice cg-rewrite cannot read (#227625)
cg-rewrite folds a fir.shape, fir.shape_shift, fir.shift or fir.slice
into the code-gen form by reading it through its defining op. A value
that has none cannot be folded. For a slice this went unreported: the
rewrite dropped it and produced a descriptor for the whole array rather
than the section it names. For a shape it reached a cast on a null
defining op.
Report it instead, and say which operand. Rebuilding the value covers a
block argument, but not every case: a slice chosen by an arith.select
has no single value to take apart.
Commit: 023cc756f984221a05af62f610b99e904292c750
https://github.com/llvm/llvm-project/commit/023cc756f984221a05af62f610b99e904292c750
Author: wenhu1024 <96782898+wenhu1024 at users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
A llvm/test/Analysis/CostModel/NVPTX/v4i8-scalarization.ll
A llvm/test/Transforms/SLPVectorizer/NVPTX/v4i8-scalarization-cost.ll
Log Message:
-----------
[NVPTX][TTI] Fix v4i8 scalarization cost (#226071)
Fixes #224808
Handle v4i8 before the generic packed 32-bit vector case so its
dedicated scalarization cost is reachable. Accumulate the cost in the
outer variable and add a cost-model regression test.
---------
Co-authored-by: Justin Fargnoli <jfargnoli at nvidia.com>
Commit: 1862526e581dd330f2b6a919b9d79ea1070b2133
https://github.com/llvm/llvm-project/commit/1862526e581dd330f2b6a919b9d79ea1070b2133
Author: Zhen Wang <zhenw at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
A flang/test/Lower/OpenACC/acc-routine-allocation-policy.f90
M flang/test/Lower/OpenACC/acc-routine-bind-clone-signature.f90
M flang/test/Lower/OpenACC/acc-routine-bind-devtype-filter.f90
M flang/test/Lower/OpenACC/acc-routine-bind-devtype-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-string-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-bind-undeclared.f90
M flang/test/Lower/OpenACC/acc-routine-multi-name.f90
M flang/test/Lower/OpenACC/acc-routine-named.f90
M flang/test/Lower/OpenACC/acc-routine-use-module.f90
M flang/test/Lower/OpenACC/acc-routine.f90
M flang/test/Lower/OpenACC/acc-routine02.f90
M flang/test/Lower/OpenACC/acc-routine03.f90
M flang/test/Lower/OpenACC/acc-routine04.f90
A flang/test/Transforms/allocation-placement-offload-region.fir
M flang/test/Transforms/stack-arrays-alloca-scope.fir
A flang/test/Transforms/stack-arrays-offload-region.fir
Log Message:
-----------
[flang] Do not honor -fstack-arrays inside offload regions (#227537)
With `-fstack-arrays`, the allocation-placement and stack-arrays passes
move array temporaries from the heap to the stack. Inside an OpenACC
compute construct or a `cuf.kernel` loop, the temporary becomes a
dynamic alloca in the GPU kernel and overflows the device stack:
```fortran
subroutine run()
integer, pointer :: input(:)
integer, allocatable :: output(:)
...
contains
subroutine assign()
!$acc kernels present(input, output)
output(:) = input(:) * 3 ! RHS temporary, dynamic alloca in the kernel
!$acc end kernels
end subroutine
end subroutine
```
https://github.com/llvm/llvm-project/pull/223040 disabled
`-fstack-arrays` for CUDA Fortran device procedures through a
per-function policy, but a compute construct lives inside a host
function and was not covered.
Both passes now keep heap allocations inside offload regions and in acc
routine procedures, which are compiled for the device but not yet
specialized at this point. Small constant size temporaries still go on
the device stack, as for device procedures. Host code is unaffected.
stack-arrays-alloca-scope.fir now runs under allocation-placement, since
stack-arrays no longer converts anything inside OpenACC constructs. Its
small temporaries still go on the stack under the default policy, so the
placement checks are kept; the two r the heap allocation tostay.
Commit: faca09a8ad559bf31f80a9bbae4ccfe2e1ed8f07
https://github.com/llvm/llvm-project/commit/faca09a8ad559bf31f80a9bbae4ccfe2e1ed8f07
Author: Radovan Božić <radovan.bozic at htecgroup.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/Sema/SemaChecking.cpp
M clang/test/Analysis/std-c-library-functions-arg-constraints.c
M clang/test/Analysis/stream-noopen.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for fread, fwrite, and fgets (#204337)
Add missing `-Wforitfy-source` diagnostics for `fread`, `fwrite`, and
`fgets`.
This continues the work from #142230.
Commit: 4ceea6569a6137ce4072dc89176c11ea29b85938
https://github.com/llvm/llvm-project/commit/4ceea6569a6137ce4072dc89176c11ea29b85938
Author: Susan Tan (ス-ザン タン) <zujunt at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
A flang/test/Analysis/AliasAnalysis/modref-call-intent.fir
Log Message:
-----------
[flang][aa] Use Fortran dummy intent in FIR call modref (#227432)
fir::AliasAnalysis::getCallModRef now uses the callee dummy's declared
intent when a pass-by-ref argument aliases the queried variable.
intent(in) is a read, intent(out) is a write, and intent(inout) is both.
A dummy with no visible intent, a callee without a body, or a mismatched
argument count stays a read and a write. The callee is resolved through
the cached symbol table. A local that is not passed is still NoModRef.
Commit: 1c1de19a8b435458ac4b99f06a65ab023e03f8a9
https://github.com/llvm/llvm-project/commit/1c1de19a8b435458ac4b99f06a65ab023e03f8a9
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
Log Message:
-----------
Remove unused param from CheckVectorOperands; NFC (#228136)
The ReportInvalid parameter was being set to true in all of the call
sites, so remove the parameter entirely.
Follow-up to
https://github.com/llvm/llvm-project/pull/227837#discussion_r4157894862
Commit: 733ddaba167f59a0d3e568f26ef13a96b9e9ecff
https://github.com/llvm/llvm-project/commit/733ddaba167f59a0d3e568f26ef13a96b9e9ecff
Author: Nikhita Hegde <nhegde at habana.ai>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
A llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-scope-shared-across-functions.ll
Log Message:
-----------
[SPIRV] Fix crash when two functions share an alias scope (#225017)
When two functions referenced the same alias scope metadata, they were
incorrectly sharing a virtual register. This caused either a crash or
broken SPIR-V output with undefined references. The fix ensures each
function creates its own virtual register for alias scope metadata
---------
Co-authored-by: Michal Paszkowski <michal at michalpaszkowski.com>
Commit: a83a3a4ebd64653dbe6a85819996b3bcfd6753ec
https://github.com/llvm/llvm-project/commit/a83a3a4ebd64653dbe6a85819996b3bcfd6753ec
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[mlir][vector] Add an eliminate-vector-masks pass (#226517)
`eliminateVectorMasks` had no in-tree caller other than a test pass, so
no pipeline could use it. This exposes it as an opt-in
`-eliminate-vector-masks` pass and drops the test pass.
The pass rewrites `vector.create_mask` ops that can be proven all-true
into `vector.constant_mask`; canonicalization then folds those away, so
a masked transfer becomes an unmasked one. Mask sizes are bounded with
`ValueBoundsOpInterface`, so a loop-derived size like `%dim - %iv` can
be proven.
Scalable dimensions need a `vscale` range, given by
`vscale-min`/`vscale-max`. Leaving them unset means fixed-size reasoning
only; a half-specified or inverted range is rejected rather than
silently ignored.
`eliminate-masks.mlir` keeps its checks and only switches its two RUN
lines, which shows the pass behaves as the test pass did.
Follow-up to #221595, and the pass promised when #215340 was closed.
Context:
https://discourse.llvm.org/t/rfc-should-vector-transfer-read-write-keep-in-bounds-measurements-on-the-masking-alternative/91649
Assisted-by: Claude
Commit: ddc70de6ada5822af0ba330a6507e17a07b6b0e4
https://github.com/llvm/llvm-project/commit/ddc70de6ada5822af0ba330a6507e17a07b6b0e4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Support/GenericIteratedDominanceFrontier.h
Log Message:
-----------
[IDF] Use BitVectors indexed by DFS number for visited sets (NFC). (#227832)
IDFCalculatorBase::calculate tracks visited dominator tree nodes in two
SmallPtrSets. The DFS numbers computed at the start of calculate are
unique and dense in [0, number of nodes), with the DFS out-number of the
root being the number of nodes, so use them to index BitVectors instead.
This reduces hashing overhead and improves compile-time, depending on
configuration/workload:
stage1-O3: -0.04%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.22%
stage1-aarch64-O3: -0.06%
stage2-O3: -0.04%
stage2-clang: -0.04%
https://llvm-compile-time-tracker.com/compare.php?from=b96b66160ace30c2b5eef1f4afdb14c95ecc26cd&to=5ffb13d6d1f87195bba8af13366a152a7de2bfe0&stat=instructions:u
Aided by Opus 5.5
PR: https://github.com/llvm/llvm-project/pull/227832
Commit: f1dd51ed8ee7870ccc6e302281aa7b1640c60a1f
https://github.com/llvm/llvm-project/commit/f1dd51ed8ee7870ccc6e302281aa7b1640c60a1f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.h
Log Message:
-----------
AMDGPU: Remove unused LiveVariables include (#228141)
Commit: b6a1653f64c5250418b3e780e5f5b96d5cc85094
https://github.com/llvm/llvm-project/commit/b6a1653f64c5250418b3e780e5f5b96d5cc85094
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
Log Message:
-----------
[mlir][xegpu] Distribute extract_strided_slice over multiple dims (#227478)
SgToLaneVectorExtractStridedSlice only handled a single distributed
dimension, and this PR handles distributing multiple dimensions. It
scales each distributed dim by its own lane_layout entry. Both the size
and the offset along a dim shrink by the number of lanes that split it.
A dim the lanes do not split keeps its offset untouched, and may still
carry non-unit lane_data as before.
assisted-by-claude
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: c351888edeec1371331e9f9a6236238f5707bde1
https://github.com/llvm/llvm-project/commit/c351888edeec1371331e9f9a6236238f5707bde1
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/lib/CGData/CGDataOptions.td
M llvm/lib/Transforms/InstCombine/CMakeLists.txt
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.cpp
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.h
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.td
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/unittests/Option/LibraryOpts.td
M llvm/utils/gn/secondary/llvm/lib/Transforms/InstCombine/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[InstCombine] Declare command line options in TableGen (#227948)
Follow-up to the framework #226087:
Move the cl::opts into InstCombineCLOptions.td, with `prefix =
"instcombine-"`: -instcombine-max-num-phis sets CLOpts.max_num_phis.
CLOpts also replaces InstCombiner::MaxArraySizeForCombine.
Options that were not cl::Hidden are now listed by -help-hidden only,
and -instcombine-lower-dbg-declare is now a bool.
Aided by Opus 5.5
Commit: 670e4c0e3f67177dd25632c4a3df1cdd953343c4
https://github.com/llvm/llvm-project/commit/670e4c0e3f67177dd25632c4a3df1cdd953343c4
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/test/CodeGen/X86/apx/bls-egpr.ll
M llvm/test/CodeGen/X86/bmi.ll
Log Message:
-----------
[X86][APX] Use EVEX BLSI/BLSMSK for i8 patterns with EGPR (#226796)
This is a follow-up to #204746 and #205093, which added the i8 BLSI and
BLSMSK patterns.
The i8 BLSI/BLSMSK patterns were defined outside of Bls_Pats and always
selected the VEX forms, so with EGPR the register allocator could not
assign r16-r31 to their operands. Move them into Bls_Pats so that the
_EVEX variants are selected when EGPR is available.
Assisted-by: Claude Code
---------
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: db77a4618df76a27881aa9f4c4a4ba3d108313aa
https://github.com/llvm/llvm-project/commit/db77a4618df76a27881aa9f4c4a4ba3d108313aa
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-syntax.cpp
Log Message:
-----------
[flang][OpenMP] Simplify uses of llvm::omp::EnumSet a bit, NFC (#228142)
Commit: 152d32ee3550f4e54f2e4ae47dfaa8b9b6ec72a1
https://github.com/llvm/llvm-project/commit/152d32ee3550f4e54f2e4ae47dfaa8b9b6ec72a1
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[Clang][RISCV][P-ext] Add packed Q-format widening accumulate intrinsics (#228009)
Add support for the Packed "Q-format" Multiply with Widening Accumulate
intrinsics:
- `__riscv_pmqwacc_i32x2`
- `__riscv_pmqrwacc_i32x2`
RV32 selects the direct instructions, while RV64 lowers to the
spec-listed `zip16p` and packed Q-format accumulate sequences.
Commit: 9247019d123ba734745f6f8b35118199d082d782
https://github.com/llvm/llvm-project/commit/9247019d123ba734745f6f8b35118199d082d782
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
Log Message:
-----------
[AMDGPU] Pre-commit tests for num_records canonicalizations (#217067)
Add tests for having InstCombine canonicalize the num_records argument
of llvm.amdgcn.make.buffer.rsrc to the width it will ultimately have,
which lets later passes see that, for example, the high bits of the i64
that Clang emits aren't used.
AI disclosure: Claude generated these and I've looked at them
Commit: 88156f8635bee29338aa5d2589318d9857b1236a
https://github.com/llvm/llvm-project/commit/88156f8635bee29338aa5d2589318d9857b1236a
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/teams_generic_loop_reduction_distribute_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Don't use fused dist schedule for teams loop emitted as distribute (#228129)
Fix teams loop reductions lowered as 'distribute' lose their loop.
Claude assisted with this patch.
Commit: d6a906b6d5c3708edf68faf90ebdf1371e03c89b
https://github.com/llvm/llvm-project/commit/d6a906b6d5c3708edf68faf90ebdf1371e03c89b
Author: Jacob Lalonde <jalalonde at fb.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/source/Core/Module.cpp
Log Message:
-----------
[LLDB] Acquire the module mutex at the start of SetLoadAddress (#227149)
Fixes a potential dead-lock from parallel module loading.
I received a quick-stack of LLDB hung loading a core with parallel
module loading enabled, where two threads were trying to mutate a given
module and an object file, but having acquired the module mutex first in
one case, and the object file's section mutex first in the second case,
which each trying to subsequently acquire the other lock.
In the update case, [SetLoadAddress acquires the section list mutex and
then tries to acquire the module
mutex](https://github.com/llvm/llvm-project/blob/60f717946cb5ca911b6be22169b9bd646225c59f/lldb/source/Symbol/ObjectFile.cpp#L614)
```
SectionList *ObjectFile::GetSectionList(bool update_module_section_list) {
std::lock_guard<std::recursive_mutex> guard(m_sections_mutex);
if (m_sections_up)
return m_sections_up.get();
if (update_module_section_list) {
if (ModuleSP module_sp = GetModule()) {
std::lock_guard<std::recursive_mutex> guard(module_sp->GetMutex());
CreateSections(*module_sp->GetUnifiedSectionList());
}
} else {
SectionList unified_section_list;
CreateSections(unified_section_list);
}
return m_sections_up.get();
}
```
While in the other thread, `GetUUID` in `ObjectFileELF` [ultimately
calls
into](https://github.com/llvm/llvm-project/blob/6fee55d8425e735e652968007ee0d6bc35aa6f26/lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp#L1039)
`GetSectionList()` [which tries to acquire the section list
mutex](https://github.com/llvm/llvm-project/blob/6fee55d8425e735e652968007ee0d6bc35aa6f26/lldb/source/Symbol/ObjectFile.cpp#L614).
Causing us to deadlock.
To fix this I have module acquire it's own mutex when calling into a
method which may subsequently try to acquire the mutex again in the
object file's critical section. This also fits with my mental module of
accessing object files, which starts in the module and then calls into
the object file. I do find it a bit weird the object file acquires the
lock, but I haven't actually looked at any old commits to figure out
why.
Commit: 87db7285dac15df66fcc702136cd6106264935ae
https://github.com/llvm/llvm-project/commit/87db7285dac15df66fcc702136cd6106264935ae
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/dynalloc-limits.cpp
Log Message:
-----------
[clang] Fix crash constant-evaluating the construction of huge arrays (#226899)
Fixes #173728
The constant evaluator runs on ordinary code all the time (range checks
for `-W` warnings, `isEvaluatable` in codegen), and it
default-constructs an array by building one `APValue` per element. The
element count got truncated to `unsigned` first and nothing checked its
size, so a local like `struct T {} s[0xFFFFFFFF][0]` ran it out of
memory; with the issue's reproducer, where the count wraps to 2^64 - 4,
an assertions build hits the "bounds check failed" assertion in
`adjustIndex` first. Copying such an array, e.g. into a lambda capture,
had the same problem. This goes back to at least Clang 3.4. The bytecode
interpreter has its own version: it emits code for every element, so a
constructor with a member like `T a[0xFFFFFFFF]` runs it out of memory
too.
Array default construction and `ArrayInitLoopExpr` now go through the
existing `CheckArraySize` guard, the same one `new` already uses, so
evaluation just gives up once the count is too large or over the
`-fconstexpr-steps` limit. The bytecode compiler makes the same decision
up front and emits only the failing check instead of code for the
elements. With `-g` in an assertions build, the reduced reproducer then
trips the IR verifier (`!DISubrange(count: -4)`); that is a separate
problem with arrays of 2^63 or more elements and is not part of this
change I think.
Commit: d47315ba62d6b572a2e6aa0dd7f74a3cc128a569
https://github.com/llvm/llvm-project/commit/d47315ba62d6b572a2e6aa0dd7f74a3cc128a569
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/sanitizer_wrappers.cpp
M compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/shared-libsan-dso.cpp
Log Message:
-----------
[compiler-rt] Fix -shared-libsan usage with internal symbolizer (#227717)
Summary:
https://github.com/llvm/llvm-project/pull/226551 exposed a preexisting
issue when using `-shared-libsan` nad the internal symbolizer builds.
The symbolizer will try to look up the symbol via `RTLD_NEXT`, which
goes in load order. If the sanitizer library is loaded *after* `libc.so`
then this `dlsym` call will miss it.
The solution is to have a fallback that checks using `RTLD_DEFAULT`.
This
should allow us to find the symbol in these exceptional cases. I don't
expect much fallout as this covers a case that currently returns `NULL`.
Loading it in means it could grab a reference ahead of the runtime that
was intended to be intercepted, but for this use-case I don't think this
will apply.
Commit: f3eb0469824479d518c2fcf8fd2c07003af84ae4
https://github.com/llvm/llvm-project/commit/f3eb0469824479d518c2fcf8fd2c07003af84ae4
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] v_cvt_scale_pk8_* are block32 in strict mode (#227426)
Re-enable these instructions in strict mode.
Fixes: LCOMPILER-2841
Commit: 1e1f35b8b866da1feb48a9696567a0d3560b3d33
https://github.com/llvm/llvm-project/commit/1e1f35b8b866da1feb48a9696567a0d3560b3d33
Author: Amir Livneh <amir.livneh at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
Log Message:
-----------
[libFuzzer] Fix typos and punctuation in flag descriptions (#122619)
Co-authored-by: Stan Ulbrych <stan at python.org>
Commit: 7320cc1b77fbe36061f93625216893a42c715d0a
https://github.com/llvm/llvm-project/commit/7320cc1b77fbe36061f93625216893a42c715d0a
Author: Yusra Syeda <99052248+ysyeda at users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/SystemZ/zos-eh.ll
M llvm/test/CodeGen/SystemZ/zos-landingpad.ll
Log Message:
-----------
[SystemZ][z/OS] Fix GOFF exception table (LSDA) section generation (#228097)
Fixes #226804
The z/OS Binder rejects LSDA exception tables with `IEW2353E ... ERROR
CODE IS 25000E` when emitted as renamable PRs under an initial-load
`C_WSA64` ED parented to the root code section.
Following the fix suggested by @mms-it-ch in #226804, emit the LSDA
similarly to static WSA data:
- Under its own Section Definition (`SD`) named `GCC_except.<func>` with
`ESD_BSC_Section`.
- With a `C_WSA64` Element Definition (`ED`) using deferred load
(`GOFF::ESD_LB_Deferred`) and doubleword alignment.
- As a non-renamable Part Reference (`PR`).
Co-authored-by: Yusra Syeda <yusra.syeda at ibm.com>
Commit: ceca7fd338afee8d6c058c48a4c22b06a468d56a
https://github.com/llvm/llvm-project/commit/ceca7fd338afee8d6c058c48a4c22b06a468d56a
Author: Vassil Vassilev <v.g.vassilev at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
Add Vassil's responsibilities to the CODEOWNERS file. (#228167)
I'd like to get more reliable github-based routing when pull requests
arrive in the areas I am maintaining.
For reference, see clang/Maintainers.md
Commit: f294f17505056da14cd436ccd79e7329ccdb9bf7
https://github.com/llvm/llvm-project/commit/f294f17505056da14cd436ccd79e7329ccdb9bf7
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M offload/include/device.h
M offload/libompaccsupport/PluginManager.cpp
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/common/src/RecordReplay.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[offload][omp] Move reading _kernel_environment to libomptarget (#222606)
The xxxx__kernel_environment are only generated for OpenMP kernels. Move
reading them to libomptarget. We still pass the information needed for
launching kernels to the plugins.
Assisted by Claude.
Commit: f13b065a777a2af5e7cf002be0424cd403da0f5a
https://github.com/llvm/llvm-project/commit/f13b065a777a2af5e7cf002be0424cd403da0f5a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang-rt/CMakeLists.txt
Log Message:
-----------
[flang-rt] Add headers as a dependency to the runtime (#228210)
Summary:
The flang-rt runtime implicitly depends on the flang compiler's header
gen. We need to depend on the target for the component.
Commit: 210f8cbeee62ea660fc78acddfebe8f8e9159e72
https://github.com/llvm/llvm-project/commit/210f8cbeee62ea660fc78acddfebe8f8e9159e72
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
Log Message:
-----------
[lldb][Windows] Report a process exit once the process is gone (#228115)
When a debugged process exits, lldb and lldb-server report the exit
while Windows is still tearing the process down. Its executable and DLLs
are still loaded at that point, so a test that deletes or replaces one
of them right after the exit fails with `"access denied"`. This is what
makes `TestReplaceDLL` fail on Windows CI.
This patch reports the exit only after the debugger has released the
exit event and the process has fully terminated, which matches how POSIX
reports an exit.
On a Windows 11 host, `TestReplaceDLL` fails to delete `foo.dll` in 246
out of 640 runs before the change and in 0 of 1,600 after.
rdar://188918066
Commit: 0b0404a8bc76bad0d177c109a4a8fba0df36fc8a
https://github.com/llvm/llvm-project/commit/0b0404a8bc76bad0d177c109a4a8fba0df36fc8a
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M polly/test/ScopInfo/assume_in_non_affine_subregion.ll
Log Message:
-----------
[Polly][Test] Fix missing -plugin-arg (#228221)
After #226773, plugin options must be passed via -plugin-arg. Fix the
regression test from #227311 to the changed command line.
Commit: 325224c7c32b17fa31dfb3142919f22574091c01
https://github.com/llvm/llvm-project/commit/325224c7c32b17fa31dfb3142919f22574091c01
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk-scale-range.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk.ll
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Validate scale_sel in v_cvt_scale_* (#227475)
These instructions can be block16 or block32 depending on the target
and scale_sel bits. Block16 is not supported in strict mode.
Re-enable the rest of the instructions in the strict mode but validate
the scale selector.
Commit: f9e0e3a1419b288a5102db993ca8cd08df6ea6f5
https://github.com/llvm/llvm-project/commit/f9e0e3a1419b288a5102db993ca8cd08df6ea6f5
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
Log Message:
-----------
[lldb-dap][test] Do not overwrite failed/error logs. (#227857)
On failure, log files name changes to be unique to a test method. Append
testcase and DAP logs to log_files so it doesn't get overwritten by the
next test method.
Commit: fa2df666e9e2d946e90da0989bca2f9657d350e8
https://github.com/llvm/llvm-project/commit/fa2df666e9e2d946e90da0989bca2f9657d350e8
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/test/API/commands/process/attach/TestProcessAttach.py
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/attach-wait/TestGdbRemoteAttachWait.py
Log Message:
-----------
[lldb][Windows re-enable tests that are no longer flaky (#227318)
Requires:
- https://github.com/llvm/llvm-project/pull/227308
- https://github.com/llvm/llvm-project/pull/227312
- https://github.com/llvm/llvm-project/pull/227317
rdar://188700994
Commit: 4e7b87f0dd39f21f592ca341b33b0447ea74951b
https://github.com/llvm/llvm-project/commit/4e7b87f0dd39f21f592ca341b33b0447ea74951b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-declarations.cpp
M flang/test/Semantics/CUDA/cuf03.cuf
Log Message:
-----------
[flang][cuda] Reject CONSTANT in main program (#228193)
>From the CUDA Fortran programming guide:
> In the section on variable qualifiers: "The constant variable must be
declared within a module's global data specification scope. … All host
accesses of constant memory must be through use or host association."
> In section 3.2.5, Constant data: "Constant variables and arrays can
appear in modules … Constant variables appearing in modules may be
accessed via the use statement in both host and device subprograms." The
list of allowed uses in host code includes "a named entity within a USE
statement" and "a dummy argument in a host subprogram", but not a local
declaration.
Commit: 60e1cfe0de78b8af7ad623ebd973296d8457bf43
https://github.com/llvm/llvm-project/commit/60e1cfe0de78b8af7ad623ebd973296d8457bf43
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-with-shared-wide-ops.ll
Log Message:
-----------
[LV] Add tests for narrowing interleave groups sharing wide ops (NFC). (#228209)
Add tests where wide recipes feeding store interleave groups are used by
multiple groups or with different members. Currently
@multiple_store_groups_sharing_member_0 and
@wide_op_used_with_different_members are miscompiled with VF 2.
Commit: 1d8ac38783c34e65a0803453012ae96e49cf7538
https://github.com/llvm/llvm-project/commit/1d8ac38783c34e65a0803453012ae96e49cf7538
Author: Aaron Danen <aaron.danen at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/test/CodeGen/WinEH/wineh-cloning.ll
M llvm/test/CodeGen/WinEH/wineh-demotion.ll
A llvm/test/CodeGen/WinEH/wineh-malformed-catchpad.ll
Log Message:
-----------
[WinEH] Emit unreachable on malformed catchpad (#222181)
Fixes #219223 by protecting against malformed catchpad arguments and
marking all catchpads under the parent catchswitch as unreachable.
The catchpad arguments contain critical information for the exception
handling runtime, which I understand gets baked into the binary's
exception handling tables. We can't really put "nothing", and any value
we do put would corrupt the whole EH table. That is why we need to
disable all the associated catchpads, not just the malformed one.
Commit: 0ad20d17a2ba69d5aa745497ca1cba48fec83439
https://github.com/llvm/llvm-project/commit/0ad20d17a2ba69d5aa745497ca1cba48fec83439
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-factor-gt-vf.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory.ll
Log Message:
-----------
[LV] Add tests for narrowing interleave groups with factor > VF (NFC). (#228217)
Add initial test cases with opportunties to narrow interleave groups
where number of members > VF.
Commit: a04c8a66c8a77baf55ac57aea14fc61f2732f8fc
https://github.com/llvm/llvm-project/commit/a04c8a66c8a77baf55ac57aea14fc61f2732f8fc
Author: Maksim Shelegov <maksim.shelegov at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
Log Message:
-----------
[GlobalISel] Reject scalar sources in vector truncate combine (#228121)
G_UNMERGE_VALUES may have a scalar source. Calling getNumElements() on
its LLT asserts, so reject scalars before checking the vector element count.
Add a scalar regression to the existing AArch64
prelegalizer-combiner-use-vector-truncate.mir test. Its existing vector
combine cases remain unchanged.
Commit: fde11d53c2dddcef06f4c053d9f4806db577ec36
https://github.com/llvm/llvm-project/commit/fde11d53c2dddcef06f4c053d9f4806db577ec36
Author: James Y Knight <jyknight at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/docs/WritingAnLLVMPass.md
Log Message:
-----------
Docs: remove gdb startup text from WritingAnLLVMPass. (#228236)
It is simply noise for readers of the doc.
Also, it is (incorrectly) flagged by license-compliance scanners as
indicating GPL-licensed content. Simplest to just drop it.
Commit: 23bc2182f84a42e3bc108d5115bd272faed545c5
https://github.com/llvm/llvm-project/commit/23bc2182f84a42e3bc108d5115bd272faed545c5
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-intrinsics.ll
M llvm/test/Transforms/InstCombine/AMDGPU/make-buffer-rsrc-num-records.ll
Log Message:
-----------
[AMDGPU] Canonicalize num_records to its actual width in InstCombine (#217068)
This PR adds code to InstCombineIntrinsic to change the width of the
num_recods field (by extension or truncation) to the correct width for
the target triple (if a concrete enough target triple has been set) so
that LLVM IR-level optimizations can see the lack of demand for the
high bits, for example.
Assisted by Claude, which also found those buffer lowering edge cases
Commit: 4c520f2ae12ffee271b55f904eba76dfc41b4ff0
https://github.com/llvm/llvm-project/commit/4c520f2ae12ffee271b55f904eba76dfc41b4ff0
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A mlir/include/mlir/Dialect/LLVMIR/ROCDLTargetInfo.h
M mlir/lib/Dialect/LLVMIR/CMakeLists.txt
A mlir/lib/Dialect/LLVMIR/IR/ROCDLTargetInfo.cpp
M mlir/unittests/Dialect/LLVMIR/CMakeLists.txt
A mlir/unittests/Dialect/LLVMIR/ROCDLTargetInfoTest.cpp
Log Message:
-----------
[mlir][ROCDL] Add TargetInfo to replace Chipset, allow features queries (#223562)
Add a new ROCDL::TargetInfo struct that parses AMDGPU triples and
target names using the same logic that Clang and LLVM
use (TargetParser) and maintains the set of features available on a
given GPU.
This is an improvement over the old `amdgpu::Chipset` struct since
that was just a version number and often became stale compared to the
knowledge exposed by LLVM, such as gfx1170 having OCP FP8 support even
though other gfx11 chips don't have it.
This struct also allows for moving to new-style
triples (amdgpu9.42-amd-amdhsa vs amdgcn-amd-amdhsa--gfx942, for
example), which is an ongoing migration in other parts of the compiler
that this PR lets us follow.
It also enables compiling for generic targets, like `gfx11-generic`,
which can be run on all chips in a generation.
The TargetInfo tracks the set of features available on a chip so you
can `.has()` a feature.
Finally, it copies over the handling of `:xnack` and `:sramecc`
modifiers from Clang, where the frontend converts them from "features"
into module flags. Here this is done with the
`migrateArchFeaturesToModuleFlags()` method, which downstream passes
will need to call.
This PR doesn't migrate any users to the new system, it's been split
for revewiability.
AI disclosure: I steered this, Claude wrote the code, I tried to clean
up the docs.
Commit: 101b9ffecf49f695520426ee351e2dfda05d817d
https://github.com/llvm/llvm-project/commit/101b9ffecf49f695520426ee351e2dfda05d817d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[Github] Run docs workflow on changes to utils/docs (#227101)
To ensure we catch any regressions premerge.
Commit: ed613a755b191d5f1c35b8d9a77223db4822c057
https://github.com/llvm/llvm-project/commit/ed613a755b191d5f1c35b8d9a77223db4822c057
Author: Jon Roelofs <jonathan_roelofs at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Fix the modules build after #224277 (#228223)
https://ci.swift.org/job/llvm.org/job/clang-stage2-Rthinlto/job/main/616/
rdar://188857378
Commit: 7380d5b2e42ce4ded08e986a6f773c3638c76439
https://github.com/llvm/llvm-project/commit/7380d5b2e42ce4ded08e986a6f773c3638c76439
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/machine-combiner-fma-chain.ll
A llvm/test/CodeGen/RISCV/machine-combiner-fma-chain.ll
A llvm/test/CodeGen/X86/machine-combiner-fma-chain.ll
Log Message:
-----------
[MachineCombiner][NFC]Add tests for long chain FMA reassociation, NFC (#224126)
Tests for https://github.com/llvm/llvm-project/pull/222676
Commit: 86e73536efe3d7c0282fc0eb482c46c099a3da50
https://github.com/llvm/llvm-project/commit/86e73536efe3d7c0282fc0eb482c46c099a3da50
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CAS/BuiltinObjectHasher.h
M llvm/lib/CAS/BuiltinObjectHasher.cpp
Log Message:
-----------
[CAS] Fix template export for unittest (#227908)
Commit: 353edd99a7f0edb8cfa9fa989797369dbb9ed8e2
https://github.com/llvm/llvm-project/commit/353edd99a7f0edb8cfa9fa989797369dbb9ed8e2
Author: yebinchon <yebin.chon at princeton.edu>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-global-addr.mlir
Log Message:
-----------
[flang][cuda] Resolve scalar constant address to device copy for reads (#227802)
Example test.cuf:
```
module m
integer, constant :: int_0_d = 2
end module
program test
use m
integer :: e(10)
e = 0
e = int_0_d
print *, e ! expect 2 (x10)
end program
```
During lowering, a data transfer from device to host is generated
because reads from a constant scalar consults the device copy. But the
address passed to the cudaMemcpy is the host shadow address. Depending
on the runtime, this is silently serviced as a host-to-host copy with no
issue, or crashes with illegal address.
This change resolves the constant scalar address to the device-side copy
early on in CUFDataTransferOpConversion. It does this early on before
looking at the kind of destination, so read of a constant scalar will be
resolved to the device copy regardless of whether the destination is a
scalar, array broadcast, or descriptor.
---------
Co-authored-by: Yebin Chon <ychon at nvidia.com>
Commit: e98c62dd3be473cb1d247eb35d6f2afd5e5912b8
https://github.com/llvm/llvm-project/commit/e98c62dd3be473cb1d247eb35d6f2afd5e5912b8
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[CAS] Fix template export for unittest (#227908)
Commit: 05390247f59c9f3eddda8f0613fa193b128539a4
https://github.com/llvm/llvm-project/commit/05390247f59c9f3eddda8f0613fa193b128539a4
Author: Vadim Kotov <11969390+vadimkotov at users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/dirent.yaml
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
A libc/src/__support/File/dir_scan_impl.h
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/scandir.cpp
A libc/src/dirent/scandir.h
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/dir_scan_impl_test.cpp
M libc/test/src/dirent/CMakeLists.txt
A libc/test/src/dirent/scandir_test.cpp
Log Message:
-----------
[libc] Implement scandir and its unit tests (#223198)
scandir is a POSIX function from <dirent.h> header that scans the directory and returns all files
contained within, optionally applying user-provided filtering and comparator functions.
Provide implementation which allows substituting the `Dir` class to allow for dependency
injection to cover various error cases.
Commit: 565bd792749195df85efd48c297acaff11644791
https://github.com/llvm/llvm-project/commit/565bd792749195df85efd48c297acaff11644791
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/Target/BorrowedStackFrame.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/source/Core/Disassembler.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Target/BorrowedStackFrame.cpp
M lldb/source/Target/StackFrame.cpp
Log Message:
-----------
[lldb] Remove ConstString from Disassembler (#227810)
Disassembler was using it to store register names in its Operand class.
Commit: abb5ab28610f65dd9a3db4b7fccbf1797d57d524
https://github.com/llvm/llvm-project/commit/abb5ab28610f65dd9a3db4b7fccbf1797d57d524
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable e5m3 conversions on gfx1250-strict (#227861)
Fixes: LCOMPILER-2845
Commit: c396e382533e9cd059cf2b61172cd6922e1cd0f2
https://github.com/llvm/llvm-project/commit/c396e382533e9cd059cf2b61172cd6922e1cd0f2
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/Analysis/LoopAccessAnalysis/num-iters-for-store-load-conflict.ll
M llvm/test/Transforms/LoopVectorize/memdep.ll
Log Message:
-----------
[LAA,LV] Add additional dependence distance tests. (NFC) (#222109)
Add test with dependence on access of type i8, but widest type is i64
and test with multiple load/store forward deps.
Extra tests for https://github.com/llvm/llvm-project/pull/191867,
showing behavior changes.
PR: https://github.com/llvm/llvm-project/pull/222109
Commit: 75b218e7169e25e004391e879f3f41872f785df8
https://github.com/llvm/llvm-project/commit/75b218e7169e25e004391e879f3f41872f785df8
Author: thetruestblue <bblueconway at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/test/lit.cfg.py
Log Message:
-----------
[lit] Preload ASan runtime for ld64 tests on arm64 too (#227873)
get_asan_rtlib() only preloaded the runtime on x86 hosts. On arm64 this
silently skipped the preload, so ASan-instrumented libLTO.dylib aborts
when ld64 dlopen()s it.
rdar://188411900
Commit: 15cbda42e14b7aea32533183520df4f9eba1444c
https://github.com/llvm/llvm-project/commit/15cbda42e14b7aea32533183520df4f9eba1444c
Author: Michael Spencer <bigcheesegs at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/ResolveImportedPathTest.cpp
Log Message:
-----------
[clang][Serialization] Fix latent bug in adjustFilenameForRelocatableAST (#227910)
This patch fixes a latent bug in `adjustFilenameForRelocatableAST`. It
relies on a null terminator, but `PreparePathForOutput` passes in a
`StringRef::data()` that has no null-terminator. Today this is benign as
nothing passes in a path that would hit the attempt at checking for a
null terminator, but future patches will.
The fix both makes the code safer by removing the C string usage, and
handles passing in the base path itself by representing it as `.` and
resolving that back to the (possibly relocated) base path on read.
No test on the writer part as it's not triggerable via an integration or
unit test.
Assisted-by: Claude Code: opus-5.5
Commit: af5f13accfaa1b568b6e77c13b053cac7a3c1f08
https://github.com/llvm/llvm-project/commit/af5f13accfaa1b568b6e77c13b053cac7a3c1f08
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFC][llvm-profdata] Introduce ProfdataError, makeError, and reportError (#228153)
Define ProfdataError, makeError, and reportError, and adapt
exitWithError and exitWithErrorCode to use reportError(makeError(...)).
This establishes the error infrastructure for propagating Error
up to main across incremental commits.
Assisted-by: Gemini
Commit: 07a68a0efe15ba15050b8dc71fb396be7b6059aa
https://github.com/llvm/llvm-project/commit/07a68a0efe15ba15050b8dc71fb396be7b6059aa
Author: Ambrose Leeb <aleeb at nvidia.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Headers/__clang_cuda_builtin_vars.h
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
M clang/test/SemaCUDA/cuda-builtin-vars.cu
A llvm/test/Transforms/PhaseOrdering/nvptx-assume-special-register.ll
Log Message:
-----------
[CUDA] [Headers] Mark getters for `threadIdx` etc. as `const` (#228166)
The LLVM builtins these lower to are already effectively treated as
such, so this shouldn't cause any correctness issues. Adding this
attribute enables assumptions on these builtins; previously, such
assumptions would be discarded as Clang by default treats function calls
as having side-effects.
This patch also adds some optimiser tests to ensure assumptions
involving these builtins actually improve the resulting IR.
Tests were generated by Codex.
Fixes https://github.com/llvm/llvm-project/issues/181340.
Commit: 65c4536603fff8927228766057e594879bf70f9a
https://github.com/llvm/llvm-project/commit/65c4536603fff8927228766057e594879bf70f9a
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
Log Message:
-----------
[lldb] Remove unused method Platform::GetSDKDirectory (#227903)
Commit: 83f8ff5cb16573029caf5a39b02e8fa1b55c17dc
https://github.com/llvm/llvm-project/commit/83f8ff5cb16573029caf5a39b02e8fa1b55c17dc
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/select_mat.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/select_mat-errors.hlsl
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/select_mat.ll
Log Message:
-----------
[Matrix] Implement matrix support for the `select` intrinsic (#227753)
Closes #184487.
This PR implements the matrix api for `select`, adds matrix codegen
tests, matrix sema tests, and SPIRV matrix backend tests. DirectX matrix
backend tests were not added because no DirectX backend changes were
made.
Assisted-by: Claude Opus 4.8
Commit: 6cb6a183150793de5d41894e879d82fd6e48dde7
https://github.com/llvm/llvm-project/commit/6cb6a183150793de5d41894e879d82fd6e48dde7
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[Matrix] Implement matrix support for the `select` intrinsic (#227753)
Closes #184487.
This PR implements the matrix api for `select`, adds matrix codegen
tests, matrix sema tests, and SPIRV matrix backend tests. DirectX matrix
backend tests were not added because no DirectX backend changes were
made.
Assisted-by: Claude Opus 4.8
Commit: fd0ffeea338eed99f799ce450cb744a9fab2b445
https://github.com/llvm/llvm-project/commit/fd0ffeea338eed99f799ce450cb744a9fab2b445
Author: Kelvin Li <kli at ca.ibm.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
Log Message:
-----------
[flang] fix unused variable (NFC) (#227768)
Commit: 0319ac1a47d24b53c1f3da8b8bb26b931ef48d81
https://github.com/llvm/llvm-project/commit/0319ac1a47d24b53c1f3da8b8bb26b931ef48d81
Author: Mrgoudan <mrgoudan8888 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineInlineTests.cpp
Log Message:
-----------
[clangd] DefineInline: only trigger on the declaration that has the body (#227534)
The "Move function body to declaration" tweak (DefineInline) is offered on a redeclaration that follows the definition, and then fails when applied.
### Reproduction
```
printf 'void h(void) {}\nvoid h(void);\n' > /tmp/p3.c
clangd --check=/tmp/p3.c 2>&1 | grep -E 'DefineInline|All checks'
```
Before (also reproduces with clangd 17.0.6 and 19.1.7):
```
tweak: DefineInline ==> FAIL: Couldn't find semicolon for target declaration.
All checks completed, 1 errors
```
After:
```
All checks completed, 0 errors
```
### Cause
`DefineInline::prepare` guards on `Source->hasBody()`, which is true for
any declaration of a function that is defined anywhere in its redeclaration chain.
Selecting a redeclaration that comes after the definition therefore
passes the guard. `findTarget()` returns the canonical declaration, which in that order is the definition itself, so `Target != Source` and `prepare` succeeds.
`apply` then looks for a `;` after the definition's body and fails. The fix is to use `doesThisDeclarationHaveABody()`, which is true only for the declaration
that carries the body. The existing test only covered a prototype before the definition, where `Target == Source` masked the wrong guard; this adds the redeclaration-after-definition case.
Following review: also bail out when `Target` is itself a definition
(`isThisDeclarationADefinition()`, covering duplicated and deleted
definitions), and assert that `Source` has a body, since clangd disables
delayed template parsing for the main file.
This change was prepared with the assistance of an AI tool (Claude);
I have reviewed and tested it.
Commit: bd9847fdb7854e04dfbfe30d6d4e082baf641d71
https://github.com/llvm/llvm-project/commit/bd9847fdb7854e04dfbfe30d6d4e082baf641d71
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in order subcommand (#228154)
Change order_main to return Error and handle it with reportError
in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: 7e1eafc57669a23bc7d60afa14c90c9799ae7082
https://github.com/llvm/llvm-project/commit/7e1eafc57669a23bc7d60afa14c90c9799ae7082
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
A llvm/test/DebugInfo/AArch64/dbg-value-globaladdr-gisel.ll
A llvm/test/DebugInfo/ARM/dbg-value-globaladdr-rwpi.ll
A llvm/test/DebugInfo/COFF/globaladdr-codeview.ll
A llvm/test/DebugInfo/MIR/X86/globaladdr-mixed-locations.mir
A llvm/test/DebugInfo/MIR/X86/globaladdr-offset.mir
A llvm/test/DebugInfo/WebAssembly/dbg-value-globaladdr-pic.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr-rejected.ll
A llvm/test/DebugInfo/X86/dbg-value-globaladdr.ll
A llvm/test/DebugInfo/X86/globaladdr-offset.ll
A llvm/test/DebugInfo/X86/globaladdr-tag-offset.ll
A llvm/test/DebugInfo/X86/got-equivalent.ll
A llvm/test/DebugInfo/X86/implicit-pointer-global.ll
M llvm/test/DebugInfo/X86/sdag-dangling-dbgvalue.ll
A llvm/test/DebugInfo/X86/variadic-global.ll
M llvm/test/DebugInfo/assignment-tracking/X86/sdag-dangling-dbgassign.ll
Log Message:
-----------
[DebugInfo] Support global addresses in variable locations (#218722)
This patch adds support for global address locations to SelectionDAG,
GlobalISel and AsmPrinter. The actual implementation is very similar to
how constants are being handled so most code changes are very
mechanical.
The motivation for adding global address support is the Swift compiler
and it is needed even in unoptimized code. For example, the standard
libary implements the empty array with a global "empty array storage"
singleton object, so it can show up as the location of array values.
Another very common use-case are references to type metadata, which is
also accessed via global symbols.
It is even possible to motivate this with a C exmple:
extern int g; int *p = &g;
also produces the dbg_value with a global value.
This patch adds an SDDbgOperand kind for a global address which gets
lowered to a MO_GlobalAddress DBG_VALUE operand, a DbgValueLocEntry, and
finally DW_OP_addrx/DW_OP_stack_value, similar to how global
DITemplateValueParameter are handled.
In AsmPrinter the address pool is preferred, its index is plain data
that both a DIE and the byte stream backing a location list can hold.
Before DWARF 5 the pool is only available under split DWARF, so fall
back to a relocated DW_OP_addr, which only a DIE can carry. Emit no
location at all when neither is possible.
Not handled are thread locals, which need DW_OP_form_tls_address,
dllimport, whose address requires a load from the import address table,
and ifuncs, whose symbol address is not the value of the pointer.
rdar://156549577
Assisted-by: Claude
Commit: c1baa612dd11cc3c3903b79a04902491d96f9d49
https://github.com/llvm/llvm-project/commit/c1baa612dd11cc3c3903b79a04902491d96f9d49
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/test/Instrumentation/SanitizerCoverage/interposable-symbol.ll
Log Message:
-----------
[SanitizerCoverage] Don't let noipa affect comdat selection (#228182)
On non-ELF targets, SanitizerCoverage only puts a function's coverage
arrays in a comdat if the function isn't interposable.
`isInterposable()`
also returns true for `noipa` function definitions by default, but
`noipa` doesn't affect linkage. Query
`isInterposable(/*CheckNoIPA=*/false)` so `noipa` functions get the same
comdat treatment as other functions with the same linkage.
This is one of a few refinements of noipa identified while working on
making optnone imply noipa - without these refinements,
optnone-implies-noipa, might substantially change clang -O0 codegen. I'm
open to discussing whether these refinements are the right direction,
though.
Assisted-By: Claude
Commit: 49f27c4141f4fccaa84e7f5d7950c15f150c2645
https://github.com/llvm/llvm-project/commit/49f27c4141f4fccaa84e7f5d7950c15f150c2645
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
M llvm/docs/AMDGPUUsage.rst
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/test/MC/AMDGPU/amdgcn_target_directive_from_eflags.s
M llvm/unittests/TargetParser/TargetParserTest.cpp
Log Message:
-----------
[AMDGPU] Add SRAMECC on/off mode capability (#225540)
Distinguish SRAMECC hardware support from selectable on/off modes,
mirroring XNACK. Preserve selectable modes on existing targets and use
the new capability for target-ID validation, defaults and printing,
module flags, and disassembly.
Commit: 7f1f916d4a27d2829eeeeabf09cdca64fa872330
https://github.com/llvm/llvm-project/commit/7f1f916d4a27d2829eeeeabf09cdca64fa872330
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisFP int SDNodeInfo::verifyNode. (#228260)
Assisted-by: Claude
Commit: 1524cec90a78ad6da741458ee6fdea4721894398
https://github.com/llvm/llvm-project/commit/1524cec90a78ad6da741458ee6fdea4721894398
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M openmp/runtime/src/CMakeLists.txt
M openmp/runtime/src/kmp_runtime.cpp
M openmp/runtime/src/kmp_version.cpp
Log Message:
-----------
[OpenMP][libomp] Cleanup OpenMP specification version information (#225427)
Make OpenMP specification version and date aligned with what is defined
in the CMake configuration.
Commit: 839d60d83cf92f6e0d2804bc00c08120f25fcc49
https://github.com/llvm/llvm-project/commit/839d60d83cf92f6e0d2804bc00c08120f25fcc49
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPConstructDecomposition.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/CodeGenOpenMP/target-parallel.c
Log Message:
-----------
[CIR][OpenMP] Add support for combined target parallel directives (#207019)
This patch adds support for handling combined target and parallel
directives. It also refactors the code so that the emission functions
can be easily combined to handle both the single and combine cases for
emitting directives.
Assisted-by: Cursor / claude-opus-4.8-medium
Commit: 72435d3cf2e601d53595715b42246b02d65f0966
https://github.com/llvm/llvm-project/commit/72435d3cf2e601d53595715b42246b02d65f0966
Author: Andres-Salamanca <andrealebarbaritos at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
M clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
M clang/test/CIR/CodeGenCoroutines/coro-task.cpp
M clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/co-return.cir
R clang/test/CIR/IR/coro-body.cir
A clang/test/CIR/IR/coroutine.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/invalid-await.cir
M clang/test/CIR/IR/invalid-co-return.cir
R clang/test/CIR/IR/invalid-coro-body.cir
A clang/test/CIR/IR/invalid-coroutine.cir
M clang/unittests/CIR/ControlFlowTest.cpp
Log Message:
-----------
[CIR] Add structured control flow for coroutine suspend points (#213191)
This PR adds 2 new ops for improving structured control flow in
coroutines, according to the redesign in this discussion:
https://github.com/llvm/llvm-project/pull/203802#discussion_r3464356343
One of the ops is `suspend_point`, which marks the point where a
coroutine should suspend and return control flow to the caller it's also
the point where the coroutine resumes from when it starts again. This op
must be inside the `cir.await` suspend region, and it works in pair with
the `CoroRetPoint` op, which marks the only exit point of the coroutine
so no matter how many awaits/suspend points exist in the body, they all
converge on the same exit path.
This will help the FlattenCFG pass know where to branch when flattening
the `cir.await` op. Previously we didn't have an exact point to branch
to when suspending a coroutine this gives us that.
---------
Co-authored-by: Erich Keane <ekeane at nvidia.com>
Commit: c410892503e4ae39b336baee7cff21d1a159de73
https://github.com/llvm/llvm-project/commit/c410892503e4ae39b336baee7cff21d1a159de73
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in overlap subcommand (#228155)
Change overlap_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: 62a600b15deab177998f3c91afcf573de47dd9ea
https://github.com/llvm/llvm-project/commit/62a600b15deab177998f3c91afcf573de47dd9ea
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/tbl-loops.ll
Log Message:
-----------
[AArch64][GlobalISel] Add full reverse tbl loop test. NFC (#228276)
Add GISel test coverage whilst here too.
Commit: 15183167748a9a9f83d1dfbaaa942998490acf9d
https://github.com/llvm/llvm-project/commit/15183167748a9a9f83d1dfbaaa942998490acf9d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/test/Transforms/InstCombine/xor-and-or.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in xor-and-or.ll (#228246)
c461d3cf5e8b9cd2e930d7a275ecdd485b6fcc29 previously attempted to fix
this, but was partially incorrect (propagation in
xor_logic_and_logic_or2_commuted picked up metadata from the wrong
select), and also partially incomplete. This patch fixes that by making
the conditions where we pull profile metadata simpler (now when the new
condition exactly matches a previous condition).
Commit: 7710aeb5bc1f7ad54dcc4b2a9826e0c67b60d5db
https://github.com/llvm/llvm-project/commit/7710aeb5bc1f7ad54dcc4b2a9826e0c67b60d5db
Author: Brad Smith <brad at comstyle.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M libunwind/src/Registers.hpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/ra_sign_state.pass.cpp
Log Message:
-----------
[compiler-rt][libunwind] Check elf_aux_info return value (#228190)
elf_aux_info() returns an errno value (0 on success) rather than -1
with errno set. Check the result and treat a failure as "no features
reported" instead of silently ignoring the error.
In compiler-rt, hwcap had no initializer, so a failed call left it
uninitialized. The libunwind users already started from zero, so the
change there only makes the error handling explicit.
Commit: 07b29f6b191014710ee357dd0ad64bdd3e586229
https://github.com/llvm/llvm-project/commit/07b29f6b191014710ee357dd0ad64bdd3e586229
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 1524cec (#228273)
This fixes 1524cec90a78ad6da741458ee6fdea4721894398 (#225427).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=1524cec90a78ad6da741458ee6fdea4721894398
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 42040049299b99c01fd841d0f123ffc7e5c13ac1
https://github.com/llvm/llvm-project/commit/42040049299b99c01fd841d0f123ffc7e5c13ac1
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: 21912d49dffb43588035dcb5b99558f93139ec60
https://github.com/llvm/llvm-project/commit/21912d49dffb43588035dcb5b99558f93139ec60
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: d4f6f06041126b3a343ddc21e6bacc19358cc022
https://github.com/llvm/llvm-project/commit/d4f6f06041126b3a343ddc21e6bacc19358cc022
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[clang-repl] Fix TargetMachine leak in CUDA device PTX generation (#228208)
The TargetMachine created per PTU in GeneratePTX was never freed, which
LSan now flags with the addition of DeviceOffloadTest. Make it a
unique_ptr declared before the PassManager, since the codegen passes
hold a reference to it.
Commit: 0791157af02871142368d001fd8c2c1fd2b3a2a6
https://github.com/llvm/llvm-project/commit/0791157af02871142368d001fd8c2c1fd2b3a2a6
Author: A. Jiang <de34 at live.cn>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
Log Message:
-----------
[libc++][test] Remove some `XFAIL` for LLVM libc in multi-threaded tests (#228036)
Recently, LLVM libc fixed https://llvm.org/PR194029 in
https://llvm.org/PR226134, so more libc++ tests passes with LLVM libc
now.
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 084db4ab7e3b3f32bf2c0a28ea4a0b1dc5a3651c
https://github.com/llvm/llvm-project/commit/084db4ab7e3b3f32bf2c0a28ea4a0b1dc5a3651c
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Remove unused `rules_android` dependency (#228174)
This dep appears to be unused. Though to note, it is still pulled in
through the `com_google_protobuf` dependency but there is no need to
explicitly pin it as a dependency to `llvm-project`
Commit: 56a27f76711691cb927cb4310531fc55db57b6f5
https://github.com/llvm/llvm-project/commit/56a27f76711691cb927cb4310531fc55db57b6f5
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in show subcommand (#228156)
Change show_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: a9d345976e5ae9c67ba69f964843c82654606883
https://github.com/llvm/llvm-project/commit/a9d345976e5ae9c67ba69f964843c82654606883
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
Log Message:
-----------
[SandboxVectorizer] Add missing export to symbol used in test (#227879)
Commit: 41ae65c382010435be5c5187d0d214c497b90571
https://github.com/llvm/llvm-project/commit/41ae65c382010435be5c5187d0d214c497b90571
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
Log Message:
-----------
[VPlan] Add missing export to symbol used in test (#227888)
Commit: 5c8e5ed14687b9b205ca90502976678302135b7f
https://github.com/llvm/llvm-project/commit/5c8e5ed14687b9b205ca90502976678302135b7f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
A flang/test/Semantics/CUDA/cuf-device-data-host-read.cuf
Log Message:
-----------
[flang][cuda] Diagnose host reads of device data (#228271)
Host code may only use device data in a data transfer assignment or as
an
actual argument. When device data appeared anywhere else, such as in an
IF
condition, flang accepted it silently and lowered it to a plain host
load of
device memory:
subroutine s(h, a)
double precision :: h, a(10)
attributes(device) :: a
if (a(3) > 2.5d0) h = 1.0d0
end subroutine
The CUDA checker now emits an error when host code reads data with the
DEVICE or CONSTANT attribute in a scalar expression. These expressions
include IF and ELSE IF conditions, DO bounds, DO WHILE, SELECT CASE
selectors, STOP codes and allocate bounds.
Device data that is only designated is not read and is still accepted.
This
covers inquiry intrinsics (ALLOCATED, SIZE, LBOUND, ...), address
intrinsics
(LOC, C_LOC, C_DEVLOC), and variables passed as actual arguments.
Subscripts
of these designators are still checked, so f(d(n_dev)) is an error.
Managed and unified data are host accessible and are not diagnosed.
Device subprograms, CUF kernels and OpenACC compute constructs are
skipped.
Assignments keep their existing data transfer checks.
Commit: b55367c5102184b493edcde61fb2c7ec8a8e0f76
https://github.com/llvm/llvm-project/commit/b55367c5102184b493edcde61fb2c7ec8a8e0f76
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
A clang/test/CIR/CodeGenCUDA/global-addrspace-cast.cu
Log Message:
-----------
[CIR] Cast global addresses to their declared address space (#226649)
Opened to address a portion of
https://github.com/llvm/llvm-project/issues/226629
In CUDA, `__shared__ int sh` has type `int` but lives in AS 3. Classic
codegen casts the address to the declared type's AS where it's formed,
so users just see a generic pointer. We weren't doing that, so things
like `return &sh;` bitcast the slot instead, and NVPTX never got a
`cvta.shared`. This patch does the same cast in `getAddrOfGlobalVar` and
wherever static locals are fetched.
This also drops the comment claiming lowering would emit the cast for
us. That's only true for OpenCL, where the declared type already carries
the AS. LowerToLLVM never inserts casts on its own.
Assisted-by: Claude / Opus 5.5
Commit: 6c1d1068a26d789f0a7d0a4b40dc77189a0042ab
https://github.com/llvm/llvm-project/commit/6c1d1068a26d789f0a7d0a4b40dc77189a0042ab
Author: David Rivera <davidriverg at gmail.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/CodeGen/get-member-addrspace.cpp
A clang/test/CIR/CodeGenHIP/inline-asm-multi-output-addrspace.hip
M clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
M clang/test/CIR/IR/invalid-struct.cir
Log Message:
-----------
[CIR] Propagate the record address space to get_member (#226650)
Addresses: https://github.com/llvm/llvm-project/issues/226629
A member lives in its record's address space, but a few `get_member`
builders always produced a default-AS pointer. On SPIR-V that's private,
so a SYCL kernel was reading its captured pointer through a private
pointer. This patch takes the AS from the base and adds a verifier check
so we catch any stragglers.
Assisted-by: Claude / Opus 5.5
Commit: b08cb38bd7bcacb1a740f2dd566eef19c2b9ae40
https://github.com/llvm/llvm-project/commit/b08cb38bd7bcacb1a740f2dd566eef19c2b9ae40
Author: Yonah Goldberg <ygoldberg at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/test/CodeGen/NVPTX/atomicrmw-sm60.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm70.ll
M llvm/test/CodeGen/NVPTX/atomicrmw-sm90.ll
M llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-i64-sm20.ll
A llvm/test/Transforms/AtomicExpand/NVPTX/atomicrmw-sub.ll
Log Message:
-----------
[AtomicExpand] Implement SUB → ADD(-x) and FSUB → FADD(-x) (#221425)
Implement ATOMIC_SUB → ATOMIC_ADD(-x) and ATOMIC_FSUB → ATOMIC_FADD(-x).
Many targets have atomic adds, but I don't think any have atomic subs.
This transform prevents cmpxchg expansion of atomic SUB. Enable these
transformations in NVPTX.
The integer variant exists in many different places currently. For
example, NVPTX currently expands it in DAG legalization.
begin AI generated
- SelectionDAG generic legalization:
[LegalizeDAG.cpp:3410](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp#L3410)
- GlobalISel generic legalization:
[LegalizerHelper.cpp:5117](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L5117)
- GlobalISel outlined-atomic libcall path, mapping SUB to negated
`LDADD`:
[LegalizerHelper.cpp:919](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L919)
and
[LegalizerHelper.cpp:973](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp#L973)
- X86 SelectionDAG, when the result is used:
[X86ISelLowering.cpp:33966](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/X86/X86ISelLowering.cpp#L33966)
- SystemZ i32/i64:
[SystemZISelLowering.cpp:5281](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp#L5281)
- SystemZ i8/i16, constant RHS only:
[SystemZISelLowering.cpp:5238](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SystemZ/SystemZISelLowering.cpp#L5238)
- BPF i32 and i64 instruction-selection patterns:
[BPFInstrInfo.td:1040](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/BPF/BPFInstrInfo.td#L1040)
and
[BPFInstrInfo.td:1062](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/BPF/BPFInstrInfo.td#L1062)
- LoongArch i8/i16 patterns:
[LoongArchInstrInfo.td:2314](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td#L2314)
- LoongArch i32/i64 patterns:
[LoongArchInstrInfo.td:2371](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td#L2371)
- AArch64 GlobalISel/LSE pattern:
[AArch64InstrAtomics.td:546](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AArch64/AArch64InstrAtomics.td#L546),
with the negating pattern machinery in
[AArch64InstrFormats.td:12625](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AArch64/AArch64InstrFormats.td#L12625)
- AMDGPU changes only `atomic sub 0` to `atomic add 0`:
[SIISelLowering.cpp:21345](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/AMDGPU/SIISelLowering.cpp#L21345)
end AI generated
It looks like the only place that does the float transformation is
SPIRV:
begin AI generated
- SPIR-V converts `G_ATOMICRMW_FSUB` into `OpAtomicFAddEXT` with an
`OpFNegate`:
[SPIRVInstructionSelector.cpp:1413](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp#L1413),
with operand-negation machinery at
[SPIRVInstructionSelector.cpp:2614](https://github.com/llvm/llvm-project/blob/4977a0c815c39fd90bb67c270174f2356ee9b5a7/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp#L2614)
end AI generated
I guess less targets have a native atomic fadd, but it looks like
Aarch64 and AMDGPU do, so this could be useful there.
AI assisted.
Commit: 79f415178fb162f390e8c4628001fb4b8ce3998b
https://github.com/llvm/llvm-project/commit/79f415178fb162f390e8c4628001fb4b8ce3998b
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-cuda.h
R flang/test/Semantics/CUDA/cuf-device-data-host-read.cuf
Log Message:
-----------
Revert "[flang][cuda] Diagnose host reads of device data" (#228286)
Reverts llvm/llvm-project#228271
auto-merging was on by mistake
Commit: 52638665f52fa7254076d1acc9e1191c6fa1c0b3
https://github.com/llvm/llvm-project/commit/52638665f52fa7254076d1acc9e1191c6fa1c0b3
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
A clang/test/CIR/CodeGenHLSL/cxx-this-lvalue.hlsl
Log Message:
-----------
[CIR] Support CXXThisExpr in emitLValue (#227316)
Support `CXXThisExpr` in `CIRGenFunction::emitLValue` by wrapping
`loadCXXThisAddress()` into an LValue via `makeAddrLValue()`, matching
classic Clang codegen (`CGExpr.cpp:1865`).
This enables LValue contexts for `this`, such as member access
expressions via `this.field` in languages like HLSL where `this` is
reference-like.
Fixes #227193
Commit: d63124ff120577621c7a56a2bf1f47437cb3e9c7
https://github.com/llvm/llvm-project/commit/d63124ff120577621c7a56a2bf1f47437cb3e9c7
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Evaluate/tools.h
M flang/lib/Evaluate/tools.cpp
M flang/test/Lower/CUDA/cuda-associate-data-transfer.cuf
Log Message:
-----------
[flang][cuda] Look through associate names for managed and unified data (#228206)
IsCUDADeviceSymbol looks through an associate name: the name is device
data when its selector has device symbols. The managed and unified
predicates only handled object entities, so an associate name whose
selector is managed data was counted as device data that is not managed.
In host code, an element assignment such as
```
associate(px => g%x, py => g%y)
px%a(i,j) = r + px%s * real(py%n, 8)
end associate
```
where `a` and `y` are managed, was then classified as a data transfer.
This
emitted a `cuf.data_transfer` from a scalar value, which the verifier
rejects.
IsCUDADataAttrSymbol now gives an associate name the attribute of the
variable its selector designates. As in CollectEffectiveCudaSymbols, the
attribute of a component prevails over the one of its base.
IsCUDAManagedOrUnifiedSymbol is now built on it.
Commit: 20a018a6d9e13575b1aac2625e9db46b5da6676a
https://github.com/llvm/llvm-project/commit/20a018a6d9e13575b1aac2625e9db46b5da6676a
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Use `includes` for per-target lib/Target dirs to fix -Wmicrosoft-include (#228282)
This is a cleaner implementation to
https://github.com/llvm/llvm-project/pull/227867 which provides a more
accurate-to-cmake include path instead of silencing the error.
Commit: d661038374993004ac73b9f0eb483a2aac356174
https://github.com/llvm/llvm-project/commit/d661038374993004ac73b9f0eb483a2aac356174
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sys/windows/CPUFeatures.cpp
M orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
A orc-rt/lib/bedrock/sys/windows/SocketHandle.cpp
Log Message:
-----------
[orc-rt] Updating socket handling on win to get it fully stubbed (#228038)
This also fixes a missing header.
Commit: 7df7d1e7c10c2c01d0b157fdf7bb3248e13a6370
https://github.com/llvm/llvm-project/commit/7df7d1e7c10c2c01d0b157fdf7bb3248e13a6370
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
M llvm/test/CodeGen/X86/data-section-prefix.ll
A llvm/test/CodeGen/X86/no-jt-prefix-sdp-disabled.ll
Log Message:
-----------
[StaticDataLayout] Only emit JT prefixes if enabled (#228222)
Previously we were unconditionally emitting section prefixes for jump
tables. This meant that even with SDP disabled, we would end up with a
.rodata.unlikely section. This is somewhat confusing and also makes
ablation experiments harder.
Commit: a3c098fec12330ec6fb7a352a56839ed9aeb082c
https://github.com/llvm/llvm-project/commit/a3c098fec12330ec6fb7a352a56839ed9aeb082c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/intrinsic-select.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix profile propagation in intrinsic-select.ll (#228295)
In these cases we're creating a new Select with the exact same
condition, so we can just copy the metadata.
Commit: 3fb83d789b3419da9d94e9e4bac065c9fdc482e7
https://github.com/llvm/llvm-project/commit/3fb83d789b3419da9d94e9e4bac065c9fdc482e7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in BootstrapInfoTest (#228305)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in BootstrapInfoTest.
Commit: 7b645c2ee1c9928f6cd7e7fa92cd432753f6a3af
https://github.com/llvm/llvm-project/commit/7b645c2ee1c9928f6cd7e7fa92cd432753f6a3af
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUBlocking.cpp
M mlir/test/Dialect/XeGPU/xegpu-blocking.mlir
Log Message:
-----------
[mlir][xegpu] Block a convert_layout at a tile both layouts accept (#227892)
This PR makes `XeGPUBlockingPass::getTileShape` pick a
`convert_layout`'s tile per dimension instead of by total size.
Choosing by total size returns `inst_data = [8, 16]` over `[1, 64]`
because `128 >= 64`, leaving a 16-wide tile while the target needs
`lane_layout * lane_data = 16 * 4 = 64` columns. The blocked op is then
rejected as "invalid target layout, data cannot be evenly distributed".
Taking the larger `inst_data` per dim gives `[8, 64]`, which is valid
for both layouts since `inst_data` values are powers of two.
assisted-by-claude
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 14513d6afff0a81160f49ccac24e27b021aa4f5a
https://github.com/llvm/llvm-project/commit/14513d6afff0a81160f49ccac24e27b021aa4f5a
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/llvm-project-overlay/bolt/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clang-tidy/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang-tools-extra/clangd/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/clang/tools/clang-fuzzer/BUILD.bazel
M utils/bazel/llvm-project-overlay/compiler-rt/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/linalggen.bzl
M utils/bazel/llvm-project-overlay/mlir/tblgen.bzl
M utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/src/BUILD.bazel
M utils/bazel/llvm-project-overlay/openmp/runtime/tools/BUILD.bazel
Log Message:
-----------
[bazel] Replace various genrules with bazel_skylib rules (#228170)
Commit: a30a988cb67c9d1202e91985d3f8df1261f87df9
https://github.com/llvm/llvm-project/commit/a30a988cb67c9d1202e91985d3f8df1261f87df9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in ExecutorProcessInfoTest (#228307)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in ExecutorProcessInfoTest.
Commit: 7d6ff5b4e4419d505167416ba6ef199c6e35d4fb
https://github.com/llvm/llvm-project/commit/7d6ff5b4e4419d505167416ba6ef199c6e35d4fb
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M openmp/runtime/src/kmp_tasking.cpp
A openmp/runtime/test/tasking/omp_untied_task_cancel.c
A openmp/runtime/test/tasking/omp_untied_task_if0.c
A openmp/runtime/test/tasking/omp_untied_taskloop.f90
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
Commit: a0ebf45e62ddef239bbe824f3fb8485a19e7cd5d
https://github.com/llvm/llvm-project/commit/a0ebf45e62ddef239bbe824f3fb8485a19e7cd5d
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/MC/MCLFI.cpp
Log Message:
-----------
[MC] Fix MCLFI coding style. NFC (#228301)
Commit: d18bc2663bf587678450acc4f81ea4afc29f6e6b
https://github.com/llvm/llvm-project/commit/d18bc2663bf587678450acc4f81ea4afc29f6e6b
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
Log Message:
-----------
[orc-rt] Moving bootstrapinfo to make msvc++ happy (#228308)
Commit: 645790cb1740ab9ddac8e1a9168b49ca5cf4a420
https://github.com/llvm/llvm-project/commit/645790cb1740ab9ddac8e1a9168b49ca5cf4a420
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_offload.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
Log Message:
-----------
[compiler-rt] Add more common HSA utilities for memory and symbolization (#228297) (#228312)
Summary:
Adds memory pool management for different kinds of allocation. Intended
to be used for the in-progress concurrency sanitizer.
RFC:
discourse.llvm.org/t/rfc-a-thread-concurrency-sanitizer-for-gpus-in-compiler-rt/91113
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 6b122ae88eff63cc3e6ad3cd9a29a81faa6bb0dd
https://github.com/llvm/llvm-project/commit/6b122ae88eff63cc3e6ad3cd9a29a81faa6bb0dd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[compiler-rt] Add more common HSA utilities for memory and symbolization (#228297) (#228312)
Summary:
Adds memory pool management for different kinds of allocation. Intended
to be used for the in-progress concurrency sanitizer.
RFC:
discourse.llvm.org/t/rfc-a-thread-concurrency-sanitizer-for-gpus-in-compiler-rt/91113
---
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: a675e11f60838997749fe246646fc17aa44221de
https://github.com/llvm/llvm-project/commit/a675e11f60838997749fe246646fc17aa44221de
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/include/llvm/MCA/Support.h
M llvm/lib/MCA/InstrBuilder.cpp
Log Message:
-----------
[MCA] Explicitly instantiate and export template for unittest (#227893)
Commit: cddeb5505f748990cafd46eab11afe464571ea69
https://github.com/llvm/llvm-project/commit/cddeb5505f748990cafd46eab11afe464571ea69
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M lld/ELF/Driver.cpp
Log Message:
-----------
[ELF] Initialize LLVM targets before parsing -mllvm (#228314)
readConfigs parses -mllvm before initLLVM initializes the targets, so an
option that a target registers at initialization (currently only Sparc
#227977)
is rejected as unknown.
Call initLLVM first, as the COFF, MachO, and wasm ports do. This will be
covered once a -mllvm used by lld/test/ELF/lto tests migrates.
Commit: 9f8331dfef1934581a6c342e879b3810d1187be8
https://github.com/llvm/llvm-project/commit/9f8331dfef1934581a6c342e879b3810d1187be8
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[NFCI][llvm-profdata] Propagate Error in merge subcommand (#228157)
Change merge_main and its helpers to return Error and handle it
with reportError in main.
Not NFC as destructors are run on the stack.
Assisted-by: Gemini
Commit: f10d96f1ca662cf52d53558c4f0abce9b183d7a4
https://github.com/llvm/llvm-project/commit/f10d96f1ca662cf52d53558c4f0abce9b183d7a4
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
Log Message:
-----------
[bazel] Replace various genrules with bazel_skylib rules (#228170)
Commit: 1aeecf7b46dc567da21e6d50f1a099a82c9e237d
https://github.com/llvm/llvm-project/commit/1aeecf7b46dc567da21e6d50f1a099a82c9e237d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode][NFC] Remove unnecessary std::move call (#228083)
Commit: d6db026f11dfed121bde1820d443542adebdaad3
https://github.com/llvm/llvm-project/commit/d6db026f11dfed121bde1820d443542adebdaad3
Author: Haocong Lu <haoconglu at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
Log Message:
-----------
[CIR] Upstream missing support for floating point unary operator (#193215)
- Add Support for `__bf16/Float16/bfloat16/float128` scalar pre/post
increment and decrement.
- Add support for float vector increment and decrement, and add test
cases for both float vector and integer vector.
- Add test case for __bf16/Float16/bfloat16/double/long double/
float128 scalar unary operator with target `x86_64`.
- Part of task https://github.com/llvm/llvm-project/issues/192316
Commit: 5b5d81ca4a95f250488d9d164697a98096578e7f
https://github.com/llvm/llvm-project/commit/5b5d81ca4a95f250488d9d164697a98096578e7f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
Log Message:
-----------
[clang][bytecode] Skip `emitInitScope` for `EvalEmitter` (#228092)
The opcode ultimately doesn't do anything in `EvalEmitter`, so try to
skip it as early as possible.
Commit: 29e6b15d01aef1b82b6fc55c723c48b550585a41
https://github.com/llvm/llvm-project/commit/29e6b15d01aef1b82b6fc55c723c48b550585a41
Author: Jeewoong Kim <dnd414 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
A compiler-rt/test/msan/getaddrinfo-padding.cpp
M compiler-rt/test/msan/getaddrinfo-positive.cpp
A compiler-rt/test/sanitizer_common/TestCases/getaddrinfo.cpp
Log Message:
-----------
[compiler-rt][msan] Ignore addrinfo padding in getaddrinfo interceptor (#219124)
Avoid checking padding bytes in `struct addrinfo` in the `getaddrinfo`
interceptor.
The interceptor used a single `COMMON_INTERCEPTOR_READ_RANGE` for the
whole structure, which caused MSan to report uninitialized padding even
when all
named members were initialized.
Check each member separately instead.
Testing
- Added `getaddrinfo-padding.cpp` to cover the padding case
- Verified the new test fails before the fix and passes after the change
- Verified `getaddrinfo-positive.cpp` still reports uninitialized fields
- Ran `ninja -C build/runtimes/runtimes-bins check-msan` on AArch64
Linux
Fixes #162216
Commit: b6df24d6d08cfbfaef39c8c2cbd042d026a1cbc4
https://github.com/llvm/llvm-project/commit/b6df24d6d08cfbfaef39c8c2cbd042d026a1cbc4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in NativeDylibManagerTest (#228323)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in NativeDylibManagerTest.
Commit: 13c8c0505e6df4e3be7fad0efb16da18fb31e65b
https://github.com/llvm/llvm-project/commit/13c8c0505e6df4e3be7fad0efb16da18fb31e65b
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
Log Message:
-----------
[IRBuilder] Propagate fast-math flags to folding in CreateBinOpFMF (#227543)
Fast-math flags are used by InstSimplifyFolder, so we need to pass them
to the folding function in CreateBinOpFMF.
Commit: 56a012b96abbfd2d127068949130bda7663c7726
https://github.com/llvm/llvm-project/commit/56a012b96abbfd2d127068949130bda7663c7726
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/include/device.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/test/offloading/fortran/basic-target-parallel-do.f90
M offload/test/offloading/fortran/basic-target-parallel-reduction.f90
M offload/test/offloading/fortran/basic-target-teams-parallel-reduction.f90
M offload/test/offloading/fortran/default-mapper-nested-derived-type.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-min-reduce.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-nested-derived-type.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy-2d.f90
M offload/test/offloading/fortran/do-concurrent-to-omp-saxpy.f90
M offload/test/offloading/fortran/explicit-and-implicit-record-field-mapping.f90
M offload/test/offloading/fortran/implicit-record-field-mapping.f90
M offload/test/offloading/fortran/target-custom-reduction-derivedtype.f90
M offload/test/offloading/fortran/target-no-loop.f90
M offload/test/offloading/fortran/target-parallel-do-collapse.f90
M offload/test/offloading/fortran/usm_derived_type_allocatable_member.f90
M offload/test/offloading/ompx_bare.c
M offload/test/offloading/ompx_bare_gridsize.c
M offload/test/offloading/ompx_bare_multi_dim.cpp
Log Message:
-----------
[offload][omp] Move strict threads & groups computation to libomptarget (#222607)
Move all computation related to strict threads and strict groups to
libomptarget as it's specific to OpenMP. This also removes all refrences
to ExecutionModes from the Plugin Interface.
With this, the data from the OpenMP kernel environment being used is
ReductionDataSize used to create the KLE, and maxNumThreads used by
RecordReplay. They're are purposely left for a future PR.
Assisted by Claude.
Commit: f6c78b8262f4849997ba8b6ec09a3061b874cd6c
https://github.com/llvm/llvm-project/commit/f6c78b8262f4849997ba8b6ec09a3061b874cd6c
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Option/LibraryOptions.h
M llvm/include/llvm/Option/LibraryOptions.td
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
A llvm/lib/MC/MCCLOptions.cpp
A llvm/lib/MC/MCCLOptions.h
A llvm/lib/MC/MCCLOptions.td
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/test/tools/llvm-mca/mc-schedule-options-help.test
M llvm/unittests/Option/LibraryOptionsTest.cpp
M llvm/unittests/Option/LibraryOpts.td
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/gn/secondary/llvm/lib/MC/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[MC] Declare command line options in TableGen (#228321)
Move the cl::opts into MCCLOptions.td, except the -dx-* options, which
the DirectX backend reads and writes. The name avoids MCOptions, a
common variable name for MCTargetOptions.
New OptionsStruct member kinds replace cl:: features the port needs:
* OptionalBoolField, a std::optional<bool>, replaces cl::boolOrDefault
(-use-leb128-directives)
* EnumField replaces cl::values, showing its values as the -help-hidden
metavar
* DefaultOnOffField, an EnumField of std::optional<bool>, replaces the
file-local Default/Enable/Disable enum (-dwarf-extended-loc), which
DwarfDebug.cpp also defines for four options
Aided by Opus 5.5
Commit: 7ff7598d141bd55ddf7792710c1635bd3c1e842d
https://github.com/llvm/llvm-project/commit/7ff7598d141bd55ddf7792710c1635bd3c1e842d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SessionTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SessionTest (#228331)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SessionTest.
Commit: 0ff9f92868d6e5859d53ca601c097a64da3a140a
https://github.com/llvm/llvm-project/commit/0ff9f92868d6e5859d53ca601c097a64da3a140a
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M llvm/tools/llvm-profdata/llvm-profdata.cpp
Log Message:
-----------
[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts (#228158)
[llvm-profdata] Propagate Error in loadInput and mergeWriterContexts
Propagate Error from loadInput and mergeWriterContexts in
mergeInstrProfile,
supplementInstrProfile, and overlapInstrProfile. In mergeInstrProfile's
ThreadPool, catch errors from worker threads, stop scheduling new jobs,
and return the first encountered fatal error.
Ensure ~WriterContext() consumes any pending unhandled errors in
WriterContext::Errors upon destruction.
Not NFC as destructors are run on the stack and ThreadPool workers exit
earlier on error.
With all subcommands propagating llvm::Error to main, exitWithError,
exitWithErrorCode, and the LSan leak suppression workaround are no
longer needed.
Assisted-by: Gemini
Commit: 8c483601370e2b8fa8ddf4bdbf0a57eb6e9df6ac
https://github.com/llvm/llvm-project/commit/8c483601370e2b8fa8ddf4bdbf0a57eb6e9df6ac
Author: Haowei <haowei at google.com>
Date: 2026-10-01 (Thu, 01 Oct 2026)
Changed paths:
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
Log Message:
-----------
[Fuchsia] Escape ';' in STAGE2_ CMake variables (#228272)
When forwarding STAGE2_* variables to EXTRA_ARGS in Fuchsia.cmake and
Fuchsia-stage2-instrumented.cmake, semicolons in list values must be
replaced with '|' to match the LIST_SEPARATOR of ExternalProject_Add.
In 70cf616b331c, 'list(APPEND EXTRA_ARGS "-D${variableName}=...")' was
added using the raw '${${variableName}}' before replacing ';' with '|',
and Fuchsia-stage2-instrumented.cmake similarly omitted the ';' to '|'
replacement.
When a list variable like STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE contains
semicolon-separated '-D...' flags (such as CMAKE_EXE_LINKER_FLAGS),
appending it without escaping splits it into separate top-level CMake
arguments for stage2. Because STAGE2_CROSS_TOOLCHAIN_FLAGS_NATIVE sorts
alphabetically after STAGE2_CMAKE_*_LINKER_FLAGS, its split flags
overwrite the stage2 linker flags with the stage0 toolchain's libc++.a,
causing stage2 link failures on macOS.
Commit: ee5435146cd1556b52219152f25c167819d4b6a1
https://github.com/llvm/llvm-project/commit/ee5435146cd1556b52219152f25c167819d4b6a1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt/bedrock/SocketConnector.h
A orc-rt/include/orc-rt/bedrock/VettedPeer.h
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/VettedPeerTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
Log Message:
-----------
[orc-rt] Add VettedPeer, require it for the socket transport (#228336)
The controller at the other end of a channel can make the executor run
arbitrary code, so attaching to it is a trust decision.
VettedPeer<ChannelT> makes that decision explicit: it can only be made
through one of three named factories -- inherited, checked or unchecked
-- each naming the reason the peer is trusted.
createSimpleRemoteCAOverSocket now takes a VettedPeer<SocketHandle>
rather than a bare SocketHandle.
VettedPeer neither verifies nor records the reason. The factories exist
so that the decision can't be skipped by omission, and so that every
choice is visible in the source.
The socket:adopt connector trusts its socket as inherited, and documents
the resulting precondition on its callers.
Assisted-by: Claude
Commit: f0d14b73b1a586309483f81878d5c0e4d9c90cf7
https://github.com/llvm/llvm-project/commit/f0d14b73b1a586309483f81878d5c0e4d9c90cf7
Author: Frederik Harwath <frederik.harwath at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
A llvm/test/Analysis/CostModel/AMDGPU/cmp-select.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp.ll
A llvm/test/Analysis/CostModel/AMDGPU/select.ll
A llvm/test/Transforms/LoopUnroll/AMDGPU/unroll-cost-cmp-select.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block-regpressure.ll
A llvm/test/Transforms/SimplifyCFG/AMDGPU/speculate-block.ll
Log Message:
-----------
[AMDGPU] Add getCmpSelInstrCost override to re-enable SimplifyCFG speculation for vector types (#208043)
Commit ["[CostModel] Handle all cost kinds in
getCmpSelInstrCost"](https://github.com/llvm/llvm-project/commit/0967957d7a94e1b5c749c6e963bdca25f3c6d749)
changed the base cost model to consider the type in the costs for
non-throughput cost kinds. This caused SimplifyCFG to stop folding
branches to selects on AMDGPU, since
vector selects now report higher costs that exceed the folding
threshold.
Add an getCmpSelInstrCost override for AMDGPU to partially restore the
old behavior by returning a constant unit cost for cost kind
`TCK_SizeAndLatency`. This affects speculative execution in SimplifyCFG
and SpeculativeExecution.
Commit: d950230a5d84c1654742963dc0d50fd94b11ab9d
https://github.com/llvm/llvm-project/commit/d950230a5d84c1654742963dc0d50fd94b11ab9d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
Log Message:
-----------
Revert "[ORC] Use __unw_add_dynamic_eh_frame_section/__unw_remove_dyn… (#227894)
…amic_eh_ frame_section in RegisterEHFrames.cpp (#212260)"
Revert commit d49626c811c304c047e028a80cedc0d377f49dfb due to link
failures on some platforms (see discussion in PR).
Commit: 63ba94451e85805bb5f3972d6b880ba4a9c287c4
https://github.com/llvm/llvm-project/commit/63ba94451e85805bb5f3972d6b880ba4a9c287c4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleNativeMemoryMapTest (#228335)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleNativeMemoryMapTest.
Commit: d3e9891b54da54deebe2a6df0eb67c8ec155fa65
https://github.com/llvm/llvm-project/commit/d3e9891b54da54deebe2a6df0eb67c8ec155fa65
Author: Jonas Rembser <jonas.rembser at cern.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/test/Interpreter/pretty-print.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
Log Message:
-----------
[clang-repl] Evaluate a void expression that has no trailing semicolon (#228334)
An expression statement without a semicolon at the end of an input is
replaced by a call to `__clang_Interpreter_SetValueNoAlloc` that
captures its value. For an expression of type `void`, the expression was
not an argument of that call and was dropped, so `f()` did not call `f`.
Build `(E, __clang_Interpreter_SetValueNoAlloc(...))` instead.
Fixes #219800.
Assisted-by: Claude Opus 5.5
Commit: 2901c5a52989f19e4691b027c0393b109c465dda
https://github.com/llvm/llvm-project/commit/2901c5a52989f19e4691b027c0393b109c465dda
Author: tinfengyu <1768309929 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
A llvm/test/CodeGen/RISCV/redundant-copy-elim-reg-imm.mir
M llvm/test/CodeGen/RISCV/redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xandesperf-redundant-copy-elim.ll
M llvm/test/CodeGen/RISCV/xqcibi-redundant-copy-elim.ll
Log Message:
-----------
[RISCV] Eliminate redundant materializations after register comparison (#227673)
`RISCVRedundantCopyElimination` can eliminate redundant immediate
materializations when a branch establishes a known immediate value, but
does not handle register-register `BEQ`/`BNE` when one operand is a
non-zero immediate materialized in a register.
Extend the pass to recognize `ADDI` from `X0` and `QC_LI`
materializations before the branch. On the equality edge, reuse that
known immediate so an identical materialization in the successor can be
removed. `X0` is excluded as a target register because writes to it are
discarded.
Tests cover `BEQ`/`BNE`, both operand orders, clobbers, `X0`, RV32/RV64,
and the relevant Xqci and XAndes variants.
AI tool usage: OpenAI Codex assisted with this contribution. I reviewed
and take responsibility for the final changes.
Assisted-by: OpenAI Codex
Commit: c8344578d8a862527f165c8b348f1e50b6bd25c0
https://github.com/llvm/llvm-project/commit/c8344578d8a862527f165c8b348f1e50b6bd25c0
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Target/ThreadPlanStepOut.cpp
A lldb/test/API/functionalities/thread/step_out_inline/Makefile
A lldb/test/API/functionalities/thread/step_out_inline/TestThreadStepOutInline.py
A lldb/test/API/functionalities/thread/step_out_inline/main.c
Log Message:
-----------
[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)
To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.
In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.
For example, consider this backtrace:
```
frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]
```
This patch changes behavior as follows:
```
command before after
frame select 1; finish level3 line 12, no stop reason level2 line 21, step out
frame select 2; finish level3 line 12, no stop reason level1 line 29, step out
```
Commit: fb21c4495786f11f3a0abeb14836da97c9411b92
https://github.com/llvm/llvm-project/commit/fb21c4495786f11f3a0abeb14836da97c9411b92
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[lldb] Step through inlined code when stepping out of inline frame N > 0 (#226910)
To step out of an inline frame N > 0, ThreadPlanStepOut first steps out
to frame N, then queues a plan that steps through the inlined block. Due
to a bug, ShouldStop marks the plan complete right after it queues that
plan, so the thread stops as soon as it reaches frame N, with no stop
reason.
In fact, the comment next to that code describes the intended behavior
while implementing something different: only call the StepOut plan done
if the "step out from line" plan cannot be queued.
For example, consider this backtrace:
```
frame #0: 0x00000001000003c0 deep`sink(x=81) at deep.c:4:6 [opt]
frame #1: 0x0000000100000418 deep`level3(a=48) at deep.c:11:3 [opt] [inlined]
frame #2: 0x0000000100000404 deep`level2(b=37) at deep.c:20:3 [opt] [inlined]
frame #3: 0x00000001000003f0 deep`level1(c=42) at deep.c:28:3 [opt] [inlined]
frame #4: 0x00000001000003dc deep`main at deep.c:33:3 [opt]
```
This patch changes behavior as follows:
```
command before after
frame select 1; finish level3 line 12, no stop reason level2 line 21, step out
frame select 2; finish level3 line 12, no stop reason level1 line 29, step out
```
Commit: 4172fa0b4fe78c5416d3ab1713c9e1327ed623b0
https://github.com/llvm/llvm-project/commit/4172fa0b4fe78c5416d3ab1713c9e1327ed623b0
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/SimpleSymbolTableTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in SimpleSymbolTableTest (#228343)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in SimpleSymbolTableTest.
The isA<StringError>() checks become Failed<StringError>(), with the
message checks folded in as a Property matcher on StringError::toString
so that both the type and the message are still verified.
Commit: 6818493add44f540191095c67a84b14add591d1c
https://github.com/llvm/llvm-project/commit/6818493add44f540191095c67a84b14add591d1c
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
Log Message:
-----------
[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
Commit: 298d3ac7533414b285be30b903f767038073289b
https://github.com/llvm/llvm-project/commit/298d3ac7533414b285be30b903f767038073289b
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/python/python-typemaps.swig
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
M lldb/test/API/python_api/process/read-mem-cstring/main.c
Log Message:
-----------
[lldb] Decode debuggee bytes to Python str with "replace" (#224010)
Reading a C string that is not valid UTF-8 raises `SystemError`, even
though
the read succeeded and the `SBError` reports success:
```
(lldb) script
>>> process.ReadCStringFromMemory(addr, 2048, lldb.SBError())
SystemError: <built-in function SBProcess_ReadCStringFromMemory> returned
NULL without setting an exception
```
The `argout` typemap built the result with `PythonString`, which
requires
valid UTF-8. On failure `PythonString::SetString` consumes the error,
and
`PythonException`'s constructor has already called `PyErr_Clear()`, so
the
typemap returns `nullptr` with no exception set.
Bytes read out of a debuggee are arbitrary, so decode them with the
"replace" error handler: undecodable bytes become U+FFFD instead of
failing.
Valid UTF-8 decodes as before. "surrogateescape" would keep the bytes
exactly
but raises `UnicodeEncodeError` when printed, which only moves the
failure.
This also covers `GetSTDOUT`, `GetSTDERR` and `GetAsyncProfileData`,
which
share the typemap, and the sibling typemap used by `SBFileSpec::GetPath`
and
`SBThread::GetStopDescription`, where a path or a target-supplied thread
name
is likewise not guaranteed to be UTF-8.
Assisted-by: claude
Commit: 7a0d631ecdae36abbf7af8de02fa631c03c2100e
https://github.com/llvm/llvm-project/commit/7a0d631ecdae36abbf7af8de02fa631c03c2100e
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/callees-metadata-escape.ll
Log Message:
-----------
[Attributor] Treat a use by an externally visible global as an escape (#228283)
AAGlobalValueInfo collects the in-module uses of a local function, and
AAIndirectCallInfo uses them to drop !callees targets whose address
cannot reach the call. It follows uses through global initializers
without checking whether the global is visible outside the module, so it
misses an address that escapes that way.
For an internal function whose address is stored in an external global
and that is called through a pointer argument, the Attributor drops the
only !callees target and replaces the call with unreachable. This
happens in the module pass, in the CGSCC pass when the function and the
caller are in one SCC, and in OpenMPOpt, which runs the Attributor on
OpenMP device code at -O1 and above.
Treat a use by a global without local linkage as an escape unless the
module is a closed world.
Commit: e895b5c5078a79d131911851aa2e0720c0101948
https://github.com/llvm/llvm-project/commit/e895b5c5078a79d131911851aa2e0720c0101948
Author: Lang Hames <lhames at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in CallSPSCITest (#228353)
Use the Error matchers introduced in 4c8a437d0487 to clean up error
checks in CallSPSCITest.
Commit: ce4bf0febce9ae3d039aa8a229f71b52c35ee9b4
https://github.com/llvm/llvm-project/commit/ce4bf0febce9ae3d039aa8a229f71b52c35ee9b4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Use integer VT for second argument of X86ISD::VPERMILPV in combineConcatVectorOps. (#228257)
Found by adding SDTCisInt support to verifySDNode
Assisted-by: Claude
Commit: cc2227d7899c0c8b30615e9b4c03e839a6b17c3e
https://github.com/llvm/llvm-project/commit/cc2227d7899c0c8b30615e9b4c03e839a6b17c3e
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
Log Message:
-----------
[AMDGPU] Remove unused prefix from branch relaxation test (#228344)
This was added spuriously in #175644.
Commit: 45000a516a6e331f8be46076bc6f1310201fb28b
https://github.com/llvm/llvm-project/commit/45000a516a6e331f8be46076bc6f1310201fb28b
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[AArch64] Add test for shuffle into zero lane of zero. NFC (#228347)
Commit: 4c53405cace11d69e1f9870ca51626f366aa3110
https://github.com/llvm/llvm-project/commit/4c53405cace11d69e1f9870ca51626f366aa3110
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/optimize-compare.mir
Log Message:
-----------
[AMDGPU] Generalize deletion of redundant s_or_b32 of a 64-bit select (#228034)
When deleting s_or_b32 of the two halves of a 64-bit S_CSELECT, use
getSelectConstants instead of foldableSelect. This handles materialized
constants, and a select whose true value is 0 by inverting the SCC uses.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 9bb435a68b4e38983589da22fd2ff16e12532431
https://github.com/llvm/llvm-project/commit/9bb435a68b4e38983589da22fd2ff16e12532431
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/bindings/ocaml/executionengine/executionengine_ocaml.c
M llvm/bindings/ocaml/executionengine/llvm_executionengine.ml
M llvm/bindings/ocaml/executionengine/llvm_executionengine.mli
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/bindings/ocaml/target/llvm_target.ml
M llvm/bindings/ocaml/target/llvm_target.mli
M llvm/bindings/ocaml/target/target_ocaml.c
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/lib/IR/Core.cpp
M llvm/lib/Target/Target.cpp
M llvm/test/Bindings/OCaml/debuginfo.ml
M llvm/tools/llvm-c-test/targets.c
M llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp
M llvm/unittests/Passes/PassBuilderBindings/PassBuilderBindingsTest.cpp
M llvm/unittests/Target/TargetMachineOptionsTest.cpp
Log Message:
-----------
[llvm-c][ocaml] Move DataLayout bindings from Target to Core/IR (#227714)
DataLayout is part of IR (or "Core" in C API terminology), so bindings
for it should be defined there as well. They were part of Target for
historical reasons.
This is to avoid any layering issues with referencing DataLayout from IR
APIs.
Commit: db412aa8e5c7e056a106a3c414cb0b55d1868c40
https://github.com/llvm/llvm-project/commit/db412aa8e5c7e056a106a3c414cb0b55d1868c40
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
Log Message:
-----------
[Mips] Convert index to pointer type in lowerMSACopyIntr. (#228332)
The MipsISD::VEXTRACT_[SZ]EXT_ELT nodes expect a pointer sized index.
Found while trying to implement SDTCisPtrTy checking in verifySDNode.
Commit: 02ff559ee5e609df42ddd4422951b6fcddcd2140
https://github.com/llvm/llvm-project/commit/02ff559ee5e609df42ddd4422951b6fcddcd2140
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
Log Message:
-----------
[PowerPC] Correct the SDTypeProfile for VECSHL and FP_EXTEND_HALF. (#228341)
These used SDTCisPtrTy, but the operand is always created with i32 type.
Commit: bcaabf1ca733fc6b517905765eea2cdb60d7804e
https://github.com/llvm/llvm-project/commit/bcaabf1ca733fc6b517905765eea2cdb60d7804e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp-simple-hierarchy.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_inline_assembly/inline_asm.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_int4/negative.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_sub_groups.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_subgroups/cl_intel_subgroup_local_block_io.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_usm_storage_classes/intel-usm-addrspaces.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions.ll
M llvm/test/CodeGen/SPIRV/hlsl-intrinsics/discard.ll
M llvm/test/CodeGen/SPIRV/structurizer/merge-exit-break.ll
Log Message:
-----------
[NFC][SPIR-V] Fix more CHECK lines that never fire in tests (#227962)
Follow-up to #227332
FileCheck ignores these lines, so the behavior they describe was
untested
- Typo `-NO:`, `-:`, `ACHECK:` and `OpCabilitity` (discard.ll,
inline_asm.ll, intel-usm-addrspaces.ll, merge-exit-break.ll,
SPV_KHR_bit_instructions.ll)
- Invalid directive `CHECK-4` (fp-simple-hierarchy.ll)
- Prefix no RUN line enables (cl_intel_sub_groups.ll,
cl_intel_subgroup_local_block_io.ll, negative.ll)
Commit: 2985550b8f5eb9f32376b3ae7fcfa37068f5f83a
https://github.com/llvm/llvm-project/commit/2985550b8f5eb9f32376b3ae7fcfa37068f5f83a
Author: Jonas Rembser <jonas.rembser at cern.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/Interpreter/pretty-print.cpp
Log Message:
-----------
[clang-repl] Don't check printf output order in pretty-print.cpp (#228349)
The test added in #228334 checked the output of a JIT'd printf() with
CHECK-NEXT between lines that clang-repl prints itself. The C runtime
buffers the JIT'd code's stdout separately, so the order is not
guaranteed: on llvm-clang-x86_64-sie-win, "foo()" came after all of
clang-repl's output.
Remove that case. The case before it already checks that a void call
without a semicolon is executed (through the value of a variable it
sets), and so does the unit test ValueOfVoidCallExecutesTheCall.
Assisted-by: Claude Opus 5.5
Follows up on #228334, which introduced failures on Windows:
```
The Buildbot has detected a new failure on builder llvm-clang-x86_64-sie-win while building clang.
Full details are available at:
https://lab.llvm.org/buildbot/#/builders/46/builds/42212
Worker for this Build: sie-win-worker
Blamelist:
Frederik Harwath [<frederik.harwath at amd.com>](mailto:frederik.harwath at amd.com),
Jonas Rembser [<jonas.rembser at cern.ch>](mailto:jonas.rembser at cern.ch),
Lang Hames [<lhames at gmail.com>](mailto:lhames at gmail.com)
BUILD FAILED: failed test (failure)
Step 7 (test-build-unified-tree-check-all) failure: test (failure)
******************** TEST 'Clang :: Interpreter/pretty-print.cpp' FAILED ********************
Exit Code: 1
Command Output (stdout):
--
# RUN: at line 1
z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe "int i = 10;" 'extern "C" int printf(const char*,...);' 'auto r1 = printf("i = %d\n", i);' | z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe --check-prefix=CHECK-DRIVER Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe' 'int i = 10;' 'extern "C" int printf(const char*,...);' 'auto r1 = printf("i = %d\n", i);'
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe' --check-prefix=CHECK-DRIVER 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# note: command had no output on stdout or stderr
# RUN: at line 6
cat Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp | z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe -Xcc -std=c++11 -Xcc -fno-delayed-template-parsing | z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# executed command: cat 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\clang-repl.exe' -Xcc -std=c++11 -Xcc -fno-delayed-template-parsing
# note: command had no output on stdout or stderr
# executed command: 'z:\b\llvm-clang-x86_64-sie-win\build\bin\filecheck.exe' 'Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp'
# .---command stderr------------
# | [1mZ:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp:101:16: [0m[0;1;31merror: [0m[1mCHECK-NEXT: is not on the line after the previous match
[0m# | [1m[0m// CHECK-NEXT: foo()
# | [0;1;32m ^
[0m# | [0;1;32m[0m[1m<stdin>:25:1: [0m[0;1;30mnote: [0m[1m'next' match was here
[0m# | [1m[0mfoo()
# | [0;1;32m^
[0m# | [0;1;32m[0m[1m<stdin>:23:10: [0m[0;1;30mnote: [0m[1mprevious match ended here
[0m# | [1m[0m(int) 100
# | [0;1;32m ^
[0m# | [0;1;32m[0m[1m<stdin>:24:1: [0m[0;1;30mnote: [0m[1mnon-matching line after previous match is here
[0m# | [1m[0mclang-repl> clang-repl... clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-re
pl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl> clang-repl>
# | [0;1;32m^
[0m# | [0;1;32m[0m
# | Input file: <stdin>
# | Check file: Z:\b\llvm-clang-x86_64-sie-win\llvm-project\clang\test\Interpreter\pretty-print.cpp
# |
# | -dump-input=help explains the following input dump.
# |
# | Input was:
# | <<<<<<
# | [1m[0m[0;1;90m 1: [0m[1m[0;1;46m[0m(const char[3]) "ab"[0;1;46m [0m
# | [0;1;32mcheck:10 ^~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 2: [0m[1m[0;1;46m[0m(int) 123456[0;1;46m [0m
# | [0;1;32mnext:13 ^~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 3: [0m[1m[0;1;46m[0m(char[2]) { '1', 'a' }[0;1;46m [0m
# | [0;1;32mnext:16 ^~~~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 4: [0m[1m[0;1;46m[0m(char[3]) "1a"[0;1;46m [0m
# | [0;1;32mnext:19 ^~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 5: [0m[1m[0;1;46m[0m(char[2][3][1]) { { { 'a' }, { 'b' }, { 'c' } }, { { 'd' }, { 'e' }, { 'f' } } }[0;1;46m [0m
# | [0;1;32mcheck:22 ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
[0m# | [0;1;32m[0m[0;1;90m 6: [0m[1m[0;1;46m[0m(S3) @0x1cf15f38540[0;1;46m [0m
...
Sincerely,
LLVM Buildbot
```
Commit: 69212dda8d0ebdcecd3f2ff034e1ae553f4ac9db
https://github.com/llvm/llvm-project/commit/69212dda8d0ebdcecd3f2ff034e1ae553f4ac9db
Author: Jack Styles <jack.styles at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_expand_load.ll
Log Message:
-----------
[AArch64] Adjust costs for masked CompressStore and ExpandLoad (#226950)
Currently, costs for the `llvm.expand.compressstore` and
`llvm.masked.expandload` are costs simply at 2 x the type legalization
cost. However, this does not properly represent the instructions that
are generated for these intrinsics.
The costs have been adjusted to better represent the cost of using these
intrinsics with SVE Instructions.
Commit: b31aad9bf7a8d9a50d65b0dc3be02146bf8dbb7a
https://github.com/llvm/llvm-project/commit/b31aad9bf7a8d9a50d65b0dc3be02146bf8dbb7a
Author: Mitch Briles <mitchbriles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
A llvm/test/CodeGen/AArch64/arm64_32-mops.ll
M llvm/test/CodeGen/AArch64/func-argpassing.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/RISCV/memcpy.ll
M llvm/test/CodeGen/RISCV/memmove.ll
A llvm/test/CodeGen/RISCV/memset.ll
Log Message:
-----------
[SelectionDAG] zext/trunc size of memory libcalls to target pointer size (#226672)
Fixes #226666
For `memcpy`, `memmove`, and `memset`, the value for the number of bytes
for the operation ("Size") used the type of the intrinsic. When the type
of Size was narrower than that of the "length" parameter of the libcall,
the value would be widened with ANY_EXTEND. On RISC-V, this can
materialize as a sign extension, which leads to writing `2^33` times as
many bytes.
Changes
- Zero-extends or truncates the Size to the target pointer width (Note
that GISel already does this correctly).
- Added new RISC-V/AArch64 tests, and updated existing ones.
Note that this also fixed an AArch64 crash. With `-mattr=+mops`, SD
crashed with any non-constant i32 length argument to one of these
libcalls with "unimplemented reg-to-reg copy"
Commit: 82cb0c273118a1d57378b71a133d3f33398de164
https://github.com/llvm/llvm-project/commit/82cb0c273118a1d57378b71a133d3f33398de164
Author: Artem Chikin <achikin at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/lib/Sema/SemaAPINotes.cpp
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.apinotes
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.h
M clang/test/APINotes/Inputs/Headers/ExportAs.apinotes
A clang/test/APINotes/Inputs/Headers/ExportAsCore.apinotes
M clang/test/APINotes/Inputs/Headers/ExportAsCore.h
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.apinotes
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
M clang/test/APINotes/properties.m
A clang/test/APINotes/slice-groups-exact.c
A clang/test/APINotes/slice-groups-order.c
A clang/test/APINotes/slice-groups.c
M clang/test/APINotes/versioned-version-independent.m
M clang/test/APINotes/versioned.m
Log Message:
-----------
[APINotes][Unversioned] Capture presence of versioned slices separately, and track different slice groups (#224860)
## Group versioned slices by lookup
Under `-fswift-version-independent-apinotes`, Clang attaches every
APINotes slice unapplied, wrapped in `SwiftVersionedAdditionAttr` or
`SwiftVersionedRemovalAttr`, and leaves the version selection to the
client. To redo that selection the client has to know which slices
compete with each other across different APINote lookups, and nothing in
the attributes said so.
The slices a client must choose between are the ones a single *lookup*
produced, not the ones a single APINotes reader supplied. Sema runs
selection once per lookup and applies every winner, and there can be
more than one lookup for the same declaration against the same reader. A
global function with a `Where:` parameter selector gets two: the broad
lookup, and the exact one.
For example, consider module `Bar`:
```
Name: Bar
Functions:
- Name: overloaded
SwiftName: 'broadBase()' # the broad lookup, unversioned
- Name: overloaded
Where:
Parameters:
- int
SwiftName: 'exactBase(_:)' # the exact lookup, unversioned
SwiftVersions:
- Version: 4
Functions:
- Name: overloaded
SwiftName: 'broadFour()' # the broad lookup, 4.0 slice
```
Each lookup selects its own winner and both are applied, so a client at
version 3.0 must end up with `broadFour()` from the broad lookup and
`exactBase(_:)` from the exact one.
If the two lookups were labelled with the reader they share, the client
would instead reconstruct one competition:
- Unversioned: `SwiftNameAttr "broadBase()"`
- Unversioned: `SwiftNameAttr "exactBase(_:)"`
- 4.0: `SwiftNameAttr "broadFour()"`
and select a single winner, dropping one of the two lookups entirely.
Instead, this change makes the attributes carry a slice group. One group
is one lookup: a second reader is a different lookup, and so is a
parameter selector query beside a broad one.
Sema applies each group's winner in turn, and when two winners set the
same key the last one applied owns it, so the order the groups were
applied in is part of what a consumer has to reproduce. Both facts were
previously implicit in Sema's control flow and discarded, because legacy
mode selected in-process and only the winner survived onto the
declaration.
The slice group numbering interleaves the two lookups per reader, giving
reader `i` the groups `2 * i` and `2 * i + 1`, so ascending group order
is application order. Numbering all the broad lookups before all the
selector lookups would instead apply them in the order 0, 2, 1, 3, and a
consumer sorting on the ordinal would pick the wrong winner.
## Capture presence of versioned slices separately
In addition to aggregating attributes with `SwiftVersionedAdditionAttr`
and `SwiftVersionedRemovalAttr`, we may need to also capture that an
APINotes file contained a versioned slice which may not have captured
any keyed attributes.
For example:
```
Name: Bar
Functions:
- Name: foo
SwiftName: 'fooBase()' # unversioned
SwiftVersions:
- Version: 4
Functions:
- Name: foo
SwiftName: 'fooFour()' # the 4.0 slice
- Version: 5
Functions:
- Name: foo
SwiftPrivate: true # the 5.0 slice
```
When picking which attributes/notes to apply, the algorithm is to select
from the lowest version slice at or above the client requested one, or
the unversioned slice otherwise. Suppose we have a client at version 3.
In this case, the client will have reconstructed the attributes as 3
options:
- Unversioned: `SwiftNameAttr "fooBase()"`
- 4.0: `SwiftNameAttr "fooFour()"`
- 5.0: `SwiftPrivateAttr`
According to the algorithm, slice 4 would win, so `foo` would get a name
`fooFour()` and **not** be private.
Now suppose there is instead a versioned slice which carries no keyed
attributes:
```
SwiftVersions:
- Version: 4
Functions:
- Name: foo # declared, no keys
```
With this slice, the client would have reconstructed just two
versioned-attribute options:
- Unversioned: `SwiftNameAttr "fooBase()"`
- 5.0: `SwiftPrivateAttr`
And according to the algorithm selected 5 and marked `foo` as private.
This is incorrect because the presence of the 4.0 slice still means that
it is the one that must be selected for this declaration.
This change adds a new (no spelling) attribute called
`SwiftVersionedSliceAttr` to capture existence of all versioned slices,
which the clients will then use to know which slice version to select
for a given declaration. It carries the same slice group as the addition
and removal wrappers, so a client groups it into the same competition as
its siblings.
Commit: 2e686411fa67e889c5ab4911bb690f63d4cdeb02
https://github.com/llvm/llvm-project/commit/2e686411fa67e889c5ab4911bb690f63d4cdeb02
Author: Artem Gindinson <gindinson at roofline.ai>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/IR/GPUOps.td
M mlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
M mlir/lib/Dialect/GPU/IR/GPUDialect.cpp
M mlir/lib/Dialect/GPU/Utils/Utils.cpp
R mlir/test/Dialect/GPU/all-reduce-maxf.mlir
A mlir/test/Dialect/GPU/all-reduce-min-max.mlir
A mlir/test/Dialect/GPU/all-reduce-minimum-maximum.mlir
A mlir/test/Dialect/GPU/all-reduce-minimumnum-maximumnum.mlir
M mlir/test/Dialect/GPU/invalid.mlir
Log Message:
-----------
[mlir][gpu] Support `minimumnumf` and `maximumnumf` in GPU dialect (#226903)
Follow up on #221658. Add mirroring GPU reduction kinds and lower to
Arith/LLVM by mapping onto the vector combining kinds already in place.
Additionally, expand the LIT tests for all min/max kinds and include
vector test cases with `subgroup_reduce`.
Assisted-by: Codex
Commit: f7a4eb3216929c670c2d861098ad0b4cf5b86812
https://github.com/llvm/llvm-project/commit/f7a4eb3216929c670c2d861098ad0b4cf5b86812
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/test/Transforms/LoopVectorize/vplan-outer-loop-uncomputable-trip-count.ll
Log Message:
-----------
[LV] Reject outer loops without integer induction. (#228137)
Bail out if we did not find any induction and WidestIndTy is null.
Otherwise we would crash.
Commit: 455f8ba10a9f1d2e6cede13b8c08bdfcd2de6fc5
https://github.com/llvm/llvm-project/commit/455f8ba10a9f1d2e6cede13b8c08bdfcd2de6fc5
Author: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaTypesBase.td
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaDowngrade1p1To1p0.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/error_if_check.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/tosa-downgrade-1-1-to-1-0.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-valid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Support variadic batch dimensions in matmul ops (#226179)
Allow tosa.matmul and tosa.matmul_t operands and results to have rank
two or greater. Infer and verify right aligned broadcasting across their
leading batch dimensions.
Preserve TOSA 1.0 compatibility through target validation and restrict
the 1.1-to-1.0 downgrade to supported rank 3 cases. Extend level, shape
inference, verifier, validation, and downgrade coverage.
---------
Signed-off-by: Deeptanshu Sekhri <deeptanshu.sekhri at arm.com>
Commit: 128be64f5bfc34c85c6cd0eb9754377e2426aec2
https://github.com/llvm/llvm-project/commit/128be64f5bfc34c85c6cd0eb9754377e2426aec2
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi2.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-phi4.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig-spill.mir
M llvm/test/CodeGen/X86/AMX/amx-fastconfig.mir
M llvm/test/CodeGen/X86/AMX/amx-fastpreconfig.mir
Log Message:
-----------
X86: Mark the tile register defs of PLDTILECFGV dead (#228361)
ldtilecfg invalidates all tile registers, which the pseudo models by
listing them in Defs. Nothing reads them from the configuration
instruction itself, so mark them dead where the pseudo is built instead
of leaving it to be re-inferred.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: fdd70a3a97384c4e53dd1c83f369e774ca5722c3
https://github.com/llvm/llvm-project/commit/fdd70a3a97384c4e53dd1c83f369e774ca5722c3
Author: Fabian Ritter <fabian.ritter at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[docs] Reflect C++'s read-write and write-read coherence rules in the LLVM memory model (#217849)
Currently, the LLVM IR memory model as written allows behaviors of monotonic
atomic operations that violate C++'s [read-write](https://eel.is/c++draft/basic.exec#intro.races-13) and [write-read](https://eel.is/c++draft/basic.exec#intro.races-14) coherence rules.
This PR adds similar rules to the definition of the monotonic memory ordering
to make monotonic atomics behave more like C++'s relaxed atomics.
Without this, translating C++'s relaxed atomics into LLVM's monotonic atomics
is technically incorrect.
Example litmus tests:
1: read-write coherence
```
; thread 0
store atomic i32 1, ptr %p monotonic ; S1
; thread 1
%l0 = load atomic i32, ptr %p monotonic ; L0
store atomic i32 2, ptr %p monotonic ; S2
; thread 2
%l1 = load atomic i32, ptr %p monotonic ; L1
%l2 = load atomic i32, ptr %p monotonic ; L2
```
Here, C++'s [read-write coherence](https://eel.is/c++draft/basic.exec#intro.races-13) rule says that
the execution where `%l0 = 1; %l1 = 2; %l2 = 1` is not allowed (L0
happens-before S2, therefore L0 must read from a store before S2 in the
modification order. If L0 reads 1 from S1, S1 must therefore be before S2 in the
modification order, so the happens-before-ordered loads L1, L2 can't read them
in the opposite order due to read-read coherence.) So far, there is nothing
ruling out this execution in the LLVM memory model.
2: write-read coherence
```
; thread 0
store atomic i32 1, ptr %p monotonic ; S1
; thread 1
store atomic i32 2, ptr %p monotonic ; S2
%l0 = load atomic i32, ptr %p monotonic ; L0
; thread 2
%l1 = load atomic i32, ptr %p monotonic ; L1
%l2 = load atomic i32, ptr %p monotonic ; L2
```
Here, C++'s [write-read coherence](https://eel.is/c++draft/basic.exec#intro.races-14) rule says that
the execution where `%l0 = 1; %l1 = 1; %l2 = 2` is not allowed (S2
happens-before L0, therefore L0 must read from S2 or a later store in the
modification order. If L0 reads 1 from S1, S1 must therefore be after S2 in the
modification order, so the happens-before-ordered loads L1, L2 can't read them
in the opposite order due to read-read coherence.) So far, there is nothing
ruling out this execution in the LLVM memory model, either.
The read-read coherence constraint already existed in the LangRef, I've grouped
it together with the new constraints to improve readability.
Write-write coherence is implied by the earlier "All modification orders must be
compatible with the happens-before order." constraint but is still included in
the list explicitly for clarity.
Related change in our formal memory model: https://github.com/ROCm/formal-models/pull/3
Commit: 63dd4ca76b33e54be07fc45983395e5428a29a87
https://github.com/llvm/llvm-project/commit/63dd4ca76b33e54be07fc45983395e5428a29a87
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/fold-and-exec-wave32.mir
A llvm/test/CodeGen/AMDGPU/fold-and-exec.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.div.fmas.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memcpy_const_compare.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-param-combinations.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
M llvm/test/CodeGen/AMDGPU/no-dup-inst-prefetch.ll
M llvm/test/CodeGen/AMDGPU/select-opt.ll
M llvm/test/CodeGen/AMDGPU/setcc.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
M llvm/test/CodeGen/AMDGPU/sub_i1.ll
M llvm/test/CodeGen/AMDGPU/uaddo.ll
M llvm/test/CodeGen/AMDGPU/uniform-cfg.ll
M llvm/test/CodeGen/AMDGPU/uniform-inside-divergent-cfg.ll
M llvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
M llvm/test/CodeGen/AMDGPU/usubo.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/while-break.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Fold away S_AND of a lane mask with EXEC (#227729)
Instruction selection inserts an S_AND with EXEC on branch conditions
unconditionally, because it has not analysed what produced the lane
mask: see the AndExec handling in AMDGPUDAGToDAGISel::SelectBRCOND and
the S_CBRANCH_SCC* case of SIInstrInfo::moveToVALU. The result of a
V_CMP already has 0 in the bits of all inactive lanes, so the AND is
redundant.
SIPreEmitPeephole::optimizeVccBranch already removes some of these, but
it runs after register allocation and only matches a V_CMP in the VOPC
(_e32) encoding writing physical VCC. That requires SIShrinkInstructions
to have set a VCC register allocation hint, which it only does when
canShrink() succeeds, so any V_CMP that is VOP3-only (source modifiers,
or two SGPR sources) keeps its AND.
Fold the AND away in SIFoldOperands instead, which runs before the
register coalescer, so the V_CMP result can be coalesced into VCC.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 1a92355c0354b9a3b62be64a42f6acc0484518a3
https://github.com/llvm/llvm-project/commit/1a92355c0354b9a3b62be64a42f6acc0484518a3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/IR/Constants.cpp
Log Message:
-----------
[IR] Suppress getGetElementPtr() deprecation in more places (#228364)
These methods are themselves deprecated. Clang does not warn for
them, but MSVC does.
Commit: 55be32fdbf8e677af036c3632e50c7798cbd2010
https://github.com/llvm/llvm-project/commit/55be32fdbf8e677af036c3632e50c7798cbd2010
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[IRBuilder] Propagate fast-math flags to folding in CreateBinOpFMF (#227543)
Fast-math flags are used by InstSimplifyFolder, so we need to pass them
to the folding function in CreateBinOpFMF.
Commit: e7f7422a14cfdd6d00fcf7e2e25bfd5a47897030
https://github.com/llvm/llvm-project/commit/e7f7422a14cfdd6d00fcf7e2e25bfd5a47897030
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/SanitizerCoverage.md
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
A compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_summary.cpp
Log Message:
-----------
[compiler-rt] Add print_coverage_summary to silence SanitizerCoverage dump logs (#228039)
When running a test suite of SanitizerCoverage-instrumented binaries,
the `SanitizerCoverage: … PCs written` summary on stderr can poison
FileCheck and cause unexpected failures.
There is no way to turn that print off today. At most you can use
`log_path`, but that still creates a text file per process. We could
have guard it on the verbosity option, but that would change the default
and may regress consumers that rely on this output.
This PR adds `print_coverage_summary` (default true). Set
`print_coverage_summary=0` to keep the dump log disable; .sancov files
are still written. The same guard is used on the Fuchsia path.
The new lit test is a copy of sanitizer_coverage_trace_pc_guard.cpp,
adapted to check the default print and print_coverage_summary=0.
Commit: f3778fb5b18178dcb6fe02b5b5335c8159e04d83
https://github.com/llvm/llvm-project/commit/f3778fb5b18178dcb6fe02b5b5335c8159e04d83
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
A llvm/test/CodeGen/AMDGPU/itofp-odd-width-load.ll
M llvm/test/CodeGen/AMDGPU/slp-int-to-fp.ll
Log Message:
-----------
[NFC][AMDGPU] Add tests for int to fp casts of loaded odd width integers (#227904)
Assisted-by: Claude Code Opus 5
Commit: c18f82867198144efa14c5ede97d911c7151efba
https://github.com/llvm/llvm-project/commit/c18f82867198144efa14c5ede97d911c7151efba
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/memory-widening-debug.ll
Log Message:
-----------
[LV][NFC] Add more debug when setting the widening decision (#227617)
Whilst debugging some vectorisation issues recently, I discovered the
vectoriser is very opaque about it's decision making process which makes
it very hard to figure out what is happening. I've added debug messages
to help the developer understand the process better.
Tests assisted by Codex (GPT-5.5)
Commit: 557c3bf999fc86f15cc91d4f9ccfa34c3b784fdc
https://github.com/llvm/llvm-project/commit/557c3bf999fc86f15cc91d4f9ccfa34c3b784fdc
Author: Iliyan Georgiev <Iliyan.Georgiev at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/Tosa/IR/TosaOps.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaValidation.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/invalid.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/level_check.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/profile_pro_int_unsupported.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
Log Message:
-----------
[mlir][tosa] Add support for ARGMIN (#227997)
- Add ARGMIN table gen
- Add validators and folders
- Add positive and negative tests
- Add compliance info
Signed-off-by: Iliyan Georgiev <iliyan.georgiev at arm.com>
Commit: 3f48e22a1f321d5d3341bd812803694cea588785
https://github.com/llvm/llvm-project/commit/3f48e22a1f321d5d3341bd812803694cea588785
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/ilist_iterator.h
M llvm/unittests/ADT/IListIteratorTest.cpp
Log Message:
-----------
[IList] Fix getNodeParent() interaction with const qualifiers (#228362)
In the old implementation getNodeParent() did not work at all on
`const_iterator` (because the body would fail to compile) and `const
iterator` (because the method was not marked const).
Fix this and add more unit tests for various combinations of constness.
It should be noted that `const iterator` behaves just like plain
`iterator` in that it returns a non-const parent pointer. Only
`const_iterator` returns a const parent pointer.
Commit: e6ef6b94b2910e4a1c380f135fc4975bec0f876f
https://github.com/llvm/llvm-project/commit/e6ef6b94b2910e4a1c380f135fc4975bec0f876f
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
A llvm/test/CodeGen/AMDGPU/coalescer-subreg-undef-in-bundle.mir
Log Message:
-----------
[RegisterCoalescer] Update undef flags inside bundles (#227615)
When joining makes an earlier subregister def a partial redefinition,
JoinVals::pruneValues removes its undef flag. It only looked at the
instruction returned by getInstructionFromIndex, which for a bundle is
the BUNDLE header, so the def inside the bundle kept a stale undef flag
that disagreed with the header. Update all operands in the bundle.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: ec590781c1367562afafe96d4f9648a875f3934c
https://github.com/llvm/llvm-project/commit/ec590781c1367562afafe96d4f9648a875f3934c
Author: David Meng <davidmenggx at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters-main.cpp
Log Message:
-----------
[clang-tidy] Ignore parameters of `main` in `misc-const-correctness` (#228120)
The standard fixes the signature of `main`, so suggesting `const` for
its parameters is a false positive. The check warned on `char **argv`
but not on `char *argv[]`. The array form did not warn because the check
does not analyze array-style parameters.
The check now skips all parameters of `main`. Local variables inside
`main` are still checked.
Fixes https://github.com/llvm/llvm-project/issues/227988
Commit: a3b8700c9576ca89753a0cc23423f37ef3b6c17d
https://github.com/llvm/llvm-project/commit/a3b8700c9576ca89753a0cc23423f37ef3b6c17d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/MissingFeatures.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/SPIRV.cpp
A clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
Log Message:
-----------
[CIR][SPIR-V] Dispatch AMDGPU builtins on AMDGCN-flavored SPIR-V (#222018)
Mappings to classic codegen:
- spirv32/spirv64 arch switch:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/CGBuiltin.cpp#L129-L135
- spv -> amdgcn prefix handling:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/CGBuiltin.cpp#L6879-L6881
- `supportsLibCall()`:
https://github.com/llvm/llvm-project/blob/52d922aa153b1232813470e014635419ce006023/clang/lib/CodeGen/Targets/SPIR.cpp#L139-L142
Commit: d917e358c84b694c9e4250a270f4833acbfb8f41
https://github.com/llvm/llvm-project/commit/d917e358c84b694c9e4250a270f4833acbfb8f41
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
Log Message:
-----------
[CIR][AMDGPU] Use nsw add and ordered compare in logb lowering (#228004)
Align with classic codegen, which emits add nsw and fcmp one
Classic codegen code we are aligning with:
https://github.com/llvm/llvm-project/blob/8995a358fa77a669679594aa9857ba0e0b224ab1/clang/lib/CodeGen/TargetBuiltins/AMDGPU.cpp#L2233-L2239
Commit: 4dfc4f5457efc21c8bed43dca7605f119ef35d5e
https://github.com/llvm/llvm-project/commit/4dfc4f5457efc21c8bed43dca7605f119ef35d5e
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
A clang/test/CIR/CodeGenOpenCL/global-vars.cl
Log Message:
-----------
[CIR] Emit OpenCL file scope global variables (#228125)
Commit: 04dadc0275c8f781cbf4158299911a6fc822a28b
https://github.com/llvm/llvm-project/commit/04dadc0275c8f781cbf4158299911a6fc822a28b
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
A llvm/test/MC/Disassembler/RISCV/xmipslsp.txt
M llvm/test/MC/RISCV/xmips-invalid.s
Log Message:
-----------
[RISCV][MC] Restrict mips.ldp / mips.sdp to RV64 only (#227043)
The [P8700-F programmer’s
guide](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=11)
describes an RV64GCZbaZbb processor. Its
[`mips.ldp`](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=355)
writes two 64-bit values to two integer registers, while
[`mips.sdp`](https://mips.com/wp-content/uploads/2025/11/P8700-F_Programmers_Reference_Manual-TM.pdf#page=364)
takes a 64-bit value from each of two integer registers.
Based on these info, this commit restricts their assembly and
disassembly to RV64.
AI Usage: Amp (GPT 6 Sol) was used to help with tests.
Co-authored-by: Amp <amp at ampcode.com>
Commit: d95d04c7a01299458bdf95b421a6cb8b2be15436
https://github.com/llvm/llvm-project/commit/d95d04c7a01299458bdf95b421a6cb8b2be15436
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/GVN.cpp
A llvm/test/Transforms/GVN/icmp-samesign.ll
Log Message:
-----------
[GVN] Replace icmp samesign with icmp flipped signedness (#227855)
Proof: https://alive2.llvm.org/ce/z/3uT_Ac
Commit: 5e8d0192f26f22f01c1ec669be0c30cb6e90386d
https://github.com/llvm/llvm-project/commit/5e8d0192f26f22f01c1ec669be0c30cb6e90386d
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libsycl/include/sycl/__impl/backend.hpp
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/detail/config.hpp
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
M libsycl/include/sycl/__impl/detail/kernel_submission.hpp
M libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/__impl/device_selector.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/include/sycl/__impl/group.hpp
M libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/handler.hpp
M libsycl/include/sycl/__impl/index_space_classes.hpp
M libsycl/include/sycl/__impl/nd_item.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
R libsycl/include/sycl/__spirv/spirv_types.hpp
R libsycl/include/sycl/__spirv/spirv_vars.hpp
A libsycl/include/sycl/__spirv/types.hpp
A libsycl/include/sycl/__spirv/vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/event_impl.cpp
M libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/handler_impl.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/detail/spinlock.hpp
M libsycl/src/detail/suppress_extra_warnings.hpp
M libsycl/src/device.cpp
M libsycl/src/device_selector.cpp
M libsycl/src/event.cpp
M libsycl/src/exception.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/handler.cpp
M libsycl/src/platform.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/.clang-format
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
M libsycl/test/basic/handler/handler_parallel_for_runtime.cpp
A libsycl/test/basic/handler/handler_single_task_named_functor.cpp
R libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/queue_single_task.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
R libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/Inputs/fill_memset_common.hpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/context/context_ctors.cpp
M libsycl/unittests/handler/memcpy.cpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
Log Message:
-----------
[libsycl] Generic code cleanup (#224330)
- aligns SYCL API parameter names with specification
- fixes doxygen keywords used in comments
- applies CamelCase to all non-SYCL 2020 vars and methods
- applies generic recomendations from LLVM coding standards
- fixes missing or redundant headers
- adds detail namespace to the helpers if missed
- a few tests were renamed to match their content
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 1f48c2f8f4021f016a62fe0cebf877c4c8f5dffd
https://github.com/llvm/llvm-project/commit/1f48c2f8f4021f016a62fe0cebf877c4c8f5dffd
Author: Samuel Newcome <97889602+SamNewcome at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M openmp/runtime/src/kmp_dispatch.cpp
M openmp/runtime/src/kmp_global.cpp
A openmp/runtime/test/worksharing/for/kmp_sched_set_get.c
A openmp/runtime/test/worksharing/for/kmp_sched_static_steal_ordered.c
Log Message:
-----------
[OpenMP] Corrects the setting of the Static_Steal schedule with `omp_set_schedule` (#227236)
Static-steal is considered a valid OMP scheduler by `kmp_runtime.cpp`'s
`__kmp_set_schedule` function. But when trying pass it to the setter, we
end up with a failure because it was not added to the `__kmp_sch_map` in
`kmp_global.cpp`.
This PR adds a test that each schedule in `kmp.h` can be set and gotten
by `omp_set_schedule` and `omp_get_schedule`, which fails with static
steal and a fix for `__kmp_sch_map`. To deal with static-steal set this
way with `ordered` loops, I added similar handling as with setting
static steal as an environment variable: gets converted to dynamic,
nonmonotonic when initialising the loop, so when combined with `ordered`
simply dynamic scheduling is used. A test that static-steal with
`ordered` works was added, which used to hang before adding this
handling.
This PR was made with AI assitance. All code was reviewed and where
necessary modified by myself.
Commit: 1e3586d70991f17251127bb4b3d5f1b9c9d3fc19
https://github.com/llvm/llvm-project/commit/1e3586d70991f17251127bb4b3d5f1b9c9d3fc19
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/RecordReplay.cpp
Log Message:
-----------
[Offload][OpenMP] Keep user Numblocks requested value for RecordReplay (#228345)
RecordReplay still uses the Numblocks value requested by the user so
keep passing that value through the PluginInterface for now.
Fixes issue introduced by #222607
Commit: 6fd74fd9516420bb49f9c6ced02bd95c9866d851
https://github.com/llvm/llvm-project/commit/6fd74fd9516420bb49f9c6ced02bd95c9866d851
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/absorbing-copyable-lane.ll
A llvm/test/Transforms/SLPVectorizer/X86/wide-load-absorbed-lane.ll
Log Message:
-----------
[SLP][NFC]Add a test with the non-optimal vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228385
Commit: f718ebe873411a562ef6e5c27da36d75b7aaec98
https://github.com/llvm/llvm-project/commit/f718ebe873411a562ef6e5c27da36d75b7aaec98
Author: pgerell <peter at gerell.se>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
A clang/test/OpenMP/requires_module.cpp
A clang/test/OpenMP/requires_pch.cpp
Log Message:
-----------
[clang][OpenMP] Keep 'requires' directives read from an AST file (#220058)
An OpenMP `requires` directive is recorded in Sema when the directive is
parsed
(`SemaOpenMP::ActOnOpenMPRequiresDirective`). Nothing repopulated that
list from an AST
file. A translation unit that gets its `requires` directive from a PCH
or a module
therefore behaves as if the directive were absent, and clang rejects
valid code.
`OMPRequiresDecl` is already serialized and eagerly deserialized, so the
declaration is
present in the AST. Only Sema's view of it was missing.
## Reproducer
```c++
// rev.h
#pragma omp requires reverse_offload
void foo();
```
```c++
// use.cpp
void bar(int argc) {
#pragma omp target device(ancestor : argc)
foo();
}
```
```
$ clang -cc1 -fopenmp -fopenmp-version=51 -fopenmp-targets=x86_64 -triple x86_64 \
-x c++ -emit-pch -o r.pch rev.h
$ clang -cc1 -fopenmp -fopenmp-version=51 -fopenmp-targets=x86_64 -triple x86_64 \
-include-pch r.pch -fsyntax-only use.cpp
use.cpp:2:20: error: device clause with ancestor device-modifier used without specifying 'requires reverse_offload'
```
The requirement is specified, so the diagnostic is a false positive. The
same code in a
single file compiles cleanly, because the directive is then parsed in
this TU.
`-fopenmp-targets=` matters. Without an offload target clang defers this
diagnostic and
then drops it, because a host compilation never flushes its deferred
diagnostics. That is
a separate bug, with a fix to follow, and it makes this false positive
reachable in the
default configuration too.
`reverse_offload` is the case with a directly observable diagnostic. The
same state feeds
every `hasRequiresDeclWithClause` query, so `dynamic_allocators` (on a
device compilation)
and `unified_shared_memory` (which changes implicit data-sharing instead
of emitting a
diagnostic) read it as well.
## Fix
Write the `requires` directives into the AST file and register them with
Sema, following
the existing `DeclsWithEffectsToVerify` pattern. This happens in
`ASTReader::UpdateSema`
rather than `ASTReader::InitializeSema` because `UpdateSema` runs after
every AST file is
loaded. A directive can come from a module loaded during the compilation
rather than up
front.
Tests cover both the PCH and the module path.
The contents of this PR is created with help from Claude Code and
ChatGPT.
---------
Co-authored-by: Alexey Bataev <a.bataev at gmx.com>
Commit: f6025b00141ed956ceaf0d06b6471360ab704401
https://github.com/llvm/llvm-project/commit/f6025b00141ed956ceaf0d06b6471360ab704401
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[lldb][Windows] Report a process exit once the process is gone (#228115)
When a debugged process exits, lldb and lldb-server report the exit
while Windows is still tearing the process down. Its executable and DLLs
are still loaded at that point, so a test that deletes or replaces one
of them right after the exit fails with `"access denied"`. This is what
makes `TestReplaceDLL` fail on Windows CI.
This patch reports the exit only after the debugger has released the
exit event and the process has fully terminated, which matches how POSIX
reports an exit.
On a Windows 11 host, `TestReplaceDLL` fails to delete `foo.dll` in 246
out of 640 runs before the change and in 0 of 1,600 after.
rdar://188918066
Commit: a0cbcd03575c21d4c9b3935ea30c4b32e4cc0ec7
https://github.com/llvm/llvm-project/commit/a0cbcd03575c21d4c9b3935ea30c4b32e4cc0ec7
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
Log Message:
-----------
Reland [AArch64][CostModel] Consider some nxv1 operations as legal (#214471) (#228371)
This is allowing some operations on vscale x 1 types, namely:
- load/store
- masked load/store
- arithmetic instructions like add/sub/mul
For those, there is already codegen coverage. See e.g.
- llvm/test/CodeGen/AArch64/sve-int-arith.ll
- llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
- llvm/test/CodeGen/AArch64/sve-masked-gather.ll
- llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
These types are relevant for enabling REVEC in LoopVectorizer. For
AArch64, the main target there is turning NEON vector sizes into SVE
vector size, i.e. using VF = "vscale x 1". For loops with mixed vector
and scalar types, we'll want to allow vectorising scalar types with such
a VF.
The original PR #214471 got reverted due to a failure in
llvm-test-suite. The codegen issue was fixed in #226939 and
llvm-test-suite passes locally now.
Commit: fe36d3fa8520adb7ce82ed06c5fd783691ed4995
https://github.com/llvm/llvm-project/commit/fe36d3fa8520adb7ce82ed06c5fd783691ed4995
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
M clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
Log Message:
-----------
[CIR] Convert null pointer constant types in target lowering (#228068)
The pass converted the cir.const result type but not the type inside its
`#cir.ptr` attribute, so the verifier rejected address-space null
constants
Commit: ba680de5049dbd0238d9e023ac60fcdf1e09fb48
https://github.com/llvm/llvm-project/commit/ba680de5049dbd0238d9e023ac60fcdf1e09fb48
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
Log Message:
-----------
[lldb][Windows] XFAIL TestExitDuringStep.py on ARM64 (#228392)
This is a follow up to https://github.com/llvm/llvm-project/pull/227318
which re-enabled `TestExitDuringStep.py` on Windows.
Those tests still fail on ARM64 Windows (see
https://github.com/llvm/llvm-project/pull/228391). XFAIL them for now.
Commit: adeb6eeb60e65feb4752fee68f02c07a076cbf64
https://github.com/llvm/llvm-project/commit/adeb6eeb60e65feb4752fee68f02c07a076cbf64
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV][NFC] Fix unused variable warning (#228383)
Commit: 70c82f1e02b43c6d45d12b098a703eebe7e300ef
https://github.com/llvm/llvm-project/commit/70c82f1e02b43c6d45d12b098a703eebe7e300ef
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduction-gathered-root-erased-scalars.ll
Log Message:
-----------
[SLP]Skip gathers with erased scalars in the cast context
The cast context of the reduction root is requested after the tree is
vectorized, when the scalars of the gathered root with the vectorized
subvector are already erased and have no operands, causes the crash.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5944875384
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/228395
Commit: d0465230b17640603e69742c875f0eea65fc22fa
https://github.com/llvm/llvm-project/commit/d0465230b17640603e69742c875f0eea65fc22fa
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M orc-rt/test/regression/languages/c/lit.local.cfg
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Disable some builds on windows. Normalise amd64 (#228357)
Commit: 9a8edddf69c5130b39e9f99b6d6daeb0cfd79276
https://github.com/llvm/llvm-project/commit/9a8edddf69c5130b39e9f99b6d6daeb0cfd79276
Author: Alan Li <me at alanli.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/PHIElimination.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-subrange-liveintervals.mir
A llvm/test/CodeGen/Hexagon/phi-elim-subreg-lanes.mir
Log Message:
-----------
[PHIElim][AMDGPU]: shrink source subranges to lane-specific uses (#228073)
Commit: 40c3dc20b72eb09961c28eda7e0718e9c0425c80
https://github.com/llvm/llvm-project/commit/40c3dc20b72eb09961c28eda7e0718e9c0425c80
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/issue176578.ll
M llvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/large-phi-search.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.tensor.load.store.ll
M llvm/test/CodeGen/AMDGPU/long-branch-reserve-register.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mdt-preserving-crash.ll
M llvm/test/CodeGen/AMDGPU/memcpy-crash-issue63986.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/memset-pattern.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/nested-loop-conditions.ll
M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
M llvm/test/CodeGen/AMDGPU/noclobber-barrier.ll
M llvm/test/CodeGen/AMDGPU/optimize-negated-cond.ll
M llvm/test/CodeGen/AMDGPU/preemit-peephole-scc-liveness-issue215745.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-phi.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/select-undef.ll
M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
M llvm/test/CodeGen/AMDGPU/sgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cf.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-lower-sgpr-spills-cycle-header.ll
M llvm/test/CodeGen/AMDGPU/simplifydemandedbits-recursion.ll
M llvm/test/CodeGen/AMDGPU/sink-addr-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr-update-regscavenger.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/subreg-coalescer-crash.ll
M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
M llvm/test/CodeGen/AMDGPU/udiv64.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/uniform-loop-inside-nonuniform.ll
M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/valu-i1.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/wait-xcnt-atomic-rmw-optimization.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
Log Message:
-----------
[AMDGPU] Enable StructurizeCFG SkipUniformRegions (#206739)
Fixes #204334
Commit: 9d872cbb70f3f525a39f2b964597ecfd2b8735e4
https://github.com/llvm/llvm-project/commit/9d872cbb70f3f525a39f2b964597ecfd2b8735e4
Author: Aaron Ballman <aaron at aaronballman.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/TokenKinds.def
M clang/test/Parser/MicrosoftExtensions.cpp
Log Message:
-----------
[clang] Fix crashes with inheritance model keywords (#228207)
The inheritance model keywords support a single underscore alias, but
that alias was never added to Attr.td. When we added typo correction
support for attributes in Clang 21, this uncovered a bug with these
keywords when a single underscore variant was used because the
hasAttribute() logic didn't know about these spellings. This adds the
correct spellings for the aliases to Attr.td.
While working on that, I noticed that we were missing an alias for
_single_inheritance, which is supported by MSVC, so that was added as a
drive-by fix.
Fixes #228003
Commit: a1067084901563a647374b1c15e888e92d777537
https://github.com/llvm/llvm-project/commit/a1067084901563a647374b1c15e888e92d777537
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/include/L0Defs.h
M offload/plugins-nextgen/level_zero/include/L0Device.h
M offload/plugins-nextgen/level_zero/include/L0Memory.h
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/include/L0Plugin.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Plugin.cpp
Log Message:
-----------
[Offload][L0][NFC] Remove staging buffers dead-code (#227979)
Async queues were the only user of Staging Buffers and as they were
removed this is now dead code we can remove.
Assisted by Claude.
Commit: 58d59f460cd740c50f66f782a87fa2a29f52ff25
https://github.com/llvm/llvm-project/commit/58d59f460cd740c50f66f782a87fa2a29f52ff25
Author: Alex Bradbury <asb at igalia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-buildvec-of-binop.ll
Log Message:
-----------
[RISCV] Consider truncate semantics in performINSERT_VECTOR_ELTCombine (#228243)
This fixes a miscompile in performINSERT_VECTOR_ELTCombine dating back
to when it was added (#72675), but only just showing up through testing
when a recent unrelated change triggered vectorisation for a function
that trips it within Clang, leading to broken builds on some of the
two-stage RVV buildbots.
After type legalization the scalar binop can be wider than the vector
element type, with the insert implicitly truncating it. That isn't
equivalent for shifts and a similar bug was found and fixed in a
neighbouring combine in #81168. This patch just applies the same fix
(with the same comment even), avoiding the transform if the scalar type
doesn't match the element type.
I used an LLM to root cause the issue and produce the test case.
Commit: 2f97ec4d378c9087b69ab0ee6dc6454e15b299f0
https://github.com/llvm/llvm-project/commit/2f97ec4d378c9087b69ab0ee6dc6454e15b299f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/test/CodeGen/NVPTX/f128-no-libcall-error.ll
A llvm/test/CodeGen/X86/ppcf128-expand-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing FMA and ppcf128 expansion libcalls (#228094)
Previously this would hit a fatal error. Legalize to poison and report a proper
context error.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: e9e9512f2d0a1ca2462b0b8cec38742db923b71b
https://github.com/llvm/llvm-project/commit/e9e9512f2d0a1ca2462b0b8cec38742db923b71b
Author: tfzee <tim.ziegler at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Compat.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
Log Message:
-----------
[Offload][L0][NFC] Remove unused zexKernelGetArgumentSize dispatcher (#227589)
The KernelGetArgumentSize dispatcher is loaded during context init but
never called.
#218367 converted it to a ZeDispatcher but also removed its only
callers.
Argument sizes are now either not needed
(zeCommandListAppendLaunchKernelWithArguments) or come from
LaunchArgs.ArgSizes on the fallback path, so the driver query is no
longer used(other than debug printing).
This removes the now dead optional API declaration, the dispatcher
member, its loadExperimental call and the related debug output.
Not tested on actual GPU hardware however the plugin builds without
error(which I think should be sufficient check).
AI was only used in a review on unrelated changes which noted this dead
code.
Commit: 873f7ef7077fd5f3f6710a1dcb9a3371bd73124a
https://github.com/llvm/llvm-project/commit/873f7ef7077fd5f3f6710a1dcb9a3371bd73124a
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/compressed-debug-sections.test
A bolt/test/AArch64/zlib-compressed-debug-sections.s
A bolt/test/AArch64/zstd-compressed-debug-sections.s
M bolt/test/CMakeLists.txt
M bolt/test/lit.site.cfg.py.in
Log Message:
-----------
[BOLT] Support SHF_COMPRESSED DWARF debug sections. (#215835)
**Before:** BOLT will report an error when `--update-debug-sections` is
enabled and the input contains a `SHF_COMPRESSED` debug section, stating
that "`--update-debug-sections` requires uncompressed debug
information". This was implemented in #185662.
**After:** This patch follows up on this PR and adds support for
`SHF_COMPRESSED` debug information. BOLT now can decompress `zlib` /
`zstd` compressed debug information, update them and then recompress
with their original compression. This patch also validates compressed
debug sections, reporting an error if applicable. As mentioned in
#185662, legacy GNU-style compression is not handled.
Assisted-by: Codex
Commit: f698bf310346a643113604245c6f1e87fae139f4
https://github.com/llvm/llvm-project/commit/f698bf310346a643113604245c6f1e87fae139f4
Author: Aaron Jomy <aaronjomyjoseph at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Interpreter/DeviceOffload.cpp
A clang/test/Interpreter/CUDA/empty-device-module.cu
M clang/unittests/Interpreter/DeviceOffloadTest.cpp
Log Message:
-----------
[clang-repl] Fix PTX emission for CUDA inputs with no device code (#226977)
Previously, GeneratePTX() returned an error when PassManager::run()
returned false. That value reports whether any pass changed the module,
not whether emission succeeded. IIUC, addPassesToEmitFile() should be
the only failure point, which is already checked.
The check was harmless until e8b75c172810 ("[NVPTX] Add NewPM
boilerplate to NVPTXAssignValidGlobalNames"). Before it, that pass
returned true unconditionally (if the pass succeeded), so run() always
reported a change. Now a device module without a function definition,
produced in the case of host-only inputs, reports no change and fails
the check, falsely erroring out with `Failed to emit PTX code.` Due to
this, every host-only input to `clang-repl --cuda` is now rejected on
main. The host-supports-cuda lit probe consists mostly of such inputs,
so clang/test/Interpreter/CUDA reports UNSUPPORTED instead of failing.
I've also added a test with host-only inputs so a regression like this
could be caught.
Commit: ccafeec5625a44b90be71d9e4b9515d4d3ea6612
https://github.com/llvm/llvm-project/commit/ccafeec5625a44b90be71d9e4b9515d4d3ea6612
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-undef-phi-source.mir
Log Message:
-----------
CodeGen: Fix stale live range for undef PHI sources on split edges (#228057)
SplitCriticalEdge collects the PHI sources coming from the new block so
the trimming loop below does not undo the segment just added for them.
An undef operand gets no segment, but was still added to the set, so a
register that is only an undef PHI operand on the split edge kept the
stale extension of its live range through the new block.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: ea458d215c1e24654429e91f0d16100e7bf6c643
https://github.com/llvm/llvm-project/commit/ea458d215c1e24654429e91f0d16100e7bf6c643
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
Log Message:
-----------
[CIR][AMDGPU] Drop stale logb FIXME in amdgcnspirv-builtins.hip (NFC) (#228404)
#228004 made CIR emit nsw add and ordered compare for logb, so update
the SPIR-V checks to match
Fix failure appeared on main branch
Commit: 7e04d1b56db2d7ca799df2951e0bd6a6dcc78f7f
https://github.com/llvm/llvm-project/commit/7e04d1b56db2d7ca799df2951e0bd6a6dcc78f7f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/linear-clause03.f90
Log Message:
-----------
[flang][OpenMP] Improve check for LINEAR and ORDERED with argument (#228235)
The LINEAR clause is not allowed on a construct if an ORDERED clause
with an argument is present. The new message is clearer about the
argument to the ORDERED clause.
Commit: 1f4597bea45a30a7b08936948d89dc4824d6558c
https://github.com/llvm/llvm-project/commit/1f4597bea45a30a7b08936948d89dc4824d6558c
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
Commit: d7d8df90a24749ec7ebcc899ce1e147245e9fa65
https://github.com/llvm/llvm-project/commit/d7d8df90a24749ec7ebcc899ce1e147245e9fa65
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang-rt/test/Driver/fpe-trap-exec-denormal.f90
M flang-rt/test/Driver/fpe-trap-exec-divzero.f90
M flang-rt/test/Driver/fpe-trap-exec-inexact.f90
M flang-rt/test/Driver/fpe-trap-exec-overflow.f90
M flang-rt/test/Driver/fpe-trap-exec-underflow.f90
M flang-rt/test/Driver/fpe-trap-exec.f90
M flang-rt/test/lit.cfg.py
Log Message:
-----------
[Flang-RT] Skip SIGFPE tests under WSL1 (#227876)
The floating-point exceptions do not work under WSL1 because the SIGFPE
trap does not propagate to the application
(https://github.com/microsoft/WSL/issues/3657). Mark these tests as
UNSUPPORTED for wsl1.
The Subsystem For Windows detection mechanism is the same as for LLVM
(#137822).
Commit: 4a7dffd473c46eb64009ef8baa104cfcb1b4f927
https://github.com/llvm/llvm-project/commit/4a7dffd473c46eb64009ef8baa104cfcb1b4f927
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[Flang-RT] Skip SIGFPE tests under WSL1 (#227876)
The floating-point exceptions do not work under WSL1 because the SIGFPE
trap does not propagate to the application
(https://github.com/microsoft/WSL/issues/3657). Mark these tests as
UNSUPPORTED for wsl1.
The Subsystem For Windows detection mechanism is the same as for LLVM
(#137822).
Commit: 82f21f4b72d8219d84262f879c4de2edead8b3b5
https://github.com/llvm/llvm-project/commit/82f21f4b72d8219d84262f879c4de2edead8b3b5
Author: Yanzuo Liu <zwuis at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/AST/TemplateBase.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/TemplateBase.cpp
Log Message:
-----------
[clang][AST][NFC] Remove an overload of `ASTTemplateKWAndArgsInfo::initializeFrom` (#227942)
The FIXME comment on this overload:
```cpp
// FIXME: The parameter Deps is the result populated by this method, the
// caller doesn't need it since it is populated by computeDependence. remove
// it.
```
Commit: 41220aecafcc3cc1f8d2d45e198253440053e11e
https://github.com/llvm/llvm-project/commit/41220aecafcc3cc1f8d2d45e198253440053e11e
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
Log Message:
-----------
[Analysis][NFC] Add SVE load/store tests for non-power-of-2 vectors (#228387)
Commit: 3a250378e6c4d25a1d9c08f1d8e04dd66262ffdd
https://github.com/llvm/llvm-project/commit/3a250378e6c4d25a1d9c08f1d8e04dd66262ffdd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/test/Transforms/ConstraintElimination/add-nsw.ll
M llvm/test/Transforms/ConstraintElimination/induction-condition-in-loop-exit-latch-counted.ll
M llvm/test/Transforms/ConstraintElimination/large-constant-ints.ll
M llvm/test/Transforms/PhaseOrdering/X86/pr38280.ll
M llvm/unittests/Analysis/ConstraintSystemTest.cpp
Log Message:
-----------
[ConstraintElim] Check if a single row implies a condition before FM. (#228369)
If a single row of the system implies the queried condition, the
condition holds without copying the system and running Fourier-Motzkin
elimination.
This overall can be slightly cheaper (although changes mostly in noise),
this also catches cases where FM gives up due to overflow, either when
combining rows with large coefficients or when negating a condition with
a constant of INT64_MAX.
In https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1555, it
leads to additional successful queries with end-to-end impact in ~900
files, mostly strengthening flags.
https://llvm-compile-time-tracker.com/compare.php?from=a90d9d26f746d913da12adf3bbb95a6735741e05&to=5f771faeedd4e65f180d288700f00b55ff00e6e3&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/228369
Commit: fb45017cd60cf012c85ce4f87498c26e49ca9e5e
https://github.com/llvm/llvm-project/commit/fb45017cd60cf012c85ce4f87498c26e49ca9e5e
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
Log Message:
-----------
[lldb-dap][test] Migrate server mode tests (#227804)
Migrate TestDAP_server.py to the new lldb-dap test infrastructure.
test_server_port and test_server_unix_socket now run two sessions
concurrently.
Add test_breakpoints_in_multiple_sessions to check that a breakpoint set
in one session must not stop another.
Fix test_connection_timeout_at_server_start. It now waits for lldb-dap
to exit on its own before the teardown kills it.
The test now takes significantly less time.
Commit: d5a23954543f23c05b66ce70362da1a6f8491761
https://github.com/llvm/llvm-project/commit/d5a23954543f23c05b66ce70362da1a6f8491761
Author: David Green <david.green at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/interleaved-accesses.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
Log Message:
-----------
[AArch64][GlobalISel] Add deinterleave load and store test coverage. NFC (#228419)
Correct some NFC comments whilst here too.
Commit: 3e042b9b6709b08728787b08c42d66dab405a279
https://github.com/llvm/llvm-project/commit/3e042b9b6709b08728787b08c42d66dab405a279
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: c9d04b0aba2df08ee4c63bd3742ca91f8746987c
https://github.com/llvm/llvm-project/commit/c9d04b0aba2df08ee4c63bd3742ca91f8746987c
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: 66eb006e3a0fb7b3fa8a7ae403750054d3715642
https://github.com/llvm/llvm-project/commit/66eb006e3a0fb7b3fa8a7ae403750054d3715642
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/select-branch-weights.ll
Log Message:
-----------
[VPlan] Preserve the branch weights of scalarized selects. (#224968)
Update VPlan to also carry !prof for select instructions from original
IR. They are threaded through like for branches, and dropped for wide
selects.
This is part of addressing the remaining profcheck failures in
LoopVectorize: https://github.com/llvm/llvm-project/issues/161235.
PR: https://github.com/llvm/llvm-project/pull/224968
Commit: d94d6f87d76b224a13e82ae2a249e1090f853300
https://github.com/llvm/llvm-project/commit/d94d6f87d76b224a13e82ae2a249e1090f853300
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[IRBuilder] Remove custom insertion point type (#228117)
Historically, insertion points had to be represented as pairs of
BasicBlock and BasicBlock iterator, because an end() iterator did not
know which block it belongs to. This has changed some time ago (I think
as part of the debuginfo records change) and BasicBlock iterators now
have a reference to their parent block. So the canonical representation
of an insertion point is now just a BasicBlock iterator.
This makes the `IRBuilder::SetInsertPoint(BasicBlock::iterator)` API
handle end() iterators correctly (but still keeping the API with a
redundant block argument) and replaces the `IRBuilderBase::InsertPoint`
type (which was a pair of block and iterator) with a plain
`BasicBlock::iterator`.
This requires surprisingly many changes because IRBuilder insertion
points are heavily used in the OpenMP building. A small number of
non-mechanical changes were needed because the code was sometimes
relying on the fact that nothing enforced that the block and iterator
actually referred to the same block, and they diverged sometimes when
splitting. In those cases we need to make sure to get the original block
before splitting.
Commit: 330825ef3dc6228b49867213f4699708090f2ee5
https://github.com/llvm/llvm-project/commit/330825ef3dc6228b49867213f4699708090f2ee5
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 9bb435a (#228360)
This fixes 9bb435a68b4e38983589da22fd2ff16e12532431 (#227714).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bb435a68b4e38983589da22fd2ff16e12532431
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: aed168736404872486cd6d71f0b283c5087cc76d
https://github.com/llvm/llvm-project/commit/aed168736404872486cd6d71f0b283c5087cc76d
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[clangd] Extract to function: Pass unmodified scalar parameters by value
For more natural-looking function signatures.
Assisted-by: Claude
Commit: 50e76b3587e37304d80e9a2d2197ca428fef2f74
https://github.com/llvm/llvm-project/commit/50e76b3587e37304d80e9a2d2197ca428fef2f74
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[Bazel] Fixes 9bb435a (#228360)
This fixes 9bb435a68b4e38983589da22fd2ff16e12532431 (#227714).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=9bb435a68b4e38983589da22fd2ff16e12532431
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4c93bc148a7f06581ef180a2f325e880ce03f97d
https://github.com/llvm/llvm-project/commit/4c93bc148a7f06581ef180a2f325e880ce03f97d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Log Message:
-----------
CodeGen: Remove unnecessary Triple copy in AsmPrinter (#228428)
Commit: 874d708c2485b3b7eb828843f77fc511ce7cd564
https://github.com/llvm/llvm-project/commit/874d708c2485b3b7eb828843f77fc511ce7cd564
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/test/Driver/cl-options.c
Log Message:
-----------
[clang-cl] Parse (but don't support) /BE (#228381)
It's an undocumented CL option mentioned at
https://old.reddit.com/r/cpp/comments/1wudtq0/edg_c_fronted_now_released_as_open_source/pd3m2au/
Commit: 0dde058eb61f81213ce4ff5381c64fc0fcb4c068
https://github.com/llvm/llvm-project/commit/0dde058eb61f81213ce4ff5381c64fc0fcb4c068
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/avx2-intrinsics-x86.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bw-intrinsics.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics-upgrade.ll
M llvm/test/CodeGen/X86/avx512bwvl-intrinsics.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86-upgrade.ll
M llvm/test/CodeGen/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics-upgrade.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/avx512bw-intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/msan_x86intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/X86/sse2-intrinsics-x86.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/avx2-intrinsics-i386.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/msan_i386intrinsics.ll
M llvm/test/Instrumentation/MemorySanitizer/i386/sse2-intrinsics-i386.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulh.ll
R llvm/test/Transforms/InstCombine/X86/x86-pmulhu.ll
Log Message:
-----------
[X86] Replace SSE pmulhw/pmulhuw target intrinsics with generic smulh/umulh (#227663)
Fixes #223627
Commit: b05bc1f7066a5298bbae9b438bbf6942015536df
https://github.com/llvm/llvm-project/commit/b05bc1f7066a5298bbae9b438bbf6942015536df
Author: Tim Gymnich <tim at gymni.ch>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
Log Message:
-----------
[CodeGen][NFC] Replace std::function with llvm::function_ref (#228431)
Replace `std::function` with `llvm::function_ref` for a perdicate
parameter that is only used during the call.
Commit: 32757891963d7a544dbcf6a52e8f7a7c67e273aa
https://github.com/llvm/llvm-project/commit/32757891963d7a544dbcf6a52e8f7a7c67e273aa
Author: hev <wangrui at loongson.cn>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lld/ELF/Arch/LoongArch.cpp
A lld/test/ELF/loongarch-relax-call-stress.s
A lld/test/ELF/loongarch-relax-pcrel-stress.s
Log Message:
-----------
[lld][LoongArch] Prevent relaxation oscillation for LA.PCRel and CALL (#226713)
Relaxation of pcalau12i+addi (relaxPCHi20Lo12, isInt<22>) and
call36/call30 (relaxMediumCall, isInt<28>) can oscillate: shrinking one
section moves a symbol, which flips isInt<N> for other sites and changes
bytesDropped again.
Follow the same approach as RISCV::relaxCall: after a few passes, do not
allow remove to increase beyond the previous pass's value (cur - delta).
Pass that cap as prevRemove into the two helpers; range checks may still
clear remove (0) when the target goes out of range.
Fixes #226712
Commit: 43bfdeef96d07dba07eae2285e7eba1f2afbacb3
https://github.com/llvm/llvm-project/commit/43bfdeef96d07dba07eae2285e7eba1f2afbacb3
Author: Carlos Seo <carlos.seo at linaro.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[OpenMP] Initialize td_last_tied when an untied task starts (#214320)
An untied task inherits td_last_tied -- the innermost tied task the
thread is bound to -- from the task it suspends. That inheritance only
happened in __kmp_invoke_task(), so any path that made an untied task
the thread's current task without going through it left td_last_tied at
the NULL that __kmp_task_alloc() assigns. This causes a crash when
__kmp_task_is_allowed() dereferences NULL.
Move the inheritance into __kmp_task_start(), before it sets
th_current_task. Besides the if0 path, this also covers a cancelled
untied task, which is never invoked but still releases its dependences
while it is the current task, and the pattern task of an untied
taskloop, which the runtime starts and finishes directly.
Fixes #172938
Commit: d71228f97c01b0d0192dea60c822291b55099178
https://github.com/llvm/llvm-project/commit/d71228f97c01b0d0192dea60c822291b55099178
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/test/CIR/CodeGenHIP/string-literal-addrspace.hip
A clang/test/CIR/CodeGenOpenCL/string-literal-addrspace.cl
A clang/test/CIR/CodeGenSYCL/string-literal-addrspace-nyi.cpp
Log Message:
-----------
[CIR] Fix address space of string literals (#226996)
This commit fixes the address space of string literals in CIR. The
address space of string literals is determined by the AST type, which is
always the default address space for address space agnostic languages.
The global variable that holds the string literal may live in a
different address space, e.g. OpenCL constant address space or HIP
device address space. Therefore, we need to cast the global variable to
the pointer type of the AST type when emitting a reference to the string
literal.
Assisted-by: Claude Opus 5.5
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 08896666330f219e0346898c28fd8f5c811bc79e
https://github.com/llvm/llvm-project/commit/08896666330f219e0346898c28fd8f5c811bc79e
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
A clang/test/CIR/CodeGenCUDA/nounwind.cu
A clang/test/CIR/CodeGenOpenCL/nounwind.cl
M clang/test/CIR/CodeGenSYCL/kernel-caller-attributes.cpp
A clang/test/CIR/CodeGenSYCL/nounwind.cpp
Log Message:
-----------
[CIR] Implement device-wide nounwind attribute (#227016)
This commit implements the missing application of nounwind on device
functions and device calls. This leaves out OpenMP, similar to how OGCG
currently does not support it for OpenMP device functions.
---------
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 19223743331fbd313579f43f4c46c5a75e16b0be
https://github.com/llvm/llvm-project/commit/19223743331fbd313579f43f4c46c5a75e16b0be
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Device.cpp
M offload/plugins-nextgen/level_zero/src/L0Kernel.cpp
Log Message:
-----------
[Offload][L0] Remove OMP_INFOTYPE from plugin (#227994)
Remove OpenMP specific debug types and unify everithing under ODBG with
OL debug types in the Level Zero plugin.
Assisted by Claude.
Commit: 2876f4b8e1d2310be1500618c3963e1f69911f7a
https://github.com/llvm/llvm-project/commit/2876f4b8e1d2310be1500618c3963e1f69911f7a
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip
Log Message:
-----------
[CIR][AMDGPU] Use intrinsic type for dpp signature detection (#226921)
This commit modifies the CIR code generation for AMDGPU to use the
intrinsic type for dpp builtin signature detection. This change ensures
that the correct intrinsic type is used when generating code for dpp
operations, instead of relying on hard-coded types.
This should also help simplify the implementation of other future
builtins, such as NVPTX wmma/mma load/store/mma.
Note that this is not an NFC as it changes the signedness in parts of
the builtin signatures. However, that change fits the signature
definitions and the signedness does not carry much meaning for these
builtins either way.
This is a follow-up to #226469.
Assisted-by: Claude Opus 5.5
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: ff36303fe271fb28820851751ccf02c580ff17ba
https://github.com/llvm/llvm-project/commit/ff36303fe271fb28820851751ccf02c580ff17ba
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Options.h
M offload/plugins-nextgen/level_zero/src/L0Options.cpp
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
Log Message:
-----------
[Offload][L0] Add support to print the driver build log (#228022)
The log is printed if the driver reported an error (only the first
lines) or in full if LIBOFFLOAD_LEVEL_ZERO_SHOW_BUILD_LOG env var is
set.
Assisted by Claude.
Commit: 82db5839b2261760b084c039956d83210a9f8434
https://github.com/llvm/llvm-project/commit/82db5839b2261760b084c039956d83210a9f8434
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
A flang/test/Lower/OpenMP/optional-argument-map-4.f90
A offload/test/offloading/fortran/optional-mapped-arguments-5.f90
Log Message:
-----------
[Flang][OpenMP] Preserve absent OPTIONAL arguments in target mappings (#227343)
Generate empty mapping bounds for absent optional scalars and
explicit-shape arrays, preserving null pointers and preventing device
allocation or copies from null.
Co-authored-by: Codex <codex at openai.com>
Commit: fdfd37c0148b6186c19cc9ffa3f2cbfeb2948533
https://github.com/llvm/llvm-project/commit/fdfd37c0148b6186c19cc9ffa3f2cbfeb2948533
Author: Cristiano Lacerda <61819301+crisclacerda at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/test/Analysis/dead-stores.c
Log Message:
-----------
[clang][analyzer] Diagnose dead stores on parenthesized lvalues (#227176)
This commit fixes that `deadcode.DeadStores` previously failed to diagnose a
dead store when the assigned variable is wrapped in parentheses.
```c
int f(int input) {
int value;
(value) = input;
value = 2;
return value;
}
```
This change was made with assistance of an AI tool (OpenAI Codex), which
implemented the fix (IgnoreParens()) and the test.
I have found the false negative myself (on a real codebase that uses a
code generator) and ran the tests manually.
Commit: aae384ac9732f5dafb5fada6c7645d6d3f91505d
https://github.com/llvm/llvm-project/commit/aae384ac9732f5dafb5fada6c7645d6d3f91505d
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/GlobalISel/GMIR.md
M llvm/docs/GlobalISel/IRTranslator.md
M llvm/docs/GlobalISel/index.md
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/blockaddress-stale-addresstaken.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
M llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll
M llvm/test/CodeGen/AArch64/GlobalISel/fconstant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extends.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fixed-point-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-indirect-br-repeated-block.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-invoke-probabilities.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memcpy-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memfunc-undef.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memset-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-nneg-disjoint.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-split-vector-arg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-objects.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-tbaa.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-trunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vararg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vscale.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-weird-alloca-size.ll
M llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/threadlocal-address.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll
M llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async-non-entry-block.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/memsize-remarks.ll
M llvm/test/CodeGen/AArch64/speculative-load-intrinsic-mmo.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-call-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-irtranslator.ll
M llvm/test/CodeGen/ARM/GlobalISel/arm-param-lowering.ll
M llvm/test/CodeGen/ARM/GlobalISel/irtranslator-varargs-lowering.ll
M llvm/test/CodeGen/BPF/GlobalISel/ir-translator-ret.ll
M llvm/test/CodeGen/Generic/GlobalISel/irtranslator-byte-type.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-pic.ll
M llvm/test/CodeGen/M68k/GlobalISel/irtranslator-ret.ll
M llvm/test/CodeGen/MIR/AArch64/deactivation-symbols.mir
M llvm/test/CodeGen/MIR/AArch64/print-parse-overloaded-intrinsics.mir
M llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/add.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/big-endian.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/bitwise.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/pointers.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/split_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-fp128.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-mixed-types.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-scalar.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering-vectors.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering.ll
M llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator-stackprotect.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-calllowering.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/alloca.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-half.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-ilp32f-ilp32d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64-lp64f-lp64d-common.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calling-conv-lp64d.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/calls.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/fixed-vectors-calling-conv.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/insertelement.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/lower-args-vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/shufflevector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/splat_vector.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vacopy.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vararg.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-args.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ld.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-bf16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret-f16-err.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-ret.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator/vec-store.ll
M llvm/test/CodeGen/SPIRV/passes/translate-aggregate-uaddo.ll
M llvm/test/CodeGen/SPIRV/pointers/global-vars-untyped.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-simd.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args-swiftcc.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/args.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/call-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-aggregates.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-basics.ll
M llvm/test/CodeGen/WebAssembly/GlobalISel/irtranslator/ret-simd.ll
M llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
M llvm/test/CodeGen/X86/GlobalISel/callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-inalloca.ll
M llvm/test/CodeGen/X86/GlobalISel/calllowering-nocrashret.ll
M llvm/test/CodeGen/X86/GlobalISel/irtranslator-callingconv.ll
M llvm/test/CodeGen/X86/GlobalISel/x32-irtranslator.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator-struct-return.ll
M llvm/test/CodeGen/X86/GlobalISel/x86_64-irtranslator.ll
M llvm/test/DebugInfo/AArch64/dbg-value-globaladdr-gisel.ll
M llvm/test/Other/print-changed-machine.ll
Log Message:
-----------
Sync pass name between newPM and legacy for irtranslator (#227425)
The legacy pass name was change to newPM one. This is done for
consistency and having only one spelling for stop-after/before
Commit: e37801d959a029800caa3459bab795bc6584fbe0
https://github.com/llvm/llvm-project/commit/e37801d959a029800caa3459bab795bc6584fbe0
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/si-pre-emit-peephole-preserve-loop-info.mir
Log Message:
-----------
[AMDGPU] Remove redundant S_AND handling from optimizeVccBranch (#228417)
PR #227729 moved this optimization to SIFoldOperands::tryFoldAndExec
where it is more effective.
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 3ade3984f41cbe5094e4333020e15203a93b1cb4
https://github.com/llvm/llvm-project/commit/3ade3984f41cbe5094e4333020e15203a93b1cb4
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/Platform.h
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Target/Platform.cpp
Log Message:
-----------
[lldb] Move debug-info SDK parsing from PlatformDarwin into Platform (#144396)
Move the default `GetSDKPathFromDebugInfo` and
`ResolveSDKPathFromDebugInfo` implementations from `PlatformDarwin` into
the base `Platform` class, so non-Darwin platforms get real SDK parsing
instead of an `UnimplementedError`.
`PlatformDarwin` now only overrides the Module overload, to detect
conflicting public/internal SDKs. No functional change on Darwin.
Follow up to:
- https://github.com/llvm/llvm-project/pull/224361
rdar://171905747
Commit: 5ea3e148786da2af5ed2594c88b9156f49d6f77f
https://github.com/llvm/llvm-project/commit/5ea3e148786da2af5ed2594c88b9156f49d6f77f
Author: sstwcw <su3e8a96kzlver at posteo.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Format/TokenAnnotator.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
Log Message:
-----------
[clang-format] Handle Verilog dist (#224794)
This patch adds the space on the left of the `:=` operator. It is the
style used in the spec. Previously there was only one on the right.
old
```SystemVerilog
x dist {[100 : 102]:= 1, 200:= 2, 300:= 5};
```
new
```SystemVerilog
x dist {[100 : 102] := 1, 200 := 2, 300 := 5};
```
Commit: eb37e16f2de1d55106f5928e63eb92d4d40e2a66
https://github.com/llvm/llvm-project/commit/eb37e16f2de1d55106f5928e63eb92d4d40e2a66
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/test/msan/release_origin.c
Log Message:
-----------
[NFC][msan][test] Increase allocation size in release_origin.c (#228333)
On systems with many CPUs and 64 KiB pages (such as 192-CPU ppc64le on
`sanitizer-ppc64le-linux`), the kernel per-CPU RSS counter batch size
(24 MiB) exceeds the 20 MiB allocation in this test, so /proc/self/statm
may not reflect the RSS changes. Increase the allocation size to 100 MiB
and adjust the soft RSS limits accordingly.
Assisted-by: Gemini
Commit: 8a47c561cea67f48d54a4a17c5475b3a649425d7
https://github.com/llvm/llvm-project/commit/8a47c561cea67f48d54a4a17c5475b3a649425d7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMFastISel.cpp
A llvm/test/CodeGen/ARM/fast-isel-ext-dead-cpsr.ll
Log Message:
-----------
ARM: Mark cpsr def dead in FastISel integer extends (#227705)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 97beb893a52e1863d80bcb01c562316fbfce36c1
https://github.com/llvm/llvm-project/commit/97beb893a52e1863d80bcb01c562316fbfce36c1
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Log Message:
-----------
[lldb][Windows] Don't stack a new ReadFile on a timed-out one (#227759)
On Windows, `ConnectionGenericFile::Read` cleared `m_read_pending` when
a read was interrupted or timed out, even though its overlapped
`ReadFile` was still in flight.
The next Read then started a second ReadFile on the same OVERLAPPED and
buffer. When data finally arrived, both reads completed into one buffer
and the first part was lost. This made SwiftREPL tests like
`ExclusivityREPL` drop the first line of a program's output.
This patch makes it so an interrupted or timed-out read stays pending,
and the next Read waits on it. If it has already completed, Read
collects its result instead of blocking on an event that may have been
reset. Disconnect clears the pending state after `CancelIoEx`.
On a Windows PC with artificial 100% CPU usage, this reduced the failure
rate from 8/160 runs down to 0/160 runs.
Commit: b4bc2ce7de9e90af0ed925fb948d3c007676ccf7
https://github.com/llvm/llvm-project/commit/b4bc2ce7de9e90af0ed925fb948d3c007676ccf7
Author: irhs0 <happy.irhs at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
Log Message:
-----------
[Clang][X86] Add tests for AVX512 integer comparison intrinsics to be used in constexpr (#169452)
Covers the test for AVX512 comparison intrinsics mentioned in #162054
Next stage for #162054
Commit: 4a2ed5bc8ea94b4fb215ba82f23ae2df66beece3
https://github.com/llvm/llvm-project/commit/4a2ed5bc8ea94b4fb215ba82f23ae2df66beece3
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/include/device.h
M offload/libompaccsupport/device.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[offload][omp] Move OpenMP KLE to libomptarget (#223761)
Move preparations related to OpenMP KLE and dynamicCGroupMem fallback
out of the plugins into libomptarget.
Resructure Device::launch as it grew too large.
Assisted by Claude.
Commit: d4a06d8b5de60d290eda8c4b24fde00c57e15ca6
https://github.com/llvm/llvm-project/commit/d4a06d8b5de60d290eda8c4b24fde00c57e15ca6
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/include/L0Compat.h
M offload/plugins-nextgen/level_zero/include/L0Context.h
M offload/plugins-nextgen/level_zero/src/L0Context.cpp
Log Message:
-----------
Revert "[Offload][L0][NFC] Remove unused zexKernelGetArgumentSize dispatcher" (#228485)
Reverts llvm/llvm-project#227589
Commit: e792fd9b23a5d3a02a824d8a69ed938ef6a342a0
https://github.com/llvm/llvm-project/commit/e792fd9b23a5d3a02a824d8a69ed938ef6a342a0
Author: Jinsong Ji <jinsong.ji at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/intrinsic-scalarize.ll
Log Message:
-----------
[VectorCombine] Preserve FMF when scalarizing FP intrinsics (#228211)
992ca79c83b0 refactored scalarizeOpOrCmp to pass IR flags during
instruction creation instead of copying them afterward. All branches
(compare, unary op, binary op) were updated to pass flags, but the
intrinsic branch was missed — CreateIntrinsic was called without an
FMFSource, silently dropping fast-math flags such as afn, arcp, and
contract.
This caused downstream crashes on targets where
the legalizer for G_FPOW requires the afn flag: VectorCombine
scalarized a vector llvm.pow(afn) into scalar llvm.pow calls without
afn.
Pass the original instruction's FMF to CreateIntrinsic via FMFSource,
guarded by isa<FPMathOperator> for non-FP intrinsic safety.
Fixes #192607 (partially — the original fix missed this case).
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
---------
Co-authored-by: Claude Opus 4.6 (1M context) <noreply at anthropic.com>
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 7e18d9610ab30073144cc34d6e359ea24bd3a9b1
https://github.com/llvm/llvm-project/commit/7e18d9610ab30073144cc34d6e359ea24bd3a9b1
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/MathToLLVM/MathToLLVM.cpp
M mlir/test/Conversion/MathToLLVM/math-to-llvm.mlir
Log Message:
-----------
[mlir][MathToLLVM] Fix math.fpowi incorrectly being mapped to llvm.powi (#226089)
`math.fpowi` allows vector exponents, while `llvm.intr.powi` only takes
scalar exponents. This led to vector `math.fpowi` ops being lowered to
invalid IR.
This PR adds support for constant splat exponents, and leaves other
vector cases unconverted.
Commit: cb24ba3b310f7a97803fd2e975b62113efab93bc
https://github.com/llvm/llvm-project/commit/cb24ba3b310f7a97803fd2e975b62113efab93bc
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
A llvm/test/tools/llvm-objcopy/ELF/reloc-alloc-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-no-symtab.test
Log Message:
-----------
[llvm-objcopy] Handle SHF_ALLOC relocation sections in relocatable files (#227204)
llvm-objcopy treats every SHF_ALLOC relocation section as dynamic and
requires its sh_link to refer to .dynsym. Linux livepatch modules
(ET_REL) contain SHF_ALLOC .klp.rela.* sections linked to .symtab
(SHF_ALLOC keeps them in module memory until the patched module loads),
so llvm-objcopy rejects them:
```
error: Link field value 4 in section .klp.rela.vmlinux.text is not a symbol table
```
A relocatable file has no dynamic symbol table, so treat all of its
relocation sections as static, as BFD does. Their symbol indexes are
then updated when the symbol table changes. Since SHF_ALLOC no longer
distinguishes RelocationSection from DynamicRelocationSection, record
the kind in RelocationSectionBase.
LLM-aided
Commit: 50e02cb7fd867c24b0e980e463c780ed0132147f
https://github.com/llvm/llvm-project/commit/50e02cb7fd867c24b0e980e463c780ed0132147f
Author: Fangrui Song <i at maskray.me>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/lib/CGData/CMakeLists.txt
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/CMakeLists.txt
M llvm/utils/TableGen/Basic/CMakeLists.txt
A llvm/utils/TableGen/Basic/OptEmitter.cpp
A llvm/utils/TableGen/Basic/OptEmitter.h
A llvm/utils/TableGen/Basic/OptionParserEmitter.cpp
M llvm/utils/TableGen/CMakeLists.txt
M llvm/utils/TableGen/Common/CMakeLists.txt
R llvm/utils/TableGen/Common/OptEmitter.cpp
R llvm/utils/TableGen/Common/OptEmitter.h
R llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/TableGen/OptionRSTEmitter.cpp
M llvm/utils/gn/secondary/llvm/utils/TableGen/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Basic/BUILD.gn
M llvm/utils/gn/secondary/llvm/utils/TableGen/Common/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[TableGen] Generate library option structs with llvm-min-tblgen (#228338)
-gen-opt-parser-defs lives in llvm-tblgen, so a library whose options
are declared in TableGen (CGData, InstCombine, MC) waits for llvm-tblgen
to build before any of its sources compile, while it otherwise needs
only llvm-min-tblgen.
Move OptionParserEmitter and OptEmitter into TableGen/Basic, which
llvm-min-tblgen consists of, and generate those structs with
llvm-min-tblgen.
Aided by Opus 5.5
Commit: 58b70325a0548e6447dd6eeff9ea1e6f0426f6d2
https://github.com/llvm/llvm-project/commit/58b70325a0548e6447dd6eeff9ea1e6f0426f6d2
Author: Abdulmalek Almkainzi <aalmkainzi at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
A clang/test/Parser/c23-enum-generic-assoc.c
Log Message:
-----------
[Clang] Properly parse enumeration declarations with fixed underlying type in generic associations (#210353)
added a new `ParsingGenericAssociationType` flag that is managed by
`GenericAssociationTypeRAIIObject`. If that flag is true, when
encountering a `:` after enum name, try to parse next token as a type,
if successful, then that's the underlying type, if failed, then that is
the end of the enum declaration, and the colon will be parsed as the
generic association.
to check if the next tokens are a type, I added a new function
`isNextCXXTypeId`, which works the same as `isCXXTypeId`, but starts the
check one token ahead.
Fixed #207357
---------
Co-authored-by: Aaron Ballman <aaron at aaronballman.com>
Commit: c4ce375075372d10ef4688ea04555005d4efaa4a
https://github.com/llvm/llvm-project/commit/c4ce375075372d10ef4688ea04555005d4efaa4a
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/test/SemaTemplate/instantiate-var-template.cpp
Log Message:
-----------
[Clang][Sema] Create LocalScope for Variable Template (#228280)
A variable template should create its own LocalScope, as it should be
opaque to other instantiations. This can occur when there are multiple
instantiations in the same lexical scope. The correct behavior is that
these instantiations should not be chained together.
Assisted-by: Claude # Test ReleaseNote
Fixes: #134148
Commit: fe1de64cb3c255ecf6f035ca3562c4550479f632
https://github.com/llvm/llvm-project/commit/fe1de64cb3c255ecf6f035ca3562c4550479f632
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M offload/liboffload/API/Program.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/program/olIterateCompatibleDevices.cpp
Log Message:
-----------
[OFFLOAD] Add olIterateCompatibleDevices API (#226441)
Add a new API that iterates through all devices. For devices compatible
with the image (and their platform too) it calls the Callback.
Assisted by Claude.
Commit: e3ba0841a01eef468062f736e59ca7d014a4f11f
https://github.com/llvm/llvm-project/commit/e3ba0841a01eef468062f736e59ca7d014a4f11f
Author: Jianhui Li <jian.hui.li at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/XeGPUToXeVM/XeGPUToXeVM.cpp
M mlir/test/Conversion/XeGPUToXeVM/create_nd_tdesc.mlir
M mlir/test/Conversion/XeGPUToXeVM/loadstore_nd.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/store_nd_3d_subview.mlir
Log Message:
-----------
[mlir][xegpu] Fix high-D nd base_height for non-packed plane strides (#225556)
CreateNdDescToXeVMPattern lowers a >2D nd descriptor by viewing the
source as one flattened 2D block surface. It set the surface height to
the product of all dims but the innermost, which is the right row extent
only when the leading (batch) planes are packed back to back. A subview
of a wider source leaves gaps between them, and the last planes end up
outside base_height, where the HW boundary check silently drops every
access to them.
This PR fixes the issue by using the following formula:
base_height = size[R-2] + sum_d (size[d] - 1) * (stride[d] /
stride[R-2])
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 48b67fee8cdc30afbb77e7e4629e2ba5704631c7
https://github.com/llvm/llvm-project/commit/48b67fee8cdc30afbb77e7e4629e2ba5704631c7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
Log Message:
-----------
[OpenMPToLLVMIRTranslation] Save allocaIP after splitting (#228495)
allocatePrivateVars() splits the block, such that the original
saved insertion point now points into a different block. Move the
saving until after the call, so it uses the adjusted insertion
point.
This is an attempt to fix the amdgpu-clang-flang buildbot after
PR #228117.
Commit: 2b066829678436c9c82966c280466adfa82ba1aa
https://github.com/llvm/llvm-project/commit/2b066829678436c9c82966c280466adfa82ba1aa
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/llvm-project-overlay/llvm/lit_test.bzl
Log Message:
-----------
[bazel] Keep lit tests on the platform-default runfiles mode (#228446)
rules_python 1.9.0 made `--enable_runfiles=true` the default for every
py_binary/py_test on Windows, applied through a per-target transition
(python/private/py_executable.bzl, `_add_config_setting_defaults`). This
caused the transitioned value differs from the top-level one, every lit
test gets an `-ST-<hash>` output directory, running into Windows
`MAX_PATH` issues resulting in failing tests with
```
Could not create process (...\mlir\mlir-opt.exe) due to
[WinError 267] The directory name is invalid
```
This change relies on the escape hatch from this transition by setting
`@rules_python//command_line_option:enable_runfiles` to `INHERIT` which
avoids the transition. This behavior is removed in rules_python 2.0.0
and thus upgrading beyond that threshold will break Windows tests.
Commit: 9df479b8d1fe53c38527caa1936dbda1ce9ec5c9
https://github.com/llvm/llvm-project/commit/9df479b8d1fe53c38527caa1936dbda1ce9ec5c9
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/.bazelrc
Log Message:
-----------
[bazel] Stop forcing PIC on Windows (#228454)
CMake's LLVM_ENABLE_PIC defaults ON but is an explicit no-op on Windows:
the `elseif( WIN32 OR CYGWIN)` branch in HandleLLVMOptions.cmake is just
the comment "On Windows all code is PIC. MinGW warns if -fPIC is used."
In Bazel the same flag is fatal. rules_cc's auto-configured Windows
toolchain declares the `supports_pic` feature only in its non-MSVC
(mingw) branch. Building with this results in the following failure:
```
$ bazel build --nobuild --force_pic @llvm-project//llvm:Demangle
ERROR: local_config_cc/BUILD:340:13: in cc_toolchain rule @@...local_config_cc//:cc-compiler-x64_windows:
Error in fail: PIC compilation is requested but the toolchain does not support it (feature named 'supports_pic' is not enabled)
ERROR: Analysis of target '@@...local_config_cc//:cc-compiler-x64_windows' failed
ERROR: Analysis of target '@@+llvm_configure+llvm-project//llvm:Demangle' failed; build aborted: Analysis failed
```
Where building without it succeeds
```
$ bazel build --nobuild @llvm-project//llvm:Demangle
INFO: Analyzed target @@+llvm_configure+llvm-project//llvm:Demangle (110 packages loaded, 1760 targets configured).
```
Commit: ce7e1864de80d5695ddc064fb0a785125898af22
https://github.com/llvm/llvm-project/commit/ce7e1864de80d5695ddc064fb0a785125898af22
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Shard clang's analysis_flow_sensitive_tests (#228487)
The dataflow suite is 384 test cases across 22 files and grows with
every release. As one unsharded binary it runs for 135 s on a fast
agent, and on a slower one it overran Bazel's default 300s "moderate"
timeout on all three `--flaky_test_attempts`:
```
@llvm-project//clang/unittests:analysis_flow_sensitive_tests
TIMEOUT in 3 out of 3 in 300.1s
```
Give it the same declaration this file already uses for its other large
gtest binaries (ast_tests, ast_matchers_tests, format_tests,
rename_tests, tooling_tests, tooling_syntax_tests): `size = "medium"`
and `shard_count = 20`. Each shard then gets its own timeout for ~19
cases, which is a few seconds even on a slow machine.
Commit: 9f27e0165ddbd78385e2e3bc56fb747f2de18324
https://github.com/llvm/llvm-project/commit/9f27e0165ddbd78385e2e3bc56fb747f2de18324
Author: miyan <1138989048 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/cmake/modules/AddMLIRPython.cmake
Log Message:
-----------
[mlir][python] Avoid versioned Python DLL with stable ABI on Windows (#225794)
## Summary
On Windows, `add_mlir_python_extension` links every MLIR Python
extension and shared support library against `Python3_LIBRARY_RELEASE`,
even with `MLIR_ENABLE_PYTHON_STABLE_ABI=ON`. That adds a dependency on
the versioned Python DLL and prevents loading the abi3 modules with
another Python version.
nanobind's shared `-abi3` runtime already provides `Python::SABIModule`
as a public link dependency. Skip MLIR's extra versioned-library link
for stable ABI builds. Preserve it for non-stable and free-threaded
builds.
## Testing
Configured current upstream `main` (9120c137) with Python 3.12.11,
nanobind 2.9.2, clang-cl, Ninja, `MLIR_ENABLE_BINDINGS_PYTHON=ON`, and
`MLIR_ENABLE_PYTHON_STABLE_ABI=ON`, then built `_mlir.pyd`.
Before the change, `llvm-readobj --coff-imports` showed `python312.dll`
in both `_mlir.pyd` and `MLIRPythonSupport-mlir.dll`. Python 3.12 could
import and parse `module {}`, while Python 3.14 failed to load `_mlir`.
After the change, both binaries import only `python3.dll`. The same
build imports and parses `module {}` with Python 3.12 and 3.14. `git
diff --check` passes.
## AI assistance
OpenAI Codex assisted with the investigation, patch, testing, and
drafting this PR description.
Commit: e7e609e69ec43ce370f5e411ffb25076137955b7
https://github.com/llvm/llvm-project/commit/e7e609e69ec43ce370f5e411ffb25076137955b7
Author: David Spickett <david.spickett at arm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
Log Message:
-----------
[compiler-rt][hwasan][test] Temporarily disable hwasan_symbolize_stack_overflow.cpp (#228496)
HWASAN only keeps the lower 20 bits of the frame pointer, so if x plus
the access offset falls into the previous or following 1MB, the test
fails to realise that the access was done via. x.
This means it fails randomly on the buildbots, depending on ASLR and
other factors. See https://github.com/llvm/llvm-project/issues/228477
for details.
Commit: d9d72d603296da6188c8c8c1f56e6c515a4818a6
https://github.com/llvm/llvm-project/commit/d9d72d603296da6188c8c8c1f56e6c515a4818a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/test/CodeGen/X86/coalesce-commute-partial-def-implicit-read.mir
M llvm/test/CodeGen/X86/masked-udiv.ll
M llvm/test/CodeGen/X86/min-legal-vector-width.ll
A llvm/test/CodeGen/X86/rematerialize-sub-super-reg-dead-flags.mir
M llvm/test/CodeGen/X86/rematerialize-sub-super-reg.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-inline-spiller.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra-remove-back-copies.mir
M llvm/test/CodeGen/X86/statepoint-invoke-ra.mir
M llvm/test/CodeGen/X86/statepoint-ra.ll
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/vector-idiv-strictfp.ll
M llvm/test/CodeGen/X86/vector-idiv-udiv-512.ll
Log Message:
-----------
RegisterCoalescer: Don't mark a remat def dead when the copy destination covers it (#226037)
When rematerializing into a physical register that is not exactly the copy's destination,
reMaterializeDef marks the rematerialized def dead and adds an implicit-def of the copy
destination. That is only correct when the rematerialized instruction defines more than the
copy asked for, so the extra part really is unused.
It is wrong when the def is covered by the copy destination, since then it is part of that live
value:
undef %0.sub_32bit:gr64 = MOV32ri -11
$rax = COPY %0
; coalesces to
dead $eax = MOV32ri -11, implicit-def $rax
$eax is the live low half of $rax, so it must not be dead. Only set the dead flag when the def
has register units the copy destination does not cover. This makes the dead flags consistent
with what LiveVariables would produce in these scenarios.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 101f57538b5b751c1b2e96f1936217e0bec48287
https://github.com/llvm/llvm-project/commit/101f57538b5b751c1b2e96f1936217e0bec48287
Author: Nhat Nguyen <nhat7203 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/BuiltinTypes.def
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/PropertiesBase.td
A clang/include/clang/AST/Reflection.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
A clang/lib/AST/ByteCode/Reflect.h
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
A clang/test/AST/ast-dump-APValue-reflection.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-itanium.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-ms.cpp
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
R clang/test/CodeGenCXX/reflection-mangle-ms.cpp
A clang/test/PCH/reflection.cpp
A clang/test/PCH/reflection_include.h
A clang/test/Sema/reflection-meta-info.fail.cpp
A clang/test/Sema/reflection-meta-info.pass.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Log Message:
-----------
[clang]: support std::meta::info for primitive types (#190356)
This PR introduces std::meta::info type for reflection on primitive
types, as parsing right now only supports primitive types. This
implementation is based on the fork of @katzdm
For constant evaluation of std::meta::info, a new kind `Reflection` is
introduced in APValue::ValueKind.
For reflection mangling, the convention proposed in this issue is
applied - https://github.com/itanium-cxx-abi/cxx-abi/issues/208
Godbolt links:
Basic tests checked against gcc and clang fork:
https://godbolt.org/z/cj44oWcef
Expected fail tests checked against gcc and clang fork:
https://godbolt.org/z/d8aha3E63
Checked against gcc for mangling output: https://godbolt.org/z/bhb5YEY99
Commit: 662f00baf7bcfac0271f77f7496f5abcb2a6b33a
https://github.com/llvm/llvm-project/commit/662f00baf7bcfac0271f77f7496f5abcb2a6b33a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
A lldb/test/Shell/ObjectFile/ELF/gnu-debuglink-without-file-name.yaml
A lldb/test/Shell/ObjectFile/PECOFF/gnu-debuglink-without-file-name.yaml
Log Message:
-----------
[lldb] Don't crash on a .gnu_debuglink section without a file name (#228116)
A `.gnu_debuglink` section names the separate file that holds a binary's
debug info. When the section is empty, lldb crashes while loading the
binary, in both the `PECOFF` and `ELF` readers. `llvm-objcopy
--only-keep-debug` produces exactly such a section when it runs on a
binary that already has a debug link.
On Windows CI this crashes `TestSwiftSplitDebug` in `1/10` runs.
An empty or unterminated name is now treated as no debug link. New yaml
tests for both formats crash without the fix and pass with it.
Commit: 83c34fc0cbc9cef677297d3ab158f6901c128091
https://github.com/llvm/llvm-project/commit/83c34fc0cbc9cef677297d3ab158f6901c128091
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel.lock
M utils/bazel/extensions.bzl
Log Message:
-----------
[bazel] Mark llvm_repos_extension as reproducible (#228478)
This should remove unnecessary entries in `MODULE.bazel.lock` files
Commit: 69622642f6df6ada1f77587de44ce16e484d06a2
https://github.com/llvm/llvm-project/commit/69622642f6df6ada1f77587de44ce16e484d06a2
Author: NagaChaitanya Vellanki <pnagato at protonmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ExprConstant.cpp
A clang/test/Sema/constexpr-builtin-stdc-memreverse8-typed.c
A clang/test/SemaCXX/constexpr-builtin-stdc-memreverse8.cpp
Log Message:
-----------
[clang] Add constexpr support for stdc_memreverse8 (#202402)
Implements constant expression evaluation in both the AST interpreter
(ExprConstant.cpp) and the bytecode interpreter (InterpBuiltin.cpp).
Adds constexpr tests for the typed variants
stdc_memreverse8u{8,16,32,64}
Follow up:#197358.
Commit: e6965d09301f0e6d8872a1fc974cf2f7d0463515
https://github.com/llvm/llvm-project/commit/e6965d09301f0e6d8872a1fc974cf2f7d0463515
Author: Endre Fülöp <endre.fulop at sigmatechnology.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/block-in-critical-section.cpp
Log Message:
-----------
[NFC][analyzer] Replace BlockInCriticalSection MutexDescriptor with CallDescriptionMap (#224230)
Replace the variant-based matching in BlockInCriticalSectionChecker with
a CallDescriptionMap-based matching solution.
Aside from simplifying the implementation, this change has a secondary
goal of improving parity with PthreadLockChecker on the modeling side.
---------
Co-authored-by: Balázs Benics <benicsbalazs at gmail.com>
AI tools were used during the development of this change.
Commit: 25eada28e095f65baaef6bf9f7d2b9f439549ef8
https://github.com/llvm/llvm-project/commit/25eada28e095f65baaef6bf9f7d2b9f439549ef8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86] Narrow the mask when folding (vselect mask, (v16i8 (vtrunc (v8i64 x))), 0). (#228270)
vmtrunc expects the mask to have the same number of elements as the
source. Elements 8-15 of the result are always zero and don't require a
mask.
Found by adding SDTCisSameNumEltsAs to verifySDNode.
Assisted-by: Claude
Commit: 5a04c0a62947b12d1392abc71a5c72e88874e830
https://github.com/llvm/llvm-project/commit/5a04c0a62947b12d1392abc71a5c72e88874e830
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/MarkLive.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/SyntheticSections.cpp
Log Message:
-----------
[lld] Migrate away from PointerUnion::dyn_cast (NFC) (#228356)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast
where the operands are known to be nonnull.
The operands are known to be nonnull in one of two ways:
- Preceding checks: In BPSectionOrderer.cpp,
reloc.getReferentInputSection() is called a few lines above (and the
caller checks r.referent.isNull()), guaranteeing the PointerUnion is
nonnull.
- Downstream code: The else or fallthrough branch unconditionally
calls cast<...> or dyn_cast<...> on the pointer, or dereferences it.
Assisted-by: Antigravity
Commit: c1b2dbb9b1094c47120a59a5b59ab3dbbc1e762a
https://github.com/llvm/llvm-project/commit/c1b2dbb9b1094c47120a59a5b59ab3dbbc1e762a
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
A llvm/test/CodeGen/X86/pr220959.ll
Log Message:
-----------
[CodeGen] Diagnose unsupported landingpad result types instead of asserting (#223205)
Fixes #220959
`SelectionDAGBuilder::visitLandingPad` reads the exception pointer and
the selector out of two registers, so it assumed the landingpad's result
type always decomposes into exactly two values and asserted otherwise.
LangRef doesn't promise that shape: it says how the personality
function's results are represented is target specific, the verifier only
checks that every landingpad in a function agrees on a type, and
`landingpad token` is already accepted. So `landingpad {}` (or
`landingpad i32`) is well-formed IR that the backend just can't lower,
and it took the whole compiler down with it.
Added a small `isExceptionPointerAndSelectorType` helper in
CodeGen/Analysis that checks the IR struct for a pointer-or-integer
exception object and an integer selector, which is what the lowering
actually consumes, and made both `visitLandingPad` and GlobalISel's
`translateLandingPad` check it before computing any value types.
SelectionDAG emits a `DiagnosticInfoUnsupported` error and lowers the
result to poison so compilation can carry on; GlobalISel fails the
translation and falls back. Added `llvm/test/CodeGen/X86/pr220959.ll`
with the empty struct from the report plus `i32`, a three-element struct
and `{ float, i32 }`, run at `-O2` and at `-O0` where FastISel hands the
landingpad back to SelectionDAG.
Commit: 76311659426a1c8ebb96480c9151f25af3b5f70d
https://github.com/llvm/llvm-project/commit/76311659426a1c8ebb96480c9151f25af3b5f70d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M .github/CODEOWNERS
Log Message:
-----------
[LLVM] Add jhuber6 code owner files (#228501)
Summary:
Adds myself as an automatic reviewer to the core files that I created
and/or maintain.
Commit: a6ee5b1ee44136f2e7454186556b2b5f64323718
https://github.com/llvm/llvm-project/commit/a6ee5b1ee44136f2e7454186556b2b5f64323718
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
[LLVM] Add jhuber6 code owner files (#228501)
Summary:
Adds myself as an automatic reviewer to the core files that I created
and/or maintain.
Commit: 25935c89b8c59dd14a1f263b61207e8b93732d90
https://github.com/llvm/llvm-project/commit/25935c89b8c59dd14a1f263b61207e8b93732d90
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
Log Message:
-----------
[RISCV][P-ext] Remove unnecessary check from (p)m(r)acc handling in LowerIntrinsic_WO_CHAIN. NFC (#228172)
This was rejecting MVT::i32 on RV64, but this check was mutually
exclusive with every other case handled in this block. We can let it go
to the final return SDValue().
I'm not sure we can even get to this case anyway since
ReplaceNodeResults should be called for an illegal MVT::i32 on RV64.
Commit: a86de2f60d03be1f57d60a699708dd576ffa42a5
https://github.com/llvm/llvm-project/commit/a86de2f60d03be1f57d60a699708dd576ffa42a5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/SLPVectorizer/AArch64/InstructionsState-is-invalid-0.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/long-non-power-of-2.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/runtime-alias-checks-scheduled-order.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-node-with-no-users.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gather-runtime-stride-with-base-lane.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/gep-mixed-index-types.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/revec-strided-load.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-operands-reordering.ll
M llvm/test/Transforms/SLPVectorizer/X86/copyable-zext-poison-lane.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-throttled.ll
M llvm/test/Transforms/SLPVectorizer/revec.ll
Log Message:
-----------
[SLP]Support copyable GEP/zext main ops and relax gather pointer compatibility
Extends copyable-element modeling to single-index scalar GEPs (copyable
lane = gep V, 0) and scalar zexts (copyable lane = zext of a truncated
constant), and treats constant-offset lanes (including the bare base
pointer) as compatible with any same-object pointer when classifying
gathered loads. Runtime-strided accesses like b[i*S] form a single
masked gather with a vectorized address splat(b) + zext(mul <0..7>, S)
instead of a strided-load/scalar-load/gather mix.
Fixes #63855
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/221599
Commit: bcd4ab8368a4278965a91ee7995b1b4404f9c6b9
https://github.com/llvm/llvm-project/commit/bcd4ab8368a4278965a91ee7995b1b4404f9c6b9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/tools/llvm-exegesis/lib/Assembler.cpp
Log Message:
-----------
llvm-exegesis: Set the module triple and ABI-aware DataLayout (#228447)
The module used to assemble snippets only had a DataLayout set, which
was computed without the target ABI. Set the target triple on the
module, synthesize the "target-abi" module flag from the
TargetMachine's ABI option, and compute the DataLayout from it.
Without the ABI, a TargetMachine with a non-default ABI would hit the
incompatible DataLayout error when creating the MachineFunction.
Co-Authored-By: Claude <noreply at anthropic.com>
Commit: 61e7c81c6ebc90a0f9996027853e0b8b5594bacc
https://github.com/llvm/llvm-project/commit/61e7c81c6ebc90a0f9996027853e0b8b5594bacc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocBasic.h
Log Message:
-----------
[CodeGen] Remove unused RABasic::UsableRegs (NFC) (#228351)
The last use was removed on June 20, 2012 in commit
03b87d5aaaa2399b9a537b6455bf564586894ff8.
Assisted-by: Antigravity
Commit: 5a1c296488818dab707d86b4762a96c04f89ea41
https://github.com/llvm/llvm-project/commit/5a1c296488818dab707d86b4762a96c04f89ea41
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/test/Fir/logical-convert.fir
Log Message:
-----------
[flang] Handle vector operands in logical op codegen (#225407)
FIR logical ops take `AnyLogicalOrIntegerLike` operands; this includes
vector types. This PR makes the `normalizeLogicalToI1` and
`extendI1ToType` utils type-agnostic so that they don't assert when
passing a non-scalar type.
Fixes e.g. the crash:
```mlir
; fir-opt --fir-to-llvm-ir="target=aarch64" crash.mlir
func.func @neqv_vector(%a: vector<4xi32>, %b: vector<4xi32>) -> vector<4xi32> {
%0 = fir.neqv %a, %b : vector<4xi32>
return %0 : vector<4xi32>
}
```
Commit: 04cff67bac4c949fea01151599cde96ad2967fe4
https://github.com/llvm/llvm-project/commit/04cff67bac4c949fea01151599cde96ad2967fe4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-dead-eflags.ll
Log Message:
-----------
X86: Mark the dead EFLAGS clobbers in FastISel i1 masking (#228044)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 7533de7a1400ef9a5fd8a8d2e9870a0863eba415
https://github.com/llvm/llvm-project/commit/7533de7a1400ef9a5fd8a8d2e9870a0863eba415
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Parser/message.h
M flang/lib/Parser/message.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/resolve-directives.cpp
Log Message:
-----------
[flang] Pass llvm::StringRef directly to message formatting (#228449)
Added an overload of MessageFormattedText::Convert for llvm::StringRef.
This removes the need to explicitly convert llvm::StringRef arguments to
std::string in calls to diagnostic functions (Say/Warn/Attach).
Only direct message arguments are changed; uses that feed
ToUpperCaseLetters (which takes std::string_view), llvm::Twine
concatenations, and variable initializers are left as-is. No behavioral
change.
Co-Authored-By: Claude Opus 4 (1M context) <noreply at anthropic.com>
Commit: 5c38ca153312ea29871fcdd89a0a9ec678c9fb72
https://github.com/llvm/llvm-project/commit/5c38ca153312ea29871fcdd89a0a9ec678c9fb72
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/NVPTX/fenv-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing floating-point state libcalls (#228426)
Previously makeStateFunctionCall would hit a fatal error if the target has no
fegetenv/fesetenv/fegetmode/fesetmode implementation. Report a proper
context error and emit nothing.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 070264d5115d3faf3d29228009622e92cf18cdb8
https://github.com/llvm/llvm-project/commit/070264d5115d3faf3d29228009622e92cf18cdb8
Author: rdong8 <richarddong08 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
Log Message:
-----------
[bazel] Pin rules_cc_autoconf to 0.24.0 (#227956)
The GNU multiprecision deps (GMP, MPFR, MPC) bring in an old version of
`rules_cc_autoconf` that have some transitive includes pruned by newer
libc++:
```
external/rules_cc_autoconf+/autoconf/private/checker/debug_logger.h:43:33: error: no member named 'back_inserter' in namespace 'std'
43 | std::back_inserter(lower_level), ::tolower);
| ^~~~~~~~~~~~~
1 error generated.
```
This fix pins it to a newer version.
---------
Co-authored-by: Keith Smiley <keithbsmiley at gmail.com>
Commit: fc0993001ce85dc5f485ddb26bea29fd8ee15ac9
https://github.com/llvm/llvm-project/commit/fc0993001ce85dc5f485ddb26bea29fd8ee15ac9
Author: Arcadiy Ivanov <arcadiy at ivanov.biz>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
A llvm/test/tools/llvm-dwarfutil/ELF/X86/dwarf5-partial-unit-ref-addr.test
M llvm/unittests/CodeGen/DIETest.cpp
Log Message:
-----------
[AsmPrinter] Find a DIE's unit by its owner, not by its tag (#219660)
[AsmPrinter] Find a DIE's unit by its owner
Fix DIE::getUnitDie() for DW_TAG_partial_unit. The existing parent walk
recognizes unit roots by tag but omits partial units, so a cross-unit
DW_FORM_ref_addr can reach getDebugSectionOffset() without a unit and
assert.
Have getUnit() walk the parent chain until Owner contains a DIEUnit, then
derive getUnitDie() from that unit. A DIEUnit owns its unit DIE, so this
handles every unit root tag without maintaining another tag list and
still returns null for a DIE tree that no DIEUnit owns. Use
dwarf::isUnitType for the constructor assertion as well. Update the
DIEUnit comments to describe the owner-based walk.
Add unit coverage for all four unit root tags and an unowned DIE tree.
Add a dwarfutil test for resolving DW_FORM_ref_addr into a partial unit
with and without garbage collection. Keep that test on the classic
linker and omit --verify because of #219613 and #219365.
Fixes #219650.
Assisted-by: Claude Code
Commit: 08e245062b1028d09aadf8344d5d7e9177ce19d6
https://github.com/llvm/llvm-project/commit/08e245062b1028d09aadf8344d5d7e9177ce19d6
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Slide 1 up/down (#228049)
This patch supports packed slide 1 up/down intrinsics and codegen.
Commit: 2eda6f72ab01914b8aa1a13758e55ff57ad3b3d5
https://github.com/llvm/llvm-project/commit/2eda6f72ab01914b8aa1a13758e55ff57ad3b3d5
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/mops-dead-nzcv.ll
Log Message:
-----------
AArch64/GlobalISel: Mark the MOPS pseudo NZCV def dead (#227643)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8aee09b1913ebd8f3bb26dd3165f2a645bb2fa80
https://github.com/llvm/llvm-project/commit/8aee09b1913ebd8f3bb26dd3165f2a645bb2fa80
Author: Michael Toguchi <michael.d.toguchi at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/Driver/Driver.cpp
M clang/test/Driver/sycl-offload-jit.cpp
Log Message:
-----------
[SYCL][Driver] Emit textual SPIR-V for device-only -S compilations (#227844)
With -fsycl -fsycl-device-only -S, the SYCL device backend step produced
textual LLVM IR. It now produces assembly, which for spirv64 is textual
SPIR-V from the SPIR-V backend. Adding -emit-llvm produces LLVM IR.
Commit: 47f4550f76ae4504966770405664c9665b1d861e
https://github.com/llvm/llvm-project/commit/47f4550f76ae4504966770405664c9665b1d861e
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
A flang/test/Analysis/AliasAnalysis/modref-call-null.fir
Log Message:
-----------
[flang] Treat null addresses as their own alias source (#228284)
A null pointer is associated with no address, so classifying it as an
allocation describes an object that does not exist. fir.absent and
address-typed fir.zero_bits both lower to that null. Recognizing the
null lets alias analysis keep it distinct from every object, including
other nulls, while a control-flow join of a null and an allocation is
still an allocation. A join whose every predecessor is a null is still a
null, and a call cannot read or write it.
One pattern this join has to recognize is a private copy that is either
freshly allocated or null:
%source_box = fir.load %source
%source_addr = fir.box_addr %source_box
%is_allocated = arith.cmpi ne, %source_addr, %null
%private_addr = fir.if %is_allocated -> !fir.heap<f32> {
%allocation = fir.allocmem f32
fir.result %allocation : !fir.heap<f32>
} else {
%null_allocation = fir.zero_bits !fir.heap<f32>
fir.result %null_allocation : !fir.heap<f32>
}
%private_box = fir.embox %private_addr : (!fir.heap<f32>) ->
!fir.box<!fir.heap<f32>>
%allocation is an allocation, %null_allocation is a null, and
%private_addr is an allocation: it is either new storage or no address,
so it cannot alias storage outside the branch.
Commit: 61914fd3ce4100d61859471f4fbc48db82185c0a
https://github.com/llvm/llvm-project/commit/61914fd3ce4100d61859471f4fbc48db82185c0a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
Log Message:
-----------
AArch64/GlobalISel: Mark the MOPS pseudo NZCV def dead (#227643)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d9c741c53f4c9402c93ef163c1d848ab3bec7511
https://github.com/llvm/llvm-project/commit/d9c741c53f4c9402c93ef163c1d848ab3bec7511
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
Log Message:
-----------
[X86] Add tests showing failure to convert 512-bit concats of 128-bit chains to X86ISD::SHUF128 nodes (#228512)
Commit: fea6c3c29ce4b70cf515de135e95736cfc2db50e
https://github.com/llvm/llvm-project/commit/fea6c3c29ce4b70cf515de135e95736cfc2db50e
Author: Anthony Latsis <alatsis at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/module.modulemap
Log Message:
-----------
[clang] Add SPIRVTypes.def to the module map (#228240)
Follow-up to https://github.com/llvm/llvm-project/pull/207077, which
added the file without listing it. Fixes "missing submodule
'Clang_Basic.SPIRVTypes'" in modular builds.
Commit: cd8c5d3359778db38df85cad46b71ee3777b2cff
https://github.com/llvm/llvm-project/commit/cd8c5d3359778db38df85cad46b71ee3777b2cff
Author: Riyaz Ahmad <riyaz86a at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
Log Message:
-----------
[compiler-rt][ubsan] Add powerpc64le support to offload UBSan HSA interceptors (#228007)
The HSA interceptor library was limited to` x86_64` and `aarch64`,
causing the `hsa-load-order` and `hsa-missing` lit tests to fail on
`powerpc64le`.
All dependencies (sanitizer_offload, RTSanitizerOffload,
llvm-libc-common-utilities)
are already available on powerpc64le Linux and the INTERCEPTOR macro
works
via standard ELF symbol interposition on that platform.
Add PPC64 to ALL_UBSAN_OFFLOAD_SUPPORTED_ARCH to extend support for
powerpc64le.
Co-authored-by: Riyaz Ahmad <riyaz.ahmad at ibm.com>
Commit: 62e30e3326d9b4e3948d242ccfee7aa4fc030ef3
https://github.com/llvm/llvm-project/commit/62e30e3326d9b4e3948d242ccfee7aa4fc030ef3
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/mad-mix.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Fold neg/abs modifiers when mad-mix selects the low half (#223535)
selectVOP3PMadMixModsImpl re-runs the fneg/fabs match after rewriting Src to the 32-bit register the 16-bit value is a half of, but only did so on the isExtractHiElt path, not for isExtractLoElt.
The two halves are not symmetric. An fneg/fabs of a 32-bit float only touches bit 31, which is the sign bit of the high half, so folding it into a modifier on the selected high half is correct. The low half's sign bit is bit 15, which such an fneg/fabs leaves alone, so only a modifier that acts on each 16-bit element can be folded there. So the source must be a 2 x 16-bit vector to fold it.
Commit: 32681decfa6079748836719d9ddf8667fd2b81fc
https://github.com/llvm/llvm-project/commit/32681decfa6079748836719d9ddf8667fd2b81fc
Author: Alexandre Ganea <alex_toresh at yahoo.fr>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
A compiler-rt/test/asan/TestCases/Windows/intercept_memmove.cpp
Log Message:
-----------
[ASan][Windows] Intercept memcpy when the CRT provides it separately from memmove (#221491)
This is the third retry in a attempt to fix
https://github.com/llvm/llvm-project/issues/126077 (the other two
attempts being https://github.com/llvm/llvm-project/pull/192060 and
https://github.com/llvm/llvm-project/pull/193633)
I was looking at the wrong thing: I was trying to compare `&memcpy` and
`&memmove` in the ASan runtime itself; but the real problem in
https://github.com/llvm/llvm-project/issues/126077 was the dynamic CRT,
which provides non-aliased `&memcpy`.
Please see repro and output:
[output.txt](https://github.com/user-attachments/files/31870348/output.txt)
Historically, the CRT provided `memcpy` and `memmove` as a single
implementation, aliasing both symbols. Since Visual Studio 17.7
(vcruntime140.dll 14.38), [a rewrite of
`memmove`](https://devblogs.microsoft.com/cppblog/msvc-backend-updates-since-visual-studio-2022-version-17-3/)
has changed that. Instead of being aliased, `memcpy` now becomes a thunk
to `memmove`.
We now patch both symbols only if they are distinct (different
addresses). This currently applies only to the dynamic CRT, but if in
the future the static CRT provides two implementations, that should be
covered too.
Assisted by: Claude Fable 5
Fixes #126077
Commit: 9428f1b09f54d85f248b00d4e8aadb6cf0ad8098
https://github.com/llvm/llvm-project/commit/9428f1b09f54d85f248b00d4e8aadb6cf0ad8098
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
Log Message:
-----------
[CodeGen] Use SmallSetVector for getRegAllocationHints (#224472)
Change `TargetRegisterInfo::getRegAllocationHints` and all target
overrides to accept `SmallSetVector<MCPhysReg, 16> &Hints` instead of
`SmallVectorImpl`, structurally preventing duplicate register allocation
hints while preserving insertion order.
Assisted-by: Gemini
Link: #190139
Link: #193011
Link: #219007
Link: #224448
Link: #224451
Link: #224742
Commit: 2ff597266f56e275396fd684f3b1f2c28e4e47a4
https://github.com/llvm/llvm-project/commit/2ff597266f56e275396fd684f3b1f2c28e4e47a4
Author: Qiongsi Wu <qiongsiwu at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
Log Message:
-----------
[clang][Modules] Reimplement Macro Expansion Record Source Location Delta Encoding (#223759)
Source location delta encoding was removed by
https://github.com/llvm/llvm-project/pull/145670 due to a difficult (and
eventually abandoned) bug fix
https://github.com/llvm/llvm-project/pull/145529.
This PR reimplements the encoding to avoid the bug, and adjusts the
order of the fields in the record so that delta encoding achieves more
savings relative to the order we had before.
Assisted by: Claude Code Opus 5.
Commit: c851fb6892a674a1388cf4231ed89244c331c3bf
https://github.com/llvm/llvm-project/commit/c851fb6892a674a1388cf4231ed89244c331c3bf
Author: Krzysztof Drewniak <Krzysztof.Drewniak at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm_neon_intrinsics.c
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
M llvm/docs/LangRef.md
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
M llvm/include/llvm/IR/MDBuilder.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.h
M llvm/lib/IR/MDBuilder.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Analysis/MemorySSA/noalias-scope-decl.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
A llvm/test/Analysis/ScopedNoAliasAA/disjoint-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/fence-modref.ll
M llvm/test/Assembler/incomplete-ir-metadata.ll
A llvm/test/Bitcode/upgrade-alias-scope-domains.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
M llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
M llvm/test/CodeGen/AMDGPU/lds-dma-workgroup-release.ll
M llvm/test/CodeGen/AMDGPU/lower-intrinsics-noalias-metadata.ll
M llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
M llvm/test/CodeGen/AMDGPU/lower-kernel-arguments-noalias-call-no-ptr-args.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-memcpy.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa-merge.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-struct-aa.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-alias-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/AMDGPU/lower-module-lds-via-hybrid.ll
M llvm/test/CodeGen/AMDGPU/lower-noalias-kernargs.ll
M llvm/test/CodeGen/AMDGPU/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AMDGPU/remove-no-kernel-id-attribute.ll
M llvm/test/CodeGen/AMDGPU/si-split-load-store-alias-info.ll
M llvm/test/CodeGen/AMDGPU/target-mem-intrinsic-metadata.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-unscoped.ll
M llvm/test/CodeGen/AVR/rust-avr-bug-95.ll
M llvm/test/CodeGen/Hexagon/autohvx/isel-expand-unaligned-loads-noindexed.ll
M llvm/test/CodeGen/Hexagon/swp-conv3x3-nested.ll
M llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
M llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/machine-metadata.mir
M llvm/test/CodeGen/MIR/X86/memory-operands.mir
M llvm/test/CodeGen/PowerPC/non-simple-args-intrin.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-barrier.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-copy-memory.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-domain-order.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-atomic.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store-struct.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-masked-load-store.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_memory_access_aliasing/alias-scope-shared-across-functions.ll
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/noalias-scope-decl.ll
M llvm/test/CodeGen/SystemZ/Large/branch-01.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
M llvm/test/CodeGen/X86/dbg-distringtype-uint.ll
M llvm/test/CodeGen/X86/memcpy-scoped-aa.ll
M llvm/test/CodeGen/X86/pr48727.ll
M llvm/test/DebugInfo/COFF/fortran-contained-proc.ll
M llvm/test/DebugInfo/Generic/sroa-samesize.ll
M llvm/test/DebugInfo/X86/global-sra-struct-part-overlap-segment.ll
M llvm/test/Transforms/AggressiveInstCombine/AArch64/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/or-load.ll
M llvm/test/Transforms/AggressiveInstCombine/X86/store-merge.ll
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/DFAJumpThreading/dfa-jump-threading-transform.ll
M llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
M llvm/test/Transforms/DeadStoreElimination/scoped-noalias.ll
M llvm/test/Transforms/EarlyCSE/noalias-scope-decl.ll
M llvm/test/Transforms/GVN/noalias.ll
M llvm/test/Transforms/GVN/rle-coerced-noalias.ll
M llvm/test/Transforms/IndVarSimplify/addrec_no_exec_on_every_iteration.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/debug-info.ll
M llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
M llvm/test/Transforms/Inline/AMDGPU/load-intrinsics.ll
M llvm/test/Transforms/Inline/noalias-calls-always.ll
M llvm/test/Transforms/Inline/noalias-calls.ll
M llvm/test/Transforms/Inline/noalias-calls2.ll
M llvm/test/Transforms/Inline/noalias-cs.ll
M llvm/test/Transforms/Inline/noalias-escape-source.ll
M llvm/test/Transforms/Inline/noalias.ll
M llvm/test/Transforms/Inline/noalias2.ll
M llvm/test/Transforms/Inline/noalias3.ll
M llvm/test/Transforms/Inline/pr48209.ll
M llvm/test/Transforms/Inline/pr50270.ll
M llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
M llvm/test/Transforms/InstCombine/bitcast-store.ll
M llvm/test/Transforms/InstCombine/fold-phi-load-metadata.ll
M llvm/test/Transforms/InstCombine/load-combine-metadata.ll
M llvm/test/Transforms/InstCombine/loadstore-metadata.ll
M llvm/test/Transforms/InstCombine/memcpy-to-load.ll
A llvm/test/Transforms/InstCombine/noalias-scope-decl-disjoint-domain.ll
M llvm/test/Transforms/InstCombine/noalias-scope-decl.ll
M llvm/test/Transforms/InstCombine/select-masked_load.ll
M llvm/test/Transforms/JumpThreading/free_instructions.ll
M llvm/test/Transforms/JumpThreading/noalias-scope-decl.ll
M llvm/test/Transforms/JumpThreading/thread-loads.ll
M llvm/test/Transforms/LICM/AMDGPU/buffer-rsrc-ptrs.ll
M llvm/test/Transforms/LICM/dropped-tbaa.ll
M llvm/test/Transforms/LICM/hoist-metadata.ll
M llvm/test/Transforms/LICM/licm-ci.ll
M llvm/test/Transforms/LICM/pr42969.ll
M llvm/test/Transforms/LICM/scalar-promote-aa-tags.ll
M llvm/test/Transforms/LICM/scalar-promote.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/aa-metadata.ll
M llvm/test/Transforms/LoadStoreVectorizer/AMDGPU/fence-noalias-metadata.ll
M llvm/test/Transforms/LoopDeletion/noalias.ll
M llvm/test/Transforms/LoopDistribute/bounds-expansion-bug.ll
M llvm/test/Transforms/LoopDistribute/cross-partition-access.ll
M llvm/test/Transforms/LoopDistribute/followup.ll
M llvm/test/Transforms/LoopDistribute/no-reprocess.ll
M llvm/test/Transforms/LoopDistribute/non-lcssa-input.ll
M llvm/test/Transforms/LoopDistribute/outside-use.ll
M llvm/test/Transforms/LoopRotate/noalias.ll
M llvm/test/Transforms/LoopUnroll/noalias.ll
M llvm/test/Transforms/LoopUnroll/peel-loop-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked_ldst_sme.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cast-intrinsics.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-intermediate-store.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/RISCV/vf-will-not-generate-any-vector-insts.ll
M llvm/test/Transforms/LoopVectorize/VPlan/AArch64/sve2-histcnt-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/cse-loads.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/dead_instructions.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/noalias-md.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl-outer-loop.ll
M llvm/test/Transforms/LoopVectorize/noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/predicate-switch.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights-merged-mem-ops.ll
M llvm/test/Transforms/LoopVectorize/runtime-check-threshold-with-force-metadata.ll
M llvm/test/Transforms/LoopVectorize/scalable-noalias-scope-decl.ll
M llvm/test/Transforms/LoopVectorize/select-cmp-multiuse.ll
M llvm/test/Transforms/LoopVectorize/unroll-novec-memcheck-metadata.ll
M llvm/test/Transforms/LoopVersioning/add-phi-update-users.ll
M llvm/test/Transforms/LoopVersioning/crash-36998.ll
M llvm/test/Transforms/LoopVersioning/noalias-version-twice.ll
M llvm/test/Transforms/LoopVersioning/noalias.ll
M llvm/test/Transforms/LoopVersioning/wrapping-pointer-non-integral-addrspace.ll
M llvm/test/Transforms/LowerInvoke/lowerinvoke.ll
M llvm/test/Transforms/MemCpyOpt/aa-recursion-assertion-failure.ll
M llvm/test/Transforms/MemCpyOpt/callslot_aa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_badaa.ll
M llvm/test/Transforms/MemCpyOpt/callslot_noalias.ll
M llvm/test/Transforms/MemCpyOpt/load-store-to-memcpy.ll
M llvm/test/Transforms/MemCpyOpt/memcpy.ll
M llvm/test/Transforms/MemCpyOpt/stack-move.ll
M llvm/test/Transforms/MergeFunc/mergefunc-preserve-nonnull.ll
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
M llvm/test/Transforms/NewGVN/noalias.ll
M llvm/test/Transforms/OpenMP/spmdization_guarding.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/indvars-vectorization.ll
M llvm/test/Transforms/PhaseOrdering/X86/loop-vectorizer-noalias.ll
M llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-shuffle-resized.ll
M llvm/test/Transforms/SROA/mem-par-metadata-sroa.ll
M llvm/test/Transforms/ScalarizeMaskedMemIntrin/X86/metadata.ll
M llvm/test/Transforms/Util/combine-alias-scope-metadata.ll
M llvm/test/Transforms/VectorCombine/alias.ll
M llvm/test/Verifier/alias-scope-metadata.ll
M llvm/test/Verifier/noalias_scope_decl.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll
M llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/dot_value_in_metadata_string.ll.expected
M llvm/test/tools/llubi/noalias_scope.ll
M llvm/unittests/MIR/MachineMetadata.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Target/LLVMIR/Import/import-failure.ll
M mlir/test/Target/LLVMIR/Import/masked-intrinsic-metadata.ll
M mlir/test/Target/LLVMIR/Import/metadata-alias-scopes.ll
M mlir/test/Target/LLVMIR/attribute-alias-scopes.mlir
M mlir/test/Target/LLVMIR/masked-intrinsic-metadata.mlir
M polly/lib/CodeGen/IRBuilder.cpp
M polly/test/CodeGen/MemAccess/create_arrays.ll
M polly/test/CodeGen/annotated_alias_scopes.ll
M polly/test/CodeGen/invariant_load_alias_metadata.ll
M polly/test/CodeGen/scev-backedgetaken.ll
Log Message:
-----------
[IR] Add alias scope domains with disjoint scopes (#218768)
See RFC at
https://discourse.llvm.org/t/rfc-disjoint-scope-alias-scope-noalias-domains/91537
This commit adds support for declaring an alias scope domain disjoint.
Disjoint domains are ones where each scope is implicitly `!noalias`
with each other scope in the domain. This is represented by adding an
`i1` into the scope's domain as the second argument, with `i1 true`
representing disjoint scopes and `i1 false` representing the old
non-disjoint behavior. AutoUpgrade mechanisms have been added to add
in the missing `i1 false` to existing metadata.
This commit updates alias analysis to know about disjoint scopes and
updates the function cloner to also clone the alias domain if it's
disjoint (since, as a herd of LLMs discovered, you don't want the old
IR to be noalias with a clone of itself).
Commits to migrate passes to use disjoint scopes where that's an
option are future PRs.
AI disclosure: Claude did the coding on this one, I looked over it and
wrote this commit message
Commit: 0240730eff0d9c5ecbb152adc30a1104709c3250
https://github.com/llvm/llvm-project/commit/0240730eff0d9c5ecbb152adc30a1104709c3250
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/test/Analysis/AliasAnalysis/alias-analysis-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-4.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-6.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-7.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-9.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-allocatable.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-array.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-target.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-zero-offset-view-chain.fir
M flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
M flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
M flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/modref-alloc-free-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-external-name-conversion.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
M flang/test/Analysis/AliasAnalysis/modref-call-intent.fir
M flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
M flang/test/Analysis/AliasAnalysis/modref-call-recursive.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/tco-test-gen.fir
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer-char-len.fir
M flang/test/Fir/CUDA/cuda-data-transfer-defer-acc-routine.mlir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
M flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
M flang/test/Fir/CUDA/cuda-sync-desc.mlir
M flang/test/Fir/CUDA/cuf-offload-livein-value-canonicalization.fir
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/any.fir
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/if-extra.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
M flang/test/Fir/FirToSCF/sum.fir
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
M flang/test/Fir/MIF/co_broadcast.mlir
M flang/test/Fir/MIF/co_max.mlir
M flang/test/Fir/MIF/co_min.mlir
M flang/test/Fir/MIF/co_sum.mlir
M flang/test/Fir/MIF/coarray-alloc.mlir
M flang/test/Fir/MIF/coarray_alloc_many_declare.mlir
M flang/test/Fir/MIF/cobound.mlir
M flang/test/Fir/MIF/coshape.mlir
M flang/test/Fir/MIF/form_team.mlir
M flang/test/Fir/MIF/get_team.mlir
M flang/test/Fir/MIF/image_index.mlir
M flang/test/Fir/MIF/num_images.mlir
M flang/test/Fir/MIF/sync_all.mlir
M flang/test/Fir/MIF/sync_images.mlir
M flang/test/Fir/MIF/sync_memory.mlir
M flang/test/Fir/MIF/sync_team.mlir
M flang/test/Fir/MIF/team_number.mlir
M flang/test/Fir/MIF/this_image.mlir
M flang/test/Fir/OpenACC/acc-erase-unused-kernel-allocations.mlir
M flang/test/Fir/OpenACC/acc-fir-map-info-prep-clauses.mlir
M flang/test/Fir/OpenACC/acc-routine-to-gpu-func.fir
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Fir/OpenACC/device-ptr-to-cuf-kernel.mlir
M flang/test/Fir/OpenACC/legalize-data.fir
M flang/test/Fir/OpenACC/offload-livein-value-canonicalization.fir
M flang/test/Fir/OpenACC/openacc-mappable.fir
M flang/test/Fir/OpenACC/openacc-type-categories-declare-storage.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-alloc.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-copy.mlir
M flang/test/Fir/OpenACC/pointer-like-interface-free.mlir
M flang/test/Fir/OpenACC/propagate-attr-folding.fir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
M flang/test/Fir/OpenACC/recipe-populate-firstprivate.mlir
M flang/test/Fir/OpenACC/recipe-populate-private.mlir
M flang/test/Fir/OpenACC/support-analysis-varname.mlir
M flang/test/Fir/OpenACC/use-device-canonicalizer.mlir
M flang/test/Fir/abstract-results-bindc.fir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/array-coor-canonicalization.fir
M flang/test/Fir/boxproc-openmp.fir
M flang/test/Fir/convert-to-llvm.fir
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M flang/test/Fir/declare.fir
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M flang/test/Lower/Intrinsics/ieee_is_finite.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_operator_eq.f90
M flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_signbit.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/ierrno.f90
M flang/test/Lower/Intrinsics/index.f90
M flang/test/Lower/Intrinsics/iparity.f90
M flang/test/Lower/Intrinsics/is_contiguous.f90
M flang/test/Lower/Intrinsics/is_iostat_value.f90
M flang/test/Lower/Intrinsics/ishft.f90
M flang/test/Lower/Intrinsics/ishftc.f90
M flang/test/Lower/Intrinsics/lbound.f90
M flang/test/Lower/Intrinsics/malloc.f90
M flang/test/Lower/Intrinsics/maxloc.f90
M flang/test/Lower/Intrinsics/maxval.f90
M flang/test/Lower/Intrinsics/merge.f90
M flang/test/Lower/Intrinsics/merge_bits.f90
M flang/test/Lower/Intrinsics/min.f90
M flang/test/Lower/Intrinsics/minloc.f90
M flang/test/Lower/Intrinsics/minval.f90
M flang/test/Lower/Intrinsics/modulo.f90
M flang/test/Lower/Intrinsics/move_alloc.f90
M flang/test/Lower/Intrinsics/mvbits-unsigned.f90
M flang/test/Lower/Intrinsics/mvbits.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/test/Lower/Intrinsics/not.f90
M flang/test/Lower/Intrinsics/perror.f90
M flang/test/Lower/Intrinsics/product.f90
M flang/test/Lower/Intrinsics/putenv-func.f90
M flang/test/Lower/Intrinsics/putenv-sub.f90
M flang/test/Lower/Intrinsics/rand.f90
M flang/test/Lower/Intrinsics/real.f90
M flang/test/Lower/Intrinsics/reduce.f90
M flang/test/Lower/Intrinsics/rename.f90
M flang/test/Lower/Intrinsics/reshape.f90
M flang/test/Lower/Intrinsics/rrspacing.f90
M flang/test/Lower/Intrinsics/rtc.f90
M flang/test/Lower/Intrinsics/second.f90
M flang/test/Lower/Intrinsics/selected_char_kind.f90
M flang/test/Lower/Intrinsics/selected_logical_kind.f90
M flang/test/Lower/Intrinsics/shape.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/Intrinsics/signal.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/sizeof.f90
M flang/test/Lower/Intrinsics/sum.f90
M flang/test/Lower/Intrinsics/system-optional.f90
M flang/test/Lower/Intrinsics/system.f90
M flang/test/Lower/Intrinsics/time.f90
M flang/test/Lower/Intrinsics/timef.f90
M flang/test/Lower/Intrinsics/tokenize.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/Intrinsics/transpose.f90
M flang/test/Lower/Intrinsics/transpose_opt.f90
M flang/test/Lower/Intrinsics/trim.f90
M flang/test/Lower/Intrinsics/ubound.f90
M flang/test/Lower/Intrinsics/ubound01.f90
M flang/test/Lower/Intrinsics/unlink-func.f90
M flang/test/Lower/Intrinsics/unlink-sub.f90
M flang/test/Lower/Intrinsics/verify.f90
M flang/test/Lower/MIF/coarray_alloc_many_declare.f90
M flang/test/Lower/MIF/coarray_allocation.f90
M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/MIF/sync_all.f90
M flang/test/Lower/MIF/sync_images.f90
M flang/test/Lower/MIF/sync_memory.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
M flang/test/Lower/OpenACC/acc-atomic-update-hlfir.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-cache.f90
M flang/test/Lower/OpenACC/acc-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-common.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping-selector.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned.f90
M flang/test/Lower/OpenACC/acc-declare-interface-body.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
M flang/test/Lower/OpenACC/acc-no-create-array-section.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction-remapping.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-set.f90
M flang/test/Lower/OpenACC/acc-use-device-remapping.f90
M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/allocatable-map.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/associate.f90
M flang/test/Lower/OpenMP/atomic-implicit-cast.f90
M flang/test/Lower/OpenMP/atomic-privatize.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/atomic-update-reassoc-fp.f90
M flang/test/Lower/OpenMP/atomic-update.f90
M flang/test/Lower/OpenMP/atomic-write.f90
M flang/test/Lower/OpenMP/attach-and-ref-modifier.f90
M flang/test/Lower/OpenMP/block-use-predetermined-privatization.f90
M flang/test/Lower/OpenMP/block_implicit_privatization.f90
M flang/test/Lower/OpenMP/block_predetermined_privatization.f90
M flang/test/Lower/OpenMP/cancel.f90
M flang/test/Lower/OpenMP/cancellationpoint.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
M flang/test/Lower/OpenMP/common-block-map.f90
M flang/test/Lower/OpenMP/compiler-directives-loop.f90
M flang/test/Lower/OpenMP/composite_simd_linear.f90
M flang/test/Lower/OpenMP/copyin-order.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/copyprivate-equivalence.f90
M flang/test/Lower/OpenMP/copyprivate.f90
M flang/test/Lower/OpenMP/copyprivate2.f90
M flang/test/Lower/OpenMP/copyprivate5.f90
M flang/test/Lower/OpenMP/copyprivate6.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/declare-mapper.f90
M flang/test/Lower/OpenMP/declare-reduction-allocatable-orig-init.f90
M flang/test/Lower/OpenMP/declare-reduction-allocatable-real.f90
M flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/delayed-privatization-cuda-device-array.cuf
M flang/test/Lower/OpenMP/delayed-privatization-private.f90
M flang/test/Lower/OpenMP/depend-complex.f90
M flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/depend-substring.f90
M flang/test/Lower/OpenMP/derived-type-allocatable-map.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/different_vars_lastprivate_barrier.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/dynamic-len-char-bounds-gen.f90
M flang/test/Lower/OpenMP/firstprivate-commonblock.f90
M flang/test/Lower/OpenMP/flush.f90
M flang/test/Lower/OpenMP/fuse01.f90
M flang/test/Lower/OpenMP/fuse02.f90
M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
M flang/test/Lower/OpenMP/groupprivate-modfile.f90
M flang/test/Lower/OpenMP/groupprivate.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/indirect-reference-privatization.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-sections-firstprivate.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/local-intrinsic-sized-array-map.f90
M flang/test/Lower/OpenMP/loop-directive.f90
M flang/test/Lower/OpenMP/loop-pointer-variable.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/metadirective-loop.f90
M flang/test/Lower/OpenMP/mismatched-bound-types.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/omp-declare-target-program-var.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
M flang/test/Lower/OpenMP/optional-argument-map.f90
M flang/test/Lower/OpenMP/parallel-firstprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array2.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex-mul.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-character.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/OpenMP/privatization-proc-ptr.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/reduction-array-element.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/reduction-equivalence.f90
M flang/test/Lower/OpenMP/requires-atomic-default-mem-order.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/scope.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/sections-reduction.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/simd-linear.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/simd_x86_64.f90
M flang/test/Lower/OpenMP/single.f90
M flang/test/Lower/OpenMP/statement-function.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target-inreduction-unused.f90
M flang/test/Lower/OpenMP/target-inreduction.f90
M flang/test/Lower/OpenMP/target-scope.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task-affinity.f90
M flang/test/Lower/OpenMP/task-depend-array-section.f90
M flang/test/Lower/OpenMP/task-inreduction.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/task2.f90
M flang/test/Lower/OpenMP/taskgroup-task-array-reduction.f90
M flang/test/Lower/OpenMP/taskgroup-task_reduction01.f90
M flang/test/Lower/OpenMP/taskgroup-task_reduction02.f90
M flang/test/Lower/OpenMP/taskgroup02.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M flang/test/Lower/OpenMP/threadprivate-char-array-chararray.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-pointer.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
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M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
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M flang/test/Lower/OpenMP/threadprivate-host-association.f90
M flang/test/Lower/OpenMP/threadprivate-integer-different-kinds.f90
M flang/test/Lower/OpenMP/threadprivate-non-global.f90
M flang/test/Lower/OpenMP/threadprivate-pointer-allocatable.f90
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M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-use-association.f90
M flang/test/Lower/OpenMP/tile01.f90
M flang/test/Lower/OpenMP/tile02.f90
M flang/test/Lower/OpenMP/unroll-heuristic01.f90
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
M flang/test/Lower/OpenMP/unroll-heuristic03.f90
M flang/test/Lower/OpenMP/unroll-partial01.f90
M flang/test/Lower/OpenMP/unstructured.f90
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M flang/test/Lower/OpenMP/usm-descriptor-close-map.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-linear.f90
M flang/test/Lower/OpenMP/wsloop-nonmonotonic.f90
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M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
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M flang/test/Lower/character-local-variables.f90
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M flang/test/Lower/charconvert.f90
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M flang/test/Lower/dense-attributed-array.f90
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M flang/test/Lower/dispatch.f90
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M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/extrn_subp.f90
M flang/test/Lower/finit-local-exclusions.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-array.f90
M flang/test/Lower/forall/forall-construct-2.f90
M flang/test/Lower/forall/forall-construct-3.f90
M flang/test/Lower/forall/scalar-substring.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/host_module_variable_instantiation.f90
M flang/test/Lower/host_module_variable_instantiation_use_device.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/if-loc.f90
M flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/io-asynchronous.f90
M flang/test/Lower/io-char-array.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-item-list.f90
M flang/test/Lower/io-statement-clean-ups.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/memory-alloc.f90
M flang/test/Lower/namelist.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pause-statement.f90
M flang/test/Lower/percent-val-actual-argument.f90
M flang/test/Lower/percent-val-value-argument.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-disassociate.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/proc_pointer_hidden_by_generic.f90
M flang/test/Lower/rank-clause02.f90
M flang/test/Lower/reallocate-lhs.f90
M flang/test/Lower/repack-arrays.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/select-type-2.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Lower/submodule-async-volatile.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/transformational-intrinsics.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/user-defined-operators.f90
M flang/test/Lower/variable-common-viewed-as-module-var.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Lower/volatile-allocatable.f90
M flang/test/Lower/volatile-allocatable1.f90
M flang/test/Lower/volatile-derived-type-pointer.f90
M flang/test/Lower/volatile-derived-type.f90
M flang/test/Lower/volatile-openmp.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-openmp2.f03
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Lower/where-allocatable-assignments.f90
M flang/test/Lower/where.f90
M flang/test/Lower/zero-size.f90
M flang/test/Semantics/CUDA/cuda-managed-implicit-modfile.cuf
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/allocatable.f90
M flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/implicit_mapper.f90
M flang/test/Transforms/DoConcurrent/local_device.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/nested_derived_type_device.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/reduce_add.mlir
M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
M flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/DoConcurrent/reduce_local.mlir
M flang/test/Transforms/DoConcurrent/runtime_sized_array.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
M flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
M flang/test/Transforms/FIRToMemRef/alloca.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-op.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-slice-shift.mlir
M flang/test/Transforms/FIRToMemRef/complex.mlir
M flang/test/Transforms/FIRToMemRef/convert-opt.mlir
M flang/test/Transforms/FIRToMemRef/derived-types.mlir
M flang/test/Transforms/FIRToMemRef/index-overflow-flags.mlir
M flang/test/Transforms/FIRToMemRef/index.mlir
M flang/test/Transforms/FIRToMemRef/load-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-dynamic.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/load-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/logical.mlir
M flang/test/Transforms/FIRToMemRef/omp-wsloop-simd-private.mlir
M flang/test/Transforms/FIRToMemRef/reject-conversions.mlir
M flang/test/Transforms/FIRToMemRef/replace.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/FIRToMemRef/store-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/store-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/store-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/tbaa-tag.mlir
M flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/FIRToMemRef/view-op-wraps-array-coor.mlir
M flang/test/Transforms/FIRToMemRef/volatile-codegen.mlir
M flang/test/Transforms/FIRToMemRef/volatile.mlir
M flang/test/Transforms/OpenACC/acc-implicit-copy-reduction.fir
M flang/test/Transforms/OpenACC/acc-implicit-data-device-data.fir
M flang/test/Transforms/OpenACC/acc-implicit-data.fir
M flang/test/Transforms/OpenACC/acc-optimize-firstprivate-map.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-kernel-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/test/Transforms/OpenACC/offload-target-verifier.fir
M flang/test/Transforms/OpenMP/lower-workdistribute-runtime-assign-scalar.mlir
M flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
M flang/test/Transforms/constant-argument-globalisation.fir
M flang/test/Transforms/debug-107988.fir
M flang/test/Transforms/debug-92391.fir
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/debug-assumed-rank-array.fir
M flang/test/Transforms/debug-assumed-shape-array-2.fir
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-char-type-2.fir
M flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/debug-cuf-device-variable.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
M flang/test/Transforms/debug-dummy-argument.fir
M flang/test/Transforms/debug-fake-use-multiple-dimensions.fir
M flang/test/Transforms/debug-fake-use-multiple-returns.fir
M flang/test/Transforms/debug-fake-use.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-include-file.fir
M flang/test/Transforms/debug-local-constant.fir
M flang/test/Transforms/debug-local-global-storage-1.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-3.fir
M flang/test/Transforms/debug-omp-target-internal-proc.fir
M flang/test/Transforms/debug-omp-target-op-1.fir
M flang/test/Transforms/debug-omp-target-op-2.fir
M flang/test/Transforms/debug-proc-ptr.fir
M flang/test/Transforms/debug-use-stmt.fir
M flang/test/Transforms/debug-variable-array-dim.fir
M flang/test/Transforms/debug-variable-char-len.fir
M flang/test/Transforms/do-concurrent-localizer-boxchar.fir
M flang/test/Transforms/do-concurrent-localizer-dealloc-region.fir
M flang/test/Transforms/do-concurrent-localizer-init-region.fir
M flang/test/Transforms/do_concurrent-to-do_loop-unodered.fir
M flang/test/Transforms/function-attrs.fir
M flang/test/Transforms/licm-acc-compute-region.fir
M flang/test/Transforms/licm-allocmem-cufaloc.mlir
M flang/test/Transforms/licm-nested-hoist-aggressive.fir
M flang/test/Transforms/licm-non-addressable-resource.mlir
M flang/test/Transforms/licm.fir
M flang/test/Transforms/loop-versioning-with-repack-arrays.fir
M flang/test/Transforms/loop-versioning.fir
M flang/test/Transforms/lower-repack-arrays-openacc.fir
M flang/test/Transforms/lower-repack-arrays-openmp.fir
M flang/test/Transforms/lower-repack-arrays.fir
M flang/test/Transforms/omp-automap-to-target-data.fir
M flang/test/Transforms/omp-map-info-finalization-member-record.fir
M flang/test/Transforms/omp-map-info-finalization-name-loc.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M flang/test/Transforms/omp-reduction-cfg-conversion.fir
M flang/test/Transforms/optimize-array-repacking.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
M flang/test/Transforms/stack-arrays.fir
M flang/test/Transforms/tbaa-cray-pointer.fir
M flang/test/Transforms/tbaa-derived-type-records.fir
M flang/test/Transforms/tbaa-derived-with-descriptor.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-local-alloc-threshold.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-type-converter-boxproc.fir
M flang/test/Transforms/tbaa-value-dummy-arg.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
Log Message:
-----------
Make Flang dialect assembly formats strict properties compatible (#226602)
Enable strict properties in FIR, HLFIR, CUF, MIF, and FIRCG. Bind
inherent attributes explicitly in custom formats and update Flang
assembly checks.
Assisted-by: Codex
Commit: 7232ec8b92e50c4a1ac6a268a7ce8384941104ec
https://github.com/llvm/llvm-project/commit/7232ec8b92e50c4a1ac6a268a7ce8384941104ec
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
Log Message:
-----------
[NFC][sanitizer] Link LLVMOption and allow strtof in internal symbolizer (#228490)
Commit f6c78b8262f4 (#228321) moved MC command-line options into
`MCCLOptions.cpp` and added an `LLVMOption` dependency to `LLVMMC`.
Because
`MCAsmInfo.cpp` references `MCCLOptions::Global`, `MCCLOptions.cpp` and
its
generated option parser (which also calls `strtof` via `llvm::to_float`)
are
pulled into the internal symbolizer link.
Add `LLVMOption` to `build_symbolizer.sh` and `strtof U` to
`global_symbols.txt` so internal symbolizer builds and symbol
verification
succeed.
Fixes: https://lab.llvm.org/buildbot/#/builders/66/builds/38119
Assisted-by: Gemini
Commit: 2d91fec6daa9f64add1dcef41454b5066a208731
https://github.com/llvm/llvm-project/commit/2d91fec6daa9f64add1dcef41454b5066a208731
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/vector-trunc.ll
Log Message:
-----------
[X86] combineConcatVectorOps - ensure all suboperand concatenation types are simple (#228522)
Fixes #228264
Commit: 9919736e294ec0dd8cac981088911884aad9500d
https://github.com/llvm/llvm-project/commit/9919736e294ec0dd8cac981088911884aad9500d
Author: leovance <leovancekang at outlook.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-attrless-parallel-ancestors.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-launch-mapping.mlir
Log Message:
-----------
[mlir][OpenACC] Diagnose unmapped parallel loops in GPU lowering (#225641)
ACCCGToGPU requires parallel dimensions to be assigned before lowering.
Diagnose scf.parallel operations without acc.par_dims inside
acc.compute_region before rewriting.
Keep barrier ancestor lookups within the current compute region so
enclosing host loops are not treated as GPU execution scopes.
Add diagnostic coverage for unmapped parallel loops in func.func and
gpu.func, including nested regions, and verify that surrounding host
loops remain valid. Give the launch-argument remapping test explicit
sequential dimensions.
Commit: 263476d17dbda3bd90ff0343bc580a563b795c15
https://github.com/llvm/llvm-project/commit/263476d17dbda3bd90ff0343bc580a563b795c15
Author: Naaz30 <75685808+Naaz30 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/test/Dialect/OpenACC/invalid.mlir
Log Message:
-----------
[mlir][acc] Fixes Issue HostDataOp verifier crash on block-argument data operands (#228226)
Used dyn_cast_if_present in HostDataOp::verify so data operands with no
defining op (block arguments) emit "expect data entry operation as
defining op" instead of asserting in dyn_cast.
Fixes #226641
Commit: de45316ea7154cd9c0cbb956bb95193ac5bfa1ff
https://github.com/llvm/llvm-project/commit/de45316ea7154cd9c0cbb956bb95193ac5bfa1ff
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
Log Message:
-----------
[CIR][NFC] Fix missing enum elements warning (#228525)
Fix missing enum Reflection and MetaInfo elements warnings after #190356
Commit: 8c2682d5f851d56cdd6d58b87c157908c84d4e02
https://github.com/llvm/llvm-project/commit/8c2682d5f851d56cdd6d58b87c157908c84d4e02
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/first-order-recurrence-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/fixed-wide-lane-mask.ll
M llvm/test/Transforms/LoopVectorize/AArch64/masked-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/partial-reduce.ll
M llvm/test/Transforms/LoopVectorize/AArch64/store-costs-sve.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-tail-folding-optsize.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-vfabi.ll
M llvm/test/Transforms/LoopVectorize/AArch64/wide-alm-const.ll
M llvm/test/Transforms/LoopVectorize/AArch64/widen-call-attrs-masked.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-active-lane-mask-all-false.ll
A llvm/test/Transforms/LoopVectorize/VPlan/AArch64/foldable-scalable-active-lane-mask.ll
A llvm/test/Transforms/LoopVectorize/VPlan/foldable-active-lane-mask.ll
Log Message:
-----------
[VPlan] Constant-fold ActiveLaneMask intrinsics (#208852)
Fold get.active.lane.mask via the InstSimplifyFolder, in
tryToFoldLiveIns.
Commit: 944da4158b5347817aec787790219f42ab320801
https://github.com/llvm/llvm-project/commit/944da4158b5347817aec787790219f42ab320801
Author: Bruno Cardoso Lopes <bruno.cardoso at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
Log Message:
-----------
[CIR][mlir] Use cached symbol tables for comdat lookups (#227127)
Every function or global with a comdat looked its selector up by name
with a linear scan of the comdat region, making CIR to LLVM lowering
quadratic in the number of comdats. This happened in three places:
- CIR's lowering of functions and globals: use the patterns' shared
SymbolTableCollection.
- The LLVM dialect comdat verifier, run on every function and global in
each verification: check the comdat in verifySymbolUses, which gets a
SymbolTableCollection.
- ModuleTranslation: use its existing SymbolTableCollection.
On the most expensive self-host TUs this cuts lowering from 30-96 s to
8-11 s and total compile time by 18-61%. Output is unchanged.
Commit: 409227b0ddba85cc0c612f17eb7646b6e5297eb4
https://github.com/llvm/llvm-project/commit/409227b0ddba85cc0c612f17eb7646b6e5297eb4
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/lib/Transforms/IPO/Attributor.cpp
Log Message:
-----------
[Attributor] Remove unused functions (NFC) (#226906)
AA::isGPUGenericAddressSpace, AA::isGPUGlobalAddressSpace:
Introduced on April 27, 2026 in commit
97dc0fcbceea0871ab86ecf6d534be42b42bc7d3 without any callers.
AADepGraphNode::getDeps:
Introduced on July 28, 2020 in commit
5ee07dc53fcaaad35d33478e8702e443ac1cb058 without any callers.
IRPosition::getNumArgs, IRPosition::getArg:
Introduced on June 19, 2023 in commit
5186c2f9f83131f87ee3dc308ac5f18c019998c5 without any callers.
IRPosition::isReturnPosition (0-argument overload):
Introduced on April 17, 2020 in commit
8228153f87707e9760a648608806cdba5e58141c without any callers.
Attributor::ArgumentReplacementInfo::getReplacementTypes:
Introduced on October 10, 2019 in commit
751336340dabc58f178a24f7b169f33366316f70 without any callers.
BooleanState::setAssumed:
Introduced on October 20, 2019 in commit
1a74645a70b38b48ff93251f7e7e51b2ab2ab403 without any callers.
AAUndefinedBehavior::isAssumedToCauseUB,
AAUndefinedBehavior::isKnownToCauseUB (0-argument overloads):
Introduced on December 24, 2019 in commit
58f324a468ffc66398199f1a55218e10b718e495 without any callers.
AAIsDead::isLiveInstSet:
The last callers were removed on August 14, 2019 in commit
def9928204e76b33cac8a98d54e995b7a6bb145d.
AAInstanceInfo::isKnownUniqueForAnalysis:
Introduced on March 16, 2022 in commit
af30de7788e121ec626d412abb5bddebd7701aee without any callers.
AAPrivatizablePtr::isKnownPrivatizablePtr:
Introduced on October 30, 2019 in commit
89c2e733e80ee35921ad4aff8058c3ff9d933c54 without any callers.
PotentialValuesState::contains:
Introduced on June 21, 2022 in commit
bf789b1957efd2482e1dbd164d91a6612a450fe3 without any callers.
PotentialValuesState::intersectWith:
Introduced on August 7, 2020 in commit
c575ba28de2f24cb2fd602780029bdaa8e0ce4a5 without any callers.
AAPointerInfo::Access::setWrittenValueUnknown:
The last caller was removed on December 12, 2022 in commit
6a2305484e8726da026790f803edfe4dd2abf6ae.
AAPointerInfo::Access::getUniqueRange, AAPointerInfo::Access::addRange:
Introduced on December 12, 2022 in commit
6a2305484e8726da026790f803edfe4dd2abf6ae without any callers, leaving
AAPointerInfo::RangeList::insert (1-argument overload) and
AAPointerInfo::RangeList::getUnique without any callers.
AAPointerInfo::Access::hasUniqueRange:
The last caller was removed on January 22, 2023 in commit
538cd2e8833eccc47179add268609b5adc558465, leaving
AAPointerInfo::RangeList::isUnique without any callers.
Assisted-by: Antigravity
Commit: 6eeeb77e4f4e59b9e5b893538ac2d001eb082e24
https://github.com/llvm/llvm-project/commit/6eeeb77e4f4e59b9e5b893538ac2d001eb082e24
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisInt in SDNodeInfo::verifyNode. (#228511)
Assisted-by: Claude
Commit: da86223397858d30fc4207d89d700407f20449cd
https://github.com/llvm/llvm-project/commit/da86223397858d30fc4207d89d700407f20449cd
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
Log Message:
-----------
[NFC][SLP] Make choice of dyn_cast_or_null vs dyn_cast_or_present consistent (#228180)
Are functionally idenitical (dyn_cast_or_null is wrapper around
dyn_cast_if_present). Should be consistent within SLPVectorizer which
one we choose to use.
Commit: 1e97af82ecfe40614b317a0bebcbe431807f67ca
https://github.com/llvm/llvm-project/commit/1e97af82ecfe40614b317a0bebcbe431807f67ca
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/test/tools/llvm-cas/lit.local.cfg
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Support boot time on Windows and tolerate a moving boot time (#227433)
Compute the boot time on Windows from the current time and
GetTickCount64(), so that validate-if-needed can skip validation once
the data has been validated since boot.
A boot time computed from the current time moves when the clock is
adjusted, so a later computation during the same boot can be earlier
than the recorded one, which the exact comparison treated as a reboot.
Treat a recorded boot time that is not earlier than the current one
as the same boot instead, since a reboot always makes the boot time
later.
Commit: 4d7ad2874b98509e83c692665fd9803054f8a909
https://github.com/llvm/llvm-project/commit/4d7ad2874b98509e83c692665fd9803054f8a909
Author: Christopher Ferris <cferris1000 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M compiler-rt/lib/scudo/standalone/memtag.h
Log Message:
-----------
[scudo] Disable tagging when running with asan. (#227516)
The fuzzer defaults to running with asan, and adding tags to pointers
confuses asan and causes crashes. Therefore, disable memory tagging when
asan is detected.
Commit: 1f5252fbab55d88d88e912eebb46c6831ddb787f
https://github.com/llvm/llvm-project/commit/1f5252fbab55d88d88e912eebb46c6831ddb787f
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/modref-call-null.fir
M flang/test/Lower/OpenMP/optional-argument-map-4.f90
Log Message:
-----------
[flang] Update leftover tests after merging #226602 (#228540)
#226602 Change the assembly format for the flang dialects. These tests
were likely newer than the last rebase of the PR and need some updates.
Commit: 08d73ebd6b67609886b86853c17327acf9c5f161
https://github.com/llvm/llvm-project/commit/08d73ebd6b67609886b86853c17327acf9c5f161
Author: Mikołaj Piróg <mikolaj.maciej.pirog at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
Log Message:
-----------
[X86][NewPM] Add UnpackMachineBundlePass to x86 newPM pipeline (#228468)
The pass was not added to x86 newPM pipeline when the pass was ported
here: https://github.com/llvm/llvm-project/pull/184918
Commit: 1d07d16b78398848041e650d919d634c782e8309
https://github.com/llvm/llvm-project/commit/1d07d16b78398848041e650d919d634c782e8309
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Module.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/test/Transforms/SandboxVectorizer/Passes/BundleVec/AMDGPU/unsupported_alignment.ll
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
M llvm/unittests/Transforms/Vectorize/SandboxVectorizer/LegalityTest.cpp
Log Message:
-----------
[SandboxVec][Legality] Implement unsupported alignment check (#224081)
This patch implements the legality check for unsupported alignment by
the target.
Commit: 38e6c0073c423c3945a92d8bb4bf43db029b9d56
https://github.com/llvm/llvm-project/commit/38e6c0073c423c3945a92d8bb4bf43db029b9d56
Author: Yannick Daveluy <yannick.daveluy at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
A llvm/test/CodeGen/WebAssembly/tailcall-byval-musttail.ll
M llvm/test/CodeGen/WebAssembly/tailcall.ll
Log Message:
-----------
[WebAssembly] Do not tail call with byval arguments (#227491)
Resolve issue #66216 by preventing byval arguments from tail call.
`LowerCall` copies each byval argument into the caller's stack frame,
but when the call is lowered as a `return_call`, that frame is released
before the callee reads the copy. The existing check only rejected
arguments that are allocas in the IR. So byval arguments coming from a
global, or forwarded from the caller's own byval parameter, were
miscompiled. C++ non-virtual thunks forward parameters that way: on
wasm32 this hits any multiple-inheritance override taking `std::span` or
`std::string_view` by value.
Such calls are now lowered as regular calls, and a `musttail` call with
a byval argument reports an error instead of being miscompiled.
Fixes #66216.
Assisted-by: Claude Code
Commit: 672756a6f9ea9f4a25ce9a41aa35f10a6bd6149c
https://github.com/llvm/llvm-project/commit/672756a6f9ea9f4a25ce9a41aa35f10a6bd6149c
Author: nudt_yixiao <1272950933 at qq.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/AST/Decl.h
M clang/test/Sema/redefine_extname.c
M clang/test/Sema/redefine_extname.cpp
Log Message:
-----------
[Clang] Fix stale linkage cache when merging redeclarations (#222523)
A linkage query before a declaration is connected to a preceding static
declaration may leave stale cached linkage and trigger an assertion.
Invalidate cached linkage in Redeclarable::setPreviousDecl() so it is
recomputed from the complete redeclaration chain.
Assisted-by: GPT-5.6
This PR description was drafted with the assistance of AI. I personally
debugged, reviewed, and verified the code, and I fully understand the
changes.
Fixes https://github.com/llvm/llvm-project/issues/204759 and
https://github.com/llvm/llvm-project/issues/204754
Commit: 9e6cebb6b7e96c91225bf535c7c0e9313c49f313
https://github.com/llvm/llvm-project/commit/9e6cebb6b7e96c91225bf535c7c0e9313c49f313
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Conversion/OpenACCToLLVM/ACCAtomicPatterns.cpp
M mlir/test/Conversion/OpenACCToLLVM/atomic.mlir
Log Message:
-----------
[mlir][acc] Lower i1 and/or/xor atomic updates on the containing byte (#228551)
Example:
```mlir
acc.atomic.update %x : memref<i1> {
^bb0(%arg: i1):
%0 = arith.ori %arg, %val : i1
acc.yield %0 : i1
}
```
This lowered to an `atomicrmw` on `i1`, which LLVM rejects: atomics operate on
whole bytes or wider. Such updates come from combining a logical reduction such
as `any` or `all` across blocks.
Fix: an i1 occupies a byte, and and/or/xor keep a 0/1 byte 0/1, so zero-extend
the operand to i8 and apply the atomicrmw to the byte. Other operations on i1
are unchanged.
Commit: f7c5dafcb58b60e2fa9305be967c3960144412fd
https://github.com/llvm/llvm-project/commit/f7c5dafcb58b60e2fa9305be967c3960144412fd
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Log Message:
-----------
[CIR][OpenACC] Correct enter-data wait merging behavior for all but d… (#228499)
…evnum.
We should be able to merge 'wait'. On the bug report, we determined that
'empty wait' should effectively override everything, so this patch
implements this. Also, waits without a devnum are the same as just the
same lists being merged.
The dialect still needs to figure out how to represent multiple
dev-nums, so this is left as an assert, and clang just won't be able to
get this to work yet.
Fixes: #227981
Commit: c2ced4b23408a3fa5ea4d8d97d57aac639036abe
https://github.com/llvm/llvm-project/commit/c2ced4b23408a3fa5ea4d8d97d57aac639036abe
Author: pzhengqc <55604844+pzhengqc at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
A llvm/test/CodeGen/AArch64/sext-asr.ll
Log Message:
-----------
[AArch64] Avoid folding sext into ALU when it can be folded with an asr (#228244)
With
```
%shr = ashr i32 %b, 2
%ext = sext i32 %shr to i64
%add = add nsw i64 %a, %ext
```
LLVM currently folds the sext into the add, and generates
```
asr w8, w1, #2
add x0, x0, w8, sxtw
```
This patch tries to avoid folding the sext into the add if it can be
folded with
an asr to form an SBFX. With this patch, LLVM generates the following
instead
which is more efficient on many Arm CPUs because an extending add is a
more
expensive operation.
```
sbfx x8, x1, #2, #30
add x0, x0, x8
```
This also fixes #224696 by avoiding folding the sext into add, thus
allowing the
machine combiner to fold the mul and add into an madd.
Commit: 074d9dcac6b6632b1930995f5cdf3d41bd51e263
https://github.com/llvm/llvm-project/commit/074d9dcac6b6632b1930995f5cdf3d41bd51e263
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/test/CIR/CodeGen/wide-string.cpp
Log Message:
-----------
[CIR] Fix handling of wide-string values >2^31. (#228101)
This showed up in Bruno's bug report, but is a pretty easy one. We were
using the wrong overload of IntAttr::get and ended up having the value
converted to a 64 bit, and it is obviously too big to fit back into the
32 bit value. This patch uses the APInt overload to make sure we keep
the size correct.
Commit: 48d9475bca12953450cf296516795e5b382a7352
https://github.com/llvm/llvm-project/commit/48d9475bca12953450cf296516795e5b382a7352
Author: Matsu <47756807+khaki3 at users.noreply.github.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
A mlir/test/Dialect/OpenACC/acc-cg-to-gpu-gang-reduction-store.mlir
Log Message:
-----------
[mlir][acc] Combine gang reduction stores across blocks safely (#228505)
Example:
```mlir
%bx = acc.par_width par_dim(#acc.par_dim<block_x>)
acc.compute_region launch(%kbx = %bx) ins(%a_res = %arg_res) : (memref<i32>) {
scf.parallel (%iv) = (%c0) to (%kbx) step (%c1) {
...
acc.reduction_accumulate %red to %acc <add> par_dims(#acc<par_dims[block_x]>) : i32 -> memref<i32>
scf.reduce
} {acc.par_dims = #acc<par_dims[block_x]>}
%r = memref.load %acc[] : memref<i32>
acc.predicate_region {
memref.store %r, %a_res[] : memref<i32>
}
acc.yield
}
```
A store of a block-level reduction result is turned into a cross-block atomic
only when its region is predicated. A launch with no thread dims has nothing to
predicate, so every block stored its own partial result and the last one won.
Where the atomic was emitted, the destination was set to the reduction identity
by block 0 inside the kernel, which is not ordered against the other blocks'
atomics.
Fix: when the launch has no thread dims, use an always-true predicate so the
existing conversion applies. Store the identity from a single-thread launch
ahead of the kernel when its address does not depend on the launch; otherwise
keep the in-kernel store.
Commit: 44c19cc341bda8243bff7c8a2657e161931cda7c
https://github.com/llvm/llvm-project/commit/44c19cc341bda8243bff7c8a2657e161931cda7c
Author: RolandF77 <froese at ca.ibm.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
A llvm/test/Transforms/LoopVectorize/PowerPC/cost-redadd.ll
A llvm/test/Transforms/LoopVectorize/PowerPC/redadd.ll
Log Message:
-----------
[PowerPC] Correct handling of add only partial reductions in cost model (#224109)
Fix add only partial reductions in PowerPC vector cost model.
Commit: d2ab08198f7943c8243e75e6cfde8585a01591ec
https://github.com/llvm/llvm-project/commit/d2ab08198f7943c8243e75e6cfde8585a01591ec
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
M clang/test/CIR/Transforms/switch-fold.cir
Log Message:
-----------
[CIR][CIRSimplify] Fix non-adjacent switch-case-merging (#228267)
We previously assumed that all switch cases in a switch were adjacent/in
the same scope while merging switch cases. This wasn't true, since a
case can be inside of a scope.
Skip out on merging them not only when they have something between them,
but also when they aren't exactly 'neighbors'.
Note: Claude helped diagnose and write my test case.
Commit: ffe323f10dd0243f2a054a714e8f41460ed384b6
https://github.com/llvm/llvm-project/commit/ffe323f10dd0243f2a054a714e8f41460ed384b6
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
A clang/test/CIR/Transforms/inline-asm-side-effects.cir
Log Message:
-----------
[CIR] Set memory effects of inline-asm-volatile correctly (#228261)
Inline-asm was set to have recursive memory effects, but it has no
blocks, so the result was it never was listed as having memory effects.
This patch sets it to have a read and write effect in the case where it
has side effects.
This showed up in the libcxx test, where we defeated the DoNotOptimze
macro by not properly respecting inline-asm side effects.
Commit: f29fd25726649b00a3b481f00b379f66f924ad63
https://github.com/llvm/llvm-project/commit/f29fd25726649b00a3b481f00b379f66f924ad63
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-global.cir
Log Message:
-----------
[CIR] Get Comdat groups correct for GlobalOp. (#227754)
A previous patch did this for FuncOp as it was causing problems. The
same problems exist for GlobalOp, particularly around template
variables.
This patch changes the 'comdat' value for GlobalOp to be a string, just
like FuncOp.
A custom printer needed to be added, but I was able to make FuncOp use
the same functionality.
ONE change that ended up happening: I removed the 'setComdat(bool)'. My
last patch actually BROKE this (since there was 1 case where it would
take a false!). Since this is pretty error-prone, I added a
'setSelfComdat, which is the common case, where it is set to be a
self-reference.
Commit: 73a1b728c08267ff604acea8cd33fb70845643d2
https://github.com/llvm/llvm-project/commit/73a1b728c08267ff604acea8cd33fb70845643d2
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
Log Message:
-----------
[CIR] Add cast for __builtin_char_memchr (#228471)
The CIR operation has a result type of 'ptr<void>', but the
__builtin_char_memchr function returns 'ptr<char>'. This patch inserts a
bitcast in the handling of this builtin to make sure we get the type
correct.
Note that the createBitCast checks to make sure it isn't a noop first,
so there is no reason to add a conditional here.
Fixes: #228008
Commit: 96e6cbe44bcda4b8c4615c96aa6faa60fd3d2562
https://github.com/llvm/llvm-project/commit/96e6cbe44bcda4b8c4615c96aa6faa60fd3d2562
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/test/CodeGen/X86/2009-06-05-VariableIndexInsert.ll
M llvm/test/CodeGen/X86/AMX/amx-across-func.ll
M llvm/test/CodeGen/X86/AMX/amx-configO2toO0.ll
M llvm/test/CodeGen/X86/AMX/amx-zero-config.ll
M llvm/test/CodeGen/X86/amx-across-func-tilemovrow.ll
M llvm/test/CodeGen/X86/amx_movrs_intrinsics.ll
M llvm/test/CodeGen/X86/andnot-sink-not.ll
M llvm/test/CodeGen/X86/arg-copy-elide.ll
M llvm/test/CodeGen/X86/atomic-fp.ll
M llvm/test/CodeGen/X86/atomic-idempotent-syncscope.ll
M llvm/test/CodeGen/X86/atomic-idempotent.ll
M llvm/test/CodeGen/X86/atomic-xor.ll
M llvm/test/CodeGen/X86/atomic64.ll
M llvm/test/CodeGen/X86/avx2-vbroadcast.ll
M llvm/test/CodeGen/X86/avx512-insert-extract.ll
M llvm/test/CodeGen/X86/avx512-insert-extract_i1.ll
M llvm/test/CodeGen/X86/avx512-intel-ocl.ll
M llvm/test/CodeGen/X86/avx512fp16-cvt.ll
M llvm/test/CodeGen/X86/avx512fp16-mov.ll
M llvm/test/CodeGen/X86/bfloat-calling-conv-no-sse2.ll
M llvm/test/CodeGen/X86/bittest-big-integer.ll
M llvm/test/CodeGen/X86/dagcombine-tokenfactor-limit-crash.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/extractelement-index.ll
M llvm/test/CodeGen/X86/extractelement-load.ll
M llvm/test/CodeGen/X86/fma.ll
M llvm/test/CodeGen/X86/fp128-libcalls-strict.ll
M llvm/test/CodeGen/X86/fp128-libcalls.ll
M llvm/test/CodeGen/X86/gep-expanded-vector.ll
M llvm/test/CodeGen/X86/i128-fp128-abi.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/inline-sse.ll
M llvm/test/CodeGen/X86/insertelement-var-index.ll
M llvm/test/CodeGen/X86/isel-x87.ll
M llvm/test/CodeGen/X86/long-double-abi-align.ll
M llvm/test/CodeGen/X86/matrix-multiply.ll
M llvm/test/CodeGen/X86/memset-sse-stack-realignment.ll
M llvm/test/CodeGen/X86/mingw-alloca.ll
M llvm/test/CodeGen/X86/mmx-arith.ll
M llvm/test/CodeGen/X86/mmx-intrinsics.ll
M llvm/test/CodeGen/X86/musttail-varargs.ll
M llvm/test/CodeGen/X86/nontemporal-loads-2.ll
M llvm/test/CodeGen/X86/nosse-vector.ll
M llvm/test/CodeGen/X86/packus.ll
M llvm/test/CodeGen/X86/pr216504.ll
M llvm/test/CodeGen/X86/pr32284.ll
M llvm/test/CodeGen/X86/pr34080-2.ll
M llvm/test/CodeGen/X86/pr34592.ll
M llvm/test/CodeGen/X86/pr34653.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/pr43866.ll
M llvm/test/CodeGen/X86/pr50782.ll
M llvm/test/CodeGen/X86/sdiv_fix.ll
M llvm/test/CodeGen/X86/sdiv_fix_sat.ll
M llvm/test/CodeGen/X86/shift-i128.ll
M llvm/test/CodeGen/X86/shift-i256.ll
M llvm/test/CodeGen/X86/shuffle-combine-crash-4.ll
M llvm/test/CodeGen/X86/sse-intel-ocl.ll
M llvm/test/CodeGen/X86/sse-intrinsics-fast-isel.ll
M llvm/test/CodeGen/X86/sse-regcall.ll
M llvm/test/CodeGen/X86/sse-regcall4.ll
M llvm/test/CodeGen/X86/stack-clash-small-alloc-medium-align.ll
A llvm/test/CodeGen/X86/stack-realign-local-padding.ll
M llvm/test/CodeGen/X86/statepoint-no-realign-stack.ll
M llvm/test/CodeGen/X86/sttni.ll
M llvm/test/CodeGen/X86/udiv_fix.ll
M llvm/test/CodeGen/X86/udiv_fix_sat.ll
M llvm/test/CodeGen/X86/var-permute-256.ll
M llvm/test/CodeGen/X86/var-permute-512.ll
M llvm/test/CodeGen/X86/vec-strict-128.ll
M llvm/test/CodeGen/X86/vec-strict-fptoint-256.ll
M llvm/test/CodeGen/X86/vec_ins_extract-1.ll
M llvm/test/CodeGen/X86/vec_insert-8.ll
M llvm/test/CodeGen/X86/vector-compress.ll
M llvm/test/CodeGen/X86/vector-extend-inreg.ll
M llvm/test/CodeGen/X86/vector-extract-last-active.ll
M llvm/test/CodeGen/X86/vector-llrint.ll
M llvm/test/CodeGen/X86/vector-lrint.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v16.ll
M llvm/test/CodeGen/X86/vector-shuffle-variable-256.ll
M llvm/test/CodeGen/X86/widen_arith-6.ll
M llvm/test/CodeGen/X86/x86-64-baseptr.ll
M llvm/test/DebugInfo/COFF/fpo-realign-alloca.ll
M llvm/test/DebugInfo/COFF/vframe-csr.ll
Log Message:
-----------
[X86] Don't allocate unused padding in front of realigned locals (#227495)
PEI aligns local objects relative to the incoming stack pointer, leaving
a gap between the CSRs and the first local. With the stack realigned
after the pushes, locals are addressed from the final stack pointer, so
that gap is never used: exclude it from the prologue's allocation.
Fixes #224278
Commit: ad114e57ac91caade1695a134c6f94e420632181
https://github.com/llvm/llvm-project/commit/ad114e57ac91caade1695a134c6f94e420632181
Author: LU-JOHN <John.Lu at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/itofp-odd-width-load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rsq.f16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/preload-implicit-kernargs.ll
Log Message:
-----------
[AMDGPU] Legalize uniform 16-bit loads to match subword load instructions (#225097)
Generate better code for uniform16-bit loads.
First approach, added 16-bit load patterns in tablegen that created
subword load instructions.
Second and preferred approach legalizes uniform 16-bit loads to: `i16 =
trunc (zextload i16->i32)` which allows existing tablegen patterns to
match.
---------
Signed-off-by: John Lu <John.Lu at amd.com>
Commit: 6e16b1419271ba61fabde1cce577aa4d12d62cf4
https://github.com/llvm/llvm-project/commit/6e16b1419271ba61fabde1cce577aa4d12d62cf4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/test/CIR/CodeGen/new.cpp
Log Message:
-----------
[CIR] Correct array-new 'asserts' (#228461)
The assertion checked whether the value was signed (which just checks
the MSB), but didn't check if the expression itself was of signed
type. The result was a size_t expression in the upper half (that is,
MSB set!) would hit the assertion. This patch checks the sign of
the thing too, which still allows us to do the zext later.
Additionally, this test case ALSO overflows, so we make sure we handle
overflow correctly here as well.
Fixes: #227980
Commit: a4762bc259054102bf02b3d6039244bb70b4c427
https://github.com/llvm/llvm-project/commit/a4762bc259054102bf02b3d6039244bb70b4c427
Author: Corentin Kerisit <corentin.kerisit at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[Bazel] Add opt-in libunwind EH frame registration (#226148)
LLVM libunwind expects `__register_frame` to receive one FDE, while
non-Apple Bazel builds pass the whole `.eh_frame` section by default.
This can produce `FDE is really a CIE` when linking against LLVM
libunwind (see #43419).
Add `-- at llvm-project//llvm:use_libunwind_for_eh_frame_registration=true`
to set `HAVE_UNW_ADD_DYNAMIC_FDE` locally on `ExecutionEngine` and
`OrcTargetProcess`. Defaults and runtime linkage stay unchanged.
This follows the existing [`enable_abi_breaking_checks`
setting](https://github.com/llvm/llvm-project/blob/a8705c33dda2bb831ee6d6e0500b2d20bb902d0c/utils/bazel/llvm-project-overlay/llvm/BUILD.bazel#L29-L41).
CMake already probes `__unw_add_dynamic_fde` for the same purpose.
Commit: 1f924cfebe818cd6c8a4528663b8418c917e1bd4
https://github.com/llvm/llvm-project/commit/1f924cfebe818cd6c8a4528663b8418c917e1bd4
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
A clang/test/CIR/CodeGen/const-init-multi-base.cpp
Log Message:
-----------
[CIR] Fix base-class index in const-record when there is a vbase (#228484)
buidlRecordHelper didn't skip the 'virtual' bases like APValue did, so
the presence of a virtual base alone was enough to throw the index off.
This patch gets us slightly more in line with how this is done in
classic codegen.
It is really only reachable in C++26 because of the relaxed constexpr
rules iwth virtual bases, so it needs its own test.
Fixes: #228302
Commit: 4e0a7f20a90e7c9f41fe73ac337f00f93ebbbf12
https://github.com/llvm/llvm-project/commit/4e0a7f20a90e7c9f41fe73ac337f00f93ebbbf12
Author: UebelAndre <github at uebelandre.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[bazel] Select the MASM BLAKE3 assembly for msvc-cl (#228560)
Add an `is_x86_64_windows_msvc` setting and `select` the
`_windows_msvc.asm` variants there; rules_cc's MSVC toolchains assemble
`.asm` with `ml64`. The pattern list loses its fixed `.S` suffix so one
list serves both file kinds.
Commit: 92c253c42b2744a530a3d1d3bfb4f5a798f9cdef
https://github.com/llvm/llvm-project/commit/92c253c42b2744a530a3d1d3bfb4f5a798f9cdef
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M polly/docs/ReleaseNotes.rst
M polly/include/polly/ScheduleTreeTransform.h
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/lib/Transform/ScheduleTreeTransform.cpp
A polly/test/ScheduleOptimizer/isolate-complete-tiles-inner-levels.ll
A polly/test/ScheduleOptimizer/isolate-complete-tiles.ll
Log Message:
-----------
[Polly] Isolate complete tiles from partial tiles in the tiling path (#221087)
Tiling an iteration space whose extent is not a multiple of the tile
size gives every point loop a min() upper bound. The loop vectorizer
cannot pick a fixed vector factor for such a loop without a runtime
check, and it has to emit a scalar epilogue inside the tile loop, so the
loops that carry the whole runtime of a tiled kernel are the ones it
handles worst.
Isolating the complete tiles from the partial ones gives the point loops
of the complete tiles constant bounds. Polly already does this for the
loop it strip-mines in the prevectorization path, added in commit
ca7f5bb ("Full/partial tile separation for vectorization"); this applies
the same technique to the loops produced by the regular tiling.
getPartialTilePrefixes is generalized to all point dimensions at once as
getCompleteTilePrefixes, and the resulting isolate option, combined with
atomic for the remaining part, is attached to the tile band.
The new -polly-isolate-complete-tiles option is off by default: it is a
large win where variable trip counts were what blocked vectorization,
but it also grows the generated code, so the default behaviour is left
unchanged.
On PolyBench/C 4.2.1 with -O3 -march=native -polly
-polly-vectorizer=none on a Ryzen 7 9700X, minimum of 5 to 41 runs
pinned to one core, it changes the code of 23 of the 30 kernels and
improves their geometric mean by 37.6%: 2mm 6.9x, 3mm 6.4x, gemm 6.4x,
covariance 4.2x, syrk 2.6x, jacobi-1d 2.1x, mvt/bicg/atax about 1.5x,
gemver 1.39x, jacobi-2d 1.35x, symm 1.23x, lu 1.17x. Two kernels
regress: gesummv by 19% and deriche by 6 to 12%. Both are already at a
limit the transformation cannot move -- gesummv streams 27 MB at 24 GB/s
against a measured single-core peak of 29.8 GB/s, and deriche is
dominated by loops that carry a dependence and never vectorize -- so for
them the extra code is pure cost.
These numbers are for problem sizes known at compile time, which is what
PolyBench gives Polly once the kernel is inlined into main. With the
sizes passed as parameters instead (-Dstatic= -fno-inline-functions),
the option improves the geometric mean of the 11 kernels whose run time
the tiling changes by 30.5%, and doitgen, which it does not change with
constant sizes, by 5.4x; gesummv regresses by 18%.
The cost is code size and compile time: the .text of the benchmark
binaries is 3.5x larger in geometric mean over the 23 kernels, from
1.11x for doitgen to 5.6x for mvt, and compiling a kernel file takes
1.64x as long, from 1.05x to 2.4x.
Two further options isolate the inner tiling levels in the same way:
-polly-isolate-complete-tiles-2nd-level for -polly-2nd-level-tiling, and
-polly-isolate-complete-register-tiles for -polly-register-tiling, where
it removes the guards from the unrolled point loops, as the matrix
multiplication optimization already does for its micro-kernel (commit
9989088ee99a). A complete first-level tile does not make the inner tiles
complete: they are complete only when the inner tile size divides the
outer one, and not along the diagonal of a triangular or skewed domain.
Both are off by default as well, because whether they pay off depends on
the problem sizes. Relative to the same flags without them, the
geometric mean of the run time is 0.965 for the second level and 0.997
for the register tiles when the sizes are known at compile time, and
1.056 and 0.934 when they are parametric. In the parametric case they
also roughly double the compile time, and they make AST generation
exceed -polly-astgen-computeout on up to 13 kernels, after which Polly
keeps the original code.
Numerical output is unchanged: every kernel produces byte-identical
dumps with and without the options, in all the configurations measured
and with constant as well as parametric sizes, on the MINI and MEDIUM
datasets, as do the eight largest winners on LARGE.
Assisted-by: Claude Opus 5
---------
Co-authored-by: Michael Kruse <llvm-project at meinersbur.de>
Commit: c666ea6d7cae32544d2b857bea0440e3990a2727
https://github.com/llvm/llvm-project/commit/c666ea6d7cae32544d2b857bea0440e3990a2727
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CodeGenUtils/StmtUtils.h
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
A clang/lib/CodeGenUtils/StmtUtils.cpp
M clang/test/CIR/CodeGen/misc-attrs.cpp
A clang/test/CIR/CodeGen/mustprogress.cpp
A clang/test/CIR/CodeGen/uwtable.cpp
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/invalid-func-attr.cir
Log Message:
-----------
[CIR] Implement mustprogress/uwtable attributes (#228093)
These are effectively on-by-default attributes for nearly every function
in the program, and allows LLVM to make better optimization decisions.
'mustprogress' is added any time we have forward progress guaranteeds by
language (C++11 and not finite-loops disabled via command line option).
`uwtable` forwards the 'unwind table' codegen opt to functions that
don't opt out of it (via attribute), and clarifies whether the function
has an entry in the unwind table. In some programs this can be
time-consuming, so they disable them.
Both of these showed up as a defficiency in a test suite, and resulted
in certain programs taking a huge amount of time to properly compile.
This patch adds both as the 'extended attributes' printing location to
functions.
Commit: e429baa2a3489144b967b6c4f0f5cec1ddd199ac
https://github.com/llvm/llvm-project/commit/e429baa2a3489144b967b6c4f0f5cec1ddd199ac
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR][ADT] Avoid isPointerIntoBucketsArray in RemoveFromUseList (NFC) (#228325)
RemoveFromUseList erases the entry from ValueHandles when removing the
sole remaining element in the doubly linked list. Without this patch,
after unlinking the tail element, it checks whether PrevPtr points into
the DenseMap bucket array:
if (Handles.isPointerIntoBucketsArray(PrevPtr)) {
Handles.erase(getValPtr());
This patch instead tags ValueHandleHead::Head with true via
PointerIntPair<ValueHandleBase *, 1, bool>, while leaving
ValueHandleBase::Next untagged. The tag bit allows RemoveFromUseList to
quickly determine whether it is removing the sole element in the list
without calling isPointerIntoBucketsArray.
Below is the breakdown of RemoveFromUseList calls and the perf stat -r10
comparison when compiling SLPVectorizer.ii with clang -O3:
Category Count %
---------------------------------------------------------
Non-tail element (Next != nullptr) 16,592,855 52.7%
Sole remaining element (erased) 8,198,144 26.0%
Tail of multi-element list (not erased) 6,714,742 21.3%
---------------------------------------------------------
Total 31,505,741 100.0%
Metric Base Test Delta
--------------------------------------------------------
instructions:u 194,745,673,762 194,513,892,029 -0.12%
cpu-cycles:u 141,184,939,025 141,042,112,760 -0.10%
time elapsed 54.9115s 54.8629s -0.09%
The instruction count decreases slightly because IsHead is readily
available from *PrevPtr. We do not need to chase
getValPtr()->getContext().pImpl or check bucket bounds when removing
the tail of a multi-element list.
With the final use of isPointerIntoBucketsArray gone, this patch removes
the following unused methods from DenseMapBase:
- isPointerIntoBucketsArray
- getPointerIntoBucketsArray
- getBucketsEnd
Assisted-by: Antigravity
Commit: f011bd8d1a8d9966dbe4770da9a5de5be3b2cfd8
https://github.com/llvm/llvm-project/commit/f011bd8d1a8d9966dbe4770da9a5de5be3b2cfd8
Author: Nick Riasanovsky <njriasan at meta.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
Log Message:
-----------
[NFC] Fix whitespace in NVPTXIntrinsics.td (#228553)
Fixes the whitespace in NVPTXIntrinsics.td as a followup of
https://github.com/llvm/llvm-project/pull/228303
Commit: 66b01663b5842909892e71d6a43a2ab87791e7d1
https://github.com/llvm/llvm-project/commit/66b01663b5842909892e71d6a43a2ab87791e7d1
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CIR/IR/invalid-version.cir
M clang/test/CIR/IR/version.cir
M clang/test/CIR/Lowering/opencl-version-metadata.cir
Log Message:
-----------
[CIR][OpenCL] Emit opencl.spir.version metadata for SPIR targets (#228400)
Match classic CodeGen, which emits it on SPIR but not SPIR-V as SPIR
v2.0 requires
Commit: 839f8621d7256651de4aeae2c65993b87d62c29d
https://github.com/llvm/llvm-project/commit/839f8621d7256651de4aeae2c65993b87d62c29d
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/TargetList.h
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/unittests/Protocol/MCPPluginTest.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/ExecutableModuleTest.cpp
Log Message:
-----------
[lldb] Track the target's executable instead of guessing (#228131)
When no module had type eTypeExecutable, Target::GetExecutableModule
returned the first image. A main executable can be a shared library,
such as an ELF PIE or firmware, and in the common case the fallback
found it. But a target with only libraries got one of them back as its
executable, and when the executable was removed, the next image took its
place.
Have the target remember which module is its executable, and return
nullptr when it has none. A target that only had libraries added to it
now reports no executable. Callers that dereferenced the result without
a check now handle nullptr.
Commit: 77f982cc4c29f7ca20690dd169c849d8a3cd0324
https://github.com/llvm/llvm-project/commit/77f982cc4c29f7ca20690dd169c849d8a3cd0324
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
A clang/test/CIR/IR/max-work-group-size.cir
A clang/test/CIR/Lowering/max-work-group-size.cir
Log Message:
-----------
[CIR][AMDGPU][SPIR-V] Emit max_work_group_size for HIP kernels (#227715)
Mirror SPIRVTargetCodeGenInfo::setTargetAttributes from classic codegen
Commit: 1dafadd18f0f30a52831d59fe13648092d626584
https://github.com/llvm/llvm-project/commit/1dafadd18f0f30a52831d59fe13648092d626584
Author: Thurston Dang <thurston at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Instrumentation/MemorySanitizer/AArch64/fp8-neon-fdot.ll
Log Message:
-----------
[msan] Handle Arm NEON FP8 FDOT2/FDOT4 (#227850)
This reuses the existing handleVectorDotProductIntrinsic().
Note: aarch64_neon_fp8_fdot{2,4}_lane is not handled by this patch,
because their individual numeric lane parameter differs from
handleVectorDotProductIntrinsic()'s odd/even lanes.
Commit: eff9c6b27f248a70c6130197ba4344e050ebcc92
https://github.com/llvm/llvm-project/commit/eff9c6b27f248a70c6130197ba4344e050ebcc92
Author: Kazu Hirata <kazu at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
Revert "[IR] Reduce memory usage in metadata use tracking (NFC) (#221866)" (#228561)
This reverts commit 4f5877ff5b6e947123142f7e17ffd04850fd416a.
We've encountered non-determinism with this patch. See #228299 for
details.
Commit: f616c059510b54a56fa5cc88f75f83c1a88c6c85
https://github.com/llvm/llvm-project/commit/f616c059510b54a56fa5cc88f75f83c1a88c6c85
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
Log Message:
-----------
[CIR] Correct const lowering with potentially-overlapping-types. (#228506)
The below bug report found a case where our base lowering and our
const-record lowering got out of sync with no unique address, so this
patch makes sure we get it right.
Fixes: #228300
Commit: 4182cbcc42acead3d993a3be53c2569360637e3d
https://github.com/llvm/llvm-project/commit/4182cbcc42acead3d993a3be53c2569360637e3d
Author: Oscar Smith <oscardssmith at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/masked-gather-stale-capture.ll
Log Message:
-----------
[SLP][NFC] Precommit test for stale BatchAA after vectorizing a tree (#227928)
The current output sinks the store to %p8 below the masked gather that
loads from %p8, which is a miscompile.
Coauthored by Opus 5.5
Co-authored-by: Claude Opus 5.5 <noreply at anthropic.com>
Commit: 7bbbca018d8eb128cfc7cbe049b5acdec1472d09
https://github.com/llvm/llvm-project/commit/7bbbca018d8eb128cfc7cbe049b5acdec1472d09
Author: lexi-nadia <lexinadia at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[lldb][bazel] Remove stale Bazel deps (#228580)
- Core's dependency on PluginCPlusPlusLanguageHeaders and
PluginObjCLanguageHeaders was removed in
897cc3ee429a62e1dfd77a602db96e9884671f93.
- Expression's dependency on PluginSymbolFileDWARFHeaders was removed in
59c5d531991ca6d3cdd7072a13331dd5b0a5b321.
- Interpreter's dependency on API was removed in
ed3d4a78ba8b23ab5d3fb629029695a03818d254.
These edges made LLDB core libraries transitively depend on plugins
(and, through :API, on every default plugin). The build passes with
layering_check after removing them.
Commit: bbbbdc1fe3de8ed1d6094daca0e91d83f95b5d30
https://github.com/llvm/llvm-project/commit/bbbbdc1fe3de8ed1d6094daca0e91d83f95b5d30
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/test/tools/clang_tidy_checks/hide_from_abi.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
Log Message:
-----------
[libcxx] Ensure CLANG_VERSION_MAJOR is defined in clang-tidy checks (#228127)
Otherwise the ifdefs around CLANG_VERSION_MAJOR for whether or not we
should be including ClangTidyModule.h or ClangTidyModuleRegistry.h are
all wrong given CLANG_VERSION_MAJOR is undefined.
This is needed for bumping the CI container.
Commit: 09a061222344326184524d731a076eb6067ae433
https://github.com/llvm/llvm-project/commit/09a061222344326184524d731a076eb6067ae433
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M libcxx/utils/ci/docker/docker-compose.yml
Log Message:
-----------
[libcxx] Bump clang in CI container to v24 (#227930)
This is what we already install from CE, we just weren't properly
attributing it. This meant that clang-23 in the container was actually a
symlink to clang-24.
Commit: a20cff91b5a8e6db2207fdaede17b82d16ce1c42
https://github.com/llvm/llvm-project/commit/a20cff91b5a8e6db2207fdaede17b82d16ce1c42
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/ObjCopy/ELF/ELFObject.cpp
M llvm/lib/ObjCopy/ELF/ELFObject.h
R llvm/test/tools/llvm-objcopy/ELF/reloc-alloc-symtab.test
M llvm/test/tools/llvm-objcopy/ELF/reloc-no-symtab.test
Log Message:
-----------
Revert "[llvm-objcopy] Handle SHF_ALLOC relocation sections in relocatable files" (#228572)
Reverts llvm/llvm-project#227204
Invalid cast triggers Ubsan report
https://lab.llvm.org/buildbot/#/builders/169/builds/27128
Commit: 65d6d9c8a189c3e6623fe974df5fe623bdde9f7a
https://github.com/llvm/llvm-project/commit/65d6d9c8a189c3e6623fe974df5fe623bdde9f7a
Author: Alex Langford <alangford at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/cmake/modules/LLDBStandalone.cmake
Log Message:
-----------
[lldb] Add extra logic to find llvm-nm in standalone builds (#227487)
If one builds LLDB standalone against an LLVM that builds but does not
export an llvm-nm target, then LLDB will fail to build when also using
dynamic script interpreters.
To account for this, we use the same logic for finding llvm-tblgen. I
intentionally did not deduplicate the logic because they are run in
slightly different scenarios. I plan on joining these together with a
macro once another tool is needed.
Commit: 143eb3cae4f0bcf8c0aea6cbaf04a9edf89fcfd7
https://github.com/llvm/llvm-project/commit/143eb3cae4f0bcf8c0aea6cbaf04a9edf89fcfd7
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/docs/resources/formatterbytecode.md
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add dictionary data type to formatter bytecode (#225955)
Add a dictionary data type to formatter bytecode.
This addition will help in two ways:
1. A subsequent change will use dictionaries to model "self" ("this")
2. Many formatters internal use a dictionary as an implementation
detail, and this will allow such formatters to be compiled/ported to
formatter bytecode
Assisted-by: claude
Commit: 6fb8776580a4a21a676cd7a424346c09aed81216
https://github.com/llvm/llvm-project/commit/6fb8776580a4a21a676cd7a424346c09aed81216
Author: Stanislav Mekhanoshin <Stanislav.Mekhanoshin at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/MC/AMDGPU/gfx1250-strict_err.s
Log Message:
-----------
[AMDGPU] Disable V_WMMA_F{16|32}_16X16X128_[BF]P8_[BF]P8 on gfx1250-strict (#228564)
Fixes: LCOMPILER-2899
Commit: 0767d2351b27b5774ef205ea8143445231476026
https://github.com/llvm/llvm-project/commit/0767d2351b27b5774ef205ea8143445231476026
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
Log Message:
-----------
[lldb] Emit TypeOption flags correctly as ULEB (#227399)
A formatter's flags are loaded as ULEB:
```cpp
uint64_t flags = extractor.getULEB128(cursor);
```
This change updates formatter_bytecode.py to emit the flags as ULEB as
well.
Assisted-by: claude
Commit: 4f28393db7302dc6c5952fd154fc9e7037330f7c
https://github.com/llvm/llvm-project/commit/4f28393db7302dc6c5952fd154fc9e7037330f7c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
Log Message:
-----------
[BFI] Remove AllowSynthetic parameter (#227469)
Support for synthetic profile information was mostly removed a while
ago. This parameter does nothing and was apparently left over, so remove
it.
Commit: bb92074ca096f1ac80aa3555491c99333814faa8
https://github.com/llvm/llvm-project/commit/bb92074ca096f1ac80aa3555491c99333814faa8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
Log Message:
-----------
[SelectionDAG] Implement SDTCisEltOfVec in verifyNode. (#228519)
Assisted-by: Claude
Commit: 844897d9e4c45006c5bb66f170a0a24932099bc3
https://github.com/llvm/llvm-project/commit/844897d9e4c45006c5bb66f170a0a24932099bc3
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Analysis/CycleAnalysis.h
Log Message:
-----------
[CycleAnalysis] Add missing export to symbol used in test (#228316)
Commit: 1b13257b5fc2d7b44d9ef6c2b55bd854250a2d29
https://github.com/llvm/llvm-project/commit/1b13257b5fc2d7b44d9ef6c2b55bd854250a2d29
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/InstCombine/known-bits-bitcast-from-fp.ll
Log Message:
-----------
[KnownFPClass] Improve KnownFPClass::toKnownBits deductions for IEEE types (#223204)
Commit: 4ff941cbe521533c9480115dec21d7f0540cb6bb
https://github.com/llvm/llvm-project/commit/4ff941cbe521533c9480115dec21d7f0540cb6bb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
A clang/test/CIR/CodeGen/array-subscript-order.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/bitint-record-layout.c
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/union.c
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
Log Message:
-----------
[CIR] Correct array-subscript-ordering (#227899)
We had the comment about the ordering, but didn't get it right! C++17
requires we go left-to-right ordering, rather than it being UB, so
classic-codegen was changed at one point to do this all the time.
However, we only got a partial implementation of this, which results in
side-effects being noticable. This showed up in a test suite.
This patch does its best to just copy from classic-codegen.
Commit: 439c28996aae50467c2c1e18e10b901e33ddf279
https://github.com/llvm/llvm-project/commit/439c28996aae50467c2c1e18e10b901e33ddf279
Author: Denis <ffil.denn at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ConfigProvider.cpp
M clang-tools-extra/clangd/ConfigProvider.h
M clang-tools-extra/clangd/fuzzer/clangd-fuzzer.cpp
M clang-tools-extra/clangd/indexer/IndexerMain.cpp
A clang-tools-extra/clangd/test/indexer-clangd-config-relative-path.test
A clang-tools-extra/clangd/test/indexer-clangd-config.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
M clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
Log Message:
-----------
[clangd] Make clangd-indexer respect .clangd configuration files (#214951)
This support is currently behind an `--enable-config` flag which is
off by default.
The implementation reuses clangd's existing machinery where
appropriate, such as for loading config files, and for applying their
contents to the correct source files based on the config file's
location and any `If` clauses.
Due to limitations in the libTooling interfaces used in clangd-indexer's
implementation, configuration is currently only applied to source
files whose path is specified as an absolute path in the compilation
database.
Related discourse topic: https://discourse.llvm.org/t/honor-clangd-compileflags-overrides-in-clangd-indexer/91504
Commit: 257f252ae4476ec709085bc1a033bde1d22d7710
https://github.com/llvm/llvm-project/commit/257f252ae4476ec709085bc1a033bde1d22d7710
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/Interpreter/Interfaces/ScriptedProcessInterface.h
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/functionalities/scripted_process/addressable_bits_scripted_process.py
Log Message:
-----------
[lldb/Interpreter] Read Scripted Process addressable bits from its metadata (#227515)
This patch addresses post-merge feedback on #224701.
That change added a dedicated `get_addressable_bits` affordance to
scripted processes, which duplicates a property the process already has.
This patch removes it and reads the addressable bits from an optional
"addressable_bits" key in the dictionary returned by
`get_process_metadata` instead. `ScriptedProcess::DidLaunchOrAttach`
still passes the value to `SetAddressableBitMasks` before the first stop
is reported. When the key is missing, the setter is never called and the
process keeps the masks it inherits from the target.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 95bccb2675f90f6eea9e406344b05360ebad5f89
https://github.com/llvm/llvm-project/commit/95bccb2675f90f6eea9e406344b05360ebad5f89
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMInstrNEON.td
Log Message:
-----------
[ARM] Use extract_subvector instead of vector_extract_subvec in ARMInstrNEON.td. NFC (#228542)
extract_subvector has a stricter SDTypeProfile than
vector_extract_subvec.
I'm investigating why we need vector_extract_subvec. The only other
users are in AArch64SVEInstrInfo.td so maybe something to do with
scalable vectors.
Commit: 9c3a8d5a0b5a24b73280eacf9f536bcede001ee8
https://github.com/llvm/llvm-project/commit/9c3a8d5a0b5a24b73280eacf9f536bcede001ee8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Analysis/BUILD.gn
Log Message:
-----------
[gn build] Port b74b3ebf94c4c (#228411)
Commit: 0d3adab5e34fc8ff73734c62fabdbe8f9adfa08c
https://github.com/llvm/llvm-project/commit/0d3adab5e34fc8ff73734c62fabdbe8f9adfa08c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
Log Message:
-----------
[gn build] Port 8cb1d1566dbb2 (#228410)
Commit: 23345faf72b0f3dab56a794663a1dbfa5f2d0dba
https://github.com/llvm/llvm-project/commit/23345faf72b0f3dab56a794663a1dbfa5f2d0dba
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port 76df4ae44f0b (#228409)
Commit: ef126538b5f16c0b5284bbbbf6deea8307d8bced
https://github.com/llvm/llvm-project/commit/ef126538b5f16c0b5284bbbbf6deea8307d8bced
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ExecutionEngine/JITLink/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/JITLink/BUILD.gn
Log Message:
-----------
[gn build] Port 2820795b027eb (#228408)
Commit: dfabf2df7d27cbaf96b849251c36b8228762ee87
https://github.com/llvm/llvm-project/commit/dfabf2df7d27cbaf96b849251c36b8228762ee87
Author: Eric Ross <zerico2005 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Support/KnownFPClass.cpp
M llvm/test/Transforms/Attributor/nofpclass-sqrt.ll
Log Message:
-----------
[KnownFPClass] Refine positive zero result for sqrt (#214987)
Refines `KnownFPClass::sqrt` for positive zero:
- Only `sqrt(x) == +0.0` iff `x` is `+0.0` or `x` flushes to `+0.0` in
the current denormal mode. The `-0.0` case was handled in a prior
commit.
AI disclosure:
I used OpenAI Codex (GPT-5.6-sol) to help generate the test updates,
which I reviewed and tested locally.
Commit: 90ac02ea8e0820cb5dcae2d62fe7c3e3523ae1f8
https://github.com/llvm/llvm-project/commit/90ac02ea8e0820cb5dcae2d62fe7c3e3523ae1f8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port b8afba677502d (#228412)
Commit: 43066b9e82859c619fc0fdb6349256d44fe44013
https://github.com/llvm/llvm-project/commit/43066b9e82859c619fc0fdb6349256d44fe44013
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Serialization/BUILD.gn
Log Message:
-----------
[gn build] Port 15cbda42e14b7 (#228406)
Commit: 0a9f9d51fdb14708f5c473ad9e94b10305e31ba4
https://github.com/llvm/llvm-project/commit/0a9f9d51fdb14708f5c473ad9e94b10305e31ba4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/utils/TableGen/Common/CodeGenDAGPatterns.cpp
Log Message:
-----------
[TableGen][AArch64] Relax EnforceVectorSubVectorTypeIs for mixing fixed and scalable vectors. (#228552)
The minimum elements of a fixed subvector may be greater than or equal
to the minimum elements of the scalable vector when vscale is greater
than 1. With a fixed subvector and a scalable vector we now allow the
subvector to have the same minimum elements as the vector. That covers a
NEON subvector and a SVE vector.
It is possible to have a subvector with more minimum elements than the
vector when vscale is known to be greater than 1, but both RISC-V
vectors and SVE use custom isel rather than tablegen for those cases.
With that fixed, migrate AArch64 to use
extract_subvector/insert_subvector instead of
vector_extract_subvec/vector_insert_subvec. A follow up will remove
vector_extract_subvec/vector_insert_subvec.
Commit: 63238edbfd44d1d033657933c671fc22e830f336
https://github.com/llvm/llvm-project/commit/63238edbfd44d1d033657933c671fc22e830f336
Author: Michael Park <mcypark at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/Support/ErrorOr.h
Log Message:
-----------
[llvm][Support] Remove stale `ErrorOr` documentation regarding user data. (#227796)
Optional user data support was removed from `ErrorOr` in ca35ffe6a239 in November 2013.
Commit: 318d8c3b0b5cd2b28869de20b1e326e28997c879
https://github.com/llvm/llvm-project/commit/318d8c3b0b5cd2b28869de20b1e326e28997c879
Author: David Blaikie <dblaikie at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
M llvm/test/CodeGen/SPIRV/passes/SPIRVPrepareGlobals.ll
Log Message:
-----------
[SPIRV] Don't treat noipa aliasees as interposable in SPIRVPrepareGlobals (#228178)
SPIRVPrepareGlobals replaces aliases with their aliasee because the
backend can't lower GlobalAlias. It must skip aliasees that may be
replaced at link time, but `isInterposable()` also returns true for
`noipa` function definitions by default. `noipa` doesn't change which
definition is used at link time, so query
`isInterposable(/*CheckNoIPA=*/false)` so aliases of `noipa` functions
are still replaced.
This is one of a few refinements of noipa identified while working on
making optnone imply noipa - without these refinements,
optnone-implies-noipa, might substantially change clang -O0 codegen. I'm
open to discussing whether these refinements are the right direction,
though.
Assisted-By: Claude
Commit: 07e69cf1e68aada7cc635c906e6c265c2b7be354
https://github.com/llvm/llvm-project/commit/07e69cf1e68aada7cc635c906e6c265c2b7be354
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
A llvm/test/CodeGen/NVPTX/fp128-compare-no-libcall-error.ll
Log Message:
-----------
DAG: Gracefully diagnose missing fp-compare libcall when softening (#228416)
Avoid fatal errors, and legalize to poison with a proper context error.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7bc1de45ec19c69e5236deb90b7d618969a78dec
https://github.com/llvm/llvm-project/commit/7bc1de45ec19c69e5236deb90b7d618969a78dec
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/CodeGenUtils/BUILD.gn
Log Message:
-----------
[gn build] Port c666ea6d7cae (#228615)
Commit: 937a402e7ef27302a2fdd41fc0fc682f7f5fe1e9
https://github.com/llvm/llvm-project/commit/937a402e7ef27302a2fdd41fc0fc682f7f5fe1e9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ABI/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ABI/BUILD.gn
Log Message:
-----------
[gn build] Port cd94d181b2e3 (#228616)
Commit: ff2e85345d1c412d9d743603f6773ce454322d4f
https://github.com/llvm/llvm-project/commit/ff2e85345d1c412d9d743603f6773ce454322d4f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M llvm/utils/gn/secondary/bolt/test/BUILD.gn
Log Message:
-----------
[gn] port 873f7ef7077fd5f3 (#228617)
Commit: 72a34143a29ba21289fa147334472cb0ca27093a
https://github.com/llvm/llvm-project/commit/72a34143a29ba21289fa147334472cb0ca27093a
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
A clang/test/CIR/IR/coro-noop.cir
A clang/test/CIR/Lowering/coro-noop.cir
Log Message:
-----------
[ClangIR] Support __builtin_coro_noop (#227573)
Support `__builtin_coro_noop` in ClangIR:
- Add `CIR_CoroNoopOp` (`cir.coro.intrinsic.noop`) in `CIROps.td` with
TableGen lowering to `llvm.coro.noop`.
- Handle `Builtin::BI__builtin_coro_noop` in `CIRGenBuiltin.cpp`.
- Add roundtrip (`clang/test/CIR/IR/coro-noop.cir`) and DirectToLLVM
lowering (`clang/test/CIR/Lowering/coro-noop.cir`) tests.
- Uncomment and test `__builtin_coro_noop()` in
`clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp` with both CIR and
LLVM checks for parity with classic Clang CodeGen.
Closes #227561
Commit: 04f2187784737b0d3ab7c86d772397d831447ee7
https://github.com/llvm/llvm-project/commit/04f2187784737b0d3ab7c86d772397d831447ee7
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-10-02 (Fri, 02 Oct 2026)
Changed paths:
M .github/CODEOWNERS
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/docs.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-libstdcxx.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-pr-benchmark.yml
R .github/workflows/libcxx/build-at-commit/action.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/zizmor.yml
M bolt/lib/Core/DebugData.cpp
M bolt/lib/Core/Exceptions.cpp
M bolt/lib/Core/HashUtilities.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/test/AArch64/compressed-debug-sections.test
A bolt/test/AArch64/zlib-compressed-debug-sections.s
A bolt/test/AArch64/zstd-compressed-debug-sections.s
M bolt/test/CMakeLists.txt
A bolt/test/X86/eh-frame-hdr-sdata8.s
M bolt/test/lit.site.cfg.py.in
M clang-tools-extra/clang-tidy/misc/ConstCorrectnessCheck.cpp
M clang-tools-extra/clang-tidy/modernize/UseRangesCheck.cpp
M clang-tools-extra/clangd/ClangdLSPServer.cpp
M clang-tools-extra/clangd/ClangdLSPServer.h
M clang-tools-extra/clangd/ConfigProvider.cpp
M clang-tools-extra/clangd/ConfigProvider.h
M clang-tools-extra/clangd/fuzzer/clangd-fuzzer.cpp
M clang-tools-extra/clangd/indexer/IndexerMain.cpp
M clang-tools-extra/clangd/refactor/tweaks/DefineInline.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
A clang-tools-extra/clangd/test/indexer-clangd-config-relative-path.test
A clang-tools-extra/clangd/test/indexer-clangd-config.test
M clang-tools-extra/clangd/tool/Check.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/ClangdLSPServerTests.cpp
M clang-tools-extra/clangd/unittests/ConfigProviderTests.cpp
M clang-tools-extra/clangd/unittests/FindTargetTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/DefineInlineTests.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/docs/clang-tidy/checks/misc/const-correctness.rst
M clang-tools-extra/docs/clang-tidy/checks/modernize/use-ranges.rst
A clang-tools-extra/test/clang-tidy/checkers/misc/const-correctness-parameters-main.cpp
M clang-tools-extra/test/clang-tidy/checkers/modernize/Inputs/use-ranges/fake_std.h
M clang-tools-extra/test/clang-tidy/checkers/modernize/use-ranges.cpp
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/bindings/python/tests/cindex/test_enums.py
M clang/cmake/caches/Fuchsia-stage2-instrumented.cmake
M clang/cmake/caches/Fuchsia.cmake
M clang/docs/CIR/ABILowering.md
M clang/docs/CIR/CleanupAndEHDesign.md
M clang/docs/ClangFormatStyleOptions.md
M clang/docs/LanguageExtensions.md
M clang/docs/ReleaseNotes.md
M clang/docs/SanitizerCoverage.md
M clang/docs/UsersManual.md
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/BuiltinTypes.def
M clang/include/clang/AST/Decl.h
M clang/include/clang/AST/ExprCXX.h
M clang/include/clang/AST/PropertiesBase.td
A clang/include/clang/AST/Reflection.h
M clang/include/clang/AST/TemplateBase.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/BuiltinTemplates.td
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/DiagnosticFrontendKinds.td
M clang/include/clang/Basic/DiagnosticLexKinds.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
A clang/include/clang/Basic/HLSLPackedTypes.def
M clang/include/clang/Basic/Specifiers.h
M clang/include/clang/Basic/TokenKinds.def
M clang/include/clang/CIR/CIRGenerator.h
M clang/include/clang/CIR/CIRToCIRPasses.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROpenCLAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/Passes.h
M clang/include/clang/CIR/FrontendAction/CIRGenAction.h
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/MissingFeatures.h
A clang/include/clang/CodeGenUtils/BackendDiagnosticHandler.h
M clang/include/clang/CodeGenUtils/CodeGenUtils.h
A clang/include/clang/CodeGenUtils/EHPersonality.h
A clang/include/clang/CodeGenUtils/ModuleUtils.h
A clang/include/clang/CodeGenUtils/StmtUtils.h
M clang/include/clang/Format/Format.h
M clang/include/clang/Frontend/FrontendAction.h
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
M clang/include/clang/Parse/Parser.h
M clang/include/clang/Parse/RAIIObjectsForParser.h
M clang/include/clang/Sema/DeclSpec.h
M clang/include/clang/Sema/Overload.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaOpenMP.h
M clang/include/clang/Serialization/ASTBitCodes.h
M clang/include/clang/Serialization/ASTReader.h
M clang/include/clang/Serialization/ASTWriter.h
M clang/include/clang/Serialization/SourceLocationEncoding.h
M clang/include/module.modulemap
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Compiler.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltin.cpp
M clang/lib/AST/ByteCode/InterpBuiltinBitCast.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/PrimType.cpp
M clang/lib/AST/ByteCode/PrimType.h
M clang/lib/AST/ByteCode/Program.cpp
M clang/lib/AST/ByteCode/Program.h
A clang/lib/AST/ByteCode/Reflect.h
M clang/lib/AST/Decl.cpp
M clang/lib/AST/DeclTemplate.cpp
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprCXX.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/ItaniumMangle.cpp
M clang/lib/AST/MicrosoftMangle.cpp
M clang/lib/AST/NSAPI.cpp
M clang/lib/AST/PrintfFormatString.cpp
M clang/lib/AST/StmtPrinter.cpp
M clang/lib/AST/StmtProfile.cpp
M clang/lib/AST/TemplateBase.cpp
M clang/lib/AST/TextNodeDumper.cpp
M clang/lib/AST/Type.cpp
M clang/lib/AST/TypeLoc.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.cpp
M clang/lib/ASTMatchers/Dynamic/Marshallers.h
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/AMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenAsm.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinNVPTX.cpp
M clang/lib/CIR/CodeGen/CIRGenCall.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.h
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenException.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.h
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
A clang/lib/CIR/CodeGen/CIRGenOpenMPConstructDecomposition.h
M clang/lib/CIR/CodeGen/CIRGenStmt.cpp
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenVTables.cpp
M clang/lib/CIR/CodeGen/CIRGenerator.cpp
M clang/lib/CIR/CodeGen/Targets/SPIRV.cpp
M clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CIRSimplify.cpp
M clang/lib/CIR/Dialect/Transforms/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/LibOpt.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CMakeLists.txt
M clang/lib/CIR/Dialect/Transforms/TargetLowering/Targets/SPIRV.cpp
M clang/lib/CIR/FrontendAction/CIRGenAction.cpp
M clang/lib/CIR/FrontendAction/CMakeLists.txt
M clang/lib/CIR/Lowering/CIRPasses.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMIR.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVMOpenCLMetadata.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CGBuiltin.cpp
M clang/lib/CodeGen/CGCall.cpp
M clang/lib/CodeGen/CGCleanup.cpp
M clang/lib/CodeGen/CGCleanup.h
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGDebugInfo.h
M clang/lib/CodeGen/CGDecl.cpp
M clang/lib/CodeGen/CGException.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntime.cpp
M clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
M clang/lib/CodeGen/CGStmt.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenFunction.h
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenModule.h
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/TargetBuiltins/X86.cpp
M clang/lib/CodeGen/VarBypassDetector.cpp
M clang/lib/CodeGen/VarBypassDetector.h
A clang/lib/CodeGenUtils/BackendDiagnosticHandler.cpp
M clang/lib/CodeGenUtils/CMakeLists.txt
M clang/lib/CodeGenUtils/CodeGenUtils.cpp
A clang/lib/CodeGenUtils/EHPersonality.cpp
A clang/lib/CodeGenUtils/ModuleUtils.cpp
A clang/lib/CodeGenUtils/StmtUtils.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/AMDGPU.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Format/Format.cpp
M clang/lib/Format/TokenAnnotator.cpp
M clang/lib/Format/UnwrappedLineFormatter.cpp
M clang/lib/Frontend/CompilerInvocation.cpp
M clang/lib/Frontend/FrontendAction.cpp
M clang/lib/Frontend/FrontendActions.cpp
M clang/lib/Headers/__clang_cuda_builtin_vars.h
M clang/lib/Headers/hlsl/hlsl_alias_intrinsics.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Interpreter/InterpreterValuePrinter.cpp
M clang/lib/Lex/LiteralSupport.cpp
M clang/lib/Parse/ParseDecl.cpp
M clang/lib/Parse/ParseDeclCXX.cpp
M clang/lib/Parse/ParseExpr.cpp
M clang/lib/Parse/ParseExprCXX.cpp
M clang/lib/Parse/ParseTentative.cpp
M clang/lib/Parse/Parser.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/UnsafeBufferUsage/UnsafeBufferUsageAnalysis.cpp
M clang/lib/Sema/DeclSpec.cpp
M clang/lib/Sema/SemaAPINotes.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaCast.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiateDecl.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTCommon.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTReaderStmt.cpp
M clang/lib/Serialization/ASTWriter.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/BlockInCriticalSectionChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/DeadStoresChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/UnifiedSymbolResolution/USRGeneration.cpp
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.apinotes
M clang/test/APINotes/Inputs/Frameworks/VersionedKit.framework/Headers/VersionedKit.h
M clang/test/APINotes/Inputs/Headers/ExportAs.apinotes
A clang/test/APINotes/Inputs/Headers/ExportAsCore.apinotes
M clang/test/APINotes/Inputs/Headers/ExportAsCore.h
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.apinotes
A clang/test/APINotes/Inputs/Headers/SliceGroupsExact.h
M clang/test/APINotes/Inputs/Headers/module.modulemap
M clang/test/APINotes/properties.m
A clang/test/APINotes/slice-groups-exact.c
A clang/test/APINotes/slice-groups-order.c
A clang/test/APINotes/slice-groups.c
M clang/test/APINotes/versioned-version-independent.m
M clang/test/APINotes/versioned.m
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/dynalloc-limits.cpp
M clang/test/AST/ByteCode/initializer_list.cpp
M clang/test/AST/ByteCode/invalid.cpp
A clang/test/AST/ByteCode/matrix.c
A clang/test/AST/HLSL/int8_t4_packed.hlsl
A clang/test/AST/HLSL/uint8_t4_packed.hlsl
A clang/test/AST/ast-dump-APValue-reflection.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/block-in-critical-section-raii.cpp
M clang/test/Analysis/block-in-critical-section.cpp
M clang/test/Analysis/dead-stores.c
M clang/test/Analysis/std-c-library-functions-arg-constraints.c
M clang/test/Analysis/stream-noopen.c
M clang/test/C/C23/n2549.c
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/agg-atomic-cast.c
M clang/test/CIR/CodeGen/amdgpu-array-addrspace.cpp
M clang/test/CIR/CodeGen/amdgpu-target-lowering-as.cpp
A clang/test/CIR/CodeGen/array-subscript-order.cpp
M clang/test/CIR/CodeGen/array.cpp
A clang/test/CIR/CodeGen/asm-label-redirect-variadic.c
A clang/test/CIR/CodeGen/attr-error.c
M clang/test/CIR/CodeGen/base-init-eh.cpp
M clang/test/CIR/CodeGen/base-to-derived.cpp
M clang/test/CIR/CodeGen/bitint-record-layout.c
M clang/test/CIR/CodeGen/builtin-memcpy.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-avx.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byval-union-padding.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-byval-union-padding.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-empty.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect-variadic-virtual.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-indirect-variadic.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval.cpp
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-union-tail-padding.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64-variadic.c
M clang/test/CIR/CodeGen/call-conv-lowering-x86_64.c
M clang/test/CIR/CodeGen/call.c
M clang/test/CIR/CodeGen/cast.c
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/cleanup-derived-to-base-ref.cpp
A clang/test/CIR/CodeGen/cleanup-scope-label-attr-block.cpp
A clang/test/CIR/CodeGen/const-init-multi-base.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/ctor-try-body.cpp
M clang/test/CIR/CodeGen/ctor.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/derived-to-base.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit-strict.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit.cpp
M clang/test/CIR/CodeGen/dtors.cpp
A clang/test/CIR/CodeGen/get-member-addrspace.cpp
M clang/test/CIR/CodeGen/global-tls-templates.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/long-double-inc-dec.cpp
M clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/CodeGen/misc-attrs.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
A clang/test/CIR/CodeGen/mustprogress.cpp
M clang/test/CIR/CodeGen/new-array-in-ternary.cpp
M clang/test/CIR/CodeGen/new.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/no-unique-address.cpp
M clang/test/CIR/CodeGen/nrvo.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/partial-array-cleanup.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member.cpp
M clang/test/CIR/CodeGen/pointers.cpp
M clang/test/CIR/CodeGen/spirv-target-lowering-as.cpp
M clang/test/CIR/CodeGen/temp-param-obj-decl.cpp
M clang/test/CIR/CodeGen/temporary-materialization-adjust.cpp
M clang/test/CIR/CodeGen/three-way-cmp.cpp
M clang/test/CIR/CodeGen/unary.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/union-agg-init.cpp
M clang/test/CIR/CodeGen/union.c
A clang/test/CIR/CodeGen/uwtable.cpp
M clang/test/CIR/CodeGen/var-arg-aggregate.c
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/virtual-destructor-calls.cpp
M clang/test/CIR/CodeGen/vla.c
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGen/wide-string.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-constant-p.c
M clang/test/CIR/CodeGenBuiltins/builtin-memchr.c
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
A clang/test/CIR/CodeGenCUDA/global-addrspace-cast.cu
A clang/test/CIR/CodeGenCUDA/nounwind.cu
M clang/test/CIR/CodeGenCUDA/uniform-work-group-size.cu
M clang/test/CIR/CodeGenCoroutines/Inputs/coroutine.h
M clang/test/CIR/CodeGenCoroutines/coro-builtins.cpp
M clang/test/CIR/CodeGenCoroutines/coro-exceptions.cpp
M clang/test/CIR/CodeGenCoroutines/coro-task.cpp
A clang/test/CIR/CodeGenHIP/amdgcnspirv-builtins.hip
M clang/test/CIR/CodeGenHIP/amdgcnspirv-kernel.hip
M clang/test/CIR/CodeGenHIP/atomic-classify.hip
M clang/test/CIR/CodeGenHIP/builtin-bool-result.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-logb-scalbn.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
M clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
A clang/test/CIR/CodeGenHIP/inline-asm-multi-output-addrspace.hip
A clang/test/CIR/CodeGenHIP/string-literal-addrspace.hip
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
A clang/test/CIR/CodeGenHLSL/cxx-this-lvalue.hlsl
M clang/test/CIR/CodeGenOpenACC/atomic-update.cpp
M clang/test/CIR/CodeGenOpenACC/combined-copy.c
M clang/test/CIR/CodeGenOpenACC/enter-data.c
M clang/test/CIR/CodeGenOpenACC/exit-data.c
A clang/test/CIR/CodeGenOpenCL/global-vars.cl
A clang/test/CIR/CodeGenOpenCL/nounwind.cl
A clang/test/CIR/CodeGenOpenCL/string-literal-addrspace.cl
M clang/test/CIR/CodeGenOpenCL/version.cl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/CodeGenOpenMP/target-parallel.c
A clang/test/CIR/CodeGenSYCL/address-space-lang.cpp
A clang/test/CIR/CodeGenSYCL/embed-offload-object.cpp
A clang/test/CIR/CodeGenSYCL/gpu-rdc-mangled-name.cpp
M clang/test/CIR/CodeGenSYCL/kernel-caller-address-space.cpp
M clang/test/CIR/CodeGenSYCL/kernel-caller-attributes.cpp
A clang/test/CIR/CodeGenSYCL/nounwind.cpp
A clang/test/CIR/CodeGenSYCL/string-literal-addrspace-nyi.cpp
A clang/test/CIR/CodeGenSYCL/sycl-external.cpp
A clang/test/CIR/Diagnostics/attr-error.c
A clang/test/CIR/Diagnostics/inline-asm-backend-diagnostic.c
M clang/test/CIR/IR/await.cir
M clang/test/CIR/IR/co-return.cir
R clang/test/CIR/IR/coro-body.cir
A clang/test/CIR/IR/coro-noop.cir
A clang/test/CIR/IR/coroutine.cir
M clang/test/CIR/IR/func-attrs.cir
M clang/test/CIR/IR/func.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-await.cir
M clang/test/CIR/IR/invalid-call.cir
M clang/test/CIR/IR/invalid-co-return.cir
R clang/test/CIR/IR/invalid-coro-body.cir
A clang/test/CIR/IR/invalid-coroutine.cir
M clang/test/CIR/IR/invalid-func-attr.cir
M clang/test/CIR/IR/invalid-global.cir
M clang/test/CIR/IR/invalid-matrix.cir
M clang/test/CIR/IR/invalid-struct.cir
M clang/test/CIR/IR/invalid-version.cir
A clang/test/CIR/IR/max-work-group-size.cir
M clang/test/CIR/IR/version.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
A clang/test/CIR/Input/cir-input-ast-action.cir
A clang/test/CIR/Input/cir-input-preamble.cir
A clang/test/CIR/Input/cir-input-unsupported.cir
A clang/test/CIR/Lowering/coro-noop.cir
A clang/test/CIR/Lowering/max-work-group-size.cir
M clang/test/CIR/Lowering/opencl-version-metadata.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
A clang/test/CIR/Transforms/abi-lowering/coerce-record-return-from-memory.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-byval.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-call.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
A clang/test/CIR/Transforms/abi-lowering/indirect-variadic-call-test-target-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-bitint.cir
A clang/test/CIR/Transforms/abi-lowering/x86_64-indirect-variadic.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-direct-offset.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-struct-indirect.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-union.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-variadic-nyi.cir
M clang/test/CIR/Transforms/abi-lowering/x86_64-vptr.cir
A clang/test/CIR/Transforms/inline-asm-side-effects.cir
M clang/test/CIR/Transforms/pure-ptr-arithmetic.cir
M clang/test/CIR/Transforms/switch-fold.cir
M clang/test/CodeGen/LoongArch/lasx/builtin-alias.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/X86/avx2-builtins.c
M clang/test/CodeGen/X86/avx512bw-builtins.c
M clang/test/CodeGen/X86/avx512f-builtins.c
M clang/test/CodeGen/X86/avx512vl-builtins.c
M clang/test/CodeGen/X86/avx512vlbw-builtins.c
M clang/test/CodeGen/X86/mmx-builtins.c
M clang/test/CodeGen/X86/sse2-builtins.c
M clang/test/CodeGen/arm-v8.2a-neon-intrinsics-generic.c
M clang/test/CodeGen/arm_neon_intrinsics.c
A clang/test/CodeGen/debug-info-line0-lexical-block.c
M clang/test/CodeGen/isfpclass.c
M clang/test/CodeGen/keep-inline-functions.cpp
A clang/test/CodeGen/trivial-auto-var-init-bypass.c
M clang/test/CodeGenCUDA/cuda-builtin-vars.cu
R clang/test/CodeGenCXX/attr-annotate-constructor.cpp
R clang/test/CodeGenCXX/attr-annotate-destructor.cpp
A clang/test/CodeGenCXX/attr-annotate-member-functions.cpp
M clang/test/CodeGenCXX/attr-used.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-itanium.cpp
A clang/test/CodeGenCXX/reflection-emit-meta-info-ms.cpp
M clang/test/CodeGenCXX/reflection-mangle-itanium.cpp
R clang/test/CodeGenCXX/reflection-mangle-ms.cpp
M clang/test/CodeGenCXX/trivial-auto-var-init.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementRowColFlags.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
A clang/test/CodeGenHLSL/builtins/abs_mat.hlsl
A clang/test/CodeGenHLSL/builtins/select_mat.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
A clang/test/CodeGenHLSL/packed-types.hlsl
M clang/test/CodeGenObjC/class-stubs.m
A clang/test/CodeGenObjCXX/objc-atomic-ownership-recovery.mm
M clang/test/CodeGenOpenCL/amdgpu-features-readonly.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-make-buffer-rsrc.cl
M clang/test/Driver/amdgpu-toolchain.c
M clang/test/Driver/amdgpu-xnack-sramecc-flags.c
M clang/test/Driver/cl-options.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/sycl-offload-jit.cpp
A clang/test/Frontend/cir-input-not-built.cir
M clang/test/Frontend/lit.local.cfg
M clang/test/Headers/__clang_hip_math.hip
M clang/test/Headers/wasm.c
M clang/test/Import/builtin-template/Inputs/S.cpp
M clang/test/Import/builtin-template/test.cpp
M clang/test/Index/annotate-tokens-pp.c
M clang/test/Index/annotate-tokens.c
M clang/test/Index/blocks.c
M clang/test/Index/load-stmts.cpp
M clang/test/Index/print-type.c
M clang/test/Index/recursive-cxx-member-calls.cpp
A clang/test/Index/unaryop.cpp
A clang/test/Interpreter/CUDA/device-module-verifier.cu
A clang/test/Interpreter/CUDA/empty-device-module.cu
M clang/test/Interpreter/pretty-print.cpp
A clang/test/OpenMP/requires_module.cpp
A clang/test/OpenMP/requires_pch.cpp
M clang/test/OpenMP/taskloop_strictmodifier_codegen.cpp
A clang/test/OpenMP/teams_generic_loop_reduction_distribute_codegen.cpp
M clang/test/PCH/dedup_types.cpp
A clang/test/PCH/reflection.cpp
A clang/test/PCH/reflection_include.h
M clang/test/Parser/MicrosoftExtensions.cpp
A clang/test/Parser/c23-enum-generic-assoc.c
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/test/Sema/builtins-microsoft-arm64.c
A clang/test/Sema/constexpr-builtin-stdc-memreverse8-typed.c
M clang/test/Sema/fp16vec-sema.c
M clang/test/Sema/redefine_extname.c
M clang/test/Sema/redefine_extname.cpp
A clang/test/Sema/reflection-meta-info.fail.cpp
A clang/test/Sema/reflection-meta-info.pass.cpp
M clang/test/Sema/vector-ops.c
M clang/test/Sema/warn-fortify-source.c
M clang/test/SemaCUDA/cuda-builtin-vars.cu
M clang/test/SemaCXX/constant-expression-cxx11.cpp
A clang/test/SemaCXX/constexpr-builtin-stdc-memreverse8.cpp
M clang/test/SemaCXX/vector.cpp
A clang/test/SemaHLSL/BuiltIns/abs_mat-errors.hlsl
M clang/test/SemaHLSL/BuiltIns/select-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/select_mat-errors.hlsl
A clang/test/SemaHLSL/Types/packed-types-error.hlsl
A clang/test/SemaHLSL/Types/packed-types-size.hlsl
M clang/test/SemaOpenCL/builtins-amdgcn-error-gfx1250-strict.cl
A clang/test/SemaOpenCL/builtins-amdgcn-gfx13-exclusive-scan-types.cl
M clang/test/SemaTemplate/concepts.cpp
M clang/test/SemaTemplate/instantiate-var-template.cpp
A clang/test/SemaTemplate/sort-types-builtin.cpp
M clang/tools/libclang/CIndex.cpp
M clang/unittests/AST/ASTImporterTest.cpp
M clang/unittests/ASTMatchers/Dynamic/RegistryTest.cpp
M clang/unittests/CIR/ControlFlowTest.cpp
M clang/unittests/Format/ConfigParseTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Format/FormatTestVerilog.cpp
M clang/unittests/Interpreter/CMakeLists.txt
A clang/unittests/Interpreter/DeviceOffloadTest.cpp
M clang/unittests/Interpreter/InterpreterTest.cpp
M clang/unittests/ScalableStaticAnalysis/WholeProgramAnalysis/UnsafeBufferReachableAnalysisTest.cpp
M clang/unittests/Serialization/CMakeLists.txt
A clang/unittests/Serialization/ResolveImportedPathTest.cpp
M clang/unittests/Serialization/SourceLocationEncodingTest.cpp
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/asan/asan_win_static_runtime_thunk.cpp
M compiler-rt/lib/builtins/cpu_model/aarch64/fmv/elf_aux_info.inc
M compiler-rt/lib/fuzzer/FuzzerDriver.cpp
M compiler-rt/lib/fuzzer/FuzzerFlags.def
M compiler-rt/lib/interception/interception_win.cpp
M compiler-rt/lib/interception/interception_win.h
M compiler-rt/lib/interception/tests/interception_win_test.cpp
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/elfnix_tls.mips.S
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
M compiler-rt/lib/sanitizer_common/sanitizer_common_interceptors_memintrinsics.inc
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_fuchsia.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_coverage_libcdep_new.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_flags.inc
M compiler-rt/lib/sanitizer_common/sanitizer_offload.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_offload.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_hsa.h
M compiler-rt/lib/sanitizer_common/sanitizer_offload_image.cpp
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer.h
M compiler-rt/lib/sanitizer_common/sanitizer_symbolizer_libcdep.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/sanitizer_wrappers.cpp
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/build_symbolizer.sh
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
M compiler-rt/lib/scudo/standalone/memtag.h
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
A compiler-rt/test/asan/TestCases/Windows/intercept_memmove.cpp
M compiler-rt/test/hwasan/TestCases/hwasan_symbolize_stack_overflow.cpp
A compiler-rt/test/msan/getaddrinfo-padding.cpp
M compiler-rt/test/msan/getaddrinfo-positive.cpp
M compiler-rt/test/msan/release_origin.c
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-helper.c
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-main.c
A compiler-rt/test/orc/TestCases/Linux/mips/external-branch-stub.test
A compiler-rt/test/orc/TestCases/Linux/mips/lit.local.cfg.py
A compiler-rt/test/orc/TestCases/Linux/mips/trivial-tls.c
A compiler-rt/test/sanitizer_common/TestCases/getaddrinfo.cpp
A compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_summary.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/shared-libsan-dso.cpp
M cross-project-tests/CMakeLists.txt
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
A flang-rt/include/flang-rt/runtime/array.h
M flang-rt/include/flang-rt/runtime/environment.h
R flang-rt/lib/runtime/array.h
M flang-rt/lib/runtime/environment.cpp
M flang-rt/lib/runtime/external-unit.cpp
M flang-rt/lib/runtime/io-api-server.cpp
M flang-rt/lib/runtime/product.cpp
M flang-rt/test/Driver/fpe-trap-exec-denormal.f90
M flang-rt/test/Driver/fpe-trap-exec-divzero.f90
M flang-rt/test/Driver/fpe-trap-exec-inexact.f90
M flang-rt/test/Driver/fpe-trap-exec-overflow.f90
M flang-rt/test/Driver/fpe-trap-exec-underflow.f90
M flang-rt/test/Driver/fpe-trap-exec.f90
A flang-rt/test/Runtime/fort_convert.f90
M flang-rt/test/lit.cfg.py
M flang-rt/unittests/Runtime/Reduction.cpp
M flang/docs/OpenACC-extensions.md
M flang/docs/OpenMPSupport.md
M flang/docs/RuntimeEnvironment.md
M flang/include/flang/Evaluate/check-expression.h
M flang/include/flang/Evaluate/fold-designator.h
M flang/include/flang/Evaluate/tools.h
M flang/include/flang/Frontend/FrontendOptions.h
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Optimizer/Analysis/AliasAnalysis.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFOps.td
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M flang/include/flang/Optimizer/HLFIR/HLFIROps.td
M flang/include/flang/Optimizer/OpenACC/Passes.td
M flang/include/flang/Optimizer/Transforms/Passes.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Parser/message.h
M flang/include/flang/Parser/options.h
M flang/lib/Evaluate/check-expression.cpp
M flang/lib/Evaluate/fold-designator.cpp
M flang/lib/Evaluate/fold-implementation.h
M flang/lib/Evaluate/fold.cpp
M flang/lib/Evaluate/intrinsics.cpp
M flang/lib/Evaluate/shape.cpp
M flang/lib/Evaluate/tools.cpp
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/Decomposer.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Analysis/AliasAnalysis.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/PreCGRewrite.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCEraseUnusedKernelAllocations.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
M flang/lib/Optimizer/OpenMP/MapInfoFinalization.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AllocationPlacement.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
A flang/lib/Optimizer/Transforms/O0CanonicalizerPass.cpp
M flang/lib/Optimizer/Transforms/StackArrays.cpp
M flang/lib/Parser/message.cpp
M flang/lib/Parser/prescan.cpp
M flang/lib/Parser/prescan.h
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/check-cuda.cpp
M flang/lib/Semantics/check-declarations.cpp
M flang/lib/Semantics/check-directive-structure.h
M flang/lib/Semantics/check-omp-loop.cpp
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Analysis/AliasAnalysis/alias-analysis-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-4.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-6.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-7.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-8.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-9.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-absent.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-acc.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-access-path.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-cray-pointers.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-derived-type-box-load.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-host-assoc.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-allocatable.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-array.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-boxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-copy-region.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-private-unboxed-wsloop.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-1.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-target-2.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private-ptr.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-omp-teams-distribute-private.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-pack-array.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-regionbranch.mlir
M flang/test/Analysis/AliasAnalysis/alias-analysis-scoped-origins.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-target.fir
M flang/test/Analysis/AliasAnalysis/alias-analysis-zero-offset-view-chain.fir
M flang/test/Analysis/AliasAnalysis/cuf-alloc-source-kind.mlir
M flang/test/Analysis/AliasAnalysis/gen_mod_ref_test.py
M flang/test/Analysis/AliasAnalysis/load-ptr-alloca.fir
M flang/test/Analysis/AliasAnalysis/load-ptr-designate.fir
M flang/test/Analysis/AliasAnalysis/modref-alloc-free-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-external-name-conversion.fir
M flang/test/Analysis/AliasAnalysis/modref-call-after-inlining.fir
A flang/test/Analysis/AliasAnalysis/modref-call-intent.fir
M flang/test/Analysis/AliasAnalysis/modref-call-memory-effects.fir
M flang/test/Analysis/AliasAnalysis/modref-call-not-fortran.fir
A flang/test/Analysis/AliasAnalysis/modref-call-null.fir
M flang/test/Analysis/AliasAnalysis/modref-call-recursive.fir
M flang/test/Analysis/AliasAnalysis/ptr-component.fir
M flang/test/Driver/mlir-debug-pass-pipeline.f90
M flang/test/Driver/mlir-pass-pipeline.f90
M flang/test/Driver/tco-test-gen.fir
A flang/test/Evaluate/fold-implied-shape-section.f90
M flang/test/Fir/CUDA/cuda-abstract-result.mlir
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-code-gen.mlir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
A flang/test/Fir/CUDA/cuda-data-transfer-char-len.fir
M flang/test/Fir/CUDA/cuda-data-transfer-defer-acc-routine.mlir
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-device-address.mlir
M flang/test/Fir/CUDA/cuda-device-context.mlir
M flang/test/Fir/CUDA/cuda-device-func-transform.mlir
M flang/test/Fir/CUDA/cuda-device-global-preserve.f90
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-global-addr.mlir
M flang/test/Fir/CUDA/cuda-implicit-device-global.f90
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/CUDA/cuda-shared-to-llvm.mlir
M flang/test/Fir/CUDA/cuda-sync-desc.mlir
M flang/test/Fir/CUDA/cuf-offload-livein-value-canonicalization.fir
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/FirToSCF/any.fir
M flang/test/Fir/FirToSCF/do-extra.fir
M flang/test/Fir/FirToSCF/if-extra.fir
M flang/test/Fir/FirToSCF/iterate-while-extra.fir
M flang/test/Fir/FirToSCF/sum.fir
M flang/test/Fir/MIF/change_team.mlir
M flang/test/Fir/MIF/change_team2.mlir
M flang/test/Fir/MIF/co_broadcast.mlir
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M flang/test/Lower/Intrinsics/rand.f90
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M flang/test/Lower/Intrinsics/reduce.f90
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M flang/test/Lower/MIF/coarray_allocation.f90
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M flang/test/Lower/MIF/sync_all.f90
M flang/test/Lower/MIF/sync_images.f90
M flang/test/Lower/MIF/sync_memory.f90
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M flang/test/Lower/OpenACC/Todo/acc-unstructured-loop-construct.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-array.f90
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M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-cuda-pinned.f90
M flang/test/Lower/OpenACC/acc-declare-interface-body.f90
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M flang/test/Lower/OpenACC/acc-do-concurrent-locality.f90
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M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
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A flang/test/Lower/OpenACC/acc-kernels-do-concurrent-independent-flag.f90
M flang/test/Lower/OpenACC/acc-loop-exit.f90
M flang/test/Lower/OpenACC/acc-loop-nested-in-do-concurrent.f90
M flang/test/Lower/OpenACC/acc-no-create-array-section.f90
A flang/test/Lower/OpenACC/acc-on-device-interface.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction-remapping.f90
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M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/do-loops-to-acc-loops.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/distribute-standalone-private.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/equivalence.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-teams-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/wsloop.f90
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M flang/test/Lower/OpenMP/cancel.f90
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M flang/test/Lower/OpenMP/common-atomic-lowering.f90
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M flang/test/Lower/OpenMP/cray-pointers01.f90
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M flang/test/Lower/OpenMP/declare-reduction-allocatable-real.f90
M flang/test/Lower/OpenMP/declare-reduction-finalizer.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-component.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-defined-assign.f90
M flang/test/Lower/OpenMP/declare-reduction-initializer-rhs-call.f90
M flang/test/Lower/OpenMP/declare-reduction-intrinsic-op.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/delayed-privatization-cuda-device-array.cuf
M flang/test/Lower/OpenMP/delayed-privatization-private.f90
M flang/test/Lower/OpenMP/depend-complex.f90
M flang/test/Lower/OpenMP/depend-iterator.f90
M flang/test/Lower/OpenMP/depend-substring.f90
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M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/different_vars_lastprivate_barrier.f90
M flang/test/Lower/OpenMP/distribute-parallel-do-simd.f90
M flang/test/Lower/OpenMP/distribute-simd.f90
M flang/test/Lower/OpenMP/dynamic-len-char-bounds-gen.f90
M flang/test/Lower/OpenMP/firstprivate-commonblock.f90
M flang/test/Lower/OpenMP/flush.f90
M flang/test/Lower/OpenMP/fuse01.f90
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M flang/test/Lower/OpenMP/generic-loop-rewriting.f90
M flang/test/Lower/OpenMP/groupprivate-modfile.f90
M flang/test/Lower/OpenMP/groupprivate.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/hlfir-wsloop.f90
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/indirect-reference-privatization.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-sections-firstprivate.f90
M flang/test/Lower/OpenMP/lastprivate-equivalence.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/lastprivate-simd.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/local-intrinsic-sized-array-map.f90
M flang/test/Lower/OpenMP/loop-directive.f90
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M flang/test/Lower/OpenMP/map-component-ref.f90
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M flang/test/Lower/OpenMP/mismatched-bound-types.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-combsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-initsub.f90
M flang/test/Lower/OpenMP/omp-declare-reduction.f90
M flang/test/Lower/OpenMP/omp-declare-target-program-var.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
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M flang/test/Lower/OpenMP/parallel-lastprivate-clause-scalar.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
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M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
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M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/parallel-wsloop-firstpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop-lastpriv.f90
M flang/test/Lower/OpenMP/parallel-wsloop.f90
M flang/test/Lower/OpenMP/private-character.f90
M flang/test/Lower/OpenMP/private-commonblock.f90
M flang/test/Lower/OpenMP/privatization-proc-ptr.f90
M flang/test/Lower/OpenMP/real10.f90
M flang/test/Lower/OpenMP/reduction-array-element.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/reduction-equivalence.f90
M flang/test/Lower/OpenMP/requires-atomic-default-mem-order.f90
M flang/test/Lower/OpenMP/same_var_first_lastprivate.f90
M flang/test/Lower/OpenMP/scope.f90
M flang/test/Lower/OpenMP/sections-array-reduction.f90
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M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/simd-linear.f90
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M flang/test/Lower/OpenMP/simd_x86_64.f90
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M flang/test/Lower/OpenMP/task-depend-array-section.f90
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M flang/test/Lower/OpenMP/taskgroup-task-array-reduction.f90
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M flang/test/Lower/OpenMP/taskloop-grainsize.f90
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M flang/test/Lower/OpenMP/taskloop-reduction.f90
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M flang/test/Lower/OpenMP/threadprivate-char-array-chararray.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-pointer.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
M flang/test/Lower/OpenMP/threadprivate-default-clause.f90
M flang/test/Lower/OpenMP/threadprivate-hlfir.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-3.f90
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M flang/test/Lower/OpenMP/threadprivate-integer-different-kinds.f90
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M flang/test/Lower/OpenMP/threadprivate-pointer-allocatable.f90
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M flang/test/Lower/OpenMP/threadprivate-use-association-2-hlfir.f90
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M flang/test/Lower/OpenMP/tile01.f90
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M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-simd.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/OpenMP/wsloop.f90
M flang/test/Lower/achar.f90
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/allocatable-caller.f90
M flang/test/Lower/allocatables.f90
M flang/test/Lower/allocate-source-allocatables-2.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-constructor-1.f90
M flang/test/Lower/array-constructor-2.f90
M flang/test/Lower/array-elemental-calls-char-byval.f90
M flang/test/Lower/array-elemental-calls-char-dynamic.f90
M flang/test/Lower/array-elemental-calls-char.f90
M flang/test/Lower/array-expression-assumed-size.f90
M flang/test/Lower/array-expression-slice-1.f90
M flang/test/Lower/array-expression-slice-2.f90
M flang/test/Lower/array-substring.f90
M flang/test/Lower/array-temp.f90
M flang/test/Lower/array.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/associate-construct.f90
M flang/test/Lower/assumed-shape-callee.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/block.f90
M flang/test/Lower/box-address.f90
M flang/test/Lower/bug172157-3.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-by-value-attr.f90
M flang/test/Lower/call-character-array-to-polymorphic-pointer.f90
M flang/test/Lower/call.f90
M flang/test/Lower/character-elemental.f90
M flang/test/Lower/character-local-variables.f90
M flang/test/Lower/character-substrings.f90
M flang/test/Lower/charconvert.f90
M flang/test/Lower/common-block-char0.f90
M flang/test/Lower/complex-operations.f90
M flang/test/Lower/complex-real.f90
M flang/test/Lower/components.f90
M flang/test/Lower/cray-pointer.f90
M flang/test/Lower/declare-with-storage.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/derived-allocatable-components.f90
M flang/test/Lower/derived-assignments.f90
M flang/test/Lower/dispatch.f90
A flang/test/Lower/do-loop-branch-to-loop-end.f90
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_local_assoc_entity.f90
M flang/test/Lower/do_concurrent_local_default_init.f90
M flang/test/Lower/do_concurrent_loop_in_nested_block.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_concurrent_reduce_allocatable.f90
M flang/test/Lower/do_concurrent_reduce_associate.f90
M flang/test/Lower/dummy-argument-assumed-shape-optional.f90
M flang/test/Lower/dummy-argument-contiguous.f90
M flang/test/Lower/dummy-argument-optional-2.f90
M flang/test/Lower/dummy-argument-optional.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/equivalence-3.f
M flang/test/Lower/equivalence-with-host-assoc.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/extrn_subp.f90
M flang/test/Lower/finit-local-exclusions.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-array.f90
M flang/test/Lower/forall/forall-construct-2.f90
M flang/test/Lower/forall/forall-construct-3.f90
M flang/test/Lower/forall/scalar-substring.f90
M flang/test/Lower/host-associated-functions.f90
M flang/test/Lower/host-associated-globals.f90
M flang/test/Lower/host-associated.f90
M flang/test/Lower/host_module_variable_instantiation.f90
M flang/test/Lower/host_module_variable_instantiation_use_device.f90
M flang/test/Lower/identical-block-merge-disable.f90
M flang/test/Lower/if-loc.f90
M flang/test/Lower/if_construct_execute_region_wrap.f90
M flang/test/Lower/inline-hlfir-assign-forall-threadprivate.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/io-asynchronous.f90
M flang/test/Lower/io-char-array.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-item-list.f90
M flang/test/Lower/io-statement-clean-ups.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/loops2.f90
M flang/test/Lower/loops3.f90
M flang/test/Lower/memory-alloc.f90
M flang/test/Lower/namelist.f90
M flang/test/Lower/nested-where.f90
M flang/test/Lower/nsw.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/parent-component.f90
M flang/test/Lower/pause-statement.f90
M flang/test/Lower/percent-val-actual-argument.f90
M flang/test/Lower/percent-val-value-argument.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-disassociate.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/proc_pointer_hidden_by_generic.f90
M flang/test/Lower/rank-clause02.f90
M flang/test/Lower/reallocate-lhs.f90
M flang/test/Lower/repack-arrays.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/select-type-2.f90
M flang/test/Lower/select-type.f90
M flang/test/Lower/split-sum-expression-tree-lowering.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Lower/structure-constructors.f90
M flang/test/Lower/submodule-async-volatile.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/transformational-intrinsics.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/user-defined-operators.f90
M flang/test/Lower/variable-common-viewed-as-module-var.f90
M flang/test/Lower/variable-inquiries.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Lower/volatile-allocatable.f90
M flang/test/Lower/volatile-allocatable1.f90
M flang/test/Lower/volatile-derived-type-pointer.f90
M flang/test/Lower/volatile-derived-type.f90
M flang/test/Lower/volatile-openmp.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-openmp2.f03
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Lower/where-allocatable-assignments.f90
M flang/test/Lower/where.f90
M flang/test/Lower/zero-size.f90
A flang/test/Parser/fixed-line-length-none-char-continuation.f
A flang/test/Parser/fixed-line-length-none-hollerith-continuation.f
M flang/test/Semantics/CUDA/cuda-managed-implicit-modfile.cuf
A flang/test/Semantics/CUDA/cuda-pinned-implicit-modfile.cuf
A flang/test/Semantics/CUDA/cuf-managed-component-rhs.cuf
M flang/test/Semantics/CUDA/cuf03.cuf
M flang/test/Semantics/OpenMP/clause-validity01.f90
M flang/test/Semantics/OpenMP/linear-clause03.f90
M flang/test/Semantics/PowerPC/ppc-vector-intrinsics.f90
A flang/test/Semantics/call-parameter-boz.f90
A flang/test/Semantics/call-parameter-seq-assoc.f90
M flang/test/Transforms/CUF/cuf-alloc-delay.fir
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/allocatable.f90
M flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_device.mlir
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/implicit_mapper.f90
M flang/test/Transforms/DoConcurrent/local_device.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_init_dealloc.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/map_shape_info.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/nested_derived_type_device.f90
M flang/test/Transforms/DoConcurrent/non_const_bounds.f90
M flang/test/Transforms/DoConcurrent/reduce_add.mlir
M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
M flang/test/Transforms/DoConcurrent/reduce_device.mlir
M flang/test/Transforms/DoConcurrent/reduce_device_min.f90
M flang/test/Transforms/DoConcurrent/reduce_local.mlir
M flang/test/Transforms/DoConcurrent/runtime_sized_array.f90
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
M flang/test/Transforms/DoConcurrent/use_loop_bounds_in_body.f90
M flang/test/Transforms/FIRToMemRef/alloca.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-op.mlir
M flang/test/Transforms/FIRToMemRef/array-coor-slice-shift.mlir
M flang/test/Transforms/FIRToMemRef/complex.mlir
M flang/test/Transforms/FIRToMemRef/convert-opt.mlir
M flang/test/Transforms/FIRToMemRef/derived-types.mlir
M flang/test/Transforms/FIRToMemRef/index-overflow-flags.mlir
M flang/test/Transforms/FIRToMemRef/index.mlir
M flang/test/Transforms/FIRToMemRef/load-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-dynamic.mlir
M flang/test/Transforms/FIRToMemRef/load-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/load-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/logical.mlir
M flang/test/Transforms/FIRToMemRef/omp-wsloop-simd-private.mlir
M flang/test/Transforms/FIRToMemRef/reject-conversions.mlir
M flang/test/Transforms/FIRToMemRef/replace.mlir
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/FIRToMemRef/store-dynamic-shape.mlir
M flang/test/Transforms/FIRToMemRef/store-shift-static.mlir
M flang/test/Transforms/FIRToMemRef/store-static-shape.mlir
M flang/test/Transforms/FIRToMemRef/tbaa-tag.mlir
M flang/test/Transforms/FIRToMemRef/view-op-storage-association.mlir
M flang/test/Transforms/FIRToMemRef/view-op-wraps-array-coor.mlir
M flang/test/Transforms/FIRToMemRef/volatile-codegen.mlir
M flang/test/Transforms/FIRToMemRef/volatile.mlir
M flang/test/Transforms/OpenACC/acc-implicit-copy-reduction.fir
M flang/test/Transforms/OpenACC/acc-implicit-data-device-data.fir
M flang/test/Transforms/OpenACC/acc-implicit-data.fir
M flang/test/Transforms/OpenACC/acc-optimize-firstprivate-map.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate-derived.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-firstprivate.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-kernel-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-parallel.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-private.fir
M flang/test/Transforms/OpenACC/acc-recipe-materialization-reduction.fir
M flang/test/Transforms/OpenACC/offload-target-verifier.fir
M flang/test/Transforms/OpenMP/lower-workdistribute-runtime-assign-scalar.mlir
M flang/test/Transforms/OpenMP/lower-workshare-correct-parallelize.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/OpenMP/should-use-workshare-lowering.mlir
A flang/test/Transforms/allocation-placement-offload-region.fir
M flang/test/Transforms/constant-argument-globalisation.fir
M flang/test/Transforms/debug-107988.fir
M flang/test/Transforms/debug-92391.fir
M flang/test/Transforms/debug-allocatable-1.fir
M flang/test/Transforms/debug-associate-component.fir
M flang/test/Transforms/debug-assumed-rank-array.fir
M flang/test/Transforms/debug-assumed-shape-array-2.fir
M flang/test/Transforms/debug-assumed-shape-array.fir
M flang/test/Transforms/debug-assumed-size-array.fir
M flang/test/Transforms/debug-char-type-2.fir
M flang/test/Transforms/debug-class-type.fir
M flang/test/Transforms/debug-common-block.fir
M flang/test/Transforms/debug-cuf-device-variable.fir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
M flang/test/Transforms/debug-dummy-argument.fir
M flang/test/Transforms/debug-fake-use-multiple-dimensions.fir
M flang/test/Transforms/debug-fake-use-multiple-returns.fir
M flang/test/Transforms/debug-fake-use.fir
M flang/test/Transforms/debug-fixed-array-type.fir
M flang/test/Transforms/debug-fn-info.fir
M flang/test/Transforms/debug-imported-entity.fir
M flang/test/Transforms/debug-include-file.fir
M flang/test/Transforms/debug-local-constant.fir
M flang/test/Transforms/debug-local-global-storage-1.fir
M flang/test/Transforms/debug-local-var.fir
M flang/test/Transforms/debug-module-3.fir
M flang/test/Transforms/debug-omp-target-internal-proc.fir
M flang/test/Transforms/debug-omp-target-op-1.fir
M flang/test/Transforms/debug-omp-target-op-2.fir
M flang/test/Transforms/debug-proc-ptr.fir
M flang/test/Transforms/debug-use-stmt.fir
M flang/test/Transforms/debug-variable-array-dim.fir
M flang/test/Transforms/debug-variable-char-len.fir
M flang/test/Transforms/do-concurrent-localizer-boxchar.fir
M flang/test/Transforms/do-concurrent-localizer-dealloc-region.fir
M flang/test/Transforms/do-concurrent-localizer-init-region.fir
M flang/test/Transforms/do_concurrent-to-do_loop-unodered.fir
M flang/test/Transforms/function-attrs.fir
M flang/test/Transforms/licm-acc-compute-region.fir
M flang/test/Transforms/licm-allocmem-cufaloc.mlir
M flang/test/Transforms/licm-nested-hoist-aggressive.fir
M flang/test/Transforms/licm-non-addressable-resource.mlir
M flang/test/Transforms/licm.fir
M flang/test/Transforms/loop-versioning-with-repack-arrays.fir
M flang/test/Transforms/loop-versioning.fir
M flang/test/Transforms/lower-repack-arrays-openacc.fir
M flang/test/Transforms/lower-repack-arrays-openmp.fir
M flang/test/Transforms/lower-repack-arrays.fir
A flang/test/Transforms/o0-canonicalize.mlir
M flang/test/Transforms/omp-automap-to-target-data.fir
M flang/test/Transforms/omp-map-info-finalization-member-record.fir
M flang/test/Transforms/omp-map-info-finalization-name-loc.fir
M flang/test/Transforms/omp-map-info-finalization.fir
M flang/test/Transforms/omp-maps-for-privatized-symbols.fir
M flang/test/Transforms/omp-reduction-cfg-conversion.fir
M flang/test/Transforms/optimize-array-repacking.fir
M flang/test/Transforms/stack-arrays-alloca-scope.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
A flang/test/Transforms/stack-arrays-offload-region.fir
M flang/test/Transforms/stack-arrays.fir
M flang/test/Transforms/tbaa-cray-pointer.fir
M flang/test/Transforms/tbaa-derived-type-records.fir
M flang/test/Transforms/tbaa-derived-with-descriptor.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-local-alloc-threshold.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-type-converter-boxproc.fir
M flang/test/Transforms/tbaa-value-dummy-arg.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/exclude.txt
M libc/include/dirent.yaml
M libc/include/sys/random.yaml
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/dir.cpp
M libc/src/__support/File/dir.h
A libc/src/__support/File/dir_scan_impl.h
M libc/src/__support/str_to_float.h
M libc/src/__support/threads/linux/thread.cpp
M libc/src/__support/threads/thread.h
M libc/src/dirent/CMakeLists.txt
A libc/src/dirent/alphasort.cpp
A libc/src/dirent/alphasort.h
A libc/src/dirent/scandir.cpp
A libc/src/dirent/scandir.h
M libc/src/string/CMakeLists.txt
M libc/src/string/strcoll.cpp
M libc/src/string/strcoll_l.cpp
M libc/src/string/string_utils.h
M libc/src/sys/random/CMakeLists.txt
A libc/src/sys/random/getentropy.h
M libc/src/sys/random/linux/CMakeLists.txt
A libc/src/sys/random/linux/getentropy.cpp
M libc/test/integration/src/pthread/pthread_equal_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/File/CMakeLists.txt
A libc/test/src/__support/File/dir_scan_impl_test.cpp
M libc/test/src/__support/str_to_double_test.cpp
M libc/test/src/__support/str_to_float_test.cpp
M libc/test/src/__support/str_to_fp_test.h
M libc/test/src/dirent/CMakeLists.txt
A libc/test/src/dirent/alphasort_test.cpp
A libc/test/src/dirent/scandir_test.cpp
M libc/test/src/stdlib/strtod_test.cpp
M libc/test/src/sys/random/linux/CMakeLists.txt
A libc/test/src/sys/random/linux/getentropy_test.cpp
M libcxx/include/__numeric/saturation_arithmetic.h
M libcxx/include/__string/extern_template_lists.h
M libcxx/include/__vector/vector.h
M libcxx/include/string
M libcxx/test/libcxx/thread/thread.condition/PR30202_notify_from_pthread_created_thread.pass.cpp
M libcxx/test/std/input.output/syncstream/osyncstream/thread/several_threads.pass.cpp
M libcxx/test/std/thread/thread.condition/notify_all_at_thread_exit_lwg3343.pass.cpp
M libcxx/test/support/test_iterators.h
M libcxx/test/tools/clang_tidy_checks/abi_tag_on_virtual.cpp
M libcxx/test/tools/clang_tidy_checks/empty_namespaces.cpp
M libcxx/test/tools/clang_tidy_checks/header_exportable_declarations.cpp
M libcxx/test/tools/clang_tidy_checks/hide_from_abi.cpp
M libcxx/test/tools/clang_tidy_checks/libcpp_module.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_adl.cpp
M libcxx/test/tools/clang_tidy_checks/robust_against_operator_ampersand.cpp
M libcxx/test/tools/clang_tidy_checks/uglify_attributes.cpp
M libcxx/utils/ci/docker/docker-compose.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
M libsycl/include/sycl/__impl/backend.hpp
M libsycl/include/sycl/__impl/context.hpp
M libsycl/include/sycl/__impl/detail/config.hpp
M libsycl/include/sycl/__impl/detail/kernel_arg_helpers.hpp
M libsycl/include/sycl/__impl/detail/kernel_submission.hpp
M libsycl/include/sycl/__impl/detail/linearization.hpp
M libsycl/include/sycl/__impl/detail/obj_utils.hpp
M libsycl/include/sycl/__impl/detail/unified_range_view.hpp
M libsycl/include/sycl/__impl/device.hpp
M libsycl/include/sycl/__impl/device_selector.hpp
M libsycl/include/sycl/__impl/event.hpp
M libsycl/include/sycl/__impl/exception.hpp
M libsycl/include/sycl/__impl/group.hpp
M libsycl/include/sycl/__impl/group_barrier.hpp
M libsycl/include/sycl/__impl/handler.hpp
M libsycl/include/sycl/__impl/index_space_classes.hpp
M libsycl/include/sycl/__impl/nd_item.hpp
M libsycl/include/sycl/__impl/platform.hpp
M libsycl/include/sycl/__impl/queue.hpp
M libsycl/include/sycl/__impl/sub_group.hpp
M libsycl/include/sycl/__impl/usm_functions.hpp
R libsycl/include/sycl/__spirv/spirv_types.hpp
R libsycl/include/sycl/__spirv/spirv_vars.hpp
A libsycl/include/sycl/__spirv/types.hpp
A libsycl/include/sycl/__spirv/vars.hpp
M libsycl/include/sycl/sycl.hpp
M libsycl/src/context.cpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/context_impl.hpp
M libsycl/src/detail/device_binary_structures.hpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/device_impl.hpp
M libsycl/src/detail/device_kernel_info.hpp
M libsycl/src/detail/event_impl.cpp
M libsycl/src/detail/event_impl.hpp
M libsycl/src/detail/global_objects.cpp
M libsycl/src/detail/global_objects.hpp
M libsycl/src/detail/handler_impl.hpp
M libsycl/src/detail/offload/offload_topology.hpp
M libsycl/src/detail/offload/offload_utils.cpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/platform_impl.cpp
M libsycl/src/detail/platform_impl.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/detail/queue_impl.hpp
M libsycl/src/detail/spinlock.hpp
M libsycl/src/detail/suppress_extra_warnings.hpp
M libsycl/src/device.cpp
M libsycl/src/device_selector.cpp
M libsycl/src/event.cpp
M libsycl/src/exception.cpp
M libsycl/src/exception_list.cpp
M libsycl/src/handler.cpp
M libsycl/src/platform.cpp
M libsycl/src/queue.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/.clang-format
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_depends_on.cpp
M libsycl/test/basic/handler/handler_parallel_for_arg_restrictions.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
M libsycl/test/basic/handler/handler_parallel_for_runtime.cpp
A libsycl/test/basic/handler/handler_single_task_named_functor.cpp
R libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/index_space_classes_negative.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/no_rdc_multi_tu.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
A libsycl/test/basic/queue_single_task.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
R libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/Inputs/fill_memset_common.hpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
M libsycl/tools/sycl-ls/sycl-ls.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/context/context_ctors.cpp
M libsycl/unittests/handler/memcpy.cpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/handler/test_helpers.hpp
M libsycl/unittests/mock/helpers.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libunwind/src/Registers.hpp
M libunwind/test/aarch64_za_unwind.pass.cpp
M libunwind/test/ra_sign_state.pass.cpp
M lld/ELF/Arch/AArch64.cpp
M lld/ELF/Arch/LoongArch.cpp
M lld/ELF/Driver.cpp
M lld/MachO/BPSectionOrderer.cpp
M lld/MachO/InputFiles.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/MarkLive.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/SyntheticSections.cpp
A lld/test/ELF/aarch64-tls-le-ldst.s
M lld/test/ELF/aarch64-tls-le.s
A lld/test/ELF/loongarch-relax-call-stress.s
A lld/test/ELF/loongarch-relax-pcrel-stress.s
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/python/python-typemaps.swig
M lldb/cmake/caches/Apple-lldb-macOS.cmake
M lldb/cmake/modules/AddLLDB.cmake
M lldb/cmake/modules/LLDBStandalone.cmake
M lldb/docs/resources/formatterbytecode.md
M lldb/examples/python/formatter_bytecode.py
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/Core/Disassembler.h
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/include/lldb/DataFormatters/FormatterBytecode.h
M lldb/include/lldb/Host/HostNativeThreadBase.h
M lldb/include/lldb/Host/windows/HostThreadWindows.h
A lldb/include/lldb/Host/windows/PathUtils.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedProcessInterface.h
M lldb/include/lldb/Target/BorrowedStackFrame.h
M lldb/include/lldb/Target/DynamicLoader.h
M lldb/include/lldb/Target/Platform.h
M lldb/include/lldb/Target/StackFrame.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/TargetList.h
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/include/lldb/Target/ThreadPlanStepUntil.h
M lldb/packages/Python/lldbsuite/test/lldbutil.py
M lldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Core/Disassembler.cpp
M lldb/source/Core/DynamicLoader.cpp
M lldb/source/Core/IOHandler.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Module.cpp
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/DataFormatters/TypeSynthetic.cpp
M lldb/source/Host/common/HostNativeThreadBase.cpp
M lldb/source/Host/windows/ConnectionGenericFileWindows.cpp
M lldb/source/Host/windows/FileSystem.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Host/windows/HostThreadWindows.cpp
M lldb/source/Plugins/Disassembler/LLVMC/DisassemblerLLVMC.cpp
M lldb/source/Plugins/DynamicLoader/Hexagon-DYLD/DynamicLoaderHexagonDYLD.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOSXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DYLDRendezvous.cpp
M lldb/source/Plugins/DynamicLoader/POSIX-DYLD/DynamicLoaderPOSIXDYLD.cpp
M lldb/source/Plugins/DynamicLoader/Windows-DYLD/DynamicLoaderWindowsDYLD.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformDarwin.h
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.cpp
M lldb/source/Plugins/Platform/MacOSX/PlatformMacOSX.h
M lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
M lldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
M lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.cpp
M lldb/source/Plugins/Process/Windows/Common/DebuggerThread.h
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/source/Plugins/Process/Windows/Common/TargetThreadWindows.cpp
M lldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
M lldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
M lldb/source/Plugins/Process/scripted/ScriptedProcess.cpp
M lldb/source/Plugins/ScriptInterpreter/Lua/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/CMakeLists.txt
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedProcessPythonInterface.h
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/BorrowedStackFrame.cpp
M lldb/source/Target/Platform.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetList.cpp
M lldb/source/Target/ThreadPlan.cpp
M lldb/source/Target/ThreadPlanStack.cpp
M lldb/source/Target/ThreadPlanStepOut.cpp
M lldb/source/Target/ThreadPlanStepUntil.cpp
M lldb/test/API/api/multithreaded/TestMultithreaded.py
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
M lldb/test/API/commands/process/attach/TestProcessAttach.py
A lldb/test/API/functionalities/gdb_remote_client/TestEmptyThreadList.py
A lldb/test/API/functionalities/inline-frame-pc/Makefile
A lldb/test/API/functionalities/inline-frame-pc/TestInlineFrameUntil.py
A lldb/test/API/functionalities/inline-frame-pc/main.c
A lldb/test/API/functionalities/module_aliased_path/Makefile
A lldb/test/API/functionalities/module_aliased_path/TestModuleAliasedPath.py
A lldb/test/API/functionalities/module_aliased_path/foo.c
A lldb/test/API/functionalities/module_aliased_path/main.c
M lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
M lldb/test/API/functionalities/scripted_extensions/TestScriptedExtensionsDiagnostics.py
M lldb/test/API/functionalities/scripted_process/TestScriptedProcess.py
M lldb/test/API/functionalities/scripted_process/addressable_bits_scripted_process.py
M lldb/test/API/functionalities/thread/exit_during_step/TestExitDuringStep.py
A lldb/test/API/functionalities/thread/step_out_inline/Makefile
A lldb/test/API/functionalities/thread/step_out_inline/TestThreadStepOutInline.py
A lldb/test/API/functionalities/thread/step_out_inline/main.c
M lldb/test/API/functionalities/thread/step_until/TestStepUntilAPI.py
M lldb/test/API/functionalities/thread/thread_exit/TestThreadExit.py
M lldb/test/API/python_api/process/read-mem-cstring/TestReadMemCString.py
M lldb/test/API/python_api/process/read-mem-cstring/main.c
M lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_no_lldbinit_flag.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/test/API/tools/lldb-dap/save-core/TestDAP_save_core.py
M lldb/test/API/tools/lldb-dap/server/TestDAP_server.py
M lldb/test/API/tools/lldb-server/TestLldbGdbServer.py
M lldb/test/API/tools/lldb-server/attach-wait/TestGdbRemoteAttachWait.py
M lldb/test/API/tools/lldb-server/main.cpp
A lldb/test/Shell/ObjectFile/ELF/gnu-debuglink-without-file-name.yaml
A lldb/test/Shell/ObjectFile/PECOFF/gnu-debuglink-without-file-name.yaml
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/windows/PathUtilsTest.cpp
M lldb/unittests/Protocol/MCPPluginTest.cpp
M lldb/unittests/Target/CMakeLists.txt
A lldb/unittests/Target/ExecutableModuleTest.cpp
M llvm/bindings/ocaml/executionengine/executionengine_ocaml.c
M llvm/bindings/ocaml/executionengine/llvm_executionengine.ml
M llvm/bindings/ocaml/executionengine/llvm_executionengine.mli
M llvm/bindings/ocaml/llvm/llvm.ml
M llvm/bindings/ocaml/llvm/llvm.mli
M llvm/bindings/ocaml/llvm/llvm_ocaml.c
M llvm/bindings/ocaml/llvm/llvm_ocaml.h
M llvm/bindings/ocaml/target/llvm_target.ml
M llvm/bindings/ocaml/target/llvm_target.mli
M llvm/bindings/ocaml/target/target_ocaml.c
M llvm/cmake/modules/HandleLLVMOptions.cmake
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/CommandGuide/llvm-offload-binary.md
M llvm/docs/CommandLine.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GlobalISel/GMIR.md
M llvm/docs/GlobalISel/IRTranslator.md
M llvm/docs/GlobalISel/index.md
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/WritingAnLLVMPass.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/Target.h
M llvm/include/llvm-c/TargetMachine.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/ilist_iterator.h
M llvm/include/llvm/Analysis/BlockFrequencyInfo.h
M llvm/include/llvm/Analysis/ConstraintSystem.h
M llvm/include/llvm/Analysis/CycleAnalysis.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScopedNoAliasAA.h
R llvm/include/llvm/Analysis/SyntheticCountsUtils.h
M llvm/include/llvm/Analysis/TargetLibraryInfo.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CAS/BuiltinObjectHasher.h
M llvm/include/llvm/CodeGen/Analysis.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/GlobalISel/Utils.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MachineInstr.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/SelectionDAG.h
M llvm/include/llvm/CodeGen/SpillPlacement.h
M llvm/include/llvm/CodeGen/TargetInstrInfo.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/pch.h
M llvm/include/llvm/DebugInfo/DIContext.h
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_mips.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
A llvm/include/llvm/ExecutionEngine/JITLink/mips.h
M llvm/include/llvm/FileCheck/FileCheck.h
M llvm/include/llvm/Frontend/OpenMP/ConstructDecompositionT.h
M llvm/include/llvm/Frontend/OpenMP/OMP.h
M llvm/include/llvm/Frontend/OpenMP/OMPDescriptors.h
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/Constants.h
M llvm/include/llvm/IR/EHPersonalities.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/InstrTypes.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/MDBuilder.h
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/PatternMatch.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/include/llvm/IR/ValueMap.h
M llvm/include/llvm/MCA/Support.h
M llvm/include/llvm/Object/OffloadBinary.h
M llvm/include/llvm/ObjectYAML/OffloadYAML.h
A llvm/include/llvm/Option/LibraryOptions.h
A llvm/include/llvm/Option/LibraryOptions.td
M llvm/include/llvm/Option/OptTable.h
M llvm/include/llvm/Option/Option.h
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/SandboxIR/Module.h
M llvm/include/llvm/SandboxIR/Utils.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/Compiler.h
M llvm/include/llvm/Support/ErrorOr.h
M llvm/include/llvm/Support/GenericIteratedDominanceFrontier.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetOptions.h
M llvm/include/llvm/Transforms/IPO/Attributor.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/include/llvm/Transforms/Utils/Cloning.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Legality.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/Targets/AMDGPU.cpp
M llvm/lib/Analysis/BlockFrequencyInfo.cpp
M llvm/lib/Analysis/CMakeLists.txt
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScopedNoAliasAA.cpp
R llvm/lib/Analysis/SyntheticCountsUtils.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.h
M llvm/lib/CAS/BuiltinObjectHasher.cpp
M llvm/lib/CAS/OnDiskCommon.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
A llvm/lib/CGData/CGDataOptions.cpp
A llvm/lib/CGData/CGDataOptions.h
A llvm/lib/CGData/CGDataOptions.td
M llvm/lib/CGData/CMakeLists.txt
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CGData/StableFunctionMap.cpp
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/Analysis.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AsmPrinter/DIE.cpp
M llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h
M llvm/lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfDebug.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
M llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
M llvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/CMakeLists.txt
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
M llvm/lib/CodeGen/GlobalISel/Utils.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/LiveDebugValues/LiveDebugValues.cpp
M llvm/lib/CodeGen/LiveDebugValues/VarLocBasedImpl.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.cpp
M llvm/lib/CodeGen/MIRParser/MILexer.h
M llvm/lib/CodeGen/MIRParser/MIParser.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocBasic.h
M llvm/lib/CodeGen/RegisterCoalescer.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/FunctionLoweringInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/SDNodeDbgValue.h
M llvm/lib/CodeGen/SelectionDAG/SDNodeInfo.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
R llvm/lib/CodeGen/TargetOptionsImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/DebugInfo/DWARF/DWARFDie.cpp
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/COFFLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
A llvm/lib/ExecutionEngine/JITLink/ELF_mips.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/XCOFFLinkGraphBuilder.cpp
A llvm/lib/ExecutionEngine/JITLink/mips.cpp
M llvm/lib/ExecutionEngine/Orc/COFFAutoImportGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/SectCreate.cpp
M llvm/lib/FileCheck/FileCheck.cpp
M llvm/lib/Frontend/OpenMP/OMPDescriptors.cpp
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/HTTP/HTTPClient.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/EHPersonalities.cpp
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/MDBuilder.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/MC/CMakeLists.txt
M llvm/lib/MC/MCAsmInfo.cpp
M llvm/lib/MC/MCAsmInfoXCOFF.cpp
A llvm/lib/MC/MCCLOptions.cpp
A llvm/lib/MC/MCCLOptions.h
A llvm/lib/MC/MCCLOptions.td
M llvm/lib/MC/MCLFI.cpp
M llvm/lib/MC/MCSchedule.cpp
M llvm/lib/MCA/InstrBuilder.cpp
M llvm/lib/Object/OffloadBinary.cpp
M llvm/lib/ObjectYAML/OffloadEmitter.cpp
M llvm/lib/ObjectYAML/OffloadYAML.cpp
M llvm/lib/Option/CMakeLists.txt
A llvm/lib/Option/LibraryOptions.cpp
M llvm/lib/Option/OptTable.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
M llvm/lib/Target/AArch64/AArch64RegisterInfo.h
M llvm/lib/Target/AArch64/AArch64SMEAttributes.h
M llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/lib/Target/AArch64/AArch64SchedPredNeoverse.td
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MachineSMEABIPass.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.h
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
M llvm/lib/Target/AMDGPU/AMDGPUNextUseAnalysis.h
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeHelper.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/MIMGInstructions.td
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
M llvm/lib/Target/AMDGPU/SIPreEmitPeephole.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SMInstructions.td
M llvm/lib/Target/AMDGPU/VOP1Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/AMDGPU/VOPInstructions.td
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.h
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
M llvm/lib/Target/ARM/ARMBaseRegisterInfo.h
M llvm/lib/Target/ARM/ARMFastISel.cpp
M llvm/lib/Target/ARM/ARMInstrNEON.td
M llvm/lib/Target/ARM/MVEGatherScatterLowering.cpp
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
M llvm/lib/Target/Hexagon/HexagonRDFOpt.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXCodeGenPassBuilder.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXSubtarget.h
M llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCInstrInfo.td
M llvm/lib/Target/PowerPC/PPCInstrVSX.td
M llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
M llvm/lib/Target/PowerPC/PPCRegisterInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrFormats.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXMips.td
M llvm/lib/Target/RISCV/RISCVInstrInfoY.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZclsd.td
M llvm/lib/Target/RISCV/RISCVInstrInfoZilsd.td
M llvm/lib/Target/RISCV/RISCVRedundantCopyElimination.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp
M llvm/lib/Target/RISCV/RISCVRegisterInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
A llvm/lib/Target/RISCV/RISCVVectorUtils.h
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.cpp
M llvm/lib/Target/SPIRV/SPIRVGlobalRegistry.h
M llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SPIRV/SPIRVPrepareGlobals.cpp
M llvm/lib/Target/Sparc/CMakeLists.txt
M llvm/lib/Target/Sparc/DelaySlotFiller.cpp
M llvm/lib/Target/Sparc/SparcFrameLowering.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.cpp
M llvm/lib/Target/Sparc/SparcInstrInfo.td
A llvm/lib/Target/Sparc/SparcOptions.td
M llvm/lib/Target/Sparc/SparcRegisterInfo.cpp
M llvm/lib/Target/Sparc/SparcSchedule.td
M llvm/lib/Target/Sparc/SparcSubtarget.cpp
M llvm/lib/Target/Sparc/SparcSubtarget.h
M llvm/lib/Target/Sparc/SparcTargetMachine.cpp
M llvm/lib/Target/Sparc/SparcTargetMachine.h
M llvm/lib/Target/SystemZ/SystemZInstrInfo.cpp
M llvm/lib/Target/SystemZ/SystemZInstrInfo.h
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.cpp
M llvm/lib/Target/SystemZ/SystemZRegisterInfo.h
M llvm/lib/Target/Target.cpp
M llvm/lib/Target/TargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyFastISel.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyLowerEmscriptenEHSjLj.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyRefTypeMem2Local.cpp
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/lib/Target/X86/X86FastPreTileConfig.cpp
M llvm/lib/Target/X86/X86FixupLEAs.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86InstrInfo.h
M llvm/lib/Target/X86/X86InstrMisc.td
M llvm/lib/Target/X86/X86IntrinsicsInfo.h
M llvm/lib/Target/X86/X86LFIRewritePass.cpp
M llvm/lib/Target/X86/X86PreTileConfig.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
M llvm/lib/Transforms/Coroutines/CoroSplit.cpp
M llvm/lib/Transforms/IPO/Attributor.cpp
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
M llvm/lib/Transforms/IPO/OpenMPOpt.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/CMakeLists.txt
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.cpp
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.h
A llvm/lib/Transforms/InstCombine/InstCombineCLOptions.td
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
M llvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/DataFlowSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/lib/Transforms/Scalar/LoopSimplifyCFG.cpp
M llvm/lib/Transforms/Scalar/ScalarizeMaskedMemIntrin.cpp
M llvm/lib/Transforms/Scalar/SeparateConstOffsetFromGEP.cpp
M llvm/lib/Transforms/Utils/CloneFunction.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/BundleVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanLowering.cpp
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Analysis/AliasSet/intrinsics.ll
M llvm/test/Analysis/BasicAA/noalias-scope-decl.ll
M llvm/test/Analysis/CostModel/AArch64/masked_compress_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_expand_load.ll
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp-select.ll
A llvm/test/Analysis/CostModel/AMDGPU/cmp.ll
M llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
M llvm/test/Analysis/CostModel/AMDGPU/fsub.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
M llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
A llvm/test/Analysis/CostModel/AMDGPU/select.ll
A llvm/test/Analysis/CostModel/NVPTX/v4i8-scalarization.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/LoopAccessAnalysis/noalias-scope-decl.ll
M llvm/test/Analysis/LoopAccessAnalysis/num-iters-for-store-load-conflict.ll
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
A llvm/test/Analysis/LoopAccessAnalysis/runtime-checks-may-not-return-call.ll
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging-i128.ll
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging-limits.ll
A llvm/test/Analysis/LoopAccessAnalysis/stencil-group-merging.ll
M llvm/test/Analysis/MemorySSA/noalias-scope-decl.ll
M llvm/test/Analysis/ScalarEvolution/addrec-computed-during-addrec-calculation.ll
M llvm/test/Analysis/ScalarEvolution/exit-count-greater-than.ll
M llvm/test/Analysis/ScalarEvolution/exit-value-nowrap-flags.ll
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
M llvm/test/Analysis/ScopedNoAliasAA/alias-scope-merging.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic.ll
M llvm/test/Analysis/ScopedNoAliasAA/basic2.ll
A llvm/test/Analysis/ScopedNoAliasAA/disjoint-domains.ll
M llvm/test/Analysis/ScopedNoAliasAA/fence-modref.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/intrinsics.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/branch-outside.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/exit-divergence.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/irreducible/reducible-headers.ll
M llvm/test/Analysis/UniformityAnalysis/AMDGPU/phi_div_loop.ll
M llvm/test/Analysis/ValueTracking/memory-dereferenceable.ll
M llvm/test/Assembler/incomplete-ir-metadata.ll
M llvm/test/Bindings/OCaml/debuginfo.ml
A llvm/test/Bitcode/upgrade-alias-scope-domains.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-fmuladd.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-stackprotect.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/blockaddress-stale-addresstaken.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-cse.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/constant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-cpp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/debug-insts.ll
M llvm/test/CodeGen/AArch64/GlobalISel/dynamic-alloca.ll
M llvm/test/CodeGen/AArch64/GlobalISel/fconstant-dbg-loc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-atomic-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-bitcast.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-condbr-lower-tree.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-constrained-fcmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dilocation.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-dynamic-alloca-scalable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extends.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-extract-used-by-dbg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fixed-point-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fp-min-max-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-fpenv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-gep-flags.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-indirect-br-repeated-block.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-invoke-probabilities.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-load-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-max-address-space.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memcpy-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memfunc-undef.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-memset-inline.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-nneg-disjoint.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-one-by-n-vector-ptr-add.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-reductions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sincos.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-split-vector-arg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-objects.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stepvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-store-metadata.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-subvector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-sucmp.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-switch-bittest.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-tbaa.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-trunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vararg.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-deinterleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vector-interleave2.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-vscale.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-weird-alloca-size.ll
M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
M llvm/test/CodeGen/AArch64/GlobalISel/phi-with-empty-type.ll
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizer-combiner-use-vector-truncate.mir
M llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
M llvm/test/CodeGen/AArch64/GlobalISel/ret-vec-promote.ll
M llvm/test/CodeGen/AArch64/GlobalISel/split-wide-shifts-multiway.ll
M llvm/test/CodeGen/AArch64/GlobalISel/threadlocal-address.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-ret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument-multiple.ll
M llvm/test/CodeGen/AArch64/GlobalISel/translate-sve-formal-argument.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vastart.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-param.ll
M llvm/test/CodeGen/AArch64/GlobalISel/vec-s16-param.ll
M llvm/test/CodeGen/AArch64/aarch64-mops.ll
M llvm/test/CodeGen/AArch64/aarch64-sme-za-call-lowering.ll
M llvm/test/CodeGen/AArch64/arm64-vadd.ll
A llvm/test/CodeGen/AArch64/arm64_32-mops.ll
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/clmul-fixed.ll
M llvm/test/CodeGen/AArch64/dbg-declare-swift-async.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async-non-entry-block.ll
M llvm/test/CodeGen/AArch64/dbg-value-swift-async.ll
M llvm/test/CodeGen/AArch64/dereferenceable-metadata-mmo.ll
M llvm/test/CodeGen/AArch64/fixed-vector-deinterleave.ll
M llvm/test/CodeGen/AArch64/fixed-vector-interleave.ll
M llvm/test/CodeGen/AArch64/frem-power2.ll
M llvm/test/CodeGen/AArch64/fsh.ll
M llvm/test/CodeGen/AArch64/func-argpassing.ll
M llvm/test/CodeGen/AArch64/funnel-shift.ll
M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
M llvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
M llvm/test/CodeGen/AArch64/interleaved-accesses.ll
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
A llvm/test/CodeGen/AArch64/machine-combiner-fma-chain.ll
A llvm/test/CodeGen/AArch64/machine-sme-abi-dead-nzcv.ll
M llvm/test/CodeGen/AArch64/machine-sme-abi-find-insert-pt.mir
M llvm/test/CodeGen/AArch64/machine-sme-abi-skip-debug-inst.mir
M llvm/test/CodeGen/AArch64/memcpy-scoped-aa.ll
M llvm/test/CodeGen/AArch64/memsize-remarks.ll
M llvm/test/CodeGen/AArch64/merge-scoped-aa-store.ll
A llvm/test/CodeGen/AArch64/mops-dead-nzcv.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
M llvm/test/CodeGen/AArch64/select_const.ll
A llvm/test/CodeGen/AArch64/sext-asr.ll
M llvm/test/CodeGen/AArch64/shift-mod.ll
M llvm/test/CodeGen/AArch64/shift.ll
A llvm/test/CodeGen/AArch64/shuffle-insert-zero.ll
M llvm/test/CodeGen/AArch64/sme-abi-eh-liveins.mir
M llvm/test/CodeGen/AArch64/sme-avoid-coalescing-locally-streaming.ll
M llvm/test/CodeGen/AArch64/sme-lazy-sve-nzcv-live.mir
A llvm/test/CodeGen/AArch64/sme-non-lazy-save-za.ll
M llvm/test/CodeGen/AArch64/sme-streaming-checkvl-mir.ll
M llvm/test/CodeGen/AArch64/sme-streaming-mode-landingpads.ll
M llvm/test/CodeGen/AArch64/speculative-load-intrinsic-mmo.ll
M llvm/test/CodeGen/AArch64/streaming-compatible-memory-ops.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/CodeGen/AArch64/tbl-loops.ll
M llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
M llvm/test/CodeGen/AArch64/vldn_shuffle.ll
M llvm/test/CodeGen/AArch64/zext-shuffle.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/amdgpu-irtranslator.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/combine-fma-sub-ext-neg-mul.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fabs.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fadd.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fma.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fminnum.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fmul.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fneg.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fptrunc.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fsub.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/function-returns.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslate-bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-cs-chain.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgcn-sendmsg.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel-system-sgprs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_ps.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_vs.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constant-fold-vector-op.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constantexpr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-constrained-fp.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fast-math-flags.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fence.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-fixed-function-abi-vgpr-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.v2i65.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-invariant.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-memory-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-metadata.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces-vectors.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-non-integral-address-spaces.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-prefetch.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-ptrmask.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-readnone-intrinsic-callsite.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-struct-return-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-tail-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-zext-vec-index.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/is-safe-to-sink-bug.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap-gfx11.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ballot.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.make.buffer.rsrc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.add.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.cmpswap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.fadd.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.sub.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.atomic.swap.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workgroup.id.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/promote-dependency-on-invariant-result.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn-s-buffer-load.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-agpr.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-waterfall-call.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fadd.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fma.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fmul.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/strict_fsub.bf16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/udiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/urem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/add.ll
M llvm/test/CodeGen/AMDGPU/add_i1.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.16bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-miscellaneous-uniform-intrinsic.ll
M llvm/test/CodeGen/AMDGPU/andorbitset.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-expand.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/attributor-flatscratchinit-globalisel.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
M llvm/test/CodeGen/AMDGPU/blender-no-live-segment-at-def-implicit-def.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/cf-loop-on-constant.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
M llvm/test/CodeGen/AMDGPU/cgp-bitfield-extract.ll
A llvm/test/CodeGen/AMDGPU/coalescer-subreg-undef-in-bundle.mir
M llvm/test/CodeGen/AMDGPU/coalescer_distribute.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
M llvm/test/CodeGen/AMDGPU/combine-add-zext-xor.ll
M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
M llvm/test/CodeGen/AMDGPU/convergence-tokens.ll
M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
M llvm/test/CodeGen/AMDGPU/dagcombine-select.ll
M llvm/test/CodeGen/AMDGPU/default-fp-mode.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/dpp_combine-true16.mir
M llvm/test/CodeGen/AMDGPU/ds_read2.ll
M llvm/test/CodeGen/AMDGPU/dynamic_stackalloc.ll
M llvm/test/CodeGen/AMDGPU/early-if-convert.ll
M llvm/test/CodeGen/AMDGPU/eliminate-frame-index-select.ll
M llvm/test/CodeGen/AMDGPU/exec-mask-opt-cannot-create-empty-or-backward-segment.ll
M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll
M llvm/test/CodeGen/AMDGPU/expand-scalar-carry-out-select-user.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
M llvm/test/CodeGen/AMDGPU/fix-wwm-vgpr-copy.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fmin_fmax_legacy.amdgcn.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
A llvm/test/CodeGen/AMDGPU/fold-and-exec-wave32.mir
A llvm/test/CodeGen/AMDGPU/fold-and-exec.mir
M llvm/test/CodeGen/AMDGPU/fold-fabs.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/gep-const-address-space.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-agpr-small.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-phi-uniform-branch.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/infer-addrspace-flat-atomic.ll
M llvm/test/CodeGen/AMDGPU/infinite-loop.ll
M llvm/test/CodeGen/AMDGPU/insert-delay-alu-bug.ll
M llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-crash.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/internalize.ll
Log Message:
-----------
rebase to main
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/38bf0c675315...04f218778473
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