[all-commits] [llvm/llvm-project] 7ae4aa: [SelectionDAG] Take phi op divergence from the op ...

[Jay Foad via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7ae4aabf6d49ac1a3a5a9a6d7bc0e8778d66ee43
      https://github.com/llvm/llvm-project/commit/7ae4aabf6d49ac1a3a5a9a6d7bc0e8778d66ee43
  Author: Jay Foad <jay.foad at amd.com>
  Date:   2026-09-30 (Wed, 30 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
    M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
    M llvm/test/CodeGen/AMDGPU/bb-prolog-spill-during-regalloc.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-flat.ll
    M llvm/test/CodeGen/AMDGPU/cgp-addressing-modes-gfx1030.ll
    M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
    M llvm/test/CodeGen/AMDGPU/collapse-endcf.ll
    M llvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
    M llvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
    M llvm/test/CodeGen/AMDGPU/dagcombine-fma-crash.ll
    M llvm/test/CodeGen/AMDGPU/div_i128.ll
    M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
    M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
    M llvm/test/CodeGen/AMDGPU/expand-mov-b64-globaladdr.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-nondeterminism.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-phi-regression-issue130646-issue130119.ll
    M llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-sgpr32-to-vgpr16.ll
    M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-rtn.ll
    M llvm/test/CodeGen/AMDGPU/implicit-def-muse.ll
    M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i32.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ballot.i64.ll
    M llvm/test/CodeGen/AMDGPU/loop_break.ll
    M llvm/test/CodeGen/AMDGPU/machine-sink-loop-var-out-of-divergent-loop-swdev407790.ll
    M llvm/test/CodeGen/AMDGPU/mad_int24.ll
    M llvm/test/CodeGen/AMDGPU/masked-load-vectortypes.ll
    M llvm/test/CodeGen/AMDGPU/mfma-loop.ll
    M llvm/test/CodeGen/AMDGPU/mmra.ll
    M llvm/test/CodeGen/AMDGPU/multilevel-break.ll
    M llvm/test/CodeGen/AMDGPU/no-fold-accvgpr-mov.ll
    M llvm/test/CodeGen/AMDGPU/permute.ll
    M llvm/test/CodeGen/AMDGPU/phi-av-pressure.ll
    A llvm/test/CodeGen/AMDGPU/phi-constant-operand-regclass.ll
    M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
    M llvm/test/CodeGen/AMDGPU/reg-coalescer-sched-crash.ll
    M llvm/test/CodeGen/AMDGPU/rem_i128.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-mfma-form-spill-cost-reset.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
    M llvm/test/CodeGen/AMDGPU/scheduler-rp-calc-one-successor-two-predecessors-bug.ll
    M llvm/test/CodeGen/AMDGPU/sdwa-peephole.ll
    M llvm/test/CodeGen/AMDGPU/set-inactive-wwm-overwrite.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-control-flow.ll
    M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
    M llvm/test/CodeGen/AMDGPU/sink-fmul-fadd.ll
    M llvm/test/CodeGen/AMDGPU/structurize-hoist.ll
    M llvm/test/CodeGen/AMDGPU/tuple-allocation-failure.ll
    M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
    M llvm/test/CodeGen/AMDGPU/uniform_branch_with_floating_point_cond.ll
    M llvm/test/CodeGen/AMDGPU/use-after-free-after-cleanup-failed-vreg.ll
    M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
    M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
    M llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll
    M llvm/test/CodeGen/AMDGPU/wwm-reserved.ll

  Log Message:
  -----------
  [SelectionDAG] Take phi op divergence from the op not the phi (#220853)

When creating registers for phi operands, take the type and the
IsDivergent bit from the operand not from the result of the phi node.

In practice this only affects AMDGPU and only affects constants used as
operands to a divergent phi. The effect is to put the constant into an
SGPR even if the result of the phi is a VGPR.

As well as fixing a correctness problem that arose when enabling
-structurizecfg-skip-uniform-regions, this has a small overall effect in
increasing SALU usage but reducing VALU usage. Overall register usage is
generally unaffected, except in some regalloc stress tests.

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>

Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>



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