[all-commits] [llvm/llvm-project] 730a75: [lldb][test] Fix undefined behaviour in multi proc...
Stefan Gränitz via All-commits
all-commits at lists.llvm.org
Wed Sep 30 08:04:07 PDT 2026
Branch: refs/heads/users/mhalk/fix/amdgpu-mfma-hazard-nfc-prep
Home: https://github.com/llvm/llvm-project
Commit: 730a75dac7424ccab004bb9a5d5c049df70da486
https://github.com/llvm/llvm-project/commit/730a75dac7424ccab004bb9a5d5c049df70da486
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp
Log Message:
-----------
[lldb][test] Fix undefined behaviour in multi process driver (#226949)
This code was using strcmp on function names. Function names can be null
(see SBFrame::GetFunctionName), and passing null to strcmp is UB.
Commit: 8fc7db22b75c612dca2856e987ca8687a609b47c
https://github.com/llvm/llvm-project/commit/8fc7db22b75c612dca2856e987ca8687a609b47c
Author: Dávid Bolvanský <david.bolvansky at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
Log Message:
-----------
[BasicAA] Compute minimal access extents lazily (#226931)
`aliasCheck` computes the minimal extent of an access before calling
`isObjectSmallerThan`, even though the latter immediately returns false
when the other pointer is not an identified object.
Move the extent computation behind the existing `isIdentifiedObject`
check. This preserves the result: whenever the extent can affect the
answer, the same value is computed and used as before; otherwise only
unused work is skipped.
Commit: 5f0298ce0e187c36b3f5a94138049a6d5395c9cf
https://github.com/llvm/llvm-project/commit/5f0298ce0e187c36b3f5a94138049a6d5395c9cf
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/strength-reducible-address.ll
Log Message:
-----------
[SLP] Add tests for affine loop address computations (NFC) (#226907)
Precommit tests for #226220: related affine address recurrences in a
loop whose index arithmetic SLP currently vectorizes and extracts per
lane for scalar loads and stores, which LSR would otherwise turn into
pointer increments.
`X86/strength-reducible-address.ll` has Haswell and skylake-avx512 RUN
lines. It covers strided loads, constant-offset GEPs, and a load/store
at the same address. The negative cases are loop-loaded offsets,
escaping addresses, and offsets computed in the preheader. The checks
are generated with current main.
Commit: e7e22afd369304eb3f6e0b7e62c03a67777e484b
https://github.com/llvm/llvm-project/commit/e7e22afd369304eb3f6e0b7e62c03a67777e484b
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
Log Message:
-----------
[GlobalISel] Support GISelValueTracking for G_FREEZE. (#223696)
Port the SDAG FREEZE handling to GlobalISel. Look through G_FREEZE in
computeKnownBits, computeNumSignBits, and computeKnownFPClass when the
source is guaranteed not undef or poison.
Part of #150515.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: e463073509a90cde743b5ca6f8c94492f353d3f5
https://github.com/llvm/llvm-project/commit/e463073509a90cde743b5ca6f8c94492f353d3f5
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Combine truncate(buildvector) -> buildvector (#223787)
If late in the pipeline we are left with truncate(buildvector), we can
generate the buildvector directly. This helps remove the xtn and can
lead to other simplification.
Commit: e5d390a5537401f4c2edf165ec27325eb02381b4
https://github.com/llvm/llvm-project/commit/e5d390a5537401f4c2edf165ec27325eb02381b4
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/tools/clang-ssaf-src-edit-merge/SrcEditMerge.cpp
Log Message:
-----------
[SystemZ][z/OS] Open text files as text (#226518)
This patch fixes lit regressions in clang-ssaf-src-edit-merge by opening
text files as text.
Commit: 0c86d9c000df4e7b59082ba98594271d532609fb
https://github.com/llvm/llvm-project/commit/0c86d9c000df4e7b59082ba98594271d532609fb
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
Log Message:
-----------
[DWARFYAML] Declare `OffsetEntryCount` as `uint64_t` (#224631)
This prevents a potential multiplication overflow when `OffsetsSize` is
calculated and fixes an issue reported by a CodeQL scan.
Commit: 10b5f10f677215bd84495ccc7efa2390ea142ebc
https://github.com/llvm/llvm-project/commit/10b5f10f677215bd84495ccc7efa2390ea142ebc
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir
Log Message:
-----------
[MLIR][NVVM] Add SM version requirements to mbarrier Ops (#224105)
The mbarrier Ops had no `NVVMRequiresSM` trait, so a `gpu.module`
targeting an older chip (e.g. `sm_75`) accepted them, and the error only
showed up later. This adds the trait to all 13 of them, same as #192257
and `mbarrier.check_layout` in #217252.
| floor | Ops |
|---|---|
| `sm_80` | `init`, `inval`, `arrive`, `arrive_drop`,
`arrive.nocomplete`, `arrive_drop.nocomplete`, `test.wait` |
| `sm_90` | `expect_tx`, `complete_tx`, `arrive.expect_tx`,
`arrive_drop.expect_tx`, `try_wait`, `try_wait.parity` |
The floors come from the Target ISA Notes in the [PTX ISA
8.5](https://docs.nvidia.com/cuda/pdf/ptx_isa_8.5.pdf) (section
9.7.12.15), and they match the backend: every Op that lowers to an
intrinsic fails to compile one arch below its floor and compiles at it.
`arrive_drop` at sm_80 relies on #222916.
Since the trait is per Op, some settings that need sm_90 still get
through on sm_80: an explicit `count`, `scope = cluster`, a
`shared::cluster` pointer, `relaxed = true`, or `layout` on `init`.
Catching those would mean the Ops implementing `getRequiredMinSMVersion`
themselves, which no Op does yet. Happy to add that if you'd like. PTX
version isn't covered either (#69448).
One behaviour change: `gpu-lower-to-nvvm-pipeline` and
`nvvm-attach-target` default to `sm_75`, so using mbarrier Ops with that
default now fails earlier, with a clear message. `verifyTarget = false`
turns the check off.
Tests are in `nvvm_check_target_sm.mlir`: one failing case per Op just
below its floor, plus passing cases at the floor, above it, and on
`sm_90a`.
Assisted-by: Claude
Commit: e3cdc84ba7503b6a809afe998730e45d542b91ce
https://github.com/llvm/llvm-project/commit/e3cdc84ba7503b6a809afe998730e45d542b91ce
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
Log Message:
-----------
[VPlan] Distribute execution frequencies with BlockFrequencyInfo's code. (#226841)
Instead of hand-rolling frequency propagating, manually construct BFI
and use BFI::distributeMass.
Adds a final step where frequencies are rounded up to at least one, to
distinguish between unreachable and almost never executed blocks. This
matches BFI behavior.
Note that we need to still track whether frequencies are from edges with
unknown profile info.
PR: https://github.com/llvm/llvm-project/pull/226841
Commit: 4acdc386937c60e8c7d009f98b13f9744eee7963
https://github.com/llvm/llvm-project/commit/4acdc386937c60e8c7d009f98b13f9744eee7963
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
A llvm/test/DebugInfo/Generic/compileunit-source-language-name-roc.ll
Log Message:
-----------
[DWARF] Support Roc Language (#225631)
The Roc language has been assigned language codes for DWARF v5 and v6.
See [DWARF Issue 260821.1](https://dwarfstd.org/issues/260828.1.html).
Commit: e43472b7a15e18c395c7aec11c01cd82008ac936
https://github.com/llvm/llvm-project/commit/e43472b7a15e18c395c7aec11c01cd82008ac936
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Add/update descriptors for extension clauses (#226509)
Commit: dfa06cb9f20385c0ca03f257b11e5178d2e8411f
https://github.com/llvm/llvm-project/commit/dfa06cb9f20385c0ca03f257b11e5178d2e8411f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Update modifier set properties on some clauses (#226508)
The modifier sets on DEPEND, NUM_TEAMS and REDUCTION in 6.1 only have
the exclusive property.
Commit: 8b684ec3ff0fb8c15fc1c44e130aa83b3e7a1274
https://github.com/llvm/llvm-project/commit/8b684ec3ff0fb8c15fc1c44e130aa83b3e7a1274
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/test/CIR/Analysis/alias-analysis-modref.cir
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/alignment.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/bitint-memory.c
M clang/test/CIR/CodeGen/bitint-record-layout.c
M clang/test/CIR/CodeGen/bitint-wide-be.c
M clang/test/CIR/CodeGen/bitint-wide.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/builtin-call.cpp
M clang/test/CIR/CodeGen/compound_literal.c
M clang/test/CIR/CodeGen/delete-array-aligned.cpp
M clang/test/CIR/CodeGen/delete-array-overaligned-cookie.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
M clang/test/CIR/CodeGen/delete-array.cpp
M clang/test/CIR/CodeGen/empty-union.cpp
M clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/fp-contract.c
M clang/test/CIR/CodeGen/global-const-alignment.cpp
M clang/test/CIR/CodeGen/global-init-fenv.cpp
M clang/test/CIR/CodeGen/global-section.c
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/globals.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/non-odr-use-non-ref.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-indirect-field.cpp
M clang/test/CIR/CodeGen/pointer-width-32bit.cpp
M clang/test/CIR/CodeGen/pragma-fenv_access.c
M clang/test/CIR/CodeGen/predefined-expr.c
M clang/test/CIR/CodeGen/source-loc.cpp
M clang/test/CIR/CodeGen/static-local-in-ctor.cpp
M clang/test/CIR/CodeGen/static-local-info.cpp
M clang/test/CIR/CodeGen/tls-model.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-strict-fp.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCUDA/device-stub.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
M clang/test/CIR/CodeGenCXX/zero_init_bases.cpp
M clang/test/CIR/IR/attribute-visibility.cir
M clang/test/CIR/IR/fenv.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-cast.cir
M clang/test/CIR/IR/invalid-cmp.cir
M clang/test/CIR/IR/invalid-delete-array.cir
M clang/test/CIR/IR/invalid-static-local-info.cir
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/invalid-tls.cir
M clang/test/CIR/IR/invalid-vtable.cir
M clang/test/CIR/IR/static-local-info.cir
M clang/test/CIR/IR/static-local.cir
M clang/test/CIR/IR/string-trailing-zeros.cir
M clang/test/CIR/IR/var-registration.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtable-attr.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/call-llvm-intrinsic.cir
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/unittests/CIR/FenvOpTest.cpp
Log Message:
-----------
Make CIR assembly formats strict properties compatible (#226600)
Bind inherent attributes explicitly in CIR operation formats and update
assembly tests for the resulting syntax.
Assisted-by: Codex
Commit: 673a04a94145875d8e153df7db29355e8635087d
https://github.com/llvm/llvm-project/commit/673a04a94145875d8e153df7db29355e8635087d
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/EvaluationResult.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/CodeGenCXX/global-init.cpp
M clang/test/SemaCXX/PR19955.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
Reapply "[clang][bytecode] Stop relying on `CheckEvaluationResult()` … (#226879)
…(… (#226637)
This reverts commit e0316c1b4762263caa49e3c41ddde752a2b6b775.
This time we also check `Pointee.isInitialized()` in
`PtrView::isInitialized()` to catch cases where we call `invokeDtor()`
on a Block.
Commit: 4c15900fe640fd7fb7448ae9c6827ae28fe52165
https://github.com/llvm/llvm-project/commit/4c15900fe640fd7fb7448ae9c6827ae28fe52165
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
M llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
Log Message:
-----------
[SLP]Fix fmul/fadd fusion costs and retry FMA seeds after all blocks
Fix the cost for the scalar of fmul+fadd pairs: fused fmul lanes add
the full fmul cost, fadd lanes with gathered fmuls were costed as
fmuladd, and the FMulAdd combine missed fmuls in the second operand,
c - a*b and constant lanes. Cost fused fmul lanes at (fmuladd - fadd),
such fadd lanes at (fmuladd - fmul), form the combine for either
operand, and treat a multi-use reduction root as fused. Extract nodes
take no credit for extracts the target folds into their users.
Reviewers: RKSimon, bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/226117
Commit: 5050a74e682f0f0eae7975cbc1f69851f29b0631
https://github.com/llvm/llvm-project/commit/5050a74e682f0f0eae7975cbc1f69851f29b0631
Author: Aayush Mainali <aayushmainali.codes at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp
Log Message:
-----------
[clang-tidy] Fix readability-trailing-comma false positive on #endif (#219634)
The `readability-trailing-comma` check looks at the token immediately
before an enum's closing brace to decide whether a trailing comma is
present. When the last enumerators are wrapped in `#ifdef` / `#else` /
`#endif`, that token is the directive identifier `endif`, so the check
reports a missing comma and `-fix` inserts `,` after `#endif`. That is
outside the enumerator list and corrupts the source even when every
enumerator already has a trailing comma.
Skip the diagnostic when the token before `}` is a preprocessor
directive (`#` or a token preceded by `#`). An enumerator whose name
happens to be `endif` is still diagnosed, because it is not preceded by
`#`.
Fixes #218957
Commit: b3e282e314d7b74077e9f0481a8207a1bf647b6d
https://github.com/llvm/llvm-project/commit/b3e282e314d7b74077e9f0481a8207a1bf647b6d
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/COFFYAML.cpp
A llvm/test/tools/yaml2obj/COFF/bb-addr-map-pgo-analysis-map.yaml
A llvm/test/tools/yaml2obj/COFF/bb-addr-map.yaml
A llvm/test/tools/yaml2obj/COFF/section-semantic-content.yaml
Log Message:
-----------
[yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)
Commit: 0dbb2c9af05509dc67e0ec3e185abbe921844908
https://github.com/llvm/llvm-project/commit/0dbb2c9af05509dc67e0ec3e185abbe921844908
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)
Teach yaml2coff to emit .llvm_bb_addr_map sections using the same
BBAddrMap YAML schema as yaml2elf.
Treat Entries as the complete section payload and reject its use with
SectionData, StructuredData, or SizeOfRawData.
Commit: e021a7b12cd305da850791e8ecd99cd157e9f877
https://github.com/llvm/llvm-project/commit/e021a7b12cd305da850791e8ecd99cd157e9f877
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2a96d57 (#226932)
This fixes 2a96d5737524012839e786699a0b327f22d1cfee (#217338).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2a96d5737524012839e786699a0b327f22d1cfee
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 554ca062493db6b2483fc1eab23a53efc51de0fa
https://github.com/llvm/llvm-project/commit/554ca062493db6b2483fc1eab23a53efc51de0fa
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-register-pressure.ll
A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
Log Message:
-----------
[AMDGPU] Limit DVGPR entry function max VGPRs to block size (#226242)
AMDGPUPromoteAlloca.cpp has its own version of `getMaxVGPRs` so limit is
enforced in two places.
Co-Authored-By: Claude
Commit: 214fc31ee2dd39921ae7dfa13fafbb2c9b923487
https://github.com/llvm/llvm-project/commit/214fc31ee2dd39921ae7dfa13fafbb2c9b923487
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
Log Message:
-----------
[PDB] Prevent potential overflow when calculating `Base` in `formatMsfStreamData` (#224662)
The `Base` is calculated as a product of two 32-bits number but the
results is assigned to a 64-bit value. By casting one of the operands to
64-bit, the multiplication is done using the whole width of the `Base`
variable, preventing a potential overflow. This fixes an issue reported
by a CodeQL scan.
Commit: 3b0fe4188b0722996e9dfb720f3d3c1b9e6c6646
https://github.com/llvm/llvm-project/commit/3b0fe4188b0722996e9dfb720f3d3c1b9e6c6646
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/ldst-opt.ll
M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Add custom v2i32->v2i16 store lowering. (#223659)
This extends the existing v4i16->v4i8 lowering to handle v2i32->v2i16
stores too, which in general helps keep the number of instructions down.
Commit: 8baa4880b1f2369e7dc9560c4ad012f28c6650c5
https://github.com/llvm/llvm-project/commit/8baa4880b1f2369e7dc9560c4ad012f28c6650c5
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Add a benchmark for string::append (#226559)
Commit: ea316f912fb94e14e034a4a12342a99371b80ec1
https://github.com/llvm/llvm-project/commit/ea316f912fb94e14e034a4a12342a99371b80ec1
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
A offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][l0] Execute dynamic linking for all formats (#226980)
Also do dynamic linking when necessary for Offload Binaries and SPIR-V
images and not just for the old ELF format.
Commit: c42c0e12d041d320682c68a25294d8f158983a7a
https://github.com/llvm/llvm-project/commit/c42c0e12d041d320682c68a25294d8f158983a7a
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/common.h
Log Message:
-----------
[lldb][test] Simplify multithreaded_queue (#226979)
This makes it easier to see how the timeout is applied in pop.
push now releases the mutex before notifying, where before the watchers
would have to wait for push to return. Likely not going to make anything
much faster, but it makes a bit more sense. Finish adding the new item,
then notify.
Commit: 79a5600918e78e6e537b02f8b5dedd5f6e29e460
https://github.com/llvm/llvm-project/commit/79a5600918e78e6e537b02f8b5dedd5f6e29e460
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/python_api/event/TestEvents.py
Log Message:
-----------
[lldb][test] Disable TestEvents.py (#226486)
This test is flaky on Linux, macOS and Windows. The usual failure on
macOS is as follows:
```
FAIL: test_shadow_listener (TestEvents.EventAPITestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 801, in wrapper
func(*args, **kwargs)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 485, in test_shadow_listener
state, restarted = self.wait_for_next_event(None, False)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 346, in wait_for_next_event
self.assertEqual(
>>> AssertionError: 2 != 3 : matching stop hook
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/lldb-build/bin/clang
----------------------------------------------------------------------
```
The test is already skipped on all platforms except macOS. This patch
skips it on all platforms.
Commit: 1f92a16d17c9589283b79d7cff1e74cd3965821e
https://github.com/llvm/llvm-project/commit/1f92a16d17c9589283b79d7cff1e74cd3965821e
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/pr226504-commuted.ll
A llvm/test/Transforms/InstCombine/pr226504.ll
Log Message:
-----------
[InstCombine] Fix miscompilation in sinkNotIntoOtherHandOfLogicalOp (#226783)
Consider the following: `or X, (not (not X))`
sinkNotIntoOtherHandOfLogicalOp calls `freelyInvert(X)` but as X is used
in the not this call result in the new instruction is `and (not X), (not
(not X)) -> and (not X), X` instead of the expected `and (not X), (not
X)`
fixes https://github.com/llvm/llvm-project/issues/226504
Commit: d5c03313af8a39c972b0f1886e0016e5ece25e1f
https://github.com/llvm/llvm-project/commit/d5c03313af8a39c972b0f1886e0016e5ece25e1f
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/include/fcntl.yaml
M libc/include/llvm-libc-macros/linux/fcntl-macros.h
Log Message:
-----------
[libc] Add a few missing fcntl.h macro. (#226810)
* Add a few POSIX-specified symbolic constants to `<fcntl.h>`:
`O_RSYNC`,
`AT_SYMLINK_FOLLOW`, and `F_DUPFD_CLOEXEC`.
* Don't add `_CLOFORK` variants, since those are not supported by Linux.
* List the constants in the `fcntl.yaml` file for posterity.
Commit: 0cd3a133d837dea58670a88ed919c85287e5a43c
https://github.com/llvm/llvm-project/commit/0cd3a133d837dea58670a88ed919c85287e5a43c
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
A llvm/test/CodeGen/SystemZ/zos-frame-callee-saved.ll
M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
M llvm/test/CodeGen/SystemZ/zos-ret-addr.ll
Log Message:
-----------
[SystemZ][z/OS] Allocate a stack frame when callee-saved registers are saved (#226681)
On z/OS (XPLINK64), a function without calls and without stack objects
that uses callee-saved registers got a stack size of 0. No stack frame
was allocated, so `STMG` stored the registers relative to the unchanged
stack pointer, i.e. into the register save area of the caller's DSA,
overwriting the caller's saved return address. Only skip the frame when
there is nothing to save.
Two existing tests (`zos-ret-addr.ll`, `zos-frameaddr.ll`) encoded this
store into the caller's frame and are updated; the values returned by
`llvm.returnaddress`/`llvm.frameaddress` are unchanged (the old stack
pointer is still read from offset 2048 of the current frame). New test
`zos-frame-callee-saved.ll`.
Found with GMP 6.3.0 on z/OS 3.1 (`mpn_mul_1`): code after the call ran
twice, then S0C4/S0C6. With this change GMP works.
Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported).
Fixes #226657.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: d2571af059843adcd3f2691a80a2f65daa890bc2
https://github.com/llvm/llvm-project/commit/d2571af059843adcd3f2691a80a2f65daa890bc2
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/__support/printf_core/float_dec_converter.h
M libc/src/__support/printf_core/float_dec_converter_limited.h
M libc/src/__support/printf_core/float_hex_converter.h
M libc/src/__support/printf_core/float_inf_nan_converter.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/test/src/stdlib/strfromf_test.cpp
Log Message:
-----------
[libc] Fix strfromf handling inf/nan. (#225805)
The root cause of #217708 is primarily in
libc/src/stdlib/str_from_util.h, which splits the utilities into
1. `parse_from_format()` which takes in a floating point and returns a
`FormatSection`, and
2. `strfromfloat_convert()`, which takes in the `FormatSection` and not
the floating point value.
`parse_from_format()` [does special case
handling](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L41-L49)
for `float`: it must place a `double` into `FormatSection::conv_val_raw`
when working with `%a` or `%A`. `strfromfloat_convert()` extracts the
bits from `conv_val_raw` to create `fputil::FPBits<T>`, but it [always
uses the template
type](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L115),
effectively creating type confusion when those bits are passed to
`convert_float_hex_exp()`.
An additional challenge in strfrom* functions is that the format string
naturally does not need or support a length modifier as in printf
functions. This is mostly a non-issue as `strfromfloat_convert()` is
templated on floating point type, and calls the "typed" conversion
functions. However, there are no templated / typed versions of
`convert_float_hex_exp()` or `convert_inf_nan()`. These two functions
currently depend on the value of `FormatSection::length_modifier` to
extract the correct type out of `FormatSection::conv_val_raw`:
[`convert_float_hex_exp()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_hex_converter.h#L70-L86)
and
[`convert_inf_nan()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_inf_nan_converter.h#L46-L60).
This coupling interacts with the type confusion created in
`strfromfloat_convert()`, and forces the implementation of `strfroml()`
to [manually set the
`length_modifier`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/strfroml.cpp#L26-L28).
The fix in this PR:
1. Merges the two str_from_float.h utility functions to remove the type
confusion.
2. Lifts the dependency on `FormatSection::length_modifier` and
`conv_val_raw` out of `convert_float_hex_exp()` and `convert_inf_nan()`;
similarly to how the "typed" conversion functions currently work, but
without templating on float point.
3. Updates some conversion function names to mark which ones only handle
finite floating point values.
This allows `strfroml()` to not manually set the length modifier. It
also enables `strfromf128()` to be added in a straightforward
implementation, because it will not need to depend on the existence of
`LengthModifier::Q`, controlled in part by
`LIBC_COPT_PRINTF_NO_CONVERT_FLOAT128`. In the future, it may be good
to separate `conv_val_raw` out of `FormatSection` to be its own argument
to non-typed functions.
Fixes #217708.
Commit: a4a2589fecc533db46111c3180242ded169361f5
https://github.com/llvm/llvm-project/commit/a4a2589fecc533db46111c3180242ded169361f5
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/tools/llvm-strings/chunk-boundary.test
M llvm/tools/llvm-strings/llvm-strings.cpp
Log Message:
-----------
[llvm-strings] Use small buffer instead of reading whole file (#163073)
Commit: 14a9f5f274c42c6e5d39f161e0ab1cb09e8064e7
https://github.com/llvm/llvm-project/commit/14a9f5f274c42c6e5d39f161e0ab1cb09e8064e7
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
Log Message:
-----------
[NVPTX] Auto-upgrade NVVM mulhi intrinsics to generic mulh (#226578)
Commit: 3413e4d6007934ae62d04017b451d7ce96b1930d
https://github.com/llvm/llvm-project/commit/3413e4d6007934ae62d04017b451d7ce96b1930d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
M llvm/test/CodeGen/AArch64/GlobalISel/integration-shuffle-vector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir
Log Message:
-----------
AArch64: Mark the LR def of GlobalISel calls dead (#226256)
In SelectionDAG InstrEmitter would have marked this dead.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 4cdf620df6c3d43435f7a68f023d6a0383e26355
https://github.com/llvm/llvm-project/commit/4cdf620df6c3d43435f7a68f023d6a0383e26355
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/common.h
M lldb/test/API/api/multithreaded/test_listener_event_description.cpp
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
M lldb/test/API/api/multithreaded/test_listener_resume.cpp
Log Message:
-----------
[lldb][test][NFC] Set multithreaded_queue pop timeout in one place (#226988)
All callers of pop were passing 5 seconds. I don't forsee us needing to
change it per caller either, so just hardcode it in pop().
Commit: 3c09de59212d3c5ebb7bf9c1b3680d1cdb86ca8b
https://github.com/llvm/llvm-project/commit/3c09de59212d3c5ebb7bf9c1b3680d1cdb86ca8b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
A .github/workflows/libcxx-benchmark-libstdcxx.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
A libcxx/utils/ci/lnt/run-libstdcxx-benchmarks
R libcxx/utils/ci/lnt/schema.yaml
A libcxx/utils/ci/lnt/schemas/libcxx.yaml
A libcxx/utils/ci/lnt/schemas/libstdcxx.yaml
Log Message:
-----------
[libc++] Use a self-contained job to run libstdc++ benchmarks (#226985)
After trying to retrofit libstdc++ benchmarking into our existing libc++
pipeline, I am giving up and setting up a self-contained job to do it
instead. It's much simpler as we can just run exactly what we need
instead of fighting to decouple libc++ specific logic from the libc++
benchmarking pipeline.
Various parts can still be extracted (e.g. gathering hardware
information for LNT reports, reading machines.json, etc) and will be
extracted in future iterations.
Also, add the corresponding libstdcxx LNT test suite schema so we can
start submitting results to it.
Commit: c4cfe829baf87b4bd454b0bd2257b11b18e2689a
https://github.com/llvm/llvm-project/commit/c4cfe829baf87b4bd454b0bd2257b11b18e2689a
Author: Andrey Grabezhnoy <andrey.grabezhnoy at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
Log Message:
-----------
[LICM] Preserve nsw when reassociating integer adds (#221210)
When LICM reassociates (LV + C1) + C2 into LV + (C1 + C2), it currently
drops nsw unless both original additions also have nuw.
After applying the usual OverflowTracking flags, set nsw directly on
both generated additions when both original additions have nsw and value
tracking proves that C1 + C2 cannot overflow in signed arithmetic. This
enables hoistAdd() later in the same LICM run.
Tests cover constant operands, scalar and vector operands proven safe
through known bits, operands constrained by dominating assumptions, and
the case where only the outer addition has nsw.
[Alive2 proof](https://alive2.llvm.org/ce/z/DC2dWY) of the
reassociation. The llvm.assume models the separately established fact
that C1 + C2 cannot overflow in signed arithmetic. The public example
uses i8 to finish quickly; the same proof also succeeds locally with
i32.
Fixes #220897
Commit: 78cee326d930afacf99e04044ef7125f65991927
https://github.com/llvm/llvm-project/commit/78cee326d930afacf99e04044ef7125f65991927
Author: Pedro da Rosa Pinheiro <pedarosa04 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/test/CIR/CodeGenOpenMP/parallel.c
Log Message:
-----------
[CIR][OpenMP] Implement lowering for the 'num_threads' clause for 'parallel' directive (#202466)
Implementing the emission of the "single-dimension" `num_threads` clause
for the `#pragma omp parallel` directive. The clause just accepts an
integer value and creates the `numThreadsVars` `llvm::SmallVector` with
that single value (representing a single num_thread dimension).
Based myself off of PR #172501 that implements the lowering for the
`proc_bind` clause.
Following this, I'll work on a PR to adapt CIR to deal with the
"dimensions" modifier introduced in openmp 6.1 (as also tackled by PR
#171767).
### Evidence:
Output of: `python3 build/bin/llvm-lit -sv
clang/test/CIR/CodeGenOpenMP/parallel.c`
```
llvm-lit: /home/pedro/dev/projects/my-llvm-project/llvm/utils/lit/lit/llvm/config.py:569: note: using clang: /home/pedro/dev/projects/my-llvm-project/build/bin/clang
Testing Time: 0.09s
Total Discovered Tests: 1
Passed: 1 (100.00%)
```
Commit: 3fd6f4538eac85d2d1a50b9b00dc89dc229d0428
https://github.com/llvm/llvm-project/commit/3fd6f4538eac85d2d1a50b9b00dc89dc229d0428
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[llvm-strings] Use small buffer instead of reading whole file (#163073)
To prevent large memory footprint, we use small buffer and a seperated
string to print. This can largely reduce the memory consumption when
processing.
In the following example, the test file is a clang-24 debug build
binary. Each runs with three rounds and use the median number as a
result.
reading from stdin:
blast at localhost ~/o/l/build (main)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null
Executed in 3.94 secs fish external
usr time 3.03 secs 2.27 millis 3.03 secs
sys time 1.43 secs 0.00 millis 1.43 secs
Memory usage is 3.784 GB from valgrind massif.
reading from file:
blast at localhost ~/o/l/build (main)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null
Executed in 2.99 secs fish external
usr time 2.91 secs 1.14 millis 2.91 secs
sys time 0.08 secs 0.00 millis 0.08 secs
Memory usage is 1.802 GB from valgrind massif.
This patch:
reading from stdin:
blast at localhost ~/o/l/build (strings/fix_oom)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null
Executed in 2.53 secs fish external
usr time 2.28 secs 0.00 millis 2.28 secs
sys time 0.34 secs 1.33 millis 0.33 secs
Memory usage is 78.03 KB from valgrind massif.
reading from file:
blast at localhost ~/o/l/build (strings/fix_oom)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null
Executed in 2.57 secs fish external
usr time 2.37 secs 641.00 micros 2.37 secs
sys time 0.20 secs 206.00 micros 0.20 secs
Memory usage is 78.13 KB from valgrind massif.
Commit: 83a53a981b3480b935ff22ba80de4e873f87d7ff
https://github.com/llvm/llvm-project/commit/83a53a981b3480b935ff22ba80de4e873f87d7ff
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-libstdcxx.yml
Log Message:
-----------
[libc++] Update GHA pins in libcxx-benchmark-libstdcxx.yml (#227003)
This workflow landed with older versions of actions/checkout and
actions/setup-python than the (recently updated) versions used by other
workflows.
Commit: 4207cd3169f12131b4ab872ff608c2cca224b369
https://github.com/llvm/llvm-project/commit/4207cd3169f12131b4ab872ff608c2cca224b369
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[bazel][libc] Refactor to allow copts under full-build mode (#226851)
This PR moves away from having sets of predefined groups of `copts` to
just directly listing `copts` for each target. The idea behind
[`copt_sets`](https://github.com/llvm/llvm-project/blob/dbde1428562362792d85cb9bbb58415f1b21cb48/utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl#L80)
in `_libc_library` was to restrict the different ways `copts` could be
defined, since `libc_release_library` doesn't respect `copts` and in
general having fewer combinations of `copts` allows for using fewer
`cc_library` targets. This PR allows `copts` to only be configurable if
the target is full-build only, so at least overlay libc function are
still more restricted.
Commit: dfedeade1e141a02670794fdc0faf3b6dae40464
https://github.com/llvm/llvm-project/commit/dfedeade1e141a02670794fdc0faf3b6dae40464
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
Log Message:
-----------
[bazel] Port 4faf0ae, 15cff90, 9028ff14, 4057f8e4 (#226853)
Commit: 7f6fbc4429db6968a776cc9d34de0b56aa33e56f
https://github.com/llvm/llvm-project/commit/7f6fbc4429db6968a776cc9d34de0b56aa33e56f
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
A llvm/test/CodeGen/Mips/msa/f16vec-shuffle.ll
Log Message:
-----------
[Mips] Promote MSA half-vector shuffles to integer vectors (#226105)
Promote v8f16 VECTOR_SHUFFLE operations to v8i16 to avoid expanding them
through EXTRACT_VECTOR_ELT and BUILD_VECTOR with an illegal scalar f16
type.
Fixes: #223618
Assisted-by: Codex # Tests
Commit: a6d70deaa5c7ce03fbc37fc48780e092a5f4ba9a
https://github.com/llvm/llvm-project/commit/a6d70deaa5c7ce03fbc37fc48780e092a5f4ba9a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-minbw-root.ll
Log Message:
-----------
[SLP]Fix narrowed leaf masks for demoted reduction root
The root of the narrowed-leaf reduction may be demoted and resized to the
reduction bitwidth of the wide reduction operations, while the masks are
built for the narrow leaves type, causes the crash.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5869787812
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227009
Commit: bb557adc1ac28631f43982a63fc25864de3fd82f
https://github.com/llvm/llvm-project/commit/bb557adc1ac28631f43982a63fc25864de3fd82f
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
Log Message:
-----------
[Github] Add LLVM-libc's full-build to Bazel Checks workflow (#224749)
Adds a job to run LLVM-libc's full build test suite in Bazel via
`bazelisk test -- at llvm-project//libc:build_mode=full
@llvm-project//libc/...`. It is part of an effort to support LLVM-libc's
full build functionality in Bazel.
Commit: fde6493e682cb344059a3ae0e76deb0e89b0f9b4
https://github.com/llvm/llvm-project/commit/fde6493e682cb344059a3ae0e76deb0e89b0f9b4
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/MC/MCDwarf.cpp
Log Message:
-----------
[MC][Dwarf] Support DWARF Version 6 in CIE (#226997)
According to the latest draft (as of 9/28/2026) of the V6 specification
of DWARF, section 8.24 states
"The value of the CIE version number is 4."
(PDF of the draft as of 9/28/2026 available at
https://snapshots.sourceware.org/dwarfstd/dwarf-spec/latest/dwarf6-20260920-2248.pdf).
Fixes #226994.
Commit: 2128ad57d279938d5d89d4fa5e331ed3580e2ed7
https://github.com/llvm/llvm-project/commit/2128ad57d279938d5d89d4fa5e331ed3580e2ed7
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Mark shlib_global_var test unsupported for AMD (#227008)
The shared library test introduced in #226980 seems to fail with the AMD
builbot so mark it unsupported for AMD GPUs.
Commit: 8d38af38f4999d62baf2f6b4bd2ab9d9e21f3be3
https://github.com/llvm/llvm-project/commit/8d38af38f4999d62baf2f6b4bd2ab9d9e21f3be3
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACCAtomic.cpp
M clang/test/SemaOpenACC/atomic-construct.cpp
Log Message:
-----------
[OpenACC] Fix diagnostic for atomic assignment (#227004)
Not sure how this escaped having code coverage, but a mis-placed closing
paren caused this to go very wrong :) This patch fixes it and adds the
original test case.
Fixes: #226905
Commit: 55b512f9c10f3ef97e3d14c82a306e1afd84b726
https://github.com/llvm/llvm-project/commit/55b512f9c10f3ef97e3d14c82a306e1afd84b726
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/erase-unused-operands-and-results.mlir
M mlir/test/Dialect/Linalg/swap-extract-slice-with-fill.mlir
A mlir/test/Dialect/Linalg/td/erase-unused-operands-and-results.mlir
A mlir/test/Dialect/Linalg/td/swap-extract-slice-with-fill.mlir
R mlir/test/Dialect/Linalg/transform-op-swap-extract-slice-with-fill.mlir
M mlir/test/python/dialects/transform.py
Log Message:
-----------
[mlir][transform] add ApplyEraseUnusedOperandsAndResultsPatternsOp transform op (#225864)
The existing pattern
`mlir::linalg::populateEraseUnusedOperandsAndResultsPatterns` can remove
unused linalg op operands and/or results. At the moment, this pattern is
however only applicable via the `linalg-fuse-elementwise-ops` pass. This
PR exposes this pattern via a standalone transform dialect op.
Following the naming convention, the transform op is called
`transform.apply_patterns.linalg.erase_unused_operands_and_results`. The
the Python bindings expose it as
`transform.structured.apply_patterns_linalg_erase_unused_operands_and_results()`.
Assisted-by: Claude
Commit: a1fa05f2c9a3539a52bbcc2611221171cb2893ee
https://github.com/llvm/llvm-project/commit/a1fa05f2c9a3539a52bbcc2611221171cb2893ee
Author: Phoebe Linck <phoebe.linck at hpe.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
R flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
A flang/test/Semantics/OpenMP/taskwait-nowait.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang][OpenMP] Support 'nowait' clause on taskwait (#219247)
No longer errors when a `nowait` clause is present on a `taskwait`, and
passes the info along to the runtime call `__kmpc_omp_taskwait_deps_51`.
Note that the runtime doesn't appear to use the `has_no_wait` parameter
at the moment, so `taskwait depend(...) nowait` will still block on
tasks it is dependent on. This should match the current Clang behavior.
Commit: b9e4b159fda2c2b149cd5106c429a0b2f14f689c
https://github.com/llvm/llvm-project/commit/b9e4b159fda2c2b149cd5106c429a0b2f14f689c
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbinline.py
Log Message:
-----------
[lldb][test] Let inline tests opt into PDB debug info (#227001)
`MakeInlineTest` builds the test class with `type()`, so
`LLDBTestCaseFactory` only sees the attributes passed in that call.
Setting `TEST_WITH_PDB_DEBUG_INFO=True` on the returned class is too
late: the debug info variants have already been generated without pdb.
This patch adds a `test_with_pdb_debug_info` keyword argument that is
forwarded as the class attribute. It defaults to `False`, so existing
inline tests are unchanged.
rdar://188590558
Commit: 0599827c9b486ec96659bbda4d9f94e27e477ef5
https://github.com/llvm/llvm-project/commit/0599827c9b486ec96659bbda4d9f94e27e477ef5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Rename session logs through their extended-length path (#226976)
On Windows, renaming `Incomplete.log` to `<Prefix>_<test-name>.log`
makes the destination longer than the source, so it can cross `MAX_PATH`
where the source did not. `os.rename` then fails with `WinError 3` on a
file that exists, and a test that behaved correctly is reported as
unresolved:
```
FileNotFoundError: [WinError 3] The system cannot find the path specified:
'...\Incomplete.log' -> '...\ExpectedFailure_test_implementation_only_import_main_executable_resilient_no_library_module_dwarf_clang_swift.log'
```
Address the destination through `lldbutil.get_extended_windows_path`,
including the existence check and removal above it.
Commit: ef0924f3fa2b015fae7d04b97cba2389b82cd922
https://github.com/llvm/llvm-project/commit/ef0924f3fa2b015fae7d04b97cba2389b82cd922
Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
A clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226930)
This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.
This PR only adds the parser class, wiring it into `Interpreter.cpp`;
the end-to-end tests will come in a follow-up.
Reland of #218337 (reverted in #226679 due to buildbot failures): the
original hit a build race where `DeviceOffload.cpp` could be compiled
before the tablegen-generated `AMDGPUTargetParserDef.inc` existed. Fixed
by adding `target_parser_gen `to `clang/lib/Interpreter/CMakeLists.txt`.
Assisted by Claude Opus 4.8
Commit: 832ade44ca5add5641397e9eb3fabf1f28575394
https://github.com/llvm/llvm-project/commit/832ade44ca5add5641397e9eb3fabf1f28575394
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/test/CodeGen/Mips/msa/bitcast.ll
Log Message:
-----------
[MIPS] add f16 vector bitcast patterns (#226287)
came across this failure
https://godbolt.org/z/YPK78ea76
```llvm
; -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64
define <4 x float> @f(<8 x half> %a) {
%b = bitcast <8 x half> %a to <4 x float>
ret <4 x float> %b
}
```
Gives
```
LLVM ERROR: Cannot select: 0x3b4ac900: v8f16 = bitcast 0x3b4acf90
0x3b4acf90: v4i32 = insert_vector_elt 0x3b4aceb0, 0x3b4ac5f0, Constant:i32<3>
0x3b4aceb0: v4i32 = insert_vector_elt 0x3b4acdd0, 0x3b4ac510, Constant:i32<2>
0x3b4acdd0: v4i32 = insert_vector_elt 0x3b4accf0, 0x3b4ac3c0, Constant:i32<1>
0x3b4accf0: v4i32 = insert_vector_elt undef:v4i32, 0x3b4ac2e0, Constant:i32<0>
0x3b4ac2e0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %1
0x3b4ac3c0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %2
0x3b4ac510: i32,ch = load<(load (s32) from %fixed-stack.1)> 0x3b3c7b88, FrameIndex:i32<-1>, poison:i32
0x3b4ac5f0: i32,ch = load<(load (s32) from %fixed-stack.0)> 0x3b3c7b88, FrameIndex:i32<-2>, poison:i32
In function: f
```
Just adding the patterns fixes that, and seems straightforward enough.
I'm using `fexupl` in the tests to force the bitcast, otherwise the
bitcast just gets optimized out (and just a store of the input vector
type happens).
This test should maybe start using the automatic update script?
Commit: 573ce497b6c49cfd929f3c28751365e2319c2a35
https://github.com/llvm/llvm-project/commit/573ce497b6c49cfd929f3c28751365e2319c2a35
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
[lldb][Windows][CI] remove in process plugin testing (#226989)
lldb-server is now the default on Windows, stop testing the in process
plugin.
Commit: 1a91095d8be1c9dfc31018c004e98e6118432076
https://github.com/llvm/llvm-project/commit/1a91095d8be1c9dfc31018c004e98e6118432076
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
Log Message:
-----------
[X86] Add tests for CCMP chain leaves with a folded flag source (#226797)
Tests for #217682
Assisted-by: Claude Code
Commit: 271a1e099ecc12c53b310ed17351efdf68627cd9
https://github.com/llvm/llvm-project/commit/271a1e099ecc12c53b310ed17351efdf68627cd9
Author: Vladimir Shiryaev <w at tagolog.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
Log Message:
-----------
[llvm][Support] Use ::closesocket for native sockets on Windows (#226613)
Calling ::close on a Windows SOCKET that has not been converted with
_open_osfhandle crashes and aborts the process with 0xC0000409 instead
of returning an error.
Use ::closesocket on Windows for those sockets, and keep ::close on
POSIX.
Commit: 897dad23e479556ee8e4f126bbbb71b55eb2e4e3
https://github.com/llvm/llvm-project/commit/897dad23e479556ee8e4f126bbbb71b55eb2e4e3
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-shift.ll
Log Message:
-----------
[Clang][RISCV] Add packed widening shift intrinsics (#224790)
This PR adds support for the Packed Widening Shift intrinsics:
- `__riscv_pwsll_s_u16x4`
- `__riscv_pwsll_s_u32x2`
- `__riscv_pwsla_s_i16x4`
- `__riscv_pwsla_s_i32x2`
Commit: 0a99aff885c245b6bf59341cc9325d9b0de1529f
https://github.com/llvm/llvm-project/commit/0a99aff885c245b6bf59341cc9325d9b0de1529f
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
Log Message:
-----------
[VectorUtils] Allow trivial vectorization of llvm.pdep and llvm.pext intrinsics (#227019)
Commit: 80a270a899ea0cfe0be10e7725ea2d3e0d3db466
https://github.com/llvm/llvm-project/commit/80a270a899ea0cfe0be10e7725ea2d3e0d3db466
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Don't add pdb to explicitly tagged debug info categories (#226999)
`LLDBTestCaseFactory` appends `"pdb"` to `dbginfo_categories` whenever
the class sets `TEST_WITH_PDB_DEBUG_INFO=True`. When a test method is
tagged with explicit debug info categories
(`@add_test_categories(["dwarf"])`), `dbginfo_categories` is the set
intersection of the method's categories and the known debug info
categories, not a list, so the class failed to load with
```
AttributeError: 'set' object has no attribute 'append'
```
and dotest reported the whole file as UNRESOLVED.
Only add "pdb" when the method is not tagged, which is also the only
case where the default categories are used.
rdar://188589961
Commit: f790883d694b73928a671ba080af79671ba8daaa
https://github.com/llvm/llvm-project/commit/f790883d694b73928a671ba080af79671ba8daaa
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Skip invalidation with empty ValueExprMap (NFC). (#226845)
forgetLoop, forgetValue and forgetValues walk the def-use chains from
the forgotten instructions and erase each visited value's SCEV. This can
be expensive.
If ValueExprMap is empty, there's nothing to forget and skipping the
walk reduces compile-time a bit:
stage1-O3: -0.05%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.03%
stage1-aarch64-O3: -0.04%
stage2-O3: -0.05%
stage2-clang: -0.01%
https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c43f92b9840b62f75ab8a45b7379188d78d81135&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/226845
Commit: 2f2b30fae75b6c969ba5d1cd8aa238bb4cde0009
https://github.com/llvm/llvm-project/commit/2f2b30fae75b6c969ba5d1cd8aa238bb4cde0009
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
M clang/test/CodeGen/matrix-type-indexing.c
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/matrix-type-indexing.hlsl
M clang/test/CodeGenHLSL/builtins/mul.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
A clang/test/CodeGenHLSL/matrix-layout-register-representation.hlsl
M clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
M clang/test/SemaHLSL/matrix_layout_attr.hlsl
Log Message:
-----------
[HLSL] Preserve matrix layout as AST storage metadata (#225519)
fixes #213996
fixes #211977
fixes https://godbolt.org/z/rhTYx1KGf
Keep matrix layout metadata on noncanonical matrix types without
affecting type identity, overload resolution, deduction, or mangling.
Normalize matrix values to column-major register representation when
loading from memory, and convert them back to the destination layout
when storing. Preserve layout metadata through typedefs, arrays,
records, resources, serialization, AST import, and template
substitution.
This change also starts the reversal of encoding row\column major via
indexing changes in codegen and instead ops for a stable index but
transpose intrinsics for swapping matrix majorness.
Commit: 5e120b0c28a3812b65ca074d428857e9a6954c62
https://github.com/llvm/llvm-project/commit/5e120b0c28a3812b65ca074d428857e9a6954c62
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
Log Message:
-----------
AArch64: Mark the NZCV def dead for unused overflow results (#227018)
Avoid implicitly depending on later recomputed dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5ad7914c5a7921b166fbe339be1ac94c24952db6
https://github.com/llvm/llvm-project/commit/5ad7914c5a7921b166fbe339be1ac94c24952db6
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)
This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.
This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664). With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.
Assisted-by: Antigravity
Commit: f4926d2ee7c502c881d3e1e85ecfbc32a2bfca33
https://github.com/llvm/llvm-project/commit/f4926d2ee7c502c881d3e1e85ecfbc32a2bfca33
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang] Add one-entry cache for ASTContext::getDeclAttrs() (#226610)
In libc++, almost every decl has attributes, so ASTContext::DeclAttrs
has 50k-150k entries when using libc++. But attributes are often queried
several times in a row for the same decl (e.g. `D->hasAttr<A>() ||
D->hasAttr<B>()`). Numbers for some Chromium TUs:
getDeclAttrs() same Decl as table
calls previous call size
blink logical_box_fragment.cc 19.6M 88.4% 156132
glic_webui_contents_manager.cc 16.0M 86.1% 144545
tflite kernels/conv.cc 6.1M 91.2% 52623
So add a one-element cache. AttrVecs are allocated separately, so
keeping a pointer to the result is safe.
Build time for 60 random Chromium TUs drawn with probability
proportional to their compile time:
CPU time: 240.3 s => 237.4 s, -1.20%
instructions: 2489.0e9 => 2452.9e9, -1.45%
(To check noise level, running this with the same binary twice: +-0.04%
CPU time, +-0.01% instructions.)
Every one of the 60 TUs improves, by 0.98% to 2.26% in instructions.
No behavior change.
Commit: 02ca4d6bdf6361c46a5230b6608a8069106d83c9
https://github.com/llvm/llvm-project/commit/02ca4d6bdf6361c46a5230b6608a8069106d83c9
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)
This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.
This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664). With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.
Assisted-by: Antigravity
Commit: d76515c8ae7c02f4834146f6fd81278e32edfbce
https://github.com/llvm/llvm-project/commit/d76515c8ae7c02f4834146f6fd81278e32edfbce
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
A llvm/test/CodeGen/X86/fpcw-dead-eflags.ll
Log Message:
-----------
X86: Mark EFLAGS dead on the FP control word OR (#227017)
Fix custom inserters to add dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d22674e16f083de4af5d3e05a31d98795f560009
https://github.com/llvm/llvm-project/commit/d22674e16f083de4af5d3e05a31d98795f560009
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/CodeGen/X86/apx/bls-egpr.ll
Log Message:
-----------
[X86][APX] Precommit test for BLSI/BLSMSK i8 patterns with EGPR (NFC) (#226793)
The i8 BLSI/BLSMSK patterns always select the VEX forms, so when only
extended GPRs (r16-r31) are available the operands get spilled instead
of using the EVEX forms.
Tests for #226796
Assisted-by: Claude Code
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: e10fc9f2fc2433c36b0745be2f07200de10d57eb
https://github.com/llvm/llvm-project/commit/e10fc9f2fc2433c36b0745be2f07200de10d57eb
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Speed up warning a bit (#226605)
Checking a type is faster than calling ignoreUnsafeBufferIn...(). The
latter has to get the Stmt's begin loc, look up diagnostic state and
suppression, etc. And the type check lets us skip most Stmts cheaply, so
do that first.
In a sampling profile of 48 Chromium TUs (which are built with
-Wunsafe-buffer-usage), UnsafeBufferUsageReporter's
ignoreUnsafeBufferInLibcCall() and ignoreUnsafeBufferInContainer() were
1.35% and 1.29% of the total compile time, and 3.75% for
checkUnsafeBufferUsage() as a whole.
For 60 random Chromium TUs drawn with probability proportional to their
compile time, sum over all TUs:
CPU time: 242.9 s => 237.5 s, -2.2%
instructions: 2452.6e9 => 2371.8e9, -3.3%
No behavior change.
Commit: dff19072b0ee8067969147b8801de231e3f80d91
https://github.com/llvm/llvm-project/commit/dff19072b0ee8067969147b8801de231e3f80d91
Author: Ross Burton <ross.burton at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/examples/Kaleidoscope/MCJIT/cached/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/cached/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/complete/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/complete/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/lazy/genk-timing.py
M llvm/test/DebugInfo/Inputs/check-fake-use.py
M llvm/test/Other/opt-bisect-helper.py
M llvm/test/TableGen/JSON-check.py
M llvm/test/tools/llvm-reduce/Inputs/sleep-and-check-stores.py
M llvm/tools/opt-viewer/extract-reproducers.py
M llvm/tools/opt-viewer/opt-diff.py
M llvm/tools/opt-viewer/opt-stats.py
M llvm/tools/opt-viewer/opt-viewer.py
M llvm/tools/opt-viewer/optrecord.py
M llvm/utils/DSAclean.py
M llvm/utils/DSAextract.py
M llvm/utils/Misc/zkill
M llvm/utils/Target/ARM/analyze-match-table.py
M llvm/utils/abtest.py
M llvm/utils/bisect
M llvm/utils/chunk-print-before-all.py
M llvm/utils/clang-parse-diagnostics-file
M llvm/utils/convert-constraint-log-to-z3.py
M llvm/utils/create_ladder_graph.py
M llvm/utils/docker/scripts/llvm_checksum/llvm_checksum.py
M llvm/utils/extract-section.py
M llvm/utils/extract_symbols.py
M llvm/utils/extract_vplan.py
M llvm/utils/indirect_calls.py
M llvm/utils/lint/common_lint.py
M llvm/utils/lint/cpp_lint.py
M llvm/utils/lint/generic_lint.py
M llvm/utils/lit/lit/ProgressBar.py
M llvm/utils/lit/tests/Inputs/check_path.py
M llvm/utils/lit/tests/Inputs/fake-externals/cd
M llvm/utils/lit/tests/Inputs/fake-externals/diff
M llvm/utils/lit/tests/Inputs/fake-externals/env
M llvm/utils/lit/tests/Inputs/fake-externals/export
M llvm/utils/lit/tests/Inputs/fake-externals/mkdir
M llvm/utils/lit/tests/Inputs/fake-externals/rm
M llvm/utils/lit/tests/Inputs/googletest-crash/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-detect-duplicate/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-discovery-failed/subdir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-format-respect-gtest-sharding-env-vars/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-format/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-no-sharding/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-prefix/DummySubDir/test_one.py
M llvm/utils/lit/tests/Inputs/googletest-sanitizer-error/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/shtest-format/write-bad-encoding.py
M llvm/utils/lit/tests/Inputs/shtest-format/write-control-chars.py
M llvm/utils/lit/tests/Inputs/shtest-not-posix/fail-signal.py
M llvm/utils/lit/tests/Inputs/shtest-not/fail.py
M llvm/utils/lit/tests/Inputs/shtest-not/fail2.py
M llvm/utils/lit/tests/Inputs/shtest-not/pass.py
M llvm/utils/lit/tests/Inputs/shtest-output-printing/write-a-lot.py
M llvm/utils/lit/tests/Inputs/shtest-shell/check_args.py
M llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stderr.py
M llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stdout-and-stderr.py
M llvm/utils/lit/tests/check-tested-lit-timeout-ability
M llvm/utils/llvm-gisel-cov.py
M llvm/utils/llvm-original-di-preservation.py
M llvm/utils/merge-json.py
M llvm/utils/release/findRegressions-nightly.py
M llvm/utils/release/findRegressions-simple.py
M llvm/utils/remote-exec.py
M llvm/utils/schedcover.py
M llvm/utils/shuffle_fuzz.py
M llvm/utils/shuffle_select_fuzz_tester.py
M llvm/utils/sort_includes.py
M llvm/utils/testgen/mc-bundling-x86-gen.py
M llvm/utils/unicode-case-fold.py
M llvm/utils/wciia.py
Log Message:
-----------
[llvm] Unify python shebangs (#187255)
As per PEP-0394[1], there is no real concensus over what binary names
Python has, specifically 'python' could be Python 3, Python 2, or not
exist.
However, everyone has a python3 interpreter and the scripts are all
written for Python 3. Unify the shebangs so that the ~50% of shebangs
that use python now use python3.
[1] https://peps.python.org/pep-0394/
Commit: 4043af77cb0548fff2ff0a196655fb6407b3b1b4
https://github.com/llvm/llvm-project/commit/4043af77cb0548fff2ff0a196655fb6407b3b1b4
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/PFTDefs.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/assigned-goto-labeled-end.f90
M flang/test/Lower/ifconvert.f90
A flang/test/Lower/pre-fir-tree-incoming-branches.f90
M flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Record the evaluations that branch to each evaluation (#225755)
The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the
whole procedure.
Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
Commit: f2145ae7493670fd26108a93a2e519819a3a261c
https://github.com/llvm/llvm-project/commit/f2145ae7493670fd26108a93a2e519819a3a261c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Mark SCC def dead in kill/demote lowering (#227024)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 55722aaeaa8cfcaa37363cd404b9572817b954cd
https://github.com/llvm/llvm-project/commit/55722aaeaa8cfcaa37363cd404b9572817b954cd
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
Log Message:
-----------
[AMDGPU] Make GFX1250VALUBlockingCycles a feature. (#226314)
Included (intentional) behavior change: gfx1251 (w/ FullRate64Ops) does
not have GFX1250VALUBlockingCycles feature --- table is only partially usable for
gfx1251.
Commit: 329bd0831e6269e229b074fc287c61af7384e7fa
https://github.com/llvm/llvm-project/commit/329bd0831e6269e229b074fc287c61af7384e7fa
Author: Nikhil Kotikalapudi <nak00001 at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
[CodeGen] Re-land reverted PR (#216510): "Use RegisterClassInfo for remaining allocation-order users" (#222450)
Re-land PR #216510 which was reverted in #221749 and fixed by @mhalk in
#221849.
Additionally addresses the comment in the reversion PR to fix
`/llvm/test/CodeGen/AArch64/wineh-try-catch.ll` with -regalloc=pbqp by
refreshing RCI with updateReservedRegs from my previous PR.
Edit: Removed PBQP related items from this PR.
Assisted by composer 2.5
Commit: aced9a8ccc4552fb8a928b4728f299e3afd99e02
https://github.com/llvm/llvm-project/commit/aced9a8ccc4552fb8a928b4728f299e3afd99e02
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lld/test/Unit/lit.cfg.py
M lld/unittests/AsLibELF/CMakeLists.txt
M lld/unittests/AsLibELF/OutputStream.cpp
M lld/unittests/AsLibELF/ROCm.cpp
Log Message:
-----------
Revert "[lld][test] Use LLVM helpers for input file discovery" (#227045)
Reverts llvm/llvm-project#220404
Based on post merge comments on that change
Commit: 4cbe1fc771c87a2d2e026220d4c4046cb3d0bb55
https://github.com/llvm/llvm-project/commit/4cbe1fc771c87a2d2e026220d4c4046cb3d0bb55
Author: lzcnt <lzcunt at rawr.fun>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.h
M clang/test/Preprocessor/init.c
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[clang][mlibc] Predefine `__mlibc__` for mlibc targets (#225654)
Pretty much all users of mlibc targets currently vendor this or similar
patches and having it upstream would be useful.
Commit: 8e00c798503d921902f599a9f90904f330aec7f0
https://github.com/llvm/llvm-project/commit/8e00c798503d921902f599a9f90904f330aec7f0
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ldexp.ll
Log Message:
-----------
[SPIR-V] Fix ldexp exponent splat for vectors wider than four elements (#225617)
The shared createVirtualRegister helper sets the full vector LLT, which
does not match the 128-bit vector register classes and trips a size
assert
Commit: 8147f64399770f22b3c2ff62d3d520a185aba9ed
https://github.com/llvm/llvm-project/commit/8147f64399770f22b3c2ff62d3d520a185aba9ed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Mark SCC defs dead in the indirect addressing expansion (#227012)
The exec manipulation and index offset computations clobber SCC but
never use it.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8832d2df05b8790dc96f2eb13aba9742da49c958
https://github.com/llvm/llvm-project/commit/8832d2df05b8790dc96f2eb13aba9742da49c958
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/expressions.mlir
Log Message:
-----------
Give emitc.member_call_opaque operator precedence (#226349)
The original problem here is that member_call_opaque could not be used
inside an emitc.expression. When I added the op to the precedence table,
I noticed that the emitter was generating spurious parentheses (e.g.,
`(v).at(i)`), and so, with AI help, I forwarded emitc::LoadOp operands
in CppEmitter::emitOperand when evaluating sub-expressions, so
lvalue-to-rvalue loads do not introduce spurious parentheses around
receiver variables.
---------
Co-authored-by: ioana ghiban <ioana.ghiban at arm.com>
Commit: c83861178e7f7567da85149800eb132890b30ca9
https://github.com/llvm/llvm-project/commit/c83861178e7f7567da85149800eb132890b30ca9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
DAG: Use poison for some vector element folds (#225406)
Commit: 55517cc4207fef86aa1ef26e7ab6dc6cf14d08cd
https://github.com/llvm/llvm-project/commit/55517cc4207fef86aa1ef26e7ab6dc6cf14d08cd
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/matrix.cpp
Log Message:
-----------
[CIR] Support load & store for builtin matrix type (#226259)
Implement support for the load and store built-in matrix type
Issue #221772
Commit: 3158467d542ee8a4b5e883c3e690a40bafd06189
https://github.com/llvm/llvm-project/commit/3158467d542ee8a4b5e883c3e690a40bafd06189
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.md
R clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.md
R clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [4/5] (#221640)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fourth part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: bf0d82cf7f14e2d403c0668d3ad604ee84904e61
https://github.com/llvm/llvm-project/commit/bf0d82cf7f14e2d403c0668d3ad604ee84904e61
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.md
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.md
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [4/5] (#221641)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fourth part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted (both Codex and AmpCode) cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: Amp <amp at ampcode.com>
Commit: 0bb848b10f8f572092c0bb2418ed6b489a6bc75e
https://github.com/llvm/llvm-project/commit/0bb848b10f8f572092c0bb2418ed6b489a6bc75e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr-terminator.mir
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr.mir
M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Mark SCC defs dead in SIWholeQuadMode state transitions (#227015)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3a816edefe82f210ec325673b0acd78afa2ca688
https://github.com/llvm/llvm-project/commit/3a816edefe82f210ec325673b0acd78afa2ca688
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/IR/SymbolTable.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
A mlir/test/Transforms/remove-dead-values-symbol-scope.mlir
M mlir/unittests/IR/SymbolTableTest.cpp
Log Message:
-----------
[mlir] `remove-dead-values`: properly handle symbol users outside of a pass root. (#225355)
Follow up to the
https://github.com/llvm/llvm-project/pull/224831#pullrequestreview-5262450200
comment.
Add `areAllUsesVisible` query to the `SymbolUserMap` to check is all
users are visible and use it in `remove-dead-values`.
Commit: 240b08629dc50990de47b35be3db3f005279d385
https://github.com/llvm/llvm-project/commit/240b08629dc50990de47b35be3db3f005279d385
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86][NVPTX] Use `m_Value(N, Pattern)` overload to simplify matching. (#226621)
Replace the `m_AllOf(Pattern, m_Value(N))` idiom (match-and-bind) with
the `m_Value(N, Pattern)` overload.
Commit: 09def94badd867029b36eab1d6018b51e068064e
https://github.com/llvm/llvm-project/commit/09def94badd867029b36eab1d6018b51e068064e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
A clang/test/Driver/hexagon-eh-frame-pic.c
A llvm/test/MC/Hexagon/eh-frame.s
Log Message:
-----------
[Hexagon][Driver] Tell llvm-mc about PIC under -fno-integrated-as (#213821)
Hexagon picks the .eh_frame FDE pointer encoding from whether the code
is position independent: DW_EH_PE_pcrel if so, DW_EH_PE_absptr otherwise
(MCObjectFileInfo::initELFMCObjectFileInfo). Unlike most targets,
Hexagon uses llvm-mc rather than GNU as for -fno-integrated-as, and the
driver was not passing the PIC setting along. llvm-mc defaults to
non-PIC, so the same source assembled the two ways produced different
unwind tables: the integrated assembler emitted R_HEX_32_PCREL, while
-fno-integrated-as emitted R_HEX_32 with an absptr CIE augmentation.
hexagon-unknown-linux-musl defaults to PIC, so it was the default config
that diverged.
Pass -position-independent to llvm-mc when the relocation model is PIC.
Non-PIC keeps DW_EH_PE_absptr, unchanged.
Commit: 9cd027f5af1dc49a69843787e915a1e9af169b7d
https://github.com/llvm/llvm-project/commit/9cd027f5af1dc49a69843787e915a1e9af169b7d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/msp430-register-names.c
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Log Message:
-----------
CodeGen: Mark inline asm clobber defs dead (#227026)
A clobber operand has no value associated with it, so the def is always
dead. Set the flag where the INLINEASM is built instead of relying on
later inference.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: fc99fa509c9ca8ba92d5196628b50254438d0145
https://github.com/llvm/llvm-project/commit/fc99fa509c9ca8ba92d5196628b50254438d0145
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sve/dup.c
M clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][CIR] Add missing return stmt in tests (#226534)
This PR makes sure that tests in:
* clang/test/CodeGen/AArch64/sve/
follow the format previously establised in:
* clang/test/CodeGen/AArch64/sve-intrinsics/
Commit: 73691e82c5dfc1ad812fb7f3ff44e53a3b02f129
https://github.com/llvm/llvm-project/commit/73691e82c5dfc1ad812fb7f3ff44e53a3b02f129
Author: gallopruss-sie <russell.gallop at sony.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Driver/riscv32-toolchain-extra.c
M clang/test/Driver/riscv64-toolchain-extra.c
Log Message:
-----------
[clang][test] Pass -resource-dir in riscv*-toolchain-extra.c tests (#226952)
Fixes issue reported in
https://github.com/llvm/llvm-project/pull/216996#issuecomment-5846218483
These tests check that, with no GCC installation, the driver finds the
linker, crt0 and sysroot relative to its own bin/ directory. The
compiler-rt paths come from the resource directory, which the tests did
not specify, so they relied on the build's CLANG_RESOURCE_DIR placing it
within the fake toolchain tree.
With a relative CLANG_RESOURCE_DIR containing several "..", e.g.
../../../../lib/clang/24 as used by Gentoo, the resource directory
resolves outside of the test tree. This previously passed only because
the unnormalized path still contained "riscv64-nogcc/". Since
99988429d395 removed the dots from the path, the checks fail.
Pass an explicit -resource-dir within the test tree so the tests don't
depend on the build configuration.
Claude Code helped with this.
Commit: 034f6ec4a600b1738a152b2c325c9c0c33706b1e
https://github.com/llvm/llvm-project/commit/034f6ec4a600b1738a152b2c325c9c0c33706b1e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/tools/llubi/intr_speculative_load.ll
A llvm/test/tools/llubi/intr_speculative_load_ub.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Add support for llvm.speculative.load. (#226839)
Implement the direct form of llvm.speculative.load, where the number of
accessible bytes N is passed as an i64. Only the N accessible bytes are
read from memory and they must be in bounds of the underlying object;
all other bytes are poison. With from_end, the accessible bytes are the
last N bytes of the loaded value. It is UB if N is poison or exceeds the
size of the loaded type.
Support for the oracle form will be added as follow-up.
PR: https://github.com/llvm/llvm-project/pull/226839
Commit: 65cb5e47801ec2453a4fd11dc3a2493e1f52d6e4
https://github.com/llvm/llvm-project/commit/65cb5e47801ec2453a4fd11dc3a2493e1f52d6e4
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Clike/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
Log Message:
-----------
[lldb][Clike][NFC] Add the TypeSystemClike plugin skeleton (#222611)
Introduces an empty TypeSystem plugin infrastructure for the new
TypeSystemClike.
For the RFC with more information and background, see
https://discourse.llvm.org/t/rfc-a-faster-more-reliable-type-system-for-c-languages/91459
and #225371
assisted-by: claude
Commit: 5ec0f4903c7a8ba25d12ef6971ebe05c12990b2e
https://github.com/llvm/llvm-project/commit/5ec0f4903c7a8ba25d12ef6971ebe05c12990b2e
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTConcept.h
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#226653)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
UnsatisfiedConstraintRecord because it is always nonnull.
Specifically, ConstraintSatisfaction::Details only receives nonnull
pointers in the following places:
- ASTNodeImporter::ImportConstraintSatisfaction
- ConstraintSatisfactionChecker::consumeSFINAEFailure
- ConstraintSatisfactionChecker::EvaluateSlow
- ConstraintSatisfactionChecker::Evaluate
- readConstraintSatisfaction
Assisted-by: Antigravity
Commit: 484719df962515d4c177862eaef10562e55e26c2
https://github.com/llvm/llvm-project/commit/484719df962515d4c177862eaef10562e55e26c2
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/source/ValueObject/DILParser.cpp
Log Message:
-----------
[lldb][NFC] Add missing composite assignments to DIL grammar (#226558)
Commit: 5c749553f570dbff3c8733bb6efc5f2bd1a655c7
https://github.com/llvm/llvm-project/commit/5c749553f570dbff3c8733bb6efc5f2bd1a655c7
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/cast.ll
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
Log Message:
-----------
[AArch64] Add extra bitcast cost coverage. NFC (#227048)
Commit: 1df8141ab91da6d36d02858b3c78c3984db501cc
https://github.com/llvm/llvm-project/commit/1df8141ab91da6d36d02858b3c78c3984db501cc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[ProfileData] Support merging MD5-based ProfileSymbolList (#226594)
This patch supports merging MD5-based ProfileSymbolList instances and
writing the merged result to an extensible binary profile.
#210235 introduced the MD5-based ProfileSymbolList section in the
Eytzinger layout, where profile merging was initially supported only
from strings to an MD5-based Eytzinger array.
This patch adds DenseSet<uint64_t> GUIDs to ProfileSymbolList to
accumulate 64-bit MD5 hashes when merging MD5-based symbol lists,
while keeping ColdGUIDTable (EytzingerTableSpan) for zero-copy lookups
during compilation. collectGUIDs, contains, and size are updated to
query GUIDs when populated.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antigravity
Commit: 3eee75e45e7c59d34132b1c058cfeb0518846f47
https://github.com/llvm/llvm-project/commit/3eee75e45e7c59d34132b1c058cfeb0518846f47
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/IR/ConstantRange.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Compute exact no-wrap region w/o materializing CR. (#223969)
Inline logic into makeExactNoWrapRegion() so we do not need to construct
temporary constant ranges.
Together with using makeExecuteNoWrapRegion in SCEV, this improves
compile-time on SCEV-heavy workloads.
Analysis aided by Opus 5.
PR: https://github.com/llvm/llvm-project/pull/223969
Commit: 6984197e193beeb2a52762151aa31f4c3eed558d
https://github.com/llvm/llvm-project/commit/6984197e193beeb2a52762151aa31f4c3eed558d
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A utils/bazel/llvm-project-overlay/lld/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Run lld unittests (#220340)
Commit: 306c505f3111d0d13f447a3f555a9d568a51a4d5
https://github.com/llvm/llvm-project/commit/306c505f3111d0d13f447a3f555a9d568a51a4d5
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/matrix-type.cpp
Log Message:
-----------
[Clang] Fix assertion when instantiating a matrix type with an invalid element type (#224331)
Fixes #202744
`Sema::BuildMatrixType` skips the element type check while the element
type is dependent, so `template <typename Y> using matrix_5_5 = Y
__attribute__((matrix_type(5, 5)));` gives a `ConstantMatrixType` whose
element is still unchecked. On instantiation,
`TreeTransform::RebuildConstantMatrixType` called
`ASTContext::getConstantMatrixType` directly, so nothing ever validated
the substituted type. `matrix_5_5<matrix_5_5<float>>` then hit the "need
a valid element type" assertion. The dependent-dimension case
(`matrix_type(R, C)`) was fine because `RebuildDependentSizedMatrixType`
already goes through `BuildMatrixType`.
`RebuildConstantMatrixType` now goes through `Sema::BuildMatrixType` as
well, the same way `RebuildExtVectorType` does for vectors: it takes the
attribute location and wraps the dimensions in integer literals. An
invalid instantiated element type now gets the usual `invalid matrix
element type` error instead of crashing, and the `_BitInt` element check
that this path also skipped is applied too.
Commit: 6c07df7a736315930cfe28e92b4484a5c58e917c
https://github.com/llvm/llvm-project/commit/6c07df7a736315930cfe28e92b4484a5c58e917c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-divrem-dead-defs.ll
Log Message:
-----------
X86: Mark the unused defs of FastISel selected div/rem dead (#227053)
The DIV/IDIV instructions define the quotient, the remainder and the
flags, but X86FastISel::X86SelectDivRem only reads one of the quotient
and remainder. Mark the rest dead when building the instruction instead
of relying on later recomputatios.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: c54113ce47c4ca6578c9972f6c2250f5b8a72230
https://github.com/llvm/llvm-project/commit/c54113ce47c4ca6578c9972f6c2250f5b8a72230
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
Log Message:
-----------
[HLSL] Fix -Wunused-variable in #225519 (#227059)
Inline the variable names given the variable names don't add much
clarity and they aren't used anywhere outside of asserts.
Commit: 4e3b0e5c5a7ab8f40f13908167fae672ca4daed8
https://github.com/llvm/llvm-project/commit/4e3b0e5c5a7ab8f40f13908167fae672ca4daed8
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBBreakpoint.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
Log Message:
-----------
[lldb] Speed up evaluating breakpoint conditions by using DIL (#224740)
The goal of this patch is to speed up the evaluation of breakpoint
conditions. Similar to how UserExpression is used to evaluate the
condition expression, DIL lexes and parses the expression once, and then
only evaluates the AST tree on every breakpoint location hit. If DIL
fails at any step, the evaluation falls back to UserExpression, and DIL
doesn't make any new attempts on subsequent breakpoint hits. The
breakpoint default evaluation mode (DIL, UserExpression or DWIM) can be
changed by `target.breakpoints-condition-mode` setting. The mode can
also be changed separately for a specific breakpoint via command line
option `-Z (--condition-mode)` or by SB API
`SBBreakpoint::SetConditionMode`.
Commit: 51be90afd11406d0d50776877cd020f9a64c14bf
https://github.com/llvm/llvm-project/commit/51be90afd11406d0d50776877cd020f9a64c14bf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-sext-dead-eflags.ll
Log Message:
-----------
X86: Mark EFLAGS dead on the NEG8r for sext from i1 in fast isel (#227058)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 554b9eb9b7d543b383a7b96ee15f0337192b00ae
https://github.com/llvm/llvm-project/commit/554b9eb9b7d543b383a7b96ee15f0337192b00ae
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/test/wasm/dylink.s
M lld/test/wasm/emit-relocs.s
M lld/test/wasm/locals-duplicate.test
M lld/test/wasm/lto/relocatable-undefined.ll
M lld/test/wasm/pie.s
M lld/test/wasm/relocatable.ll
M lld/test/wasm/rpath.s
M lld/test/wasm/shared-needed.s
M lld/test/wasm/shared-weak-undefined.s
M lld/test/wasm/shared.s
M lld/test/wasm/shared64.s
M lld/test/wasm/signature-mismatch-relocatable.s
M lld/test/wasm/signature-mismatch.s
M lld/test/wasm/stack-pointer.s
M lld/test/wasm/tls-export.s
M lld/test/wasm/weak-alias.s
M lld/wasm/InputFiles.cpp
M lld/wasm/SyntheticSections.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/test/CodeGen/WebAssembly/profile.ll
M llvm/test/MC/WebAssembly/assembler-binary.ll
M llvm/test/MC/WebAssembly/call-indirect-relocs.s
M llvm/test/MC/WebAssembly/comdat.ll
M llvm/test/MC/WebAssembly/common.s
M llvm/test/MC/WebAssembly/custom-sections.ll
M llvm/test/MC/WebAssembly/data-section.s
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/export-name.s
M llvm/test/MC/WebAssembly/function-sections.ll
M llvm/test/MC/WebAssembly/global-ctor-dtor.ll
M llvm/test/MC/WebAssembly/globals.s
M llvm/test/MC/WebAssembly/init-array-label.s
M llvm/test/MC/WebAssembly/init-array.s
M llvm/test/MC/WebAssembly/reloc-pic.s
M llvm/test/MC/WebAssembly/reloc-pic64.s
M llvm/test/MC/WebAssembly/tables.s
M llvm/test/MC/WebAssembly/tag-section.s
M llvm/test/MC/WebAssembly/tls.s
M llvm/test/MC/WebAssembly/tls64.s
M llvm/test/MC/WebAssembly/type-index.s
M llvm/test/MC/WebAssembly/unnamed-data.ll
M llvm/test/MC/WebAssembly/wasm64.s
M llvm/test/MC/WebAssembly/weak-alias.s
M llvm/test/ObjectYAML/wasm/dylink_section.yaml
M llvm/test/ObjectYAML/wasm/linking_section.yaml
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[WebAssembly] Add target architecture to object file format (#225979)
Store the target architecture string (`wasm32` or `wasm64`) in a new
`WASM_TARGET_ARCH` subsection in the `linking` custom section and in a
new `WASM_DYLINK_TARGET_ARCH` subsection in the `dylink.0` custom
section.
Previously, architecture detection for object files and shared libraries
relied on heuristics (such as whether memory64 was imported/defined or
presence of 64-bit relocations). For modules that do not access memory,
this resulted in wasm64 objects/shared libraries being incorrectly
detected as wasm32.
With this change:
- `WasmObjectWriter` emits the `WASM_TARGET_ARCH` subsection in
`linking`.
- `wasm-ld` emits `WASM_DYLINK_TARGET_ARCH` when generating shared
libraries and `WASM_TARGET_ARCH` when generating relocatable output
(`-r`).
- `WasmObjectFile::getArch()` checks these subsections first before
falling back to the `HasMemory64` heuristic.
- `SharedFile` in `lld` now checks the object architecture via
`checkArch()`.
- Added support to `obj2yaml` and `yaml2obj`.
Fixes: #98778
Commit: 54963eca28fcf3dcb1fdaeef91d18c5141382f7c
https://github.com/llvm/llvm-project/commit/54963eca28fcf3dcb1fdaeef91d18c5141382f7c
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/X86/ldexp-avx512.ll
M llvm/test/CodeGen/X86/ldexp.ll
Log Message:
-----------
[SelectionDAG] Fix crash scalarizing `FLDEXP` with a legal `<1 x i1>` exponent (#224809)
Fixes #219695
When the result of an `FLDEXP` node is scalarized, we went through the
generic `ScalarizeVecRes_BinOp` handler, which asks for the scalarized
form of both operands. That only works when both operands share the
result's type action. `ldexp` is not a true binop: its exponent has its
own integer vector type, and under AVX-512 `<1 x i1>` is a legal mask
type. It was never scalarized, so it never made it into the table, and
the lookup hit `TableId should be non-zero`. It isn't specific to i1
either: on AArch64, `ldexp <1 x half>, <1 x i32>` hits the same assert
because `v1f16` is scalarized while `v1i32` is widened.
`FLDEXP` now has its own scalarization handler. The FP operand is
scalarized as before, while the exponent is legalized according to its
own type action: its scalarized value is used when one exists, otherwise
the single element is extracted from the vector. This is the same
approach `ScalarizeVecRes_UnaryOp` and `ScalarizeVecRes_SETCC` already
take for operands that don't need scalarizing, and mirrors what
`SplitVecRes_FPOp_MultiType` does for the split case.
Commit: 3dc1857f5262c583f23416ccceedadbca9c206fb
https://github.com/llvm/llvm-project/commit/3dc1857f5262c583f23416ccceedadbca9c206fb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-subtree-schedule-operands.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regression after disabling scheduling of instructions, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227080
Commit: 5de237182bed2c0c5e53eec5854cbc2e2ae2511e
https://github.com/llvm/llvm-project/commit/5de237182bed2c0c5e53eec5854cbc2e2ae2511e
Author: Yian Su <yiansu.developer at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-thread-private-storage-remark.mlir
Log Message:
-----------
[mlir][openacc] Update remark for privates (#227074)
Update the "thread-private" term to use "Local memory or registers" for
privates remark printing.
Co-authored-by: Yian Su <yians at nvidia.com>
Commit: 5942a43ee9fcd0e0890c2804af71c01333077a0b
https://github.com/llvm/llvm-project/commit/5942a43ee9fcd0e0890c2804af71c01333077a0b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-shift.ll
Log Message:
-----------
X86: Mark the EFLAGS def of FastISel selected shifts dead (#227060)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d4e4d62352162c24fe1483c85f12d5790a98e94a
https://github.com/llvm/llvm-project/commit/d4e4d62352162c24fe1483c85f12d5790a98e94a
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine][NFC] Use uint64_t for ExtractIdx in vector_extract fold (#225156)
## Summary
This changes `ExtractIdx` from `unsigned` to `uint64_t` in the
`Intrinsic::vector_extract` case.
unsigned ExtractIdx = cast<ConstantInt>(Idx)->getZExtValue();
`ExtractIdx` is initialized from the extract index operand via
`getZExtValue()` , which returns `uint64_t`. In the
`get_active_lane_mask` sub-case, it is scaled and compared against the
mask's upper bound:
if (ExtractIdx * ScaleFactor >= ALMUpperBound->getZExtValue())
Here `ALMUpperBound->getZExtValue()` returns `uint64_t`, and
`ScaleFactor` is `unsigned`.
With `ExtractIdx` declared `unsigned`, the value from `getZExtValue()`
is truncated to 32 bits, and the product `ExtractIdx * ScaleFactor` is
computed in 32 bits before being widened to compare against the
`uint64_t` right-hand side. Declaring `ExtractIdx` as `uint64_t` removes
the truncation and performs the comparison in the same width as the RHS.
Assisted by: Cline
---------
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: 4a221692cd2720ae7ffec705d94117b5e2ffdaff
https://github.com/llvm/llvm-project/commit/4a221692cd2720ae7ffec705d94117b5e2ffdaff
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-subtree-schedule-operands.ll
Log Message:
-----------
[SLP]Schedule instructions with calculated deps after trimming
Cancelling the bundles of the trimmed nodes clears all the dependencies
in the scheduling region, but they are recalculated only for the
remaining bundles, the trimmed scalars and their users. The
instructions, whose dependencies were calculated earlier (e.g. for the
bundles, failed to be scheduled), are not scheduled anymore and are
moved above all the scheduled instructions, breaking the original order.
Recalculate the dependencies for all such instructions.
Fixes the regression, reported in
https://github.com/llvm/llvm-project/pull/226268#issuecomment-5872192154
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227083
Commit: decf11f163941f8123338939be8bb787ca04f46a
https://github.com/llvm/llvm-project/commit/decf11f163941f8123338939be8bb787ca04f46a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
AMDGPU: Mark the return address def of SI_CALL dead (#227062)
The call writes the return address but nothing in the local function
reads the new value. Avoid needing to recover the dead flag later.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 303ead222e638421ec0ffbce9f61e9e3e706e25c
https://github.com/llvm/llvm-project/commit/303ead222e638421ec0ffbce9f61e9e3e706e25c
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
A llvm/test/Transforms/LoopIdiom/AArch64/find-first-byte-nested.ll
Log Message:
-----------
[LoopIdiomVectorize] Don't add the match-index block to the parent loop when it exits (#225576)
`expandFindFirstByte` unconditionally adds BB4, the block that computes
the index of the match, to the parent loop. BB4 branches only to
ExitSucc. When the `find_first_of` idiom is nested inside another loop,
and a match exits that enclosing loop, BB4 always leaves the parent loop
and so is not part of it. `LoopInfo` is then inconsistent, and
`LoopBase::verifyLoop()` fails with `"Loop block has no in-loop
successors!"`.
A release build compiles that check out. It instead crashes later, in a
pass that consumes the stale analysis. IndVarSimplify is the one seen in
practice.
Only add BB4 to the parent loop when the parent loop contains ExitSucc.
The sibling `expandFindMismatch` is unaffected, because its success path
lands in a block split out of the preheader, which is inside the parent
loop already.
This is a regression from #101976. It reproduces from 21.1.0 through
main. It needs `+sve2` in practice, because the expansion is gated on
the cost of `llvm.experimental.vector.match`.
Fixes: https://github.com/llvm/llvm-project/issues/225571
Assisted-by: GPT-5.6
Commit: 02d4d004d15a423358d7ac09c67160c772345b06
https://github.com/llvm/llvm-project/commit/02d4d004d15a423358d7ac09c67160c772345b06
Author: janr-bay <jrehders at baylibre.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBlockPlacement.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/MVETailPredUtils.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
Log Message:
-----------
[ARM] Replace uses of ARM::NoRegister with Register() or isValid() NFC (#224083)
Same as https://github.com/llvm/llvm-project/pull/220227 but for the ARM
backend. This replaces remaining uses of ARM::NoRegister and unsigned
with the Register class in lib/Target/ARM.
Commit: f96b14358bbad6732028b43eaad9b62f1643314c
https://github.com/llvm/llvm-project/commit/f96b14358bbad6732028b43eaad9b62f1643314c
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCBindRoutine.cpp
A mlir/test/Dialect/OpenACC/acc-bind-routine-missing-materialization.mlir
M mlir/test/Dialect/OpenACC/acc-bind-routine.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
A mlir/test/Dialect/OpenACC/acc-materialize-routine-bind-targets-invalid.mlir
Log Message:
-----------
[mlir][OpenACC] Materialize routine bind targets before parallel call rewriting. (#227035)
Separate string-bound OpenACC routine target materialization from call
rewriting.
Add a module-level pass that creates declarations for string-bound
routine targets before the existing per-function ACCBindRoutine pass
rewrites calls. Run the new pass once on the outer module and once on
each GPU module. Remove declaration creation from ACCBindRoutine.
Extend coverage with two outer-module callers and two GPU callers that
reference the same bound routine, a GPU-module-local routine case, and
negative tests for missing materialization and invalid pass placement.
Update the pipeline test to verify ordering in both outer-module and
GPU-module pipelines.
Commit: 03cbc38890f87b0aaf984fcd96ba330da7b73e4b
https://github.com/llvm/llvm-project/commit/03cbc38890f87b0aaf984fcd96ba330da7b73e4b
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[SDPatternMatch] Make m_SetCC work like m_ICmp from IR PatternMatch. (#226623)
The condition code is stored an operand, but we don't need to expose
that to the interface.
This adds 2 signatures of m_Setcc, one that takes 2 operands and matches
any condition code and one that takes the matched condition code by
reference. For m_SpecificCondCode cases, I've added m_SpecificSetCC.
Similar changes have been applied to m_SelectCC and m_SelectCCLike.
Out of tree targets will need to update to the new interface.
Assisted-by: Claude
Commit: 07335aaae4ba005b4a0976a46ebc6012dc45dfcd
https://github.com/llvm/llvm-project/commit/07335aaae4ba005b4a0976a46ebc6012dc45dfcd
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
Log Message:
-----------
[CIR] Fix order of creation so that lit test will not fail (#226706)
This patch fixes the order of creation, otherwise the compiler may
evaluate one before the other and the lit test fail.
Commit: 1675e3be90a42b9f2c35a65e97d8483270374c8a
https://github.com/llvm/llvm-project/commit/1675e3be90a42b9f2c35a65e97d8483270374c8a
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/pwd.yaml
M libc/src/__support/pwd/flat_file_db.h
M libc/src/pwd/CMakeLists.txt
A libc/src/pwd/getpwent_r.cpp
A libc/src/pwd/getpwent_r.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/test/src/pwd/CMakeLists.txt
A libc/test/src/pwd/getpwent_r_test.cpp
Log Message:
-----------
[libc] Add getpwent_r entrypoint (#226966)
Add the reentrant password database iteration entrypoint getpwent_r.
getpwent_r reads the next password database record from the stream into
the caller-supplied struct passwd and buffer, returning 0 on success,
ENOENT at end-of-file, or an error number (such as ERANGE) on failure.
When a record exceeds the caller buffer size, FlatFileDatabase::getnext
rewinds the stream to the beginning of that record so that a subsequent
retry with a larger buffer reads the same entry.
* Add getpwent_r entrypoint and pwd::read_next fixed-buffer overload
* Rewind stream on ERANGE in FlatFileDatabase::getnext(EntryType *,
span<char>)
* Define getpwent_r in include/pwd.yaml and Linux entrypoints.txt
* Add unit tests for getpwent_r
Assisted-by: Automated tooling, human reviewed.
Commit: 32a843f39bb052adb5980b39762b5f66162040be
https://github.com/llvm/llvm-project/commit/32a843f39bb052adb5980b39762b5f66162040be
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Correct 2 lowering bugs of atomic cmp-xchng builtins (#227054)
This patch fixese two bugs that showed up in a benchmark.
First; convertToAtomicIntPointer was zero-filling the source object
directly, rather than the temporary. The result was that anything that
would not be overwritten thanks to the power-of-2 write, would be
incorrect, and corrupted.
Second; emitAtomicCmpXchg didn't set the 'old' value back into the real
object. This ends up doing an additional argument on this function that
better matches classic-codegen.
Commit: 398d06fa0a07215bda2e7ed163e11b9bdee514e3
https://github.com/llvm/llvm-project/commit/398d06fa0a07215bda2e7ed163e11b9bdee514e3
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Match swapped form of truncating saturation clamp (#226614)
Extend the fold added in #189703 to also handle the inverted select:
trunc (select (icmp ugt A, DestTy_umax), sext(icmp sgt A, 0), A) -->
trunc (smin (smax (0, A), DestTy_umax))
InstCombine canonicalizes (A & NegPow2) != 0 into the ult form with
swapped select operands, but if SCCP first rewrites the compare as
icmp uge A, C, InstCombine only turns it into icmp ugt and never swaps
the select, so the original fold is missed.
While here, match the compare constant with m_APInt instead of
m_Constant + getUniqueInteger, and build TruncatedMax directly with
APInt::getLowBitsSet. Comparing the constant against TruncatedMax + 1
or TruncatedMax makes the separate zero check unnecessary.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 3b137171e05149af29b630d40d6fcd8c712418cd
https://github.com/llvm/llvm-project/commit/3b137171e05149af29b630d40d6fcd8c712418cd
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk32.gfx13.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for v_cvt_scale_pk32_* instructions (#222617)
Commit: b9b158cd59a6021eb58901e7a2b6090c1b62d7b2
https://github.com/llvm/llvm-project/commit/b9b158cd59a6021eb58901e7a2b6090c1b62d7b2
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Remove CRTP from DenseMapBase (NFC) (#227063)
This patch removes CRTP from DenseMapBase by replacing DerivedT with
StorageT (DenseMapStorage or SmallDenseMapStorage).
DenseMapBase now owns the Storage member by composition and provides
the entire user-facing map interface -- from constructors, the
destructor, and operator= to find, try_emplace, and erase. DenseMap
and SmallDenseMap simply specialize DenseMapBase with their respective
storage types.
This completes the effort to replace CRTP in DenseMapBase with
composition (see #168255, #226664, and #226882).
Assisted-by: Antigravity
Commit: a0387a0ab6703033a8b4ba89eb107688c0a13e68
https://github.com/llvm/llvm-project/commit/a0387a0ab6703033a8b4ba89eb107688c0a13e68
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Verifier.h
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
M llvm/test/Verifier/tbaa-struct.ll
Log Message:
-----------
[Verifier] Validate !tbaa.struct metadata (#225910)
Check that !tbaa.struct operands come in (offset, size, tag) triples
with constant offset and size.
Commit: 43e86641bb658103a33e5b0e3624a1fe0340be2b
https://github.com/llvm/llvm-project/commit/43e86641bb658103a33e5b0e3624a1fe0340be2b
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
Log Message:
-----------
[VPlan] Compute edge probabilities via getEdgeProbabilitiesFromWeights. (#226981)
Use getEdgeProbabilitiesFromWeights (added in
https://github.com/llvm/llvm-project/pull/226560) to compute edge
probabilities like BFI.
This makes sure the VPlan-based logic combines weights of parallel edges
like BFI.
PR: https://github.com/llvm/llvm-project/pull/226981
Commit: a0bf3adb57c27bc1021e4d1bea5b9b80b412ef07
https://github.com/llvm/llvm-project/commit/a0bf3adb57c27bc1021e4d1bea5b9b80b412ef07
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Mark shlib_global_var test unsupported for NVIDIA (#227098)
The shared library test introduced in #226980 seems to fail with NVIDIA
backend. Marking it unsupported.
Commit: 6616c5f7db168fdd81286f5b3b8538719879ebc3
https://github.com/llvm/llvm-project/commit/6616c5f7db168fdd81286f5b3b8538719879ebc3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
FastISel: Assert the emitted instruction defines the result (#226502)
The fallback path copied the result out of implicit_defs()[0], assuming
the first implicit physical register def is the result. That is an X86
assumption about MUL/IMUL, and it is unreachable for all but
fastEmitInst_r: FastISelEmitter skips any instruction whose first
operand is not an output register, so every opcode reaching these
helpers from generated code has an explicit def.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: b127244abb93ae51b3bc64328ff990855240162b
https://github.com/llvm/llvm-project/commit/b127244abb93ae51b3bc64328ff990855240162b
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/src/grp/CMakeLists.txt
A libc/src/grp/getgrouplist.cpp
A libc/src/grp/getgrouplist.h
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/getgrouplist_test.cpp
Log Message:
-----------
[libc] Add getgrouplist entrypoint (#226958)
Add the getgrouplist entrypoint from <grp.h> (BSD extension), which
scans the group database to obtain the list of groups to which a user
belongs.
The base group passed by the caller is included unconditionally, and
supplementary groups for the user are gathered with duplicate group IDs
suppressed. A small-buffer-optimised container avoids heap allocations
for users belonging to up to 32 groups, falling back to dynamic
allocation when more groups are present. Note that this fallback does
not use AllocChecker because it relies on realloc to grow the buffer.
The lookup uses a scoped database stream to avoid disturbing concurrent
iteration.
Assisted-by: Automated tooling, human reviewed.
Commit: df8dc3f020da69021f94b69901004b6f39cbbcbd
https://github.com/llvm/llvm-project/commit/df8dc3f020da69021f94b69901004b6f39cbbcbd
Author: Daria Sukhonina <dariasukhonina at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/docs/Tools/mlir-reduce.md
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/test/mlir-reduce/reduction-tree/doc-example.mlir
A mlir/test/mlir-reduce/reduction-tree/except-last.mlir
A mlir/test/mlir-reduce/script/except-last.sh
Log Message:
-----------
[MLIR] Fix mlir-reduce splitting smallest range instead of the largest one (#214738)
The function `max_element` expects comparison lambda function to return
true if first argument is **less** than the second one, which is the
opposite to the current code.
Commit: ab90976f667c47a3772ce355200cc83cc781022f
https://github.com/llvm/llvm-project/commit/ab90976f667c47a3772ce355200cc83cc781022f
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
Log Message:
-----------
[libc++][chrono] Initialize optional tm_zone member in __convert_to_tm (#220068)
Defensively initialize `struct tm`'s optional `tm_zone` member in
`__convert_to_tm` before passing it to `strftime` or `time_put`.
`tm_zone` is a BSD extension standardized in POSIX.1-2024, but is not
part
of standard C or C++ (and is absent on Windows). Instead of guarding
with
`#ifdef __GLIBC__`, use `if constexpr (requires ...)` so it is
initialized
on all platforms that provide it (such as Bionic, musl, macOS, and BSDs,
whether typed as `const char*` or `char*`).
Assisted-by: Gemini
Commit: b5eae650eb8eea1d0fb479bbb8e7272892bd6d0d
https://github.com/llvm/llvm-project/commit/b5eae650eb8eea1d0fb479bbb8e7272892bd6d0d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
Log Message:
-----------
[SLP][NFC]Broader use of filter/isa ranges
Most of loops of the form "for (...) { if (cond) continue; ... }"
become make_filter_range, and dyn_cast-and-skip loops become
make_isa_range.
Assisted-by: Cursor
Reviewers: bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226535
Commit: 00633c4dde93e05d7ab3b17ef954cbb3d6c82a11
https://github.com/llvm/llvm-project/commit/00633c4dde93e05d7ab3b17ef954cbb3d6c82a11
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 5c20fe98552a (#227114)
Commit: 743930cdf0509528c99820fdb3448b07ec9f92b6
https://github.com/llvm/llvm-project/commit/743930cdf0509528c99820fdb3448b07ec9f92b6
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
A llvm/test/CodeGen/NVPTX/infer-volatile-address-spaces.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
A llvm/test/Transforms/InferAddressSpaces/NVPTX/volatile.ll
Log Message:
-----------
[InferAddressSpaces] Check volatile support in the destination AS (#224702)
Perviously we nonsensically checked the old address space...
Avoid introducing a regression by adding ADDRESS_SPACE_SHARED_CLUSTER to
NVPTX hasVolatileVariant.
Commit: de3d0fcbfa5f9b5a34c47d8df8854b3182e97fb0
https://github.com/llvm/llvm-project/commit/de3d0fcbfa5f9b5a34c47d8df8854b3182e97fb0
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
Log Message:
-----------
[HLSL] Build elementwise cast results from poison (#225591)
I noticed this unnecessary alloca while doing this pr:
https://github.com/llvm/llvm-project/pull/225519
The change is to initialize vector and matrix elementwise cast results
with poison instead of loading uninitialized temporary storage.
We do this because every result element is overwritten before use,
making the temporary allocation and load unnecessary.
Commit: 5c19b387d79d89ca7420dc86b60d52d118549569
https://github.com/llvm/llvm-project/commit/5c19b387d79d89ca7420dc86b60d52d118549569
Author: Borys Perski <borys.perski at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/X86/sse41-builtins-constrained.c
M clang/test/CodeGen/X86/sse41-builtins.c
Log Message:
-----------
[clang][X86] Fix round builtins tests (#226708)
Fixed minor issues in round builtins tests. Noticed them while working on #215787.
Commit: 426ed69b06c9adc0e3934a55b35c3120ca990d57
https://github.com/llvm/llvm-project/commit/426ed69b06c9adc0e3934a55b35c3120ca990d57
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude find-first-byte-nested.ll (#227121)
We only fixed x86 for LoopIdiom. PR #225576 added a test that looks like
it's just exposing existing propagation issues.
Commit: 3f67987ff20891b3161b7540305a63962ae4d917
https://github.com/llvm/llvm-project/commit/3f67987ff20891b3161b7540305a63962ae4d917
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/secondary/clang/tools/clang-repl/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/lli/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-jitlink/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Passes/Plugins/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/DynamicLibrary/BUILD.gn
M llvm/utils/gn/secondary/third-party/unittest/unittest.gni
Log Message:
-----------
[gn] Build executables without exported symbols on macOS (#227120)
Speeds up `clang --version` from 12 ms to 4 ms on my system. 8 ms faster
startup isn't a lot, but there's also no reason not to do it.
No intended behavior change.
Commit: 89c32b55ed7918627a9dca3bfa0560edcda6278b
https://github.com/llvm/llvm-project/commit/89c32b55ed7918627a9dca3bfa0560edcda6278b
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Target/Cpp/CppEmitter.h
Log Message:
-----------
Add registerToCppTranslation to CppEmmitter.h (#226337)
Currently if one wants to register `mlir-to-cpp` out of tree, they must
include `mlir/InitAllTranslations.h` and depend transitively on all
translation targets (in bazel, `@llvm-project//mlir:AllTranslations`).
This change adds the registration declaration to `CppEmitter.h` so that
one can depend just on the `MLIRTargetCpp` target (or
`@llvm-project//mlir:TargetCpp` in bazel).
This matches the organization of the SMTLib codegen registration in
`mlir/include/mlir/Target/SMTLIB/ExportSMTLIB.h` (though some other
targets like `IRDLToCpp` do it differently).
Commit: e6993b8625acb40966255c6c745d8f8b00417d8b
https://github.com/llvm/llvm-project/commit/e6993b8625acb40966255c6c745d8f8b00417d8b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/build/mac_sdk.gni
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: 6735c5d8d05dd7aa74944e6dbe2a3fe252fbba43
https://github.com/llvm/llvm-project/commit/6735c5d8d05dd7aa74944e6dbe2a3fe252fbba43
Author: Hugo Melder <service at hugomelder.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGObjCRuntime.cpp
A clang/test/CodeGenObjC/exceptions-seh.m
Log Message:
-----------
[ObjC][SEH] Fix clang crash when using finally statements (#176779)
When targeting a platform that does not have funclet-based EH, we push
the finally cleanup (normal edge) and catchall (unwind edge) onto the
EHStack _before_ pushing all catch handlers. The try statement is then
emitted and catch handlers popped from EHStack. Last, the finally
cleanup is popped from EHStack.
For funclet-based EH, we outline and push the finally funclet (of type
`NormalAndEHCleanup`) onto the EHStack _after_ pushing the catch
handlers and never pop it. This results in a crash during codegen when
we try to emit the catch handlers. Not popping the finally cleanup from
the EHStack results in incorrect calls to cleanup handlers in nested
try/catch/finally statements.
I fixed the two issues by:
1. Pushing the finally cleanup first, and
2. Popping it at the end of `CGObjCRuntime::EmitTryCatchStmt`.
Fixes #51899
Commit: b5b10ad08e60f3cd315cdde6d69744115258d072
https://github.com/llvm/llvm-project/commit/b5b10ad08e60f3cd315cdde6d69744115258d072
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: dc954ea961352e777194400766449be7701179fb
https://github.com/llvm/llvm-project/commit/dc954ea961352e777194400766449be7701179fb
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
Log Message:
-----------
[SLP][NFC]Fix build for MSVC compiler, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/46/builds/42017
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227129
Commit: b199623f2a49ee040a5f6c3c3ca26562e348b81d
https://github.com/llvm/llvm-project/commit/b199623f2a49ee040a5f6c3c3ca26562e348b81d
Author: Joel Dice <joel.dice at akamai.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
M libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
Log Message:
-----------
fix Wasm exceptions + coop threading + shared libraries (#222747)
Prior to this commit, the combination of Wasm exception handling,
cooperative multithreading, and shared libraries was broken.
Specifically, the code generation in `WasmEHPrepare.cpp` involved
direct, cross-library access to `libunwind.so`'s thread-local
`__wasm_lpad_context` variable. However, the ABI used for cooperative
multithreading does not support cross-library access to thread-local
variables.
The solution used here is to add a new `_Unwind_GetWasmLPadContext`
function to `libunwind.so` and use that to get address of the
`__wasm_lpad_context` for the current thread, both in the code generated
by `WasmEHPrepare.cpp` and in the `__gxx_wasm_personality_v0` function
defined in `cxa_personality.cpp`. I've used this strategy
unconditionally for all targets, regardless of whether cooperative
multithreading and/or position-independent are enabled. If desired (e.g.
for performance or code complexity reasons), I could make it conditional
on both of those features being enabled and fall back to using
`__wasm_lpad_context` directly otherwise.
Co-authored-by: Derek Schuff <dschuff at chromium.org>
Commit: 95099f69823aa3112c0ab34fb6d8d13b532e7203
https://github.com/llvm/llvm-project/commit/95099f69823aa3112c0ab34fb6d8d13b532e7203
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/wasm/InputFiles.cpp
Log Message:
-----------
[lld][WebAssembly] Fix error message when linking wasm64 file with -mwasm32 (#227091)
When `-mwasm32` is explicitly passed and a wasm64 object file is linked,
the error message previously stated:
"wasm32 object file can't be linked in wasm64 mode". Fix this to report
that the wasm64 object file cannot be linked in wasm32 mode.
Commit: f873531d29720c478fdcba5117b4039c535203ca
https://github.com/llvm/llvm-project/commit/f873531d29720c478fdcba5117b4039c535203ca
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[libc++] Move test tools CI job back to k8s runner sets (#226564)
While the issue with k8s runners in #226230 is still not resolved, it is
better to target the k8s runners and get transient failures than to
target the old runners and have the jobs hang forever (there seems to be
no runners registered in llvm-premerge-libcxx-runners).
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: fce0e08a23df0bf9fe3a9d82fbc02e1fd4f6b3bd
https://github.com/llvm/llvm-project/commit/fce0e08a23df0bf9fe3a9d82fbc02e1fd4f6b3bd
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bind-c20.f90
A flang/test/Semantics/bind-c21.f90
Log Message:
-----------
[flang][Semantics] Warn on BIND(C) interfaces with assumed-shape/rank dummies (#225965)
## Motivation
Fortran 2018 §18.3.6 requires assumed-shape, deferred-shape, and
assumed-rank `BIND(C)` dummy arguments to be passed using a CFI
descriptor (`CFI_cdesc_t`). Some existing C/C++ interfaces predate this
requirement and expect such an argument to be passed by bare address
instead. Declaring a `BIND(C)` Fortran interface against such code
currently produces a silent calling-convention mismatch — no diagnostic
warns the user that the ABI they've declared doesn't match what
pre-2018 C/C++ code expects.
## What this PR does
Adds a portability warning in `CheckSubprogram`
(`flang/lib/Semantics/check-declarations.cpp`) that fires when a
`BIND(C)` interface declares an assumed-shape or assumed-rank dummy
argument, under a new `UsageWarning` category, `BindCArrayDescriptor`.
The warning is **off by default** and enabled by `-pedantic` (or
individually via `-Wbind-c-array-descriptor`), matching the existing
precedent set by other portability-only categories in the same enum
(e.g. `CharacterInteroperability`, `LogicalVsCBool`).
To avoid firing on compiler-provided runtime libraries that
legitimately dispatch through CFI-descriptor-consuming `BIND(C)`
wrappers (e.g. an OpenACC runtime module's internal specific procedures
for generic entry points like `acc_copyin`), the warning is suppressed
when the `BIND(C)` binding name — explicit or the implicit default —
starts with `_`, which marks an implementation-internal interface
rather than genuine external interoperability.
This is a **pure diagnostic** — no lowering, `LoweringOptions`, or
codegen changes of any kind. It does not alter how any argument is
actually passed.
## Test plan
- `flang/test/Semantics/bind-c20.f90`: assumed-shape and assumed-rank
dummies warn under `-pedantic` (both default and explicit `BIND(C)
NAME=`); explicit-shape dummies and a leading-underscore binding name
do not.
- `flang/test/Semantics/bind-c21.f90`: the same
assumed-shape/assumed-rank
interfaces produce no diagnostic without `-pedantic`.
- Existing `flang/test/Semantics` and `flang/test/Lower/HLFIR` lit
suites
(1752 tests) pass.
- Verified no false positives against real OpenACC (`use openacc`,
`-acc=gpu`) and CUDA Fortran (`use cudafor`, `-cuda`) runtime API
calls, plus a static scan of all `cu*.mod` runtime interface modules
confirming none use the assumed-shape/rank `BIND(C)` pattern this
warning targets outside the excluded underscore-prefixed convention.
- Full `precommit.py` regression run found zero regressions
attributable to this change (all observed failures traced to an
unrelated, pre-existing upstream crash, confirmed via an A/B control
build with this change fully reverted).
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: b0ce6f602e169e91793610082b5900634b95b986
https://github.com/llvm/llvm-project/commit/b0ce6f602e169e91793610082b5900634b95b986
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
Log Message:
-----------
[gn] Fix Interpreter/emulated-tls.cpp on mac (#227132)
In, #225475 (5dfe8605911e), CLANG_HAVE_EMUTLS_GET_ADDRESS got hardcoded
to 0 in the GN build, while the CMake build has a config-time check for
__emutls_get_address.
On mac and linux, compiler-rt provides that symbol, so set
CLANG_HAVE_EMUTLS_GET_ADDRESS to 1 there. That way, __emutls_get_address
is force-linked as absolute symbol and things are happy.
(With it set to 0. clang-repl dlsym()s for the symbol, which works on
Linux where it's found in libgcc_s.so.1, but it doesn't work on mac.)
Commit: da6232f45932bd720ea7d6064f5b7161342fc139
https://github.com/llvm/llvm-project/commit/da6232f45932bd720ea7d6064f5b7161342fc139
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][OpenACC] Record gang(static:) chunk size on lowered loops (#227037)
Lower OpenACC `gang(static:)` through compute lowering as
`acc.chunk_size`. A constant size is stored directly; `static:*` and a
non-constant size are recorded as -1. `gang(static:)` also maps to gang
dimension 1.
Commit: 41ea151e19ccec81de789ea2936fb9701402fdf6
https://github.com/llvm/llvm-project/commit/41ea151e19ccec81de789ea2936fb9701402fdf6
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/callchain.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
A llvm/test/CodeGen/NVPTX/fp-global.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
A llvm/test/CodeGen/NVPTX/odd-integer-width.ll
M llvm/test/CodeGen/NVPTX/param-align.ll
A llvm/test/CodeGen/NVPTX/ptr-global.ll
M llvm/test/CodeGen/NVPTX/vector-global.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: 8a50af81497fb8a70e54cf1a3f685e8abac5b659
https://github.com/llvm/llvm-project/commit/8a50af81497fb8a70e54cf1a3f685e8abac5b659
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: d3f6b1368abb5f9d38cae598ec76f4522cffb871
https://github.com/llvm/llvm-project/commit/d3f6b1368abb5f9d38cae598ec76f4522cffb871
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: eff6378703888fcb046dbf3d5245c4eec3b5d19c
https://github.com/llvm/llvm-project/commit/eff6378703888fcb046dbf3d5245c4eec3b5d19c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: 48e9d05bb750a617e2e5703603d90ce4442cd05d
https://github.com/llvm/llvm-project/commit/48e9d05bb750a617e2e5703603d90ce4442cd05d
Author: Ian Anderson <iana at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
M clang/test/Driver/Inputs/MacOSX15.1.sdk/SDKSettings.json
M clang/test/Driver/modulemap-allow-subdirectory-search.c
M clang/test/InstallAPI/Inputs/MacOSX13.0.sdk/SDKSettings.json
Log Message:
-----------
[NFC][darwin][test] Fix the hand spacing in the SDKSettings files (#227133)
I hand spaced the VersionMap keys in the SDKSettings files to make it
easier to see where the gaps are where a version of Xcode updated one
SDK but not the other. I almost got them all right, but mis-spaced one
in macOS_iOSMac.
Commit: 1bb830f2611382fcbfccfbde74539be80a597c14
https://github.com/llvm/llvm-project/commit/1bb830f2611382fcbfccfbde74539be80a597c14
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
A flang/test/Semantics/OpenACC/acc-routine-loop-nesting.f90
Log Message:
-----------
[flang][acc] Warn when a loop is above its routine parallelism level (#227041)
OpenACC spec allows a routine to parent a loop at its own parallelism
level or below. A higher level is not allowed: gang inside a worker
routine, gang or worker inside a vector routine, gang, worker, or vector
inside a seq routine, and a gang dimension above the routine's gang
dimension. A device-specific routine clause counts the same way.
Flang accepted these loops with no diagnostic. Warn that the clause is
ignored. A loop at the same level or below is left alone, and illegal
nesting of loops remains an error.
Commit: 3f16da71cbff9a329bc620fb71c0ba25a7876e32
https://github.com/llvm/llvm-project/commit/3f16da71cbff9a329bc620fb71c0ba25a7876e32
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow G_SMIN/G_SMAX operands and mask sign sensitive results (#226957)
This PR includes `G_SMIN` and `G_SMAX` to the list of sign sensitive
ops. It also masks the result of the sign sensitive ops to their
original widths with a bitwise AND because the later users assume the
upper bits are zero and without masking they read the wrong value.
Commit: d1ad9081cc888e1a373d2a3ec2fbb53caa0ba735
https://github.com/llvm/llvm-project/commit/d1ad9081cc888e1a373d2a3ec2fbb53caa0ba735
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
Log Message:
-----------
[lldb/test] Normalize appletvos to tvos in getPlatform() (#227138)
Mirror the existing `iphoneos` -> `ios` SDK-name normalization for
`tvOS`. Without it, an `--apple-sdk` value derived from "appletvos" made
`getPlatform()` return "appletvos", which isn't in
`lldbplatform.__name_lookup`, so `platformIsDarwin(`) returned `False`
and `finalize_build_dictionary` KeyError'd before any `remote-tvos` test
could build.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a4378a0aa18e6b8386300f2a53ee17a672e1205d
https://github.com/llvm/llvm-project/commit/a4378a0aa18e6b8386300f2a53ee17a672e1205d
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227147)
We are seeing this issue in the libc++ runner sets and it can presumably
pop up in the libc runner sets as well in the case of an abnormally long
clone operation.
Commit: 00df88008dd97de2a2201146ef30bc4f495fd5ce
https://github.com/llvm/llvm-project/commit/00df88008dd97de2a2201146ef30bc4f495fd5ce
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatform.py
Log Message:
-----------
[lldb/test] Register xros (visionOS) as a Darwin platform (#227142)
`lldbplatform.py` never registered `xros` at all: no enum value, no
`__name_lookup` entry, and it was absent from `__darwin_embedded`/
`darwin_all`. As a result, `platformIsDarwin()` returned `False` for
`xros`, and `finalize_build_dictionary`'s fallback branch, which indexes
`platform_name_to_uname` by the raw platform name, would `KeyError`
before any visionOS test could build.
Add `xros` alongside the other embedded Darwin platforms so it's
recognized the same way `ios`/`tvos`/`watchos`/`bridgeos` already are.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 13bca11cc1ec361a846d7037933faf0e4a112f4b
https://github.com/llvm/llvm-project/commit/13bca11cc1ec361a846d7037933faf0e4a112f4b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude DirectX (#227157)
I don't think anyone runs profiling on DirectX, so exclude it for now.
Also move AMDGPU to the normal exclusion list given there are efforts
around PGO for AMDGPU currently.
Commit: 6d20e3cdea9aaedd772e7225df28658999bfdeb5
https://github.com/llvm/llvm-project/commit/6d20e3cdea9aaedd772e7225df28658999bfdeb5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
R llvm/test/tools/llvm-readobj/ELF/RISCV/eflags-abi.test
A llvm/test/tools/llvm-readobj/ELF/RISCV/eflags.test
Log Message:
-----------
[RISCV][llvm-readobj] Generalize the eflags-abi test to cover all of the eflags. NFC (#227152)
Assisted-by: Claude
Commit: ce15ef31e22e7107f420261bdda3cc7786380972
https://github.com/llvm/llvm-project/commit/ce15ef31e22e7107f420261bdda3cc7786380972
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelForToNestedFors.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
A mlir/test/Conversion/SCFToOpenMP/scf-to-openmp-unsigned.mlir
M mlir/test/Dialect/Async/async-parallel-for-async-dispatch.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
M mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
M mlir/test/Dialect/SCF/parallel-to-nested-fors.mlir
A mlir/test/Transforms/parallel-loop-collapsing-unsigned.mlir
Log Message:
-----------
[mlir][scf] Add unsignedCmp to scf.parallel and use it in the tiling in-bound check (#226130)
This change mirrors `scf.for` where `scf.parallel` gets an `unsignedCmp`
unit attribute, and every pass that rebuilds or lowers a `scf.parallel`
has to respect it:
- Propagate where a loop is rebuilt from another, such as parallel loop
tiling, parallel loop fusion (which also refuses to fuse loops of
different signedness), parallel-to-nested-fors and SCF-to-CF lowering.
- Decline where the bound arithmetic assumes signed values, such as
SCF-to-GPU, SCF-to-OpenMP, async-parallel-for and the
parallel-loop-collapsing test pass.
Fixes #223233
Commit: 66eb7bc5626d3ad88d1b94e85fe68d83d9045dae
https://github.com/llvm/llvm-project/commit/66eb7bc5626d3ad88d1b94e85fe68d83d9045dae
Author: Owen Rodley <orodley at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/test/Instrumentation/cgprofile.ll
M llvm/test/Transforms/JumpTableToSwitch/profile-no-guid-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-prob-1.ll
M llvm/test/Transforms/PGOProfile/Inputs/cspgo_bar_sample.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_use.ll
M llvm/test/Transforms/PGOProfile/icp_invoke.ll
M llvm/test/Transforms/PGOProfile/icp_invoke_nouse.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/tools/gold/X86/Inputs/thinlto_cspgo_bar.ll
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.c
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.proftext
A llvm/test/tools/llvm-profdata/guid-roundtrip.test
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[InstrProf] Replace !PGOFuncName and !PGOName metadata with !guid (#214134)
!PGOFuncName and !PGOName metadata were attached to internal functions
and vtables during profile annotation to record their original
"<file>;<name>" PGO names before ThinLTO promoted and renamed them. In
post-link LTO passes, InstrProfSymtab read that metadata back so profile
records keyed by the original name's hash could still find the renamed
IR object.
Global objects now carry stable !guid metadata assigned before LTO
renaming, which records the MD5 hash of the original PGO name directly.
See: https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801
Use !guid instead of maintaining separate PGO name metadata:
- Stop emitting and reading !PGOFuncName and !PGOName in Clang and
PGOInstrumentation, and remove the metadata helper functions
(createPGOFuncNameMetadata, createPGONameMetadata,
getPGOFuncNameMetadata, and the metadata name getters).
- Unify getIRPGOFuncName(const Function &) and
getPGOName(const GlobalVariable &) into
getIRPGOObjectName(const GlobalObject &).
- In InstrProfSymtab::addFuncWithName and addVTableWithName, key each
name by its own hash as before, and also insert the object's assigned
GUID into MD5FuncMap / MD5VTableMap when it differs from the PGO name
hash. This lets lookups find functions and vtables that LTO has
renamed while preserving lookups by current, deprecated, and canonical
names.
- Remove obsolete !PGOFuncName metadata from test inputs, update the
ThinLTO ICP tests to check for !guid, and add symtab unit tests and an
llvm-profdata text/indexed round-trip test.
Assisted-by: Antigravity
Commit: b52368cf70d5823d87ae60f80e733dec63af4573
https://github.com/llvm/llvm-project/commit/b52368cf70d5823d87ae60f80e733dec63af4573
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU] Canonicalize constant operands of sudot intrinsics (#226478)
Move a constant multiplicand and its sign flag to the second operand.
For example:
```
sudot4(true, 1, false, x, acc, clamp)
->
sudot4(false, x, true, 1, acc, clamp)
```
Commit: ebc5da221706433a139d2b062b260de447b78539
https://github.com/llvm/llvm-project/commit/ebc5da221706433a139d2b062b260de447b78539
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV][P-ext] Support the missing packed pair (#226992)
This patch supports the packed pair for v2i16.
Some are inconsistent with the spec because existing shuffle-lowering
transforms them into equivalent narrowing shifts or zips.
Commit: 9321ed9e0f13023be9509a62a512eab15e96bff4
https://github.com/llvm/llvm-project/commit/9321ed9e0f13023be9509a62a512eab15e96bff4
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/AST/ByteCode/new-delete.cpp
R clang/test/SemaCXX/new-nothrow-by-value.cpp
Log Message:
-----------
[Clang] Add missing release note entry in #226753 (#227078)
As per the feedback from #226753, we add release note for GH-212211.
Also move the test to new-delete.cpp.
Assisted-by: Claude
Commit: aedb767ff4462103e476c40925fb51100d9427fa
https://github.com/llvm/llvm-project/commit/aedb767ff4462103e476c40925fb51100d9427fa
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/return-value-select-pgo.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[TailCallElim] Add profile annotations to return value selects
Tail call elimination in some cases can create selects on possible
return values conditioned on whether or not execution is currently in
what was a recursive call. That is equal to the probability with which
we recurse, which in turn can be computed from the block frequencies of
blocks that recurse and blocks that directly return.
Reviewers: mtrofin
Reviewed By: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/202518
Commit: 7036a785236773e8fbe37e9041ba60d188f0d119
https://github.com/llvm/llvm-project/commit/7036a785236773e8fbe37e9041ba60d188f0d119
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGenCoroutines/coro-agg.cpp
Log Message:
-----------
[CIR] Support aggregate co_await / co_yield in AggExprEmitter (#225412)
Support evaluating `co_await` and `co_yield` expressions whose result is
an aggregate type in `AggExprEmitter`.
Fixes #225317
Commit: d24064ba8f1f501b446afb65fa6ae62c3f43962e
https://github.com/llvm/llvm-project/commit/d24064ba8f1f501b446afb65fa6ae62c3f43962e
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
R clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
Revert "releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation"" (#227123)
Reverts llvm/llvm-project#226930
AMD author has an additional step to perform, that is still needed.
in contact with Author.
Commit: 97cfbf71cbcbf758d4f334cff170aebe480fcdfa
https://github.com/llvm/llvm-project/commit/97cfbf71cbcbf758d4f334cff170aebe480fcdfa
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
R flang/test/Fir/CUDA/cuda-function-rewrite.mlir
A flang/test/Fir/CUDA/cuda-on-device.mlir
M flang/test/Fir/cuf.mlir
A flang/test/Lower/CUDA/cuda-on-device.cuf
Log Message:
-----------
[flang][cuda] Add cuf.on_device op and lower to it (#227089)
Replace the CUFFunctionRewrite pass, which matched fir.call names and
folded them to constants, with a cuf.on_device operation emitted when
the intrinsic is lowered. CUFOpConversion folds the operation once the
code is in its host or device context, and leaves the host copy of an
OpenACC routine unfolded so the device clone is not baked to false. Any
operation that remains is folded by the late CUF conversion, and the
rewrite pass is dropped from the pipeline.
Commit: 535d73cea7d6f2b941ad9ed9a5d3c0602aff6ac0
https://github.com/llvm/llvm-project/commit/535d73cea7d6f2b941ad9ed9a5d3c0602aff6ac0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Builder/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ec1b3b1 (#227180)
This fixes ec1b3b10a71c2181b0dfb90f1178e2e739680e02 (#227089).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ec1b3b10a71c2181b0dfb90f1178e2e739680e02
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: fdabd4cd0f8024ad03b42108536a2cd077027a84
https://github.com/llvm/llvm-project/commit/fdabd4cd0f8024ad03b42108536a2cd077027a84
Author: Prajit Rahul <prajitrahul05 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/ControlFlow/invalid.mlir
M mlir/test/Dialect/ControlFlow/ops.mlir
Log Message:
-----------
[mlir][cf] Fix cf.switch round-trip for case values wider than 64 bits (#221490)
The `cf.switch` parser reads case values into `int64_t`, and its printer
uses `APInt::getLimitedValue()`, preventing values wider than 64 bits
from round-tripping. Printing negative narrow values as unsigned can
also trigger an assertion when reparsing.
Parse case values into `APInt` and print them directly, so wide and
negative values round-trip correctly. Accept signed or unsigned literals
that fit the switch operand’s bit width, and report an error for values
that do not.
Add regression tests for wide and negative values, integer-width
boundaries, out-of-range diagnostics, and case selection after parsing.
Fixes #220609
Assisted-by: Codex
Commit: 206c4c43c06b103c4a7e52e9b83eb95f26a91b09
https://github.com/llvm/llvm-project/commit/206c4c43c06b103c4a7e52e9b83eb95f26a91b09
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
A clang/lib/AST/ByteCode/EvalSettings.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Add `EvalSettings` struct and replace parent `State` (#226175)
We currently always construct a full `EvalInfo` when using the bytecode
interpreter, we then pass it to the `evaluate*` function, which only
copies a few values from it.
Introduce a new `EvalSettings` struct that we pass instead of a `State`.
This is cheaper to construct and we only pass what's needed. There is
one `evaluateAsRValue` overload left that takes a parent `State`, that
will be removed in a subsequent patch.
Commit: 45d35c0b4925b74013c8a562c9e938bdf0819497
https://github.com/llvm/llvm-project/commit/45d35c0b4925b74013c8a562c9e938bdf0819497
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/pack-indexing.cpp
Log Message:
-----------
[CIR] Support PackIndexingExpr for LValue and Aggregates (#227040)
Support `PackIndexingExpr` in `CIRGenFunction::emitLValue` and
`AggExprEmitter` by visiting its selected expression, matching classic
Clang codegen (`CGExpr.cpp` and `CGExprAgg.cpp`) and completing
`PackIndexingExpr` support across all CIR expression emitters.
Fixes #226928
Assisted by Antigravity and Gemini
Commit: 440b69f4a9a5b4a142f153064f86932d7e2a2e19
https://github.com/llvm/llvm-project/commit/440b69f4a9a5b4a142f153064f86932d7e2a2e19
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lld/test/ELF/pre_init_fini_array.s
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/MC/AsmParser/section_names.s
M llvm/test/MC/ELF/section.s
Log Message:
-----------
[MC,ELF] Set sh_entsize for SHT_INIT_ARRAY/FINI_ARRAY/PREINIT_ARRAY (#226875)
Match GNU Assembler: set sh_entsize to 4/8, regardless of sh_size. This
is mostly cosmetic: sh_entsize is not a useful member for non-merge
sections.
When clang-produced and GCC-produced objects are linked together, the
mismatch makes lld's output sh_entsize 0.
Commit: f4798bdb95eccc021d6bb55bd7d651b84638957e
https://github.com/llvm/llvm-project/commit/f4798bdb95eccc021d6bb55bd7d651b84638957e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[X86][InstCombine] Fix profcheck failures (#227183)
When optimizing some AVX512 masked intrinsics, we would create a select
with a condition derived from the mask. We cannot infer the distribution
of this synthesized condition, so mark it unknown to make profcheck
green.
Commit: fce590fb5ac37d8cc4d6661d3ecca7a86ac85337
https://github.com/llvm/llvm-project/commit/fce590fb5ac37d8cc4d6661d3ecca7a86ac85337
Author: Vladimir Shiryaev <w at tagolog.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
A llvm/test/tools/llvm-cas/validate-if-needed.test
Log Message:
-----------
[CAS] Close the stderr temp file of the out-of-process validator (#226844)
Commit: 4ca0943091de382c33b8d699bc83ce077ed0152a
https://github.com/llvm/llvm-project/commit/4ca0943091de382c33b8d699bc83ce077ed0152a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV] Add common check-prefix to rvp-intrinsics.c. NFC (#227044)
A large number of test cases have the same IR for RV32 and RV64.
Commit: c6c49c818963ac0a97fbc65146966e81b8b22b28
https://github.com/llvm/llvm-project/commit/c6c49c818963ac0a97fbc65146966e81b8b22b28
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
A llvm/test/MC/Hexagon/v79-nontemporal.s
Log Message:
-----------
Add v79 scalar non-temporal forms. (#226017)
Also add support for the non-temporal forms of dcfetch and dczeroa.
Fixes https://github.com/llvm/llvm-project/issues/221485
Commit: 1193b59d2d016bb0496cbb2adee90a38bf3fbc64
https://github.com/llvm/llvm-project/commit/1193b59d2d016bb0496cbb2adee90a38bf3fbc64
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
Log Message:
-----------
[clang] Consistently cache failed constraint normalization (#227086)
Previously, if substituting the parameter mappings of a normalized
constraint failed, Sema::getNormalizedAssociatedConstraints() returned
nullptr, but it stored the partially substituted normal form in
NormalizationCache. So the first lookup for such a declaration failed,
but every later lookup returned the broken normal form, and subsumption
checking and the ambiguous-constraint diagnostics then continued with
it.
I believe this wasn't intentional:
- Before #161671 (e9972debc98c), normalization was a single step, and a
failure was cached as nullptr.
- #161671 added the parameter mapping substitution step. It inserted the
normal form into the cache before substituting, and returned nullptr if
the substitution then failed, leaving the non-null normal form in the
cache.
- #165352 (2984a8db804e) moved the insertion after the substitution to
not use an invalidated iterator, but kept inserting the normal form if
the substitution failed.
To fix this, cache failed substitution as nullptr, like a failed
normalization.
As a consequences we don't emit the diagnostics that were only emitted
because the second lookup continued:
- A second "'type name' declared as a pointer to a reference" error
(with its notes) for the same broken concept. For
template<typename T> concept Foo = True<T*>;
template<typename T> concept Bar = Foo<T&>;
template<typename T> requires Bar<T> struct S { };
template<typename T> requires Bar<T> && true struct S<T> { };
the error got reported once for the partial specialization, and also for
the primary template after. Now, we only have the first report.
- A "similar constraint expressions not considered equivalent" note and
its "similar constraint expression here" note, which we computed from
the broken normal form. The actual problem in that test is the broken
constraint, which is still diagnosed.
This also makes it possible to key the normalization cache by constraint
expression without changing which diagnostics are emitted for failures,
which I want to do in a follow-up.
Commit: 48842594a7a4b26caf06320a632e6b460a3a7670
https://github.com/llvm/llvm-project/commit/48842594a7a4b26caf06320a632e6b460a3a7670
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vshrn* intrinsics (#226382)
## summary
part of : https://github.com/llvm/llvm-project/issues/185382
Lower all intrinsics in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right-and-narrow
Assisted by : gpt-6-sol
Commit: 36067f8bd26c471d1d8fcdf0ee24fd9fb62358d2
https://github.com/llvm/llvm-project/commit/36067f8bd26c471d1d8fcdf0ee24fd9fb62358d2
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/binop-scalarize.ll
A llvm/test/Transforms/VectorCombine/cmp-scalarize.ll
M llvm/test/Transforms/VectorCombine/unary-op-scalarize.ll
Log Message:
-----------
[VectorCombine] Pass flags during IR creation (#193271)
Since commit 777d6b5, VectorCombine has been using InstSimplifyFolder to
simplify vector instructions during IR construction. When creating a new
instruction, InstSimplifyFolder may fold the operation and return an
existing operand instead of emitting a new instruction.
In such cases, copying IR flags to the returned value is incorrect and
may unintentionally propagate flags to pre‑existing instructions,
polluting the original IR. To avoid this, flags should be passed at IR
creation rather than being set after construction. Fix #192607.
Commit: e8b8e970d8f9139af653140030261408ea6bfd31
https://github.com/llvm/llvm-project/commit/e8b8e970d8f9139af653140030261408ea6bfd31
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
X86: Mark eflags clobbers dead in va_arg expansion (#227197)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 0738a10b37c1cae6c693787f5591d873cd275b0a
https://github.com/llvm/llvm-project/commit/0738a10b37c1cae6c693787f5591d873cd275b0a
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
Log Message:
-----------
[Polly] Keep proximity dependence exact if simplifying it unbounds its distance (#225840)
Before calling the isl scheduler, `runIslScheduleOptimizer` gists the
dependences
with the iteration domains (`-polly-opt-simplify-deps=yes`, the default
since
a26db470834a, 2012). For a statement that reads a value written in one
iteration
of a loop in all later iterations, the gist also drops the upper bound
of that
loop:
{ S[k, i, k] -> S[k, i, j] : k < j <= n - 1 } becomes { S[k, i, k] ->
S[k, i, j] : j > k }
The proximity distance along j is then unbounded. isl's Pluto-like step
needs a
bound `u·n + w` on every proximity distance, finds no row that satisfies
it, and
falls back to carrying dependences one row at a time. For floyd-warshall
this
yields a wavefront over `i + j` below the `k` loop instead of a
permutable band
`(i, j)`. That band is never tiled, and the innermost loop walks the
array
diagonally.
The patch keeps the exact proximity dependence of a statement on itself
when
the gisted dependence has unbounded distances and the exact one has
bounded
distances. Validity dependences, and dependences between different
statements,
are still gisted. The cost of the exact dependences therefore only
applies to
the few maps where the gist removed the bound; heat-3d, where keeping
all
proximity dependences exact makes scheduling take minutes, is
unaffected.
### Measurements
x86-64 (Ryzen 7 9700X), `-O3 -march=native -mllvm -polly`, baseline is
the same
compiler without the change.
| | before | after | |
|---|---|---|---|
| PolyBench 4.2.1 LARGE floyd-warshall (min of 3, pinned) | 26.7 s | 6.8
s | 3.9x |
| llvm-test-suite floyd-warshall (min of 5, pinned) | 60.9 s | 16.4 s |
3.7x |
| compile time floyd-warshall.c (min of 5) | 131 ms | 134 ms | |
| .text floyd-warshall | 4775 | 6298 | |
- Among the 30 PolyBench kernels, only floyd-warshall generates
different code.
- In llvm-test-suite (SingleSource + MultiSource), only floyd-warshall
and two
small regression tests (Regression-C-test_indvars,
GCC-C-execute-20000422-1)
change. All 2137 tests pass in both configurations. The other objects
whose
code differed between the two builds (oggenc, two TSVC programs) differ
by
Polly's pre-existing run-to-run nondeterminism; the patch did not
trigger
there.
- CTMark (`-j1`, pinned, 2 repetitions): identical generated code, total
compile
time within noise.
- With the default 32x32 tiles, floyd-warshall is still 1.2x slower than
plain
-O3 on this machine. That is a tile size effect: with
`-polly-tile-sizes=16,32`
the kernel runs in 1.6 s, 3.5x faster than -O3.
### Test
`polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll`:
floyd-warshall
with a parametric size; checks for the `(k)` band followed by the tiled
`(i, j)`
band. It fails without the patch, which produces the `(i + j)`
wavefront.
Assisted-by: Claude (Anthropic)
Commit: 2691b7241c4be3dc16cf29ac679ba6a87cecb076
https://github.com/llvm/llvm-project/commit/2691b7241c4be3dc16cf29ac679ba6a87cecb076
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] Cache normalized constraints by expression instead of by declaration (#226620)
Sema::NormalizationCache was keyed by the constrained declaration. The
members of a class template specialization are distinct declarations for
every specialization, but they all share the uninstantiated constraint
expressions of the member of the primary template they were instantiated
from. So the constraints of e.g. the constrained constructors of
std::optional, std::span, std::pair or of the members of range adaptors
were normalized from scratch for every single specialization of those
classes that a TU uses. Normalization is expensive: it expands the whole
concept tree below the expression and substitutes the parameter mapping
at every level.
When compiling Chromium, 48%
(chrome/browser/glic/...contents_manager.cc)
to 72% (chrome/browser/ui/views/frame/browser_view.cc) of all
NormalizationCache misses were for expressions that were normalized
before
for a different declaration, and normalization is 4.5% of all compile
time
in a sampling profile.
Instead, key the cache by (expression, pack index). Each associated
constraint is cached separately, and we form the conjunction of a
declaration's associated constraints on every call. That's cheap, and
getNormalizedAssociatedConstraints() is only called on SatisfactionCache
misses and for subsumption checks. Failures are cached as nullptr, like
before.
Build time for 120 random Chromium TUs drawn with probability
proportional to their compile time:
CPU time: 470.0 s => 451.1 s, -4.0%
instructions: 4948.9e9 => 4702.7e9, -5.0%
mean max RSS: 779 MB => 710 MB, -8.9%
(To check noise level, running this with the same binary twice: +-0.04%
CPU time and +-0.01% instructions.)
Recovers some more of the time lost to #161671 and contributes to
improving issue #172266.
No behavior change on the non-error case.
(If several declarations share a constraint expression that fails to
normalize (e.g. the members of different specializations of a class
template), we now diagnose the failure once instead of once per
declaration.)
Commit: e366b3b7f4650141fe9eab97047c04c87fcc2202
https://github.com/llvm/llvm-project/commit/e366b3b7f4650141fe9eab97047c04c87fcc2202
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
Log Message:
-----------
[lldb] Correct types for ScriptedFrame get_function_name get_display_function_name (#226938)
These claimed to return str but the initial value for self.name is None,
and the C++ side returns optional<string>. So I think optional string is
correct here.
Commit: 781429fd6734e1970c75b0b504e91a0b0aa926cb
https://github.com/llvm/llvm-project/commit/781429fd6734e1970c75b0b504e91a0b0aa926cb
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm][llvm-profgen] Fix printing bogus trace info on 32-bit (#226965)
And as a result, fix
llvm/test/tools/llvm-profgen/AArch64/cs-bogus-trace.test when run on Arm
32-bit:
https://lab.llvm.org/buildbot/#/builders/122/builds/59
Fixes #225569 / 28fec94991905d8dd8a08658e9590e13b7fe1af5.
`x` is for an unsigned integer but the argument given for it is a
uint64_t. This worked on 64-bit (maybe it's passed in a register), but
not on 32-bit where we got strange values printed.
Use format_hex instead, so we don't have to choose a format code.
Commit: 1d494b8ebf43cff0d703fdedfdd79a64a421e722
https://github.com/llvm/llvm-project/commit/1d494b8ebf43cff0d703fdedfdd79a64a421e722
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILMemIntrinsics.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/legalize-i8.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-store.ll
M llvm/test/CodeGen/DirectX/scalarize-static-array-of-float-vectors.ll
M llvm/test/tools/dxil-dis/constantexpr-gep.ll
Log Message:
-----------
[DirectX] Don't use IRBuilder to create GEPs (#227000)
This switches the DirectX backend to directly call
`GetElementPtrInst::Create()` instead of creating GEPs via IRBuilder.
IRBuilder will soon start canonicalizing GEPs to ptradd representation
(with the first change being
https://github.com/llvm/llvm-project/pull/226425, affecting constant
expressions only), while DirectX needs GEPs to have specific form.
The change implemented here is a minimal one to unblock further work. In
the future, it will become impossible to construct such GEPs through any
API. The DirectX backend needs to switch to using an intrinsic to
represent any non-canonical GEPs it needs. This followup work is tracked
in https://github.com/llvm/llvm-project/issues/227005.
Commit: 40a8059cbaae4edeb7f1450ccaa8b0cc91893356
https://github.com/llvm/llvm-project/commit/40a8059cbaae4edeb7f1450ccaa8b0cc91893356
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Use bytecode interpreter in toplevel `Expr::Evaluate*` functions (#226217)
To avoid all the state setup we otherwise do. This also lets us remove
the `EvalInfo::EnableNewConstInterp` flag, which was previously checked
on every `::EvaluateAsRValue` call.
Commit: 90afc67a963e7ae4a33716bc2f5593711231a953
https://github.com/llvm/llvm-project/commit/90afc67a963e7ae4a33716bc2f5593711231a953
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[LLVMIR] Directly lower global initializer GEP to constant expression (#226904)
MLIR lowers global initializers in a very unusual way, by using an
IRBuilder without insertion point, and relying on the fact that for a
well-formed initializer, all the instructions will be converted to
constant expressions and no actual instructions that require insertion
will be produced.
This causes issues for https://github.com/llvm/llvm-project/pull/226425,
which requires an insertion point for CreateGEP to determine the data
layout.
To avoid this, make convertGEPOp() directly produce a constant
expression GEP if there is no insertion point, reusing the existing code
path for inrange GEPs.
Commit: 794bb8387edb69e3e38736254fd250a337ea22ef
https://github.com/llvm/llvm-project/commit/794bb8387edb69e3e38736254fd250a337ea22ef
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
Log Message:
-----------
[lldb][test] Handle None function name in frame provider tests (#226936)
Fixes #191859.
On Arm one of the functions has no name, which is a valid state.
```
Num frames: 7
0 frame #0: 0x092a151c a.out`baz at main.c:5:3 --name: baz
1 frame #1: 0x092a1540 a.out`bar at main.c:10:10 --name: bar
2 frame #2: 0x092a1560 a.out`foo at main.c:15:10 --name: foo
3 frame #3: 0x092a158c a.out`main at main.c:20:10 --name: main
4 frame #4: 0xf7ab939a libc.so.6` --name: None
5 frame #5: 0xf7ab943e libc.so.6`__libc_start_main + 94 --name: __libc_start_main
6 frame #6: 0x092a1434 a.out`_start + 40 --name: _start
```
The prefix provider needs to handle that possibility.
Though the Python type annotations on ScriptedFrame say that the name
methods return string, in reality they can return None, which the C++
sides expect. I will fix that in another PR.
Commit: 13533a80bb251a501bc8600f9b37856e6b38c33a
https://github.com/llvm/llvm-project/commit/13533a80bb251a501bc8600f9b37856e6b38c33a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/LibASTImporter.md
M clang/docs/UsersManual.md
Log Message:
-----------
[docs] Pass -c when generating a PCH file (#226850)
Without options like -fsyntax-only/-E/-S/-c, the driver runs in link
mode, and a header-only command line produces a PCH only incidentally: a
linker option such as -lm or -Wl,..., including one from a config file,
adds a link job. Use -c in the PCH examples.
Also fix two broken examples: -ignore-pch is a driver option (cc1
rejects -Xclang -ignore-pch), and the relocatable PCH example is
missing -o. In LibASTImporter.md, generate the C++ AST files with
-emit-ast instead of treating .cpp files as headers.
LLM-aided
Commit: 2e524c1e0bf29b38f8eea0f3813fca1681d115d0
https://github.com/llvm/llvm-project/commit/2e524c1e0bf29b38f8eea0f3813fca1681d115d0
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-variable-stride-predicate.ll
A llvm/test/Transforms/LoopVectorize/scev-variable-stride-predicate.ll
Log Message:
-----------
[SCEV] - Add positive-stride predicate for backedge-taken count. (#222261)
When `howManyLessThans` encounters a loop with an unknown stride that
cannot be proven finite (no `mustprogress` or side-effect-free
guarantee), SCEV currently returns `CouldNotCompute` for the
backedge-taken count. This blocks downstream consumers like the loop
vectorizer from optimizing such loops.
This patch relaxes the requirement by allowing a predicated
backedge-taken count when `AllowPredicates` is true. Instead of
requiring `loopIsFiniteByAssumption(L)` unconditionally, we add a
`Compare predicate: stride sgt 0` when finiteness cannot be proven.
A positive stride guarantees forward progress, making the BTC formula
correct. The predicate is emitted as a runtime check by consumers
(e.g., the loop vectorizer generates a guard branch before the vector
loop).
This is the SCEV-level fix for a class of variable-increment loops
common in Fortran-style benchmarks, e.g.:
void f(int n, int *a, int *b, int *c, int inc) {
int i = 0;
L10: if (i >= n) goto L20;
a[i] = a[i] + b[i] * c[i];
i = i + inc; // inc unknown at compile time
goto L10;
L20: ;
}
Addressing : https://github.com/llvm/llvm-project/issues/221915
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: 49e2cb91adb1445cb8a54620c800547433e955b5
https://github.com/llvm/llvm-project/commit/49e2cb91adb1445cb8a54620c800547433e955b5
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/arm/aeabi_cmpflags_interwork_test.c
Log Message:
-----------
[compiler-rt][ARM] Make interworking test compatible with BTI (#226154)
In the aeabi_cmpflags_interwork_test.c test wrappers, we should return
through lr instead of r3 so that runs with BTI enabled don't fail. As
returns through lr don't require a landing pad, and returns through r3
do.
Commit: 4ee084c8a809725030a2ccba85319d8e709295ac
https://github.com/llvm/llvm-project/commit/4ee084c8a809725030a2ccba85319d8e709295ac
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/remark-final-verify-diagnostics.mlir
M mlir/unittests/IR/Diagnostic.cpp
Log Message:
-----------
[mlir] Own the registrations of SourceMgrDiagnosticVerifierHandler (#226258)
`SourceMgrDiagnosticVerifierHandler::registerInContext` registered a
callback capturing `this` and dropped the handler id, so nothing could
erase it. The constructor did the same in its own context. After the
verifier was destroyed, the next diagnostic called into a dead object.
mlir-opt's per-buffer contexts die first, which hid the bug.
Make both registrations owned:
- The constructor installs its callback through `setHandler`, replacing
the base class's printing handler. That handler was unreachable anyway:
the verifier consumes every diagnostic and reports unexpected ones
itself. The base destructor now erases it.
- `registerInContext` returns a scoped registration. Callers destroy it
before the verifier and the context.
Erasing from every registered context in the destructor would not work:
mlir-opt's per-buffer contexts are already gone by then.
mlir-opt's `performActions` finalized the remark policy only after
textual output; on a failing pipeline the remarks deferred by
`--remark-policy=final` were emitted from `~MLIRContext`, after the
handlers were gone. It now finalizes on every exit, so those remarks
reach the verifier, or the printing handler in the non-verify path where
they were dropped before. A lit test pins this.
Assisted-by: Claude Code (Claude Fable 5.1)
Commit: ee34dbed04b0b0fa64fef6342921592a1b38a651
https://github.com/llvm/llvm-project/commit/ee34dbed04b0b0fa64fef6342921592a1b38a651
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow ints feeding sitofp (#222969)
Commit: 7ea5a76dae9d3aeabc6bb75f6aab79f02edc10c6
https://github.com/llvm/llvm-project/commit/7ea5a76dae9d3aeabc6bb75f6aab79f02edc10c6
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Add ffmpeg to test-suite.yml workflow (#227219)
This provides additional coverage for vector related codegen
Commit: 12e561a89733bc5504e292c252e0d464a2e606dd
https://github.com/llvm/llvm-project/commit/12e561a89733bc5504e292c252e0d464a2e606dd
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/GVNHoist.h
A llvm/include/llvm/Transforms/Scalar/GVNSink.h
A llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
Log Message:
-----------
[GVN] Move `ValueTable` out of `GVN.h` (NFC) (#226233)
* Rename `GVNPass::ValueTable` to `GVNValueTable`, and move it out to
the `llvm` namespace and to its own file `GVNValueTable.h`.
* Move `GVNPass::Expression` into `llvm::GVNValueTable`.
* Move `GVNHoistPass` and `GVNSinkPass` to their own headers.
With these changes `GVHoist.cpp` and `GVNSink.cpp` no longer need to
include `GVN.h` or peek into `GVNPass` internals.
Commit: 496baa263fd34b032b6a655b97267e7f774257ad
https://github.com/llvm/llvm-project/commit/496baa263fd34b032b6a655b97267e7f774257ad
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
M llvm/test/CodeGen/ARM/llvm.modf.ll
M llvm/test/CodeGen/ARM/llvm.sincos.ll
M llvm/test/CodeGen/ARM/signext-inreg.ll
M llvm/test/CodeGen/ARM/vldlane.ll
M llvm/test/CodeGen/Hexagon/addh.ll
M llvm/test/CodeGen/Hexagon/cttz-elts-widen.ll
M llvm/test/CodeGen/Hexagon/isel-extload-i1.ll
M llvm/test/CodeGen/Hexagon/mulhs.ll
M llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/dmr-copy.ll
M llvm/test/CodeGen/PowerPC/dmr-enable.ll
M llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
M llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-ops-i128.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-07.ll
M llvm/test/CodeGen/SystemZ/rot-02.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
M llvm/test/CodeGen/Thumb/emergency-spill-slot.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-add.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-mul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-mixed-cases.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-uniform-cases.ll
M llvm/test/CodeGen/Thumb2/mve-ctlz.ll
M llvm/test/CodeGen/Thumb2/mve-fmath.ll
M llvm/test/CodeGen/Thumb2/mve-insertshuffleload.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
M llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
M llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle-fp16.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vcvt16.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/mve-vld4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vldst4.ll
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/Thumb2/mve-vst4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vst4.ll
M llvm/test/CodeGen/Thumb2/mve-zext-masked-load.ll
M llvm/test/CodeGen/X86/active_lane_mask.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/apx/push2-pop2.ll
M llvm/test/CodeGen/X86/bit-manip-i512.ll
M llvm/test/CodeGen/X86/bitselect.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/combine-rotates.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/ftrunc.ll
M llvm/test/CodeGen/X86/funnel-shift-i512.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/icmp-abs-C.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
M llvm/test/CodeGen/X86/machine-cse.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int.ll
M llvm/test/CodeGen/X86/mul-i1024.ll
M llvm/test/CodeGen/X86/mul-i256.ll
M llvm/test/CodeGen/X86/mul-i512.ll
M llvm/test/CodeGen/X86/mul-shift-reassoc.ll
M llvm/test/CodeGen/X86/mul128.ll
M llvm/test/CodeGen/X86/neg-abs.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr46877.ll
M llvm/test/CodeGen/X86/scalar-minmax-simd.ll
M llvm/test/CodeGen/X86/shift-amount-mod.ll
M llvm/test/CodeGen/X86/shift-and.ll
M llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
M llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
M llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
M llvm/test/CodeGen/X86/ternlog.ll
M llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-sumla.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-umla.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/widen_arith-2.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/zext-trunc.ll
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/Transforms/SampleProfile/pseudo-probe-twoaddr.ll
Log Message:
-----------
CodeGen: Compute LiveIntervals before TwoAddressInstructions (#225174)
TwoAddressInstructions is the traditional primary use of LiveVariables, but it has
gained a LiveIntervals path. By moving LiveIntervals earlier, the default flips to rely
on it instead of LiveVariables. The overall test churn is mostly neutral, with more net
wins than losses.
This should move before phi elimination. This is a staging move to incrementally
remove the LiveVariables support from TwoAddressInstructions, and because the
move to running LiveIntervals on SSA is a bigger leap.
This obsoletes -early-live-intervals (though, maybe it could be repurposed for
move before SSA).
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: 6711aad2bbf466d9169caf5a840c96300ee844c3
https://github.com/llvm/llvm-project/commit/6711aad2bbf466d9169caf5a840c96300ee844c3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
R libcxx/utils/ci/images/libcxx_next_runners.txt
R libcxx/utils/ci/images/libcxx_release_runners.txt
R libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libcxx] Delete runner set image versions (#227141)
These are no longer needed now that we have removed the old runner sets.
Commit: 1a23ce8a1bd6baf9dc28195bc589088da480bad8
https://github.com/llvm/llvm-project/commit/1a23ce8a1bd6baf9dc28195bc589088da480bad8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/record-execution-frequencies.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
Log Message:
-----------
[VPlan] Use BlockFrequencyInfo's full mass for execution frequencies. (#227006)
Use BlockFrequencyInfo's full mass instead of custom 2^63 for "always
execute".
This updates VPlan's block frequencies to match BFI.
PR: https://github.com/llvm/llvm-project/pull/227006
Commit: 46fa9ef840775a01f457862f9646a4010c82c047
https://github.com/llvm/llvm-project/commit/46fa9ef840775a01f457862f9646a4010c82c047
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
A llvm/test/Analysis/BlockFrequencyInfo/many-successors-order.ll
Log Message:
-----------
[BFI] Use MapVector in combineWeightsByHashing. (#227027)
combineWeightsByHashing iterated over a DenseMap, which depends on the
hash. Use MapVector to get consistent results, independent of index
type/values.
This is mainly to ensure consistency between users that use different
index numbers, i.e. used for IR BFI and VPlan's use.
PR: https://github.com/llvm/llvm-project/pull/227027
Commit: 0b5b03e411b30333a9b7db4cf26184b52f6cdb13
https://github.com/llvm/llvm-project/commit/0b5b03e411b30333a9b7db4cf26184b52f6cdb13
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
X86: Fix missing ... separator between functions in mir test (#227228)
The update_mir_test_checks output is incomplete so the later functions
here were really manually checked.
Commit: 3b5ba5367854db432028679792b94725e52a10bb
https://github.com/llvm/llvm-project/commit/3b5ba5367854db432028679792b94725e52a10bb
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noalias.ll
Log Message:
-----------
[FunctionAttrs] Infer noalias through a null check. (#226956)
Only comparing against null does not captures provenance and should not
impact whether a pointer is noalias or not.
This enables noalias inference in a number of cases for malloc-like
functions:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1459.
PR: https://github.com/llvm/llvm-project/pull/226956
Commit: 079b1861eb2831253a7d3c37a1ffff293b46c985
https://github.com/llvm/llvm-project/commit/079b1861eb2831253a7d3c37a1ffff293b46c985
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Fix off-by-one crash in `lifetime_capture_by` argument indexing (#227231)
Fixes an off-by-one crash in the lifetime_capture_by attribute handling.
The CapturingArgIdx is already an index into the full Args array, but
the code was incorrectly creating a CallArgs array (dropping the first
argument for instance methods) and then indexing into it with
CapturingArgIdx, causing incorrect argument access and potential
out-of-bounds crashes.
Currently crashes at head: https://godbolt.org/z/7rYczK1z6
Commit: 94c715a0734c03d5e20a956166ca626202a7cd8d
https://github.com/llvm/llvm-project/commit/94c715a0734c03d5e20a956166ca626202a7cd8d
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp-wave32.mir
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp.mir
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scmp.ll
M llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/ucmp.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Use S_CMP to lower a copy of a lane mask to SCC (#221445)
SIFixSGPRCopies lowers a copy of a lane mask to SCC as an AND with EXEC,
whose destination register is created by the pass and is always dead.
The AND with EXEC is only needed because SCC has to be "any active lane
is set". When the lane mask already has 0 in the bits of all inactive
lanes, that is just "the mask is non-zero", which S_CMP computes without
needing a destination register. In some cases the S_CMP can be optimized
away later by SIInstrInfo::optimizeCompareInstr.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 06fb1e71f84a4878d77793d627e7c204f1b625bb
https://github.com/llvm/llvm-project/commit/06fb1e71f84a4878d77793d627e7c204f1b625bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
A llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
Log Message:
-----------
Mips: Mark MUL's existing HI0/LO0 defs dead in FastISel (#227230)
Commit: 82bb76d8d73b8312468799cd6960933f384bea0e
https://github.com/llvm/llvm-project/commit/82bb76d8d73b8312468799cd6960933f384bea0e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir
Log Message:
-----------
Mips/GlobalISel: Mark call's implicit RA def dead (#227233)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 2b9cba821d8db4c6b3847b29fc718a95f3f323bf
https://github.com/llvm/llvm-project/commit/2b9cba821d8db4c6b3847b29fc718a95f3f323bf
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll
Log Message:
-----------
[AArch64] ISel support for nxv1i1 vector_reverse (#226939)
This ensures llvm.vector.reverse can be selected for nxv1i1 types. These intrinsics can be generated by LoopVectorizer for `VF = vscale x 1` and loops iterating in reverse order.
Commit: b0fb3b8e25efb9bd389289566cc42b175fc3dfd6
https://github.com/llvm/llvm-project/commit/b0fb3b8e25efb9bd389289566cc42b175fc3dfd6
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/include/__configuration/attributes.h
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: 1d8c1726d91e99286cd7c6b80cfb1a3c3069bc44
https://github.com/llvm/llvm-project/commit/1d8c1726d91e99286cd7c6b80cfb1a3c3069bc44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
A llvm/test/CodeGen/Mips/optimize-pic-call-dead-gp.ll
Log Message:
-----------
Mips: Mark the $gp setup copy dead when erasing the call's $gp use (#227216)
MipsOptimizePICCall drops the implicit $gp operand from a call when the
lazy binding stub for the callee has already run. The copy that set $gp
up for that call then has no reader left, but nothing flagged it, so the
MIR carried a live def until a later liveness recomputation cleaned it
up.
The pass already walks each block in order, so track the reaching
definition of $gp as it goes and mark it dead when the use is erased.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d38ae2e57d9f80cd962ea8b4f94838a57a1edeef
https://github.com/llvm/llvm-project/commit/d38ae2e57d9f80cd962ea8b4f94838a57a1edeef
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/select-tls-macho.ll
Log Message:
-----------
AArch64/GlobalISel: Mark the LR def of the Mach-O TLS call dead (#227234)
The ordinary call path already does this, and the SelectionDAG emitter
marks unused implicit physreg defs dead for free. Without it the dead
flag needs to be reinferred later.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 6e822d8fb666f91ae08482886fe8ada6f7a3da69
https://github.com/llvm/llvm-project/commit/6e822d8fb666f91ae08482886fe8ada6f7a3da69
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
A llvm/test/CodeGen/LoongArch/null-streamer.ll
Log Message:
-----------
LoongArch: Register a null target streamer (#226497)
Emitting a TLS variable's debug location calls into the target streamer,
which was only registered for asm and object output. -filetype=null
therefore null dereferenced.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 94df9feffba3cda37abdb1a15020711b707834ed
https://github.com/llvm/llvm-project/commit/94df9feffba3cda37abdb1a15020711b707834ed
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
A llvm/test/CodeGen/LoongArch/module-target-abi.ll
Log Message:
-----------
LoongArch: Respect the target-abi module flag in the ELF header (#226498)
The target streamer read the ABI from MCTargetOptions when constructed,
so the e_flags recorded the command line -target-abi and ignored the
module flag.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 59d0bd72f5a2cf49c034e11451a045efb91bf495
https://github.com/llvm/llvm-project/commit/59d0bd72f5a2cf49c034e11451a045efb91bf495
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/AArch64/findlast-epilogue-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
Log Message:
-----------
[VPlan] Fix find last reductions not using frozen condition in select (#223962)
A find last reduction is something like:
(select c[n], x[n], (select c[n-1], x[n-1], (select ...)))
So even if previous iterations had poison for c[x], the top-level select
blocks it.
MaskSelect uses the non-frozen Cond, and that in turn is fed into
VPInstruction::ExtractLastActive, which in turn gets expanded to
vector.reduce.umax, which returns poison if any of the lanes were
poison.
So in the case e.g. c[n] = 1, c[n-1] = poison and VF=2, the scalar loop
returns x[n] whilst vector loop returns poison.
We're also introducing multiple uses of Cond which isn't sound for
undef, so for these reasons we need to use the frozen Cond.
Commit: 1963bb2fc197f3059b24650503a0292986bc6c18
https://github.com/llvm/llvm-project/commit/1963bb2fc197f3059b24650503a0292986bc6c18
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-fp4-pzo.ll
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
Log Message:
-----------
[clang][NVPTX] Add support for pzo in f32/f16x2/bf16x2 to FP4 conversions (#225318)
This patch adds support for `pzo` variants and `rz` rounding mode to
existing `f32/f16x2/bf16x2` to `FP4` (`e2m1x2`) conversion intrinsics.
Also adds `clang builtins` for the new variants.
Tests have been verified through `ptxas-13.4`.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: edac094a1efff5238e135b334061c3a24465dca7
https://github.com/llvm/llvm-project/commit/edac094a1efff5238e135b334061c3a24465dca7
Author: Anand Mistry (MSFT) <anandmistry at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
A llvm/test/MC/Mips/eva/set-eva-directive.s
A llvm/test/MC/Mips/eva/set-noeva-directive.s
Log Message:
-----------
[Mips] Add set directive support for EVA instructions (#225888)
Add assembler directives to enable/disable access to EVA instructions,
such as `cachee/lbe/sbe/tlbinv/etc`, with `.set eva/noeva`.
Commit: 021733de9061b3e612477fb7e59d613e0a0de71b
https://github.com/llvm/llvm-project/commit/021733de9061b3e612477fb7e59d613e0a0de71b
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Add negative-test for `lifetime_capture_by_this` on constructors (#227251)
Commit: 578741171e46b8d0f7a1916cfa828ee34f416d55
https://github.com/llvm/llvm-project/commit/578741171e46b8d0f7a1916cfa828ee34f416d55
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Group virtual method slots into override families (#213317)
A virtual call site can dispatch to any override, so the parameter and
return slots that occupy the same vtable slot across an override chain are
indistinguishable to a caller. Whole-program consumers therefore have to
treat them as one unit or they will reason about a slot that a call never
actually reaches.
Compute those units up front, keyed per slot, so consumers only need a
map lookup rather than their own traversal of the override relation.
Overloads occupy distinct vtable slots and stay in distinct families.
The family representative is the smallest EntityId in the class, which
keeps the result stable across runs.
§2 of rdar://179151603
Assisted-By: claude
Commit: 710d2019e012fe41ed37f0b7d142d15c99922a6b
https://github.com/llvm/llvm-project/commit/710d2019e012fe41ed37f0b7d142d15c99922a6b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP]Support runtime alias checks versioning for blocks in loops
Allow versioning of blocks inside loops, e.g. fully unrolled inner loop,
whose pointers are advanced by the loop header PHIs. Accept header PHIs
as base objects, use the base values directly in the bounds instead of
recomputing loop-variant bases from their recurrences.
Fixes #49896
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226955
Commit: ee14650c462095726b88b35280d3c0569030f7d0
https://github.com/llvm/llvm-project/commit/ee14650c462095726b88b35280d3c0569030f7d0
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[AArch64][GlobalISel] Reorganise shuffle combines. NFC (#227268)
Other combines had been added between shuffle lowerings, make sure they
are adjacent. Also remove show extra whitespace whilst here.
Commit: 87df53cf999776bd5e5d303ff7942762a8cbb1e4
https://github.com/llvm/llvm-project/commit/87df53cf999776bd5e5d303ff7942762a8cbb1e4
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: c963ebcb9afe7075a09a6f0abaa1737ef4f4c73f
https://github.com/llvm/llvm-project/commit/c963ebcb9afe7075a09a6f0abaa1737ef4f4c73f
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: cb58113180aaed73ea7f26be8135d2004e7b95ee
https://github.com/llvm/llvm-project/commit/cb58113180aaed73ea7f26be8135d2004e7b95ee
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/test/CodeGenCXX/pragma-loop-predicate.cpp
M clang/test/CodeGenCXX/pragma-loop-safety.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
Log Message:
-----------
[clang] Also disable scalable vectorisation for vectorize(disable) (#227254)
This ensures that #pragma clang loop vectorize(disable) also disables
scalable vectorisation. Only setting the width to 1 could potentially
enable LoopVectorizer to vectorize with VF = vscale x 1. Especially with
the -scalable-vectorization=preferred option.
Commit: fc7ece14c684722765774c72d5f16fa9afc61729
https://github.com/llvm/llvm-project/commit/fc7ece14c684722765774c72d5f16fa9afc61729
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/temp_arg_nontype_ref.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #223645. (#227085)
In #223645, I removed a fixme I thought was no longer necessary. But it
was, our test coverage is just patchy.
This just reintroduces it to fix the regression,
I have not investigated whether there was a better solution.
I got the AI to write as much tests as i could think of, however this
revealed regressions introduced in an earlier version of clang, this
weill be fixed separately.
Reported in
https://github.com/llvm/llvm-project/pull/223645#issuecomment-5868853308
Assisted-By: Opus 5.5
Commit: 5ab3282dbe074b641585f8462570d5cf047bdef6
https://github.com/llvm/llvm-project/commit/5ab3282dbe074b641585f8462570d5cf047bdef6
Author: Jack Vickers <jack.vickers at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
Log Message:
-----------
[mlir][tosa] Preserve non-TOSA ops in narrowing passes (#224594)
The TOSA narrowing passes currently reject operations from non-TOSA
dialects even when their types do not require conversion.
This change marks unknown ops as legal provided that their operand and
result types are legal. This follows the approach used by
TosaConvertIntegerTypeToSignless and allows mixed-dialect IR to pass
through TOSA narrowing.
Adds a lit test for each narrowing pass to prove that mixed-dialect is
allowed.
Updates the i64-to-i32 rollback lit test to continue forcing a
conversion failure using illegal operand and result types.
Assisted by: Codex
Commit: 570089a98f151e6f4cb0dfa65722afc9adb83d98
https://github.com/llvm/llvm-project/commit/570089a98f151e6f4cb0dfa65722afc9adb83d98
Author: Hariprasad Ravishankar <hravisha at mathworks.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa] Add allow-non-finites option for float min/max reduction (#222140)
TosaToLinalg seeds float min/max reductions with the largest finite
value of the element type, but the TOSA spec asks for the infinite
bound.
[§2.9.4](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_reduce_min)
seeds REDUCE_MIN with `maximum_s<in_out_t>()`,
[§4.5.1](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_arithmetic_helpers)
defines that as the type maximum after `make_signed`,
[§4.5.2](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_type_conversion_helpers)
makes `make_signed` a no-op for floats, and Table 5 in
[§1.9](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_supported_number_formats)
gives that maximum as `+infinity` for fp16, bf16, fp32 and fp64.
REDUCE_MAX and ARGMAX mirror it. The symptom is a clamp: reduce an
all-`+Inf` tensor and you get `3.40282347E+38` back.
This adds an `allow-non-finites` option to `tosa-to-linalg` that selects
the conforming seed.
**Why a flag rather than just fixing the seed.** Non-finite values
aren't always wanted. TOSA has a format that can't represent them at all
— Table 5 bounds fp8e4m3_t at ±448, "This format has no encoding for
infinities" — and embedded code generation often disables them wholesale
to avoid the support code, as MATLAB Coder's `SupportNonFinite` does.
llvm/torch-mlir#4363 added the same toggle under the same name to
ConvertTorchToLinalg and friends; today setting it `true` is silently
dropped for graphs routed through TOSA, so the two backends disagree on
the same model. This makes the flag mean something on both paths.
**Why the default is false.** It keeps this pass's current output.
torch-mlir defaults to `true` because it already emitted `-inf`, so in
both projects the default is the no-op, and setting the flag the same
way on both sides is what makes the paths agree.
**The `semanticsHasInf` guard.** `APFloat::getInf` is `llvm_unreachable`
under FiniteOnly semantics and silently returns a NaN under NanOnly
semantics, e.g. f8E4M3FN. Without the guard every fp8 min/max reduction
would return NaN through NaN-propagating `arith.minimumf`, which is
worse than the bug being fixed. Tests pin f8E4M3FN to the ±448 fallback
with the option both on and off.
Three smaller notes. The flag governs only identities the pass invents,
not the NaN that `nan_mode = IGNORE` is required to produce. ARGMAX is
updated for uniformity but is NFC in effect, since its running max only
feeds the `UGT`/`OGT` predicate and its value output is discarded.
`max_pool2d` in TosaToLinalgNamed.cpp is wrong the same way but left
alone here, because its initial value doubles as the `tensor.pad`
padding value and needs its own review.
Every pre-existing test in tosa-to-linalg.mlir now runs under both
settings, via a second RUN line sharing the CHECK prefix with only the
four seed constants split into FINITE/NONFINITE. New cases cover f16,
bf16 and f64 min/max, argmax f16, both f8E4M3FN fallbacks, and the
IGNORE seed. check-mlir-conversion is green.
Developed with AI assistance (Claude Opus 5 via Claude Code) per the
[LLVM AI Tool Use Policy](https://llvm.org/docs/AIToolPolicy.html): the
implementation, the tests, and the first draft of this description were
tool-generated, then reviewed and edited by me before posting.
Co-authored-by: Hariprasad Ravishankar <hravisha at ls-01-1c-a0-b8-77-e7-5d.dhcp.mathworks.com>
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: f6faa4691e2340c9c8be3daa07b0f0867f3df868
https://github.com/llvm/llvm-project/commit/f6faa4691e2340c9c8be3daa07b0f0867f3df868
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
Log Message:
-----------
[VPlan] Model first memory runtime checks as VPlan recipes. (#221483)
Add VPlanTransforms::addMemoryRuntimeChecks to generate memory runtime
checks directly as VPlan recipes, re-using VPSCEVExpander. This enables
more CSE/simplification opportunities in VPlan, and in the long term
allows us to remove the current slightly hacky runtime check generation
code, which builds checks up front in IR, and removes them again if we
do not vectorize. This whole dance requires quite a bit of code to make
the removal step transparent if the loop was not vectorized.
The initial patch excludes the following checks from VPlan expansion (to
be added in follow-ups), to keep the initial logic as simple as
possible:
* checks in nested loops (VPlan expansion cannot hoist out of the outer
loop)
* diff checks
* bounds requiring expanding AddRecs (currently AddRecs must be expanded
in the Plan's entry)
The IR block built by GeneratedRTChecks::create() is still needed to
cost the checks and to detect that they folded to a constant. Once all
kinds of runtime checks can be created directly in VPlan, we can compute
their cost via the VPlan-based cost model, like other skeleton blocks.
PR: https://github.com/llvm/llvm-project/pull/221483
Commit: 27fa053c10baebc0c236e8d6b4339c3cb5150f04
https://github.com/llvm/llvm-project/commit/27fa053c10baebc0c236e8d6b4339c3cb5150f04
Author: HernandezJosze <joseantoniohg at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
Log Message:
-----------
[lldb][Clike][NFC] Fix for #222611 (#227146)
Fixes #222611
This fixes an issue with Verify being conditionally compiled only when
assertions are enabled
Commit: a6b17eda98a19d1fc373921c3990b28c297f013e
https://github.com/llvm/llvm-project/commit/a6b17eda98a19d1fc373921c3990b28c297f013e
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
A llvm/test/CodeGen/ARM/load_store_opt_eraseliveregs.mir
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: f8a2cbf1b2a3c5b7374e9502b0cf9e02176300a3
https://github.com/llvm/llvm-project/commit/f8a2cbf1b2a3c5b7374e9502b0cf9e02176300a3
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227144)
It seems that with actions/checkout we run into a 5 minute timeout
somewhere (presumably in the websocket that communicates between the
runner and workflow pods), which causes actions/checkout to succeed but
without actually writing anything out, causing the rest of the workflow
to fail. This patch fixes that by forcing verbose output, which should
ensure there is no 5 minute period without any output.
This issue doesn't seem to impact other parts of the workflow due to
progress indicators.
Commit: e914628b69f5385f65b8f8008c7c0b2ddd47fb2e
https://github.com/llvm/llvm-project/commit/e914628b69f5385f65b8f8008c7c0b2ddd47fb2e
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/handler.cpp
M libsycl/src/usm_functions.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libsycl/unittests/queue/queue.cpp
M libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] Add context to exception's throw. (#224668)
sycl::exception class can contain associated context (see 4.13.2.
Exception class interface).
Specification doesn't declare rules about when context must be
associated and when not.
Passing context to exception ctor in all places where context is
available.
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 5394e45eea5ff6ef5434d454e10af8f932825c53
https://github.com/llvm/llvm-project/commit/5394e45eea5ff6ef5434d454e10af8f932825c53
Author: Nopileos Isemados <xen134 at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/minmax-fold.ll
Log Message:
-----------
[InstCombine] Use context in select-to-umin nonzero check (#225381)
foldSelectICmpMinMax() queries whether W is nonzero without an
instruction context, missing facts from a preceding llvm.assume or
dominating branch. Querying at the comparison enables the existing
select-to-umin fold.
Fix #225345
Commit: 0676699b26140a9ac37b01790b04e41845a1c70a
https://github.com/llvm/llvm-project/commit/0676699b26140a9ac37b01790b04e41845a1c70a
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M llvm/include/llvm/Support/Compression.h
M llvm/lib/Support/Compression.cpp
M llvm/unittests/Support/CompressionTest.cpp
Log Message:
-----------
[LLVM] Infer compression format from zlib and zstd headers (#222773)
Summary:
This PR adds two routines that allow users to decompress bitstreams
without explicitly specifying the format. This is inferred from the
bytes
of the object, returning an error if it could not be identified. The
Zstd
standard exposes proper magic bytes, while Zlib needs to be inferred
through the two header bytes.
Because this is a raw bytestream, there is a chance that someone
could get bytes that pass this check, giving no 'reason', but since
the decompression routine requires the expected size there is no
chance it will falsely succeed.
Commit: cfdcfe675d14b886886fa65206718b7945c6baf9
https://github.com/llvm/llvm-project/commit/cfdcfe675d14b886886fa65206718b7945c6baf9
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M offload/CMakeLists.txt
Log Message:
-----------
[flang-rt][Offload] Fix builds using the new amdgpu triple spelling (#227110)
Summary:
The offload cache files, such as `FlangOffload.cmake`, build the AMDGPU
runtimes for `amdgpu-amd-amdhsa`, but flang-rt and offload only
recognize AMDGPU triples beginning with `amdgcn`. Just check both like
we do elsewhere. Eventually this can all be dropped.
Commit: 288fb0dd02d9a1353c1e7711cc29b930be084e20
https://github.com/llvm/llvm-project/commit/288fb0dd02d9a1353c1e7711cc29b930be084e20
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Reuse `UnitMaskIdx` lambda in `computeRegUnitLaneMasks` (NFC) (#227249)
This simplifies the code at the expense of losing an assert that checks
that one `SUI` matches more than one `RU`s.
Commit: 64069eea408ce7b3c17c37153bbb283eea4774df
https://github.com/llvm/llvm-project/commit/64069eea408ce7b3c17c37153bbb283eea4774df
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang/include/clang/AST/Expr.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][AST] Make Result parameter of `isCXX11ConstantExpr` mandatory (#226493)
We want to discourage people from just checking if something is a
constant expression without using the value, which we always compute
anyways.
There are only three call sites, all in clang, and all pass a value
already. Change the parameter type to a reference to enforce this.
Commit: e6ebdcbaa475a35f6f73da7754185757495b8627
https://github.com/llvm/llvm-project/commit/e6ebdcbaa475a35f6f73da7754185757495b8627
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M openmp/module/CMakeLists.txt
Log Message:
-----------
[OpenMP] Install the Fortran module files with libomp-mod (#227116)
Summary:
The `libomp-mod` install component only contains `omp_lib.h`. The module
files are only installed incidentally as part of the Fortran runtime or
directory copy. Just do this directly. These were intentinoally dropped
in https://github.com/llvm/llvm-project/pull/171515, in favor of the
directory copy. However, this means these are ignored when done through
the specific component target.
Shouldn't affect plain installs.
Commit: debfbb0c3593e5bd8c7c61596cd3bc2c9d116ca4
https://github.com/llvm/llvm-project/commit/debfbb0c3593e5bd8c7c61596cd3bc2c9d116ca4
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Disable sanitizers for configuration checks with --unwindlib=none (#227092)
Summary:
in a sanitized runtimes build, every configuration check is linked with
both -fsanitize=... and --unwindlib=none and fails, because the
sanitizer runtimes need the unwinder. This completes an existing TODO by
suppressing this for the compiler flag checks in this configuration.
This shouldn't affect any existing users. Motivation is compiling
`+asan` multilibs for existing OpenMP/Offloading configurations.
Commit: 798116a302498b8c129eb369f2205657f1ede5a0
https://github.com/llvm/llvm-project/commit/798116a302498b8c129eb369f2205657f1ede5a0
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/Modules/SanitizerUtils.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/asan/scripts/CMakeLists.txt
M compiler-rt/lib/copyprof/CMakeLists.txt
M compiler-rt/lib/dfsan/CMakeLists.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/hwasan/scripts/CMakeLists.txt
M compiler-rt/lib/memprof/CMakeLists.txt
M compiler-rt/lib/msan/CMakeLists.txt
M compiler-rt/lib/tsan/rtl/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Give every installed file an install component (#227103)
Summary:
LLVM tries to expose install components to allow distributions to choose
the layers to build. Not all of the compiler-rt artifacts were installed
under this configuration. This PR makes this a consistent rule by
updating the existing helper function to require a parent target for the
component.
Adds things like
```
ninja install-dfsan
```
and ensures this installs everything
```
ninja install-compiler-rt-x86_64-unknown-linux-gnu
```
Commit: e39ea67aa01d59dd2cbcac7ea57e079ba81f9a43
https://github.com/llvm/llvm-project/commit/e39ea67aa01d59dd2cbcac7ea57e079ba81f9a43
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/languages/cuda/CMakeLists.txt
M offload/languages/hip/CMakeLists.txt
M offload/languages/kernel/CMakeLists.txt
M offload/tools/CMakeLists.txt
M offload/tools/deviceinfo/CMakeLists.txt
M offload/tools/kernelreplay/CMakeLists.txt
Log Message:
-----------
[Offload] Fix installing offload through its install components (#227036)
Summary:
Distribution builds install each runtime through its component's install
target rather than the global `install` target. Several pieces of
offload
did not work with this:
- `install-offload` only depended on `omptarget` and `LLVMOffload`, but
the component also installs `LLVMOffloadKernel`. The install failed
unless something else had already built it.
- The CUDA, HIP, and kernel language headers were installed without a
component, so component installs skipped them.
- The offload tools used `add_llvm_tool` which did not build and/or
install. We already removed `add_llvm_library` from the libraries. Now
these use standard `add_execulable`.
Commit: 86ff2940bf7293e76a5134c5d04ddc4a06e07481
https://github.com/llvm/llvm-project/commit/86ff2940bf7293e76a5134c5d04ddc4a06e07481
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[flang-rt] Install the runtime libraries under the flang-rt component (#227073)
Summary:
The Flang-RT libraries were installed without a component, so they were
placed in `Unspecified` and there was no `install-flang-rt` target. The
runtimes build forwards `install-flang-rt` for every enabled runtime, so
requesting flang-rt in a distribution failed on the missing target, and
component installs skipped the libraries. Add the component and its
install targets, matching the existing `flang-rt-headers` and
`flang-rt-mod` components.
Commit: f803f44c5dc9753eb0c7b2f2890fa793bcf758a8
https://github.com/llvm/llvm-project/commit/f803f44c5dc9753eb0c7b2f2890fa793bcf758a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/debugtrap-not-translated.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/trap-ext-disabled.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions_remove_cap_if.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-attributes.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-metadata.ll
M llvm/test/CodeGen/SPIRV/get-global-id-non-integer-dim.ll
M llvm/test/CodeGen/SPIRV/linkage/available-externally-global.ll
M llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
Log Message:
-----------
[NFC][SPIR-V] Add spirv-val RUN lines where missing (#227245)
Commit: 8698ff52ddb70f584d3c3b9825b75d52ce9eb78d
https://github.com/llvm/llvm-project/commit/8698ff52ddb70f584d3c3b9825b75d52ce9eb78d
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
Log Message:
-----------
[Offload] Try loading dynamic libraries at global scope first (#227020)
Summary:
The intention of the dynamic path is to provide basic linking in cases
where the SDK is not avaialble at the user's build time. Previously this
did a distinct `dlopen` call on the library.
However, in cases where an existing HSA implementation exists at global
scope this can cause multiple instances to be open at the same time.
Specifically this is problematic if mixing with another implementation
(Like HIP or CUDA) or trying to intercept functions (like compiler-rt).
The compiler-rt interceptors currently carry interceptors into `dlsym`
when we should instead just load these at global scope, this makes them
behave more similar to a direct link in these scenarios, which was the
intention.
The fallback remains as the current behavior, should only trigger in
cases where there is an existing HSA in the process.
Commit: d6755f499686ddb83bdff7272ab53244e6f4a587
https://github.com/llvm/llvm-project/commit/d6755f499686ddb83bdff7272ab53244e6f4a587
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/liboffload/API/Common.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/unittests/OffloadAPI/init/olInit.cpp
Log Message:
-----------
[Offload] Lazily initialize platforms in the Offloading API (#227084)
Summary:
The Offloading library wraps around the underlying plugins. The problem
is that we currently initialize all plugins we find, even if they are
not needed for the program. This is very expensive for trivial uses, as
fully heterogenous usage is quite rare. In practice this means that you
will always pay a 200 ms penalty for having CUDA installed.
This patch changes the behavior to provide accessors into the plugins
and devices that allows them to be initialized lazily. We use a
once_flag, this should properly take a fast-path check while still
blocking on concurrent use.
Making full use of this will require a way to filter platforms more
specifically. I'm thinking of what this would look like as an API.
I'm thinking that we either have an extra iterate function that takes a
callback on the platform, or we just provide a helper to find all the
devices that can run a given image. Maybe both?
Fixes: #159636
Realnd of: https://github.com/llvm/llvm-project/pull/163272
Commit: dab23c6ed5d7418122c3b3b3d7bacc6b559a5804
https://github.com/llvm/llvm-project/commit/dab23c6ed5d7418122c3b3b3d7bacc6b559a5804
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix "leak" of PMR resource in benchmark (#216114)
The benchmark was not releasing the monotonic buffer resource, which
means we'd grow a larger and larger pool as Google Benchmark would go
through more and more iterations of the benchmark.
Commit: b921857ebd04e13e392605dd78b285ff23cae835
https://github.com/llvm/llvm-project/commit/b921857ebd04e13e392605dd78b285ff23cae835
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M polly/lib/Support/SCEVAffinator.cpp
Log Message:
-----------
[SCEV] Rename SCEVNoWrapFlags to SCEVFlags (NFC) (#225179)
In preparation to extend the flags that ScalarEvolution can represent,
rename SCEVNoWrapFlags to the more general SCEVFlags. In particular, we
preserve the (get|set)NoWrapFlags interface, which simply masks the
no-wrap flags from the newly-introduced (get|set)Flags.
See also: #225065.
Commit: 37a904bf468d7285d0679b7508a0cd5582a5cd25
https://github.com/llvm/llvm-project/commit/37a904bf468d7285d0679b7508a0cd5582a5cd25
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libsycl/include/sycl/__spirv/spirv_vars.hpp
Log Message:
-----------
[libsycl] Remove libsycl declarations of spirv builtins (#227031)
Assisted-by: Claude Code.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 774b139f9a6f82edabfe5a27bb88875086c5946e
https://github.com/llvm/llvm-project/commit/774b139f9a6f82edabfe5a27bb88875086c5946e
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: 1c6ceefa8f63fcdedf6e522e3446d15aa2ee2856
https://github.com/llvm/llvm-project/commit/1c6ceefa8f63fcdedf6e522e3446d15aa2ee2856
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Log Message:
-----------
[MISched] Extract `operator<<` for SUnit(NFC) (#226785)
Establish a consistent API for printing a SUnit, rather than a scattered
duplication.
Commit: 2bc2e0f8cdd6ab036191ab4c8b474ce1c75bf841
https://github.com/llvm/llvm-project/commit/2bc2e0f8cdd6ab036191ab4c8b474ce1c75bf841
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/VirtualMethodFamilyFormatTest.cpp
Log Message:
-----------
[SSAF] Serialize virtual method summaries and families (#213318)
Per-TU summaries and whole-program results cross process boundaries, and
the JSON layer refuses to write a summary kind it has no format for.
Register both sides so
--ssaf-extract-summaries=VirtualMethod becomes usable and the
family result survives a round trip.
Deserialization tolerates a missing override list, since a root virtual
method legitimately has none.
§3 of rdar://179151603
Assisted-By: claude
Commit: ee7a76cb938e3c7fa8fcd3f135914d135c32475e
https://github.com/llvm/llvm-project/commit/ee7a76cb938e3c7fa8fcd3f135914d135c32475e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Support/InterfaceSupport.h
M mlir/test/mlir-tblgen/op-interface.td
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
Log Message:
-----------
[mlir][ODS] Copy constant generated interface model prototypes (#226323)
Generate constexpr constructors for interface models whose concept is a
table of callbacks. Construct exact generated models from a static
prototype; keep external and fallback models on their existing path.
In OpenMPDialect.cpp this saves about 0.22B compiler instructions and
10.5KB of text.
Assisted-by: Codex
Commit: 44c876d6611944ffce4ea5103bb03644307654e4
https://github.com/llvm/llvm-project/commit/44c876d6611944ffce4ea5103bb03644307654e4
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Add NVIDIA LTO to unsupported list in shlib global var test (#227315)
Commit: ec0f83c4284225ec5d0327ce2a82072a52aaf91e
https://github.com/llvm/llvm-project/commit/ec0f83c4284225ec5d0327ce2a82072a52aaf91e
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Fix crashes on target regions inside namespace-scope lambdas and blocks (#226691)
Fixes #223397
A `target` region inside a lambda or block at namespace scope crashed
clang in two places. In Sema, `isOpenMPCapturedDecl` decides whether a
global must be captured by walking the function scope stack down to the
innermost OpenMP captured region, stopping at an ordinary function
scope. The capture initializers of a directive's outermost region are
built after all of its regions have been popped. Inside a function that
walk ends at the function's scope, but a namespace-scope lambda or block
has nothing underneath it, so the walk ran off the stack and asserted.
This happens for any global reference, such as `int &r = x; auto l = []
{ #pragma omp target r = 1; };`. The self-referential declaration in the
report is incidental. Once past Sema, CodeGen asserted too: it names the
outlined kernel after the region's parent function, and such a region
has none, even without a reference.
In Sema, running out of scopes now means the same as reaching a function
scope, so the variable is not captured from the current scope. That is
what the same lambda already gets inside a function. In CodeGen, a
region with no parent function is named after the function being
emitted.
Commit: 51e7312ef57f7123601a0d28784b8816735e9acf
https://github.com/llvm/llvm-project/commit/51e7312ef57f7123601a0d28784b8816735e9acf
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
Log Message:
-----------
[mlir][OpenACC] Match reuse barriers to the reused private scope (#225570)
A region that writes both gang- and worker-private slots was considered
to be a gang scope and a barrier was missed. This change keeps the two
store sets separate and pick the barrier from the scope that is actually
reused. Follow-up for
https://github.com/llvm/llvm-project/pull/224437#discussion_r4066418696.
Commit: 6fba46ba5090407a7e1fbde7c904ada997eb5bb5
https://github.com/llvm/llvm-project/commit/6fba46ba5090407a7e1fbde7c904ada997eb5bb5
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cos-1.ll
M llvm/test/Transforms/InstCombine/cos-sin-intrinsic.ll
Log Message:
-----------
[InstCombine] Don't fold `sin(-x)` to `-sin(x)` if `denormals` may flush to `+0.0` (#227039)
Commit: 471781a06bfedca1335896abdd6811689415c95d
https://github.com/llvm/llvm-project/commit/471781a06bfedca1335896abdd6811689415c95d
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-branch-into-body.f90
A flang/test/Lower/pre-fir-tree-unstructured-internals.f90
M flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Detect loops whose branching is confined to their body (#225757)
A DO loop is classified as either structured or unstructured, and a
single raw branch anywhere in its body forces the loop -- and every
construct enclosing it -- onto the unstructured path.
That is stronger than necessary. A loop keeps its structured control
flow as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.
This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
Commit: 267372036a00d8dd626ac0f0de4080c92dc05f8f
https://github.com/llvm/llvm-project/commit/267372036a00d8dd626ac0f0de4080c92dc05f8f
Author: Shravan Sheth <shrashet at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/live-vars/live-outs.ll
Log Message:
-----------
[Hexagon] Add missing -mtriple to live-outs test (#227079)
This test's RUN command did not specify a target triple, so lit could
execute it using the host target.
This causes the test to fail when LLVM is built with only the Hexagon
target enabled. Add -mtriple=hexagon so the test consistently runs as a
Hexagon test.
Commit: 108bbd3643e72edac5ae89c4d9cdfee3d0f0907f
https://github.com/llvm/llvm-project/commit/108bbd3643e72edac5ae89c4d9cdfee3d0f0907f
Author: John Brawn <john.brawn at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/load-store-overlap.ll
Log Message:
-----------
[SROA] Remove splitSliceTails loop in presplitLoadsAndStores (#227061)
The asserts in this loop can trigger when we presplit an overlapping
load/store pair, and the extra splits it adds don't appear to have any
benefit: we only get them when we have an unsplittable slice that's
fully enclosed inside a splittable slice, and in the test I've managed
to create for this (no_move_enclosed_unsplittable_store, and there are
no existing tests for this) the final SROA output is the same (except
that the variables end up with different names).
Commit: fa0553052a289a6d9df61eec00015906757ceca4
https://github.com/llvm/llvm-project/commit/fa0553052a289a6d9df61eec00015906757ceca4
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-scalar-epilogue-fallback.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-last-index-fp.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
Log Message:
-----------
[LV] Regenerate some CHECK lines (#226468)
Commit: 8300ea9db639e9509274216518f91fcd92112495
https://github.com/llvm/llvm-project/commit/8300ea9db639e9509274216518f91fcd92112495
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Move the rescheduled copy chain back to front (#227289)
rescheduleMIBelowKill sinks an instruction below the kill of its tied
source, along with the run of copies that follows it. With LiveIntervals
the copies are spliced one at a time so handleMove sees a well-formed
block, but they were visited front to back and each inserted before the
previously moved one. This reversed them, and transiently moved a copy
below its use, asserting in handleMoveDown.
Walk them back to front instead, which also preserves the original
order.
Exposed by #225174, which made LiveIntervals available here by default.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3b79ef0b8fa9bfa7435a69bc4a2108c5c4c264ed
https://github.com/llvm/llvm-project/commit/3b79ef0b8fa9bfa7435a69bc4a2108c5c4c264ed
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix ProfCheck for optimizing bitreverse (#227189)
Commit: b84537d2af403d4fe852b986cc62ec5da959228d
https://github.com/llvm/llvm-project/commit/b84537d2af403d4fe852b986cc62ec5da959228d
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
Log Message:
-----------
[AMDGPU] Replace GCN-NOT with autogen checks in test (#227148)
The assembly has many v_mov_b32s, so minor scheduling changes can
trigger failure on the GCN-NOT. It seems the test is designed to show
CSE behavior, which still holds even if minor scheduling changes break
the NOT checks.
Commit: b62df47f8247c77ea785c059e53fdfbf3b431522
https://github.com/llvm/llvm-project/commit/b62df47f8247c77ea785c059e53fdfbf3b431522
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/PowerPC/clmul-vector.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/RISCV/clmulh.ll
M llvm/test/CodeGen/RISCV/clmulr.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[ISel] Improve `clmul` fallback implementation (#204802)
Generalize the approach from
https://github.com/llvm/llvm-project/pull/203727 to narrower and wider
integers.
We still need the fallback for when multiplication isn't available, and
it turns out that for some widths the fallback emits fewer instructions,
the naive fallback is still used for `i1`, `i3`, `i4` and `i9`. I've
also now enabled wider integers (`i128` and `i256` have uses in
cryptography).
Based on my local experiments, the Karatsuba approach (e.g. as in
https://github.com/rust-lang/rust/pull/152132#discussion_r2778609222) is
not actually better than zero extending the input and using
multiplication with holes on the wider type.
CC https://github.com/llvm/llvm-project/issues/203694
CC: @eisenwave
Commit: 898d75182df3928bf12bfa97d24136309a4855d3
https://github.com/llvm/llvm-project/commit/898d75182df3928bf12bfa97d24136309a4855d3
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/cosf.h
A libc/src/__support/math/cosf_double_eval.h
A libc/src/__support/math/cosf_float_eval.h
M libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf_double_eval.h
A libc/src/__support/math/sinf_float_eval.h
M libc/test/src/math/CMakeLists.txt
R libc/test/src/math/cosf_float_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
R libc/test/src/math/exhaustive/cosf_float_test.cpp
M libc/test/src/math/exhaustive/cosf_test.cpp
R libc/test/src/math/exhaustive/sinf_float_test.cpp
M libc/test/src/math/exhaustive/sinf_test.cpp
R libc/test/src/math/sinf_float_test.cpp
M libc/test/src/math/sinf_test.cpp
Log Message:
-----------
[libc][math] Reorganize sinf and cosf function selection (#226529)
Reorganises sinf and cosf similarly to #224735 such that:
src/__support/math/func.h selects implementation, and
src/__support/math/func_<type>_eval.h implements func with <type> as the
intermediate computational type.
Commit: d43ca5804f3b3c3704a54ba4d69519d36aea4030
https://github.com/llvm/llvm-project/commit/d43ca5804f3b3c3704a54ba4d69519d36aea4030
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: ae43dd09892fcffcea83ef1df057e0f2c4f57462
https://github.com/llvm/llvm-project/commit/ae43dd09892fcffcea83ef1df057e0f2c4f57462
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
M flang/include/flang/Common/api-attrs.h
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
The amdgcn libflang_rt.runtime.a has undefined references to the DescriptorIoTicket/DerivedIoTicket methods and to flang_rt_verbose_abort. The tickets live in descriptor-io.cpp, which isn't in gpu_sources, but the work queue still refers to them. Any device code that ends up in the work queue (e.g. ALLOCATE of a derived type with default initialization in a target region) then fails to link.
The CUDA PTX build already avoids this with a thin I/O mode. This renames `RT_CUDA_THIN_IO` to `RT_THIN_IO`, defines it in api-attrs.h for the native GPU builds (`RT_GPU_TARGET` without `RT_DEVICE_COMPILATION`), and keeps the CMake define for the CUDA PTX library under the new name. flang_rt_verbose_abort is defined in stl-overrides.cpp, so that's added to gpu_sources.
Tested on gfx90a. The amdgcn library no longer has those undefined symbols, gains only the flang_rt_verbose_abort definition, and doesn't lose any others. A small reproducer (derived type with default init allocated inside a target region) links and runs, and scalar PRINT from device code gives the same output as before. The host library's symbols are identical to before. I haven't built nvptx or the CUDA offload configuration.
Downstream report: ROCm/llvm-project#3517
Commit: 299970a9bad5d2ec7f93290715e933a9499bb708
https://github.com/llvm/llvm-project/commit/299970a9bad5d2ec7f93290715e933a9499bb708
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
Commit: d364eb1d8a00b901c2114b7a9d3984792f3702d3
https://github.com/llvm/llvm-project/commit/d364eb1d8a00b901c2114b7a9d3984792f3702d3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Profile/branch-logical-mixed.cpp
M clang/test/Profile/c-captured.c
M clang/test/Profile/c-general.c
M clang/test/Profile/c-ternary.c
M clang/test/Profile/cxx-class.cpp
M clang/test/Profile/cxx-lambda.cpp
M clang/test/Profile/cxx-rangefor.cpp
M clang/test/Profile/cxx-stmt-initializers.cpp
M clang/test/Profile/cxx-templates.cpp
M clang/test/Profile/cxx-throws.cpp
M clang/test/Profile/objc-general.m
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_allowlist_ignorelist.cpp
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
M llvm/test/CodeGen/DirectX/llc-vector-store-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-load.ll
M llvm/test/CodeGen/RISCV/riscv-promote-constant.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_abilist.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_call.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_mem_intrinsic.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_other_ops.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_phi.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_select.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store_threshold.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-contiguous-counters.ll
M llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/LowerIFunc/ifunc-alias.ll
M llvm/test/Transforms/LowerIFunc/ifunc-program-addrspace.ll
M llvm/test/Transforms/LowerIFunc/lower-ifunc.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/const-gep.ll
M llvm/test/Transforms/PGOProfile/counter_promo.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_merge.ll
M llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll
M llvm/test/Transforms/PGOProfile/counter_promo_sampling.ll
M llvm/test/Transforms/PGOProfile/instr_entry_bb.ll
M llvm/test/Transforms/SROA/phi-gep.ll
M llvm/test/tools/llvm-reduce/ifunc-alias.ll
M llvm/test/tools/llvm-reduce/remove-ifunc-program-addrspace.ll
M llvm/test/tools/llvm-reduce/remove-ifunc.ll
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
Log Message:
-----------
[IRBuilder] Produce canonical constexpr GEPs (#226425)
This switches the IRBuilder to always produce canonical constexpr GEPs
in ptradd form, including in the case where ConstantFolder rather than
TargetFolder is used.
This is done in a slightly hacky way, by passing the DataLayout from the
insertion point into FoldGEP. In the future, when we start
canonicalizing the non-constant GEPs as well, we'll do the
canonicalization directly in IRBuilder and replace FoldGEP with
FoldPtrAdd. (Though it would be even better to make IRBuilder always
require a DataLayout and eliminate the ConstantFolder/TargetFolder
distinction...)
Commit: 66ee2aad6cbc2ebe9bc74b6125ee453d2b0e6c0d
https://github.com/llvm/llvm-project/commit/66ee2aad6cbc2ebe9bc74b6125ee453d2b0e6c0d
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-extern-weak.ll
Log Message:
-----------
[SystemZ][z/OS] Keep weak references weak (#226840)
Fixes #226835.
An `extern_weak` reference must stay unresolved without an error when
the symbol does not exist. On z/OS two kinds of references were always
strong:
- Taking the address of an external function goes through the indirect
symbol `<name>@indirect` (ADA slot `MO_ADA_INDIRECT_FUNC_DESC`). It
never got the weak attribute of the function symbol. The weak attribute
is already set on the function symbol when the ADA is emitted, because
`AsmPrinter::doFinalization` emits the weak references before
`emitEndOfAsmFile`. So the indirect symbol now becomes a weak reference
too.
- An external data reference is a part reference (PR). `GOFF::PRAttr`
had no binding strength, and the PR constructor in `GOFFObjectWriter`
did not set it. `PRAttr` gets a `BindingStrength` field, and
`defineExtern` passes the strength of the symbol.
Without this change, a C program with `extern int wv
__attribute__((weak));` and `extern void wf(void)
__attribute__((weak));` that takes `&wv` and `wf` fails to bind on z/OS
3.1 (IEW2456E for `wv` and `wf`). With the change it binds, and at run
time both addresses are null, as on other targets.
Tests: new `zos-extern-weak.ll` checks `WXTRN wf at indirect` in the HLASM
output and the binding strength of the ER and PR symbols in the object
file. `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported). Without the fix, both checks of
the new test fail.
Found while porting Free Pascal to z/OS (`weakexternal`).
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: c87e56c077bc3429264661541238a27a228bce4a
https://github.com/llvm/llvm-project/commit/c87e56c077bc3429264661541238a27a228bce4a
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-unstructured-internals.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
A flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
A flang/test/Lower/OpenMP/wsloop-unstructured-internals.f90
M flang/test/Lower/always-execute-loop-body.f90
A flang/test/Lower/do-loop-branch-to-loop-header.f90
M flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/select-case-statement.f90
Log Message:
-----------
[flang] Lower loops whose branching is confined to their body structurally (#225758)
Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.
Lower it structurally instead, with its body folded into a region that
can hold the branching. The loop keeps its bounds on the op, so it
remains available to whatever transforms or parallelizes it. Only the
body is folded: the loop control statements are emitted as they are for
any structured loop, since a branch from outside may target either of
them.
Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
Commit: 7c731c8a481040c4a1a7f89bddacfd735d09b984
https://github.com/llvm/llvm-project/commit/7c731c8a481040c4a1a7f89bddacfd735d09b984
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix out-of-bounds read in the associative container query benchmarks (#227070)
The query benchmarks for associative containers would access the pool of
keys to use in the benchmark out-of-bounds.
Commit: f9116ec5fd06302669e1be12fbc969df8d6ed236
https://github.com/llvm/llvm-project/commit/f9116ec5fd06302669e1be12fbc969df8d6ed236
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Use a union for uninitialized storage in associative container benchmarks (#227068)
This removes the need for reinterpret_cast when accessing the containers
constructed in the scratch space, and fixes the PMR constructor
benchmark passing the wrong pointer to DoNotOptimize.
Commit: d20a5fd238551ddf844776101c79f1b373193fa3
https://github.com/llvm/llvm-project/commit/d20a5fd238551ddf844776101c79f1b373193fa3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
Log Message:
-----------
[libc++] Fix use-after-free in the monotonic_buffer benchmark (#227072)
We would release the monotonic_buffer_resource before the closing brace,
which runs the destructor of the list and accesses the nodes.
Commit: 665164bdcd1043714df9821a877c7b00aa0b8e21
https://github.com/llvm/llvm-project/commit/665164bdcd1043714df9821a877c7b00aa0b8e21
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks-alloca.ll
Log Message:
-----------
[SLP]Fix alloca handling in runtime alias check versioning (#227341)
Do not duplicate allocas when versioning a block: keep the leading
static allocas in the header block and reject blocks with any other
alloca. Duplicating them moved static allocas out of the entry block
and merged the clones through a PHI, which is invalid for lifetime
markers.
Fixes #227328
Commit: 2debc420834a131fc24a97b325c65ed92c997ea6
https://github.com/llvm/llvm-project/commit/2debc420834a131fc24a97b325c65ed92c997ea6
Author: Q <60785373+StarryCSF at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply high parts accumulate intrinsics (#224261)
Add intrinsics, Clang builtins and SelectionDAG support for the RISC-V P
multiply high accumulate with byte/halfword index operations.
See
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-high-parts-accumulate.
The pmhacc.h.bXX forms operate on the whole register and select directly
on both RV32 and RV64.
The pmhacc.w.hXX forms select directly on RV64, on RV32 there is no
64-bit packed form, so the intrinsics split into a pair of scalar
mhacc.h0/mhacc.h1 accumulations, one per result word.
Commit: fe7b59b5c77baba5b904752c614590432fe4be35
https://github.com/llvm/llvm-project/commit/fe7b59b5c77baba5b904752c614590432fe4be35
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/frem.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] LowerStore - peek through oneuse bitcasts to see if vector is freely splittable. (#227282)
Peek through bitcasts when seeing if we can avoid an unnecessary
concat_vectors and store the subvectors directly - if the concat had
been worth it, combineConcatVectorOps would have moved the concat
further up.
Helps avoid more cases of unnecessary vzeroupper, 256-bit usage etc. in
particular on AVX1 targets (Sandybridge, Jaguar and Bulldozer all
benefit from this), but AVX2/512 targets as well.
Commit: b64c29da46bffc57f08a9e16de8a50dca496cf00
https://github.com/llvm/llvm-project/commit/b64c29da46bffc57f08a9e16de8a50dca496cf00
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-lower-constant.ll
Log Message:
-----------
[SystemZ][z/OS] Use a function descriptor for external functions in initializers (#226682)
The address of an external function in a static initializer was emitted
as a V-con, i.e. the entry point, while an XPLINK function pointer must
point to a function descriptor. A call through such a pointer loads the
environment and entry point from the machine code of the function.
Create a descriptor in the ADA for external functions as well, as is
already done for internal functions and for constructor/destructor lists
(`emitXXStructorList`).
`zos-lower-constant.ll` is updated: the pointer to the external function
`bar` now points to its descriptor in the ADA.
A minimal program (`int (*p)(void) = ext;` called from `main`) ended
with S0C6 at address `0707070707070707` on z/OS 3.1; with this change it
returns the expected value.
Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1303 passed, 19 unsupported).
Fixes #226658.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: cb4a7dcc3974acff9818b46d91e98c1333401302
https://github.com/llvm/llvm-project/commit/cb4a7dcc3974acff9818b46d91e98c1333401302
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[llvm] Upgrade ARM data layouts that are missing Fi8 (#224639)
Such as the ones in
https://github.com/llvm/llvm-test-suite/tree/main/Bitcode/simd_ops,
which started failing to compile after
https://github.com/llvm/llvm-project/pull/224012
stopped us overriding the module data layout.
fatal error: error in backend: Can't create a MachineFunction using a
Module with a Target-incompatible DataLayout attached
Target DataLayout: e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64
Module DataLayout: e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64
The old layout is p32:32-i64, the new is p32:32-Fi8-i64.
In this change I have added this case to the data layout upgrades. If
there's no p32:32, the layout is not changed, also if there is already a
"Fi" or "Fn" in the layout. These cases may not exist or be valid in
reality, but I need some fallback behaviour just in case.
Commit: f64b3076d172aab368ec2d1e88d8ad1efa4ca424
https://github.com/llvm/llvm-project/commit/f64b3076d172aab368ec2d1e88d8ad1efa4ca424
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Add llvm_unreachable after some RegisterSetType switches (#223375)
The ones where you are supposed to case X: return Y;. We do enable the
not fully covered switch warning, so the unreachable just makes the
mistake more obvious.
I did not change GetInvalidationMask because this will be refactored by
#223373.
Commit: e15e59d17ff1ff7bc972cf38dd546810c99c9aee
https://github.com/llvm/llvm-project/commit/e15e59d17ff1ff7bc972cf38dd546810c99c9aee
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/list
M libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/push_range_container_adaptors.h
M libcxx/test/std/containers/container.adaptors/queue/queue.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/queue/queue.defn/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.defn/push_range.pass.cpp
Log Message:
-----------
[libc++] Add coverage for push_range on stack/queue with non-default underlying containers (#210730)
This increases the test coverage for stack/queue and actually caught an
issue in list::__invariants which was previously dead code.
Commit: c14195eb3a68d09d150b2f4deb9e50daced21c92
https://github.com/llvm/llvm-project/commit/c14195eb3a68d09d150b2f4deb9e50daced21c92
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
Log Message:
-----------
[compiler-rt] Remove dlsym interceptor for HSA UBSan (#227022)
Summary:
This existed to handle the OpenMP case that dynamically opened via
`dlsym`. However, https://github.com/llvm/llvm-project/pull/227020
removes the need for this by first checking the global space first.
The main motivation is that the `dlsym` interceptor layer was the most
janky part of this whole affair and was a major blocker to supporting
`-shared-libsan` in https://github.com/llvm/llvm-project/pull/226551.
Commit: 6cf9437fbed676c0225b304ebdc399198a0db57b
https://github.com/llvm/llvm-project/commit/6cf9437fbed676c0225b304ebdc399198a0db57b
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
A mlir/unittests/Dialect/Arith/ArithUtilsTest.cpp
A mlir/unittests/Dialect/Arith/CMakeLists.txt
M mlir/unittests/Dialect/CMakeLists.txt
Log Message:
-----------
[mlir][arith] Support equal-width float conversions (#225346)
Use arith.convertf in convertScalarToDtype when converting between
floating-point types that have the same bit width but different
semantics.
Add focused unit coverage for f16-to-bf16 and bf16-to-f16 conversions.
Assisted-by: Codex
Commit: 28aaceeac251135299fc364f6d36979ee4f29141
https://github.com/llvm/llvm-project/commit/28aaceeac251135299fc364f6d36979ee4f29141
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
Log Message:
-----------
[AMDGPU] Don't apply gfx950 fetch-window loop align to the wrong block (#221821)
MachineBlockPlacement aligns the backedge destination after loop
rotation, which may not be the LoopInfo header. Query that block for the
32-byte request and the 4-byte pad cap so they stay consistent.
## Summary
- Pass the block being aligned into `getPrefLoopAlignment` so gfx950
fetch-window alignment uses the backedge destination, not only the
LoopInfo header.
- Unrotated 8-byte headers still get capped.
- Rotated 4-byte landing pads are no longer given uncapped 32-byte
alignment.
Commit: f38d285d4980a273f1b4984d4c5f8f768278860c
https://github.com/llvm/llvm-project/commit/f38d285d4980a273f1b4984d4c5f8f768278860c
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/test-suite/aarch64.cmake
Log Message:
-----------
[GitHub] Fix test-suite.yml FFmpeg build with AArch64 (#227346)
On AArch64 there are assembly files that need CMAKE_ASM_COMPILER_TARGET
and CMAKE_ASM_FLAGS_INIT set
Commit: 64c7e19beb6aa39be84873dc7b2d8453eaaf76ee
https://github.com/llvm/llvm-project/commit/64c7e19beb6aa39be84873dc7b2d8453eaaf76ee
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Move DenseMapIterator above DenseMapBase (NFC) (#227208)
This patch moves the definition of DenseMapIterator right above
DenseMapBase so that all classes in DenseMap.h are defined in the
bottom-up order without forward declarations:
- DenseMapStorage
- SmallDenseMapStorage
- DenseMapIterator
- DenseMapBase
- DenseMap
- SmallDenseMap
Assisted-by: Antigravity
Commit: b83fe57c46ac005b95f474c5cd78141416d33ba6
https://github.com/llvm/llvm-project/commit/b83fe57c46ac005b95f474c5cd78141416d33ba6
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Log Message:
-----------
[MISched](NFC) Factor control dependency construction state and logic out of `buildSchedGraph` (#226533)
Continuing the groundwork for a proper implementation of #205689, factor
the control dependency construction state and logic out of
`ScheduleDAGInstrs` into a friend class. This will also enable us to
further break up `buildSchedGraph` to make, e.g., the barrier chain
handling easier to comprehend.
Commit: a6948bd063eecf351fd88e8ae8edd173a3627130
https://github.com/llvm/llvm-project/commit/a6948bd063eecf351fd88e8ae8edd173a3627130
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/utils/ci/lnt/dispatch-benchmarks
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++][NFC] Fix typos in the LNT tooling (#227347)
Commit: 86a759d00b76520eb7a7f9621e32ba8cd6846646
https://github.com/llvm/llvm-project/commit/86a759d00b76520eb7a7f9621e32ba8cd6846646
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
Log Message:
-----------
[mlir][OpenACC] Fix tile clause element bounds for descending loops (#227185)
acc.loops could have negative steps, but ACCLoopTiling computed each
element loop's bound assuming an ascending one. Both halves of that
computation were wrong for a descending dimension: the inclusive edge
subtracted one instead of adding one, and the bound was clamped with min
instead of max.
For `DO j = n, floor, -1` under `tile(32)`, the last tile's bound came
out as `min(floor, j - 33)`, which selects `j - 33` whenever it falls
below the floor. The element loop then ran past the end of the iteration
space, reading and writing outside the array.
With this change, we pick the clamp and the inclusive edge from the
step's direction. When the sign is only known at runtime, we compute
both and select on it.
The tiling tests had no coverage of negative steps or of inclusive upper
bounds. This patch adds four new tests: descending, descending with an
inclusive bound, ascending with an inclusive bound, and a runtime-signed
step.
Commit: 7c1bfc7f93b3cd3394b4a502b540b6bfcdb5e7c3
https://github.com/llvm/llvm-project/commit/7c1bfc7f93b3cd3394b4a502b540b6bfcdb5e7c3
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang][docs] Markup corrections for attribute documentation (#226729)
The conversion of Clang attribute documentation from reST to MyST
markdown did not transform markup correctly in all cases. Additionally,
some PRs that were originally authored for reST were merged after the
conversion resulting in reST formatted markdown getting re-introduced.
This change corrects all such cases the author was able to identify,
applies markup that was previously missing, corrects a few typos along
the way, and even adds a missing attribute documentation reference that
has prevented the `#pragma clang loop` `pipeline` and
`pipeline_initiation_interval` documentation from being published since
2019.
Commit: f52ca1abaf016903562bf69ff56cca99bf4c0b80
https://github.com/llvm/llvm-project/commit/f52ca1abaf016903562bf69ff56cca99bf4c0b80
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p2.cpp
M clang/test/SemaTemplate/GH71595.cpp
Log Message:
-----------
[Clang] prevent instantiation of invalid friend function templates (#227038)
Fixes #226673
---
This patch addresses the issue in which an invalid friend function
template is instantiated as a valid declaration, leading to a crash upon
a later redeclaration.
---
This fixes a regression introduced by
https://github.com/llvm/llvm-project/pull/216555
Commit: 06906bc49488b0167b1815cc440eaa7520ce1fa8
https://github.com/llvm/llvm-project/commit/06906bc49488b0167b1815cc440eaa7520ce1fa8
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Remove unreachable code (#227100)
The function already has an early return after failed allocation.
Commit: 79ff2d49b73d47d34396ccde2e360c53301a50cd
https://github.com/llvm/llvm-project/commit/79ff2d49b73d47d34396ccde2e360c53301a50cd
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
Log Message:
-----------
[RISCV] Remove combineTruncSelectToSMaxUSat. (#227162)
This is covered by InstCombine for the motivating benchmark.
Commit: a6b1ce6204f955294fb53cecd0e05a5a3bf1d528
https://github.com/llvm/llvm-project/commit/a6b1ce6204f955294fb53cecd0e05a5a3bf1d528
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
Log Message:
-----------
[CodeGen] Remove DIE::setForceChildren and DIE::ForceChildren (NFC) (#227207)
The last caller of DIE::setForceChildren was removed on March 6, 2017
in commit a175512b18478848bdbe203f2d25dc417860e3c5, leaving
DIE::ForceChildren always false.
Assisted-by: Antigravity
Commit: 1c7edb50cec0ae1f84dfdc4e418a60b1c9248c8d
https://github.com/llvm/llvm-project/commit/1c7edb50cec0ae1f84dfdc4e418a60b1c9248c8d
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
Log Message:
-----------
[lldb][Windows] Register the shadow listener in PlatformWindows (#227277)
`PlatformWindows::DebugProcess` and `PlatformWindows::Attach` create the
Process and hijack its events, but never call
`Process::SetShadowListener` with the listener from the launch or attach
info. `PlatformPOSIX`, `PlatformRemoteGDBServer` and `Target::Launch`'s
all do.
On Windows a shadow listener set with `SBLaunchInfo::SetShadowListener`
therefore never gets an event, which is why
`TestEvents.test_shadow_listener` failed on every run (`"Shadow listener
got event too"`) on both the lldb-server and the in-process backend.
Call `SetShadowListener` in both, and in Attach only touch `process_sp`
once it is known to be non-null (HijackProcessEvents was called before
the null check).
I was able to reproduce the failure at desk on a machine that's under
load. The issue no longer reproduces after this patch.
Fixes https://github.com/llvm/llvm-project/issues/37721.
rdar://188700614
Commit: 955ac127ab8c51ebba4f4cc3a0c22046b3f4cb63
https://github.com/llvm/llvm-project/commit/955ac127ab8c51ebba4f4cc3a0c22046b3f4cb63
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Add another reschedule copy order test (#227342)
Another test for the fix from #227289, which hit a different
assert condition.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 2853d7e7bdd5cd4fb8caa0baf831c83eb455d8b1
https://github.com/llvm/llvm-project/commit/2853d7e7bdd5cd4fb8caa0baf831c83eb455d8b1
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/test/API/commands/expression/issue_11588/Test11588.py
Log Message:
-----------
[lldb][Windows] Format in-process x86 and x64 GPRs as lowercase hex (#227299)
The in-process Windows plugin printed `x86`/`x64` registers in uppercase
hex, unlike every other register table.
`Test11588` compares against lowercase hex, so it only passed when the
address happened to have no letters.
This patch uses lowercase hex, matching `lldb-server`. Test11588 is
re-enabled.
Commit: e9399d6161ea7dd62ade7bae60f3c2e0bc007944
https://github.com/llvm/llvm-project/commit/e9399d6161ea7dd62ade7bae60f3c2e0bc007944
Author: arsnyder16 <asnyder at minitab.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_invoke_microtask.cpp
M openmp/runtime/test/misc_bugs/many-microtask-args.c
A openmp/runtime/test/misc_bugs/too-many-microtask-args.c
Log Message:
-----------
[OpenMP] Support up to 32 arguments in the generic microtask dispatcher (#211071)
Extend the generic `__kmp_invoke_microtask` implementation to support up
to 32 microtask arguments.
The generic dispatcher currently handles at most 15 arguments. OpenMP
regions with more captured variables terminate at runtime.
This affects WebAssembly because call_indirect requires the callee type
to exactly match the call-site type. Unlike assembly dispatchers on
platforms such as x86_64, the generic C++ implementation cannot
construct an arbitrary-arity call dynamically and must provide each
supported signature explicitly.
Real-world OpenMP regions can exceed the existing limit; the motivating
cases require between 16 and 21 arguments.
A longer-term alternative would be to change the compiler/runtime
convention for generic-dispatch targets so captured-variable pointers
are passed through a single packed context argument. That would remove
the fixed upper bound, but it would require coordinated Clang and OpenMP
runtime changes and consideration of compatibility with objects produced
using the existing variadic microtask ABI. This change keeps the
existing ABI and provides a focused runtime-only fix.
Commit: 5a4f4bb8c6d9f6010dfc83fae9f631166f33cb4b
https://github.com/llvm/llvm-project/commit/5a4f4bb8c6d9f6010dfc83fae9f631166f33cb4b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
ARM: Move abi name implied float abi to TargetParser (#226774)
ARMTargetMachine overrode the default float abi based on the abi name.
Move this logic to TargetParser so the ABI will be computable without
depending on codegen.
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: d62d8f812caa2fb00b0c41750431548d46e090d5
https://github.com/llvm/llvm-project/commit/d62d8f812caa2fb00b0c41750431548d46e090d5
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-Ext] Prefer pack/ppairo.h over pncvt.h/pncvth.h in shuffle lowering (#227105)
These have equivalent behavior, but pncvt.h/pncvth.h requires the input
to be a register pair. Shuffle lowering doesn't know if the sources came
from the same 64-bit value so using pncvt.h/pncvth.h may overconstrain
register allocation and require copies.
If some hardware has better performance for pncvt.h/pncvth.h we
can consider ways to intelligently pick the two alternatives. For
now just pick pack/ppairo.h.
Commit: c5c4273139ece35b354bb50e95952446db305ded
https://github.com/llvm/llvm-project/commit/c5c4273139ece35b354bb50e95952446db305ded
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/conf.py
M clang/docs/index.md
Log Message:
-----------
[docs] Enforce unambiguous toctree in clang/docs (#224101)
The rationale and methodology are the same as in
03511907c7a9908f7902e18d3789371a63bb91b1 just in `clang` this time.
Commit: 1b599fd3eeb3c2670e279773d214324e5160c3d5
https://github.com/llvm/llvm-project/commit/1b599fd3eeb3c2670e279773d214324e5160c3d5
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/common-threads-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
A libc/include/llvm-libc-macros/threads-macros.h
M libc/include/threads.yaml
M libc/include/unistd.yaml
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/thread.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/sysconf.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_tss_test.cpp
M libc/test/integration/src/threads/tss_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc] Reset thread-specific key value before invoking destructor (#226134)
POSIX specifies that before calling a thread-specific key destructor,
the value of the key must be set to NULL (so pthread_getspecific returns
NULL from inside the destructor), and that the destructor pass must
repeat up to PTHREAD_DESTRUCTOR_ITERATIONS times if destructors
re-associate non-NULL values with keys.
This patch sets the key payload to nullptr prior to calling the
destructor, and loops over the key array up to the destructor iteration
limit as long as non-NULL values remain.
Along with that:
- introduce common-threads-macros.h to share the destructor iteration
count (4) between C (TSS_DTOR_ITERATIONS) and POSIX
(PTHREAD_DESTRUCTOR_ITERATIONS), and use it internally
- expose TSS_DTOR_ITERATIONS in threads.h
- expose and implement _SC_THREAD_DESTRUCTOR_ITERATIONS in sysconf
Note that I am not fixing the issue where a deleted key's destructor can
still run on thread exit if it was already cached in thread-local
storage. Fixing that properly will require tracking key generations or
validity across threads, so I'm leaving that for separate work
(#226122).
Fixes #194029.
Assisted-by: Gemini
Commit: 97714a75fffd859568d0a04098edd29269b4cd39
https://github.com/llvm/llvm-project/commit/97714a75fffd859568d0a04098edd29269b4cd39
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
Log Message:
-----------
[lldb][test] Fix race condition in test_stop-hook.cpp (#227284)
This test has been failing on AArch64 Linux recently. Either with
SIGSEGV or SIGABRT (less often that one).
I could reproduce it locally by varying system load, and got this out of
a core file:
```
* thread #1, name = 'test_python_sto', stop reason = SIGSEGV: address not mapped to object (fault address=0xc17d18317552db80)
* frame #0: 0x0000ef7dc72ac6cc libc.so.6`__GI_memchr at memchr.S:68
frame #1: 0x0000ef7dc727cf4c libc.so.6`_IO_getline_info(fp=0x0000b9b53a8bd180, buf="\xa9\xb4\t\xce}\xef", n=<unavailable>
, delim=10, extract_delim=1, eof=0x0000000000000000) at iogetline.c:85:17
frame #2: 0x0000ef7dc727bdc4 libc.so.6`_IO_fgets(buf="\xa9\xb4\t\xce}\xef", n=<unavailable>, fp=0x0000b9b53a8bd180) at io
fgets.c:53:11
frame #3: 0x0000ef7dc80f2b80 liblldb.so.24.0git`lldb_private::IOHandlerEditline::GetLine(std::__cxx11::basic_string<char,
std::char_traits<char>, std::allocator<char>>&, bool&) + 996
frame #4: 0x0000ef7dc80f41f4 liblldb.so.24.0git`lldb_private::IOHandlerEditline::Run() + 180
frame #5: 0x0000ef7dc80bf614 liblldb.so.24.0git`lldb_private::Debugger::RunIOHandlers() + 128
frame #6: 0x0000ef7dc80ccee8 liblldb.so.24.0git`std::_Function_handler<void* (), lldb_private::Debugger::StartIOHandlerTh
read()::$_0>::_M_invoke(std::_Any_data const&) + 28
frame #7: 0x0000ef7dc81e1608 liblldb.so.24.0git`lldb_private::HostNativeThreadBase::ThreadCreateTrampoline(void*) + 124
frame #8: 0x0000ef7dc72903c8 libc.so.6`start_thread(arg=0x000000000080e640) at pthread_create.c:442:8
frame #9: 0x0000ef7dc72f9fdc libc.so.6`thread_start at clone.S:79
```
What's happening is that the interpreter's input stream is set to stream
A, then we reset it to the default, then close stream A. There may still
be reads from stream A in flight when we close it, which lead to the
crash.
The solution is to wait on the interpreter thread to finish whatever
it's doing. SBDebuger::Destroy does that.
Normally that would be called by driver.cpp but it can be called on
already destroyed objects. So for this test we'll call it twice, but
that's not a problem.
Commit: c0e0ea74185d90ff518a8ecde79e08b93c91b5a2
https://github.com/llvm/llvm-project/commit/c0e0ea74185d90ff518a8ecde79e08b93c91b5a2
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
A llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-vperm-pk16.mir
A llvm/test/CodeGen/AMDGPU/vperm-pk16-exec-hazard.ll
A llvm/test/CodeGen/AMDGPU/vperm-pk16-exec-hazard.mir
Log Message:
-----------
[AMDGPU] Insert exec-forced V_NOP after V_PERM_PK16 (gfx1250/gfx1251 hazard) (#214406)
On gfx1250/gfx1251 the V_PERM_PK16 family (V_PERM_PK16_B4/B6/B8_U4) has
a hazard: the instruction must be immediately followed by a "safe"
instruction that issues on the pipe which clears the hazard. Insert
V_NOP as needed.
Also updated hasUnwantedEffectsWhenEXECEmpty() to ensure V_PERM_PK16 and
the inserted V_NOP are under non-zero EXEC.
Fixes: ROCM-26041
Assisted-by: Opus 4.8 Medium
Commit: 70c0353a11258bbf103dcf699ab9b685bbe6dadc
https://github.com/llvm/llvm-project/commit/70c0353a11258bbf103dcf699ab9b685bbe6dadc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll
M llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll
Log Message:
-----------
ARM: Mark __chkstk call's implicit LR def dead (#227218)
The WIN__CHKSTK custom inserter already marks the clobbered R12 and CPSR
defs dead, but left the call's implicit-def $lr for later inference.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 95aa32cb809d998aaaa8cc638a4a5b1f365b82bb
https://github.com/llvm/llvm-project/commit/95aa32cb809d998aaaa8cc638a4a5b1f365b82bb
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/Sema/warn-fortify-source-poll-not-builtin.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for poll, ppoll, and ppoll64 (#226261)
Add `-Wfortify-source` diagnostics for `poll`, `ppoll`, and `ppoll64` when the byte size required for `nfds` descriptors (`nfds * sizeof(*fds)`) exceeds the destination `fds` buffer size.
Supersedes the `poll` portion of #177286 (similar to #198130 for `umask`).
Part of #142230
Assisted-by: Gemini
Commit: 8cc99ae714225d0babdd826728ced2e13c2f6b4f
https://github.com/llvm/llvm-project/commit/8cc99ae714225d0babdd826728ced2e13c2f6b4f
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 3b0b6d892bdf (#227382)
Commit: 49c33818cfc987bdacf20f819c68495ffea389a5
https://github.com/llvm/llvm-project/commit/49c33818cfc987bdacf20f819c68495ffea389a5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port 5239371ffa13 (#227383)
Commit: 185553954a6a5b84e94fd04af75e3aeb9028fe64
https://github.com/llvm/llvm-project/commit/185553954a6a5b84e94fd04af75e3aeb9028fe64
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port 72a712b0a552 (#227384)
Commit: fbbcaa140a3641e13a297291dce1c21c02f5be0b
https://github.com/llvm/llvm-project/commit/fbbcaa140a3641e13a297291dce1c21c02f5be0b
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
A llvm/test/Transforms/SimplifyCFG/NVPTX/lit.local.cfg
A llvm/test/Transforms/SimplifyCFG/NVPTX/switch-to-lookup-table-addrspace.ll
Log Message:
-----------
[NVPTX] Implement shouldBuildLookupTablesForConstant (#220088)
Exclude addresses of GlobalValues in unsupported address spaces.
Assisted-by: Claude.
Commit: a5f4bfb5ef1f6ca734c288ac31a4c6f53d9f7979
https://github.com/llvm/llvm-project/commit/a5f4bfb5ef1f6ca734c288ac31a4c6f53d9f7979
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-extractelement.ll
Log Message:
-----------
[InstCombine] Use uint64_t for TruncRatio to avoid overflow (#225150)
This changes `TruncRatio` from `unsigned` to `uint64_t` in
`foldVecExtTruncToExtElt`, and replaces the pre-existing 32-bit `assert`
with a graceful bail-out plus a regression test.
```
unsigned TruncRatio = SrcBits / DstBits;
```
`BitCastNumElts` is used to build the destination vector type. With
`TruncRatio` declared `unsigned`, this product is evaluated in 32 bits:
```
BitCastNumElts = VecElts.getKnownMinValue() * TruncRatio;
```
An overflow would wrap to a small value that silently satisfies the
existing assert and construct a wrong-sized vector type:
```
assert(BitCastNumElts <= std::numeric_limits<uint32_t>::max() &&
"overflow 32-bits");
```
Declaring `TruncRatio` as `uint64_t` computes the true 64-bit product.
Rather than keep an assert (which would just crash on the overflowing
input), this drops the assert and bails out gracefully when the element
count can't be represented, so the fold is simply skipped instead of
forming an invalid vector type:
```
uint64_t BitCastNumElts = VecElts.getKnownMinValue() * TruncRatio;
// Computed in 64-bit above to avoid a 32-bit overflow. Bail out if the
// element count exceeds IntegerType::MAX_INT_BITS, as we cannot create a
// wider vector type.
if (BitCastNumElts > IntegerType::MAX_INT_BITS)
return nullptr;
```
A lit test (`test_bitcast_numelts_overflow` in
`llvm/test/Transforms/InstCombine/trunc-extractelement.ll`) triggers the
unsigned wrap using a `<536870912 x i64>` (2^29 elements) truncated to
`i8` -- `2^29 * 8 = 2^32`, which wraps to `0` when computed in 32 bits --
and checks that the fold is now correctly skipped instead of producing
an invalid bitcast.
Assisted by: Cline
Commit: 07d7ce6051952e67c2d500226da5b60dc1a4a0f0
https://github.com/llvm/llvm-project/commit/07d7ce6051952e67c2d500226da5b60dc1a4a0f0
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
Log Message:
-----------
[Bazel] Fixes 09cdef0 (#227345)
This fixes 09cdef016cfc756b29002cd7870c63b7f1b09c6b (#226529).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=09cdef016cfc756b29002cd7870c63b7f1b09c6b
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 03445344c8af497c1ac9f5760a65406afb3fe4a7
https://github.com/llvm/llvm-project/commit/03445344c8af497c1ac9f5760a65406afb3fe4a7
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[AMDGPU] Fold fpround of fadd and fsub into v_mad/fma_mixlo and mixhi (#224913)
MadFmaMixFP32Pats turns (fadd x, y) into (fma x, 1.0, y) and (fsub x, y)
into (fma (-y), 1.0, x) so the mix instructions absorb the operation
along with the f16 or bf16 source modifiers. MadFmaMixFP16Pats and
MadFmaMixFP16Pats_t16 only did this for fmul, so a rounded result still
needed a separate convert for a rounding the mix instructions perform
themselves.
Unlike the f32 patterns these do not require an operand to be an
fpextend of an f16, since an fpround on the result always removes the
convert. The rewrite is exact because the mix instructions round the f32
result again when they write the 16-bit destination, so it stays
f32_to_f16(fma(x, 1.0, y)).
Assisted-by: Claude Code Opus 5
Commit: c3aaf05e05ef1ca954bf6219fed25a8767ac6e6d
https://github.com/llvm/llvm-project/commit/c3aaf05e05ef1ca954bf6219fed25a8767ac6e6d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[gn build] Port 72a712b0a552 (#227384)
Commit: a2064b991247b07b9502194356bdd53c762d0d7d
https://github.com/llvm/llvm-project/commit/a2064b991247b07b9502194356bdd53c762d0d7d
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[offload][cuda] Fix uid string handling (#227223)
Fixes https://github.com/llvm/llvm-project/issues/227094
Commit: f61bb287ceeb1561ff0869644365afd79d6f70f5
https://github.com/llvm/llvm-project/commit/f61bb287ceeb1561ff0869644365afd79d6f70f5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Remove unnecessary container constructions in setup code (#216141)
It turns out that a fair amount of the benchmark suite is spent in
unmeasured code. Amongst other things, we were constructing temporary
containers from scratch instead of assigning from an already built-up
copy, which is a lot faster.
This patch speeds up the wall time for running flat_map benchmarks by
approximately 30s (from 98s to 66s) on my machine.
Commit: d4419341ba8720d3a092c8593ac3c7e10405f736
https://github.com/llvm/llvm-project/commit/d4419341ba8720d3a092c8593ac3c7e10405f736
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add null opcode to formatter bytecode (#224443)
This allows formatters to produce a null ValueObject, which can be
needed for
`@get_child_index` or `@get_child_at_index`.
Commit: b0d805f652310bdf8a011b33239020b74a39cf6d
https://github.com/llvm/llvm-project/commit/b0d805f652310bdf8a011b33239020b74a39cf6d
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Constant.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/freeze.ll
Log Message:
-----------
[ValueTracking] Support Array and Structure in contains* check (#226748)
Support Vector and Structure in containsUndefinedElement,
containsUndefOrPoisonElement, and containsConstantExpression. We
achieved this by using containsMatchingElement helper function, which
checks type recursively as Structure and Array are aggregates, which can
contain basically anything inside. This allows InstCombine to fold these
two types for freeze correctly.
Commit: ec9a20186d1841382199d2381cf089da7efab3a5
https://github.com/llvm/llvm-project/commit/ec9a20186d1841382199d2381cf089da7efab3a5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/sorting/push_heap.bench.cpp
Log Message:
-----------
[libc++] Fix calling push_heap on an empty range in the push_heap benchmark (#227076)
std::push_heap requires a non-empty range because it inserts the element
at position `last - 1` (which isn't valid for an empty range) into the
heap. This didn't show up as a problem with libc++ since we have a
defensive implementation, but libstdc++ does not.
Commit: 939ab3f0fffc80a1b6809b7d1d196f159236076c
https://github.com/llvm/llvm-project/commit/939ab3f0fffc80a1b6809b7d1d196f159236076c
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
A clang/test/SemaOpenCL/builtins-amdgcn-wave-match-err.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.match.b32.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.match.b32.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for v_wave_match_b32 (#226971)
Commit: 1e55be52734485bf3ce96169c51fa7ef6e3914e0
https://github.com/llvm/llvm-project/commit/1e55be52734485bf3ce96169c51fa7ef6e3914e0
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[Clang][Sema] Add fortify warnings for poll, ppoll, and ppoll64 (#226261)
Add `-Wfortify-source` diagnostics for `poll`, `ppoll`, and `ppoll64` when the byte size required for `nfds` descriptors (`nfds * sizeof(*fds)`) exceeds the destination `fds` buffer size.
Supersedes the `poll` portion of #177286 (similar to #198130 for `umask`).
Part of #142230
Assisted-by: Gemini
Commit: 3390b037dbc3e94a763f6a159b82e654d73cebbf
https://github.com/llvm/llvm-project/commit/3390b037dbc3e94a763f6a159b82e654d73cebbf
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/fsanitize-undefined-offload.c
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_preinit.cpp
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/shift.hip
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-missing.cpp
M compiler-rt/test/ubsan/lit.common.cfg.py
Log Message:
-----------
[compiler-rt] Support `-shared-libsan` for Offload UBSan (#226551)
Summary:
The offload UBSan is intentionally implemented as a separate 'add-on'
library. This makes it more clear where the separation lies and avoids
including it in all existing UBSan users. However, this doesn't work
with `-shared-libsan`'s `*.so` builds because we now have a function
call barrier and the internal utility functions are hidden.
This PR changes the shared version to fold the HSA / Offloading handlers
into the `libclang_rt.ubsan.so` library. The specific fallout is that
~30KiB is added to the shared library and it will now intercept `dlsym`
for other users, but this should be benign. The overhead here is less
concerning than in the static case because it is shared and usually
loaded lazily by the system.
Commit: d44dba331cfcd02d24c4ba5354583d061c59ef56
https://github.com/llvm/llvm-project/commit/d44dba331cfcd02d24c4ba5354583d061c59ef56
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[Clang][NFC] Fix tagging issue number in clang releasenotes (#227374)
Fix tagging the issue number in the clang release notes to make them
clickable after rendering
Commit: c900d585e2277539e351ec4e93e4661c76811947
https://github.com/llvm/llvm-project/commit/c900d585e2277539e351ec4e93e4661c76811947
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[llvm] Adjust export annotations for tests (#227255)
* Properly export templates so they work on both Windows and Linux.
* Adjust LLVM_ABI_FOR_TEST annotations to be in the right place and
remove redundant annotations.
Commit: 6a069259dcd9264ba3aadd3913742d9c2e056f18
https://github.com/llvm/llvm-project/commit/6a069259dcd9264ba3aadd3913742d9c2e056f18
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
Log Message:
-----------
[ARM] Use target constant for MVE fixed fp convert constant (#227250)
If the constant already exists then we would reuse the constant in a
register instead of using an immediate, as the instruction requires. Use
a TargetConstant to make sure we generate an immediate.
Fixes #226591
Commit: a5d10f42231daabd54ca3451049e484488d34e45
https://github.com/llvm/llvm-project/commit/a5d10f42231daabd54ca3451049e484488d34e45
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-undef-use-not-killed.mir
Log Message:
-----------
TwoAddressInstructions: Don't treat an undef use as a kill (#227309)
An undef use does not read a value, so LiveIntervals does not extend the
live range to cover it. Previously this would hit the assert on an
undef use.
Exposed by #225174, which made LiveIntervals available here by default.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8bc54f1dae2902c153ac75a603c4860082ca4cb6
https://github.com/llvm/llvm-project/commit/8bc54f1dae2902c153ac75a603c4860082ca4cb6
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
M clang/lib/Frontend/CompilerInstance.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
M llvm/unittests/Passes/Plugins/PluginsTest.cpp
Log Message:
-----------
[Plugins] Rename PassPlugin::Load to load. NFC (#227408)
Follow the lowerCamelCase function naming convention and take StringRef.
Extracted from #226773
Commit: 2982dec64d8b0962ac519a8a0aaa40111cb1cc14
https://github.com/llvm/llvm-project/commit/2982dec64d8b0962ac519a8a0aaa40111cb1cc14
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-llvm-help.c
M clang/tools/clang-linker-wrapper/CMakeLists.txt
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[clang-linker-wrapper] Remove -load-pass-plugin (#227410)
The loaded plugins are unused since #113715 removed in-process LTO.
Removing the option also removes a cl::callback user
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
Extracted from #226773
Commit: 1b3b1b414d8fc5f630139a47ec65069f961e39da
https://github.com/llvm/llvm-project/commit/1b3b1b414d8fc5f630139a47ec65069f961e39da
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/test/Transforms/InstCombine/builtin-dynamic-object-size.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[MemoryBuiltins] Preserve profiles when optimizing llvm.objectsize (#227397)
In some cases when lowering llvm.objectsize (e.g., when the object
pointer comes from a select), we end up with a select in the output. We
can trivially preserve the branch weights due to the condition being the
same in some cases.
Commit: 15323219f2dcac4f05f6b513482f2a6c99c560ab
https://github.com/llvm/llvm-project/commit/15323219f2dcac4f05f6b513482f2a6c99c560ab
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduced-val-replaced-twice.ll
Log Message:
-----------
[SLP]Fix stale candidate lookup for externally used reduced values
A candidate may be replaced by earlier vectorization attempts, so the
current scalar was not kept externally used and got erased while still
used by the reduction ops. Look up the tracked value by the original one.
Fixes #227314
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227417
Commit: 12b97a86bbf1403a808743d22c0613edcc834871
https://github.com/llvm/llvm-project/commit/12b97a86bbf1403a808743d22c0613edcc834871
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/CAS/BuiltinUnifiedCASDatabases.h
M llvm/include/llvm/CAS/OnDiskCASLogger.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CAS/ValidationResult.h
M llvm/lib/CAS/BuiltinUnifiedCASDatabases.cpp
M llvm/lib/CAS/OnDiskCASLogger.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/test/tools/llvm-cas/logging.test
M llvm/test/tools/llvm-cas/validation.test
M llvm/tools/llvm-cas/Options.td
M llvm/tools/llvm-cas/llvm-cas.cpp
M llvm/unittests/CAS/OnDiskCommonUtils.h
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Split on-disk CAS validate-if-needed into validation and recovery (#226291)
Split validate-if-needed into two steps: an in-process validation and a
separate recovery. Validation marks the validation file as pending
before validating and records the boot time only on success, so a
validation that fails or crashes is detected by recovery and not
skipped by the next validation. Recovery only happens while validation
is pending, so concurrent recoveries after the same failure recover
once.
llvm-cas now drives out-of-process validation itself: it re-executes
itself with -in-process, forwards the output, and recovers if the child
fails or crashes and -allow-recovery is given. When recovering, the
validation error is only printed with -verbose. The library APIs no
longer take an llvm-cas path.
Commit: a660a5fac54a287a97d38c251abb94788e6e0772
https://github.com/llvm/llvm-project/commit/a660a5fac54a287a97d38c251abb94788e6e0772
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm-c/CAS/PluginAPI_functions.h
M llvm/include/llvm-c/CAS/PluginAPI_types.h
M llvm/include/llvm/CAS/ObjectStore.h
M llvm/lib/CAS/PluginAPI.h
M llvm/lib/CAS/PluginAPI_functions.def
M llvm/lib/CAS/PluginCAS.cpp
M llvm/test/CMakeLists.txt
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/llvm-cas/lit.local.cfg
A llvm/test/tools/llvm-cas/plugin-validation-crash.test
A llvm/test/tools/llvm-cas/plugin-validation.test
M llvm/tools/libCASPluginTest/libCASPluginTest.cpp
M llvm/tools/libCASPluginTest/libCASPluginTest.exports
M llvm/tools/llvm-cas/Options.td
M llvm/tools/llvm-cas/llvm-cas.cpp
M llvm/unittests/CAS/PluginCASTest.cpp
Log Message:
-----------
[CAS] Support validation and recovery for plugin CAS in llvm-cas (#227056)
Add the -fcas-plugin-path and -fcas-plugin-option options to llvm-cas,
and optional llcas_cas_validate_if_needed() and
llcas_cas_recover_ondisk_data() functions to the plugin API, exposed
via cas::validatePluginCASDatabasesIfNeeded() and
cas::recoverPluginCASDatabases(). Implement them, along with
llcas_cas_validate() and llcas_actioncache_validate(), in
libCASPluginTest and make the plugin available to lit tests.
Commit: a122d06f682188aa5a041f3893975e48dffd213c
https://github.com/llvm/llvm-project/commit/a122d06f682188aa5a041f3893975e48dffd213c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Don't build offload ubsan library on 32-bit hosts (#227424)
Summary:
Previous changes put the offload library in the main path. This caused
us to link in 64-bit specific library calls and fail int i386. Simply
restrict building this library to 64-bit hosts only.
Commit: 695a4ab7b839c70f7e396f3fcc415c7ef1a252a5
https://github.com/llvm/llvm-project/commit/695a4ab7b839c70f7e396f3fcc415c7ef1a252a5
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[NFC][AMDGPU] Add tests for SCC live into a frame index user (#225196)
Pre-commit tests for the case where SCC is live into a frame index user
and
no SGPR is free to hold the V_READFIRSTLANE_B32 result. Scavenging one
emergency-spills an SGPR, and an SGPR spill flips EXEC with S_NOT_B64,
so the
EXEC flips land between the S_CMP_EQ_U32 that defines SCC and the read
of SCC
that follows, clobbering it in between.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: f658582645825c0435b95b3156c012ff3eac8b96
https://github.com/llvm/llvm-project/commit/f658582645825c0435b95b3156c012ff3eac8b96
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[AMDGPU] Don't spill an SGPR while SCC is live in frame index lowering (#224080)
When SCC is live into a scalar frame index user, the scaling path avoids
SALU ops that write SCC by computing the address in a VGPR and reading
it
back with V_READFIRSTLANE_B32. If the destination of that readfirstlane
is
scavenged with spilling allowed, an AMDGPU SGPR spill writes inactive
lanes, so it flips EXEC with S_NOT_B64 and clobbers SCC. Instead,
scavenge
that register with AllowSpill=false.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: 6991bccfdb811137bc21bda4758e28664ace8acb
https://github.com/llvm/llvm-project/commit/6991bccfdb811137bc21bda4758e28664ace8acb
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/utils/hdrgen/hdrgen/function.py
M libc/utils/hdrgen/tests/expected_output/subdir/test.h
M libc/utils/hdrgen/tests/input/subdir/test.yaml
Log Message:
-----------
[libc][hdrgen] Improve support for function-types as function args. (#227088)
Previously entries like
```
type: int (*)(const struct type_b **, const struct type_c **)
```
ended up assuming the type should be `struct_type_b_struct_type_c`.
Fix this by splitting the type strings into components, where each
component can be a type name itself (which is the case for a complex
function types like in the example above. This was raised during the
discussion in https://github.com/llvm/llvm-project/pull/223198
Commit: 76b9b1d6c0194f7b96e50cae4f054cf9745d2cb5
https://github.com/llvm/llvm-project/commit/76b9b1d6c0194f7b96e50cae4f054cf9745d2cb5
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/__support/mathvec/CMakeLists.txt
M libc/src/__support/mathvec/cosf.h
M libc/src/__support/mathvec/trig_reductionf.h
M libc/src/__support/mathvec/trig_reductionf_nofma.h
M libc/test/UnitTest/SIMDMatcher.h
M libc/test/src/mathvec/UnitTestWrappers.h
M libc/test/src/mathvec/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
M libc/test/src/mathvec/exhaustive/sinf_test.cpp
M libc/test/src/mathvec/sinf_test.cpp
Log Message:
-----------
[libc][mathvec] Vectorise cosf (#224290)
Replaces loop over scalar cosf with a fully vectorised implementation.
Replaces sinf and cosf scalar reference with a forced accurate double-eval.
Commit: d0109e2d69ee7860b15c6fb4a6fc060e13fe4b86
https://github.com/llvm/llvm-project/commit/d0109e2d69ee7860b15c6fb4a6fc060e13fe4b86
Author: David Green <david.green at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[ARM] Use target constant for MVE fixed fp convert constant (#227250)
If the constant already exists then we would reuse the constant in a
register instead of using an immediate, as the instruction requires. Use
a TargetConstant to make sure we generate an immediate.
Fixes #226591
Commit: c5272301ce59bf10c6f17c77ab30fb65725bc3c0
https://github.com/llvm/llvm-project/commit/c5272301ce59bf10c6f17c77ab30fb65725bc3c0
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/NewPassManager.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/test/Feature/codegen-plugin-passes.mir
M llvm/test/Feature/codegen-plugin.ll
M llvm/test/Feature/load_extension.ll
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
M polly/lib/Support/RegisterPasses.cpp
Log Message:
-----------
[Plugins] Add -plugin-arg and PassPluginLibraryInfo::ParseArguments (#227414)
opt and llc load -load-pass-plugin plugins from a cl::opt callback while
parsing argv, so that the options a plugin registers are recognized
later on the command line. cl::callback is to be removed to enable
migration to a TableGen-based option representation
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
To prepare for loading plugins after parsing, give plugins their own
arguments.
Add `-plugin-arg=<plugin>,<arg>`, which passes <arg> (split at the first
comma, so it may contain commas) to the new
PassPluginLibraryInfo::ParseArguments callback of the plugin named
<plugin> (LLVM_PLUGIN_API_VERSION 3). Plugins that define cl::opt (Polly
and the Bye and IRTransforms examples) parse their arguments with the
new parsePassPluginCommandLine.
opt also passes -plugin-arg arguments to statically linked extensions
(Extension.def), so Polly's options have the same spelling in both build
modes:
```
opt -plugin-arg=Polly,-polly-tile-sizes=1,64 ... # linked
opt -load-pass-plugin=LLVMPolly.so -plugin-arg=Polly,-polly-tile-sizes=1,64 ... # plugin
```
opt now registers plugins and linked extensions in one loop, so
optMain's PassBuilderCallbacks run after linked extensions.
Extracted from #226773
Commit: ffbf15645fe2fc5a77029a8a6ce72046d29b57ce
https://github.com/llvm/llvm-project/commit/ffbf15645fe2fc5a77029a8a6ce72046d29b57ce
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
A llvm/test/CodeGen/RISCV/jumptable-section.ll
M llvm/test/CodeGen/RISCV/jumptable.ll
Log Message:
-----------
[RISCV] Emit jumptables into text section with large code model (#227167)
The .rodata section may be far away with the large code model
Assisted-by: Claude
Commit: 57599397b92fe56592914a2949ca81fc07803917
https://github.com/llvm/llvm-project/commit/57599397b92fe56592914a2949ca81fc07803917
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/liboffload/API/Platform.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/platform/olIteratePlatforms.cpp
Log Message:
-----------
[OFFLOAD] add olIteratePlatforms (#226439)
Add a new service to iterate created Platforms. This differs from
obtaining the platforms from the existing olIterateDevices in that the
platforms are not initialized.
Assisted by Claude.
Commit: 607998a438f822a6b4f576f7259499dfb8fbb9b6
https://github.com/llvm/llvm-project/commit/607998a438f822a6b4f576f7259499dfb8fbb9b6
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/store-chains-shared-values.ll
Log Message:
-----------
[SLP][NFC]Add a test with ineffective vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227440
Commit: ee596155923c4a4a73abaf0d8f8df04ad43f4e66
https://github.com/llvm/llvm-project/commit/ee596155923c4a4a73abaf0d8f8df04ad43f4e66
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[SLP][NFC]Add a test with ineffective vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227440
Commit: c94fc9603d570c0d737a9525a5743870f225fb05
https://github.com/llvm/llvm-project/commit/c94fc9603d570c0d737a9525a5743870f225fb05
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
A mlir/test/Conversion/MathToXeVM/algebraic-simplification.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
Log Message:
-----------
[MLIR][MathToXeVM] Add Algebraic simplification patterns in MathToXeVM. (#223442)
Add Algebraic simplification patterns in MathToXeVM pass.
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 6411bfa19e259eb4ac2818a4a20373b7712a0cf1
https://github.com/llvm/llvm-project/commit/6411bfa19e259eb4ac2818a4a20373b7712a0cf1
Author: newgre <jannewger at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/runtime/CMakeLists.txt
A clang/test/CodeGen/copyprof.cpp
M clang/test/CodeGen/no-skipped-passes-O0-opt-bisect.c
A clang/test/CodeGenCXX/copyprof-attrs-move.cpp
A clang/test/CodeGenCXX/copyprof-attrs.cpp
A clang/test/Driver/fcopyprof.cpp
Log Message:
-----------
[CopyProf] Clang frontend and driver integration. (#225905)
This wires the existing passes and runtime up to the Clang driver so
CopyProf can actually be enabled from the command line.
Adds two flags:
- `-fcopyprof` — to enable CopyProf.
- `-fcopyprof-static-size-threshold=<N>` — minimum C++ object size in
bytes to enable instrumentation.
RFC:
https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038
Previous PR: #223458
---------
Co-authored-by: Jan Newger <jannewger at google.com>
Commit: 8955838531d4f73759e83f0af2becf3ea9393f8c
https://github.com/llvm/llvm-project/commit/8955838531d4f73759e83f0af2becf3ea9393f8c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/store-chains-shared-values.ll
Log Message:
-----------
[SLP]Vectorize the longer store groups first
A shorter store group that shares scalars with a longer one splits the
longer chain when it is vectorized first. Process the groups with more
stores first, so the shorter ones reuse their vectors.
Fixes #215998
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227445
Commit: 1cc088deb61a9ff3f1bc323196504e757e5cdb0a
https://github.com/llvm/llvm-project/commit/1cc088deb61a9ff3f1bc323196504e757e5cdb0a
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/include/PluginManager.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/PluginManager.cpp
Log Message:
-----------
[offload][omp] Load plugins through liboffload (#226440)
Change libomptarget to load the plugins through liboffload. Because
everything else (including initialization) is still intact at this stage
we still get a GenericPluginTy reference to call the plugin interface.
Assisted by Claude.
Commit: 0b35139335af544c1441a40703ef2cca1d1e2ec7
https://github.com/llvm/llvm-project/commit/0b35139335af544c1441a40703ef2cca1d1e2ec7
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
Log Message:
-----------
[NFC][AMDGPU] Add cost tests for narrow integer to fp casts (#225341)
Covers integer sources from a byte to 31 bits converted to half, float,
bfloat and double, as vector lanes and as scalars, over the subtarget
combinations that change the expansion. The existing cast tests get the
same subtarget coverage and the cases they were missing. The costs
recorded here are the ones the model reports today.
Commit: 3315ba0d25509b60c9952fe3bf21871c968892ca
https://github.com/llvm/llvm-project/commit/3315ba0d25509b60c9952fe3bf21871c968892ca
Author: RobinTF <textorr at cs.uni-freiburg.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenCXX/static-destructor.cpp
Log Message:
-----------
[clang][WebAssembly] Don't register this-returning destructors of reference temporaries directly with `__cxa_atexit` (#226619)
Under ABIs whose destructors return `this` (ARM, WebAssembly), a
destructor can only be registered directly (with `__cxa_atexit` etc.) if
the target tolerates the resulting function type mismatch. Clang already
checks this for global variables and registers a helper function
instead, but temporaries that are lifetime-extended by a reference with
static or thread storage duration always had their destructor registered
directly. On WebAssembly, which does not tolerate the mismatch, this
traps with "function signature mismatch" when the exit-time destructors
run. This PR changes the if condition to use the destroy helper that is
already used for arrays if the destructor cannot be registered directly.
Previously the following code would result in this:
```cpp
#include <cstdio>
struct B { B() {} ~B() { std::puts("~B"); } };
const B& b = B();
int main() {}
```
```
$ em++ -O2 -sEXIT_RUNTIME=1 repro.cpp -o repro.js && node repro.js
RuntimeError: function signature mismatch
<node stack trace>
```
with this patch applied it simply prints "~B".
Fixes #45221
Assisted-by: Claude Opus 5.5
Commit: c87912243c360fa8ec64a3ae9ca107bb1e4032d5
https://github.com/llvm/llvm-project/commit/c87912243c360fa8ec64a3ae9ca107bb1e4032d5
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStore.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedVectorElement.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStore.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStore.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStore-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStore-errors.hlsl
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareStore.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource-cmpxchg.ll
Log Message:
-----------
[HLSL] Add `InterlockedCompareStore` function and resource methods (#222164)
This PR adds the `InterlockedCompareStore` standalone function and
resource
methods. The operation lowers to `cmpxchg monotonic`.
`InterlockedCompareStore` reports nothing, so the `cmpxchg` result stays
unused. The PR adds a compare overload shape to `HLSLExternalSemaSource`
and a
matching resource method helper, which the `InterlockedCompareExchange`
PR
above it reuses.
The PR also adds the 64-bit `InterlockedCompareStore64` methods, which
DXIL
gates on shader model 6.6.
Fixes: https://github.com/llvm/llvm-project/issues/99128
Assisted by: Github Copilot
Commit: 7b85e4d7eaaee75382c7c274471494ee26eb1a45
https://github.com/llvm/llvm-project/commit/7b85e4d7eaaee75382c7c274471494ee26eb1a45
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-map-null-descriptor.mlir
A offload/test/offloading/fortran/optional-mapped-arguments-4.f90
Log Message:
-----------
[OpenMP] Fix descriptor allocation for absent optional arrays (#227082)
Commit: 9ba536a5dc7daa1fa94d97ea4add0f63c5fe95b5
https://github.com/llvm/llvm-project/commit/9ba536a5dc7daa1fa94d97ea4add0f63c5fe95b5
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/setgroups.h
M libc/src/grp/CMakeLists.txt
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
A libc/src/grp/initgroups.cpp
A libc/src/grp/initgroups.h
A libc/src/grp/setgroups.cpp
A libc/src/grp/setgroups.h
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/initgroups_test.cpp
A libc/test/src/grp/setgroups_test.cpp
Log Message:
-----------
[libc] Add setgroups and initgroups entrypoints (#227272)
Add the setgroups and initgroups entrypoints from <grp.h> (GNU
extensions).
A Linux syscall wrapper is added for setgroups, supporting both
SYS_setgroups and SYS_setgroups32. The initgroups entrypoint initialises
the supplementary group access list for a specified user by reading the
group database using a scoped database stream and setting the resulting
groups via setgroups.
Assisted-by: Automated tooling, human reviewed.
Commit: c2569608f6fd14740adbf510e3bb93433566c1c4
https://github.com/llvm/llvm-project/commit/c2569608f6fd14740adbf510e3bb93433566c1c4
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Format/AffectedRangeManager.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/FormatTestMacroExpansion.cpp
Log Message:
-----------
[clang-format] Fix crashes on directives in discarded macro call args (#221501)
Rewinding discarded macro arguments processes their preprocessor
directives twice, duplicating lines and causing crashes. Restore the
preprocessor bookkeeping on rewind, but retain the first set of
directive lines and discard duplicates during replay.
Exclude expansion EOF tokens from directive ranges so directives before
empty expansions are still formatted.
Fixes #131157
Assisted-by: Claude Code
Commit: 2f3e810b4cd5219c8ae4269069db38eb1cee46b7
https://github.com/llvm/llvm-project/commit/2f3e810b4cd5219c8ae4269069db38eb1cee46b7
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/CMakeLists.txt
M flang/cmake/modules/AddFlang.cmake
M flang/cmake/modules/CMakeLists.txt
M flang/cmake/modules/FlangConfig.cmake.in
M flang/include/flang/Optimizer/CodeGen/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/include/flang/Optimizer/HLFIR/CMakeLists.txt
M flang/include/flang/Optimizer/OpenACC/CMakeLists.txt
M flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
M flang/include/flang/Optimizer/Transforms/CMakeLists.txt
Log Message:
-----------
[Flang] Fix install components and dependencies (#227365)
Summary:
Two things. After https://github.com/llvm/llvm-project/pull/221724 a
plain `find_package(Flang)` no longer worked with implicit dependencies.
It would reference targets that weren't installed and weren't on the
core dependency path.
Also, ensure that the flang headers have a proper dependency on
tablegen. Makes the generation implicitly depend on them so this stays
in-sync.
Commit: e9c35e79334d39e405a0e7ce091654107ac6ad81
https://github.com/llvm/llvm-project/commit/e9c35e79334d39e405a0e7ce091654107ac6ad81
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[Offload] Re-add flang to AMDGPU bot cmake cache (#227434)
This (re-) adds flang to the enabled projects in the AMDGPULibcBot CMake
cache.
Commit: 027d9657acf5847072250a98dfb8e7c5f216033c
https://github.com/llvm/llvm-project/commit/027d9657acf5847072250a98dfb8e7c5f216033c
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-2.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique-pointer-select.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique-updatecounter.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/non-unique.ll
Log Message:
-----------
[HLSL][DirectX] report a fatal error when resource access is not guaranteed to be unique (#225285)
Instead of just a diagnostic, report a fatal error when resource access
is not guaranteed to be unique.
Closes #224422
Assisted by GPT-5.6 Sol
Commit: 5cd2d8ab9867780b737ac34c3b5b483f9e8e5d84
https://github.com/llvm/llvm-project/commit/5cd2d8ab9867780b737ac34c3b5b483f9e8e5d84
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
Log Message:
-----------
[X86] Fix CCMP miscompile for flag-source-folded SETCC leaves (#217682)
EmitCmp does not always return a comparison: where
it can it reuses the EFLAGS of an instruction that is computed anyway,
so (X | Y) == 0 comes back as the flags of an X86ISD::OR, (X & Y) == 0
as those of an X86ISD::AND, and (0 - X) == Y is rewritten into
(X + Y) == 0 and comes back as the flags of an X86ISD::ADD.
Only a subtract (CCMP) and an AND (CTEST) have conditional forms, so
build the link from the comparison's own operands rather than from a
flag source:
A comparison with zero can set neither OF nor CF, and TEST clears both,
so the last two are flag-equivalent for every condition code. An equality
comparison is a test of the operands' XOR, so an already live XOR is still
reused instead of keeping both operands live.
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 09f9b4b879179c90960f2cdac6c9d9c3acc0e632
https://github.com/llvm/llvm-project/commit/09f9b4b879179c90960f2cdac6c9d9c3acc0e632
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/InstrumentationRuntimeBoundsSafety.cpp
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/Makefile
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/main.c
Log Message:
-----------
Don't crash reloading a corefile saved from a live process (#224324)
Saving a live process as a corefile and reloading it can abort lldb
itself:
```
$ cat main.c
int main(int argc, char **argv) { return argc; }
$ cc -g -O0 -o a.out main.c
$ lldb ./a.out -o 'b main' -o run \
-o 'process save-core --plugin-name=minidump --style=stack core.dmp' \
-o quit
$ lldb -c core.dmp
(lldb) target create --core "core.dmp"
...
Assertion failed: (0 && "breakpoint has no resolved locations"), function Activate, file InstrumentationRuntimeBoundsSafety.cpp, line 467.
```
`InstrumentationRuntimeBoundsSafety::CheckIfRuntimeIsValid` only checks
whether a loaded module exports two soft-trap symbol names
(`__bounds_safety_soft_trap`, `__bounds_safety_soft_trap_s`), not
whether
the process actually uses BoundsSafety.
`InstrumentationRuntimeBoundsSafety::Activate` runs for any process,
sets
a breakpoint on those two names, and, until this change, asserted if
that
breakpoint failed to resolve to any location.
`ProcessMinidump::ReadModuleList` is what makes the breakpoint fail to
resolve. For each module in the minidump, it calls
`Target::GetOrCreateModule(module_spec, /*notify=*/true, ...)`
(`ProcessMinidump.cpp`); that call synchronously triggers
`ModuleList::NotifyModuleAdded`, which runs `Target::ModulesDidLoad` and
from there `Process::ModulesDidLoad` calls
`InstrumentationRuntimeBoundsSafety::Activate`. Only after that returns
does the same loop iteration reach `module_sp->SetLoadAddress(...)` and
registers the module's sections at a load address, and address can be
resolved correct. However, before reaching to this point, the breakpoint
fails to resolve because that module still has no load address at all,
and trigger assert. This is an ordering problem in the reload.
Reloading the same live process from a mach-o corefile does not hit
this,
for two different reasons depending on `--style`. A `--style=stack`
corefile does not load `libsystem_sanitizers.dylib` at all (confirmed
with `target modules list`: only the executable and `dyld` are present),
so `CheckIfRuntimeIsValid` never finds the symbols and `Activate` never
runs. A `--style=full` corefile does load it, and resolves the same
breakpoint correctly, because `ObjectFileMachO::LoadCoreFileImages`
addresses every image in the batch first and only calls
`Target::ModulesDidLoad` once, after every module already has a load
address, instead of notifying and addressing one module at a time.
Added
`lldb/test/API/functionalities/process_save_core_minidump_reload_crash`,
which builds a plain program using no BoundsSafety feature, saves a live
process as a minidump, and reloads it into a fresh target. Before this
change that reload aborted the `lldb` process; it now loads
successfully.
Assited-by: claude
Commit: 6e6844fb02e1dc212abf4cb0fe1ef8a4a90462b1
https://github.com/llvm/llvm-project/commit/6e6844fb02e1dc212abf4cb0fe1ef8a4a90462b1
Author: Daniel Donenfeld <ddonenfeld at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/callchain.ll
A llvm/test/CodeGen/NVPTX/callprototype-dollar-local-label.ll
A llvm/test/CodeGen/NVPTX/callprototype-local-label.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/param-align.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
Log Message:
-----------
[NVPTX] Fix for device function pointer having the same name as generated callprototype (#205639)
The NVPTX backend generates `.callprototype` directives for indirect
calls with compiler generated names previously based off a unsigned
unique call site number. If a \_\_device\_\_ global function pointer is
named prototype_N with a call to that function, we emit ptx with a
global and callprototype with the same name. This PR updates ISel
lowering to produce a unique temporary symbol instead to avoid naming
conflicts with user defined variables.
Commit: bf6a7d5866c30ab19d4fb8a02dc02cc6beaa505b
https://github.com/llvm/llvm-project/commit/bf6a7d5866c30ab19d4fb8a02dc02cc6beaa505b
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[HLSL][DirectX] report a fatal error when resource access is not guaranteed to be unique (#225285)
Instead of just a diagnostic, report a fatal error when resource access
is not guaranteed to be unique.
Closes #224422
Assisted by GPT-5.6 Sol
Commit: 3874f3a80af2d04bb839865fb7d49d6e3a8acb0a
https://github.com/llvm/llvm-project/commit/3874f3a80af2d04bb839865fb7d49d6e3a8acb0a
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
Log Message:
-----------
[HLSL] Fold inverse matrix transposes (#227049)
When the operand is an unused llvm.matrix.transpose with inverse
dimensions, return its original operand and erase the redundant
intrinsic. This handles both explicit transpose(transpose(M))
expressions and transposes that cancel row-major load normalization.
Commit: 35f8bd0b22184176f18f6795629f489eba3b73bb
https://github.com/llvm/llvm-project/commit/35f8bd0b22184176f18f6795629f489eba3b73bb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/cmpxchg16b-dead-eflags.mir
A llvm/test/CodeGen/X86/expand-cmpxchg16b-dead-eflags.mir
Log Message:
-----------
X86: Preserve dead flags on EFLAGS when lowering CMPXCHG16B pseudos (#227278)
Commit: b862f941eb9e339f7db91ec30ae07c8e6c0952fd
https://github.com/llvm/llvm-project/commit/b862f941eb9e339f7db91ec30ae07c8e6c0952fd
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Fix UnifiedOnDiskCacheTest build with MSVC 2019 (#227453)
MSVC 2019 (14.29.30133) rejects the local constexpr NumTasks as an
array bound inside the by-reference-capturing runConcurrently lambda
("failure was caused by a read of a variable outside its lifetime").
Make it static constexpr so it is not captured.
Fixes: https://lab.llvm.org/buildbot/#/builders/46/builds/42070
Commit: 63220b3b294f3aedcc8d4a0b16df35eca5af845e
https://github.com/llvm/llvm-project/commit/63220b3b294f3aedcc8d4a0b16df35eca5af845e
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/test/UnitTest/SIMDMatcher.h
Log Message:
-----------
[libc][mathvec] Remove unneeded inf check in within_ulp_tolerance (#227459)
Commit: ca02ecc782038517fb06f375033347bd57dadbfd
https://github.com/llvm/llvm-project/commit/ca02ecc782038517fb06f375033347bd57dadbfd
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchange-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchange-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedCompareExchange` function and resource methods (#222165)
This PR adds the `InterlockedCompareExchange` standalone function and
resource
methods. The operation lowers to the same `cmpxchg monotonic` as
`InterlockedCompareStore`.
`InterlockedCompareExchange` reports the previous value, so an
`extractvalue`
reads it from the `cmpxchg` result and stores it through the
`original_value`
reference parameter.
The PR also adds the 64-bit `InterlockedCompareExchange64` methods,
which DXIL
gates on shader model 6.6.
Fixes: https://github.com/llvm/llvm-project/issues/99130
Assisted by: Github Copilot
Commit: b37816a330506d3142516e7891d63aef4efad85e
https://github.com/llvm/llvm-project/commit/b37816a330506d3142516e7891d63aef4efad85e
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareStoreFloat.ll
Log Message:
-----------
[HLSL] Add `InterlockedCompareStoreFloatBitwise` function and resource methods (#222166)
This PR adds the `InterlockedCompareStoreFloatBitwise` standalone
function and
resource methods.
`cmpxchg` rejects a float operand, clang therefore
bitcasts both float arguments to `i32` before it emits the `cmpxchg`,
and the
backend only ever sees an integer compare exchange. No DXIL legalization
is
needed for this operation.
DXC declares this function for 32-bit float alone, with no integer
overload,
so the overload set here is float only. `half` and `double` are
rejected.
The operation reuses the 32-bit integer DXIL operation, so it needs no
capability bits and works from shader model 6.0. A test checks both
halves of
that: the float-bitwise form is accepted at SM 6.0, and the 64-bit
compare-store is still rejected there.
Fixes: https://github.com/llvm/llvm-project/issues/99202
Assisted by: Github Copilot
Commit: 6a55c029ffd056c4775dd2627807a125387b7720
https://github.com/llvm/llvm-project/commit/6a55c029ffd056c4775dd2627807a125387b7720
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedCompareExchangeFloatBitwise` function and resource methods (#222167)
This PR adds the `InterlockedCompareExchangeFloatBitwise` standalone
function
and resource methods. It completes the interlocked stack.
The operation matches `InterlockedCompareStoreFloatBitwise`, except that
it
reports the previous value. Clang bitcasts both float arguments to `i32`
before the `cmpxchg`, then bitcasts the extracted result back to `float`
before it stores it through the `original_value` reference parameter.
As with the compare-store form, DXC declares this function for 32-bit
float
alone, so the overload set is float only, and the operation reuses the
32-bit
integer DXIL operation, so it works from shader model 6.0 without
capability
bits.
Fixes: https://github.com/llvm/llvm-project/issues/99203
Assisted by: Github Copilot
Commit: b908dea151c108f72883790f8f1461460175beeb
https://github.com/llvm/llvm-project/commit/b908dea151c108f72883790f8f1461460175beeb
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Handle select-like i1 sext/zexts in canonicalizeClampLike (#227067)
canonicalizeClampLike matches a select of a select. But if the inner
select has an i1 result type it will be canonicalized to a sext or zext
of the condition. In FFmpeg there is a clamping pattern that shifts the
inverted bits instead of the negated, and the inner select ends up being
canonicalized this way: https://godbolt.org/z/5q8bx69x3
This teaches canonicalizeClampLike to use m_SelectLike to catch these
cases too.
Commit: 97d412452e0fb21d7ed30e8256208ba90a5acc7b
https://github.com/llvm/llvm-project/commit/97d412452e0fb21d7ed30e8256208ba90a5acc7b
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/Shell/ObjectFile/ELF/relocation-offset-out-of-range.yaml
Log Message:
-----------
[lldb] Bounds-check ELF relocation offsets (#227046)
Relocations applied to ELF debug sections were written at r_offset
without checking that the target fits in the section. A malformed object
file could therefore write anywhere relative to the file buffer.
Check every relocation target against the section data. Skip and report
relocations that fall outside it.
rdar://186921964
Commit: 075a71507c4d48221e29da3e4a0289a36e4fd96e
https://github.com/llvm/llvm-project/commit/075a71507c4d48221e29da3e4a0289a36e4fd96e
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
M clang/test/CodeGenHLSL/builtins/and_mat.hlsl
M clang/test/CodeGenHLSL/builtins/or.hlsl
A clang/test/CodeGenHLSL/builtins/or_mat.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
Log Message:
-----------
[HLSL][Matrix] Convert loaded bool matrices to `i1` (#226599)
Fixes #226308.
This PR converts loaded bool matrices to their `i1` representation
before use, like bool vectors do, and updates the affected matrix
codegen tests.
It also splits matrix tests out of `or.hlsl` into its own `or_mat.hlsl`
file to match the convention of the other matrix intrinsic tests.
Assisted-by: Claude Opus 4.8
Commit: c6f5f1a09ba7f7f5cc6ba3043ae20cfa7bd1451c
https://github.com/llvm/llvm-project/commit/c6f5f1a09ba7f7f5cc6ba3043ae20cfa7bd1451c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/AMDGPU/twoaddr-insert-subreg-subrange.mir
M llvm/test/CodeGen/PowerPC/dmr-enable.ll
A llvm/test/CodeGen/RISCV/twoaddr-insert-subreg-subrange.mir
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
Log Message:
-----------
TwoAddressInstructions: Fix subranges straddling the INSERT_SUBREG subreg index (#227427)
Rewriting INSERT_SUBREG into a subregister COPY narrows the def from the
whole register down to one subreg index. The live interval fixup for that only
handled subranges entirely disjoint from the inserted lane mask, so a partially
overlapping subrange keeps a value whose def no longer writes all of its lanes.
The stale value makes the lanes outside the inserted subregister look
defined by the COPY, so the copy that actually provides them ends up
dead and its value is lost. Refine the subranges against the subreg index
before narrowing the def, leaving each one either fully redefined by the COPY
or untouched by it.
Fixes a miscompile reported on RISC-V and restores the pre-6286f77214be
output of Thumb2/mve-vst2.ll, Thumb2/mve-vst3.ll and PowerPC/dmr-enable.ll.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a65125330e7635870d30fb23a4487bcf8054c0b9
https://github.com/llvm/llvm-project/commit/a65125330e7635870d30fb23a4487bcf8054c0b9
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/tools/obj2yaml/obj2yaml.cpp
Log Message:
-----------
[obj2yaml] Suppress leak check on abnormal exit (#227444)
This is a common issue with lsan after exit().
exit() is noreturn, so we cannot expect that the compiler will
preserve pointers to allocations done by callers.
Fixes https://lab.llvm.org/buildbot/#/builders/169/builds/27022
Assisted-by: Gemini
Commit: 42a4bcac3e24fbd202bc242a58e98f21578fb242
https://github.com/llvm/llvm-project/commit/42a4bcac3e24fbd202bc242a58e98f21578fb242
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Expression/REPL.cpp
A lldb/test/Shell/REPL/Breakpoint.test
Log Message:
-----------
[lldb] Fix deadlock when a REPL expression hits a breakpoint (#227400)
When a REPL expression stops at a breakpoint,
REPL::IOHandlerInputComplete calls RunIOHandlerAsync to drop into the
command interpreter while it still holds the error stream lock.
RunIOHandlerAsync then takes the IOHandler stack mutex. At the same
time, the event handler thread reports the stop through
IOHandlerStack::PrintAsync, which takes the IOHandler stack mutex first
and the output mutex second. The opposite lock order can deadlock,
leaving lldb hung after it prints "Execution stopped at breakpoint."
The lock scope that covers the call was introduced in 5007dd9d0945
(#183600). Keep printing under the lock, but defer RunIOHandlerAsync
until the lock is released.
This patch adds a test that exercises this path with the C REPL. Because
the deadlock is a race, the test only catches a regression
intermittently: without the fix it hung in about 6% of runs under
parallel load, and in every run when a delay was injected inside the
locked region.
Assisted-by: Claude
Commit: 52c217b8de29132a7ecaab15316ac409ac4507fc
https://github.com/llvm/llvm-project/commit/52c217b8de29132a7ecaab15316ac409ac4507fc
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU][NFC] De-factorize scalar_to_vector bf16 patterns (#226847)
For Fake16, an SGPR and a VGPR can share the same scalar_to_vector
pattern because there is no 16-bit SGPR at all. The separate uniform
SGPR pattern is therefore only needed for Real True16, where the
divergent case uses a VGPR_16 REG_SEQUENCE.
This de-factorization is to prepare for follow-up PRs to separate SGPR
and VGPR patterns of scalar_to_vector for other types.
Commit: 0478ec2ab5f0036ec31f7285febe8d6016422c9d
https://github.com/llvm/llvm-project/commit/0478ec2ab5f0036ec31f7285febe8d6016422c9d
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/test/CodeGen/AArch64/abi-classify-arg-types.c
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-sve-tuples.c
A clang/test/CodeGen/AArch64/abi-classify-sve-types.c
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
Log Message:
-----------
[LLVMABI][AARCH64] Handle vector types (#225201)
This adds handling for vector types in the AArch64 implementation of the
LLVM ABI library. Legal vectors are passed and returned directly.
Illegal vectors are coerced to an integer or an integer vector, or
passed indirectly if they are too large. Sizeless SVE types are passed
in a register of their own, and fixed-length SVE vectors are coerced to
a scalable vector that occupies the same register. SVE tuples still
report NYI under AAPCS.
Assisted-by: Cursor / claude-opus-5
Commit: 522d1af65dca4cfe1899bfa7163e42050257dab8
https://github.com/llvm/llvm-project/commit/522d1af65dca4cfe1899bfa7163e42050257dab8
Author: Q <60785373+StarryCSF at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV][P-ext] Add scalar multiply high intrinsics (#225561)
Add intrinsics, Clang builtins and SelectionDAG support for the scalar
multiply high operations.
Support
[multiply-high](https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#multiply-high).
On RV32 the non-rounding forms map to the M-extension mulh/mulhu/mulhsu
instructions and the rounding forms to the P-extension
mulhr/mulhru/mulhrsu instructions.
On RV64 the scalar spellings reuse the packed pmulh.w family on the low
words via the existing PMULH*_W patterns.
Commit: 4a853ac90250799688b613d4f7bee3e7709324f7
https://github.com/llvm/llvm-project/commit/4a853ac90250799688b613d4f7bee3e7709324f7
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][CIR] Match CIR return value with OGCG using mem2reg (#227241)
This fixes the test failure introduced by
[226534](https://github.com/llvm/llvm-project/pull/226534)
Currently, the `sve/len.c` test fails because of this difference between
OGCG and CIR:
```
; classic codegen ; CIR (-fclangir)
%2 = mul nuw i64 %1, 16 %6 = mul nuw i64 %5, 16
ret i64 %2 store i64 %6, ptr %3 ; retval slot
%7 = load i64, ptr %3
ret i64 %7
```
So, adding the return value checks as they are breaks the test.
This adds `mem2reg`, so that the CIR output matches OGCG and the same
return value check works for both.
Commit: 3a35f07f74be0100697a10d9e56e4f289e7e9c1b
https://github.com/llvm/llvm-project/commit/3a35f07f74be0100697a10d9e56e4f289e7e9c1b
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/GPU/Pipelines/Passes.h
M mlir/lib/Dialect/GPU/Pipelines/GPUToXeVMPipeline.cpp
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F8.mlir
Log Message:
-----------
[MLIR][XeGPU][XeVM] Lower to XeVM: support skipping backend. (#227125)
And skip backend invocation for slow tests.
Commit: 4b524a8b6b53d204e74725bceabf6ee90be2bca6
https://github.com/llvm/llvm-project/commit/4b524a8b6b53d204e74725bceabf6ee90be2bca6
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/OpenACC/Passes.td
A flang/lib/Optimizer/OpenACC/Transforms/ACCEraseUnusedKernelAllocations.cpp
M flang/lib/Optimizer/OpenACC/Transforms/CMakeLists.txt
A flang/test/Fir/OpenACC/acc-erase-unused-kernel-allocations.mlir
Log Message:
-----------
[flang][openacc] Add ACCEraseUnusedKernelAllocations pass (#227481)
fir.declare carries a debug-memory effect and fir.freemem is a real
free, so an unused fir.allocmem inside acc.compute_region stays live
through ordinary dead-code elimination and is lowered to a checked
device malloc.
Delete that allocation when it has no uses, or when every use is
fir.freemem, a ViewLikeOpInterface view such as fir.convert, or
fir.declare of that storage. A load, store, or other memory use keeps
it. An unused private-recipe allocation is removed the same way as an
unused source array.
Commit: 2dbb0ecf98386f5a3747d0e7811d298fb7913870
https://github.com/llvm/llvm-project/commit/2dbb0ecf98386f5a3747d0e7811d298fb7913870
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/Core/Debugger.h
M lldb/source/Commands/CommandObjectScripting.cpp
M lldb/source/Core/CoreProperties.td
M lldb/source/Core/Debugger.cpp
A lldb/test/API/commands/scripting/extension/TestScriptingExtensionListColors.py
Log Message:
-----------
[lldb] Add label, title and divider ANSI settings (#226606)
Commands that print structured listings hard-coded their colors, but
terminal themes render ANSI colors differently, so users couldn't adjust
them the way they can with the prompt, progress or autosuggestion
colors.
Add `label-ansi-prefix`, `title-ansi-prefix` and `divider-ansi-prefix`
settings, each with a matching suffix, for the field labels, entry
titles and dividers such listings are made of. Their defaults are the
colors `scripting extension list` uses today, and it now reads them from
these settings.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: a1d5f18f53e33a06224c2458e3ef704e6e3a2fe1
https://github.com/llvm/llvm-project/commit/a1d5f18f53e33a06224c2458e3ef704e6e3a2fe1
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[clang][docs] Use doc links to HLSL/ResourceTypes in AttrDocs.td (#227407)
#222504 made the docs build warn about absolute links to pages of the
same Sphinx project, and the docs build turns warnings into errors. The
HLSL resource attribute docs added in #213346 linked to
https://clang.llvm.org/docs/HLSL/ResourceTypes.html, which after #226729
broke the clang docs build (docs-clang-html, docs-clang-man). Use the
{doc} role instead, like the rest of AttrDocs.td.
Commit: 6481220458b94a4ff3403b797f7d66aa209b3c22
https://github.com/llvm/llvm-project/commit/6481220458b94a4ff3403b797f7d66aa209b3c22
Author: Ikhlas Ajbar <iajbar at quicinc.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/intrinsics-v67.ll
Log Message:
-----------
[Hexagon,test] Enable +audio for intrinsics-v67.ll (#227362)
The test uses llvm.hexagon.M7.vdmpy{,.acc}, which lower to
M7_dcmpyrwc{,_acc}. Those instructions require the audio feature, so add
-mattr=+audio to the RUN line to avoid a predicate-check crash in the
asm printer.
Commit: ed3eb7e7d31107eb1434ef13c9282b7e8c8bd79b
https://github.com/llvm/llvm-project/commit/ed3eb7e7d31107eb1434ef13c9282b7e8c8bd79b
Author: PiJoules <leonardchan at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/src/string/memory_utils/aarch64/inline_memcpy.h
Log Message:
-----------
[libc][aarch64] Use inline_memcpy_aligned_access_64bit under -mstrict-align (#227428)
Under `-mstrict-align`, clang cannot determine both `src` and `dst` are
aligned. The end of `inline_memcpy_aarch64` aligns `src` but it cannot
confirm `dst` is aligned. As a result,
`builtin::Memcpy<64>::loop_and_tail(dst, src, count)` lowers to
`__builtin_memcpy_inline(..., 64)` but clang emits many many single-byte
load/store instructions to ensure correctness. This can be very slow, so
if unaligned accesses are not supported, opt for adjusting both `src`
and `dst` such that we can use 8-byte loads/stores.
`inline_memcpy_aligned_access_64bit` already does this so we can just
reuse that.
Commit: 13d807832245d06d3906da577a8fa185a42d8baf
https://github.com/llvm/llvm-project/commit/13d807832245d06d3906da577a8fa185a42d8baf
Author: YongKang Zhu <yongzhu at fb.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M bolt/lib/Rewrite/DWARFRewriter.cpp
A bolt/test/AArch64/dwarf2-highpc-addr-form.s
M bolt/test/AArch64/go_dwarf.test
Log Message:
-----------
[BOLT] Emit DW_AT_high_pc matching the class of its form (#227066)
DW_AT_high_pc holding an offset from DW_AT_low_pc is a DWARF 4 addition;
in DWARF 2 and 3 the attribute is always class address.
updateLowPCHighPC() always wrote "HighPC - LowPC" while reusing whatever
form the input DIE had, so a DWARF 2 CU using DW_FORM_addr ended up
storing a length where an end address is expected.
BOLT should write the end address when the form is DW_FORM_addr, and
the length otherwise. The default form for a new attribute is now
DW_FORM_addr below DWARF 4, and size needs to be widened to 64 bits so
DW_FORM_data8 won't be truncated. The FunctionRanges.empty() code path
no longer treats a raw DW_FORM_addr high_pc as a size.
Assited-by: opus
Commit: dee358a265047e90dd535dae51af76bb30f45041
https://github.com/llvm/llvm-project/commit/dee358a265047e90dd535dae51af76bb30f45041
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/Transforms/IndirectBrExpand/basic.ll
Log Message:
-----------
[IndirectBrExpand] Use UTC for basic.ll
To make it easier to modify in the future.
Reviewers: aeubanks, mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/227467
Commit: 44b03ecc6f01b40d60a0dea7631adc3d2a78488f
https://github.com/llvm/llvm-project/commit/44b03ecc6f01b40d60a0dea7631adc3d2a78488f
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/utils.py
M lldb/test/API/tools/lldb-dap/cancel/TestDAP_cancel.py
M lldb/test/API/tools/lldb-dap/disconnect/TestDAP_disconnect.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_terminate_commands.py
M lldb/test/API/tools/lldb-dap/launch/TestDAP_launch_termination.py
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/DAP.h
M lldb/tools/lldb-dap/Handler/RequestHandler.h
M lldb/unittests/DAP/Handler/DisconnectTest.cpp
M lldb/unittests/DAP/TestBase.h
Log Message:
-----------
[lldb-dap] End the session before sending the disconnect response (#227106)
Previously the `disconnect` request asks the debug adapter to disconnect
from the debuggee, ending the debug session, and then to shut down.
lldb-dap responded right after killing or detaching the process. So the
`exited` event, terminatedCommands and exitedCommands can be sent after
`disconnect` could reaches the client.
`DisconnectRequestHandler` now stores its response in
`DAP::on_session_end`. `DAP::Loop()` sends it once the session ended.
The teardown/cleanup is now:
- The event threads stop, after they report the exit of a killed
process.
- `terminated` Event is sent, if the event thread didn't send it.
- The transport thread stops.
- If there is a pending `configuration_done` we reply.
- The requests queued behind `disconnect` request are cancelled.
- The `disconnect` response is sent last.
- The debugger is destroyed.
OnError and OnClosed callback from the transport will not terminate the
loop, instead it updates the queue state to InputClosed allowing
DAP::Loop to do the above cleanup. Also because we use the MainLoop to
forward outputs from stdout and stderr.
`Disconnect()` no longer sends the terminated Event itself. It used to
wait in `SendTerminatedEvent()`'s `call_once` while holding the API
mutex. The event thread, inside that `call_once`, needs the API mutex to
run the `terminateCommands`. So a process exiting during a `disconnect`
could deadlock. See https://github.com/llvm/llvm-project/issues/194670
The test no longer closes the connection when we receive the disconnect.
This was a workaround so we exit early when waiting for an exited event
that the session may not receive. Ignore `shutdown()` errors when the
adapter already closed the socket.
Fixes #194670
Commit: 535dc19f425fe5245b3c5bc2d004bca0657e0863
https://github.com/llvm/llvm-project/commit/535dc19f425fe5245b3c5bc2d004bca0657e0863
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[bazel][MLIR] Fix 98331a0a49e6d4a86d2e39ecc71025ce3b85acd9 (#227500)
Commit: 103f4694c6f6746172fb90aa0042401030934028
https://github.com/llvm/llvm-project/commit/103f4694c6f6746172fb90aa0042401030934028
Author: Igor Zamyatin <igor.zamyatin at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/XeGPU/uArch/uArchBase.h
M mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
M mlir/test/Conversion/VectorToXeGPU/transfer-read-to-xegpu.mlir
M mlir/test/Conversion/VectorToXeGPU/transfer-write-to-xegpu.mlir
Log Message:
-----------
[mlir][xegpu] Check uArch block shapes in VectorToXeGPU transfer lowering (#217179)
vector.transfer_read/transfer_write were lowered to xegpu.load_nd /
xegpu.store_nd whenever the target chip was pvc, bmg or cri and the
transfer had rank >= 2, without asking whether the target's subgroup 2D
block instructions can access the requested tile at all.
Changing it to query the uArch 2D block load/store description up front
and keep the block path only for tiles whose two innermost dims are each
a multiple of a supported block size- the property the later layout
propagation and blocking passes rely on when they split a tile into
hardware-sized blocks. Everything else takes the scattered
load_gather/store_scatter fallback that both patterns already have.
Deriving 2D block support from the uArch instruction registry also
replaces the hardcoded chip list, resolving the TODO left there; the
three chips that registry covers are the same three that were listed.
assisted by claude
Commit: dedf18ffc2eee877d8a8346e91bed5a986b0353f
https://github.com/llvm/llvm-project/commit/dedf18ffc2eee877d8a8346e91bed5a986b0353f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M orc-rt/test/regression/README.md
Log Message:
-----------
[orc-rt] Remove duplicate section from regression test README. NFC. (#227503)
The "Tests with more than one source file" section appeared twice.
Remove the older copy.
Commit: 0c14e3aa6ef4c492d9d7822b8fba2d725d5aedaa
https://github.com/llvm/llvm-project/commit/0c14e3aa6ef4c492d9d7822b8fba2d725d5aedaa
Author: Joey Riches <josephriches at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M bolt/runtime/CMakeLists.txt
Log Message:
-----------
[BOLT] Ensure runtime is built with uncompressed debug symbols (#218126)
Currently, if the runtime is built with compressed debug symbols it
causes an out-of-bounds read and segfault when instrumenting a binary.
This is due to JITLink currently not supporting SHF_COMPRESSED symbols
as it would need to decompress the symbols first to update the reloc
symbols
As some distributions are starting to enable compressed debug sections
in their toolchains by default, ensure the runtime is built without them
until JITLink supports updating SHF_COMPRESSED relocs.
Commit: 92b1a83d334ceeef3278c5ce9bfa4d23c2b2ce05
https://github.com/llvm/llvm-project/commit/92b1a83d334ceeef3278c5ce9bfa4d23c2b2ce05
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M orc-rt/cmake/OrcRTTesting.cmake
M orc-rt/test/regression/README.md
M orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
M orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
M orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Make split-file a required regression test tool. (#227510)
split-file is an LLVM utility, like FileCheck and not, so it's available
wherever they are. Require it in the same way, rather than gating tests
on a split-file lit feature.
Commit: fbfb42d721fe6dfbd25550a828acba9229d97cec
https://github.com/llvm/llvm-project/commit/fbfb42d721fe6dfbd25550a828acba9229d97cec
Author: Skywaterr <jleung12333 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Constants.h
Log Message:
-----------
Fix typo in comment for ConstantInt get method (#227493)
Originally found this typo from docs generated by Doxygen.
Commit: 6618da1ee70cfd488da838517adbf227853bfe7e
https://github.com/llvm/llvm-project/commit/6618da1ee70cfd488da838517adbf227853bfe7e
Author: Emilio Cota <ecg at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A llvm/test/Instrumentation/MemorySanitizer/masked-divrem.ll
Log Message:
-----------
[msan] add tests for llvm.masked.{udiv,sdiv,urem,srem} (#227462)
In preparation for #225363, which changes behavior.
Commit: 38dd20065910b35df173eeec251eccb0268383f3
https://github.com/llvm/llvm-project/commit/38dd20065910b35df173eeec251eccb0268383f3
Author: Ilias <iliasaberkane6 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M bolt/runtime/common.h
Log Message:
-----------
[BOLT] Keep instrumentation diagnostics out of line (#225986)
The instrumentation runtime's diagnostics reserve a 32 KiB scratch
buffer on the stack. When `assert()` or `reportNumber()` get inlined
into callers on instrumented code paths, the buffer inflates every
caller frame — on small thread stacks a single such frame already
overflows the guard region and the profiled binary segfaults even when
no assertion fires.
Move the `assert()` failure path into a `noinline` helper
(`reportAssertFailure`) and mark `reportNumber()` `noinline` as well, so
the scratch buffer is only reserved when a diagnostic is actually
emitted. This matches the fix sketched in the issue report.
Verified: `common.h` syntax-checks clean in the freestanding runtime
build; the only behavioral change is where the buffer lives.
Fixes #225479
AI assistance: AI tools helped prepare this contribution. The author
reviewed the final patch and remains responsible for it, in accordance
with the LLVM AI Tool Use Policy.
Commit: ddd344ff22eaef85ad399356125baa653ab9f559
https://github.com/llvm/llvm-project/commit/ddd344ff22eaef85ad399356125baa653ab9f559
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vploadff.ll
M llvm/test/CodeGen/RISCV/rvv/vploadff.ll
Log Message:
-----------
[SelectionDAG] Add computeKnownBits support for VP_LOAD_FF's second result (#227389)
The second result of `ISD::VP_LOAD_FF` is the new EVL, which is always
less than or equal to(1) the EVL operand of this intrinsic, and (2) the
largest length of the loaded vector. This patch teaches computeKnownBits
about these ranges so that DAGCombiner can eliminate things like
redundant z/sext + truncate on this new EVL.
In RISC-V, this means that if there are two consecutive fault only first
loads where the second one is using the EVL from the first load, there
won't be any redundant zext + truncate generated for the intermediate
EVL in between.
Commit: 75d4e341d74affa29c16f870c2c9f37ea0508cc7
https://github.com/llvm/llvm-project/commit/75d4e341d74affa29c16f870c2c9f37ea0508cc7
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
Log Message:
-----------
[HLSL] Extract matrix elementwise cast operands from SSA (#227065)
Avoid materializing matrix operands in the hlsl.ewcast.src temporary
when performing matrix-to-vector elementwise casts. Extract each element
directly from the canonical matrix SSA value using its column-major
flattened index.
Factor vector result construction into a shared helper so aggregate and
matrix sources use the same conversion and insertion logic.
Update the matrix-to-vector CodeGen checks for both row-major and
column-major layouts.
Assisted by Copilot using GPT 5.6 Sol
Commit: 09d1052138de9d25c8c3f9914062b6147b04ce85
https://github.com/llvm/llvm-project/commit/09d1052138de9d25c8c3f9914062b6147b04ce85
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/TableGen/RegClassByHwModeCompressPat.td
A llvm/test/TableGen/RegClassByHwModeCompressPat4Modes.td
A llvm/test/TableGen/RegClassByHwModeCompressPatError.td
M llvm/utils/TableGen/Common/CodeGenHwModes.cpp
M llvm/utils/TableGen/Common/CodeGenHwModes.h
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.cpp
M llvm/utils/TableGen/Common/SubtargetFeatureInfo.h
M llvm/utils/TableGen/CompressInstEmitter.cpp
Log Message:
-----------
[TableGen] Support HwMode registers in CompressInstEmitter (#203599)
Previously, CompressInstEmitter only handled plain Register and
RegisterClass records when matching and validating operands in
CompressPat definitions. Attempting to use a RegisterByHwMode (such as a
mode-dependent stack pointer) or a RegClassByHwMode with mode-dependent
registers failed because CompressInstEmitter could not resolve the
underlying register or register class for a given subtarget
configuration.
Introduce HwModePredicates in CodeGenHwModes to resolve HwModeSelect
records using the subtarget features required by a CompressPat (with
predicates implying the absence of all non-default modes resolving to
DefaultMode). This allows using a single instruction definition for
compressed instructions like RISC-V C_ADDI4SPN/C_ADDI16SP across HwModes
instead of duplicating the instruction definitions for each mode.
This commit was created with the help of AI tools
Commit: 88087e2ed23edcde80caaeaa8a6a3d32c266e9f6
https://github.com/llvm/llvm-project/commit/88087e2ed23edcde80caaeaa8a6a3d32c266e9f6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/test/BUILD.gn
Log Message:
-----------
[gn] port 841433da7862 (#227524)
Commit: 044279abadba20fc76157546e36630e31d39564c
https://github.com/llvm/llvm-project/commit/044279abadba20fc76157546e36630e31d39564c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A orc-rt/test/regression/languages/c/addressing/cross-object/global-function-call.test
A orc-rt/test/regression/languages/c/addressing/cross-object/global-function-pointer-in-data.test
A orc-rt/test/regression/languages/c/addressing/cross-object/global-function-tail-call.test
A orc-rt/test/regression/languages/c/addressing/cross-object/hidden-function-call.test
A orc-rt/test/regression/languages/c/addressing/same-object/global-function-call.c
A orc-rt/test/regression/languages/c/addressing/same-object/global-function-pointer-in-data.c
A orc-rt/test/regression/languages/c/addressing/same-object/static-function-call.c
A orc-rt/test/regression/languages/c/addressing/same-object/static-function-tail-call.c
Log Message:
-----------
[orc-rt] Add C addressing regression tests for functions. (#227518)
Add tests that check that JIT'd C code can call functions, both in the
same object and in other objects: direct calls, calls through function
pointers stored in initialized data, and tail calls. The tail call tests
only run at -O2, since an unoptimized build may not emit tail calls.
Commit: cd15a723995a332fd8bdcfaca9f86933479c3641
https://github.com/llvm/llvm-project/commit/cd15a723995a332fd8bdcfaca9f86933479c3641
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A libcxx/docs/DesignDocs/NoexceptPolicy.md
R libcxx/docs/DesignDocs/NoexceptPolicy.rst
A libcxx/docs/DesignDocs/PSTLIntegration.md
R libcxx/docs/DesignDocs/PSTLIntegration.rst
A libcxx/docs/DesignDocs/ThreadingSupportAPI.md
R libcxx/docs/DesignDocs/ThreadingSupportAPI.rst
A libcxx/docs/DesignDocs/TimeZone.md
R libcxx/docs/DesignDocs/TimeZone.rst
A libcxx/docs/DesignDocs/UniquePtrTrivialAbi.md
R libcxx/docs/DesignDocs/UniquePtrTrivialAbi.rst
A libcxx/docs/DesignDocs/UnspecifiedBehaviorRandomization.md
R libcxx/docs/DesignDocs/UnspecifiedBehaviorRandomization.rst
A libcxx/docs/DesignDocs/VisibilityMacros.md
R libcxx/docs/DesignDocs/VisibilityMacros.rst
A libcxx/docs/DesignDocs/WindowsSupport.md
R libcxx/docs/DesignDocs/WindowsSupport.rst
A libcxx/docs/Hardening.md
R libcxx/docs/Hardening.rst
A libcxx/docs/ImplementationDefinedBehavior.md
R libcxx/docs/ImplementationDefinedBehavior.rst
A libcxx/docs/Modules.md
R libcxx/docs/Modules.rst
A libcxx/docs/TestingLibcxx.md
R libcxx/docs/TestingLibcxx.rst
A libcxx/docs/UserDocumentation.md
R libcxx/docs/UserDocumentation.rst
A libcxx/docs/VendorDocumentation.md
R libcxx/docs/VendorDocumentation.rst
A libcxx/docs/index.md
R libcxx/docs/index.rst
M libcxx/utils/libcxx-lit
Log Message:
-----------
[libc++][docs] Rename documentation files to Markdown (batch 2) (#222062)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 2a94ea1034d4bf606faf84a7926648ebd72abc0c
https://github.com/llvm/llvm-project/commit/2a94ea1034d4bf606faf84a7926648ebd72abc0c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/docs/DesignDocs/NoexceptPolicy.md
M libcxx/docs/DesignDocs/PSTLIntegration.md
M libcxx/docs/DesignDocs/ThreadingSupportAPI.md
M libcxx/docs/DesignDocs/TimeZone.md
M libcxx/docs/DesignDocs/UniquePtrTrivialAbi.md
M libcxx/docs/DesignDocs/UnspecifiedBehaviorRandomization.md
M libcxx/docs/DesignDocs/VisibilityMacros.md
M libcxx/docs/DesignDocs/WindowsSupport.md
M libcxx/docs/Hardening.md
M libcxx/docs/ImplementationDefinedBehavior.md
M libcxx/docs/Modules.md
M libcxx/docs/TestingLibcxx.md
M libcxx/docs/UserDocumentation.md
M libcxx/docs/VendorDocumentation.md
M libcxx/docs/index.md
Log Message:
-----------
[libc++][docs] Convert documentation from reST to Markdown (batch 2) (#222064)
This is the second batch of changes to migrate libc++ documentation from
rst to markdown.
I use a local pixel diff tool to compare the rendered HTML, and all
diffs seem like fixes. They tend to fall into the following categories:
- dashed bullet lists were previously not rendered, but now they are
- extra indentation interpreted as blockquotes has been removed
- single backticks are now codefont spans, not italic spans
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #222062, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
Commit: 406e092364729bfcec1de79cee86ca56eb7756b8
https://github.com/llvm/llvm-project/commit/406e092364729bfcec1de79cee86ca56eb7756b8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M orc-rt/cmake/OrcRTTesting.cmake
Log Message:
-----------
[orc-rt] Fix 80-col violations in CMake (#227525)
Commit: 331fda2a61ad87b15424c905c8b0d8890e61bfc9
https://github.com/llvm/llvm-project/commit/331fda2a61ad87b15424c905c8b0d8890e61bfc9
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Host/macosx/PythonRuntimeLoaderDarwin.cpp
Log Message:
-----------
[lldb] Find Python relative to LLDB.framework on Darwin (again) (#227521)
The PythonRuntimeLoaderDarwin is responsible for finding the Python
library at runtime. Previously, this was using `DEVELOPER_DIR` and
`xcrun` to avoid having to hard-code the same list of relative paths
that we have as RPATHs for the non-dynamic interpreter build.
However, that leads to some tricky behavior when launching `lldb` with
our without `xcrun`. Combined with some odd path combinations, I changed
my mind and went back to mimicking the RPATH approach.
While I was at it, I also dropped the fallback for looking for Python in
/Applications/Xcode.app. That was always a hack, and now that we support
falling back to a Homebrew or Pyhthon.org installed Python.framework, I
think we should just rely on that.
rdar://188746227
Commit: fe0b0b36927b7e5d2de049cd9f4b33ff6ca0d873
https://github.com/llvm/llvm-project/commit/fe0b0b36927b7e5d2de049cd9f4b33ff6ca0d873
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/bf16-inline-const-opsel.ll
Log Message:
-----------
[AMDGPU] Fix inline constant for scalar_to_vector of bf16 math ops (#227479)
On targets with BF16InlineConstFromUpperFP32, an inline constant on a
packed bf16 instruction is expanded to FP32, so only a splat is
encodable and both lanes must use op_sel to read the upper half. Scalar
bf16 math lowers to V_PK_* with a dead high lane, so the constant
arrived as (scalar_to_vector bf16:c), which is not a splat yet still
looked inlinable and got folded without op_sel, reading the wrong half.
Combine (scalar_to_vector bf16:c) into a splat BUILD_VECTOR when c is an
inlinable bf16 constant on such subtargets, and in SIFoldOperands
disable the V2BF16 folding paths that would inline a literal without
op_sel. Also allow op_sel_lo on src1 in isOMod() for V_PK_MUL_BF16 so
omod folding still applies.
Fixes: LCOMPILER-2879 and ROCM-30938
Commit: d9fa328a98f9190d5dd94271936297c08f03f555
https://github.com/llvm/llvm-project/commit/d9fa328a98f9190d5dd94271936297c08f03f555
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/utils/ci/lnt/machines.json
Log Message:
-----------
[libc++] Bump machines to latest test suite (#227528)
We recently merged some fixes for the test suite which should make the
comparisons more meaningful. Since we haven't re-generated anything
since the recent LNT machine bumps, re-bumping now should not cause any
churn.
Commit: 30b60db0ef62c88f223190f851b353076d747882
https://github.com/llvm/llvm-project/commit/30b60db0ef62c88f223190f851b353076d747882
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.h
A llvm/test/CodeGen/SystemZ/zos-celqmain-debug.ll
A llvm/test/CodeGen/SystemZ/zos-celqmain-nomain.ll
A llvm/test/CodeGen/SystemZ/zos-celqmain.ll
Log Message:
-----------
[SystemZ][z/OS] Emit CELQMAIN for a module defining main (#226710)
The Language Environment startup routine `CELQSTRT` finds the main
routine and its environment through `CELQMAIN`. clang does not emit it;
the driver links with `-u CELQMAIN`, which pulls the copy from
`SCEEBND2`. That copy is in NORENT format and refers to the symbol
`MAIN`, so a program built with clang does not start (U4093 reason 218,
or a protection exception because no WSA is allocated and the ADA offset
is used as an absolute address).
For a module that defines `main`, emit `CELQMAIN` in RENT format as
described in "z/OS Language Environment Vendor Interfaces", chapter
"Program initialization and termination for AMODE 64 applications", plus
a reference to the bootstrap routine `CELQBST`, which `CELQSTRT` only
references weakly. `CELQMAIN` gets OS linkage, because `CELQSTRT`,
`CELQINPL` and `CELQBST` reference it with OS linkage (otherwise the
binder reports IEW2469E).
With this change `int main(void) { return 42; }` bound with `ld -e
CELQSTRT` against `SCEEBND2` and the LE side decks, and no other
objects, returns 42 on z/OS 3.1.
Tests: new `zos-celqmain.ll` and `zos-celqmain-nomain.ll`; `llvm-lit
test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF` passes (1305 passed,
19 unsupported).
The comment in `GOFFObjectWriter.cpp` mentions `emitCELQMAIN`; if an
implementation is already planned upstream, I am happy to close this.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: eda7a9841c50996b9f92e78a7b0b0c33b261bbeb
https://github.com/llvm/llvm-project/commit/eda7a9841c50996b9f92e78a7b0b0c33b261bbeb
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
R orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
R orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
R orc-rt/test/regression/languages/c/addressing/cross-object/global-function-call.test
R orc-rt/test/regression/languages/c/addressing/cross-object/global-function-pointer-in-data.test
R orc-rt/test/regression/languages/c/addressing/cross-object/global-function-tail-call.test
R orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
R orc-rt/test/regression/languages/c/addressing/cross-object/hidden-function-call.test
A orc-rt/test/regression/languages/c/addressing/global-array-element-pointer-in-data-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/global-data-load-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/global-data-pointer-in-data.c
A orc-rt/test/regression/languages/c/addressing/global-data-store.c
A orc-rt/test/regression/languages/c/addressing/global-function-call-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/global-function-call.c
A orc-rt/test/regression/languages/c/addressing/global-function-pointer-in-data-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/global-function-pointer-in-data.c
A orc-rt/test/regression/languages/c/addressing/global-function-tail-call-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/hidden-data-load-cross-obj.test
A orc-rt/test/regression/languages/c/addressing/hidden-function-call-cross-obj.test
R orc-rt/test/regression/languages/c/addressing/same-object/global-data-pointer-in-data.c
R orc-rt/test/regression/languages/c/addressing/same-object/global-data-store.c
R orc-rt/test/regression/languages/c/addressing/same-object/global-function-call.c
R orc-rt/test/regression/languages/c/addressing/same-object/global-function-pointer-in-data.c
R orc-rt/test/regression/languages/c/addressing/same-object/static-array-element-load.c
R orc-rt/test/regression/languages/c/addressing/same-object/static-data-load.c
R orc-rt/test/regression/languages/c/addressing/same-object/static-function-call.c
R orc-rt/test/regression/languages/c/addressing/same-object/static-function-tail-call.c
A orc-rt/test/regression/languages/c/addressing/static-array-element-load.c
A orc-rt/test/regression/languages/c/addressing/static-data-load.c
A orc-rt/test/regression/languages/c/addressing/static-function-call.c
A orc-rt/test/regression/languages/c/addressing/static-function-tail-call.c
Log Message:
-----------
[orc-rt] Flatten C addressing regression tests. NFC. (#227529)
Move the tests out of same-object/ and cross-object/ subdirectories into
addressing/, and mark tests of references to entities in other objects
with a -cross-obj suffix. This keeps the variants of a construct
together, e.g. global-function-call.c next to
global-function-call-cross-obj.test, so gaps in coverage are easier to
spot.
Commit: 0c72fd341f04bbc7ad58388ec7642d519e094c31
https://github.com/llvm/llvm-project/commit/0c72fd341f04bbc7ad58388ec7642d519e094c31
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Add llvm-dis to compiler-rt test dependency (#227212)
A recent commit 9a0c255ce1ef introduced dependency on llvm-dis to
compiler-rt test instrprof-thinlto-indirect-call-promotion.cpp. This
caused error "llvm-dis: command not found" in CI testing. Fix by adding
llvm-dis to the dependency list for compiler-rt test.
Commit: 777ed8d608f464a9bb9f5987f1ac3391fa10da22
https://github.com/llvm/llvm-project/commit/777ed8d608f464a9bb9f5987f1ac3391fa10da22
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/SemaHLSL/matrix_layout_attr.hlsl
Log Message:
-----------
[Clang][HLSL] Reject matrix layout modifiers on array typedefs (#227364)
Fixes #226251
Require row_major and column_major modifiers to apply directly to a
matrix type rather than accepting an array typedef whose element type is
a matrix.
This preserves valid declarations of arrays of annotated matrix elements
while rejecting attempts to apply a layout modifier to the array type
itself.
Commit: c6d20a624f628bcc46f29e25846cb8b1f3c66f05
https://github.com/llvm/llvm-project/commit/c6d20a624f628bcc46f29e25846cb8b1f3c66f05
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lld/ELF/Arch/AArch64.cpp
A lld/test/ELF/aarch64-tls-le-12.s
M lld/test/ELF/aarch64-tls-le.s
Log Message:
-----------
[lld][AArch64] Support R_AARCH64_TLSLE_ADD_TPREL_LO12 (#227173)
AArch64 local-exec TLS code sequences compiled with -mtls-size=12 use
the non-NC R_AARCH64_TLSLE_ADD_TPREL_LO12 relocation (emitted for 'add
xN, xN, :tprel_lo12:sym'), but lld only handles the _NC variant, so
linking such objects fails with 'unknown relocation'.
Add the relocation to the TLS LE group in scanSectionImpl (R_TPREL, same
group as the other TLSLE relocations, so it is also rejected for
-shared) and resolve it like the _NC variant, but with an unsigned
12-bit range check as the non-NC form requires the full offset to fit
into the imm12 field.
Commit: 4b4de0824b3527fa97d1d0b935be4f4da7c8f49c
https://github.com/llvm/llvm-project/commit/4b4de0824b3527fa97d1d0b935be4f4da7c8f49c
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/test/Transforms/InstCombine/div.ll
M llvm/test/Transforms/InstCombine/sdiv-canonicalize.ll
Log Message:
-----------
[InstCombine] Fold `-X / -Y` to `X / Y` when it cannot overflow (#224025)
Fold:
```
(-X) / (-Y) -> X / Y
```
Do not combine when X may be INT_MIN and Y may be -1, as the result
could introduce signed division overflow.
For AMDGPU example:
https://godbolt.org/z/6jj6E8T5T
Commit: d578f0cc32313ee1168f97e919f1255496a3848a
https://github.com/llvm/llvm-project/commit/d578f0cc32313ee1168f97e919f1255496a3848a
Author: Ying Huang <ying.huang at oss.cipunited.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/test/CodeGen/Mips/cconv/vector.ll
M llvm/test/CodeGen/Mips/fcmp.ll
M llvm/test/CodeGen/Mips/fp-intrinsics.ll
M llvm/test/CodeGen/Mips/msa/f16-llvm-ir.ll
M llvm/test/CodeGen/Mips/o32_cc.ll
Log Message:
-----------
[Mips] Add lowerConstantFP to optimize some floating load instrs to mtc1+mthc1 (#196226)
Fix #180873.
Commit: f9443093af0099011e4ed7a190fdddd97868e123
https://github.com/llvm/llvm-project/commit/f9443093af0099011e4ed7a190fdddd97868e123
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-interleave.ll
Log Message:
-----------
[RISCV] Model interleave2 and deinterleave2 costs with Zvzip (#225752)
This PR extends the RISC-V TTI cost model to recognize
`llvm.vector.interleave2` and `llvm.vector.deinterleave2` when the Zvzip
extension is available.
The cost is computed based on the operand that holds the interleaved
data: the destination operand of `vzip.vv`, and the source operand of
`unzipe.v` or `unzipo.v`.
This is the first PR split out from #224991.
Assisted-By: Trae CLI (GPT-5)
Commit: d91bfe0e1b401f6033e6eba941aee15d56424d90
https://github.com/llvm/llvm-project/commit/d91bfe0e1b401f6033e6eba941aee15d56424d90
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg-blockaddress.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg1.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg3-phis.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg4-multiple-duplicate-cfg-updates.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg5-del-phis-for-dead-block.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg6-dead-self-loop.ll
M llvm/test/lit.cfg.py
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/optdriver.cpp
M polly/docs/ReleaseNotes.rst
M polly/test/CodeGen/20100622.ll
M polly/test/CodeGen/20100708.ll
M polly/test/CodeGen/20100720-MultipleConditions.ll
M polly/test/CodeGen/LoopParallelMD/do_not_mutate_debug_info.ll
M polly/test/CodeGen/LoopParallelMD/loop_nest_param_parallel.ll
M polly/test/CodeGen/LoopParallelMD/single_loop_param_parallel.ll
M polly/test/CodeGen/MemAccess/codegen_address_space.ll
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
M polly/test/CodeGen/MemAccess/codegen_simple.ll
M polly/test/CodeGen/MemAccess/codegen_simple_float.ll
M polly/test/CodeGen/MemAccess/codegen_simple_md.ll
M polly/test/CodeGen/MemAccess/codegen_simple_md_float.ll
M polly/test/CodeGen/MemAccess/create_arrays.ll
M polly/test/CodeGen/MemAccess/create_arrays_heap.ll
M polly/test/CodeGen/MemAccess/default_aligned_new_access_function.ll
M polly/test/CodeGen/MemAccess/generate-all.ll
M polly/test/CodeGen/MemAccess/invariant_base_ptr.ll
M polly/test/CodeGen/MemAccess/map_scalar_access.ll
M polly/test/CodeGen/MemAccess/multiple_types.ll
M polly/test/CodeGen/MemAccess/simple.ll
M polly/test/CodeGen/MemAccess/simple_analyze.ll
M polly/test/CodeGen/MemAccess/update_access_functions.ll
M polly/test/CodeGen/Metadata/basic_vec_annotate.ll
M polly/test/CodeGen/Metadata/fallback_vec_annotate.ll
M polly/test/CodeGen/Metadata/skip_vec_annotate_fp_dist1.ll
M polly/test/CodeGen/OpenMP/alias-metadata.ll
M polly/test/CodeGen/OpenMP/floord-as-argument-to-subfunction.ll
M polly/test/CodeGen/OpenMP/inlineasm.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded_different_bb.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointer_preloaded_pass_only_needed.ll
M polly/test/CodeGen/OpenMP/invariant_base_pointers_preloaded.ll
M polly/test/CodeGen/OpenMP/issue179135.ll
M polly/test/CodeGen/OpenMP/issue185313.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-iv.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values-2.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values-3.ll
M polly/test/CodeGen/OpenMP/loop-body-references-outer-values.ll
M polly/test/CodeGen/OpenMP/loop-bounds-reference-outer-ids.ll
M polly/test/CodeGen/OpenMP/mapped-phi-access.ll
M polly/test/CodeGen/OpenMP/matmul-parallel.ll
M polly/test/CodeGen/OpenMP/new_multidim_access.ll
M polly/test/CodeGen/OpenMP/recomputed-srem.ll
M polly/test/CodeGen/OpenMP/reference-argument-from-non-affine-region.ll
M polly/test/CodeGen/OpenMP/reference-other-bb.ll
M polly/test/CodeGen/OpenMP/reference-preceeding-loop.ll
M polly/test/CodeGen/OpenMP/reference_latest.ll
M polly/test/CodeGen/OpenMP/scev-rewriting.ll
M polly/test/CodeGen/OpenMP/single_loop.ll
M polly/test/CodeGen/OpenMP/single_loop_with_loop_invariant_baseptr.ll
M polly/test/CodeGen/OpenMP/single_loop_with_param.ll
M polly/test/CodeGen/OpenMP/two-parallel-loops-reference-outer-indvar.ll
M polly/test/CodeGen/RuntimeDebugBuilder/combine_different_values.ll
M polly/test/CodeGen/RuntimeDebugBuilder/stmt_tracing.ll
M polly/test/CodeGen/alias_metadata_too_many_arrays.ll
M polly/test/CodeGen/conflict-between-loop-invariant-code-hosting-and-escape-map-computation.ll
M polly/test/CodeGen/constant_condition.ll
M polly/test/CodeGen/debug-intrinsics.ll
M polly/test/CodeGen/exprModDiv.ll
M polly/test/CodeGen/hoisted_load_escapes_through_phi.ll
M polly/test/CodeGen/hoisting_1.ll
M polly/test/CodeGen/hoisting_2.ll
M polly/test/CodeGen/inner_scev_sdiv_in_lb.ll
M polly/test/CodeGen/inv-load-lnt-crash-wrong-order-2.ll
M polly/test/CodeGen/inv-load-lnt-crash-wrong-order-3.ll
M polly/test/CodeGen/inv-load-lnt-crash-wrong-order.ll
M polly/test/CodeGen/invariant-load-dimension.ll
M polly/test/CodeGen/invariant-load-preload-base-pointer-origin-first.ll
M polly/test/CodeGen/invariant_cannot_handle_void.ll
M polly/test/CodeGen/invariant_load.ll
M polly/test/CodeGen/invariant_load_address_space.ll
M polly/test/CodeGen/invariant_load_alias_metadata.ll
M polly/test/CodeGen/invariant_load_base_pointer.ll
M polly/test/CodeGen/invariant_load_base_pointer_conditional.ll
M polly/test/CodeGen/invariant_load_base_pointer_conditional_2.ll
M polly/test/CodeGen/invariant_load_canonicalize_array_baseptrs.ll
M polly/test/CodeGen/invariant_load_condition.ll
M polly/test/CodeGen/invariant_load_different_sized_types.ll
M polly/test/CodeGen/invariant_load_escaping.ll
M polly/test/CodeGen/invariant_load_escaping_second_scop.ll
M polly/test/CodeGen/invariant_load_in_non_affine_subregion.ll
M polly/test/CodeGen/invariant_load_loop_ub.ll
M polly/test/CodeGen/invariant_load_not_executed_but_in_parameters.ll
M polly/test/CodeGen/invariant_load_outermost.ll
M polly/test/CodeGen/invariant_load_parameters_cyclic_dependence.ll
M polly/test/CodeGen/invariant_load_ptr_ptr_noalias.ll
M polly/test/CodeGen/invariant_load_scalar_dep.ll
M polly/test/CodeGen/invariant_load_scalar_escape_alloca_sharing.ll
M polly/test/CodeGen/invariant_loads_from_struct_with_different_types_1.ll
M polly/test/CodeGen/invariant_loads_from_struct_with_different_types_2.ll
M polly/test/CodeGen/invariant_loads_ignore_parameter_bounds.ll
M polly/test/CodeGen/invariant_verify_function_failed.ll
M polly/test/CodeGen/invariant_verify_function_failed_2.ll
M polly/test/CodeGen/issue190459_1.ll
M polly/test/CodeGen/issue190459_2.ll
M polly/test/CodeGen/issue192208.ll
M polly/test/CodeGen/issue56692.ll
M polly/test/CodeGen/load_subset_with_context.ll
M polly/test/CodeGen/loop_with_condition.ll
M polly/test/CodeGen/loop_with_condition_2.ll
M polly/test/CodeGen/loop_with_condition_ineq.ll
M polly/test/CodeGen/loop_with_condition_nested.ll
M polly/test/CodeGen/multiple-scops-in-a-row-disappearing.ll
M polly/test/CodeGen/multiple-types-invariant-load-2.ll
M polly/test/CodeGen/multiple-types-invariant-load.ll
M polly/test/CodeGen/multiple_sai_fro_same_base_address.ll
M polly/test/CodeGen/no-overflow-tracking.ll
M polly/test/CodeGen/non-affine-region-phi-references-in-scop-value.ll
M polly/test/CodeGen/non-affine-synthesized-in-branch.ll
M polly/test/CodeGen/non_affine_float_compare.ll
M polly/test/CodeGen/openmp_limit_threads.ll
M polly/test/CodeGen/param_div_div_div_2.ll
M polly/test/CodeGen/partial_write_array.ll
M polly/test/CodeGen/partial_write_emptyset.ll
M polly/test/CodeGen/partial_write_impossible_restriction.ll
M polly/test/CodeGen/partial_write_in_region.ll
M polly/test/CodeGen/partial_write_in_region_with_loop.ll
M polly/test/CodeGen/partial_write_mapped_scalar.ll
M polly/test/CodeGen/partial_write_mapped_scalar_subregion.ll
M polly/test/CodeGen/perf_monitoring.ll
M polly/test/CodeGen/perf_monitoring_cycles_per_scop.ll
M polly/test/CodeGen/perf_monitoring_trip_counts_per_scop.ll
M polly/test/CodeGen/phi_conditional_simple_1.ll
M polly/test/CodeGen/phi_loop_carried_float_escape.ll
M polly/test/CodeGen/pointer-type-expressions-2.ll
M polly/test/CodeGen/pointer-type-expressions.ll
M polly/test/CodeGen/pointer-type-pointer-type-comparison.ll
M polly/test/CodeGen/pointer_rem.ll
M polly/test/CodeGen/read-only-scalars.ll
M polly/test/CodeGen/reduction_2.ll
M polly/test/CodeGen/reduction_simple_binary.ll
M polly/test/CodeGen/reggen_domtree_crash.ll
M polly/test/CodeGen/region_multiexit_partialwrite.ll
M polly/test/CodeGen/run-time-condition-with-scev-parameters.ll
M polly/test/CodeGen/scev.ll
M polly/test/CodeGen/scev_expansion_in_nonaffine.ll
M polly/test/CodeGen/scop_expander_insert_point.ll
M polly/test/CodeGen/sequential_loops.ll
M polly/test/CodeGen/simple_nonaffine_loop.ll
M polly/test/CodeGen/single_do_loop_int_max_iterations.ll
M polly/test/CodeGen/single_do_loop_int_param_iterations.ll
M polly/test/CodeGen/single_do_loop_ll_max_iterations.ll
M polly/test/CodeGen/single_do_loop_one_iteration.ll
M polly/test/CodeGen/single_do_loop_scev_replace.ll
M polly/test/CodeGen/single_loop.ll
M polly/test/CodeGen/single_loop_int_max_iterations.ll
M polly/test/CodeGen/single_loop_ll_max_iterations.ll
M polly/test/CodeGen/single_loop_one_iteration.ll
M polly/test/CodeGen/single_loop_param.ll
M polly/test/CodeGen/single_loop_param_less_equal.ll
M polly/test/CodeGen/single_loop_param_less_than.ll
M polly/test/CodeGen/single_loop_zero_iterations.ll
M polly/test/CodeGen/split_edge_of_exit.ll
M polly/test/CodeGen/stack-overflow-in-load-hoisting.ll
M polly/test/CodeGen/test.ll
M polly/test/CodeGen/two-scops-in-row.ll
M polly/test/CodeGen/unpredictable-loop-unsynthesizable.ll
M polly/test/DeLICM/confused_order.ll
M polly/test/DeLICM/contradicting_assumed_context_and_domain.ll
M polly/test/DeLICM/load-in-cond-inf-loop.ll
M polly/test/DeLICM/map_memset_zero.ll
M polly/test/DeLICM/nomap_alreadymapped.ll
M polly/test/DeLICM/nomap_escaping.ll
M polly/test/DeLICM/nomap_occupied.ll
M polly/test/DeLICM/nomap_readonly.ll
M polly/test/DeLICM/nomap_spuriouswrite.ll
M polly/test/DeLICM/nomap_storagesize.ll
M polly/test/DeLICM/nomap_writewrite.ll
M polly/test/DeLICM/outofquota-greedycollapse.ll
M polly/test/DeLICM/outofquota-reverseDomain.ll
M polly/test/DeLICM/pass_existence.ll
M polly/test/DeLICM/pr41656.ll
M polly/test/DeLICM/pr48783.ll
M polly/test/DeLICM/reduction.ll
M polly/test/DeLICM/reduction_constant_selfconflict.ll
M polly/test/DeLICM/reduction_looprotate.ll
M polly/test/DeLICM/reduction_looprotate_alwaystaken.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre_cond1.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre_cond2.ll
M polly/test/DeLICM/reduction_looprotate_gvnpre_nopreheader.ll
M polly/test/DeLICM/reduction_looprotate_hoisted.ll
M polly/test/DeLICM/reduction_looprotate_licm.ll
M polly/test/DeLICM/reduction_looprotate_licm2.ll
M polly/test/DeLICM/reduction_looprotate_licm_double_write.ll
M polly/test/DeLICM/reduction_looprotate_licm_nopreheader.ll
M polly/test/DeLICM/reduction_looprotate_load.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_gvnpre.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_licm1.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_licm2.ll
M polly/test/DeLICM/reduction_looprotate_loopguard_licm3.ll
M polly/test/DeLICM/reduction_looprotate_readonly.ll
M polly/test/DeLICM/reduction_looprotate_synthesizable.ll
M polly/test/DeLICM/reduction_looprotate_undef.ll
M polly/test/DeLICM/reduction_overapproximate.ll
M polly/test/DeLICM/reduction_preheader.ll
M polly/test/DeLICM/reduction_unrelatedunusual.ll
M polly/test/DeLICM/reject_loadafterstore.ll
M polly/test/DeLICM/reject_outofquota.ll
M polly/test/DeLICM/reject_storeafterstore.ll
M polly/test/DeLICM/reject_storeinsubregion.ll
M polly/test/DeLICM/reject_unusualstore.ll
M polly/test/DeLICM/skip_maywrite.ll
M polly/test/DeLICM/skip_notinloop.ll
M polly/test/DeLICM/skip_scalaraccess.ll
M polly/test/DeadCodeElimination/chained_iterations.ll
M polly/test/DeadCodeElimination/chained_iterations_2.ll
M polly/test/DeadCodeElimination/computeout.ll
M polly/test/DeadCodeElimination/dead_iteration_elimination.ll
M polly/test/DeadCodeElimination/non-affine-affine-mix.ll
M polly/test/DeadCodeElimination/non-affine.ll
M polly/test/DeadCodeElimination/null_schedule.ll
M polly/test/DependenceInfo/computeout.ll
M polly/test/DependenceInfo/different_schedule_dimensions.ll
M polly/test/DependenceInfo/do_pluto_matmult.ll
M polly/test/DependenceInfo/fine_grain_dep_0.ll
M polly/test/DependenceInfo/generate_may_write_dependence_info.ll
M polly/test/DependenceInfo/infeasible_context.ll
M polly/test/DependenceInfo/may_writes_do_not_block_must_writes_for_war.ll
M polly/test/DependenceInfo/nonaffine-condition-buildMemoryAccess.ll
M polly/test/DependenceInfo/reduction_complex_location.ll
M polly/test/DependenceInfo/reduction_dependences_equal_non_reduction_dependences.ll
M polly/test/DependenceInfo/reduction_dependences_not_null.ll
M polly/test/DependenceInfo/reduction_indirect_access.ll
M polly/test/DependenceInfo/reduction_mixed_reduction_and_non_reduction_dependences.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum_2.ll
M polly/test/DependenceInfo/reduction_multiple_loops_array_sum_3.ll
M polly/test/DependenceInfo/reduction_multiple_reductions.ll
M polly/test/DependenceInfo/reduction_multiple_reductions_2.ll
M polly/test/DependenceInfo/reduction_only_reduction_like_access.ll
M polly/test/DependenceInfo/reduction_partially_escaping_intermediate_in_other_stmt.ll
M polly/test/DependenceInfo/reduction_privatization_deps.ll
M polly/test/DependenceInfo/reduction_privatization_deps_2.ll
M polly/test/DependenceInfo/reduction_privatization_deps_3.ll
M polly/test/DependenceInfo/reduction_privatization_deps_4.ll
M polly/test/DependenceInfo/reduction_privatization_deps_5.ll
M polly/test/DependenceInfo/reduction_sequence.ll
M polly/test/DependenceInfo/reduction_simple_iv.ll
M polly/test/DependenceInfo/reduction_simple_iv_debug_wrapped_dependences.ll
M polly/test/DependenceInfo/reduction_simple_privatization_deps_2.ll
M polly/test/DependenceInfo/reduction_simple_privatization_deps_w_parameter.ll
M polly/test/DependenceInfo/reduction_two_reductions_different_rloops.ll
M polly/test/DependenceInfo/sequential_loops.ll
M polly/test/FlattenSchedule/gemm.ll
M polly/test/ForwardOpTree/atax.ll
M polly/test/ForwardOpTree/changed-kind.ll
M polly/test/ForwardOpTree/forward_from_region.ll
M polly/test/ForwardOpTree/forward_hoisted.ll
M polly/test/ForwardOpTree/forward_instruction.ll
M polly/test/ForwardOpTree/forward_into_region.ll
M polly/test/ForwardOpTree/forward_into_region_redundant_use.ll
M polly/test/ForwardOpTree/forward_load.ll
M polly/test/ForwardOpTree/forward_load_differentarray.ll
M polly/test/ForwardOpTree/forward_load_double_write.ll
M polly/test/ForwardOpTree/forward_load_fromloop.ll
M polly/test/ForwardOpTree/forward_load_indirect.ll
M polly/test/ForwardOpTree/forward_load_memset_after.ll
M polly/test/ForwardOpTree/forward_load_memset_before.ll
M polly/test/ForwardOpTree/forward_load_tripleuse.ll
M polly/test/ForwardOpTree/forward_load_unrelatedunusual.ll
M polly/test/ForwardOpTree/forward_phi_load.ll
M polly/test/ForwardOpTree/forward_readonly.ll
M polly/test/ForwardOpTree/forward_reusue.ll
M polly/test/ForwardOpTree/forward_store.ll
M polly/test/ForwardOpTree/forward_synthesizable_definloop.ll
M polly/test/ForwardOpTree/forward_synthesizable_indvar.ll
M polly/test/ForwardOpTree/forward_synthesizable_useinloop.ll
M polly/test/ForwardOpTree/forward_transitive.ll
M polly/test/ForwardOpTree/jacobi-1d.ll
M polly/test/ForwardOpTree/noforward_from_region.ll
M polly/test/ForwardOpTree/noforward_load_conditional.ll
M polly/test/ForwardOpTree/noforward_load_writebetween.ll
M polly/test/ForwardOpTree/noforward_outofquota.ll
M polly/test/ForwardOpTree/noforward_partial.ll
M polly/test/ForwardOpTree/noforward_phi.ll
M polly/test/ForwardOpTree/noforward_selfrefphi.ll
M polly/test/ForwardOpTree/noforward_sideffects.ll
M polly/test/ForwardOpTree/noforward_synthesizable_unknownit.ll
M polly/test/ForwardOpTree/out-of-quota1.ll
M polly/test/IstAstInfo/AstGenComputeOut.ll
M polly/test/IstAstInfo/OpenMP/multiple_loops_outer_parallel.ll
M polly/test/IstAstInfo/OpenMP/nested_loop_both_parallel.ll
M polly/test/IstAstInfo/OpenMP/nested_loop_both_parallel_parametric.ll
M polly/test/IstAstInfo/OpenMP/nested_loop_inner_parallel.ll
M polly/test/IstAstInfo/OpenMP/nested_loop_outer_parallel.ll
M polly/test/IstAstInfo/OpenMP/single_loop_param_non_parallel.ll
M polly/test/IstAstInfo/OpenMP/single_loop_param_parallel.ll
M polly/test/IstAstInfo/OpenMP/single_loop_param_parallel_computeout.ll
M polly/test/IstAstInfo/alias_checks_with_empty_context.ll
M polly/test/IstAstInfo/alias_simple_1.ll
M polly/test/IstAstInfo/alias_simple_2.ll
M polly/test/IstAstInfo/alias_simple_3.ll
M polly/test/IstAstInfo/aliasing_arrays_with_identical_base.ll
M polly/test/IstAstInfo/aliasing_multiple_alias_groups.ll
M polly/test/IstAstInfo/aliasing_parametric_simple_1.ll
M polly/test/IstAstInfo/aliasing_parametric_simple_2.ll
M polly/test/IstAstInfo/dependence_distance_constant.ll
M polly/test/IstAstInfo/dependence_distance_minimal.ll
M polly/test/IstAstInfo/dependence_distance_multiple_constant.ll
M polly/test/IstAstInfo/dependence_distance_parametric.ll
M polly/test/IstAstInfo/dependence_distance_parametric_expr.ll
M polly/test/IstAstInfo/dependence_distance_varying.ll
M polly/test/IstAstInfo/dependence_distance_varying_in_outer_loop.ll
M polly/test/IstAstInfo/dependence_distance_varying_multiple.ll
M polly/test/IstAstInfo/domain_bounded_only_with_context.ll
M polly/test/IstAstInfo/non_affine_access.ll
M polly/test/IstAstInfo/reduction_clauses_multidimensional_access.ll
M polly/test/IstAstInfo/reduction_clauses_onedimensional_access.ll
M polly/test/IstAstInfo/reduction_dependences_equal_non_reduction_dependences.ll
M polly/test/IstAstInfo/reduction_different_reduction_clauses.ll
M polly/test/IstAstInfo/reduction_in_one_dimension.ll
M polly/test/IstAstInfo/reduction_loop_reversal.ll
M polly/test/IstAstInfo/reduction_modulo_and_loop_reversal_schedule.ll
M polly/test/IstAstInfo/reduction_modulo_and_loop_reversal_schedule_2.ll
M polly/test/IstAstInfo/reduction_modulo_schedule.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_2.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_3.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_4.ll
M polly/test/IstAstInfo/reduction_modulo_schedule_multiple_dimensions_5.ll
M polly/test/IstAstInfo/reduction_multiple_dimensions.ll
M polly/test/IstAstInfo/reduction_multiple_dimensions_2.ll
M polly/test/IstAstInfo/reduction_multiple_dimensions_3.ll
M polly/test/IstAstInfo/reduction_multiple_dimensions_4.ll
M polly/test/IstAstInfo/run-time-condition.ll
M polly/test/IstAstInfo/runtime_context_with_error_blocks.ll
M polly/test/IstAstInfo/simple-run-time-condition.ll
M polly/test/IstAstInfo/single_loop_strip_mine.ll
M polly/test/IstAstInfo/single_loop_uint_max_iterations.ll
M polly/test/IstAstInfo/single_loop_ull_max_iterations.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Bad-relation.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-No-accesses-key.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Not-enough-MemAcc.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Not-enough-statements.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Relation-mispelled.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Statements-mispelled.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Undeclared-ScopArrayInfo.ll
M polly/test/JSONExporter/ImportAccesses/ImportAccesses-Wrong-number-dimensions.ll
M polly/test/JSONExporter/ImportAccesses/change-array-dims.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-Mispelled-type.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-Negative-size.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-name.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-sizes-key.ll
M polly/test/JSONExporter/ImportArrays/ImportArrays-No-type-key.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Context-mispelled.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Not-parameter-set.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Unvalid-Context.ll
M polly/test/JSONExporter/ImportContext/ImportContext-Wrong-dimension.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-No-schedule-key.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Schedule-not-valid.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Statements-mispelled.ll
M polly/test/JSONExporter/ImportSchedule/ImportSchedule-Wrong-number-statements.ll
M polly/test/MaximalStaticExpansion/load_after_store_same_statement.ll
M polly/test/MaximalStaticExpansion/read_from_original.ll
M polly/test/MaximalStaticExpansion/too_many_writes.ll
M polly/test/MaximalStaticExpansion/working_deps_between_inners.ll
M polly/test/MaximalStaticExpansion/working_deps_between_inners_phi.ll
M polly/test/MaximalStaticExpansion/working_expansion.ll
M polly/test/MaximalStaticExpansion/working_expansion_multiple_dependences_per_statement.ll
M polly/test/MaximalStaticExpansion/working_expansion_multiple_instruction_per_statement.ll
M polly/test/MaximalStaticExpansion/working_phi_expansion.ll
M polly/test/MaximalStaticExpansion/working_phi_two_scalars.ll
M polly/test/MaximalStaticExpansion/working_value_expansion.ll
M polly/test/PruneUnprofitable/prune_only_scalardeps.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-double.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-except-first.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-except-third.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner-carried.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner-third.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-inner.ll
M polly/test/ScheduleOptimizer/GreedyFuse/fuse-simple.ll
M polly/test/ScheduleOptimizer/GreedyFuse/nofuse-simple.ll
M polly/test/ScheduleOptimizer/GreedyFuse/nofuse-with-middle.ll
M polly/test/ScheduleOptimizer/ManualOptimization/disable_nonforced.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_heuristic.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_looploc.ll
M polly/test/ScheduleOptimizer/ManualOptimization/distribute_illegal_pragmaloc.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_disable.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_double.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_full.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_heuristic.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_partial.ll
M polly/test/ScheduleOptimizer/ManualOptimization/unroll_partial_followup.ll
M polly/test/ScheduleOptimizer/SIMDInParallelFor.ll
M polly/test/ScheduleOptimizer/computeout.ll
M polly/test/ScheduleOptimizer/ensure-correct-tile-sizes.ll
M polly/test/ScheduleOptimizer/focaltech_test_detail_threshold-7bc17e.ll
M polly/test/ScheduleOptimizer/full_partial_tile_separation.ll
M polly/test/ScheduleOptimizer/line-tiling-2.ll
M polly/test/ScheduleOptimizer/line-tiling.ll
M polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout.ll
M polly/test/ScheduleOptimizer/mat_mul_pattern_data_layout_2.ll
M polly/test/ScheduleOptimizer/one-dimensional-band.ll
M polly/test/ScheduleOptimizer/outer_coincidence.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts-after-delicm_2.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_11.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_12.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_13.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_14.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_15.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_16.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_17.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_18.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_19.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_2.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_20.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_21.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_22.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_24.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_25.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_3.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_4.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_5.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_6.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_7.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_8.ll
M polly/test/ScheduleOptimizer/pattern-matching-based-opts_9.ll
M polly/test/ScheduleOptimizer/pattern_matching_based_opts_splitmap.ll
M polly/test/ScheduleOptimizer/prevectorization-without-tiling.ll
M polly/test/ScheduleOptimizer/prevectorization.ll
M polly/test/ScheduleOptimizer/prevectorization_islbound.ll
M polly/test/ScheduleOptimizer/rectangular-tiling.ll
M polly/test/ScheduleOptimizer/schedule_computeout.ll
M polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
M polly/test/ScheduleOptimizer/tile_after_fusion.ll
M polly/test/ScheduleOptimizer/vivid-vbi-gen-vivid_vbi_gen_sliced-before-llvmreduced.ll
M polly/test/ScopDetect/aliasing_parametric_simple_1.ll
M polly/test/ScopDetect/aliasing_parametric_simple_2.ll
M polly/test/ScopDetect/aliasing_simple_1.ll
M polly/test/ScopDetect/aliasing_simple_2.ll
M polly/test/ScopDetect/base_pointer.ll
M polly/test/ScopDetect/base_pointer_load_setNewAccessRelation.ll
M polly/test/ScopDetect/base_pointer_setNewAccessRelation.ll
M polly/test/ScopDetect/callbr.ll
M polly/test/ScopDetect/collective_invariant_loads.ll
M polly/test/ScopDetect/cross_loop_non_single_exit.ll
M polly/test/ScopDetect/cross_loop_non_single_exit_2.ll
M polly/test/ScopDetect/dependency_to_phi_node_outside_of_region.ll
M polly/test/ScopDetect/detect-full-functions.ll
M polly/test/ScopDetect/dom-tree-crash.ll
M polly/test/ScopDetect/dot-scops-npm.ll
M polly/test/ScopDetect/dot-scops.ll
M polly/test/ScopDetect/error-block-always-executed.ll
M polly/test/ScopDetect/error-block-referenced-from-scop.ll
M polly/test/ScopDetect/error-block-unreachable.ll
M polly/test/ScopDetect/expand-region-correctly-2.ll
M polly/test/ScopDetect/expand-region-correctly.ll
M polly/test/ScopDetect/ignore_func_flag_regex.ll
M polly/test/ScopDetect/index_from_unpredictable_loop.ll
M polly/test/ScopDetect/index_from_unpredictable_loop2.ll
M polly/test/ScopDetect/indvars.ll
M polly/test/ScopDetect/intrinsics_1.ll
M polly/test/ScopDetect/intrinsics_2.ll
M polly/test/ScopDetect/intrinsics_3.ll
M polly/test/ScopDetect/invalid-latch-conditions.ll
M polly/test/ScopDetect/invalidate_scalar_evolution.ll
M polly/test/ScopDetect/invariant-load-before-scop.ll
M polly/test/ScopDetect/keep_going_expansion.ll
M polly/test/ScopDetect/mod_ref_read_pointer.ll
M polly/test/ScopDetect/more-than-one-loop.ll
M polly/test/ScopDetect/multidim-with-undef-size.ll
M polly/test/ScopDetect/multidim.ll
M polly/test/ScopDetect/multidim_indirect_access.ll
M polly/test/ScopDetect/multidim_two_accesses_different_delinearization.ll
M polly/test/ScopDetect/nested_loop_single_exit.ll
M polly/test/ScopDetect/non-affine-conditional.ll
M polly/test/ScopDetect/non-affine-float-compare.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopDetect/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopDetect/non-affine-loop.ll
M polly/test/ScopDetect/non-beneficial-loops-small-trip-count.ll
M polly/test/ScopDetect/non-constant-add-rec-start-expr.ll
M polly/test/ScopDetect/non-simple-memory-accesses.ll
M polly/test/ScopDetect/non_affine_loop_condition.ll
M polly/test/ScopDetect/only-one-affine-loop.ll
M polly/test/ScopDetect/only_func_flag.ll
M polly/test/ScopDetect/only_func_flag_regex.ll
M polly/test/ScopDetect/parametric-multiply-in-scev-2.ll
M polly/test/ScopDetect/parametric-multiply-in-scev.ll
M polly/test/ScopDetect/phi_with_multi_exiting_edges.ll
M polly/test/ScopDetect/profitability-large-basic-blocks.ll
M polly/test/ScopDetect/profitability-two-nested-loops.ll
M polly/test/ScopDetect/remove_all_children.ll
M polly/test/ScopDetect/report-scop-location.ll
M polly/test/ScopDetect/restrict-undef-size-scopdetect.ll
M polly/test/ScopDetect/run_time_alias_check.ll
M polly/test/ScopDetect/scev_remove_max.ll
M polly/test/ScopDetect/sequential_loops.ll
M polly/test/ScopDetect/simple_loop.ll
M polly/test/ScopDetect/simple_loop_non_single_entry.ll
M polly/test/ScopDetect/simple_loop_non_single_exit.ll
M polly/test/ScopDetect/simple_loop_non_single_exit_2.ll
M polly/test/ScopDetect/simple_loop_two_phi_nodes.ll
M polly/test/ScopDetect/simple_loop_with_param.ll
M polly/test/ScopDetect/simple_loop_with_param_2.ll
M polly/test/ScopDetect/simple_non_single_entry.ll
M polly/test/ScopDetect/skip_function_attribute.ll
M polly/test/ScopDetect/srem_with_parametric_divisor.ll
M polly/test/ScopDetect/statistics.ll
M polly/test/ScopDetect/switch-in-loop-patch.ll
M polly/test/ScopDetect/tlr_is_hoistable_load.ll
M polly/test/ScopDetectionDiagnostics/ReportAlias-01.ll
M polly/test/ScopDetectionDiagnostics/ReportEntry.ll
M polly/test/ScopDetectionDiagnostics/ReportFuncCall-01.ll
M polly/test/ScopDetectionDiagnostics/ReportIrreducibleRegion.ll
M polly/test/ScopDetectionDiagnostics/ReportIrreducibleRegionWithoutDebugLoc.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopBound-01.ll
M polly/test/ScopDetectionDiagnostics/ReportLoopHasNoExit.ll
M polly/test/ScopDetectionDiagnostics/ReportMultipleNonAffineAccesses.ll
M polly/test/ScopDetectionDiagnostics/ReportNonAffineAccess-01.ll
M polly/test/ScopDetectionDiagnostics/ReportUnprofitable.ll
M polly/test/ScopDetectionDiagnostics/ReportUnreachableInExit.ll
M polly/test/ScopDetectionDiagnostics/ReportVariantBasePtr-01.ll
M polly/test/ScopDetectionDiagnostics/loop_has_multiple_exits.ll
M polly/test/ScopDetectionDiagnostics/loop_partially_in_scop-2.ll
M polly/test/ScopDetectionDiagnostics/loop_partially_in_scop.ll
M polly/test/ScopInfo/20110312-Fail-without-basicaa.ll
M polly/test/ScopInfo/20111108-Parameter-not-detected.ll
M polly/test/ScopInfo/2012-03-16-Crash-because-of-unsigned-in-scev.ll
M polly/test/ScopInfo/2015-10-04-Crash-in-domain-generation.ll
M polly/test/ScopInfo/Alias-0.ll
M polly/test/ScopInfo/Alias-1.ll
M polly/test/ScopInfo/Alias-2.ll
M polly/test/ScopInfo/Alias-3.ll
M polly/test/ScopInfo/Alias-4.ll
M polly/test/ScopInfo/BoundChecks/single-loop.ll
M polly/test/ScopInfo/BoundChecks/two-loops.ll
M polly/test/ScopInfo/NonAffine/div_backedge.ll
M polly/test/ScopInfo/NonAffine/div_domain.ll
M polly/test/ScopInfo/NonAffine/invariant_loads_dependent_in_non_affine_region.ll
M polly/test/ScopInfo/NonAffine/modulo_backedge.ll
M polly/test/ScopInfo/NonAffine/modulo_domain.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_1.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
M polly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
M polly/test/ScopInfo/NonAffine/non_affine_access_with_range_2.ll
M polly/test/ScopInfo/NonAffine/non_affine_but_sdiv.ll
M polly/test/ScopInfo/NonAffine/non_affine_but_srem.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_nested.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_affine_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_float_compare.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_condition.ll
M polly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
M polly/test/ScopInfo/NonAffine/non_affine_parametric_loop.ll
M polly/test/ScopInfo/NonAffine/non_affine_region_guaranteed_non-entry.ll
M polly/test/ScopInfo/NonAffine/whole-scop-non-affine-subregion-in-loop.ll
M polly/test/ScopInfo/aliasing_conditional_alias_groups_1.ll
M polly/test/ScopInfo/aliasing_conditional_alias_groups_2.ll
M polly/test/ScopInfo/aliasing_dead_access.ll
M polly/test/ScopInfo/aliasing_many_arrays_to_compare.ll
M polly/test/ScopInfo/aliasing_many_parameters_not_all_involved.ll
M polly/test/ScopInfo/aliasing_many_read_only_acesses.ll
M polly/test/ScopInfo/aliasing_multiple_alias_groups.ll
M polly/test/ScopInfo/aliasing_with_non_affine_access.ll
M polly/test/ScopInfo/allow-all-parameters-dereferencable.ll
M polly/test/ScopInfo/assume_gep_bounds.ll
M polly/test/ScopInfo/assume_gep_bounds_2.ll
M polly/test/ScopInfo/assume_gep_bounds_many.ll
M polly/test/ScopInfo/avoid_new_parameters_from_geps.ll
M polly/test/ScopInfo/bool-addrec.ll
M polly/test/ScopInfo/bounded_loop_assumptions.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations-2.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations-3.ll
M polly/test/ScopInfo/branch-references-loop-scev-with-unknown-iterations.ll
M polly/test/ScopInfo/bug_2010_10_22.ll
M polly/test/ScopInfo/bug_2011_1_5.ll
M polly/test/ScopInfo/bug_scev_not_fully_eval.ll
M polly/test/ScopInfo/cfg_consequences.ll
M polly/test/ScopInfo/complex-branch-structure.ll
M polly/test/ScopInfo/complex-condition.ll
M polly/test/ScopInfo/complex-expression.ll
M polly/test/ScopInfo/complex-loop-nesting.ll
M polly/test/ScopInfo/complex-successor-structure-2.ll
M polly/test/ScopInfo/complex-successor-structure-3.ll
M polly/test/ScopInfo/complex-successor-structure.ll
M polly/test/ScopInfo/complex_domain_binary_condition.ll
M polly/test/ScopInfo/complex_execution_context.ll
M polly/test/ScopInfo/cond_constant_in_loop.ll
M polly/test/ScopInfo/cond_in_loop.ll
M polly/test/ScopInfo/condition-after-error-block-2.ll
M polly/test/ScopInfo/condtion-after-error-block.ll
M polly/test/ScopInfo/const_srem_sdiv.ll
M polly/test/ScopInfo/constant-non-integer-branch-condition.ll
M polly/test/ScopInfo/constant_factor_in_parameter.ll
M polly/test/ScopInfo/constant_functions_outside_scop_as_unknown.ll
M polly/test/ScopInfo/constant_start_integer.ll
M polly/test/ScopInfo/debug_call.ll
M polly/test/ScopInfo/delinearize-together-all-data-refs.ll
M polly/test/ScopInfo/div_by_zero.ll
M polly/test/ScopInfo/do-not-model-error-block-accesses.ll
M polly/test/ScopInfo/eager-binary-and-or-conditions.ll
M polly/test/ScopInfo/early_exit_for_complex_domains.ll
M polly/test/ScopInfo/error-blocks-1.ll
M polly/test/ScopInfo/error-blocks-2.ll
M polly/test/ScopInfo/error-blocks-3.ll
M polly/test/ScopInfo/escaping_empty_scop.ll
M polly/test/ScopInfo/exit-phi-1.ll
M polly/test/ScopInfo/exit-phi-2.ll
M polly/test/ScopInfo/exit_phi_accesses-2.ll
M polly/test/ScopInfo/exit_phi_accesses.ll
M polly/test/ScopInfo/expensive-boundary-context.ll
M polly/test/ScopInfo/extract_constant_factor_introduces_new_parameter.ll
M polly/test/ScopInfo/full-function.ll
M polly/test/ScopInfo/granularity_same_name.ll
M polly/test/ScopInfo/granularity_scalar-indep.ll
M polly/test/ScopInfo/granularity_scalar-indep_cross-referencing-phi1.ll
M polly/test/ScopInfo/granularity_scalar-indep_cross-referencing-phi2.ll
M polly/test/ScopInfo/granularity_scalar-indep_epilogue.ll
M polly/test/ScopInfo/granularity_scalar-indep_epilogue_last.ll
M polly/test/ScopInfo/granularity_scalar-indep_noepilogue.ll
M polly/test/ScopInfo/granularity_scalar-indep_ordered-2.ll
M polly/test/ScopInfo/granularity_scalar-indep_ordered.ll
M polly/test/ScopInfo/i1_params.ll
M polly/test/ScopInfo/infeasible-rtc.ll
M polly/test/ScopInfo/infeasible_invalid_context.ll
M polly/test/ScopInfo/int2ptr_ptr2int.ll
M polly/test/ScopInfo/int2ptr_ptr2int_2.ll
M polly/test/ScopInfo/integers.ll
M polly/test/ScopInfo/inter-error-bb-dependence.ll
M polly/test/ScopInfo/inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra-non-affine-stmt-phi-node.ll
M polly/test/ScopInfo/intra_and_inter_bb_scalar_dep.ll
M polly/test/ScopInfo/intra_bb_scalar_dep.ll
M polly/test/ScopInfo/intrinsics.ll
M polly/test/ScopInfo/invalid_add_rec_after_invariant_load_remapping.ll
M polly/test/ScopInfo/invalidate_iterator_during_MA_removal.ll
M polly/test/ScopInfo/invariant-load-instlist.ll
M polly/test/ScopInfo/invariant-loads-leave-read-only-statements.ll
M polly/test/ScopInfo/invariant_load.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_same_pointer_escaping.ll
M polly/test/ScopInfo/invariant_load_addrec_sum.ll
M polly/test/ScopInfo/invariant_load_base_pointer.ll
M polly/test/ScopInfo/invariant_load_base_pointer_conditional.ll
M polly/test/ScopInfo/invariant_load_base_pointer_in_conditional.ll
M polly/test/ScopInfo/invariant_load_branch_condition.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_2.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_3.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4b.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_4c.ll
M polly/test/ScopInfo/invariant_load_canonicalize_array_baseptrs_5.ll
M polly/test/ScopInfo/invariant_load_complex_condition.ll
M polly/test/ScopInfo/invariant_load_condition.ll
M polly/test/ScopInfo/invariant_load_dereferenceable.ll
M polly/test/ScopInfo/invariant_load_distinct_parameter_valuations.ll
M polly/test/ScopInfo/invariant_load_in_non_affine.ll
M polly/test/ScopInfo/invariant_load_loop_ub.ll
M polly/test/ScopInfo/invariant_load_ptr_ptr_noalias.ll
M polly/test/ScopInfo/invariant_load_scalar_dep.ll
M polly/test/ScopInfo/invariant_load_stmt_domain.ll
M polly/test/ScopInfo/invariant_load_zext_parameter-2.ll
M polly/test/ScopInfo/invariant_load_zext_parameter.ll
M polly/test/ScopInfo/invariant_load_zextended_in_own_execution_context.ll
M polly/test/ScopInfo/invariant_loads_complicated_dependences.ll
M polly/test/ScopInfo/invariant_loads_cyclic_dependences.ll
M polly/test/ScopInfo/invariant_loop_bounds.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-1.ll
M polly/test/ScopInfo/invariant_same_loop_bound_multiple_times-2.ll
M polly/test/ScopInfo/isl_aff_out_of_bounds.ll
M polly/test/ScopInfo/isl_trip_count_01.ll
M polly/test/ScopInfo/isl_trip_count_02.ll
M polly/test/ScopInfo/isl_trip_count_03.ll
M polly/test/ScopInfo/isl_trip_count_multiple_exiting_blocks.ll
M polly/test/ScopInfo/issue187922.ll
M polly/test/ScopInfo/issue190128.ll
M polly/test/ScopInfo/licm_load.ll
M polly/test/ScopInfo/licm_potential_store.ll
M polly/test/ScopInfo/licm_potential_store_mssa.ll
M polly/test/ScopInfo/licm_reduction_nested.ll
M polly/test/ScopInfo/long-compile-time-alias-analysis.ll
M polly/test/ScopInfo/long-sequence-of-error-blocks-2.ll
M polly/test/ScopInfo/long-sequence-of-error-blocks.ll
M polly/test/ScopInfo/loop-multiexit-succ-cond.ll
M polly/test/ScopInfo/loop_affine_bound_0.ll
M polly/test/ScopInfo/loop_affine_bound_1.ll
M polly/test/ScopInfo/loop_affine_bound_2.ll
M polly/test/ScopInfo/loop_carry.ll
M polly/test/ScopInfo/many-scalar-dependences.ll
M polly/test/ScopInfo/max-loop-depth.ll
M polly/test/ScopInfo/memcpy-raw-source.ll
M polly/test/ScopInfo/memcpy.ll
M polly/test/ScopInfo/memmove.ll
M polly/test/ScopInfo/memset.ll
M polly/test/ScopInfo/memset_null.ll
M polly/test/ScopInfo/mismatching-array-dimensions.ll
M polly/test/ScopInfo/mod_ref_access_pointee_arguments.ll
M polly/test/ScopInfo/mod_ref_read_pointee_arguments.ll
M polly/test/ScopInfo/mod_ref_read_pointer.ll
M polly/test/ScopInfo/mod_ref_read_pointers.ll
M polly/test/ScopInfo/modulo_zext_1.ll
M polly/test/ScopInfo/modulo_zext_2.ll
M polly/test/ScopInfo/modulo_zext_3.ll
M polly/test/ScopInfo/multi-scop.ll
M polly/test/ScopInfo/multidim-shrunk-element-type.ll
M polly/test/ScopInfo/multidim_2d-diagonal-matrix.ll
M polly/test/ScopInfo/multidim_2d_outer_parametric_offset.ll
M polly/test/ScopInfo/multidim_2d_parametric_array_static_loop_bounds.ll
M polly/test/ScopInfo/multidim_2d_with_modref_call.ll
M polly/test/ScopInfo/multidim_2d_with_modref_call_2.ll
M polly/test/ScopInfo/multidim_3d_parametric_array_static_loop_bounds.ll
M polly/test/ScopInfo/multidim_fixedsize_different_dimensionality.ll
M polly/test/ScopInfo/multidim_fixedsize_multi_offset.ll
M polly/test/ScopInfo/multidim_fold_constant_dim.ll
M polly/test/ScopInfo/multidim_fold_constant_dim_zero.ll
M polly/test/ScopInfo/multidim_fortran_2d.ll
M polly/test/ScopInfo/multidim_fortran_2d_params.ll
M polly/test/ScopInfo/multidim_fortran_2d_with_modref_call.ll
M polly/test/ScopInfo/multidim_fortran_srem.ll
M polly/test/ScopInfo/multidim_gep_pointercast.ll
M polly/test/ScopInfo/multidim_gep_pointercast2.ll
M polly/test/ScopInfo/multidim_invalid_dimension.ll
M polly/test/ScopInfo/multidim_ivs_and_integer_offsets_3d.ll
M polly/test/ScopInfo/multidim_ivs_and_parameteric_offsets_3d.ll
M polly/test/ScopInfo/multidim_many_references.ll
M polly/test/ScopInfo/multidim_nested_start_integer.ll
M polly/test/ScopInfo/multidim_nested_start_share_parameter.ll
M polly/test/ScopInfo/multidim_only_ivs_2d.ll
M polly/test/ScopInfo/multidim_only_ivs_3d.ll
M polly/test/ScopInfo/multidim_only_ivs_3d_cast.ll
M polly/test/ScopInfo/multidim_only_ivs_3d_reverse.ll
M polly/test/ScopInfo/multidim_param_in_subscript-2.ll
M polly/test/ScopInfo/multidim_param_in_subscript.ll
M polly/test/ScopInfo/multidim_parameter_addrec_product.ll
M polly/test/ScopInfo/multidim_single_and_multidim_array.ll
M polly/test/ScopInfo/multidim_srem.ll
M polly/test/ScopInfo/multidim_with_bitcast.ll
M polly/test/ScopInfo/multiple-binary-or-conditions.ll
M polly/test/ScopInfo/multiple-types-access-offset-not-dividable-by-element-size.ll
M polly/test/ScopInfo/multiple-types-non-affine-2.ll
M polly/test/ScopInfo/multiple-types-non-affine.ll
M polly/test/ScopInfo/multiple-types-non-power-of-two-2.ll
M polly/test/ScopInfo/multiple-types-non-power-of-two.ll
M polly/test/ScopInfo/multiple-types-two-dimensional-2.ll
M polly/test/ScopInfo/multiple-types-two-dimensional.ll
M polly/test/ScopInfo/multiple-types.ll
M polly/test/ScopInfo/multiple_exiting_blocks.ll
M polly/test/ScopInfo/multiple_exiting_blocks_two_loop.ll
M polly/test/ScopInfo/multiple_latch_blocks.ll
M polly/test/ScopInfo/nested-loops.ll
M polly/test/ScopInfo/no-scalar-deps-in-non-affine-subregion.ll
M polly/test/ScopInfo/non-affine-region-phi.ll
M polly/test/ScopInfo/non-affine-region-with-loop-2.ll
M polly/test/ScopInfo/non-affine-region-with-loop.ll
M polly/test/ScopInfo/non-precise-inv-load-1.ll
M polly/test/ScopInfo/non-precise-inv-load-2.ll
M polly/test/ScopInfo/non-precise-inv-load-3.ll
M polly/test/ScopInfo/non-precise-inv-load-4.ll
M polly/test/ScopInfo/non-precise-inv-load-5.ll
M polly/test/ScopInfo/non-precise-inv-load-6.ll
M polly/test/ScopInfo/non-pure-function-call.ll
M polly/test/ScopInfo/non-pure-function-calls-causes-dead-blocks.ll
M polly/test/ScopInfo/non-pure-function-calls.ll
M polly/test/ScopInfo/non_affine_access.ll
M polly/test/ScopInfo/non_affine_region_1.ll
M polly/test/ScopInfo/non_affine_region_2.ll
M polly/test/ScopInfo/non_affine_region_3.ll
M polly/test/ScopInfo/non_affine_region_4.ll
M polly/test/ScopInfo/nonaffine-buildMemoryAccess.ll
M polly/test/ScopInfo/not-a-reduction.ll
M polly/test/ScopInfo/opaque-struct.ll
M polly/test/ScopInfo/out-of-scop-use-in-region-entry-phi-node.ll
M polly/test/ScopInfo/parameter-constant-division.ll
M polly/test/ScopInfo/parameter_in_dead_statement.ll
M polly/test/ScopInfo/parameter_product.ll
M polly/test/ScopInfo/parameter_with_constant_factor_in_add.ll
M polly/test/ScopInfo/partially_invariant_load_1.ll
M polly/test/ScopInfo/partially_invariant_load_2.ll
M polly/test/ScopInfo/phi-in-non-affine-region.ll
M polly/test/ScopInfo/phi_after_error_block.ll
M polly/test/ScopInfo/phi_condition_modeling_1.ll
M polly/test/ScopInfo/phi_condition_modeling_2.ll
M polly/test/ScopInfo/phi_conditional_simple_1.ll
M polly/test/ScopInfo/phi_loop_carried_float.ll
M polly/test/ScopInfo/phi_scalar_simple_1.ll
M polly/test/ScopInfo/phi_scalar_simple_2.ll
M polly/test/ScopInfo/phi_with_invoke_edge.ll
M polly/test/ScopInfo/pointer-comparison-no-nsw.ll
M polly/test/ScopInfo/pointer-comparison.ll
M polly/test/ScopInfo/pointer-type-expressions.ll
M polly/test/ScopInfo/pointer-used-as-base-pointer-and-scalar-read.ll
M polly/test/ScopInfo/polly-timeout-parameter-bounds.ll
M polly/test/ScopInfo/pr38218.ll
M polly/test/ScopInfo/preserve-equiv-class-order-in-basic_block.ll
M polly/test/ScopInfo/process_added_dimensions.ll
M polly/test/ScopInfo/pwaff-complexity-bailout.ll
M polly/test/ScopInfo/ranged_parameter.ll
M polly/test/ScopInfo/ranged_parameter_2.ll
M polly/test/ScopInfo/ranged_parameter_wrap.ll
M polly/test/ScopInfo/ranged_parameter_wrap_2.ll
M polly/test/ScopInfo/read-only-scalar-used-in-phi-2.ll
M polly/test/ScopInfo/read-only-scalar-used-in-phi.ll
M polly/test/ScopInfo/read-only-scalars.ll
M polly/test/ScopInfo/read-only-statements.ll
M polly/test/ScopInfo/reduction_alternating_base.ll
M polly/test/ScopInfo/reduction_chain_partially_outside_the_scop.ll
M polly/test/ScopInfo/reduction_different_index.ll
M polly/test/ScopInfo/reduction_different_index1.ll
M polly/test/ScopInfo/reduction_disabled_multiplicative.ll
M polly/test/ScopInfo/reduction_double.ll
M polly/test/ScopInfo/reduction_escaping_intermediate.ll
M polly/test/ScopInfo/reduction_escaping_intermediate_2.ll
M polly/test/ScopInfo/reduction_escaping_intermediate_3.ll
M polly/test/ScopInfo/reduction_if.ll
M polly/test/ScopInfo/reduction_indirect_access.ll
M polly/test/ScopInfo/reduction_indirect_access_2.ll
M polly/test/ScopInfo/reduction_invalid_different_operators.ll
M polly/test/ScopInfo/reduction_invalid_overlapping_accesses.ll
M polly/test/ScopInfo/reduction_long_reduction_chain.ll
M polly/test/ScopInfo/reduction_long_reduction_chain_double_use.ll
M polly/test/ScopInfo/reduction_multiple_different_operators.ll
M polly/test/ScopInfo/reduction_multiple_loops_array_sum.ll
M polly/test/ScopInfo/reduction_multiple_loops_array_sum_1.ll
M polly/test/ScopInfo/reduction_multiple_simple_binary.ll
M polly/test/ScopInfo/reduction_non_overlapping_chains.ll
M polly/test/ScopInfo/reduction_only_reduction_like_access.ll
M polly/test/ScopInfo/reduction_simple_fp.ll
M polly/test/ScopInfo/reduction_simple_w_constant.ll
M polly/test/ScopInfo/reduction_simple_w_iv.ll
M polly/test/ScopInfo/reduction_two_identical_reads.ll
M polly/test/ScopInfo/redundant_parameter_constraint.ll
M polly/test/ScopInfo/region-with-instructions.ll
M polly/test/ScopInfo/remarks.ll
M polly/test/ScopInfo/required-invariant-loop-bounds.ll
M polly/test/ScopInfo/restriction_in_dead_block.ll
M polly/test/ScopInfo/run-time-check-many-array-disjuncts.ll
M polly/test/ScopInfo/run-time-check-many-parameters.ll
M polly/test/ScopInfo/run-time-check-many-piecewise-aliasing.ll
M polly/test/ScopInfo/run-time-check-read-only-arrays.ll
M polly/test/ScopInfo/same-base-address-scalar-and-array.ll
M polly/test/ScopInfo/scalar.ll
M polly/test/ScopInfo/scalar_dependence_cond_br.ll
M polly/test/ScopInfo/scalar_to_array.ll
M polly/test/ScopInfo/scev-div-with-evaluatable-divisor.ll
M polly/test/ScopInfo/scev-invalidated.ll
M polly/test/ScopInfo/schedule-const-post-dominator-walk-2.ll
M polly/test/ScopInfo/schedule-const-post-dominator-walk.ll
M polly/test/ScopInfo/schedule-constuction-endless-loop1.ll
M polly/test/ScopInfo/schedule-constuction-endless-loop2.ll
M polly/test/ScopInfo/schedule-incorrectly-contructed-in-case-of-infinite-loop.ll
M polly/test/ScopInfo/scop-affine-parameter-ordering.ll
M polly/test/ScopInfo/sign_wrapped_set.ll
M polly/test/ScopInfo/simple_loop_1.ll
M polly/test/ScopInfo/simple_loop_2.ll
M polly/test/ScopInfo/simple_loop_unsigned.ll
M polly/test/ScopInfo/simple_loop_unsigned_2.ll
M polly/test/ScopInfo/simple_loop_unsigned_3.ll
M polly/test/ScopInfo/simple_nonaffine_loop_not.ll
M polly/test/ScopInfo/smax.ll
M polly/test/ScopInfo/statistics.ll
M polly/test/ScopInfo/stmt_split_exit_of_region_stmt.ll
M polly/test/ScopInfo/stmt_split_no_after_split.ll
M polly/test/ScopInfo/stmt_split_no_dependence.ll
M polly/test/ScopInfo/stmt_split_on_store.ll
M polly/test/ScopInfo/stmt_split_on_synthesizable.ll
M polly/test/ScopInfo/stmt_split_phi_in_beginning_bb.ll
M polly/test/ScopInfo/stmt_split_phi_in_stmt.ll
M polly/test/ScopInfo/stmt_split_scalar_dependence.ll
M polly/test/ScopInfo/stmt_split_within_loop.ll
M polly/test/ScopInfo/stmt_with_read_but_without_sideffect.ll
M polly/test/ScopInfo/switch-1.ll
M polly/test/ScopInfo/switch-2.ll
M polly/test/ScopInfo/switch-3.ll
M polly/test/ScopInfo/switch-4.ll
M polly/test/ScopInfo/switch-5.ll
M polly/test/ScopInfo/switch-6.ll
M polly/test/ScopInfo/switch-7.ll
M polly/test/ScopInfo/tempscop-printing.ll
M polly/test/ScopInfo/test-wrapping-in-condition.ll
M polly/test/ScopInfo/truncate-1.ll
M polly/test/ScopInfo/truncate-2.ll
M polly/test/ScopInfo/truncate-3.ll
M polly/test/ScopInfo/two-loops-one-infinite.ll
M polly/test/ScopInfo/two-loops-right-after-each-other.ll
M polly/test/ScopInfo/undef_in_cond.ll
M polly/test/ScopInfo/unnamed_nonaffine.ll
M polly/test/ScopInfo/unnamed_stmts.ll
M polly/test/ScopInfo/unpredictable_nonscop_loop.ll
M polly/test/ScopInfo/unprofitable_scalar-accs.ll
M polly/test/ScopInfo/unsigned-condition.ll
M polly/test/ScopInfo/unsigned-division-1.ll
M polly/test/ScopInfo/unsigned-division-2.ll
M polly/test/ScopInfo/unsigned-division-3.ll
M polly/test/ScopInfo/unsigned-division-4.ll
M polly/test/ScopInfo/unsigned-division-5.ll
M polly/test/ScopInfo/unsigned_wrap_uge.ll
M polly/test/ScopInfo/unsigned_wrap_ugt.ll
M polly/test/ScopInfo/unsigned_wrap_ule.ll
M polly/test/ScopInfo/unsigned_wrap_ult.ll
M polly/test/ScopInfo/user-assumption-cached-precondition.ll
M polly/test/ScopInfo/user_context.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-signed-conditional.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-signed.ll
M polly/test/ScopInfo/user_provided_assumptions-in-bb-unsigned.ll
M polly/test/ScopInfo/user_provided_assumptions.ll
M polly/test/ScopInfo/user_provided_assumptions_2.ll
M polly/test/ScopInfo/user_provided_assumptions_3.ll
M polly/test/ScopInfo/user_provided_non_dominating_assumptions.ll
M polly/test/ScopInfo/variant_base_pointer.ll
M polly/test/ScopInfo/variant_load_empty_domain.ll
M polly/test/ScopInfo/wraping_signed_expr_0.ll
M polly/test/ScopInfo/wraping_signed_expr_1.ll
M polly/test/ScopInfo/wraping_signed_expr_2.ll
M polly/test/ScopInfo/wraping_signed_expr_3.ll
M polly/test/ScopInfo/wraping_signed_expr_4.ll
M polly/test/ScopInfo/wraping_signed_expr_5.ll
M polly/test/ScopInfo/wraping_signed_expr_6.ll
M polly/test/ScopInfo/wraping_signed_expr_7.ll
M polly/test/ScopInfo/wraping_signed_expr_slow_1.ll
M polly/test/ScopInfo/wraping_signed_expr_slow_2.ll
M polly/test/ScopInfo/zero_ext_of_truncate.ll
M polly/test/ScopInfo/zero_ext_of_truncate_2.ll
M polly/test/ScopInfo/zero_ext_space_mismatch.ll
M polly/test/ScopInfo/zext-loop-bound-unbounded.ll
M polly/test/ScopInliner/ignore-declares.ll
M polly/test/ScopInliner/invariant-load-func.ll
M polly/test/ScopInliner/simple-inline-loop.ll
M polly/test/Simplify/coalesce_3partials.ll
M polly/test/Simplify/coalesce_disjointelements.ll
M polly/test/Simplify/coalesce_overlapping.ll
M polly/test/Simplify/coalesce_partial.ll
M polly/test/Simplify/dead_access_load.ll
M polly/test/Simplify/dead_access_phi.ll
M polly/test/Simplify/dead_access_value.ll
M polly/test/Simplify/dead_instruction.ll
M polly/test/Simplify/emptyaccessdomain.ll
M polly/test/Simplify/exit_phi_accesses-2.ll
M polly/test/Simplify/func-b320a7.ll
M polly/test/Simplify/gemm.ll
M polly/test/Simplify/nocoalesce_differentvalues.ll
M polly/test/Simplify/nocoalesce_elementmismatch.ll
M polly/test/Simplify/nocoalesce_readbetween.ll
M polly/test/Simplify/nocoalesce_writebetween.ll
M polly/test/Simplify/notdead_region_exitphi.ll
M polly/test/Simplify/notdead_region_innerphi.ll
M polly/test/Simplify/notredundant_region_loop.ll
M polly/test/Simplify/notredundant_region_middle.ll
M polly/test/Simplify/notredundant_synthesizable_unknownit.ll
M polly/test/Simplify/out-of-scop-use-in-region-entry-phi-node.ll
M polly/test/Simplify/overwritten.ll
M polly/test/Simplify/overwritten_3phi.ll
M polly/test/Simplify/overwritten_3store.ll
M polly/test/Simplify/overwritten_implicit_and_explicit.ll
M polly/test/Simplify/overwritten_loadbetween.ll
M polly/test/Simplify/overwritten_scalar.ll
M polly/test/Simplify/pass_existence.ll
M polly/test/Simplify/phi_in_regionstmt.ll
M polly/test/Simplify/pr33323.ll
M polly/test/Simplify/redundant.ll
M polly/test/Simplify/redundant_differentindex.ll
M polly/test/Simplify/redundant_partialwrite.ll
M polly/test/Simplify/redundant_region.ll
M polly/test/Simplify/redundant_region_scalar.ll
M polly/test/Simplify/redundant_scalarwrite.ll
M polly/test/Simplify/redundant_storebetween.ll
M polly/test/Simplify/scalability1.ll
M polly/test/Simplify/scalability2.ll
M polly/test/Simplify/sweep_mapped_phi.ll
M polly/test/Simplify/sweep_mapped_value.ll
M polly/test/Simplify/ununsed_read_in_region_entry.ll
M polly/test/Support/Plugins.ll
M polly/test/Support/defaultpipelines.ll
M polly/test/Support/dumpfunction.ll
M polly/test/Support/dumpmodule.ll
M polly/test/Support/exportjson.ll
M polly/test/Support/isl-args.ll
M polly/test/Support/pipelineposition.ll
M polly/test/Support/pollyDebug.ll
M polly/test/lit.site.cfg.in
M polly/test/polly.ll
Log Message:
-----------
[Plugins] Load pass plugins after parsing the command line (#226773)
opt and llc load -load-pass-plugin plugins from a cl::opt callback while
parsing argv, so that the options a plugin registers are recognized
later on the command line. cl::callback is to be removed to enable
migration to a TableGen-based option representation
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
Load plugins after cl::ParseCommandLineOptions. A loaded plugin's
options are no longer accepted as ordinary options; pass them with
-plugin-arg=<plugin>,<arg> instead. Prefix each Polly option in Polly
tests with -plugin-arg=Polly, and each IRTransforms example option with
-plugin-arg=SimplifyCFG,.
LLM-aided
Commit: e4ddd83eddf7c0ea95432e53f63f56e64e9aae92
https://github.com/llvm/llvm-project/commit/e4ddd83eddf7c0ea95432e53f63f56e64e9aae92
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/include/PluginInterface.h
Log Message:
-----------
[Offload] Fix dangling memory references / leaks (#227411)
Summary:
Two small tweaks. First, the allocator creates memory for the type via
placement new, but does not deallocate it with the destructor. This is
UB and is fixed by explicitly callling the type's destructor. Second,
the plugins were only 'released', which was likely just being confused
with `reset`. Release returns the pointer, essentially giving up
ownership, but we never take the pointer so it just dangles. The correct
spelling is 'reset'.
Commit: 77f51673fb8597f8380a274b61c60ef181cee515
https://github.com/llvm/llvm-project/commit/77f51673fb8597f8380a274b61c60ef181cee515
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[RISCV][P-ext] Support Packed Widening Unzip (#227211)
Commit: b1f5b675df8b3fc4c5e479ab14d6d4fc3e60ce65
https://github.com/llvm/llvm-project/commit/b1f5b675df8b3fc4c5e479ab14d6d4fc3e60ce65
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[bazel][libc] Fix 667cfbec38942e08bd67fa51cc05e63686dd01b9 (#227544)
Commit: e57a08e318f7e58d8f2ed074fed89648e79fe831
https://github.com/llvm/llvm-project/commit/e57a08e318f7e58d8f2ed074fed89648e79fe831
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
A llvm/lib/Target/RISCV/RISCVVectorUtils.h
M llvm/test/Analysis/CostModel/RISCV/shuffle-transpose.ll
Log Message:
-----------
[RISCV] Model Zvzip VPAIR shuffle costs (#227177)
Model pair-even and pair-odd shuffle costs using vpaire.vv and
vpairo.vv when the Zvzip extension is available.
Add a new file `RISCVVectorUtils.h` to share shuffle-mask
helpers between ISel lowering and TTI. Also move `isPairEven`
and `isPairOdd` into the new file and reuse them in TTI.
This is the second PR split out from #224991.
Assisted-by: TRAE CLI (GPT-5)
Commit: e0473aed59261e5e155dbcfe02012bb2a354643b
https://github.com/llvm/llvm-project/commit/e0473aed59261e5e155dbcfe02012bb2a354643b
Author: David CARLIER <devnexen at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M bolt/lib/Core/HashUtilities.cpp
Log Message:
-----------
[BOLT][Core] avoid string temporaries in block hashing. (#213510)
Commit: 244794cb69169e73f5dcda71b16660e02156d5d1
https://github.com/llvm/llvm-project/commit/244794cb69169e73f5dcda71b16660e02156d5d1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-libstdcxx.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
Log Message:
-----------
[libc++] Run Linux benchmarks on the premerge k8s runner set (#227547)
The Linux benchmarking machine was still using the
llvm-premerge-libcxx-runners runner set, which doesn't exist anymore.
Moving to K8s also requires specifying the Docker image to use in
machines.json.
As a drive-by, drop the manual Python installation since a suitable
version of Python should already exist in the image.
Commit: 1f0e66e362d8ddb8cfd494f61663bb1ad5fe54b3
https://github.com/llvm/llvm-project/commit/1f0e66e362d8ddb8cfd494f61663bb1ad5fe54b3
Author: Skywaterr <jleung12333 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
Fix typo in comment for ConstantInt get method (#227493)
Originally found this typo from docs generated by Doxygen.
Commit: 5de0524ef6f3156889805cc9cf948d87eb249416
https://github.com/llvm/llvm-project/commit/5de0524ef6f3156889805cc9cf948d87eb249416
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/Basic/DiagnosticIDs.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGenObjCXX/objc-atomic-ownership-recovery.mm
Log Message:
-----------
[Sema] Return RecoveryExpr for ARC atomic ownership error (#224849)
`BuiltinAtomicOverloaded` returned a bare `ExprError()` on the ARC
ownership check and made CodeGen hit `llvm_unreachable`.
so return a `RecoveryExpr` instead so bad data can't reach codegen.
Fixes #222528.
Commit: 67642f1065c85dd2265c0b5b740211b146efcd20
https://github.com/llvm/llvm-project/commit/67642f1065c85dd2265c0b5b740211b146efcd20
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
Log Message:
-----------
[SelectionDAG] Keep inline asm clobbers live when read by a glued CopyFromReg (#227203)
PR #227026 marks every clobber def dead, but a flag output such as X86
`={@ccz}` is lowered to a glued `CopyFromReg $eflags` whose only
definition is the `~{flags}` clobber. With EXPENSIVE_CHECKS the verifier
reports "Using an undefined physical register" for the SETcc that reads
EFLAGS (bittest-intrin.ll, inline-asm-flag-output.ll, pr40737.ll).
Don't set the dead flag on a clobber that overlaps a physical register
read by a glued CopyFromReg.
Aided by Opus 5.5
Commit: bd502ed80c12d5972e931d6c44db0d22bb38b630
https://github.com/llvm/llvm-project/commit/bd502ed80c12d5972e931d6c44db0d22bb38b630
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
Log Message:
-----------
[compiler-rt] Fix failing HSA test after #226551 (#227552)
Summary:
Internal symbolization fails this test due to RTLD_NEXT.
Commit: 308a7c648f56e6c467be8d688c6b82ef35ac7663
https://github.com/llvm/llvm-project/commit/308a7c648f56e6c467be8d688c6b82ef35ac7663
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[compiler-rt] Fix failing HSA test after #226551 (#227552)
Summary:
Internal symbolization fails this test due to RTLD_NEXT.
Commit: 19c5a9e63e941e39525804cc9d6088dd5e25dbf1
https://github.com/llvm/llvm-project/commit/19c5a9e63e941e39525804cc9d6088dd5e25dbf1
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlanStack.h
M lldb/source/Target/Process.cpp
M lldb/source/Target/ThreadPlanStack.cpp
A lldb/test/API/functionalities/gdb_remote_client/TestEmptyThreadList.py
Log Message:
-----------
[lldb] Fix unbounded recursion on an empty thread list (#227396)
ThreadPlanStackMap::Update runs inside UpdateThreadListIfNeeded, but
looked up threads with FindThreadByID, which refreshes the list again.
UpdateThreadListIfNeeded always refreshes an empty list, so a stop that
reports no threads recursed until the stack overflowed.
Look threads up without refreshing. PruneThreadPlans relied on that
lookup to refresh the list, so have it refresh the list itself.
PS: I ran into this when stepping through a Wasm module running under
the WebAssembly Micro Runtime (WAMR). The new test case mimics that
interaction.
rdar://157254463
Commit: 8d35e4a648269fb2191c8e9ea5dfa89b4b097c4e
https://github.com/llvm/llvm-project/commit/8d35e4a648269fb2191c8e9ea5dfa89b4b097c4e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/source/Target/Target.cpp
M lldb/test/API/functionalities/scripted_extensions/TestScriptedExtensionsDiagnostics.py
Log Message:
-----------
[lldb/Interpreter] Report scripted hook failures via Debugger::ReportError (#227508)
This patch addresses post-merge feedback on #225292.
`ReportScriptedHookError` formatted the error through a
`CommandReturnObject` whose immediate streams pointed at the hook's
output stream. Since no command is involved, this patch reports the
failure with `Debugger::ReportError` instead, which is the diagnostic
channel other scripted extensions already use when they have no caller
to return an error to.
This patch also makes the default `HandleModuleLoaded` and
`HandleModuleUnloaded` implementations in `ScriptedHookInterface` return
`llvm::errc::not_supported` rather than success, since they are only
invoked when the scripted class implements the corresponding method.
The scripted stop hook tests now assert on the diagnostic event rather
than on the debugger's output.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: bae48841c82fe38447a487caa9226ff914259bd6
https://github.com/llvm/llvm-project/commit/bae48841c82fe38447a487caa9226ff914259bd6
Author: Fady Farag <com.webkit.iidmsa at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Don't skip the else branch of an if statement with a condition variable and a trivial then branch (#227262)
Previously, when an `if` statement had a condition variable and a
trivial then branch, `TraverseIfStmt` skipped the entire statement. That
is correct for the condition variable, which is null in the else branch,
but it also skipped the else branch, which caused a missing warning for
any raw pointer/reference local variable declared there. This still
exempts the condition variable but traverses the else branch when it is
not trivial.
Commit: 36c565111a30ad50afc8a28a92aa353f293f9c1d
https://github.com/llvm/llvm-project/commit/36c565111a30ad50afc8a28a92aa353f293f9c1d
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/config/linux/x86_64/exclude.txt
M libc/include/sys/random.yaml
M libc/src/sys/random/CMakeLists.txt
A libc/src/sys/random/getentropy.h
M libc/src/sys/random/linux/CMakeLists.txt
A libc/src/sys/random/linux/getentropy.cpp
M libc/test/src/sys/random/linux/CMakeLists.txt
A libc/test/src/sys/random/linux/getentropy_test.cpp
Log Message:
-----------
[libc] Implement getentropy in sys/random (#226501)
Implement the standard POSIX.1-2024 function `getentropy` in
`<sys/random.h>`, bringing `<sys/random.h>` to 100% completion.
Fixes #226458
Commit: 285649969f4036efa0fe37cdafb5b652fa0d2995
https://github.com/llvm/llvm-project/commit/285649969f4036efa0fe37cdafb5b652fa0d2995
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-objdump/ELF/RISCV/mapping-sym-isa-disassembly.s
M llvm/test/tools/llvm-objdump/ELF/RISCV/mapping-sym-isa-mattr-conflict.s
M llvm/tools/llvm-objdump/llvm-objdump.cpp
Log Message:
-----------
[llvm-objdump][RISC-V] Do not leak file-level features into $x<ISA> regions (#227513)
Previously, RISCVISATargetCache::get initialized per-region features from
Base.SubtargetInfo->getFeatureString(), which already included the
file-level Tag_RISCV_arch and --mattr flags. Because RISCVISAInfo::toFeatures()
only emits "+ext" for extensions present in the "$x<ISA>" mapping symbol
(and never "-ext"), any extension enabled in Tag_RISCV_arch or via a
conflicting --mattr remained enabled even in regions whose "$x<ISA>"
mapping symbol disabled it.
Start from an empty SubtargetFeatures instead and populate it from the
parsed "$x<ISA>" mapping symbol (plus non-conflicting --mattr flags).
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227513
Commit: b79580b6e7d7d1eac6f25f5e7e9c4b90cf8ecdad
https://github.com/llvm/llvm-project/commit/b79580b6e7d7d1eac6f25f5e7e9c4b90cf8ecdad
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/unittests/IR/MetadataTest.cpp
Log Message:
-----------
[IR] Reduce memory usage in metadata use tracking (NFC) (#221866)
This patch reduces the memory footprint of metadata use tracking.
Currently, ReplaceableUses uses:
SmallDenseMap<void *, std::pair<OwnerTy, uint64_t>, 4>
where the uint64_t records insertion order. The problem is that
once it exceeds 2 elements, it allocates 64 buckets (~1.5 KB). In large
compilations with debug info, thousands of metadata nodes have 3 or 4
uses, leading to significant overhead.
With this patch, uses are stored directly in a SmallVector:
struct UseEntry {
void *Ref;
OwnerTy Owner;
};
SmallVector<UseEntry, 4> UseMap;
// In addRef:
UseMap.push_back({Ref, Owner});
SmallVector stores up to 4 elements inline (~87% of metadata nodes)
without heap allocation, up from 2 elements (~64% of metadata nodes)
with SmallDenseMap. It also provides a deterministic array order,
eliminating the need to sort uses by an explicit ID in several places.
For the rare nodes with more than 32 uses, an on-demand
DenseMap<void *, unsigned> (IndexMap) is lazily allocated to map each
Ref to its index in UseMap.
To support this representation efficiently:
- For nodes with up to 32 uses, IndexMap remains null and findRef scans
UseMap backwards from the end, taking advantage of temporal locality
since recently added references are typically dropped or moved first.
- Once UseMap exceeds 32 entries, IndexMap is allocated to provide O(1)
lookups in findRef, and is reset once UseMap shrinks back to 16 or
fewer entries so it cannot thrash.
- In dropRef, the removed entry is overwritten with UseMap.back() and
the back is popped, keeping removals O(1) from any position while
maintaining a deterministic order.
Benchmark results:
Base Test
File Max RSS Max RSS Delta Wall Time
-----------------------------------------------------------------
SLPVectorizer.ii 1343 MB 1207 MB -10.14% 43.48s -> 42.80s
SemaOpenMP.ii 1358 MB 1196 MB -11.95% 34.42s -> 33.71s
X86ISelLowering.ii 881 MB 838 MB -4.85% 26.23s -> 26.03s
-----------------------------------------------------------------
Total 3582 MB 3241 MB -9.52% 104.13s -> 102.53s
Geometric Mean -9.03% -1.47%
- Compilation flags: -O3 -g -fdebug-info-for-profiling -flto=thin
- Max RSS & Wall Time: average of 3 runs after 1 warmup run.
Thanks to Fangrui Song for exempting ConstantData from metadata use
tracking (#223303), suggesting the swap-and-pop removal in dropRef, and
providing the LargeUseList unit test (#227186).
Assisted-by: Antigravity
Commit: 1ec6f66eee93cfc2f921b8a6122a7cf729006f56
https://github.com/llvm/llvm-project/commit/1ec6f66eee93cfc2f921b8a6122a7cf729006f56
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/ValueMap.h
Log Message:
-----------
[IR] Remove ValueMap::{is,get}PointerIntoBucketsArray (NFC) (#227496)
Both functions were introduced on October 22, 2009 in commit
4546d3123506be9fad18fa1132e5ea45145b2ffe without any callers.
Assisted-by: Antigravity
Commit: 1cc3ec2dcc873428217361476a0f03935c22f91e
https://github.com/llvm/llvm-project/commit/1cc3ec2dcc873428217361476a0f03935c22f91e
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoY.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/CodeGen/RISCV/rvy/rvy-invalid-operands.mir
M llvm/test/MC/RISCV/rvy-build-attributes.s
M llvm/test/MC/RISCV/rvy-invalid-attributes.s
M llvm/test/MC/RISCV/rvy/rvy-basic-invalid.s
M llvm/test/MC/RISCV/rvy/rvy-basic.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISC-V][MC][RVY] Update to v0.9.10 specification (#227554)
Update the experimental 'Y' base ISA to 0.9.10 (0p910) and sync the base
RVY instruction encodings and mnemonics with the v0.9.10 draft
specification (https://github.com/riscv/riscv-cheri/releases/tag/v0.9.10-ar20260929):
* Replace `SRLIY` and the `yhir` alias with a dedicated 2-operand `YHIR`
instruction (`funct7 = 0b1111010`, `funct5 = 0b00111`), and remove the
now-unused `uimm7_eq_xlen` operand support.
* Drop `PACKY` in favor of `YHIW` (`rd = YGPR`, `rs1 = GPR`, `rs2 = GPR`).
* Rename `YSUNSEAL` to `YUNSEALS` and add `YSEALE` (`funct7 = 0b0010111`,
`rs1 = x0`).
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/227554
Commit: 72fcc274e6ae78edc76e68c837bd90bd8ff1fdbc
https://github.com/llvm/llvm-project/commit/72fcc274e6ae78edc76e68c837bd90bd8ff1fdbc
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Diagnose destructors called on string pointers (#227283)
They are immutable, so diagnose accordingly.
Commit: 9e99b4818922f395d273735e638795a3cd8a1246
https://github.com/llvm/llvm-project/commit/9e99b4818922f395d273735e638795a3cd8a1246
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Descriptor.cpp
M clang/lib/AST/ByteCode/Descriptor.h
Log Message:
-----------
[clang][bytecode][NFC] Simplify Descriptor::getLocation() (#227266)
`DeclOrExpr` already has a function for this, so just forward a call to
it.
Commit: 07b733d1bd0777318c7ab2916fc56f6e31e15eca
https://github.com/llvm/llvm-project/commit/07b733d1bd0777318c7ab2916fc56f6e31e15eca
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/Transforms/InferAddressSpaces/NVPTX/address-space-join.ll
Log Message:
-----------
[InferAddressSpaces] Insert fixup casts before cloned user during rewriting phase (#226987)
After reworking `operandWithNewAddressSpaceOrCreatePoison` in #225161 in
order to handle joins of different address spaces in the lattice to a
more specific address space, ensure that casts created during the fix-up
phase of poison uses are placed before the cloned user, as the latter
has already been inserted above the original instruction in
`cloneValueWithNewAddressSpace`.
Commit: 270a8062a4c8836b749646ef6c535d7eb870136c
https://github.com/llvm/llvm-project/commit/270a8062a4c8836b749646ef6c535d7eb870136c
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/ARM/arm-ieee-vectorize.ll
M llvm/test/Transforms/LoopVectorize/X86/already-vectorized.ll
M llvm/test/Transforms/LoopVectorize/check-no-vectorize.ll
M llvm/test/Transforms/LoopVectorize/diag-disabled-vectorization-msgs.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
Log Message:
-----------
[LV][NFC] Fix erroneous debug message emitted during legality checks (#226162)
We erroneously state that we can vectorise the loop, since
LoopVectorizationLegality is no longer the oracle in matters of
legality. Many of the legality checks have been moved to vplan
construction, such as when attempting to vectorise some early exit
loops. It's very confusing to see debug output that says:
We can vectorize this loop.
Not vectorising the loop because of ...
I've updated the debug message to be more ambiguous.
After this patch I intend to follow up with another one to fix the
equally incorrect
LV: Vectorization is possible but not beneficial.
debug message, which assumes the reason for choosing a scalar VF is
because of the cost model. However, for some early exit loops we simply
failed to create any vector vplans!
Commit: 7aa812f5455cbf08776fe584dd2cba7ab60f3bc2
https://github.com/llvm/llvm-project/commit/7aa812f5455cbf08776fe584dd2cba7ab60f3bc2
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-unfold-load-eflags-liveintervals.mir
Log Message:
-----------
[TwoAddressInstruction] Drop physreg ranges after unfolding a load (#227538)
Since #225174 LiveIntervals is computed before TwoAddressInstructions.
When tryInstructionTransform() unfolds a load, e.g. OR64rm into
MOV64rm + OR64rr, it calls repairIntervalsInRange(). That function
only repairs virtual registers. If the regunit range of a physreg def
of the original instruction ($eflags here) was already cached, it
keeps a value defined at the slot of the erased instruction.
The machine verifier then reports "No instruction at VNInfo def index"
and later passes hit `LR.verify()` in LiveIntervals::HMEditor. This
broke the MSan bootstrap build of clang/lib/Sema/SemaAPINotes.cpp.
Drop the cached regunit ranges for the physregs of the unfolded
instruction so they are recomputed on demand. MachineBasicBlock.cpp
already does the same after repairIntervalsInRange().
Assisted-by: Gemini
Commit: ae6e36782f43773717518d4883184734ed31c693
https://github.com/llvm/llvm-project/commit/ae6e36782f43773717518d4883184734ed31c693
Author: Mattéo Rizza Murgier <matteo.rizza-murgier at sipearl.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
M mlir/test/Dialect/Affine/SuperVectorize/vectorize_reduction.mlir
Log Message:
-----------
[mlir][affine] Fix crash when rolling back vectorization of reduction loops (#226912)
Reductions introduce operations outside of the created loop, that are
users of said loop. When rolling back (e.g. when an op inside the loop
being vectorized is not vectorizable), only the created loop is deleted,
which leads to the error: “operation destroyed but still has uses”.
This PR fixes this by recursively deleting users of the newly created
loop before removing it when rolling back.
Commit: ab84dc98afb8d2b04d0f558a5a9c3367ea9c200c
https://github.com/llvm/llvm-project/commit/ab84dc98afb8d2b04d0f558a5a9c3367ea9c200c
Author: Szymon Sobieszek <71835447+Kavu849 at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
M llvm/test/Transforms/LoopIdiom/strlen.ll
Log Message:
-----------
[LoopIdiom] Fix 64-to-32-bit stride truncation in strlen idiom recognition (#227406)
This patch fixes a silent miscompile where loops with massive strides
(e.g., 0x100000001 or 0x2000000000000001) were incorrectly optimized
into strlen calls.
Previously, getZExtValue() was truncated to a 32-bit unsigned integer,
causing some massive strides to appear as a stride of 1. Furthermore,
the OpWidth check relied on multiplication (StepSize * 8), which is
vulnerable to 64-bit integer overflow.
By upgrading StepSize to uint64_t and using division (OpWidth / 8), we
ensure the optimization is safely aborted for massive strides without
risking arithmetic overflow.
Commit: 2f92ca715ab0ca3dde649ce01f0c1fdbf6711a8b
https://github.com/llvm/llvm-project/commit/2f92ca715ab0ca3dde649ce01f0c1fdbf6711a8b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/IR/ValueHandle.h
M llvm/lib/IR/LLVMContextImpl.h
M llvm/lib/IR/Value.cpp
Log Message:
-----------
[IR][ADT] Update ValueHandle PrevPtr via move constructor (NFC) (#227484)
In LLVMContextImpl::ValueHandles, the first ValueHandleBase node's
PrevPtr points directly to the head pointer inside the DenseMap
bucket, so relocating a bucket invalidates that PrevPtr.
This patch wraps the head pointer in ValueHandleHead, whose move
constructor updates Head->setPrevPtr(&Head) whenever a bucket is
relocated by grow() or erase(). Specifically, this allows us to:
- Simplify ValueHandleBase::AddToUseList by removing the manual
reallocation check and linear fixup loop after insertion.
- Use the standard one-argument Handles.erase(getValPtr()) in
ValueHandleBase::RemoveFromUseList instead of the private callback
erase, addressing the TODO there.
- Remove friend class ValueHandleBase, the two-argument callback
erase(Key, OnMoved), and the OnMoved callback parameter on
eraseFromFilledBucket from DenseMap.h.
Assisted-by: Antigravity
Commit: f50f4026a7feab1a00e5c736441d056c7f92a0fe
https://github.com/llvm/llvm-project/commit/f50f4026a7feab1a00e5c736441d056c7f92a0fe
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-mixed-early-clobber-tied-defs.ll
A llvm/test/CodeGen/X86/twoaddr-mixed-early-clobber-tied-defs.mir
Log Message:
-----------
TwoAddressInstructions: Use the per-operand early clobber flag for tied copies (#227581)
The live interval update for the copy inserted for a tied operand ended
the new segment at getRegSlot(IsEarlyClobber), using a flag computed
once per instruction for any tied pairs. Use the flag
of the def actually being processed.
With an inline asm mixing "=&r" and "=r" outputs tied to the same input,
the copy for the plain def ended at the early clobber slot, leaving a
hole before its own def. That splits the live range into multiple
connected components and asserts in updatePressureDiffs.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: d5e89c506182617baa984f141b5a10ff56c03375
https://github.com/llvm/llvm-project/commit/d5e89c506182617baa984f141b5a10ff56c03375
Author: Santanu Das <santdas at qti.qualcomm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonHardwareLoops.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp
M llvm/lib/Target/Hexagon/HexagonInstrInfo.h
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-ptrchase.ll
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-tied-operands-hvx.ll
A llvm/test/CodeGen/Hexagon/hwloop-postinc-iv-tied-operands.ll
Log Message:
-----------
[Hexagon] Fix hwloop trip count for post-increment load induction (#225411)
A pointer-chasing loop whose exit test is a null check was miscompiled
into a hardware loop with a bogus trip count.
A post-increment load defines two registers:
%3, %11 = L2_loadri_pi %1(tied-def 1), 4
%11 is the incremented address (tied to the base), but %3 is the value
loaded from memory, which bears no relation to the base. The helper only
checked that the base register is defined by the PHI, never that the
register feeding the PHI back from the latch is the incremented address.
Here the PHI is fed by %3 -- so the loop was treated as bumping its
induction variable by a constant 4 per iteration, and getLoopTripCount
derived a count from the numeric value of head.
Require that the register feeding the PHI is the post-incremented
address, located through the base operand's tie rather than a fixed
operand index: the tied def is operand 1 for loads (L2_loadri_pi,
V6_vL32b_pi) but operand 0 for stores (S2_storeri_pi, V6_vS32b_pi), and
predicated forms shift both positions.
---------
Co-authored-by: quic-santdas <quic_santdas at qti.qualcomm.com>
Commit: 8318707fb9791d75f8dddf8737b59f6860371884
https://github.com/llvm/llvm-project/commit/8318707fb9791d75f8dddf8737b59f6860371884
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/test/Analysis/LoopAccessAnalysis/retry-runtime-checks-after-dependence-analysis.ll
A llvm/test/Transforms/LoopLoadElim/wrap-predicate-from-dependence-analysis.ll
Log Message:
-----------
[LAA] Honor no-wrap predicates already in PSE in isNoWrap (#226430)
getPtrStride checks pointer wrapping assuming PSE's predicate holds.
Before #203787, isNoWrap used `PSE.hasNoOverflow` to see NUSW flags
recorded by `setNoOverflow`. Removing that bookkeeping made queries that
cannot add predicates accept only static no-wrap facts, ignoring NUSW
predicates LAA already added for the pointer.
LoopLoadElimination's `isDependenceDistanceOfOne` makes these queries
for each forwarding candidate's load and store. A pointer needing a wrap
predicate (e.g. a non-inbounds GEP where null is valid) is rejected with
"Pointer may wrap", although dependence analysis already added the
predicate and LLE versions the loop on all PSE predicates. Recurrences
such as `A[i] -= B[i-1] * A[i-1]` then reload `A[i-1]` each iteration
instead of reusing the stored value.
When isNoWrap cannot add predicates, check whether PSE's predicate
implies the AddRec's NUSW wrap predicate. Callers allowed to add
predicates are unchanged: they collect it, and adding an implied
predicate to PSE is a no-op. The change introduces no new predicates.
This also restores the pre-#203787 check order in
`retry-runtime-checks-after-dependence-analysis.ll`. When rebuilding
checks after dependence analysis, the first pass again accepts pointers
such as `%gep.b` with previously added NUSW predicates, rather than
deferring them to the second pass.
Motivation: For `A[i] -= B[i-1] * A[i-1]; C[i] = ...` with may-aliasing
`C` preventing GVN forwarding (addrspace(1), `opt -O3`, n=256), losing
forwarding makes the loop 2.4x slower on Zen 5: LLVM 22 takes 318 ns,
main 780 ns, and the patch 320 ns. Compile time is unchanged for a
synthetic loop with 512 accesses needing wrap predicates (±1%
instructions in `print<access-info>`).
Assisted by: Codex 5.5, Astra 6
Part of a series of patches developed while migrating Julia to LLVM 23
Commit: c763d1cc61676921adec7c450f56948bb288c511
https://github.com/llvm/llvm-project/commit/c763d1cc61676921adec7c450f56948bb288c511
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/GettingInvolved.md
Log Message:
-----------
docs: Remove Johannes' office hours (#227350)
Commit: f0a849a19a6d90775feeeaee8221e95d07eca461
https://github.com/llvm/llvm-project/commit/f0a849a19a6d90775feeeaee8221e95d07eca461
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/Interp.cpp
Log Message:
-----------
[clang][bytecode] Move past-end check into CheckFinalLoad (#227181)
It makes more sense there. Also remove the one of for non-const
pointers, since that one isn't needed anymore
Commit: b6caf02d7db575f0469e9c9d1bc9ad58fb5b7db0
https://github.com/llvm/llvm-project/commit/b6caf02d7db575f0469e9c9d1bc9ad58fb5b7db0
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/builtin-memcpy.c
M clang/test/CIR/CodeGenCUDA/uniform-work-group-size.cu
M clang/test/CIR/CodeGenHIP/atomic-classify.hip
M clang/test/CIR/CodeGenHIP/builtin-bool-result.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave32.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-wave64.hip
M clang/test/CIR/CodeGenHIP/cleanup-alloca-addrspace.hip
M clang/test/CIR/CodeGenHIP/ternary-struct-addrspace.hip
Log Message:
-----------
[CIR][NFC][AMDGPU] Use new triple in CIR tests (#226972)
Commit: c3f59fec175e464a4cd62b793e966240d7383724
https://github.com/llvm/llvm-project/commit/c3f59fec175e464a4cd62b793e966240d7383724
Author: ʟᴜɴᴇx <thisissamir04 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CodeGenPrepare.cpp
A llvm/test/Transforms/CodeGenPrepare/X86/store-extract-division-ub.ll
Log Message:
-----------
[CodeGenPrepare] don't promote sdiv/srem by -1 (#218737)
`store-extract` promotion was widening sdiv/srem to the vector type
without checking if thats safe or not... and INT_MIN lane / -1 is UB.
skip sdiv/srem by -1 in `shouldPromote`, rest still promotes fine.
Fixes #218570
Commit: a9fbda363b13bc844a114f955ec8dde7f7fe50ba
https://github.com/llvm/llvm-project/commit/a9fbda363b13bc844a114f955ec8dde7f7fe50ba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
Log Message:
-----------
TwoAddressInstructions: Use a range loop to move the copy chain (#227296)
Cleanup some messy iterator work.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a013e59c1c7ebd2747a73ae0ab5955d35e46de7a
https://github.com/llvm/llvm-project/commit/a013e59c1c7ebd2747a73ae0ab5955d35e46de7a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/ReleaseNotes.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg-blockaddress.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg1.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg2-dead-block-order.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg3-phis.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg4-multiple-duplicate-cfg-updates.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg5-del-phis-for-dead-block.ll
M llvm/test/Examples/IRTransforms/SimplifyCFG/tut-simplify-cfg6-dead-self-loop.ll
M llvm/test/Feature/load_extension.ll
M llvm/test/lit.cfg.py
M polly/docs/ReleaseNotes.rst
M polly/lib/Support/RegisterPasses.cpp
M polly/test/lit.site.cfg.in
Log Message:
-----------
[Plugins] Address review comments on -plugin-arg (#227545)
Address comments after #226773:
* Accept an empty argument again (-plugin-arg=<plugin>,). Tested by
tut-simplify-cfg1.ll
* Reject an argument for a name shared by several plugins.
* Remove parsePassPluginCommandLine. Polly and the Bye example, which
keep cl::opt, call cl::ParseCommandLineOptions from ParseArguments.
* Drop cl::opt from the IRTransforms example: ParseArguments takes v1,
v2 or v3.
* Test -plugin-arg diagnostics.
LLM-aided
Commit: d8ddc3634336ebabf7cd883bdb4cd4144ed7257b
https://github.com/llvm/llvm-project/commit/d8ddc3634336ebabf7cd883bdb4cd4144ed7257b
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A mlir/test/Pass/remark-final-pass-failure.mlir
R mlir/test/Pass/remark-final-verify-diagnostics.mlir
Log Message:
-----------
[mlir] Test the final-policy remark on a failing pipeline without verification (#227276)
#226258 changed mlir-opt to finalize the remark policy on every exit from
`performActions`, including when the pass pipeline fails. Before that, a
failing pipeline returned early, and remarks deferred by
`--remark-policy=final` were only emitted later from `~MLIRContext`. By then
the `SourceMgrDiagnosticHandler` had been destroyed, so the remarks were
silently dropped.
The test added in #226258, `remark-final-verify-diagnostics.mlir`, does not
catch this regression: it runs with `--verify-diagnostics`, and before #226258
the verifier's callback was never unregistered from the context. That leaked
callback still received the remark emitted from `~MLIRContext`, so the test
passed with or without the fix.
Replace it with `remark-final-pass-failure.mlir`, which runs the same failing
pipeline without `--verify-diagnostics` and checks the printed remark with
FileCheck. This test fails before #226258 and passes after it.
Assisted-by: Claude Code (Claude Opus 5.5)
Commit: 3c716ae984168596723db12c49c62c9fba2c6890
https://github.com/llvm/llvm-project/commit/3c716ae984168596723db12c49c62c9fba2c6890
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/SIOptimizeVGPRLiveRange.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomicrmw.ll
M llvm/test/CodeGen/AMDGPU/absdiff.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-pregfx12.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw-nand.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/div_i128.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fract-match.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.whole.wave-w32.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
R llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.xfail.mir
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
M llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-bug-deadlanes.mir
R llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use-livevars.mir
A llvm/test/CodeGen/AMDGPU/si-opt-vgpr-liverange-undef-use.mir
M llvm/test/CodeGen/AMDGPU/si-optimize-vgpr-live-range-dbg-instr.mir
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/srem64.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/vgpr-liverange-ir.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
Log Message:
-----------
AMDGPU: Use LiveIntervals instead of LiveVariables in SIOptimizeVGPRLiveRange (#227252)
Drop the LiveVariables dependency and only use LiveIntervals.
The legacy pass manager cannot schedule a pass requiring both
LiveIntervals and LiveVariables here, since LiveVariables (and its
UnreachableMachineBlockElim dependency) invalidates the LiveIntervals
just computed for it. In the AMDGPU pipeline, anchor the pass after
MachineLoopInfo instead of PHIElimination so LiveIntervals is computed
before PHIElimination, which is required anyway: the pass needs SSA and
introduces new PHIs. Preserving SlotIndexes keeps the transitive last-user
chain intact.
Since LiveVariables is no longer maintained past this point, PHIElimination
now splits critical edges using LiveIntervals, which accounts for most
of the test churn: LiveIntervalCalc drops kill flags and adds dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: f320f201af0fc1f85026c2b0e61f57b9f68757f2
https://github.com/llvm/llvm-project/commit/f320f201af0fc1f85026c2b0e61f57b9f68757f2
Author: Milica Kovacevic <mkovacevic at baylibre.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/TargetProcess/RegisterEHFrames.cpp
Log Message:
-----------
[ORC] Use __unw_add_dynamic_eh_frame_section/__unw_remove_dynamic_eh_ frame_section in RegisterEHFrames.cpp (#212260)
The ORC runtime already uses __unw_add_dynamic_eh_frame_section to avoid
'FDE is really a CIE' errors on libunwind. Apply the same approach to
the non-ORC-runtime EH frame registration path.
Solves issue: https://github.com/llvm/llvm-project/issues/55681
Commit: a70bc75f8f1e216888e3c7a35f6e11601294703f
https://github.com/llvm/llvm-project/commit/a70bc75f8f1e216888e3c7a35f6e11601294703f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
Log Message:
-----------
[orc-rt] Install missing public headers. (#227578)
These headers were accidentally left out of the installed header list in
previous commits.
Commit: 4b42c278af32ce1a810c5111135c529bc2e17aed
https://github.com/llvm/llvm-project/commit/4b42c278af32ce1a810c5111135c529bc2e17aed
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/Sparc/SparcInstrInfo.td
M llvm/lib/Target/Sparc/SparcSchedule.td
Log Message:
-----------
[SPARC] Refine instruction itinerary classes (#225328)
Split up itinerary classes to better match the LEON5 scheduling
information.
Changes:
- Split integer and floating-point loads into IIC_ld, IIC_fpu_ld, and
IIC_fpu_ldd.
- Split floating-point stores into IIC_fpu_st and IIC_fpu_std.
- Separate direct calls (IIC_call) from jumps and JMPLs (IIC_jmp).
- Rename IIC_ldstub to IIC_atomic and use it for LDSTUB, SWAP, and CASA.
- Add distinct integer-branch and floating-point-branch classes.
- Add a dedicated floating-point compare class.
Commit: 45257a8ec30ae12896c7f9e86b5e81b9ac0850b3
https://github.com/llvm/llvm-project/commit/45257a8ec30ae12896c7f9e86b5e81b9ac0850b3
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Demarcate VPIs that gen scalars (NFC) (#196207)
Certain VPInstruction opcodes generate single-scalars, others generate
vectors, and there are yet others that could generate either. Make this
clear in the code, by factoring the exact condition and asserting on
each opcode. This also makes it clear that the handling for
Logical(And|Or) is incomplete, and lays the groundwork for further
extending the opcodes handles by VPInstruction.
Commit: 6dfb394c42042bbd2be8b2cd38b46a4a84d751db
https://github.com/llvm/llvm-project/commit/6dfb394c42042bbd2be8b2cd38b46a4a84d751db
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/tools/obj2yaml/obj2yaml.cpp
Log Message:
-----------
[obj2yaml] Return from main on error instead of calling exit (#227594)
The `Fatal` lambda introduced by #224965 calls exit(1) while heap
objects are live. On the "failed to open" path the pointer to the
heap-allocated ToolOutputFile is dead, so LeakSanitizer reports a leak.
PR #227444 worked around this by defining `__lsan_is_turned_off`.
Properly fix the lsan failure by making the error callback record the
failure and return 1 from main.
LLM-aided
Commit: 782ddf836405d375875c445f7444790b9e605760
https://github.com/llvm/llvm-project/commit/782ddf836405d375875c445f7444790b9e605760
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/hsa-metadata-hidden-args-v5.ll
Log Message:
-----------
[AMDGPU][NFC] Use CHECK-NEXT for hidden_dynamic_lds_size in hsa-metadata-hidden-args-v5.ll (#227556)
NFC test change to align with rocm amd-staging.
Commit: 51313e5b855724782f2609260f86331da3ec59f0
https://github.com/llvm/llvm-project/commit/51313e5b855724782f2609260f86331da3ec59f0
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizableOpInterface.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/include/mlir/Dialect/Bufferization/Transforms/Passes.td
M mlir/lib/Dialect/Bufferization/Transforms/Bufferize.cpp
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/test/Dialect/SCF/one-shot-bufferize-analysis.mlir
Log Message:
-----------
[mlir][bufferization] Skip parallel analysis without parallel regions (#227202)
One-Shot Bufferize currently runs parallel-region conflict analysis even
when the analyzed IR has no parallel regions. This can repeatedly walk
long reverse use-def chains without being able to find a parallel-region
conflict.
Commit: 130148f2e24014b92a88203c83b9b18a89f964e2
https://github.com/llvm/llvm-project/commit/130148f2e24014b92a88203c83b9b18a89f964e2
Author: Julien Villette <julien.villette at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV1.td
M llvm/lib/Target/AArch64/AArch64SchedNeoverseV2.td
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-basic-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V1-neon-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-bf16-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-fptoint-instructions.s
M llvm/test/tools/llvm-mca/AArch64/Neoverse/V2-neon-instructions.s
Log Message:
-----------
[AArch64][NeoverseV1/V2] Fix ASIMD FP convert and round scheduling (#224046)
Measured on Neoverse V1 and V2 hardware with unrolled loops of
independent instances, using perf inst_spec/op_spec counters for the
micro-op counts. Both cores measure identically on every test below.
| Instruction | uop | Latency | RThroughput | was |
|----------------------|-----|---------|-------------|-----------|
| fcvtas h0, h1 | 1 | 3 | 0.50 | 4/6/1.00 |
| fcvtas s0, s1 | 1 | 3 | 0.50 | 2/4/1.00 |
| fcvtzs w0, s1, #1 | 1 | 3 | 1.00 | 1/3/0.50 |
| fcvtas v0.4s, v1.4s | 1 | 4 | 1.00 | 2 uops |
| fcvtas v0.8h, v1.8h | 1 | 6 | 2.00 | 4/6/1.00 |
| frinta v0.8h, v1.8h | 1 | 6 | 2.00 | 4/6/1.00 |
| bfcvtn v0.4h, v0.4s | 1 | 4 | 1.00 | 1/4/0.50 |
Scalar H and S conversions were grouped with wider vector forms; they
measure the same as the D-form F32 row, so they move there.
Fixed-point conversions to a general register were missed by the InstRW
regex on V1, which now covers the "ri" suffix as V2 already did.
On V2 the reworked classes are new definitions, since the originals are
shared with the SVE and reciprocal-estimate rules; on V1 they had no
other user and are updated in place.
Commit: 0bbdea99f47acdf1829ff53790557e774abc0e1a
https://github.com/llvm/llvm-project/commit/0bbdea99f47acdf1829ff53790557e774abc0e1a
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/__string/extern_template_lists.h
M libcxx/include/string
Log Message:
-----------
[libc++] Optimize basic_string::operator= (#224535)
This improves a few things in the long string code path. Specifically:
- The null terminator is copied from the assigned-from string instead of
setting it manually
- various branches have been removed via `__assume`s that are known
- `memmove` is tail-called by updating the pointer and size of the
string first and not returning `this` anymore
- the allocating path is outlined into a separate function, which
basically amounts to manual shrink-wrapping (this should be removed once
LLVM is able to do this on its own)
Commit: 3c0d75f38b54b4b3fd69758e27efabeecb564e22
https://github.com/llvm/llvm-project/commit/3c0d75f38b54b4b3fd69758e27efabeecb564e22
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/Targets/AMDGPU.cpp
A llvm/unittests/ABI/AMDGPUTargetInfoTest.cpp
M llvm/unittests/ABI/CMakeLists.txt
Log Message:
-----------
[ABI][AMDGPU] Add AMDGPU target ABI classifier to the LLVM ABI library (#220177)
**Summary:**
- Port the classic CodeGen AMDGPUABIInfo call-convention classifier to
the new language-agnostic LLVM ABI library.
**Changes:**
- LLVM ABI library. AMDGPUTargetInfo implements return, kernel-argument,
and regular-argument classification.
- Unit tests covering the classifier's argument/return branches.
Relates to issue: https://github.com/llvm/llvm-project/issues/220471
Pre-requisite PRs: #224994, #225005, #225009
Assisted by: Claude Opus 4.8
Commit: 799c728fbf6670d3d15374b4b39df25a8af559cc
https://github.com/llvm/llvm-project/commit/799c728fbf6670d3d15374b4b39df25a8af559cc
Author: purnima shrivastava <purnimashrivastava05 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Affine/Analysis/Utils.cpp
M mlir/test/Dialect/Affine/loop-fusion.mlir
Log Message:
-----------
[mlir][affine] Handle generic memory ops in loop fusion dependence analysis (#224657)
`affine-loop-fusion` collects generic memory-effecting operations such
as `vector.transfer_read`, but `mayDependence()` later relied on
`getMemRef()`, which only handled affine/memref loads and stores and
could crash on other memory operations.
This change uses the existing memory-effect handling to check memref
accesses generically and adds a reduced regression test.
Tests:
* `build/bin/llvm-lit mlir/test/Dialect/Affine -v`
* 73/73 tests passed
Fixes #224224.
AI Tool Disclosure:
AI tools were used to assist the code base exploration and understanding
the code design. I independently reviewed every line of the final
changes and validated the implementation and tests.
Co-authored-by: Purnima Shrivastava <purnimashrivastava05 at .com>
Commit: de53728ffcb38e4995fbd830745bbf04633b4123
https://github.com/llvm/llvm-project/commit/de53728ffcb38e4995fbd830745bbf04633b4123
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
M mlir/test/Dialect/Vector/vector-dropleadunitdim-transforms.mlir
Log Message:
-----------
[mlir][vector] Use `ShapeCastOp` in `castAwayContractionLeadingOneDim` (#226524)
Use `ShapeCastOp`, instead of `ExtractOp` and `BroadcastOp`, to drop the
leading unit dimension in `castAwayContractionLeadingOneDim`. This PR
continues the work started in:
* #208752, #210902, #211777, #219499, #219494
Essentially, this implements the approach already agreed on in the
previous PRs. See also #196206, which originally implemented this change
and was subsequently reverted in #199546.
`TransposeOp`s are left intact in light of the ongoing discussion about
whether folding `TransposeOp` into `ShapeCastOp` is valid, see e.g.
https://github.com/llvm/llvm-project/pull/219611.
Note that in the tests, `TransposeOp`s are nevertheless replaced with
`ShapeCastOp`s. This is due to the existing `TransposeOp` folders.
Commit: 88a26151f2e8945295110ab099ce55c384a8747b
https://github.com/llvm/llvm-project/commit/88a26151f2e8945295110ab099ce55c384a8747b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
Log Message:
-----------
AMDGPU: Update test introduced by #221821 after #227252 (#227621)
Fix midair collision test failure.
Commit: 778056182aef9267d00ad74eb567d40dfefc8196
https://github.com/llvm/llvm-project/commit/778056182aef9267d00ad74eb567d40dfefc8196
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/cmake/modules/HandleLLVMOptions.cmake
Log Message:
-----------
[llvm] Pass `/Brepro` via `add_link_options()` (#227416)
In modern CMake, editing `CMAKE_` variables directly is discouraged.
`/Brepro` should be passed via `add_link_options()` with a `LINKER:`
prefix to be portable.
This fixes issues for downstream consumers like Swift whose linker
driver needs the linker arguments to be prefixed.
---------
Co-authored-by: Saleem Abdulrasool <compnerd at compnerd.org>
Commit: e054fe42744def811a7e0b6cde582dce0072fff5
https://github.com/llvm/llvm-project/commit/e054fe42744def811a7e0b6cde582dce0072fff5
Author: Lucian Popescu <lucian.popescu187 at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/test/support/test_iterators.h
Log Message:
-----------
[libc++] Fix rvalue_iterator arithmetic operators in tests (#220686)
`rvalue_iterator` holds an `it_` member, not an `it`. This issue was
found while force-instantiating the template members. In current tests
the problematic code seems to be unreachable.
Commit: 1597301a6f6051a1c655cd954bd13728a3e5befc
https://github.com/llvm/llvm-project/commit/1597301a6f6051a1c655cd954bd13728a3e5befc
Author: Jonathan Thackray <jonathan.thackray at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/test/MC/AArch64/retired-register-names.s
Log Message:
-----------
[AArch64] Add retired POE2 system registers to retired-register-names.s (#226945)
Add retired POE2 system registers to retired-register-names.s
Commit: a8df978e98ccadfdd490db263096e7e3d330f9fc
https://github.com/llvm/llvm-project/commit/a8df978e98ccadfdd490db263096e7e3d330f9fc
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
Log Message:
-----------
[lldb][test] Fix test_listener_event_process_state (TestMultithreaded.py) on Windows on Arm (#227605)
This test expects to be sent function names by another thread. Function
names are allowed to be null, but the sending thread only sent them when
they were non-null.
On Windows on Arm, for whatever reasion, all the functions have no name
during the test. This is despite lldb being able to show them:
```
* thread #1, stop reason = breakpoint 1.1
* frame #0: 0x00007ff71d191008 inferior_program`int next(void) at inferior.cpp:6:13
frame #1: 0x00007ff71d19107c inferior_program`main at inferior.cpp:13:9
frame #2: 0x00007ff71d1cc994 inferior_program`
```
The test is not about whether we parse debug info properly, and I am not
about to dive into that anyway. So I think it's better to adapt the test
to only care that some function was found. The function's name is just a
token to say that, empty or otherwise.
Commit: 3d0da0a8c8bafe99a6c15ec1a2fc6a1e85044eab
https://github.com/llvm/llvm-project/commit/3d0da0a8c8bafe99a6c15ec1a2fc6a1e85044eab
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
A clang/test/SemaOpenCL/builtins-amdgcn-gfx13-exclusive-scan-types.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.exclusive.scan.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for gfx13 exclusive scan (#226078)
Commit: 8630f1a0c599b5cb1e511f87128842e8f8e79a6d
https://github.com/llvm/llvm-project/commit/8630f1a0c599b5cb1e511f87128842e8f8e79a6d
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
M llvm/test/CodeGen/RISCV/GlobalISel/half-convert.ll
Log Message:
-----------
[RISCV][GlobalIsel] Use Zfhmin for G_FPEXT from f16 to f32 (#227225)
fcvt.s.h is available with Zfhmin. Use the __extendhfsf2 libcall without
it.
Commit: 7e62054285d60eb32bd6c5964119b2e7c57660da
https://github.com/llvm/llvm-project/commit/7e62054285d60eb32bd6c5964119b2e7c57660da
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libsycl/test/basic/context.cpp
M libsycl/test/basic/get_backend.cpp
M libsycl/test/basic/group.cpp
M libsycl/test/basic/group_barrier.cpp
M libsycl/test/basic/group_barrier_device_code.cpp
M libsycl/test/basic/group_local_id.cpp
M libsycl/test/basic/handler/handler_depends_on.cpp
M libsycl/test/basic/handler/handler_parallel_for_arg_restrictions.cpp
M libsycl/test/basic/handler/handler_parallel_for_generic_lambda.cpp
M libsycl/test/basic/handler/handler_parallel_for_nd_range_invalid_arg_type.cpp
M libsycl/test/basic/handler/handler_parallel_for_runtime.cpp
M libsycl/test/basic/handler/handler_unnamed_lambda_functor.cpp
M libsycl/test/basic/handler/submit_fn_ptr_handler.cpp
M libsycl/test/basic/index_space_classes.cpp
M libsycl/test/basic/index_space_classes_negative.cpp
M libsycl/test/basic/khr_get_default_context.cpp
M libsycl/test/basic/linear_sub_group.cpp
M libsycl/test/basic/nd_range.cpp
M libsycl/test/basic/no_rdc_multi_tu.cpp
M libsycl/test/basic/parallel_for_indexers.cpp
M libsycl/test/basic/platform_get_devices.cpp
M libsycl/test/basic/queue_parallel_for_generic.cpp
M libsycl/test/basic/sub_group_by_value_semantics.cpp
M libsycl/test/basic/sub_group_common.cpp
M libsycl/test/basic/submit_fn_ptr.cpp
M libsycl/test/basic/wrapped_usm_pointers.cpp
M libsycl/test/usm/alloc_functions.cpp
M libsycl/test/usm/memcpy.cpp
M libsycl/test/usm/prefetch.cpp
Log Message:
-----------
[libsycl][NFC] Add licence headers to tests (#227327)
Adds file headers according to LLVM Coding guidelines.
LLVM's rules don't explicitly require or exclude the header in tests.
The C++ runtime libraries (libc++, libc++abi, libunwind, libc) add it
anyway.
The compiler and offload/openmp test suites mostly don't.
Following the footsteps of libcxx.
Assisted-by: Claude Code.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: d87c4424f2862ac158e78ee75a2a7e4bcf008b72
https://github.com/llvm/llvm-project/commit/d87c4424f2862ac158e78ee75a2a7e4bcf008b72
Author: Gurvir Dhillon <gman.dhillon at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
M llvm/test/Transforms/InstCombine/divceil.ll
Log Message:
-----------
[InstCombine] Use context instruction in divceil overflow check (#227158)
Divceil optimization only happens if we can prove x + y - 1 does not
overflow. Originally, a SimplifyQuery with no context instruction was
passed to checkDivCeilNUW which made it so that the optimization never
happened if the bound came from an assume. This meant that even when an
assume proved that x + y - 1 did not overflow, the optimization did not
happen.
This change passes SQ.getWithInstruction(&I) so the range of x is
computed at the add being folded, and assumes that apply there are used
when deciding whether we can fold.
Fixes #220849
AI Disclosure: I used Claude to help explain LLVM concepts while I was
trying to understand the problem. It also walked me through syntax,
helper functions that I should utilize, good test cases, and general
formatting for things like test case comments.
Commit: 66b01738fe62a386c7c62208755103992199b110
https://github.com/llvm/llvm-project/commit/66b01738fe62a386c7c62208755103992199b110
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/lib/Support/RegisterPasses.cpp
M polly/test/lit.site.cfg.in
Log Message:
-----------
[Polly] Remove non-goal TODO (#227638)
Apply post-commit review changes of #227545.
`%loadNPMPolly` is necessary to conditionally load the Polly plugin and
not having to repreat a lot of options in each regression test. It
cannot be spelled out in each individual test. Apply this change as
discussed in
https://github.com/llvm/llvm-project/pull/227545#discussion_r4142513423.
It could replaced with a tool substitution instead.
Also prefer use the default-sized `SmallVector` as by the LLVM
programmer's manual:
https://llvm.org/docs/ProgrammersManual.html#llvm-adt-smallvector-h.
Commit: 547a0e46b8fd7438b6d339e227ccfdbd31c57bc8
https://github.com/llvm/llvm-project/commit/547a0e46b8fd7438b6d339e227ccfdbd31c57bc8
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M compiler-rt/cmake/Modules/AllSupportedArchDefs.cmake
M compiler-rt/lib/orc/CMakeLists.txt
A compiler-rt/lib/orc/elfnix_tls.mips.S
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-helper.c
A compiler-rt/test/orc/TestCases/Linux/mips/Inputs/external-branch-stub-main.c
A compiler-rt/test/orc/TestCases/Linux/mips/external-branch-stub.test
A compiler-rt/test/orc/TestCases/Linux/mips/lit.local.cfg.py
A compiler-rt/test/orc/TestCases/Linux/mips/trivial-tls.c
A llvm/include/llvm/ExecutionEngine/JITLink/ELF_mips.h
M llvm/include/llvm/ExecutionEngine/JITLink/JITLink.h
A llvm/include/llvm/ExecutionEngine/JITLink/mips.h
M llvm/lib/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/lib/ExecutionEngine/JITLink/COFFLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELFLinkGraphBuilder.h
A llvm/lib/ExecutionEngine/JITLink/ELF_mips.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLink.cpp
M llvm/lib/ExecutionEngine/JITLink/JITLinkMemoryManager.cpp
M llvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.cpp
M llvm/lib/ExecutionEngine/JITLink/XCOFFLinkGraphBuilder.cpp
A llvm/lib/ExecutionEngine/JITLink/mips.cpp
M llvm/lib/ExecutionEngine/Orc/COFFAutoImportGenerator.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/ExecutionUtils.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkRedirectableSymbolManager.cpp
M llvm/lib/ExecutionEngine/Orc/JITLinkReentryTrampolines.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/SectCreate.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_abs16_data.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_ehframe.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_got_ordering.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_invalid_abi.yaml
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_micromips_unsupported.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_minimal.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_n64_compound_relocations.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_pc16_errors.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_pc18_aligned_base.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_r6_external_branch_stub.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_relocations.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unmatched_hi16.s
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unsupported_packed_relocation.yaml
A llvm/test/ExecutionEngine/JITLink/Mips/ELF_unsupported_tls.s
A llvm/test/ExecutionEngine/JITLink/Mips/lit.local.cfg
M llvm/unittests/ExecutionEngine/JITLink/AArch32ErrorTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/AArch64Tests.cpp
M llvm/unittests/ExecutionEngine/JITLink/CMakeLists.txt
M llvm/unittests/ExecutionEngine/JITLink/COFFLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/JITLinkTestUtils.cpp
M llvm/unittests/ExecutionEngine/JITLink/LinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MachOLinkGraphTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/MemoryManagerErrorTests.cpp
A llvm/unittests/ExecutionEngine/JITLink/MipsTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/StubsTests.cpp
M llvm/unittests/ExecutionEngine/JITLink/X86_64Tests.cpp
M llvm/unittests/ExecutionEngine/Orc/LinkGraphLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/MemoryMapperTest.cpp
M llvm/unittests/ExecutionEngine/Orc/ObjectLinkingLayerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/SharedMemoryMapperTest.cpp
Log Message:
-----------
[JITLink][Mips] Add ELF backend (#224578)
Add support for O32, N32, and N64 relocatable ELF objects in both byte
orders. Handle O32 implicit addends and HI/LO pairing, N32 relocation
groups, and N64 packed relocations. Preserve the MIPS64 ISA triple for
N32 while recording its four-byte pointer ABI in LinkGraph.
Implement absolute, PC-relative, GP/GOT, and compound fixups, GOT-backed
$t9 call stubs, and EH-frame support. Use MIPS-specific GOT keys for
target, addend, and exact/page entries, and collect GP-relative content
into one ordered region. Support standard MIPS ISAs, including release-6
stubs.
Integrate GD/LD TLS with ELFNixPlatform and add an assembly resolver
that reads the thread pointer with rdhwr before calling the existing C
implementation. Honor explicit MIPS relocation-model requests while
retaining the static default. JITLink remains opt-in and RuntimeDyld
remains the default.
Add focused relocation, ABI, GOT/stub, EH-frame, and TLS tests.
Assisted-by: chatgpt-5.6-sol
Commit: 3ae3aac09a774a4de76c611fbc920df9c9a84490
https://github.com/llvm/llvm-project/commit/3ae3aac09a774a4de76c611fbc920df9c9a84490
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
Log Message:
-----------
[lldb] Skip minidump reload test on unsupported architectures (#227634)
`TestMinidumpReloadCrash.py` runs `process save-core
--plugin-name=minidump` on any architecture, so it fails on 32-bit arm:
```
error: failed to save core file for process to '.../process.core':
architecture arm not supported.
```
`ArchThreadContexts::prepareRegisterContext` in
`MinidumpFileBuilder.cpp`
builds a thread context for x86_64 and aarch64 only, so `AddThreadList`
rejects any other architecture. Gate the test like the other minidump
save-core tests.
Commit: 32a8ade14bde25a120644f5e257ca8332568ea40
https://github.com/llvm/llvm-project/commit/32a8ade14bde25a120644f5e257ca8332568ea40
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/test/CodeGen/AMDGPU/finalize-isel-kill-scc-vcc.mir
M llvm/test/CodeGen/AMDGPU/skip-if-dead.ll
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Restore dropped EXEC/SCC defs on SI_KILL_F32_COND_IMM (#227604)
These pseudos may clobber scc, so they need the def on the instruction
definition. c16f776028dd added a let block over the defm, overriding the
[EXEC, SCC] defs in the base PseudoInstKill class.
With the defs gone, selection was free to leave a compare result in SCC
across the kill. #134718 then marked SCC live-in to the split block to
satisfy the verifier, which can probably cleaned up. The result is
visible in skip-if-dead.ll: in scc_use_after_kill_inst the s_cbranch_scc0 after
the kill consumed the exec update's SCC instead of the s_cmp_lg_u32 it was
selected for.
Pass the extra defs as a multiclass parameter so an override cannot drop
the mandatory ones again. Selection now sinks the compare past the kill,
so SCC is never live across it and the dead flags from a3cf6f45fb68 are
correct as written.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 77d6bf684b88e40f54913cb1048b608c181ab044
https://github.com/llvm/llvm-project/commit/77d6bf684b88e40f54913cb1048b608c181ab044
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/VectorDropLeadUnitDim.cpp
Log Message:
-----------
[MLIR][Vector] Fix typo from #226524 (#227642)
Commit: 52f10b4b9288039b23f13476bb08c396fc7bd188
https://github.com/llvm/llvm-project/commit/52f10b4b9288039b23f13476bb08c396fc7bd188
Author: Michael Kruse <llvm-project at meinersbur.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M polly/docs/ReleaseNotes.rst
Log Message:
-----------
[Polly] Remove previous release's ReleaseNotes (#227644)
Only include changes after the 23.x release:
https://github.com/llvm/llvm-project/blob/release/23.x/polly/docs/ReleaseNotes.rst
Commit: a08a26c9716d7939619ec620b6814b0983ac4499
https://github.com/llvm/llvm-project/commit/a08a26c9716d7939619ec620b6814b0983ac4499
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlan.h
M lldb/source/API/SBThread.cpp
M lldb/source/Commands/CommandObjectThread.cpp
M lldb/source/Target/ThreadPlan.cpp
M lldb/test/API/functionalities/thread/step_until/TestStepUntilAPI.py
Log Message:
-----------
[lldb] Share the address lookup of thread until and StepOverUntil (#226978)
`thread until` and `SBThread::StepOverUntil` turned their targets into
addresses using different code. This commit introduces a helper function
`GetStepUntilAddresses` to unify behavior and the error message.
It resolves lines as `thread until` did: a line without line table
entries resolves to the nearest following line with entries. For
StepOverUntil, a line that is only the call site of an inlined function
now resolves that way too.
The wording of errors is that of `thread until`.
Commit: c116a17d17790fac13a992b5a5822b56a9fa5702
https://github.com/llvm/llvm-project/commit/c116a17d17790fac13a992b5a5822b56a9fa5702
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
Log Message:
-----------
[clangd] Extract to Function: mark unmodified captured parameters const
Every captured variable was always passed by non-const reference, even when the extracted code never modifies it, resulting in misleading function signatures.
Determine, for each captured variable, whether it's ever (possibly) mutated within the extraction zone, and add `const` to the parameter's type when it isn't. Still passed by reference either way, to avoid a copy.
The check is folded directly into the existing zone traversal (`captureZoneInfo`'s `ExtractionZoneVisitor`), so its cost stays proportional to the size of the code being extracted. Direct mutations (assignment, increment/decrement, non-const method calls, explicit casts to non-const reference, non-const-reference call arguments, ...) are recognized precisely from each occurrence's immediate syntactic context. Anything that aliases a captured variable (a reference bound to it, its address taken, capture by reference in a lambda, a forwarding-reference call argument, a non-const-ref range-for loop variable) is conservatively treated as a possible mutation, without tracing whether the alias itself is later mutated -- trading a little precision in alias-heavy code for a simple, linear-cost check.
Array-typed captures are never made const, since array-to-pointer decay and array-element mutation have enough edge cases that it wasn't worth special-casing for a rare pattern.
Assisted-by: Claude
Commit: c3f8bcf2e4d78ca1ddb8d16542633b01230666c0
https://github.com/llvm/llvm-project/commit/c3f8bcf2e4d78ca1ddb8d16542633b01230666c0
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
Log Message:
-----------
[RISCV][P-ext] Support Packed Widening Unzip (#227211)
Commit: 077221346cd8daf8d65bca422834a9b0eeb0446a
https://github.com/llvm/llvm-project/commit/077221346cd8daf8d65bca422834a9b0eeb0446a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
A lldb/include/lldb/Host/windows/PathUtils.h
M lldb/source/Host/windows/FileSystem.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
M lldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
M lldb/unittests/Host/CMakeLists.txt
A lldb/unittests/Host/windows/PathUtilsTest.cpp
Log Message:
-----------
[lldb][Windows] Strip the extended-length prefix from host and process paths (#227373)
This patch introduces a helper function to strip the extended-length
path prefix from windows paths.
Commit: e2bef9257edfbf300acaa27d7db32b957fb5b511
https://github.com/llvm/llvm-project/commit/e2bef9257edfbf300acaa27d7db32b957fb5b511
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/NativeProcessWindows.cpp
Log Message:
-----------
[lldb][Windows] Lock the thread list when lldb-server accesses it (#226974)
`NativeProcessProtocol::Threads()` returns a `LockingAdaptedIterable`
that holds `m_threads_mutex` for the lifetime of the iteration, so
callers may hold references into `m_threads` across the loop body. On
Windows, this is only done when removing threads:
```
// OnCreateThread
m_threads.push_back(std::move(thread));
...
// OnExitThread
std::lock_guard<std::recursive_mutex> guard(m_threads_mutex);
llvm::erase_if(m_threads, ...);
```
`m_threads` is a `std::vector<std::unique_ptr<NativeThreadProtocol>>`.
When the debug-event thread appends and the vector reallocates, every
reference held by a concurrent iteration on the main loop dangles. This
takes lldb-server down with an access violation:
```
Exception Code: 0xC0000005
#0 NativeThreadProtocol::GetID NativeThreadProtocol.h:40
#1 GetJSONThreadsInfo GDBRemoteCommunicationServerLLGS.cpp:819
#4 Handle_jThreadsInfo
#8 GetPacketAndSendResponse
#9 DataAvailableCallback :1271
```
---
This patch takes `m_threads_mutex` everywhere `NativeProcessWindows`
touches `m_threads`: when adding threads in `OnDebuggerConnected` and
`OnCreateThread`, and when reading them in `Resume`, `StopThread`,
`UpdateThreads`, the halt path of `HandleBreakpointException`, and
`OnLoadDll`/`OnUnloadDll`.
Commit: 5cd469ffc98a9a58d19e9e9175a1255c74c02d0f
https://github.com/llvm/llvm-project/commit/5cd469ffc98a9a58d19e9e9175a1255c74c02d0f
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/test/AST/ByteCode/initializer_list.cpp
Log Message:
-----------
[clang][bytecode] Fix initializer-list edge cases (#227587)
Namely, initializer lists for primitive types and discarding the result
of an initializer list.
Commit: a17b670dd1f7e5152cd5269f1c5993233ab9fe32
https://github.com/llvm/llvm-project/commit/a17b670dd1f7e5152cd5269f1c5993233ab9fe32
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu-flat.mir
M llvm/test/CodeGen/AMDGPU/move-load-addr-to-valu.mir
Log Message:
-----------
AMDGPU: Mark SCC clobber dead when moving scalar branches to VALU (#227635)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3bb80e1a055d2aa9ff3771a12027d75f45e96d03
https://github.com/llvm/llvm-project/commit/3bb80e1a055d2aa9ff3771a12027d75f45e96d03
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-trap-gfx11.mir
Log Message:
-----------
AMDGPU: Mark scc clobbers in the simulated trap expansion dead (#227633)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8c3cdbdc6aa5c3c6610808a79c0596488cb9ee73
https://github.com/llvm/llvm-project/commit/8c3cdbdc6aa5c3c6610808a79c0596488cb9ee73
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
A clang/test/AST/ByteCode/matrix.c
Log Message:
-----------
[clang][bytecode] Reject matrix lvalue-to-rvalue casts in non-HLSL (#227305)
To fix test/CodeGen/AArch64/abi-classify-return-types.c.
The code path in the existing tests in
`test/SemaHLSL/Types/BuiltinMatrix/MatrixConstantExpr.hlsl` don't go
though `CheckLiteralType()`, so aren't rejected.
Commit: 91eed82382e54920e42b8febd23d07d0c115156d
https://github.com/llvm/llvm-project/commit/91eed82382e54920e42b8febd23d07d0c115156d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/atomicrmw-fmin-fmax.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-brcond.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.wqm.demote.ll
M llvm/test/CodeGen/AMDGPU/codegen-prepare-addrspacecast-non-null.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
Log Message:
-----------
AMDGPU/GlobalISel: Mark SCC clobbers on control flow pseudos dead (#227636)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: f81343e37c247c5d7e01b89d4ca7c6c52f12cfdc
https://github.com/llvm/llvm-project/commit/f81343e37c247c5d7e01b89d4ca7c6c52f12cfdc
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M libcxx/include/__numeric/saturation_arithmetic.h
M libcxx/include/__vector/vector.h
Log Message:
-----------
[libc++] Optimize vector::emplace_back slow path (#222016)
This improves the code size of the slow path by removing some redundant
checks.
Commit: 5af4e0eb2bdc8c5495c3cfade9f75e3ff402c5a7
https://github.com/llvm/llvm-project/commit/5af4e0eb2bdc8c5495c3cfade9f75e3ff402c5a7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanUnroll.cpp
Log Message:
-----------
[VPlan] Pass result type to VPBuilder::createSingleScalarOp (NFC). (#227659)
This removes another use of the underlying value to get the result type
for casts. For other recipes, it just adds an additional consistency
check for now.
Commit: 8e204a1bd149caf9371b05f5bb923b548fdfac78
https://github.com/llvm/llvm-project/commit/8e204a1bd149caf9371b05f5bb923b548fdfac78
Author: Stefan Gränitz <stefan.graenitz at gmail.com>
Date: 2026-09-30 (Wed, 30 Sep 2026)
Changed paths:
M llvm/docs/WritingAnLLVMPass.md
M llvm/unittests/CodeGen/CGPluginTest/Plugin/Plugin.cpp
Log Message:
-----------
[llvm][test][CGPluginTest] Avoid __attribute__((constructor)) for MSVC (#227310)
`__attribute__((constructor))` isn't supported by MSVC. This patch
replaces the initializer function with a static object whose constructor
performs the pass registration.
Compare: https://github.com/llvm/llvm-project/compare/7018e8d6e284...8e204a1bd149
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