[all-commits] [llvm/llvm-project] 4f92da: [MLIR] Fix mlir-reduce splitting smallest range in...
Adam Smith via All-commits
all-commits at lists.llvm.org
Tue Sep 29 15:04:42 PDT 2026
Branch: refs/heads/users/adams381/cir-callconv-indirect-variadic
Home: https://github.com/llvm/llvm-project
Commit: 4f92dab3bff4c09d78ac3d4567633f2604320446
https://github.com/llvm/llvm-project/commit/4f92dab3bff4c09d78ac3d4567633f2604320446
Author: Daria Sukhonina <dariasukhonina at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/docs/Tools/mlir-reduce.md
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/test/mlir-reduce/reduction-tree/doc-example.mlir
A mlir/test/mlir-reduce/reduction-tree/except-last.mlir
A mlir/test/mlir-reduce/script/except-last.sh
Log Message:
-----------
[MLIR] Fix mlir-reduce splitting smallest range instead of the largest one (#214738)
The function `max_element` expects comparison lambda function to return
true if first argument is **less** than the second one, which is the
opposite to the current code.
Commit: 348d23c3b238016836d84ba30aa573ba3a39649d
https://github.com/llvm/llvm-project/commit/348d23c3b238016836d84ba30aa573ba3a39649d
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
Log Message:
-----------
[libc++][chrono] Initialize optional tm_zone member in __convert_to_tm (#220068)
Defensively initialize `struct tm`'s optional `tm_zone` member in
`__convert_to_tm` before passing it to `strftime` or `time_put`.
`tm_zone` is a BSD extension standardized in POSIX.1-2024, but is not
part
of standard C or C++ (and is absent on Windows). Instead of guarding
with
`#ifdef __GLIBC__`, use `if constexpr (requires ...)` so it is
initialized
on all platforms that provide it (such as Bionic, musl, macOS, and BSDs,
whether typed as `const char*` or `char*`).
Assisted-by: Gemini
Commit: 8d752fbc26fe62687b8005438c66e55191fb2db3
https://github.com/llvm/llvm-project/commit/8d752fbc26fe62687b8005438c66e55191fb2db3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
Log Message:
-----------
[SLP][NFC]Broader use of filter/isa ranges
Most of loops of the form "for (...) { if (cond) continue; ... }"
become make_filter_range, and dyn_cast-and-skip loops become
make_isa_range.
Assisted-by: Cursor
Reviewers: bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226535
Commit: 385d0745697eb9ec81617eeaebe62bc5280cf3a0
https://github.com/llvm/llvm-project/commit/385d0745697eb9ec81617eeaebe62bc5280cf3a0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 5c20fe98552a (#227114)
Commit: cdbca60c7d5f41ec7f332341f97f16e4e2e221cb
https://github.com/llvm/llvm-project/commit/cdbca60c7d5f41ec7f332341f97f16e4e2e221cb
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
A llvm/test/CodeGen/NVPTX/infer-volatile-address-spaces.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
A llvm/test/Transforms/InferAddressSpaces/NVPTX/volatile.ll
Log Message:
-----------
[InferAddressSpaces] Check volatile support in the destination AS (#224702)
Perviously we nonsensically checked the old address space...
Avoid introducing a regression by adding ADDRESS_SPACE_SHARED_CLUSTER to
NVPTX hasVolatileVariant.
Commit: dc306a24fefef0e3cbde890bc25e30d4b753498f
https://github.com/llvm/llvm-project/commit/dc306a24fefef0e3cbde890bc25e30d4b753498f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
Log Message:
-----------
[HLSL] Build elementwise cast results from poison (#225591)
I noticed this unnecessary alloca while doing this pr:
https://github.com/llvm/llvm-project/pull/225519
The change is to initialize vector and matrix elementwise cast results
with poison instead of loading uninitialized temporary storage.
We do this because every result element is overwritten before use,
making the temporary allocation and load unnecessary.
Commit: c5f99a117bd799b43cd26880a9dccb96b33767ff
https://github.com/llvm/llvm-project/commit/c5f99a117bd799b43cd26880a9dccb96b33767ff
Author: Borys Perski <borys.perski at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/CodeGen/X86/sse41-builtins-constrained.c
M clang/test/CodeGen/X86/sse41-builtins.c
Log Message:
-----------
[clang][X86] Fix round builtins tests (#226708)
Fixed minor issues in round builtins tests. Noticed them while working on #215787.
Commit: a69848d73eb5134b86c56ed9937b6a91d84472f9
https://github.com/llvm/llvm-project/commit/a69848d73eb5134b86c56ed9937b6a91d84472f9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude find-first-byte-nested.ll (#227121)
We only fixed x86 for LoopIdiom. PR #225576 added a test that looks like
it's just exposing existing propagation issues.
Commit: 285a8656517a05596a91a8f104c9c6b592b8e144
https://github.com/llvm/llvm-project/commit/285a8656517a05596a91a8f104c9c6b592b8e144
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/secondary/clang/tools/clang-repl/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/lli/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-jitlink/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Passes/Plugins/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/DynamicLibrary/BUILD.gn
M llvm/utils/gn/secondary/third-party/unittest/unittest.gni
Log Message:
-----------
[gn] Build executables without exported symbols on macOS (#227120)
Speeds up `clang --version` from 12 ms to 4 ms on my system. 8 ms faster
startup isn't a lot, but there's also no reason not to do it.
No intended behavior change.
Commit: a8debc5a8610b955b2756ea349630a00724450bc
https://github.com/llvm/llvm-project/commit/a8debc5a8610b955b2756ea349630a00724450bc
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Target/Cpp/CppEmitter.h
Log Message:
-----------
Add registerToCppTranslation to CppEmmitter.h (#226337)
Currently if one wants to register `mlir-to-cpp` out of tree, they must
include `mlir/InitAllTranslations.h` and depend transitively on all
translation targets (in bazel, `@llvm-project//mlir:AllTranslations`).
This change adds the registration declaration to `CppEmitter.h` so that
one can depend just on the `MLIRTargetCpp` target (or
`@llvm-project//mlir:TargetCpp` in bazel).
This matches the organization of the SMTLib codegen registration in
`mlir/include/mlir/Target/SMTLIB/ExportSMTLIB.h` (though some other
targets like `IRDLToCpp` do it differently).
Commit: 6ab3be2e5efa370c8ca539b1f5a312d7e9b2fb65
https://github.com/llvm/llvm-project/commit/6ab3be2e5efa370c8ca539b1f5a312d7e9b2fb65
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/build/mac_sdk.gni
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: 4ca8a56ba3c579c01c3a9e30c6b972b8baaad208
https://github.com/llvm/llvm-project/commit/4ca8a56ba3c579c01c3a9e30c6b972b8baaad208
Author: Hugo Melder <service at hugomelder.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGObjCRuntime.cpp
A clang/test/CodeGenObjC/exceptions-seh.m
Log Message:
-----------
[ObjC][SEH] Fix clang crash when using finally statements (#176779)
When targeting a platform that does not have funclet-based EH, we push
the finally cleanup (normal edge) and catchall (unwind edge) onto the
EHStack _before_ pushing all catch handlers. The try statement is then
emitted and catch handlers popped from EHStack. Last, the finally
cleanup is popped from EHStack.
For funclet-based EH, we outline and push the finally funclet (of type
`NormalAndEHCleanup`) onto the EHStack _after_ pushing the catch
handlers and never pop it. This results in a crash during codegen when
we try to emit the catch handlers. Not popping the finally cleanup from
the EHStack results in incorrect calls to cleanup handlers in nested
try/catch/finally statements.
I fixed the two issues by:
1. Pushing the finally cleanup first, and
2. Popping it at the end of `CGObjCRuntime::EmitTryCatchStmt`.
Fixes #51899
Commit: c021bb407f8eb2e3dac57cae5760a258a4564f5c
https://github.com/llvm/llvm-project/commit/c021bb407f8eb2e3dac57cae5760a258a4564f5c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: c87ad07c33661ca39ec512c834d01f17375673f4
https://github.com/llvm/llvm-project/commit/c87ad07c33661ca39ec512c834d01f17375673f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
Log Message:
-----------
[SLP][NFC]Fix build for MSVC compiler, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/46/builds/42017
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227129
Commit: 64907b6d3201f1755a149d029b3a65c4e0ee663f
https://github.com/llvm/llvm-project/commit/64907b6d3201f1755a149d029b3a65c4e0ee663f
Author: Joel Dice <joel.dice at akamai.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
M libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
Log Message:
-----------
fix Wasm exceptions + coop threading + shared libraries (#222747)
Prior to this commit, the combination of Wasm exception handling,
cooperative multithreading, and shared libraries was broken.
Specifically, the code generation in `WasmEHPrepare.cpp` involved
direct, cross-library access to `libunwind.so`'s thread-local
`__wasm_lpad_context` variable. However, the ABI used for cooperative
multithreading does not support cross-library access to thread-local
variables.
The solution used here is to add a new `_Unwind_GetWasmLPadContext`
function to `libunwind.so` and use that to get address of the
`__wasm_lpad_context` for the current thread, both in the code generated
by `WasmEHPrepare.cpp` and in the `__gxx_wasm_personality_v0` function
defined in `cxa_personality.cpp`. I've used this strategy
unconditionally for all targets, regardless of whether cooperative
multithreading and/or position-independent are enabled. If desired (e.g.
for performance or code complexity reasons), I could make it conditional
on both of those features being enabled and fall back to using
`__wasm_lpad_context` directly otherwise.
Co-authored-by: Derek Schuff <dschuff at chromium.org>
Commit: c6b15d38928d586064932c3cc26d8c777e104196
https://github.com/llvm/llvm-project/commit/c6b15d38928d586064932c3cc26d8c777e104196
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/wasm/InputFiles.cpp
Log Message:
-----------
[lld][WebAssembly] Fix error message when linking wasm64 file with -mwasm32 (#227091)
When `-mwasm32` is explicitly passed and a wasm64 object file is linked,
the error message previously stated:
"wasm32 object file can't be linked in wasm64 mode". Fix this to report
that the wasm64 object file cannot be linked in wasm32 mode.
Commit: 60f717946cb5ca911b6be22169b9bd646225c59f
https://github.com/llvm/llvm-project/commit/60f717946cb5ca911b6be22169b9bd646225c59f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[libc++] Move test tools CI job back to k8s runner sets (#226564)
While the issue with k8s runners in #226230 is still not resolved, it is
better to target the k8s runners and get transient failures than to
target the old runners and have the jobs hang forever (there seems to be
no runners registered in llvm-premerge-libcxx-runners).
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 6fee55d8425e735e652968007ee0d6bc35aa6f26
https://github.com/llvm/llvm-project/commit/6fee55d8425e735e652968007ee0d6bc35aa6f26
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bind-c20.f90
A flang/test/Semantics/bind-c21.f90
Log Message:
-----------
[flang][Semantics] Warn on BIND(C) interfaces with assumed-shape/rank dummies (#225965)
## Motivation
Fortran 2018 §18.3.6 requires assumed-shape, deferred-shape, and
assumed-rank `BIND(C)` dummy arguments to be passed using a CFI
descriptor (`CFI_cdesc_t`). Some existing C/C++ interfaces predate this
requirement and expect such an argument to be passed by bare address
instead. Declaring a `BIND(C)` Fortran interface against such code
currently produces a silent calling-convention mismatch — no diagnostic
warns the user that the ABI they've declared doesn't match what
pre-2018 C/C++ code expects.
## What this PR does
Adds a portability warning in `CheckSubprogram`
(`flang/lib/Semantics/check-declarations.cpp`) that fires when a
`BIND(C)` interface declares an assumed-shape or assumed-rank dummy
argument, under a new `UsageWarning` category, `BindCArrayDescriptor`.
The warning is **off by default** and enabled by `-pedantic` (or
individually via `-Wbind-c-array-descriptor`), matching the existing
precedent set by other portability-only categories in the same enum
(e.g. `CharacterInteroperability`, `LogicalVsCBool`).
To avoid firing on compiler-provided runtime libraries that
legitimately dispatch through CFI-descriptor-consuming `BIND(C)`
wrappers (e.g. an OpenACC runtime module's internal specific procedures
for generic entry points like `acc_copyin`), the warning is suppressed
when the `BIND(C)` binding name — explicit or the implicit default —
starts with `_`, which marks an implementation-internal interface
rather than genuine external interoperability.
This is a **pure diagnostic** — no lowering, `LoweringOptions`, or
codegen changes of any kind. It does not alter how any argument is
actually passed.
## Test plan
- `flang/test/Semantics/bind-c20.f90`: assumed-shape and assumed-rank
dummies warn under `-pedantic` (both default and explicit `BIND(C)
NAME=`); explicit-shape dummies and a leading-underscore binding name
do not.
- `flang/test/Semantics/bind-c21.f90`: the same
assumed-shape/assumed-rank
interfaces produce no diagnostic without `-pedantic`.
- Existing `flang/test/Semantics` and `flang/test/Lower/HLFIR` lit
suites
(1752 tests) pass.
- Verified no false positives against real OpenACC (`use openacc`,
`-acc=gpu`) and CUDA Fortran (`use cudafor`, `-cuda`) runtime API
calls, plus a static scan of all `cu*.mod` runtime interface modules
confirming none use the assumed-shape/rank `BIND(C)` pattern this
warning targets outside the excluded underscore-prefixed convention.
- Full `precommit.py` regression run found zero regressions
attributable to this change (all observed failures traced to an
unrelated, pre-existing upstream crash, confirmed via an A/B control
build with this change fully reverted).
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: f95e5ea5a5eb719e05754de235aaba8e20e6a36b
https://github.com/llvm/llvm-project/commit/f95e5ea5a5eb719e05754de235aaba8e20e6a36b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
Log Message:
-----------
[gn] Fix Interpreter/emulated-tls.cpp on mac (#227132)
In, #225475 (5dfe8605911e), CLANG_HAVE_EMUTLS_GET_ADDRESS got hardcoded
to 0 in the GN build, while the CMake build has a config-time check for
__emutls_get_address.
On mac and linux, compiler-rt provides that symbol, so set
CLANG_HAVE_EMUTLS_GET_ADDRESS to 1 there. That way, __emutls_get_address
is force-linked as absolute symbol and things are happy.
(With it set to 0. clang-repl dlsym()s for the symbol, which works on
Linux where it's found in libgcc_s.so.1, but it doesn't work on mac.)
Commit: 9f009662f3fba1d8955e5e79261c60c2f98d24b6
https://github.com/llvm/llvm-project/commit/9f009662f3fba1d8955e5e79261c60c2f98d24b6
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][OpenACC] Record gang(static:) chunk size on lowered loops (#227037)
Lower OpenACC `gang(static:)` through compute lowering as
`acc.chunk_size`. A constant size is stored directly; `static:*` and a
non-constant size are recorded as -1. `gang(static:)` also maps to gang
dimension 1.
Commit: bc1a55167c5b0c32a755ce51597bd35a9db85660
https://github.com/llvm/llvm-project/commit/bc1a55167c5b0c32a755ce51597bd35a9db85660
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/callchain.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
A llvm/test/CodeGen/NVPTX/fp-global.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
A llvm/test/CodeGen/NVPTX/odd-integer-width.ll
M llvm/test/CodeGen/NVPTX/param-align.ll
A llvm/test/CodeGen/NVPTX/ptr-global.ll
M llvm/test/CodeGen/NVPTX/vector-global.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: 5b3ae0006a69c8a6c3cb8c1dddf3556f413aa037
https://github.com/llvm/llvm-project/commit/5b3ae0006a69c8a6c3cb8c1dddf3556f413aa037
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: 1637562456ab8561fa2602a438604cac3ddf4bd0
https://github.com/llvm/llvm-project/commit/1637562456ab8561fa2602a438604cac3ddf4bd0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: e59523e9a9dece16edb17341ee14ade7be8753a9
https://github.com/llvm/llvm-project/commit/e59523e9a9dece16edb17341ee14ade7be8753a9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: f85fe6efc523b4f9d2ecb11ccaeefef49ab5e6f3
https://github.com/llvm/llvm-project/commit/f85fe6efc523b4f9d2ecb11ccaeefef49ab5e6f3
Author: Ian Anderson <iana at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
M clang/test/Driver/Inputs/MacOSX15.1.sdk/SDKSettings.json
M clang/test/Driver/modulemap-allow-subdirectory-search.c
M clang/test/InstallAPI/Inputs/MacOSX13.0.sdk/SDKSettings.json
Log Message:
-----------
[NFC][darwin][test] Fix the hand spacing in the SDKSettings files (#227133)
I hand spaced the VersionMap keys in the SDKSettings files to make it
easier to see where the gaps are where a version of Xcode updated one
SDK but not the other. I almost got them all right, but mis-spaced one
in macOS_iOSMac.
Commit: d718391361333d378a5bce643bbdef553f81c203
https://github.com/llvm/llvm-project/commit/d718391361333d378a5bce643bbdef553f81c203
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
A flang/test/Semantics/OpenACC/acc-routine-loop-nesting.f90
Log Message:
-----------
[flang][acc] Warn when a loop is above its routine parallelism level (#227041)
OpenACC spec allows a routine to parent a loop at its own parallelism
level or below. A higher level is not allowed: gang inside a worker
routine, gang or worker inside a vector routine, gang, worker, or vector
inside a seq routine, and a gang dimension above the routine's gang
dimension. A device-specific routine clause counts the same way.
Flang accepted these loops with no diagnostic. Warn that the clause is
ignored. A loop at the same level or below is left alone, and illegal
nesting of loops remains an error.
Commit: fbac8e1ff3b8b733183e677f49be73ab2210d7df
https://github.com/llvm/llvm-project/commit/fbac8e1ff3b8b733183e677f49be73ab2210d7df
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow G_SMIN/G_SMAX operands and mask sign sensitive results (#226957)
This PR includes `G_SMIN` and `G_SMAX` to the list of sign sensitive
ops. It also masks the result of the sign sensitive ops to their
original widths with a bitwise AND because the later users assume the
upper bits are zero and without masking they read the wrong value.
Commit: 0ec4a7fe84cde933c044dafdcf5cfd983f7d086c
https://github.com/llvm/llvm-project/commit/0ec4a7fe84cde933c044dafdcf5cfd983f7d086c
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
Log Message:
-----------
[lldb/test] Normalize appletvos to tvos in getPlatform() (#227138)
Mirror the existing `iphoneos` -> `ios` SDK-name normalization for
`tvOS`. Without it, an `--apple-sdk` value derived from "appletvos" made
`getPlatform()` return "appletvos", which isn't in
`lldbplatform.__name_lookup`, so `platformIsDarwin(`) returned `False`
and `finalize_build_dictionary` KeyError'd before any `remote-tvos` test
could build.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: c894e63329c144702bd560a8807d17b489e0484b
https://github.com/llvm/llvm-project/commit/c894e63329c144702bd560a8807d17b489e0484b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227147)
We are seeing this issue in the libc++ runner sets and it can presumably
pop up in the libc runner sets as well in the case of an abnormally long
clone operation.
Commit: b1faf8bc3ebbbe70daaac47a5fcd49006be3709e
https://github.com/llvm/llvm-project/commit/b1faf8bc3ebbbe70daaac47a5fcd49006be3709e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatform.py
Log Message:
-----------
[lldb/test] Register xros (visionOS) as a Darwin platform (#227142)
`lldbplatform.py` never registered `xros` at all: no enum value, no
`__name_lookup` entry, and it was absent from `__darwin_embedded`/
`darwin_all`. As a result, `platformIsDarwin()` returned `False` for
`xros`, and `finalize_build_dictionary`'s fallback branch, which indexes
`platform_name_to_uname` by the raw platform name, would `KeyError`
before any visionOS test could build.
Add `xros` alongside the other embedded Darwin platforms so it's
recognized the same way `ios`/`tvos`/`watchos`/`bridgeos` already are.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 619028d062d90579edb0e80fd2c0a870f83cce84
https://github.com/llvm/llvm-project/commit/619028d062d90579edb0e80fd2c0a870f83cce84
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude DirectX (#227157)
I don't think anyone runs profiling on DirectX, so exclude it for now.
Also move AMDGPU to the normal exclusion list given there are efforts
around PGO for AMDGPU currently.
Commit: 7b5ec23c6053560e306fce71a4332e2b9793dd7e
https://github.com/llvm/llvm-project/commit/7b5ec23c6053560e306fce71a4332e2b9793dd7e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
R llvm/test/tools/llvm-readobj/ELF/RISCV/eflags-abi.test
A llvm/test/tools/llvm-readobj/ELF/RISCV/eflags.test
Log Message:
-----------
[RISCV][llvm-readobj] Generalize the eflags-abi test to cover all of the eflags. NFC (#227152)
Assisted-by: Claude
Commit: 78f2beb7655e19b3f5a8c55dda3f7b8b20771bed
https://github.com/llvm/llvm-project/commit/78f2beb7655e19b3f5a8c55dda3f7b8b20771bed
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelForToNestedFors.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
A mlir/test/Conversion/SCFToOpenMP/scf-to-openmp-unsigned.mlir
M mlir/test/Dialect/Async/async-parallel-for-async-dispatch.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
M mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
M mlir/test/Dialect/SCF/parallel-to-nested-fors.mlir
A mlir/test/Transforms/parallel-loop-collapsing-unsigned.mlir
Log Message:
-----------
[mlir][scf] Add unsignedCmp to scf.parallel and use it in the tiling in-bound check (#226130)
This change mirrors `scf.for` where `scf.parallel` gets an `unsignedCmp`
unit attribute, and every pass that rebuilds or lowers a `scf.parallel`
has to respect it:
- Propagate where a loop is rebuilt from another, such as parallel loop
tiling, parallel loop fusion (which also refuses to fuse loops of
different signedness), parallel-to-nested-fors and SCF-to-CF lowering.
- Decline where the bound arithmetic assumes signed values, such as
SCF-to-GPU, SCF-to-OpenMP, async-parallel-for and the
parallel-loop-collapsing test pass.
Fixes #223233
Commit: 9a0c255ce1efbd80ef501e8151d123876fa4b5d4
https://github.com/llvm/llvm-project/commit/9a0c255ce1efbd80ef501e8151d123876fa4b5d4
Author: Owen Rodley <orodley at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/test/Instrumentation/cgprofile.ll
M llvm/test/Transforms/JumpTableToSwitch/profile-no-guid-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-prob-1.ll
M llvm/test/Transforms/PGOProfile/Inputs/cspgo_bar_sample.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_use.ll
M llvm/test/Transforms/PGOProfile/icp_invoke.ll
M llvm/test/Transforms/PGOProfile/icp_invoke_nouse.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/tools/gold/X86/Inputs/thinlto_cspgo_bar.ll
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.c
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.proftext
A llvm/test/tools/llvm-profdata/guid-roundtrip.test
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[InstrProf] Replace !PGOFuncName and !PGOName metadata with !guid (#214134)
!PGOFuncName and !PGOName metadata were attached to internal functions
and vtables during profile annotation to record their original
"<file>;<name>" PGO names before ThinLTO promoted and renamed them. In
post-link LTO passes, InstrProfSymtab read that metadata back so profile
records keyed by the original name's hash could still find the renamed
IR object.
Global objects now carry stable !guid metadata assigned before LTO
renaming, which records the MD5 hash of the original PGO name directly.
See: https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801
Use !guid instead of maintaining separate PGO name metadata:
- Stop emitting and reading !PGOFuncName and !PGOName in Clang and
PGOInstrumentation, and remove the metadata helper functions
(createPGOFuncNameMetadata, createPGONameMetadata,
getPGOFuncNameMetadata, and the metadata name getters).
- Unify getIRPGOFuncName(const Function &) and
getPGOName(const GlobalVariable &) into
getIRPGOObjectName(const GlobalObject &).
- In InstrProfSymtab::addFuncWithName and addVTableWithName, key each
name by its own hash as before, and also insert the object's assigned
GUID into MD5FuncMap / MD5VTableMap when it differs from the PGO name
hash. This lets lookups find functions and vtables that LTO has
renamed while preserving lookups by current, deprecated, and canonical
names.
- Remove obsolete !PGOFuncName metadata from test inputs, update the
ThinLTO ICP tests to check for !guid, and add symtab unit tests and an
llvm-profdata text/indexed round-trip test.
Assisted-by: Antigravity
Commit: eabb90030e7908fd2f15d77198c8b1e88f5463a4
https://github.com/llvm/llvm-project/commit/eabb90030e7908fd2f15d77198c8b1e88f5463a4
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU] Canonicalize constant operands of sudot intrinsics (#226478)
Move a constant multiplicand and its sign flag to the second operand.
For example:
```
sudot4(true, 1, false, x, acc, clamp)
->
sudot4(false, x, true, 1, acc, clamp)
```
Commit: f896873b4dddca59ec3c18487cf3f1cf6545df1e
https://github.com/llvm/llvm-project/commit/f896873b4dddca59ec3c18487cf3f1cf6545df1e
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV][P-ext] Support the missing packed pair (#226992)
This patch supports the packed pair for v2i16.
Some are inconsistent with the spec because existing shuffle-lowering
transforms them into equivalent narrowing shifts or zips.
Commit: 31d7b51dbd5a8a5e58631a3c77421209f562ea5c
https://github.com/llvm/llvm-project/commit/31d7b51dbd5a8a5e58631a3c77421209f562ea5c
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/AST/ByteCode/new-delete.cpp
R clang/test/SemaCXX/new-nothrow-by-value.cpp
Log Message:
-----------
[Clang] Add missing release note entry in #226753 (#227078)
As per the feedback from #226753, we add release note for GH-212211.
Also move the test to new-delete.cpp.
Assisted-by: Claude
Commit: 60ac6298c2e70aeeeac1ae388024bbe30f25784a
https://github.com/llvm/llvm-project/commit/60ac6298c2e70aeeeac1ae388024bbe30f25784a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/return-value-select-pgo.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[TailCallElim] Add profile annotations to return value selects
Tail call elimination in some cases can create selects on possible
return values conditioned on whether or not execution is currently in
what was a recursive call. That is equal to the probability with which
we recurse, which in turn can be computed from the block frequencies of
blocks that recurse and blocks that directly return.
Reviewers: mtrofin
Reviewed By: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/202518
Commit: dae88f2450b03f9a123cd681a7f698f67bde9ece
https://github.com/llvm/llvm-project/commit/dae88f2450b03f9a123cd681a7f698f67bde9ece
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGenCoroutines/coro-agg.cpp
Log Message:
-----------
[CIR] Support aggregate co_await / co_yield in AggExprEmitter (#225412)
Support evaluating `co_await` and `co_yield` expressions whose result is
an aggregate type in `AggExprEmitter`.
Fixes #225317
Commit: 3b0b6d892bdf4eecf4d6fbccf26c6d91fec2d164
https://github.com/llvm/llvm-project/commit/3b0b6d892bdf4eecf4d6fbccf26c6d91fec2d164
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
R clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
Revert "releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation"" (#227123)
Reverts llvm/llvm-project#226930
AMD author has an additional step to perform, that is still needed.
in contact with Author.
Commit: ec1b3b10a71c2181b0dfb90f1178e2e739680e02
https://github.com/llvm/llvm-project/commit/ec1b3b10a71c2181b0dfb90f1178e2e739680e02
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
R flang/test/Fir/CUDA/cuda-function-rewrite.mlir
A flang/test/Fir/CUDA/cuda-on-device.mlir
M flang/test/Fir/cuf.mlir
A flang/test/Lower/CUDA/cuda-on-device.cuf
Log Message:
-----------
[flang][cuda] Add cuf.on_device op and lower to it (#227089)
Replace the CUFFunctionRewrite pass, which matched fir.call names and
folded them to constants, with a cuf.on_device operation emitted when
the intrinsic is lowered. CUFOpConversion folds the operation once the
code is in its host or device context, and leaves the host copy of an
OpenACC routine unfolded so the device clone is not baked to false. Any
operation that remains is folded by the late CUF conversion, and the
rewrite pass is dropped from the pipeline.
Commit: eb3163c52e9fbea9c579c16bdb881655fb6536d5
https://github.com/llvm/llvm-project/commit/eb3163c52e9fbea9c579c16bdb881655fb6536d5
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Builder/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ec1b3b1 (#227180)
This fixes ec1b3b10a71c2181b0dfb90f1178e2e739680e02 (#227089).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ec1b3b10a71c2181b0dfb90f1178e2e739680e02
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 2f13592fb1dee32d498c3ec2993d5f109e614abe
https://github.com/llvm/llvm-project/commit/2f13592fb1dee32d498c3ec2993d5f109e614abe
Author: Prajit Rahul <prajitrahul05 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/ControlFlow/invalid.mlir
M mlir/test/Dialect/ControlFlow/ops.mlir
Log Message:
-----------
[mlir][cf] Fix cf.switch round-trip for case values wider than 64 bits (#221490)
The `cf.switch` parser reads case values into `int64_t`, and its printer
uses `APInt::getLimitedValue()`, preventing values wider than 64 bits
from round-tripping. Printing negative narrow values as unsigned can
also trigger an assertion when reparsing.
Parse case values into `APInt` and print them directly, so wide and
negative values round-trip correctly. Accept signed or unsigned literals
that fit the switch operand’s bit width, and report an error for values
that do not.
Add regression tests for wide and negative values, integer-width
boundaries, out-of-range diagnostics, and case selection after parsing.
Fixes #220609
Assisted-by: Codex
Commit: fddfd6f01e3f203df3fc1d7fc7769bcb9745d0fa
https://github.com/llvm/llvm-project/commit/fddfd6f01e3f203df3fc1d7fc7769bcb9745d0fa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
A clang/lib/AST/ByteCode/EvalSettings.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Add `EvalSettings` struct and replace parent `State` (#226175)
We currently always construct a full `EvalInfo` when using the bytecode
interpreter, we then pass it to the `evaluate*` function, which only
copies a few values from it.
Introduce a new `EvalSettings` struct that we pass instead of a `State`.
This is cheaper to construct and we only pass what's needed. There is
one `evaluateAsRValue` overload left that takes a parent `State`, that
will be removed in a subsequent patch.
Commit: f4085066128ac709f25c206c9701285f60a0bf83
https://github.com/llvm/llvm-project/commit/f4085066128ac709f25c206c9701285f60a0bf83
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/pack-indexing.cpp
Log Message:
-----------
[CIR] Support PackIndexingExpr for LValue and Aggregates (#227040)
Support `PackIndexingExpr` in `CIRGenFunction::emitLValue` and
`AggExprEmitter` by visiting its selected expression, matching classic
Clang codegen (`CGExpr.cpp` and `CGExprAgg.cpp`) and completing
`PackIndexingExpr` support across all CIR expression emitters.
Fixes #226928
Assisted by Antigravity and Gemini
Commit: 3376b1f4b2f4db8c7f5c94323e6c9a730d974247
https://github.com/llvm/llvm-project/commit/3376b1f4b2f4db8c7f5c94323e6c9a730d974247
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/ELF/pre_init_fini_array.s
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/MC/AsmParser/section_names.s
M llvm/test/MC/ELF/section.s
Log Message:
-----------
[MC,ELF] Set sh_entsize for SHT_INIT_ARRAY/FINI_ARRAY/PREINIT_ARRAY (#226875)
Match GNU Assembler: set sh_entsize to 4/8, regardless of sh_size. This
is mostly cosmetic: sh_entsize is not a useful member for non-merge
sections.
When clang-produced and GCC-produced objects are linked together, the
mismatch makes lld's output sh_entsize 0.
Commit: c5a5943133d558b7bae36fe3074e7777178e7a6e
https://github.com/llvm/llvm-project/commit/c5a5943133d558b7bae36fe3074e7777178e7a6e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[X86][InstCombine] Fix profcheck failures (#227183)
When optimizing some AVX512 masked intrinsics, we would create a select
with a condition derived from the mask. We cannot infer the distribution
of this synthesized condition, so mark it unknown to make profcheck
green.
Commit: 9fe649af67007493c02108b484c8b9259e3d522e
https://github.com/llvm/llvm-project/commit/9fe649af67007493c02108b484c8b9259e3d522e
Author: Vladimir Shiryaev <w at tagolog.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
A llvm/test/tools/llvm-cas/validate-if-needed.test
Log Message:
-----------
[CAS] Close the stderr temp file of the out-of-process validator (#226844)
Commit: ef45ca75ce721745b997db165f18e4fdf9e93294
https://github.com/llvm/llvm-project/commit/ef45ca75ce721745b997db165f18e4fdf9e93294
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV] Add common check-prefix to rvp-intrinsics.c. NFC (#227044)
A large number of test cases have the same IR for RV32 and RV64.
Commit: 876ff1506413684af43a3a61fd4ca3b999000aff
https://github.com/llvm/llvm-project/commit/876ff1506413684af43a3a61fd4ca3b999000aff
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
A llvm/test/MC/Hexagon/v79-nontemporal.s
Log Message:
-----------
Add v79 scalar non-temporal forms. (#226017)
Also add support for the non-temporal forms of dcfetch and dczeroa.
Fixes https://github.com/llvm/llvm-project/issues/221485
Commit: ba67350bf808d8bef21cc2d59d7bcd0396adc29d
https://github.com/llvm/llvm-project/commit/ba67350bf808d8bef21cc2d59d7bcd0396adc29d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
Log Message:
-----------
[clang] Consistently cache failed constraint normalization (#227086)
Previously, if substituting the parameter mappings of a normalized
constraint failed, Sema::getNormalizedAssociatedConstraints() returned
nullptr, but it stored the partially substituted normal form in
NormalizationCache. So the first lookup for such a declaration failed,
but every later lookup returned the broken normal form, and subsumption
checking and the ambiguous-constraint diagnostics then continued with
it.
I believe this wasn't intentional:
- Before #161671 (e9972debc98c), normalization was a single step, and a
failure was cached as nullptr.
- #161671 added the parameter mapping substitution step. It inserted the
normal form into the cache before substituting, and returned nullptr if
the substitution then failed, leaving the non-null normal form in the
cache.
- #165352 (2984a8db804e) moved the insertion after the substitution to
not use an invalidated iterator, but kept inserting the normal form if
the substitution failed.
To fix this, cache failed substitution as nullptr, like a failed
normalization.
As a consequences we don't emit the diagnostics that were only emitted
because the second lookup continued:
- A second "'type name' declared as a pointer to a reference" error
(with its notes) for the same broken concept. For
template<typename T> concept Foo = True<T*>;
template<typename T> concept Bar = Foo<T&>;
template<typename T> requires Bar<T> struct S { };
template<typename T> requires Bar<T> && true struct S<T> { };
the error got reported once for the partial specialization, and also for
the primary template after. Now, we only have the first report.
- A "similar constraint expressions not considered equivalent" note and
its "similar constraint expression here" note, which we computed from
the broken normal form. The actual problem in that test is the broken
constraint, which is still diagnosed.
This also makes it possible to key the normalization cache by constraint
expression without changing which diagnostics are emitted for failures,
which I want to do in a follow-up.
Commit: 633223d573713822fafbff44a05459e4f27963ba
https://github.com/llvm/llvm-project/commit/633223d573713822fafbff44a05459e4f27963ba
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vshrn* intrinsics (#226382)
## summary
part of : https://github.com/llvm/llvm-project/issues/185382
Lower all intrinsics in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right-and-narrow
Assisted by : gpt-6-sol
Commit: 992ca79c83b0882465a202883109bd4cd167ec00
https://github.com/llvm/llvm-project/commit/992ca79c83b0882465a202883109bd4cd167ec00
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/binop-scalarize.ll
A llvm/test/Transforms/VectorCombine/cmp-scalarize.ll
M llvm/test/Transforms/VectorCombine/unary-op-scalarize.ll
Log Message:
-----------
[VectorCombine] Pass flags during IR creation (#193271)
Since commit 777d6b5, VectorCombine has been using InstSimplifyFolder to
simplify vector instructions during IR construction. When creating a new
instruction, InstSimplifyFolder may fold the operation and return an
existing operand instead of emitting a new instruction.
In such cases, copying IR flags to the returned value is incorrect and
may unintentionally propagate flags to pre‑existing instructions,
polluting the original IR. To avoid this, flags should be passed at IR
creation rather than being set after construction. Fix #192607.
Commit: a8d2c44b29e9a5caac37dc400cebca5f997ad6a6
https://github.com/llvm/llvm-project/commit/a8d2c44b29e9a5caac37dc400cebca5f997ad6a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
X86: Mark eflags clobbers dead in va_arg expansion (#227197)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8d79b74443de46e78b4f2c90aa65bd42c491e909
https://github.com/llvm/llvm-project/commit/8d79b74443de46e78b4f2c90aa65bd42c491e909
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
Log Message:
-----------
[Polly] Keep proximity dependence exact if simplifying it unbounds its distance (#225840)
Before calling the isl scheduler, `runIslScheduleOptimizer` gists the
dependences
with the iteration domains (`-polly-opt-simplify-deps=yes`, the default
since
a26db470834a, 2012). For a statement that reads a value written in one
iteration
of a loop in all later iterations, the gist also drops the upper bound
of that
loop:
{ S[k, i, k] -> S[k, i, j] : k < j <= n - 1 } becomes { S[k, i, k] ->
S[k, i, j] : j > k }
The proximity distance along j is then unbounded. isl's Pluto-like step
needs a
bound `u·n + w` on every proximity distance, finds no row that satisfies
it, and
falls back to carrying dependences one row at a time. For floyd-warshall
this
yields a wavefront over `i + j` below the `k` loop instead of a
permutable band
`(i, j)`. That band is never tiled, and the innermost loop walks the
array
diagonally.
The patch keeps the exact proximity dependence of a statement on itself
when
the gisted dependence has unbounded distances and the exact one has
bounded
distances. Validity dependences, and dependences between different
statements,
are still gisted. The cost of the exact dependences therefore only
applies to
the few maps where the gist removed the bound; heat-3d, where keeping
all
proximity dependences exact makes scheduling take minutes, is
unaffected.
### Measurements
x86-64 (Ryzen 7 9700X), `-O3 -march=native -mllvm -polly`, baseline is
the same
compiler without the change.
| | before | after | |
|---|---|---|---|
| PolyBench 4.2.1 LARGE floyd-warshall (min of 3, pinned) | 26.7 s | 6.8
s | 3.9x |
| llvm-test-suite floyd-warshall (min of 5, pinned) | 60.9 s | 16.4 s |
3.7x |
| compile time floyd-warshall.c (min of 5) | 131 ms | 134 ms | |
| .text floyd-warshall | 4775 | 6298 | |
- Among the 30 PolyBench kernels, only floyd-warshall generates
different code.
- In llvm-test-suite (SingleSource + MultiSource), only floyd-warshall
and two
small regression tests (Regression-C-test_indvars,
GCC-C-execute-20000422-1)
change. All 2137 tests pass in both configurations. The other objects
whose
code differed between the two builds (oggenc, two TSVC programs) differ
by
Polly's pre-existing run-to-run nondeterminism; the patch did not
trigger
there.
- CTMark (`-j1`, pinned, 2 repetitions): identical generated code, total
compile
time within noise.
- With the default 32x32 tiles, floyd-warshall is still 1.2x slower than
plain
-O3 on this machine. That is a tile size effect: with
`-polly-tile-sizes=16,32`
the kernel runs in 1.6 s, 3.5x faster than -O3.
### Test
`polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll`:
floyd-warshall
with a parametric size; checks for the `(k)` band followed by the tiled
`(i, j)`
band. It fails without the patch, which produces the `(i + j)`
wavefront.
Assisted-by: Claude (Anthropic)
Commit: e8c09d19de8212bfb2d5c760c43a21e27729f660
https://github.com/llvm/llvm-project/commit/e8c09d19de8212bfb2d5c760c43a21e27729f660
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] Cache normalized constraints by expression instead of by declaration (#226620)
Sema::NormalizationCache was keyed by the constrained declaration. The
members of a class template specialization are distinct declarations for
every specialization, but they all share the uninstantiated constraint
expressions of the member of the primary template they were instantiated
from. So the constraints of e.g. the constrained constructors of
std::optional, std::span, std::pair or of the members of range adaptors
were normalized from scratch for every single specialization of those
classes that a TU uses. Normalization is expensive: it expands the whole
concept tree below the expression and substitutes the parameter mapping
at every level.
When compiling Chromium, 48%
(chrome/browser/glic/...contents_manager.cc)
to 72% (chrome/browser/ui/views/frame/browser_view.cc) of all
NormalizationCache misses were for expressions that were normalized
before
for a different declaration, and normalization is 4.5% of all compile
time
in a sampling profile.
Instead, key the cache by (expression, pack index). Each associated
constraint is cached separately, and we form the conjunction of a
declaration's associated constraints on every call. That's cheap, and
getNormalizedAssociatedConstraints() is only called on SatisfactionCache
misses and for subsumption checks. Failures are cached as nullptr, like
before.
Build time for 120 random Chromium TUs drawn with probability
proportional to their compile time:
CPU time: 470.0 s => 451.1 s, -4.0%
instructions: 4948.9e9 => 4702.7e9, -5.0%
mean max RSS: 779 MB => 710 MB, -8.9%
(To check noise level, running this with the same binary twice: +-0.04%
CPU time and +-0.01% instructions.)
Recovers some more of the time lost to #161671 and contributes to
improving issue #172266.
No behavior change on the non-error case.
(If several declarations share a constraint expression that fails to
normalize (e.g. the members of different specializations of a class
template), we now diagnose the failure once instead of once per
declaration.)
Commit: 6aeadac52d4f564e5030a1a22013ab381436cce3
https://github.com/llvm/llvm-project/commit/6aeadac52d4f564e5030a1a22013ab381436cce3
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
Log Message:
-----------
[lldb] Correct types for ScriptedFrame get_function_name get_display_function_name (#226938)
These claimed to return str but the initial value for self.name is None,
and the C++ side returns optional<string>. So I think optional string is
correct here.
Commit: d7daf1d24be8231f7f422ef2bca1003d4b77ec11
https://github.com/llvm/llvm-project/commit/d7daf1d24be8231f7f422ef2bca1003d4b77ec11
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm][llvm-profgen] Fix printing bogus trace info on 32-bit (#226965)
And as a result, fix
llvm/test/tools/llvm-profgen/AArch64/cs-bogus-trace.test when run on Arm
32-bit:
https://lab.llvm.org/buildbot/#/builders/122/builds/59
Fixes #225569 / 28fec94991905d8dd8a08658e9590e13b7fe1af5.
`x` is for an unsigned integer but the argument given for it is a
uint64_t. This worked on 64-bit (maybe it's passed in a register), but
not on 32-bit where we got strange values printed.
Use format_hex instead, so we don't have to choose a format code.
Commit: b20896c96deab703d7f0e99301b553a8ef4abad7
https://github.com/llvm/llvm-project/commit/b20896c96deab703d7f0e99301b553a8ef4abad7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILMemIntrinsics.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/legalize-i8.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-store.ll
M llvm/test/CodeGen/DirectX/scalarize-static-array-of-float-vectors.ll
M llvm/test/tools/dxil-dis/constantexpr-gep.ll
Log Message:
-----------
[DirectX] Don't use IRBuilder to create GEPs (#227000)
This switches the DirectX backend to directly call
`GetElementPtrInst::Create()` instead of creating GEPs via IRBuilder.
IRBuilder will soon start canonicalizing GEPs to ptradd representation
(with the first change being
https://github.com/llvm/llvm-project/pull/226425, affecting constant
expressions only), while DirectX needs GEPs to have specific form.
The change implemented here is a minimal one to unblock further work. In
the future, it will become impossible to construct such GEPs through any
API. The DirectX backend needs to switch to using an intrinsic to
represent any non-canonical GEPs it needs. This followup work is tracked
in https://github.com/llvm/llvm-project/issues/227005.
Commit: bb9dd27ae02c6b4fb49757085aa13af92cc1ccda
https://github.com/llvm/llvm-project/commit/bb9dd27ae02c6b4fb49757085aa13af92cc1ccda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Use bytecode interpreter in toplevel `Expr::Evaluate*` functions (#226217)
To avoid all the state setup we otherwise do. This also lets us remove
the `EvalInfo::EnableNewConstInterp` flag, which was previously checked
on every `::EvaluateAsRValue` call.
Commit: c68a4ca2a9202d073b569cbfbfb269f21abf7aec
https://github.com/llvm/llvm-project/commit/c68a4ca2a9202d073b569cbfbfb269f21abf7aec
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[LLVMIR] Directly lower global initializer GEP to constant expression (#226904)
MLIR lowers global initializers in a very unusual way, by using an
IRBuilder without insertion point, and relying on the fact that for a
well-formed initializer, all the instructions will be converted to
constant expressions and no actual instructions that require insertion
will be produced.
This causes issues for https://github.com/llvm/llvm-project/pull/226425,
which requires an insertion point for CreateGEP to determine the data
layout.
To avoid this, make convertGEPOp() directly produce a constant
expression GEP if there is no insertion point, reusing the existing code
path for inrange GEPs.
Commit: 090b123694953beeb55d003e45c24372858b29b8
https://github.com/llvm/llvm-project/commit/090b123694953beeb55d003e45c24372858b29b8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
Log Message:
-----------
[lldb][test] Handle None function name in frame provider tests (#226936)
Fixes #191859.
On Arm one of the functions has no name, which is a valid state.
```
Num frames: 7
0 frame #0: 0x092a151c a.out`baz at main.c:5:3 --name: baz
1 frame #1: 0x092a1540 a.out`bar at main.c:10:10 --name: bar
2 frame #2: 0x092a1560 a.out`foo at main.c:15:10 --name: foo
3 frame #3: 0x092a158c a.out`main at main.c:20:10 --name: main
4 frame #4: 0xf7ab939a libc.so.6` --name: None
5 frame #5: 0xf7ab943e libc.so.6`__libc_start_main + 94 --name: __libc_start_main
6 frame #6: 0x092a1434 a.out`_start + 40 --name: _start
```
The prefix provider needs to handle that possibility.
Though the Python type annotations on ScriptedFrame say that the name
methods return string, in reality they can return None, which the C++
sides expect. I will fix that in another PR.
Commit: e0bd48983e9d1d0de471a7689573622464c0b332
https://github.com/llvm/llvm-project/commit/e0bd48983e9d1d0de471a7689573622464c0b332
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/LibASTImporter.md
M clang/docs/UsersManual.md
Log Message:
-----------
[docs] Pass -c when generating a PCH file (#226850)
Without options like -fsyntax-only/-E/-S/-c, the driver runs in link
mode, and a header-only command line produces a PCH only incidentally: a
linker option such as -lm or -Wl,..., including one from a config file,
adds a link job. Use -c in the PCH examples.
Also fix two broken examples: -ignore-pch is a driver option (cc1
rejects -Xclang -ignore-pch), and the relocatable PCH example is
missing -o. In LibASTImporter.md, generate the C++ AST files with
-emit-ast instead of treating .cpp files as headers.
LLM-aided
Commit: 58b102609a9d08fbadb9c3fa1dd88bba2cf7f711
https://github.com/llvm/llvm-project/commit/58b102609a9d08fbadb9c3fa1dd88bba2cf7f711
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-variable-stride-predicate.ll
A llvm/test/Transforms/LoopVectorize/scev-variable-stride-predicate.ll
Log Message:
-----------
[SCEV] - Add positive-stride predicate for backedge-taken count. (#222261)
When `howManyLessThans` encounters a loop with an unknown stride that
cannot be proven finite (no `mustprogress` or side-effect-free
guarantee), SCEV currently returns `CouldNotCompute` for the
backedge-taken count. This blocks downstream consumers like the loop
vectorizer from optimizing such loops.
This patch relaxes the requirement by allowing a predicated
backedge-taken count when `AllowPredicates` is true. Instead of
requiring `loopIsFiniteByAssumption(L)` unconditionally, we add a
`Compare predicate: stride sgt 0` when finiteness cannot be proven.
A positive stride guarantees forward progress, making the BTC formula
correct. The predicate is emitted as a runtime check by consumers
(e.g., the loop vectorizer generates a guard branch before the vector
loop).
This is the SCEV-level fix for a class of variable-increment loops
common in Fortran-style benchmarks, e.g.:
void f(int n, int *a, int *b, int *c, int inc) {
int i = 0;
L10: if (i >= n) goto L20;
a[i] = a[i] + b[i] * c[i];
i = i + inc; // inc unknown at compile time
goto L10;
L20: ;
}
Addressing : https://github.com/llvm/llvm-project/issues/221915
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: ab0582707ef7ea0c4b03dff58ae9c32a9bdfec5c
https://github.com/llvm/llvm-project/commit/ab0582707ef7ea0c4b03dff58ae9c32a9bdfec5c
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/arm/aeabi_cmpflags_interwork_test.c
Log Message:
-----------
[compiler-rt][ARM] Make interworking test compatible with BTI (#226154)
In the aeabi_cmpflags_interwork_test.c test wrappers, we should return
through lr instead of r3 so that runs with BTI enabled don't fail. As
returns through lr don't require a landing pad, and returns through r3
do.
Commit: a3a37848d8cac394d067a6c9c5d545753556e4e7
https://github.com/llvm/llvm-project/commit/a3a37848d8cac394d067a6c9c5d545753556e4e7
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/remark-final-verify-diagnostics.mlir
M mlir/unittests/IR/Diagnostic.cpp
Log Message:
-----------
[mlir] Own the registrations of SourceMgrDiagnosticVerifierHandler (#226258)
`SourceMgrDiagnosticVerifierHandler::registerInContext` registered a
callback capturing `this` and dropped the handler id, so nothing could
erase it. The constructor did the same in its own context. After the
verifier was destroyed, the next diagnostic called into a dead object.
mlir-opt's per-buffer contexts die first, which hid the bug.
Make both registrations owned:
- The constructor installs its callback through `setHandler`, replacing
the base class's printing handler. That handler was unreachable anyway:
the verifier consumes every diagnostic and reports unexpected ones
itself. The base destructor now erases it.
- `registerInContext` returns a scoped registration. Callers destroy it
before the verifier and the context.
Erasing from every registered context in the destructor would not work:
mlir-opt's per-buffer contexts are already gone by then.
mlir-opt's `performActions` finalized the remark policy only after
textual output; on a failing pipeline the remarks deferred by
`--remark-policy=final` were emitted from `~MLIRContext`, after the
handlers were gone. It now finalizes on every exit, so those remarks
reach the verifier, or the printing handler in the non-verify path where
they were dropped before. A lit test pins this.
Assisted-by: Claude Code (Claude Fable 5.1)
Commit: f72d03de7c159efd3c4a4501323d19c86c17d7a8
https://github.com/llvm/llvm-project/commit/f72d03de7c159efd3c4a4501323d19c86c17d7a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow ints feeding sitofp (#222969)
Commit: 197c16add5b16f4bd68c4f4bae115723e74330e2
https://github.com/llvm/llvm-project/commit/197c16add5b16f4bd68c4f4bae115723e74330e2
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Add ffmpeg to test-suite.yml workflow (#227219)
This provides additional coverage for vector related codegen
Commit: 5e1ed67dbadba1b2bc254411cf78e61db51687d1
https://github.com/llvm/llvm-project/commit/5e1ed67dbadba1b2bc254411cf78e61db51687d1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/GVNHoist.h
A llvm/include/llvm/Transforms/Scalar/GVNSink.h
A llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
Log Message:
-----------
[GVN] Move `ValueTable` out of `GVN.h` (NFC) (#226233)
* Rename `GVNPass::ValueTable` to `GVNValueTable`, and move it out to
the `llvm` namespace and to its own file `GVNValueTable.h`.
* Move `GVNPass::Expression` into `llvm::GVNValueTable`.
* Move `GVNHoistPass` and `GVNSinkPass` to their own headers.
With these changes `GVHoist.cpp` and `GVNSink.cpp` no longer need to
include `GVN.h` or peek into `GVNPass` internals.
Commit: 6286f77214be257eed1cff70d3e2e16f024e3dfb
https://github.com/llvm/llvm-project/commit/6286f77214be257eed1cff70d3e2e16f024e3dfb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
M llvm/test/CodeGen/ARM/llvm.modf.ll
M llvm/test/CodeGen/ARM/llvm.sincos.ll
M llvm/test/CodeGen/ARM/signext-inreg.ll
M llvm/test/CodeGen/ARM/vldlane.ll
M llvm/test/CodeGen/Hexagon/addh.ll
M llvm/test/CodeGen/Hexagon/cttz-elts-widen.ll
M llvm/test/CodeGen/Hexagon/isel-extload-i1.ll
M llvm/test/CodeGen/Hexagon/mulhs.ll
M llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/dmr-copy.ll
M llvm/test/CodeGen/PowerPC/dmr-enable.ll
M llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
M llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-ops-i128.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-07.ll
M llvm/test/CodeGen/SystemZ/rot-02.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
M llvm/test/CodeGen/Thumb/emergency-spill-slot.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-add.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-mul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-mixed-cases.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-uniform-cases.ll
M llvm/test/CodeGen/Thumb2/mve-ctlz.ll
M llvm/test/CodeGen/Thumb2/mve-fmath.ll
M llvm/test/CodeGen/Thumb2/mve-insertshuffleload.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
M llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
M llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle-fp16.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vcvt16.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/mve-vld4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vldst4.ll
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/Thumb2/mve-vst4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vst4.ll
M llvm/test/CodeGen/Thumb2/mve-zext-masked-load.ll
M llvm/test/CodeGen/X86/active_lane_mask.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/apx/push2-pop2.ll
M llvm/test/CodeGen/X86/bit-manip-i512.ll
M llvm/test/CodeGen/X86/bitselect.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/combine-rotates.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/ftrunc.ll
M llvm/test/CodeGen/X86/funnel-shift-i512.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/icmp-abs-C.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
M llvm/test/CodeGen/X86/machine-cse.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int.ll
M llvm/test/CodeGen/X86/mul-i1024.ll
M llvm/test/CodeGen/X86/mul-i256.ll
M llvm/test/CodeGen/X86/mul-i512.ll
M llvm/test/CodeGen/X86/mul-shift-reassoc.ll
M llvm/test/CodeGen/X86/mul128.ll
M llvm/test/CodeGen/X86/neg-abs.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr46877.ll
M llvm/test/CodeGen/X86/scalar-minmax-simd.ll
M llvm/test/CodeGen/X86/shift-amount-mod.ll
M llvm/test/CodeGen/X86/shift-and.ll
M llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
M llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
M llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
M llvm/test/CodeGen/X86/ternlog.ll
M llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-sumla.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-umla.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/widen_arith-2.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/zext-trunc.ll
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/Transforms/SampleProfile/pseudo-probe-twoaddr.ll
Log Message:
-----------
CodeGen: Compute LiveIntervals before TwoAddressInstructions (#225174)
TwoAddressInstructions is the traditional primary use of LiveVariables, but it has
gained a LiveIntervals path. By moving LiveIntervals earlier, the default flips to rely
on it instead of LiveVariables. The overall test churn is mostly neutral, with more net
wins than losses.
This should move before phi elimination. This is a staging move to incrementally
remove the LiveVariables support from TwoAddressInstructions, and because the
move to running LiveIntervals on SSA is a bigger leap.
This obsoletes -early-live-intervals (though, maybe it could be repurposed for
move before SSA).
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: f0f0fe2d928a4c46dbd60b6d6bf6cf6d9f8b2993
https://github.com/llvm/llvm-project/commit/f0f0fe2d928a4c46dbd60b6d6bf6cf6d9f8b2993
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
R libcxx/utils/ci/images/libcxx_next_runners.txt
R libcxx/utils/ci/images/libcxx_release_runners.txt
R libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libcxx] Delete runner set image versions (#227141)
These are no longer needed now that we have removed the old runner sets.
Commit: cdebdbdba13e79bdb09d328e05b417d2b7614a82
https://github.com/llvm/llvm-project/commit/cdebdbdba13e79bdb09d328e05b417d2b7614a82
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/record-execution-frequencies.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
Log Message:
-----------
[VPlan] Use BlockFrequencyInfo's full mass for execution frequencies. (#227006)
Use BlockFrequencyInfo's full mass instead of custom 2^63 for "always
execute".
This updates VPlan's block frequencies to match BFI.
PR: https://github.com/llvm/llvm-project/pull/227006
Commit: f69661de1c6fd034afabc2acf79a888cf7b58c5c
https://github.com/llvm/llvm-project/commit/f69661de1c6fd034afabc2acf79a888cf7b58c5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
A llvm/test/Analysis/BlockFrequencyInfo/many-successors-order.ll
Log Message:
-----------
[BFI] Use MapVector in combineWeightsByHashing. (#227027)
combineWeightsByHashing iterated over a DenseMap, which depends on the
hash. Use MapVector to get consistent results, independent of index
type/values.
This is mainly to ensure consistency between users that use different
index numbers, i.e. used for IR BFI and VPlan's use.
PR: https://github.com/llvm/llvm-project/pull/227027
Commit: 724557a9bd1389446ba52d270ad31d78a6071497
https://github.com/llvm/llvm-project/commit/724557a9bd1389446ba52d270ad31d78a6071497
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
X86: Fix missing ... separator between functions in mir test (#227228)
The update_mir_test_checks output is incomplete so the later functions
here were really manually checked.
Commit: fa3d17075284bf746f4030ad3371fe5c05b06653
https://github.com/llvm/llvm-project/commit/fa3d17075284bf746f4030ad3371fe5c05b06653
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noalias.ll
Log Message:
-----------
[FunctionAttrs] Infer noalias through a null check. (#226956)
Only comparing against null does not captures provenance and should not
impact whether a pointer is noalias or not.
This enables noalias inference in a number of cases for malloc-like
functions:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1459.
PR: https://github.com/llvm/llvm-project/pull/226956
Commit: 6ccc4917217c650428fd36360690dad4a3f69d20
https://github.com/llvm/llvm-project/commit/6ccc4917217c650428fd36360690dad4a3f69d20
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Fix off-by-one crash in `lifetime_capture_by` argument indexing (#227231)
Fixes an off-by-one crash in the lifetime_capture_by attribute handling.
The CapturingArgIdx is already an index into the full Args array, but
the code was incorrectly creating a CallArgs array (dropping the first
argument for instance methods) and then indexing into it with
CapturingArgIdx, causing incorrect argument access and potential
out-of-bounds crashes.
Currently crashes at head: https://godbolt.org/z/7rYczK1z6
Commit: 74c86a79968b3f23eb3b292d318429364709f6b2
https://github.com/llvm/llvm-project/commit/74c86a79968b3f23eb3b292d318429364709f6b2
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp-wave32.mir
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp.mir
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scmp.ll
M llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/ucmp.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Use S_CMP to lower a copy of a lane mask to SCC (#221445)
SIFixSGPRCopies lowers a copy of a lane mask to SCC as an AND with EXEC,
whose destination register is created by the pass and is always dead.
The AND with EXEC is only needed because SCC has to be "any active lane
is set". When the lane mask already has 0 in the bits of all inactive
lanes, that is just "the mask is non-zero", which S_CMP computes without
needing a destination register. In some cases the S_CMP can be optimized
away later by SIInstrInfo::optimizeCompareInstr.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7
https://github.com/llvm/llvm-project/commit/7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
A llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
Log Message:
-----------
Mips: Mark MUL's existing HI0/LO0 defs dead in FastISel (#227230)
Commit: 5a245737377fec09c871c802cc730189a61df459
https://github.com/llvm/llvm-project/commit/5a245737377fec09c871c802cc730189a61df459
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir
Log Message:
-----------
Mips/GlobalISel: Mark call's implicit RA def dead (#227233)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a4b0944bde4640586dd902d3ad401a6270c8a1fe
https://github.com/llvm/llvm-project/commit/a4b0944bde4640586dd902d3ad401a6270c8a1fe
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll
Log Message:
-----------
[AArch64] ISel support for nxv1i1 vector_reverse (#226939)
This ensures llvm.vector.reverse can be selected for nxv1i1 types. These intrinsics can be generated by LoopVectorizer for `VF = vscale x 1` and loops iterating in reverse order.
Commit: d5f6c302fff1aeed8fb6a247c21a694b156778bc
https://github.com/llvm/llvm-project/commit/d5f6c302fff1aeed8fb6a247c21a694b156778bc
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/include/__configuration/attributes.h
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: 5c170b01350198b7f1f830fb53253652015077b3
https://github.com/llvm/llvm-project/commit/5c170b01350198b7f1f830fb53253652015077b3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
A llvm/test/CodeGen/Mips/optimize-pic-call-dead-gp.ll
Log Message:
-----------
Mips: Mark the $gp setup copy dead when erasing the call's $gp use (#227216)
MipsOptimizePICCall drops the implicit $gp operand from a call when the
lazy binding stub for the callee has already run. The copy that set $gp
up for that call then has no reader left, but nothing flagged it, so the
MIR carried a live def until a later liveness recomputation cleaned it
up.
The pass already walks each block in order, so track the reaching
definition of $gp as it goes and mark it dead when the use is erased.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: e0c49c0739807c8c75d38148babfa338d1e07f6a
https://github.com/llvm/llvm-project/commit/e0c49c0739807c8c75d38148babfa338d1e07f6a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/select-tls-macho.ll
Log Message:
-----------
AArch64/GlobalISel: Mark the LR def of the Mach-O TLS call dead (#227234)
The ordinary call path already does this, and the SelectionDAG emitter
marks unused implicit physreg defs dead for free. Without it the dead
flag needs to be reinferred later.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5aa04826046edad5122d959688c0b8e9950f261f
https://github.com/llvm/llvm-project/commit/5aa04826046edad5122d959688c0b8e9950f261f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
A llvm/test/CodeGen/LoongArch/null-streamer.ll
Log Message:
-----------
LoongArch: Register a null target streamer (#226497)
Emitting a TLS variable's debug location calls into the target streamer,
which was only registered for asm and object output. -filetype=null
therefore null dereferenced.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 80cd6102a79c02763034fbf1b6a1473930b1d4ab
https://github.com/llvm/llvm-project/commit/80cd6102a79c02763034fbf1b6a1473930b1d4ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
A llvm/test/CodeGen/LoongArch/module-target-abi.ll
Log Message:
-----------
LoongArch: Respect the target-abi module flag in the ELF header (#226498)
The target streamer read the ABI from MCTargetOptions when constructed,
so the e_flags recorded the command line -target-abi and ignored the
module flag.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: b7bd84ff2a30e08e7f1bd2b36db5f8ec9ba300ee
https://github.com/llvm/llvm-project/commit/b7bd84ff2a30e08e7f1bd2b36db5f8ec9ba300ee
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/AArch64/findlast-epilogue-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
Log Message:
-----------
[VPlan] Fix find last reductions not using frozen condition in select (#223962)
A find last reduction is something like:
(select c[n], x[n], (select c[n-1], x[n-1], (select ...)))
So even if previous iterations had poison for c[x], the top-level select
blocks it.
MaskSelect uses the non-frozen Cond, and that in turn is fed into
VPInstruction::ExtractLastActive, which in turn gets expanded to
vector.reduce.umax, which returns poison if any of the lanes were
poison.
So in the case e.g. c[n] = 1, c[n-1] = poison and VF=2, the scalar loop
returns x[n] whilst vector loop returns poison.
We're also introducing multiple uses of Cond which isn't sound for
undef, so for these reasons we need to use the frozen Cond.
Commit: bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
https://github.com/llvm/llvm-project/commit/bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-fp4-pzo.ll
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
Log Message:
-----------
[clang][NVPTX] Add support for pzo in f32/f16x2/bf16x2 to FP4 conversions (#225318)
This patch adds support for `pzo` variants and `rz` rounding mode to
existing `f32/f16x2/bf16x2` to `FP4` (`e2m1x2`) conversion intrinsics.
Also adds `clang builtins` for the new variants.
Tests have been verified through `ptxas-13.4`.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 5da194580292bc90f6577f3959dda3a9bb6d5366
https://github.com/llvm/llvm-project/commit/5da194580292bc90f6577f3959dda3a9bb6d5366
Author: Anand Mistry (MSFT) <anandmistry at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
A llvm/test/MC/Mips/eva/set-eva-directive.s
A llvm/test/MC/Mips/eva/set-noeva-directive.s
Log Message:
-----------
[Mips] Add set directive support for EVA instructions (#225888)
Add assembler directives to enable/disable access to EVA instructions,
such as `cachee/lbe/sbe/tlbinv/etc`, with `.set eva/noeva`.
Commit: 84c14dac5c730f5b888b42193d252eb41cc77247
https://github.com/llvm/llvm-project/commit/84c14dac5c730f5b888b42193d252eb41cc77247
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Add negative-test for `lifetime_capture_by_this` on constructors (#227251)
Commit: 5239371ffa13f30915fe67744be2ea261b74be2a
https://github.com/llvm/llvm-project/commit/5239371ffa13f30915fe67744be2ea261b74be2a
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Group virtual method slots into override families (#213317)
A virtual call site can dispatch to any override, so the parameter and
return slots that occupy the same vtable slot across an override chain are
indistinguishable to a caller. Whole-program consumers therefore have to
treat them as one unit or they will reason about a slot that a call never
actually reaches.
Compute those units up front, keyed per slot, so consumers only need a
map lookup rather than their own traversal of the override relation.
Overloads occupy distinct vtable slots and stay in distinct families.
The family representative is the smallest EntityId in the class, which
keeps the result stable across runs.
§2 of rdar://179151603
Assisted-By: claude
Commit: fa10e634e2be9c16a7fdf01aefe0ed45ab6d1b47
https://github.com/llvm/llvm-project/commit/fa10e634e2be9c16a7fdf01aefe0ed45ab6d1b47
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP]Support runtime alias checks versioning for blocks in loops
Allow versioning of blocks inside loops, e.g. fully unrolled inner loop,
whose pointers are advanced by the loop header PHIs. Accept header PHIs
as base objects, use the base values directly in the bounds instead of
recomputing loop-variant bases from their recurrences.
Fixes #49896
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226955
Commit: d0adadb4a1838eef7050da75d3526169697b121e
https://github.com/llvm/llvm-project/commit/d0adadb4a1838eef7050da75d3526169697b121e
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[AArch64][GlobalISel] Reorganise shuffle combines. NFC (#227268)
Other combines had been added between shuffle lowerings, make sure they
are adjacent. Also remove show extra whitespace whilst here.
Commit: 09c59107ab65919fd2c186e57c183819eb42a5df
https://github.com/llvm/llvm-project/commit/09c59107ab65919fd2c186e57c183819eb42a5df
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: 51258c8a1fafac2b274cfe05a92f31c40fab1f93
https://github.com/llvm/llvm-project/commit/51258c8a1fafac2b274cfe05a92f31c40fab1f93
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: 940e03584de8bfbcd86fc25de9a738d067d3a342
https://github.com/llvm/llvm-project/commit/940e03584de8bfbcd86fc25de9a738d067d3a342
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/test/CodeGenCXX/pragma-loop-predicate.cpp
M clang/test/CodeGenCXX/pragma-loop-safety.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
Log Message:
-----------
[clang] Also disable scalable vectorisation for vectorize(disable) (#227254)
This ensures that #pragma clang loop vectorize(disable) also disables
scalable vectorisation. Only setting the width to 1 could potentially
enable LoopVectorizer to vectorize with VF = vscale x 1. Especially with
the -scalable-vectorization=preferred option.
Commit: c6a561d18f5d0e5af25200d18a2653b9f18c8e87
https://github.com/llvm/llvm-project/commit/c6a561d18f5d0e5af25200d18a2653b9f18c8e87
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/temp_arg_nontype_ref.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #223645. (#227085)
In #223645, I removed a fixme I thought was no longer necessary. But it
was, our test coverage is just patchy.
This just reintroduces it to fix the regression,
I have not investigated whether there was a better solution.
I got the AI to write as much tests as i could think of, however this
revealed regressions introduced in an earlier version of clang, this
weill be fixed separately.
Reported in
https://github.com/llvm/llvm-project/pull/223645#issuecomment-5868853308
Assisted-By: Opus 5.5
Commit: 39b72080e0399a15b0313b4eb24e3dbb0aee3c08
https://github.com/llvm/llvm-project/commit/39b72080e0399a15b0313b4eb24e3dbb0aee3c08
Author: Jack Vickers <jack.vickers at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
Log Message:
-----------
[mlir][tosa] Preserve non-TOSA ops in narrowing passes (#224594)
The TOSA narrowing passes currently reject operations from non-TOSA
dialects even when their types do not require conversion.
This change marks unknown ops as legal provided that their operand and
result types are legal. This follows the approach used by
TosaConvertIntegerTypeToSignless and allows mixed-dialect IR to pass
through TOSA narrowing.
Adds a lit test for each narrowing pass to prove that mixed-dialect is
allowed.
Updates the i64-to-i32 rollback lit test to continue forcing a
conversion failure using illegal operand and result types.
Assisted by: Codex
Commit: c68b1ff4f6af7ed0f96d65739f3826b0ef0fd26c
https://github.com/llvm/llvm-project/commit/c68b1ff4f6af7ed0f96d65739f3826b0ef0fd26c
Author: Hariprasad Ravishankar <hravisha at mathworks.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa] Add allow-non-finites option for float min/max reduction (#222140)
TosaToLinalg seeds float min/max reductions with the largest finite
value of the element type, but the TOSA spec asks for the infinite
bound.
[§2.9.4](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_reduce_min)
seeds REDUCE_MIN with `maximum_s<in_out_t>()`,
[§4.5.1](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_arithmetic_helpers)
defines that as the type maximum after `make_signed`,
[§4.5.2](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_type_conversion_helpers)
makes `make_signed` a no-op for floats, and Table 5 in
[§1.9](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_supported_number_formats)
gives that maximum as `+infinity` for fp16, bf16, fp32 and fp64.
REDUCE_MAX and ARGMAX mirror it. The symptom is a clamp: reduce an
all-`+Inf` tensor and you get `3.40282347E+38` back.
This adds an `allow-non-finites` option to `tosa-to-linalg` that selects
the conforming seed.
**Why a flag rather than just fixing the seed.** Non-finite values
aren't always wanted. TOSA has a format that can't represent them at all
— Table 5 bounds fp8e4m3_t at ±448, "This format has no encoding for
infinities" — and embedded code generation often disables them wholesale
to avoid the support code, as MATLAB Coder's `SupportNonFinite` does.
llvm/torch-mlir#4363 added the same toggle under the same name to
ConvertTorchToLinalg and friends; today setting it `true` is silently
dropped for graphs routed through TOSA, so the two backends disagree on
the same model. This makes the flag mean something on both paths.
**Why the default is false.** It keeps this pass's current output.
torch-mlir defaults to `true` because it already emitted `-inf`, so in
both projects the default is the no-op, and setting the flag the same
way on both sides is what makes the paths agree.
**The `semanticsHasInf` guard.** `APFloat::getInf` is `llvm_unreachable`
under FiniteOnly semantics and silently returns a NaN under NanOnly
semantics, e.g. f8E4M3FN. Without the guard every fp8 min/max reduction
would return NaN through NaN-propagating `arith.minimumf`, which is
worse than the bug being fixed. Tests pin f8E4M3FN to the ±448 fallback
with the option both on and off.
Three smaller notes. The flag governs only identities the pass invents,
not the NaN that `nan_mode = IGNORE` is required to produce. ARGMAX is
updated for uniformity but is NFC in effect, since its running max only
feeds the `UGT`/`OGT` predicate and its value output is discarded.
`max_pool2d` in TosaToLinalgNamed.cpp is wrong the same way but left
alone here, because its initial value doubles as the `tensor.pad`
padding value and needs its own review.
Every pre-existing test in tosa-to-linalg.mlir now runs under both
settings, via a second RUN line sharing the CHECK prefix with only the
four seed constants split into FINITE/NONFINITE. New cases cover f16,
bf16 and f64 min/max, argmax f16, both f8E4M3FN fallbacks, and the
IGNORE seed. check-mlir-conversion is green.
Developed with AI assistance (Claude Opus 5 via Claude Code) per the
[LLVM AI Tool Use Policy](https://llvm.org/docs/AIToolPolicy.html): the
implementation, the tests, and the first draft of this description were
tool-generated, then reviewed and edited by me before posting.
Co-authored-by: Hariprasad Ravishankar <hravisha at ls-01-1c-a0-b8-77-e7-5d.dhcp.mathworks.com>
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 04d107c5289d7f39d5eadbf559d330e7ac545bc7
https://github.com/llvm/llvm-project/commit/04d107c5289d7f39d5eadbf559d330e7ac545bc7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
Log Message:
-----------
[VPlan] Model first memory runtime checks as VPlan recipes. (#221483)
Add VPlanTransforms::addMemoryRuntimeChecks to generate memory runtime
checks directly as VPlan recipes, re-using VPSCEVExpander. This enables
more CSE/simplification opportunities in VPlan, and in the long term
allows us to remove the current slightly hacky runtime check generation
code, which builds checks up front in IR, and removes them again if we
do not vectorize. This whole dance requires quite a bit of code to make
the removal step transparent if the loop was not vectorized.
The initial patch excludes the following checks from VPlan expansion (to
be added in follow-ups), to keep the initial logic as simple as
possible:
* checks in nested loops (VPlan expansion cannot hoist out of the outer
loop)
* diff checks
* bounds requiring expanding AddRecs (currently AddRecs must be expanded
in the Plan's entry)
The IR block built by GeneratedRTChecks::create() is still needed to
cost the checks and to detect that they folded to a constant. Once all
kinds of runtime checks can be created directly in VPlan, we can compute
their cost via the VPlan-based cost model, like other skeleton blocks.
PR: https://github.com/llvm/llvm-project/pull/221483
Commit: e6d803d0cd96bac00bee2e4b8b23b492f99c1590
https://github.com/llvm/llvm-project/commit/e6d803d0cd96bac00bee2e4b8b23b492f99c1590
Author: HernandezJosze <joseantoniohg at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
Log Message:
-----------
[lldb][Clike][NFC] Fix for #222611 (#227146)
Fixes #222611
This fixes an issue with Verify being conditionally compiled only when
assertions are enabled
Commit: 9790fc2b212b3f558460a00a5245f614c7c83317
https://github.com/llvm/llvm-project/commit/9790fc2b212b3f558460a00a5245f614c7c83317
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
A llvm/test/CodeGen/ARM/load_store_opt_eraseliveregs.mir
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: bbdca00c2b27b77af439872f608ad6632edcc97a
https://github.com/llvm/llvm-project/commit/bbdca00c2b27b77af439872f608ad6632edcc97a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227144)
It seems that with actions/checkout we run into a 5 minute timeout
somewhere (presumably in the websocket that communicates between the
runner and workflow pods), which causes actions/checkout to succeed but
without actually writing anything out, causing the rest of the workflow
to fail. This patch fixes that by forcing verbose output, which should
ensure there is no 5 minute period without any output.
This issue doesn't seem to impact other parts of the workflow due to
progress indicators.
Commit: 98241b05dd7e3d84144baa5192af515e199ed976
https://github.com/llvm/llvm-project/commit/98241b05dd7e3d84144baa5192af515e199ed976
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/handler.cpp
M libsycl/src/usm_functions.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libsycl/unittests/queue/queue.cpp
M libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] Add context to exception's throw. (#224668)
sycl::exception class can contain associated context (see 4.13.2.
Exception class interface).
Specification doesn't declare rules about when context must be
associated and when not.
Passing context to exception ctor in all places where context is
available.
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 27c315830887f3da871d3ccdb4bb403d8be034b6
https://github.com/llvm/llvm-project/commit/27c315830887f3da871d3ccdb4bb403d8be034b6
Author: Nopileos Isemados <xen134 at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/minmax-fold.ll
Log Message:
-----------
[InstCombine] Use context in select-to-umin nonzero check (#225381)
foldSelectICmpMinMax() queries whether W is nonzero without an
instruction context, missing facts from a preceding llvm.assume or
dominating branch. Querying at the comparison enables the existing
select-to-umin fold.
Fix #225345
Commit: 7759daa2e9a57a4fe6445531b405217096f416bd
https://github.com/llvm/llvm-project/commit/7759daa2e9a57a4fe6445531b405217096f416bd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M llvm/include/llvm/Support/Compression.h
M llvm/lib/Support/Compression.cpp
M llvm/unittests/Support/CompressionTest.cpp
Log Message:
-----------
[LLVM] Infer compression format from zlib and zstd headers (#222773)
Summary:
This PR adds two routines that allow users to decompress bitstreams
without explicitly specifying the format. This is inferred from the
bytes
of the object, returning an error if it could not be identified. The
Zstd
standard exposes proper magic bytes, while Zlib needs to be inferred
through the two header bytes.
Because this is a raw bytestream, there is a chance that someone
could get bytes that pass this check, giving no 'reason', but since
the decompression routine requires the expected size there is no
chance it will falsely succeed.
Commit: 6f75865e374f55e9953309425b293b0e364533fd
https://github.com/llvm/llvm-project/commit/6f75865e374f55e9953309425b293b0e364533fd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M offload/CMakeLists.txt
Log Message:
-----------
[flang-rt][Offload] Fix builds using the new amdgpu triple spelling (#227110)
Summary:
The offload cache files, such as `FlangOffload.cmake`, build the AMDGPU
runtimes for `amdgpu-amd-amdhsa`, but flang-rt and offload only
recognize AMDGPU triples beginning with `amdgcn`. Just check both like
we do elsewhere. Eventually this can all be dropped.
Commit: 78aa14e1df4f0fb200c66732c4d06f52baabf69d
https://github.com/llvm/llvm-project/commit/78aa14e1df4f0fb200c66732c4d06f52baabf69d
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Reuse `UnitMaskIdx` lambda in `computeRegUnitLaneMasks` (NFC) (#227249)
This simplifies the code at the expense of losing an assert that checks
that one `SUI` matches more than one `RU`s.
Commit: 2dc95bd763b87ffb563e2a90180bb7e8c49ec16a
https://github.com/llvm/llvm-project/commit/2dc95bd763b87ffb563e2a90180bb7e8c49ec16a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang/include/clang/AST/Expr.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][AST] Make Result parameter of `isCXX11ConstantExpr` mandatory (#226493)
We want to discourage people from just checking if something is a
constant expression without using the value, which we always compute
anyways.
There are only three call sites, all in clang, and all pass a value
already. Change the parameter type to a reference to enforce this.
Commit: c7b2f3191aab2d563d9146d828a195df6103292f
https://github.com/llvm/llvm-project/commit/c7b2f3191aab2d563d9146d828a195df6103292f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M openmp/module/CMakeLists.txt
Log Message:
-----------
[OpenMP] Install the Fortran module files with libomp-mod (#227116)
Summary:
The `libomp-mod` install component only contains `omp_lib.h`. The module
files are only installed incidentally as part of the Fortran runtime or
directory copy. Just do this directly. These were intentinoally dropped
in https://github.com/llvm/llvm-project/pull/171515, in favor of the
directory copy. However, this means these are ignored when done through
the specific component target.
Shouldn't affect plain installs.
Commit: a72d784c52d0913e2f3b8e6b6588bf6b769d78dc
https://github.com/llvm/llvm-project/commit/a72d784c52d0913e2f3b8e6b6588bf6b769d78dc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Disable sanitizers for configuration checks with --unwindlib=none (#227092)
Summary:
in a sanitized runtimes build, every configuration check is linked with
both -fsanitize=... and --unwindlib=none and fails, because the
sanitizer runtimes need the unwinder. This completes an existing TODO by
suppressing this for the compiler flag checks in this configuration.
This shouldn't affect any existing users. Motivation is compiling
`+asan` multilibs for existing OpenMP/Offloading configurations.
Commit: a3697dc8170d16e07bc4c507bb1d33b9d65a4c3c
https://github.com/llvm/llvm-project/commit/a3697dc8170d16e07bc4c507bb1d33b9d65a4c3c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/Modules/SanitizerUtils.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/asan/scripts/CMakeLists.txt
M compiler-rt/lib/copyprof/CMakeLists.txt
M compiler-rt/lib/dfsan/CMakeLists.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/hwasan/scripts/CMakeLists.txt
M compiler-rt/lib/memprof/CMakeLists.txt
M compiler-rt/lib/msan/CMakeLists.txt
M compiler-rt/lib/tsan/rtl/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Give every installed file an install component (#227103)
Summary:
LLVM tries to expose install components to allow distributions to choose
the layers to build. Not all of the compiler-rt artifacts were installed
under this configuration. This PR makes this a consistent rule by
updating the existing helper function to require a parent target for the
component.
Adds things like
```
ninja install-dfsan
```
and ensures this installs everything
```
ninja install-compiler-rt-x86_64-unknown-linux-gnu
```
Commit: bbb61bc6145835abf356b80b0209a462cf6a4486
https://github.com/llvm/llvm-project/commit/bbb61bc6145835abf356b80b0209a462cf6a4486
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/languages/cuda/CMakeLists.txt
M offload/languages/hip/CMakeLists.txt
M offload/languages/kernel/CMakeLists.txt
M offload/tools/CMakeLists.txt
M offload/tools/deviceinfo/CMakeLists.txt
M offload/tools/kernelreplay/CMakeLists.txt
Log Message:
-----------
[Offload] Fix installing offload through its install components (#227036)
Summary:
Distribution builds install each runtime through its component's install
target rather than the global `install` target. Several pieces of
offload
did not work with this:
- `install-offload` only depended on `omptarget` and `LLVMOffload`, but
the component also installs `LLVMOffloadKernel`. The install failed
unless something else had already built it.
- The CUDA, HIP, and kernel language headers were installed without a
component, so component installs skipped them.
- The offload tools used `add_llvm_tool` which did not build and/or
install. We already removed `add_llvm_library` from the libraries. Now
these use standard `add_execulable`.
Commit: 64055943ed88d6ad9dea11349c4e9aa736b9b493
https://github.com/llvm/llvm-project/commit/64055943ed88d6ad9dea11349c4e9aa736b9b493
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[flang-rt] Install the runtime libraries under the flang-rt component (#227073)
Summary:
The Flang-RT libraries were installed without a component, so they were
placed in `Unspecified` and there was no `install-flang-rt` target. The
runtimes build forwards `install-flang-rt` for every enabled runtime, so
requesting flang-rt in a distribution failed on the missing target, and
component installs skipped the libraries. Add the component and its
install targets, matching the existing `flang-rt-headers` and
`flang-rt-mod` components.
Commit: 16c9bb2ea958e6ca41f46f48b4bdb738524e9459
https://github.com/llvm/llvm-project/commit/16c9bb2ea958e6ca41f46f48b4bdb738524e9459
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/debugtrap-not-translated.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/trap-ext-disabled.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions_remove_cap_if.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-attributes.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-metadata.ll
M llvm/test/CodeGen/SPIRV/get-global-id-non-integer-dim.ll
M llvm/test/CodeGen/SPIRV/linkage/available-externally-global.ll
M llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
Log Message:
-----------
[NFC][SPIR-V] Add spirv-val RUN lines where missing (#227245)
Commit: 48073298f8a637d40eeeb213eac44706bf3f0ea8
https://github.com/llvm/llvm-project/commit/48073298f8a637d40eeeb213eac44706bf3f0ea8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
Log Message:
-----------
[Offload] Try loading dynamic libraries at global scope first (#227020)
Summary:
The intention of the dynamic path is to provide basic linking in cases
where the SDK is not avaialble at the user's build time. Previously this
did a distinct `dlopen` call on the library.
However, in cases where an existing HSA implementation exists at global
scope this can cause multiple instances to be open at the same time.
Specifically this is problematic if mixing with another implementation
(Like HIP or CUDA) or trying to intercept functions (like compiler-rt).
The compiler-rt interceptors currently carry interceptors into `dlsym`
when we should instead just load these at global scope, this makes them
behave more similar to a direct link in these scenarios, which was the
intention.
The fallback remains as the current behavior, should only trigger in
cases where there is an existing HSA in the process.
Commit: 347b2ed7fd5aef25f45b0f2816b49833d1359dca
https://github.com/llvm/llvm-project/commit/347b2ed7fd5aef25f45b0f2816b49833d1359dca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/liboffload/API/Common.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/unittests/OffloadAPI/init/olInit.cpp
Log Message:
-----------
[Offload] Lazily initialize platforms in the Offloading API (#227084)
Summary:
The Offloading library wraps around the underlying plugins. The problem
is that we currently initialize all plugins we find, even if they are
not needed for the program. This is very expensive for trivial uses, as
fully heterogenous usage is quite rare. In practice this means that you
will always pay a 200 ms penalty for having CUDA installed.
This patch changes the behavior to provide accessors into the plugins
and devices that allows them to be initialized lazily. We use a
once_flag, this should properly take a fast-path check while still
blocking on concurrent use.
Making full use of this will require a way to filter platforms more
specifically. I'm thinking of what this would look like as an API.
I'm thinking that we either have an extra iterate function that takes a
callback on the platform, or we just provide a helper to find all the
devices that can run a given image. Maybe both?
Fixes: #159636
Realnd of: https://github.com/llvm/llvm-project/pull/163272
Commit: 0d546ff00281aca3e0aa2b81573665f3ddb8b5b9
https://github.com/llvm/llvm-project/commit/0d546ff00281aca3e0aa2b81573665f3ddb8b5b9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix "leak" of PMR resource in benchmark (#216114)
The benchmark was not releasing the monotonic buffer resource, which
means we'd grow a larger and larger pool as Google Benchmark would go
through more and more iterations of the benchmark.
Commit: 69d96b19d754340e23e5c08acd2ffed0e9920b59
https://github.com/llvm/llvm-project/commit/69d96b19d754340e23e5c08acd2ffed0e9920b59
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M polly/lib/Support/SCEVAffinator.cpp
Log Message:
-----------
[SCEV] Rename SCEVNoWrapFlags to SCEVFlags (NFC) (#225179)
In preparation to extend the flags that ScalarEvolution can represent,
rename SCEVNoWrapFlags to the more general SCEVFlags. In particular, we
preserve the (get|set)NoWrapFlags interface, which simply masks the
no-wrap flags from the newly-introduced (get|set)Flags.
See also: #225065.
Commit: 96983af41ec1408064d7101c4d49d8f6e5fba1d6
https://github.com/llvm/llvm-project/commit/96983af41ec1408064d7101c4d49d8f6e5fba1d6
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libsycl/include/sycl/__spirv/spirv_vars.hpp
Log Message:
-----------
[libsycl] Remove libsycl declarations of spirv builtins (#227031)
Assisted-by: Claude Code.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 10fd0a4ec7ff6d23dab3920f09d69b7e46a471fb
https://github.com/llvm/llvm-project/commit/10fd0a4ec7ff6d23dab3920f09d69b7e46a471fb
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: 40666908139b18ca57d2735f6c00827c89837149
https://github.com/llvm/llvm-project/commit/40666908139b18ca57d2735f6c00827c89837149
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Log Message:
-----------
[MISched] Extract `operator<<` for SUnit(NFC) (#226785)
Establish a consistent API for printing a SUnit, rather than a scattered
duplication.
Commit: 72a712b0a552fe1f6e44fa445ea389f6519ef491
https://github.com/llvm/llvm-project/commit/72a712b0a552fe1f6e44fa445ea389f6519ef491
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/VirtualMethodFamilyFormatTest.cpp
Log Message:
-----------
[SSAF] Serialize virtual method summaries and families (#213318)
Per-TU summaries and whole-program results cross process boundaries, and
the JSON layer refuses to write a summary kind it has no format for.
Register both sides so
--ssaf-extract-summaries=VirtualMethod becomes usable and the
family result survives a round trip.
Deserialization tolerates a missing override list, since a root virtual
method legitimately has none.
§3 of rdar://179151603
Assisted-By: claude
Commit: 7e19707aeebbd0ae3101ddc7347fef7a865154f4
https://github.com/llvm/llvm-project/commit/7e19707aeebbd0ae3101ddc7347fef7a865154f4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Support/InterfaceSupport.h
M mlir/test/mlir-tblgen/op-interface.td
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
Log Message:
-----------
[mlir][ODS] Copy constant generated interface model prototypes (#226323)
Generate constexpr constructors for interface models whose concept is a
table of callbacks. Construct exact generated models from a static
prototype; keep external and fallback models on their existing path.
In OpenMPDialect.cpp this saves about 0.22B compiler instructions and
10.5KB of text.
Assisted-by: Codex
Commit: b7cc7eed1c272a0ba4798891e5867b974d0cae14
https://github.com/llvm/llvm-project/commit/b7cc7eed1c272a0ba4798891e5867b974d0cae14
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Add NVIDIA LTO to unsupported list in shlib global var test (#227315)
Commit: 2bf008c3ad7fc34de4a6c9eb1bd8910457d48a34
https://github.com/llvm/llvm-project/commit/2bf008c3ad7fc34de4a6c9eb1bd8910457d48a34
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Fix crashes on target regions inside namespace-scope lambdas and blocks (#226691)
Fixes #223397
A `target` region inside a lambda or block at namespace scope crashed
clang in two places. In Sema, `isOpenMPCapturedDecl` decides whether a
global must be captured by walking the function scope stack down to the
innermost OpenMP captured region, stopping at an ordinary function
scope. The capture initializers of a directive's outermost region are
built after all of its regions have been popped. Inside a function that
walk ends at the function's scope, but a namespace-scope lambda or block
has nothing underneath it, so the walk ran off the stack and asserted.
This happens for any global reference, such as `int &r = x; auto l = []
{ #pragma omp target r = 1; };`. The self-referential declaration in the
report is incidental. Once past Sema, CodeGen asserted too: it names the
outlined kernel after the region's parent function, and such a region
has none, even without a reference.
In Sema, running out of scopes now means the same as reaching a function
scope, so the variable is not captured from the current scope. That is
what the same lambda already gets inside a function. In CodeGen, a
region with no parent function is named after the function being
emitted.
Commit: 14b01288b6a80666538100f8798fe492297e6d0b
https://github.com/llvm/llvm-project/commit/14b01288b6a80666538100f8798fe492297e6d0b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
Log Message:
-----------
[mlir][OpenACC] Match reuse barriers to the reused private scope (#225570)
A region that writes both gang- and worker-private slots was considered
to be a gang scope and a barrier was missed. This change keeps the two
store sets separate and pick the barrier from the scope that is actually
reused. Follow-up for
https://github.com/llvm/llvm-project/pull/224437#discussion_r4066418696.
Commit: 0b3eb216bba43c93fb416853aaefd1fb382a7aab
https://github.com/llvm/llvm-project/commit/0b3eb216bba43c93fb416853aaefd1fb382a7aab
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cos-1.ll
M llvm/test/Transforms/InstCombine/cos-sin-intrinsic.ll
Log Message:
-----------
[InstCombine] Don't fold `sin(-x)` to `-sin(x)` if `denormals` may flush to `+0.0` (#227039)
Commit: 7fb36ba334861cb92245f8e4535bc14d068f8776
https://github.com/llvm/llvm-project/commit/7fb36ba334861cb92245f8e4535bc14d068f8776
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-branch-into-body.f90
A flang/test/Lower/pre-fir-tree-unstructured-internals.f90
M flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Detect loops whose branching is confined to their body (#225757)
A DO loop is classified as either structured or unstructured, and a
single raw branch anywhere in its body forces the loop -- and every
construct enclosing it -- onto the unstructured path.
That is stronger than necessary. A loop keeps its structured control
flow as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.
This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
Commit: 13b63a519fcc542667e0ebaa7ffa930e821b531c
https://github.com/llvm/llvm-project/commit/13b63a519fcc542667e0ebaa7ffa930e821b531c
Author: Shravan Sheth <shrashet at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/live-vars/live-outs.ll
Log Message:
-----------
[Hexagon] Add missing -mtriple to live-outs test (#227079)
This test's RUN command did not specify a target triple, so lit could
execute it using the host target.
This causes the test to fail when LLVM is built with only the Hexagon
target enabled. Add -mtriple=hexagon so the test consistently runs as a
Hexagon test.
Commit: 236e0ee3d763814d16b3d7947ba740fe4d4e31be
https://github.com/llvm/llvm-project/commit/236e0ee3d763814d16b3d7947ba740fe4d4e31be
Author: John Brawn <john.brawn at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/load-store-overlap.ll
Log Message:
-----------
[SROA] Remove splitSliceTails loop in presplitLoadsAndStores (#227061)
The asserts in this loop can trigger when we presplit an overlapping
load/store pair, and the extra splits it adds don't appear to have any
benefit: we only get them when we have an unsplittable slice that's
fully enclosed inside a splittable slice, and in the test I've managed
to create for this (no_move_enclosed_unsplittable_store, and there are
no existing tests for this) the final SROA output is the same (except
that the variables end up with different names).
Commit: fb1a7d048b4eb2f9a855e961f59c0a4b7bd5ee8b
https://github.com/llvm/llvm-project/commit/fb1a7d048b4eb2f9a855e961f59c0a4b7bd5ee8b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-scalar-epilogue-fallback.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-last-index-fp.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
Log Message:
-----------
[LV] Regenerate some CHECK lines (#226468)
Commit: 0cf09fc077d86dd454a58a292da8c047efe64af9
https://github.com/llvm/llvm-project/commit/0cf09fc077d86dd454a58a292da8c047efe64af9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Move the rescheduled copy chain back to front (#227289)
rescheduleMIBelowKill sinks an instruction below the kill of its tied
source, along with the run of copies that follows it. With LiveIntervals
the copies are spliced one at a time so handleMove sees a well-formed
block, but they were visited front to back and each inserted before the
previously moved one. This reversed them, and transiently moved a copy
below its use, asserting in handleMoveDown.
Walk them back to front instead, which also preserves the original
order.
Exposed by #225174, which made LiveIntervals available here by default.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 34ba34d7f9bd2c756db7df96d3a5be39f006aa19
https://github.com/llvm/llvm-project/commit/34ba34d7f9bd2c756db7df96d3a5be39f006aa19
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix ProfCheck for optimizing bitreverse (#227189)
Commit: 15ec5f2940998ddd77be1571a0d4b932b5a2878a
https://github.com/llvm/llvm-project/commit/15ec5f2940998ddd77be1571a0d4b932b5a2878a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
Log Message:
-----------
[AMDGPU] Replace GCN-NOT with autogen checks in test (#227148)
The assembly has many v_mov_b32s, so minor scheduling changes can
trigger failure on the GCN-NOT. It seems the test is designed to show
CSE behavior, which still holds even if minor scheduling changes break
the NOT checks.
Commit: e15e5e67f6d5e0fc44c011381a53357a2bd843bf
https://github.com/llvm/llvm-project/commit/e15e5e67f6d5e0fc44c011381a53357a2bd843bf
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/PowerPC/clmul-vector.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/RISCV/clmulh.ll
M llvm/test/CodeGen/RISCV/clmulr.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[ISel] Improve `clmul` fallback implementation (#204802)
Generalize the approach from
https://github.com/llvm/llvm-project/pull/203727 to narrower and wider
integers.
We still need the fallback for when multiplication isn't available, and
it turns out that for some widths the fallback emits fewer instructions,
the naive fallback is still used for `i1`, `i3`, `i4` and `i9`. I've
also now enabled wider integers (`i128` and `i256` have uses in
cryptography).
Based on my local experiments, the Karatsuba approach (e.g. as in
https://github.com/rust-lang/rust/pull/152132#discussion_r2778609222) is
not actually better than zero extending the input and using
multiplication with holes on the wider type.
CC https://github.com/llvm/llvm-project/issues/203694
CC: @eisenwave
Commit: 09cdef016cfc756b29002cd7870c63b7f1b09c6b
https://github.com/llvm/llvm-project/commit/09cdef016cfc756b29002cd7870c63b7f1b09c6b
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/cosf.h
A libc/src/__support/math/cosf_double_eval.h
A libc/src/__support/math/cosf_float_eval.h
M libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf_double_eval.h
A libc/src/__support/math/sinf_float_eval.h
M libc/test/src/math/CMakeLists.txt
R libc/test/src/math/cosf_float_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
R libc/test/src/math/exhaustive/cosf_float_test.cpp
M libc/test/src/math/exhaustive/cosf_test.cpp
R libc/test/src/math/exhaustive/sinf_float_test.cpp
M libc/test/src/math/exhaustive/sinf_test.cpp
R libc/test/src/math/sinf_float_test.cpp
M libc/test/src/math/sinf_test.cpp
Log Message:
-----------
[libc][math] Reorganize sinf and cosf function selection (#226529)
Reorganises sinf and cosf similarly to #224735 such that:
src/__support/math/func.h selects implementation, and
src/__support/math/func_<type>_eval.h implements func with <type> as the
intermediate computational type.
Commit: 1b5f644b9e3f9dbd9ce061dbfaf9188510cf82cf
https://github.com/llvm/llvm-project/commit/1b5f644b9e3f9dbd9ce061dbfaf9188510cf82cf
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: 6cd0f021ec7372be132b00ff2847822a77966a57
https://github.com/llvm/llvm-project/commit/6cd0f021ec7372be132b00ff2847822a77966a57
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
M flang/include/flang/Common/api-attrs.h
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
The amdgcn libflang_rt.runtime.a has undefined references to the DescriptorIoTicket/DerivedIoTicket methods and to flang_rt_verbose_abort. The tickets live in descriptor-io.cpp, which isn't in gpu_sources, but the work queue still refers to them. Any device code that ends up in the work queue (e.g. ALLOCATE of a derived type with default initialization in a target region) then fails to link.
The CUDA PTX build already avoids this with a thin I/O mode. This renames `RT_CUDA_THIN_IO` to `RT_THIN_IO`, defines it in api-attrs.h for the native GPU builds (`RT_GPU_TARGET` without `RT_DEVICE_COMPILATION`), and keeps the CMake define for the CUDA PTX library under the new name. flang_rt_verbose_abort is defined in stl-overrides.cpp, so that's added to gpu_sources.
Tested on gfx90a. The amdgcn library no longer has those undefined symbols, gains only the flang_rt_verbose_abort definition, and doesn't lose any others. A small reproducer (derived type with default init allocated inside a target region) links and runs, and scalar PRINT from device code gives the same output as before. The host library's symbols are identical to before. I haven't built nvptx or the CUDA offload configuration.
Downstream report: ROCm/llvm-project#3517
Commit: 5274c3a051776d95c0314d80ffd84b45be1539d3
https://github.com/llvm/llvm-project/commit/5274c3a051776d95c0314d80ffd84b45be1539d3
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
Commit: e65dba4fb29967ab597ca0acb4ec174c1016cd28
https://github.com/llvm/llvm-project/commit/e65dba4fb29967ab597ca0acb4ec174c1016cd28
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/Profile/branch-logical-mixed.cpp
M clang/test/Profile/c-captured.c
M clang/test/Profile/c-general.c
M clang/test/Profile/c-ternary.c
M clang/test/Profile/cxx-class.cpp
M clang/test/Profile/cxx-lambda.cpp
M clang/test/Profile/cxx-rangefor.cpp
M clang/test/Profile/cxx-stmt-initializers.cpp
M clang/test/Profile/cxx-templates.cpp
M clang/test/Profile/cxx-throws.cpp
M clang/test/Profile/objc-general.m
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_allowlist_ignorelist.cpp
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
M llvm/test/CodeGen/DirectX/llc-vector-store-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-load.ll
M llvm/test/CodeGen/RISCV/riscv-promote-constant.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_abilist.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_call.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_mem_intrinsic.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_other_ops.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_phi.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_select.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store_threshold.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-contiguous-counters.ll
M llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/LowerIFunc/ifunc-alias.ll
M llvm/test/Transforms/LowerIFunc/ifunc-program-addrspace.ll
M llvm/test/Transforms/LowerIFunc/lower-ifunc.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/const-gep.ll
M llvm/test/Transforms/PGOProfile/counter_promo.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_merge.ll
M llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll
M llvm/test/Transforms/PGOProfile/counter_promo_sampling.ll
M llvm/test/Transforms/PGOProfile/instr_entry_bb.ll
M llvm/test/Transforms/SROA/phi-gep.ll
M llvm/test/tools/llvm-reduce/ifunc-alias.ll
M llvm/test/tools/llvm-reduce/remove-ifunc-program-addrspace.ll
M llvm/test/tools/llvm-reduce/remove-ifunc.ll
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
Log Message:
-----------
[IRBuilder] Produce canonical constexpr GEPs (#226425)
This switches the IRBuilder to always produce canonical constexpr GEPs
in ptradd form, including in the case where ConstantFolder rather than
TargetFolder is used.
This is done in a slightly hacky way, by passing the DataLayout from the
insertion point into FoldGEP. In the future, when we start
canonicalizing the non-constant GEPs as well, we'll do the
canonicalization directly in IRBuilder and replace FoldGEP with
FoldPtrAdd. (Though it would be even better to make IRBuilder always
require a DataLayout and eliminate the ConstantFolder/TargetFolder
distinction...)
Commit: 976a04b549b3e91e51eb7676d86caa8c34a63571
https://github.com/llvm/llvm-project/commit/976a04b549b3e91e51eb7676d86caa8c34a63571
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-extern-weak.ll
Log Message:
-----------
[SystemZ][z/OS] Keep weak references weak (#226840)
Fixes #226835.
An `extern_weak` reference must stay unresolved without an error when
the symbol does not exist. On z/OS two kinds of references were always
strong:
- Taking the address of an external function goes through the indirect
symbol `<name>@indirect` (ADA slot `MO_ADA_INDIRECT_FUNC_DESC`). It
never got the weak attribute of the function symbol. The weak attribute
is already set on the function symbol when the ADA is emitted, because
`AsmPrinter::doFinalization` emits the weak references before
`emitEndOfAsmFile`. So the indirect symbol now becomes a weak reference
too.
- An external data reference is a part reference (PR). `GOFF::PRAttr`
had no binding strength, and the PR constructor in `GOFFObjectWriter`
did not set it. `PRAttr` gets a `BindingStrength` field, and
`defineExtern` passes the strength of the symbol.
Without this change, a C program with `extern int wv
__attribute__((weak));` and `extern void wf(void)
__attribute__((weak));` that takes `&wv` and `wf` fails to bind on z/OS
3.1 (IEW2456E for `wv` and `wf`). With the change it binds, and at run
time both addresses are null, as on other targets.
Tests: new `zos-extern-weak.ll` checks `WXTRN wf at indirect` in the HLASM
output and the binding strength of the ER and PR symbols in the object
file. `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported). Without the fix, both checks of
the new test fail.
Found while porting Free Pascal to z/OS (`weakexternal`).
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: b3b5e3303fdaec4bcc524bf834a9bed77c164fc2
https://github.com/llvm/llvm-project/commit/b3b5e3303fdaec4bcc524bf834a9bed77c164fc2
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-unstructured-internals.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
A flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
A flang/test/Lower/OpenMP/wsloop-unstructured-internals.f90
M flang/test/Lower/always-execute-loop-body.f90
A flang/test/Lower/do-loop-branch-to-loop-header.f90
M flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/select-case-statement.f90
Log Message:
-----------
[flang] Lower loops whose branching is confined to their body structurally (#225758)
Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.
Lower it structurally instead, with its body folded into a region that
can hold the branching. The loop keeps its bounds on the op, so it
remains available to whatever transforms or parallelizes it. Only the
body is folded: the loop control statements are emitted as they are for
any structured loop, since a branch from outside may target either of
them.
Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
Commit: 907a8095efa25c68ee6c3354830f9c632518dd69
https://github.com/llvm/llvm-project/commit/907a8095efa25c68ee6c3354830f9c632518dd69
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix out-of-bounds read in the associative container query benchmarks (#227070)
The query benchmarks for associative containers would access the pool of
keys to use in the benchmark out-of-bounds.
Commit: 3b8bb27206645009167c62fc422c33be7246bc5a
https://github.com/llvm/llvm-project/commit/3b8bb27206645009167c62fc422c33be7246bc5a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Use a union for uninitialized storage in associative container benchmarks (#227068)
This removes the need for reinterpret_cast when accessing the containers
constructed in the scratch space, and fixes the PMR constructor
benchmark passing the wrong pointer to DoNotOptimize.
Commit: 7dadbf7cda25adeeac6b513226105b9ea432ab8a
https://github.com/llvm/llvm-project/commit/7dadbf7cda25adeeac6b513226105b9ea432ab8a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
Log Message:
-----------
[libc++] Fix use-after-free in the monotonic_buffer benchmark (#227072)
We would release the monotonic_buffer_resource before the closing brace,
which runs the destructor of the list and accesses the nodes.
Commit: a2b6f776837db7b88059abe4c22741cca47fe901
https://github.com/llvm/llvm-project/commit/a2b6f776837db7b88059abe4c22741cca47fe901
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks-alloca.ll
Log Message:
-----------
[SLP]Fix alloca handling in runtime alias check versioning (#227341)
Do not duplicate allocas when versioning a block: keep the leading
static allocas in the header block and reject blocks with any other
alloca. Duplicating them moved static allocas out of the entry block
and merged the clones through a PHI, which is invalid for lifetime
markers.
Fixes #227328
Commit: b690595c4005015840065bcf1006ef46ba05d6b7
https://github.com/llvm/llvm-project/commit/b690595c4005015840065bcf1006ef46ba05d6b7
Author: Q <60785373+StarryCSF at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply high parts accumulate intrinsics (#224261)
Add intrinsics, Clang builtins and SelectionDAG support for the RISC-V P
multiply high accumulate with byte/halfword index operations.
See
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-high-parts-accumulate.
The pmhacc.h.bXX forms operate on the whole register and select directly
on both RV32 and RV64.
The pmhacc.w.hXX forms select directly on RV64, on RV32 there is no
64-bit packed form, so the intrinsics split into a pair of scalar
mhacc.h0/mhacc.h1 accumulations, one per result word.
Commit: b0fb9358d471a0436b72b0f117bf9d1a1ca3216e
https://github.com/llvm/llvm-project/commit/b0fb9358d471a0436b72b0f117bf9d1a1ca3216e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/frem.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] LowerStore - peek through oneuse bitcasts to see if vector is freely splittable. (#227282)
Peek through bitcasts when seeing if we can avoid an unnecessary
concat_vectors and store the subvectors directly - if the concat had
been worth it, combineConcatVectorOps would have moved the concat
further up.
Helps avoid more cases of unnecessary vzeroupper, 256-bit usage etc. in
particular on AVX1 targets (Sandybridge, Jaguar and Bulldozer all
benefit from this), but AVX2/512 targets as well.
Commit: 2c9a8d473b7b9bfe1e070e2456a7d57a55790201
https://github.com/llvm/llvm-project/commit/2c9a8d473b7b9bfe1e070e2456a7d57a55790201
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-lower-constant.ll
Log Message:
-----------
[SystemZ][z/OS] Use a function descriptor for external functions in initializers (#226682)
The address of an external function in a static initializer was emitted
as a V-con, i.e. the entry point, while an XPLINK function pointer must
point to a function descriptor. A call through such a pointer loads the
environment and entry point from the machine code of the function.
Create a descriptor in the ADA for external functions as well, as is
already done for internal functions and for constructor/destructor lists
(`emitXXStructorList`).
`zos-lower-constant.ll` is updated: the pointer to the external function
`bar` now points to its descriptor in the ADA.
A minimal program (`int (*p)(void) = ext;` called from `main`) ended
with S0C6 at address `0707070707070707` on z/OS 3.1; with this change it
returns the expected value.
Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1303 passed, 19 unsupported).
Fixes #226658.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: 36422efb8f9d62924dbd43a2cacd1e44c68cb9a8
https://github.com/llvm/llvm-project/commit/36422efb8f9d62924dbd43a2cacd1e44c68cb9a8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[llvm] Upgrade ARM data layouts that are missing Fi8 (#224639)
Such as the ones in
https://github.com/llvm/llvm-test-suite/tree/main/Bitcode/simd_ops,
which started failing to compile after
https://github.com/llvm/llvm-project/pull/224012
stopped us overriding the module data layout.
fatal error: error in backend: Can't create a MachineFunction using a
Module with a Target-incompatible DataLayout attached
Target DataLayout: e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64
Module DataLayout: e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64
The old layout is p32:32-i64, the new is p32:32-Fi8-i64.
In this change I have added this case to the data layout upgrades. If
there's no p32:32, the layout is not changed, also if there is already a
"Fi" or "Fn" in the layout. These cases may not exist or be valid in
reality, but I need some fallback behaviour just in case.
Commit: bbc6e8fb045cad3cb7291ffa9320a1c1b5810c82
https://github.com/llvm/llvm-project/commit/bbc6e8fb045cad3cb7291ffa9320a1c1b5810c82
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Add llvm_unreachable after some RegisterSetType switches (#223375)
The ones where you are supposed to case X: return Y;. We do enable the
not fully covered switch warning, so the unreachable just makes the
mistake more obvious.
I did not change GetInvalidationMask because this will be refactored by
#223373.
Commit: 046e55ba043775c28db139395303fcc467d18a1b
https://github.com/llvm/llvm-project/commit/046e55ba043775c28db139395303fcc467d18a1b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/include/list
M libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/push_range_container_adaptors.h
M libcxx/test/std/containers/container.adaptors/queue/queue.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/queue/queue.defn/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.defn/push_range.pass.cpp
Log Message:
-----------
[libc++] Add coverage for push_range on stack/queue with non-default underlying containers (#210730)
This increases the test coverage for stack/queue and actually caught an
issue in list::__invariants which was previously dead code.
Commit: e90c043329524ac718a3d04189ffe960936e8719
https://github.com/llvm/llvm-project/commit/e90c043329524ac718a3d04189ffe960936e8719
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
Log Message:
-----------
[compiler-rt] Remove dlsym interceptor for HSA UBSan (#227022)
Summary:
This existed to handle the OpenMP case that dynamically opened via
`dlsym`. However, https://github.com/llvm/llvm-project/pull/227020
removes the need for this by first checking the global space first.
The main motivation is that the `dlsym` interceptor layer was the most
janky part of this whole affair and was a major blocker to supporting
`-shared-libsan` in https://github.com/llvm/llvm-project/pull/226551.
Commit: 8ce1ee44b2f777797df77b5421c66efbe986d3d1
https://github.com/llvm/llvm-project/commit/8ce1ee44b2f777797df77b5421c66efbe986d3d1
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
A mlir/unittests/Dialect/Arith/ArithUtilsTest.cpp
A mlir/unittests/Dialect/Arith/CMakeLists.txt
M mlir/unittests/Dialect/CMakeLists.txt
Log Message:
-----------
[mlir][arith] Support equal-width float conversions (#225346)
Use arith.convertf in convertScalarToDtype when converting between
floating-point types that have the same bit width but different
semantics.
Add focused unit coverage for f16-to-bf16 and bf16-to-f16 conversions.
Assisted-by: Codex
Commit: e3c719620d5e827d5b81851c1714e0abd2b88dfc
https://github.com/llvm/llvm-project/commit/e3c719620d5e827d5b81851c1714e0abd2b88dfc
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
Log Message:
-----------
[AMDGPU] Don't apply gfx950 fetch-window loop align to the wrong block (#221821)
MachineBlockPlacement aligns the backedge destination after loop
rotation, which may not be the LoopInfo header. Query that block for the
32-byte request and the 4-byte pad cap so they stay consistent.
## Summary
- Pass the block being aligned into `getPrefLoopAlignment` so gfx950
fetch-window alignment uses the backedge destination, not only the
LoopInfo header.
- Unrotated 8-byte headers still get capped.
- Rotated 4-byte landing pads are no longer given uncapped 32-byte
alignment.
Commit: 3272c2894cbe0687fd7ba924f8fdfa770d630b14
https://github.com/llvm/llvm-project/commit/3272c2894cbe0687fd7ba924f8fdfa770d630b14
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/test-suite/aarch64.cmake
Log Message:
-----------
[GitHub] Fix test-suite.yml FFmpeg build with AArch64 (#227346)
On AArch64 there are assembly files that need CMAKE_ASM_COMPILER_TARGET
and CMAKE_ASM_FLAGS_INIT set
Commit: 05a75e831476a8446d9319f56ce46851da86fb68
https://github.com/llvm/llvm-project/commit/05a75e831476a8446d9319f56ce46851da86fb68
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Move DenseMapIterator above DenseMapBase (NFC) (#227208)
This patch moves the definition of DenseMapIterator right above
DenseMapBase so that all classes in DenseMap.h are defined in the
bottom-up order without forward declarations:
- DenseMapStorage
- SmallDenseMapStorage
- DenseMapIterator
- DenseMapBase
- DenseMap
- SmallDenseMap
Assisted-by: Antigravity
Commit: 91b08a503f4f712ea8ce83dc3887f8be7738e95a
https://github.com/llvm/llvm-project/commit/91b08a503f4f712ea8ce83dc3887f8be7738e95a
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Log Message:
-----------
[MISched](NFC) Factor control dependency construction state and logic out of `buildSchedGraph` (#226533)
Continuing the groundwork for a proper implementation of #205689, factor
the control dependency construction state and logic out of
`ScheduleDAGInstrs` into a friend class. This will also enable us to
further break up `buildSchedGraph` to make, e.g., the barrier chain
handling easier to comprehend.
Commit: f30100d7c010bbd856aea19aa5b54880ffd2f58c
https://github.com/llvm/llvm-project/commit/f30100d7c010bbd856aea19aa5b54880ffd2f58c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/utils/ci/lnt/dispatch-benchmarks
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++][NFC] Fix typos in the LNT tooling (#227347)
Commit: 08ba06eaa556554c8afb52dad73ff70eb4bf60ec
https://github.com/llvm/llvm-project/commit/08ba06eaa556554c8afb52dad73ff70eb4bf60ec
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
Log Message:
-----------
[mlir][OpenACC] Fix tile clause element bounds for descending loops (#227185)
acc.loops could have negative steps, but ACCLoopTiling computed each
element loop's bound assuming an ascending one. Both halves of that
computation were wrong for a descending dimension: the inclusive edge
subtracted one instead of adding one, and the bound was clamped with min
instead of max.
For `DO j = n, floor, -1` under `tile(32)`, the last tile's bound came
out as `min(floor, j - 33)`, which selects `j - 33` whenever it falls
below the floor. The element loop then ran past the end of the iteration
space, reading and writing outside the array.
With this change, we pick the clamp and the inclusive edge from the
step's direction. When the sign is only known at runtime, we compute
both and select on it.
The tiling tests had no coverage of negative steps or of inclusive upper
bounds. This patch adds four new tests: descending, descending with an
inclusive bound, ascending with an inclusive bound, and a runtime-signed
step.
Commit: c3460c8c55e3b98912d7444518f3d7b98de8ae9c
https://github.com/llvm/llvm-project/commit/c3460c8c55e3b98912d7444518f3d7b98de8ae9c
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang][docs] Markup corrections for attribute documentation (#226729)
The conversion of Clang attribute documentation from reST to MyST
markdown did not transform markup correctly in all cases. Additionally,
some PRs that were originally authored for reST were merged after the
conversion resulting in reST formatted markdown getting re-introduced.
This change corrects all such cases the author was able to identify,
applies markup that was previously missing, corrects a few typos along
the way, and even adds a missing attribute documentation reference that
has prevented the `#pragma clang loop` `pipeline` and
`pipeline_initiation_interval` documentation from being published since
2019.
Commit: 9cafc5e731d39b5f5879c77e4e217f9cc76a2711
https://github.com/llvm/llvm-project/commit/9cafc5e731d39b5f5879c77e4e217f9cc76a2711
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p2.cpp
M clang/test/SemaTemplate/GH71595.cpp
Log Message:
-----------
[Clang] prevent instantiation of invalid friend function templates (#227038)
Fixes #226673
---
This patch addresses the issue in which an invalid friend function
template is instantiated as a valid declaration, leading to a crash upon
a later redeclaration.
---
This fixes a regression introduced by
https://github.com/llvm/llvm-project/pull/216555
Commit: d909762a50d59d3d37f7008f23719efe6dd353b7
https://github.com/llvm/llvm-project/commit/d909762a50d59d3d37f7008f23719efe6dd353b7
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Remove unreachable code (#227100)
The function already has an early return after failed allocation.
Commit: ca811cfa9e82f7e9f0ceaafb3bda23b9ae896251
https://github.com/llvm/llvm-project/commit/ca811cfa9e82f7e9f0ceaafb3bda23b9ae896251
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
Log Message:
-----------
[RISCV] Remove combineTruncSelectToSMaxUSat. (#227162)
This is covered by InstCombine for the motivating benchmark.
Commit: 55400d78d517f37aa4a53dc5a6a589e96a30a47f
https://github.com/llvm/llvm-project/commit/55400d78d517f37aa4a53dc5a6a589e96a30a47f
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
Log Message:
-----------
[CodeGen] Remove DIE::setForceChildren and DIE::ForceChildren (NFC) (#227207)
The last caller of DIE::setForceChildren was removed on March 6, 2017
in commit a175512b18478848bdbe203f2d25dc417860e3c5, leaving
DIE::ForceChildren always false.
Assisted-by: Antigravity
Commit: 02404370e82a97c43b2edc858cd79d042e85da6a
https://github.com/llvm/llvm-project/commit/02404370e82a97c43b2edc858cd79d042e85da6a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
Log Message:
-----------
[lldb][Windows] Register the shadow listener in PlatformWindows (#227277)
`PlatformWindows::DebugProcess` and `PlatformWindows::Attach` create the
Process and hijack its events, but never call
`Process::SetShadowListener` with the listener from the launch or attach
info. `PlatformPOSIX`, `PlatformRemoteGDBServer` and `Target::Launch`'s
all do.
On Windows a shadow listener set with `SBLaunchInfo::SetShadowListener`
therefore never gets an event, which is why
`TestEvents.test_shadow_listener` failed on every run (`"Shadow listener
got event too"`) on both the lldb-server and the in-process backend.
Call `SetShadowListener` in both, and in Attach only touch `process_sp`
once it is known to be non-null (HijackProcessEvents was called before
the null check).
I was able to reproduce the failure at desk on a machine that's under
load. The issue no longer reproduces after this patch.
Fixes https://github.com/llvm/llvm-project/issues/37721.
rdar://188700614
Commit: 7ed1f4881e17f82c2686fa8dfada717d30e550ba
https://github.com/llvm/llvm-project/commit/7ed1f4881e17f82c2686fa8dfada717d30e550ba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Add another reschedule copy order test (#227342)
Another test for the fix from #227289, which hit a different
assert condition.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3f91f4809e2b5af8ed2f97b4cc43220b279b7f7a
https://github.com/llvm/llvm-project/commit/3f91f4809e2b5af8ed2f97b4cc43220b279b7f7a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/test/API/commands/expression/issue_11588/Test11588.py
Log Message:
-----------
[lldb][Windows] Format in-process x86 and x64 GPRs as lowercase hex (#227299)
The in-process Windows plugin printed `x86`/`x64` registers in uppercase
hex, unlike every other register table.
`Test11588` compares against lowercase hex, so it only passed when the
address happened to have no letters.
This patch uses lowercase hex, matching `lldb-server`. Test11588 is
re-enabled.
Commit: 9076414489edb1db74ec6f7bc22a715d1cd66f0c
https://github.com/llvm/llvm-project/commit/9076414489edb1db74ec6f7bc22a715d1cd66f0c
Author: arsnyder16 <asnyder at minitab.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_invoke_microtask.cpp
M openmp/runtime/test/misc_bugs/many-microtask-args.c
A openmp/runtime/test/misc_bugs/too-many-microtask-args.c
Log Message:
-----------
[OpenMP] Support up to 32 arguments in the generic microtask dispatcher (#211071)
Extend the generic `__kmp_invoke_microtask` implementation to support up
to 32 microtask arguments.
The generic dispatcher currently handles at most 15 arguments. OpenMP
regions with more captured variables terminate at runtime.
This affects WebAssembly because call_indirect requires the callee type
to exactly match the call-site type. Unlike assembly dispatchers on
platforms such as x86_64, the generic C++ implementation cannot
construct an arbitrary-arity call dynamically and must provide each
supported signature explicitly.
Real-world OpenMP regions can exceed the existing limit; the motivating
cases require between 16 and 21 arguments.
A longer-term alternative would be to change the compiler/runtime
convention for generic-dispatch targets so captured-variable pointers
are passed through a single packed context argument. That would remove
the fixed upper bound, but it would require coordinated Clang and OpenMP
runtime changes and consideration of compatibility with objects produced
using the existing variadic microtask ABI. This change keeps the
existing ABI and provides a focused runtime-only fix.
Commit: db7c669fa2addda945c7fede438f562d443a1ad1
https://github.com/llvm/llvm-project/commit/db7c669fa2addda945c7fede438f562d443a1ad1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
ARM: Move abi name implied float abi to TargetParser (#226774)
ARMTargetMachine overrode the default float abi based on the abi name.
Move this logic to TargetParser so the ABI will be computable without
depending on codegen.
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: 43d9238a7f79d0a6714b9ffa4af97484fed8429e
https://github.com/llvm/llvm-project/commit/43d9238a7f79d0a6714b9ffa4af97484fed8429e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-Ext] Prefer pack/ppairo.h over pncvt.h/pncvth.h in shuffle lowering (#227105)
These have equivalent behavior, but pncvt.h/pncvth.h requires the input
to be a register pair. Shuffle lowering doesn't know if the sources came
from the same 64-bit value so using pncvt.h/pncvth.h may overconstrain
register allocation and require copies.
If some hardware has better performance for pncvt.h/pncvth.h we
can consider ways to intelligently pick the two alternatives. For
now just pick pack/ppairo.h.
Commit: c2333b4d0497f8a7d36653e4f3c022b4a86557f2
https://github.com/llvm/llvm-project/commit/c2333b4d0497f8a7d36653e4f3c022b4a86557f2
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/conf.py
M clang/docs/index.md
Log Message:
-----------
[docs] Enforce unambiguous toctree in clang/docs (#224101)
The rationale and methodology are the same as in
03511907c7a9908f7902e18d3789371a63bb91b1 just in `clang` this time.
Commit: 667cfbec38942e08bd67fa51cc05e63686dd01b9
https://github.com/llvm/llvm-project/commit/667cfbec38942e08bd67fa51cc05e63686dd01b9
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/common-threads-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
A libc/include/llvm-libc-macros/threads-macros.h
M libc/include/threads.yaml
M libc/include/unistd.yaml
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/thread.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/sysconf.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_tss_test.cpp
M libc/test/integration/src/threads/tss_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc] Reset thread-specific key value before invoking destructor (#226134)
POSIX specifies that before calling a thread-specific key destructor,
the value of the key must be set to NULL (so pthread_getspecific returns
NULL from inside the destructor), and that the destructor pass must
repeat up to PTHREAD_DESTRUCTOR_ITERATIONS times if destructors
re-associate non-NULL values with keys.
This patch sets the key payload to nullptr prior to calling the
destructor, and loops over the key array up to the destructor iteration
limit as long as non-NULL values remain.
Along with that:
- introduce common-threads-macros.h to share the destructor iteration
count (4) between C (TSS_DTOR_ITERATIONS) and POSIX
(PTHREAD_DESTRUCTOR_ITERATIONS), and use it internally
- expose TSS_DTOR_ITERATIONS in threads.h
- expose and implement _SC_THREAD_DESTRUCTOR_ITERATIONS in sysconf
Note that I am not fixing the issue where a deleted key's destructor can
still run on thread exit if it was already cached in thread-local
storage. Fixing that properly will require tracking key generations or
validity across threads, so I'm leaving that for separate work
(#226122).
Fixes #194029.
Assisted-by: Gemini
Commit: 747612bf4a4334a343221359a27a1eb9026a5db1
https://github.com/llvm/llvm-project/commit/747612bf4a4334a343221359a27a1eb9026a5db1
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
Log Message:
-----------
[lldb][test] Fix race condition in test_stop-hook.cpp (#227284)
This test has been failing on AArch64 Linux recently. Either with
SIGSEGV or SIGABRT (less often that one).
I could reproduce it locally by varying system load, and got this out of
a core file:
```
* thread #1, name = 'test_python_sto', stop reason = SIGSEGV: address not mapped to object (fault address=0xc17d18317552db80)
* frame #0: 0x0000ef7dc72ac6cc libc.so.6`__GI_memchr at memchr.S:68
frame #1: 0x0000ef7dc727cf4c libc.so.6`_IO_getline_info(fp=0x0000b9b53a8bd180, buf="\xa9\xb4\t\xce}\xef", n=<unavailable>
, delim=10, extract_delim=1, eof=0x0000000000000000) at iogetline.c:85:17
frame #2: 0x0000ef7dc727bdc4 libc.so.6`_IO_fgets(buf="\xa9\xb4\t\xce}\xef", n=<unavailable>, fp=0x0000b9b53a8bd180) at io
fgets.c:53:11
frame #3: 0x0000ef7dc80f2b80 liblldb.so.24.0git`lldb_private::IOHandlerEditline::GetLine(std::__cxx11::basic_string<char,
std::char_traits<char>, std::allocator<char>>&, bool&) + 996
frame #4: 0x0000ef7dc80f41f4 liblldb.so.24.0git`lldb_private::IOHandlerEditline::Run() + 180
frame #5: 0x0000ef7dc80bf614 liblldb.so.24.0git`lldb_private::Debugger::RunIOHandlers() + 128
frame #6: 0x0000ef7dc80ccee8 liblldb.so.24.0git`std::_Function_handler<void* (), lldb_private::Debugger::StartIOHandlerTh
read()::$_0>::_M_invoke(std::_Any_data const&) + 28
frame #7: 0x0000ef7dc81e1608 liblldb.so.24.0git`lldb_private::HostNativeThreadBase::ThreadCreateTrampoline(void*) + 124
frame #8: 0x0000ef7dc72903c8 libc.so.6`start_thread(arg=0x000000000080e640) at pthread_create.c:442:8
frame #9: 0x0000ef7dc72f9fdc libc.so.6`thread_start at clone.S:79
```
What's happening is that the interpreter's input stream is set to stream
A, then we reset it to the default, then close stream A. There may still
be reads from stream A in flight when we close it, which lead to the
crash.
The solution is to wait on the interpreter thread to finish whatever
it's doing. SBDebuger::Destroy does that.
Normally that would be called by driver.cpp but it can be called on
already destroyed objects. So for this test we'll call it twice, but
that's not a problem.
Commit: 0c8e5777423c2e657d7e5c61b2cc812253f9b3ec
https://github.com/llvm/llvm-project/commit/0c8e5777423c2e657d7e5c61b2cc812253f9b3ec
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
A llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-vperm-pk16.mir
A llvm/test/CodeGen/AMDGPU/vperm-pk16-exec-hazard.ll
A llvm/test/CodeGen/AMDGPU/vperm-pk16-exec-hazard.mir
Log Message:
-----------
[AMDGPU] Insert exec-forced V_NOP after V_PERM_PK16 (gfx1250/gfx1251 hazard) (#214406)
On gfx1250/gfx1251 the V_PERM_PK16 family (V_PERM_PK16_B4/B6/B8_U4) has
a hazard: the instruction must be immediately followed by a "safe"
instruction that issues on the pipe which clears the hazard. Insert
V_NOP as needed.
Also updated hasUnwantedEffectsWhenEXECEmpty() to ensure V_PERM_PK16 and
the inserted V_NOP are under non-zero EXEC.
Fixes: ROCM-26041
Assisted-by: Opus 4.8 Medium
Commit: 387b1c5fad41ec653fe713df09ffa89b32aa4d44
https://github.com/llvm/llvm-project/commit/387b1c5fad41ec653fe713df09ffa89b32aa4d44
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelLowering.cpp
A llvm/test/CodeGen/ARM/Windows/chkstk-dead-lr.ll
M llvm/test/CodeGen/ARM/Windows/vla-cpsr.ll
Log Message:
-----------
ARM: Mark __chkstk call's implicit LR def dead (#227218)
The WIN__CHKSTK custom inserter already marks the clobbered R12 and CPSR
defs dead, but left the call's implicit-def $lr for later inference.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 41823dd915c79fc949bd9bd7ff46b0c143145589
https://github.com/llvm/llvm-project/commit/41823dd915c79fc949bd9bd7ff46b0c143145589
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/Sema/warn-fortify-source-poll-not-builtin.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for poll, ppoll, and ppoll64 (#226261)
Add `-Wfortify-source` diagnostics for `poll`, `ppoll`, and `ppoll64` when the byte size required for `nfds` descriptors (`nfds * sizeof(*fds)`) exceeds the destination `fds` buffer size.
Supersedes the `poll` portion of #177286 (similar to #198130 for `umask`).
Part of #142230
Assisted-by: Gemini
Commit: 255bce1a819c79f419f51b939b16a319a8281372
https://github.com/llvm/llvm-project/commit/255bce1a819c79f419f51b939b16a319a8281372
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 3b0b6d892bdf (#227382)
Commit: db96411d666c33a79f1795365af98ee579735e41
https://github.com/llvm/llvm-project/commit/db96411d666c33a79f1795365af98ee579735e41
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port 5239371ffa13 (#227383)
Commit: 37c90172320f2d58a297bb0fe331d42c8c275875
https://github.com/llvm/llvm-project/commit/37c90172320f2d58a297bb0fe331d42c8c275875
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port 72a712b0a552 (#227384)
Commit: 78386bf17e0b685790ae83efc9b9f8c316bd5583
https://github.com/llvm/llvm-project/commit/78386bf17e0b685790ae83efc9b9f8c316bd5583
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
A llvm/test/Transforms/SimplifyCFG/NVPTX/lit.local.cfg
A llvm/test/Transforms/SimplifyCFG/NVPTX/switch-to-lookup-table-addrspace.ll
Log Message:
-----------
[NVPTX] Implement shouldBuildLookupTablesForConstant (#220088)
Exclude addresses of GlobalValues in unsupported address spaces.
Assisted-by: Claude.
Commit: d1bc40a108fd0a680edda2b4200d32cc236eba76
https://github.com/llvm/llvm-project/commit/d1bc40a108fd0a680edda2b4200d32cc236eba76
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/trunc-extractelement.ll
Log Message:
-----------
[InstCombine] Use uint64_t for TruncRatio to avoid overflow (#225150)
This changes `TruncRatio` from `unsigned` to `uint64_t` in
`foldVecExtTruncToExtElt`, and replaces the pre-existing 32-bit `assert`
with a graceful bail-out plus a regression test.
```
unsigned TruncRatio = SrcBits / DstBits;
```
`BitCastNumElts` is used to build the destination vector type. With
`TruncRatio` declared `unsigned`, this product is evaluated in 32 bits:
```
BitCastNumElts = VecElts.getKnownMinValue() * TruncRatio;
```
An overflow would wrap to a small value that silently satisfies the
existing assert and construct a wrong-sized vector type:
```
assert(BitCastNumElts <= std::numeric_limits<uint32_t>::max() &&
"overflow 32-bits");
```
Declaring `TruncRatio` as `uint64_t` computes the true 64-bit product.
Rather than keep an assert (which would just crash on the overflowing
input), this drops the assert and bails out gracefully when the element
count can't be represented, so the fold is simply skipped instead of
forming an invalid vector type:
```
uint64_t BitCastNumElts = VecElts.getKnownMinValue() * TruncRatio;
// Computed in 64-bit above to avoid a 32-bit overflow. Bail out if the
// element count exceeds IntegerType::MAX_INT_BITS, as we cannot create a
// wider vector type.
if (BitCastNumElts > IntegerType::MAX_INT_BITS)
return nullptr;
```
A lit test (`test_bitcast_numelts_overflow` in
`llvm/test/Transforms/InstCombine/trunc-extractelement.ll`) triggers the
unsigned wrap using a `<536870912 x i64>` (2^29 elements) truncated to
`i8` -- `2^29 * 8 = 2^32`, which wraps to `0` when computed in 32 bits --
and checks that the fold is now correctly skipped instead of producing
an invalid bitcast.
Assisted by: Cline
Commit: 690aab48d08ed8cd087216c22e6818fb369f4dd7
https://github.com/llvm/llvm-project/commit/690aab48d08ed8cd087216c22e6818fb369f4dd7
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
Log Message:
-----------
[Bazel] Fixes 09cdef0 (#227345)
This fixes 09cdef016cfc756b29002cd7870c63b7f1b09c6b (#226529).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=09cdef016cfc756b29002cd7870c63b7f1b09c6b
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: a4652a67a9d3ceba71bfa38d707a3b9de62c354c
https://github.com/llvm/llvm-project/commit/a4652a67a9d3ceba71bfa38d707a3b9de62c354c
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
Log Message:
-----------
[AMDGPU] Fold fpround of fadd and fsub into v_mad/fma_mixlo and mixhi (#224913)
MadFmaMixFP32Pats turns (fadd x, y) into (fma x, 1.0, y) and (fsub x, y)
into (fma (-y), 1.0, x) so the mix instructions absorb the operation
along with the f16 or bf16 source modifiers. MadFmaMixFP16Pats and
MadFmaMixFP16Pats_t16 only did this for fmul, so a rounded result still
needed a separate convert for a rounding the mix instructions perform
themselves.
Unlike the f32 patterns these do not require an operand to be an
fpextend of an f16, since an fpround on the result always removes the
convert. The rewrite is exact because the mix instructions round the f32
result again when they write the 16-bit destination, so it stays
f32_to_f16(fma(x, 1.0, y)).
Assisted-by: Claude Code Opus 5
Commit: 9fc7a33a1a81751ebaa2e2753c471195580e6ca9
https://github.com/llvm/llvm-project/commit/9fc7a33a1a81751ebaa2e2753c471195580e6ca9
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[gn build] Port 72a712b0a552 (#227384)
Commit: b4d0c5650f303a0a93f007e8dcebb49213e21c26
https://github.com/llvm/llvm-project/commit/b4d0c5650f303a0a93f007e8dcebb49213e21c26
Author: Robert Imschweiler <robert.imschweiler at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/plugins-nextgen/cuda/src/rtl.cpp
Log Message:
-----------
[offload][cuda] Fix uid string handling (#227223)
Fixes https://github.com/llvm/llvm-project/issues/227094
Commit: d4e91964c3a57c2768db7946a399eb96d346b2c5
https://github.com/llvm/llvm-project/commit/d4e91964c3a57c2768db7946a399eb96d346b2c5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Remove unnecessary container constructions in setup code (#216141)
It turns out that a fair amount of the benchmark suite is spent in
unmeasured code. Amongst other things, we were constructing temporary
containers from scratch instead of assigning from an already built-up
copy, which is a lot faster.
This patch speeds up the wall time for running flat_map benchmarks by
approximately 30s (from 98s to 66s) on my machine.
Commit: d53a3f75525dbb6f6b029f069874f0c0c823e2a9
https://github.com/llvm/llvm-project/commit/d53a3f75525dbb6f6b029f069874f0c0c823e2a9
Author: Dave Lee <davelee.com at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/examples/python/formatter_bytecode.py
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
Log Message:
-----------
[lldb] Add null opcode to formatter bytecode (#224443)
This allows formatters to produce a null ValueObject, which can be
needed for
`@get_child_index` or `@get_child_at_index`.
Commit: bfa516b271a8e113ae84478a4cf7f17e0659274f
https://github.com/llvm/llvm-project/commit/bfa516b271a8e113ae84478a4cf7f17e0659274f
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Constant.h
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/InstCombine/freeze.ll
Log Message:
-----------
[ValueTracking] Support Array and Structure in contains* check (#226748)
Support Vector and Structure in containsUndefinedElement,
containsUndefOrPoisonElement, and containsConstantExpression. We
achieved this by using containsMatchingElement helper function, which
checks type recursively as Structure and Array are aggregates, which can
contain basically anything inside. This allows InstCombine to fold these
two types for freeze correctly.
Commit: fb00768dcf426f7dacda4af300d958368256e530
https://github.com/llvm/llvm-project/commit/fb00768dcf426f7dacda4af300d958368256e530
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/algorithms/sorting/push_heap.bench.cpp
Log Message:
-----------
[libc++] Fix calling push_heap on an empty range in the push_heap benchmark (#227076)
std::push_heap requires a non-empty range because it inserts the element
at position `last - 1` (which isn't valid for an empty range) into the
heap. This didn't show up as a problem with libc++ since we have a
defensive implementation, but libstdc++ does not.
Commit: 36668e0a14d7d035c983e0df79c28c3531bb04eb
https://github.com/llvm/llvm-project/commit/36668e0a14d7d035c983e0df79c28c3531bb04eb
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
A clang/test/SemaOpenCL/builtins-amdgcn-wave-match-err.cl
M llvm/docs/AMDGPUUsage.rst
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.match.b32.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.match.b32.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for v_wave_match_b32 (#226971)
Commit: afa5673a691929dc2af7b08b69cc6541d3d1f064
https://github.com/llvm/llvm-project/commit/afa5673a691929dc2af7b08b69cc6541d3d1f064
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[Clang][Sema] Add fortify warnings for poll, ppoll, and ppoll64 (#226261)
Add `-Wfortify-source` diagnostics for `poll`, `ppoll`, and `ppoll64` when the byte size required for `nfds` descriptors (`nfds * sizeof(*fds)`) exceeds the destination `fds` buffer size.
Supersedes the `poll` portion of #177286 (similar to #198130 for `umask`).
Part of #142230
Assisted-by: Gemini
Commit: 030f1195f0219a66c028935c61ae53b69c9e74df
https://github.com/llvm/llvm-project/commit/030f1195f0219a66c028935c61ae53b69c9e74df
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/fsanitize-undefined-offload.c
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_preinit.cpp
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/shift.hip
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-missing.cpp
M compiler-rt/test/ubsan/lit.common.cfg.py
Log Message:
-----------
[compiler-rt] Support `-shared-libsan` for Offload UBSan (#226551)
Summary:
The offload UBSan is intentionally implemented as a separate 'add-on'
library. This makes it more clear where the separation lies and avoids
including it in all existing UBSan users. However, this doesn't work
with `-shared-libsan`'s `*.so` builds because we now have a function
call barrier and the internal utility functions are hidden.
This PR changes the shared version to fold the HSA / Offloading handlers
into the `libclang_rt.ubsan.so` library. The specific fallout is that
~30KiB is added to the shared library and it will now intercept `dlsym`
for other users, but this should be benign. The overhead here is less
concerning than in the static case because it is shared and usually
loaded lazily by the system.
Commit: 1ad0d1c3437659f4b8dd2b78da81fb9702137873
https://github.com/llvm/llvm-project/commit/1ad0d1c3437659f4b8dd2b78da81fb9702137873
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[Clang][NFC] Fix tagging issue number in clang releasenotes (#227374)
Fix tagging the issue number in the clang release notes to make them
clickable after rendering
Commit: e2892c931c82521305da90d3b62bc78f272f2f51
https://github.com/llvm/llvm-project/commit/e2892c931c82521305da90d3b62bc78f272f2f51
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[llvm] Adjust export annotations for tests (#227255)
* Properly export templates so they work on both Windows and Linux.
* Adjust LLVM_ABI_FOR_TEST annotations to be in the right place and
remove redundant annotations.
Commit: 8abde198090c024c1ec178b2ae64021db35dba90
https://github.com/llvm/llvm-project/commit/8abde198090c024c1ec178b2ae64021db35dba90
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
Log Message:
-----------
[ARM] Use target constant for MVE fixed fp convert constant (#227250)
If the constant already exists then we would reuse the constant in a
register instead of using an immediate, as the instruction requires. Use
a TargetConstant to make sure we generate an immediate.
Fixes #226591
Commit: d3263d348e9908efaf128e65f54d6029b6b61036
https://github.com/llvm/llvm-project/commit/d3263d348e9908efaf128e65f54d6029b6b61036
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-undef-use-not-killed.mir
Log Message:
-----------
TwoAddressInstructions: Don't treat an undef use as a kill (#227309)
An undef use does not read a value, so LiveIntervals does not extend the
live range to cover it. Previously this would hit the assert on an
undef use.
Exposed by #225174, which made LiveIntervals available here by default.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: ea14603e78faa0eda6041ffe0519d451985b4faa
https://github.com/llvm/llvm-project/commit/ea14603e78faa0eda6041ffe0519d451985b4faa
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
M clang/lib/Frontend/CompilerInstance.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
M llvm/unittests/Passes/Plugins/PluginsTest.cpp
Log Message:
-----------
[Plugins] Rename PassPlugin::Load to load. NFC (#227408)
Follow the lowerCamelCase function naming convention and take StringRef.
Extracted from #226773
Commit: e7836a0d9f9793da394520c72e47cbc056d1dda2
https://github.com/llvm/llvm-project/commit/e7836a0d9f9793da394520c72e47cbc056d1dda2
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-llvm-help.c
M clang/tools/clang-linker-wrapper/CMakeLists.txt
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
Log Message:
-----------
[clang-linker-wrapper] Remove -load-pass-plugin (#227410)
The loaded plugins are unused since #113715 removed in-process LTO.
Removing the option also removes a cl::callback user
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
Extracted from #226773
Commit: 73c7c3579c9fb31d7bb2f318dacd98180df0b9da
https://github.com/llvm/llvm-project/commit/73c7c3579c9fb31d7bb2f318dacd98180df0b9da
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/test/Transforms/InstCombine/builtin-dynamic-object-size.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[MemoryBuiltins] Preserve profiles when optimizing llvm.objectsize (#227397)
In some cases when lowering llvm.objectsize (e.g., when the object
pointer comes from a select), we end up with a select in the output. We
can trivially preserve the branch weights due to the condition being the
same in some cases.
Commit: c0a3f49f1ca7a3d2dd56970a7b5aa5b817f8f48b
https://github.com/llvm/llvm-project/commit/c0a3f49f1ca7a3d2dd56970a7b5aa5b817f8f48b
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/reduced-val-replaced-twice.ll
Log Message:
-----------
[SLP]Fix stale candidate lookup for externally used reduced values
A candidate may be replaced by earlier vectorization attempts, so the
current scalar was not kept externally used and got erased while still
used by the reduction ops. Look up the tracked value by the original one.
Fixes #227314
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227417
Commit: 98386130ab0009ffea4b24ef1b3502747a7b8699
https://github.com/llvm/llvm-project/commit/98386130ab0009ffea4b24ef1b3502747a7b8699
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CAS/BuiltinUnifiedCASDatabases.h
M llvm/include/llvm/CAS/OnDiskCASLogger.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CAS/ValidationResult.h
M llvm/lib/CAS/BuiltinUnifiedCASDatabases.cpp
M llvm/lib/CAS/OnDiskCASLogger.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/test/tools/llvm-cas/logging.test
M llvm/test/tools/llvm-cas/validation.test
M llvm/tools/llvm-cas/Options.td
M llvm/tools/llvm-cas/llvm-cas.cpp
M llvm/unittests/CAS/OnDiskCommonUtils.h
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Split on-disk CAS validate-if-needed into validation and recovery (#226291)
Split validate-if-needed into two steps: an in-process validation and a
separate recovery. Validation marks the validation file as pending
before validating and records the boot time only on success, so a
validation that fails or crashes is detected by recovery and not
skipped by the next validation. Recovery only happens while validation
is pending, so concurrent recoveries after the same failure recover
once.
llvm-cas now drives out-of-process validation itself: it re-executes
itself with -in-process, forwards the output, and recovers if the child
fails or crashes and -allow-recovery is given. When recovering, the
validation error is only printed with -verbose. The library APIs no
longer take an llvm-cas path.
Commit: 841433da7862a29bc1688ce7960c7ee349fa2973
https://github.com/llvm/llvm-project/commit/841433da7862a29bc1688ce7960c7ee349fa2973
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm-c/CAS/PluginAPI_functions.h
M llvm/include/llvm-c/CAS/PluginAPI_types.h
M llvm/include/llvm/CAS/ObjectStore.h
M llvm/lib/CAS/PluginAPI.h
M llvm/lib/CAS/PluginAPI_functions.def
M llvm/lib/CAS/PluginCAS.cpp
M llvm/test/CMakeLists.txt
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/llvm-cas/lit.local.cfg
A llvm/test/tools/llvm-cas/plugin-validation-crash.test
A llvm/test/tools/llvm-cas/plugin-validation.test
M llvm/tools/libCASPluginTest/libCASPluginTest.cpp
M llvm/tools/libCASPluginTest/libCASPluginTest.exports
M llvm/tools/llvm-cas/Options.td
M llvm/tools/llvm-cas/llvm-cas.cpp
M llvm/unittests/CAS/PluginCASTest.cpp
Log Message:
-----------
[CAS] Support validation and recovery for plugin CAS in llvm-cas (#227056)
Add the -fcas-plugin-path and -fcas-plugin-option options to llvm-cas,
and optional llcas_cas_validate_if_needed() and
llcas_cas_recover_ondisk_data() functions to the plugin API, exposed
via cas::validatePluginCASDatabasesIfNeeded() and
cas::recoverPluginCASDatabases(). Implement them, along with
llcas_cas_validate() and llcas_actioncache_validate(), in
libCASPluginTest and make the plugin available to lit tests.
Commit: 92cdaa21f4f1e0b883ed694f790c0793db96b71c
https://github.com/llvm/llvm-project/commit/92cdaa21f4f1e0b883ed694f790c0793db96b71c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Don't build offload ubsan library on 32-bit hosts (#227424)
Summary:
Previous changes put the offload library in the main path. This caused
us to link in 64-bit specific library calls and fail int i386. Simply
restrict building this library to 64-bit hosts only.
Commit: abf10296ea7fcb250a6cfae307df39903ddad21d
https://github.com/llvm/llvm-project/commit/abf10296ea7fcb250a6cfae307df39903ddad21d
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[NFC][AMDGPU] Add tests for SCC live into a frame index user (#225196)
Pre-commit tests for the case where SCC is live into a frame index user
and
no SGPR is free to hold the V_READFIRSTLANE_B32 result. Scavenging one
emergency-spills an SGPR, and an SGPR spill flips EXEC with S_NOT_B64,
so the
EXEC flips land between the S_CMP_EQ_U32 that defines SCC and the read
of SCC
that follows, clobbering it in between.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: a3ea30af9f485e0561cdb91221ea1663cba82813
https://github.com/llvm/llvm-project/commit/a3ea30af9f485e0561cdb91221ea1663cba82813
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/test/CodeGen/AMDGPU/sgpr-spill-to-vmem-scc-clobber-reserved-exec-copy.mir
Log Message:
-----------
[AMDGPU] Don't spill an SGPR while SCC is live in frame index lowering (#224080)
When SCC is live into a scalar frame index user, the scaling path avoids
SALU ops that write SCC by computing the address in a VGPR and reading
it
back with V_READFIRSTLANE_B32. If the destination of that readfirstlane
is
scavenged with spilling allowed, an AMDGPU SGPR spill writes inactive
lanes, so it flips EXEC with S_NOT_B64 and clobbers SCC. Instead,
scavenge
that register with AllowSpill=false.
---
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href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: e6e7da35405a3f6d91bc6a91d8bb2bd533a94276
https://github.com/llvm/llvm-project/commit/e6e7da35405a3f6d91bc6a91d8bb2bd533a94276
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/utils/hdrgen/hdrgen/function.py
M libc/utils/hdrgen/tests/expected_output/subdir/test.h
M libc/utils/hdrgen/tests/input/subdir/test.yaml
Log Message:
-----------
[libc][hdrgen] Improve support for function-types as function args. (#227088)
Previously entries like
```
type: int (*)(const struct type_b **, const struct type_c **)
```
ended up assuming the type should be `struct_type_b_struct_type_c`.
Fix this by splitting the type strings into components, where each
component can be a type name itself (which is the case for a complex
function types like in the example above. This was raised during the
discussion in https://github.com/llvm/llvm-project/pull/223198
Commit: ef1e579be4898441f4b340bf7e416397cc1d8f4f
https://github.com/llvm/llvm-project/commit/ef1e579be4898441f4b340bf7e416397cc1d8f4f
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/src/__support/mathvec/CMakeLists.txt
M libc/src/__support/mathvec/cosf.h
M libc/src/__support/mathvec/trig_reductionf.h
M libc/src/__support/mathvec/trig_reductionf_nofma.h
M libc/test/UnitTest/SIMDMatcher.h
M libc/test/src/mathvec/UnitTestWrappers.h
M libc/test/src/mathvec/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
M libc/test/src/mathvec/exhaustive/sinf_test.cpp
M libc/test/src/mathvec/sinf_test.cpp
Log Message:
-----------
[libc][mathvec] Vectorise cosf (#224290)
Replaces loop over scalar cosf with a fully vectorised implementation.
Replaces sinf and cosf scalar reference with a forced accurate double-eval.
Commit: 05ec41c6f31e71d524893e37c936885516334c90
https://github.com/llvm/llvm-project/commit/05ec41c6f31e71d524893e37c936885516334c90
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[ARM] Use target constant for MVE fixed fp convert constant (#227250)
If the constant already exists then we would reuse the constant in a
register instead of using an immediate, as the instruction requires. Use
a TargetConstant to make sure we generate an immediate.
Fixes #226591
Commit: 3084a8ffb386822a584f4658d8351a24aa3d965e
https://github.com/llvm/llvm-project/commit/3084a8ffb386822a584f4658d8351a24aa3d965e
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/docs/NewPassManager.md
M llvm/docs/ReleaseNotes.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/test/Feature/codegen-plugin-passes.mir
M llvm/test/Feature/codegen-plugin.ll
M llvm/test/Feature/load_extension.ll
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
M polly/lib/Support/RegisterPasses.cpp
Log Message:
-----------
[Plugins] Add -plugin-arg and PassPluginLibraryInfo::ParseArguments (#227414)
opt and llc load -load-pass-plugin plugins from a cl::opt callback while
parsing argv, so that the options a plugin registers are recognized
later on the command line. cl::callback is to be removed to enable
migration to a TableGen-based option representation
(https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/5).
To prepare for loading plugins after parsing, give plugins their own
arguments.
Add `-plugin-arg=<plugin>,<arg>`, which passes <arg> (split at the first
comma, so it may contain commas) to the new
PassPluginLibraryInfo::ParseArguments callback of the plugin named
<plugin> (LLVM_PLUGIN_API_VERSION 3). Plugins that define cl::opt (Polly
and the Bye and IRTransforms examples) parse their arguments with the
new parsePassPluginCommandLine.
opt also passes -plugin-arg arguments to statically linked extensions
(Extension.def), so Polly's options have the same spelling in both build
modes:
```
opt -plugin-arg=Polly,-polly-tile-sizes=1,64 ... # linked
opt -load-pass-plugin=LLVMPolly.so -plugin-arg=Polly,-polly-tile-sizes=1,64 ... # plugin
```
opt now registers plugins and linked extensions in one loop, so
optMain's PassBuilderCallbacks run after linked extensions.
Extracted from #226773
Commit: e76fc68fe1f02a9a55941fbe3704b3b836530c32
https://github.com/llvm/llvm-project/commit/e76fc68fe1f02a9a55941fbe3704b3b836530c32
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
A llvm/test/CodeGen/RISCV/jumptable-section.ll
M llvm/test/CodeGen/RISCV/jumptable.ll
Log Message:
-----------
[RISCV] Emit jumptables into text section with large code model (#227167)
The .rodata section may be far away with the large code model
Assisted-by: Claude
Commit: 9ff7b3edb2d859938ae344937c5d96c612f12cc8
https://github.com/llvm/llvm-project/commit/9ff7b3edb2d859938ae344937c5d96c612f12cc8
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/liboffload/API/Platform.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
A offload/unittests/OffloadAPI/platform/olIteratePlatforms.cpp
Log Message:
-----------
[OFFLOAD] add olIteratePlatforms (#226439)
Add a new service to iterate created Platforms. This differs from
obtaining the platforms from the existing olIterateDevices in that the
platforms are not initialized.
Assisted by Claude.
Commit: 64182d57ff6420aecd4cc2b2984daf552942f1f4
https://github.com/llvm/llvm-project/commit/64182d57ff6420aecd4cc2b2984daf552942f1f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/store-chains-shared-values.ll
Log Message:
-----------
[SLP][NFC]Add a test with ineffective vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227440
Commit: fce53c80f985d3447963322a82ae807fd06f4094
https://github.com/llvm/llvm-project/commit/fce53c80f985d3447963322a82ae807fd06f4094
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[SLP][NFC]Add a test with ineffective vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227440
Commit: 98331a0a49e6d4a86d2e39ecc71025ce3b85acd9
https://github.com/llvm/llvm-project/commit/98331a0a49e6d4a86d2e39ecc71025ce3b85acd9
Author: Md Abdullah Shahneous Bari <md.abdullah.shahneous.bari at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
A mlir/test/Conversion/MathToXeVM/algebraic-simplification.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
Log Message:
-----------
[MLIR][MathToXeVM] Add Algebraic simplification patterns in MathToXeVM. (#223442)
Add Algebraic simplification patterns in MathToXeVM pass.
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 08d36e8388141b79783b77236041d5846bb0bc22
https://github.com/llvm/llvm-project/commit/08d36e8388141b79783b77236041d5846bb0bc22
Author: newgre <jannewger at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Options/Options.td
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/runtime/CMakeLists.txt
A clang/test/CodeGen/copyprof.cpp
M clang/test/CodeGen/no-skipped-passes-O0-opt-bisect.c
A clang/test/CodeGenCXX/copyprof-attrs-move.cpp
A clang/test/CodeGenCXX/copyprof-attrs.cpp
A clang/test/Driver/fcopyprof.cpp
Log Message:
-----------
[CopyProf] Clang frontend and driver integration. (#225905)
This wires the existing passes and runtime up to the Clang driver so
CopyProf can actually be enabled from the command line.
Adds two flags:
- `-fcopyprof` — to enable CopyProf.
- `-fcopyprof-static-size-threshold=<N>` — minimum C++ object size in
bytes to enable instrumentation.
RFC:
https://discourse.llvm.org/t/rfc-copysanitizer-csan-detecting-unneccessary-object-copies-at-runtime/91038
Previous PR: #223458
---------
Co-authored-by: Jan Newger <jannewger at google.com>
Commit: fbf3ce75afb9a32470c4d13ec6e5a8cf1abb023a
https://github.com/llvm/llvm-project/commit/fbf3ce75afb9a32470c4d13ec6e5a8cf1abb023a
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/store-chains-shared-values.ll
Log Message:
-----------
[SLP]Vectorize the longer store groups first
A shorter store group that shares scalars with a longer one splits the
longer chain when it is vectorized first. Process the groups with more
stores first, so the shorter ones reuse their vectors.
Fixes #215998
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227445
Commit: 079efa261865eb52683420fa78f0a4a45752b15d
https://github.com/llvm/llvm-project/commit/079efa261865eb52683420fa78f0a4a45752b15d
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/include/PluginManager.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/PluginManager.cpp
Log Message:
-----------
[offload][omp] Load plugins through liboffload (#226440)
Change libomptarget to load the plugins through liboffload. Because
everything else (including initialization) is still intact at this stage
we still get a GenericPluginTy reference to call the plugin interface.
Assisted by Claude.
Commit: 3f4b3caf8bd7a7d0b2e12ed87518af76f7b58fdf
https://github.com/llvm/llvm-project/commit/3f4b3caf8bd7a7d0b2e12ed87518af76f7b58fdf
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
Log Message:
-----------
[NFC][AMDGPU] Add cost tests for narrow integer to fp casts (#225341)
Covers integer sources from a byte to 31 bits converted to half, float,
bfloat and double, as vector lanes and as scalars, over the subtarget
combinations that change the expansion. The existing cast tests get the
same subtarget coverage and the cases they were missing. The costs
recorded here are the ones the model reports today.
Commit: f5e74feac05ec1182c77874e8704728688a9174d
https://github.com/llvm/llvm-project/commit/f5e74feac05ec1182c77874e8704728688a9174d
Author: RobinTF <textorr at cs.uni-freiburg.de>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGExpr.cpp
M clang/test/CodeGenCXX/static-destructor.cpp
Log Message:
-----------
[clang][WebAssembly] Don't register this-returning destructors of reference temporaries directly with `__cxa_atexit` (#226619)
Under ABIs whose destructors return `this` (ARM, WebAssembly), a
destructor can only be registered directly (with `__cxa_atexit` etc.) if
the target tolerates the resulting function type mismatch. Clang already
checks this for global variables and registers a helper function
instead, but temporaries that are lifetime-extended by a reference with
static or thread storage duration always had their destructor registered
directly. On WebAssembly, which does not tolerate the mismatch, this
traps with "function signature mismatch" when the exit-time destructors
run. This PR changes the if condition to use the destroy helper that is
already used for arrays if the destructor cannot be registered directly.
Previously the following code would result in this:
```cpp
#include <cstdio>
struct B { B() {} ~B() { std::puts("~B"); } };
const B& b = B();
int main() {}
```
```
$ em++ -O2 -sEXIT_RUNTIME=1 repro.cpp -o repro.js && node repro.js
RuntimeError: function signature mismatch
<node stack trace>
```
with this patch applied it simply prints "~B".
Fixes #45221
Assisted-by: Claude Opus 5.5
Commit: 46d53887a4e5815ae5ff3567c6dc31b6c68190ef
https://github.com/llvm/llvm-project/commit/46d53887a4e5815ae5ff3567c6dc31b6c68190ef
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStore.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedVectorElement.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStore.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStore.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStore-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStore-errors.hlsl
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareStore.ll
A llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource-cmpxchg.ll
Log Message:
-----------
[HLSL] Add `InterlockedCompareStore` function and resource methods (#222164)
This PR adds the `InterlockedCompareStore` standalone function and
resource
methods. The operation lowers to `cmpxchg monotonic`.
`InterlockedCompareStore` reports nothing, so the `cmpxchg` result stays
unused. The PR adds a compare overload shape to `HLSLExternalSemaSource`
and a
matching resource method helper, which the `InterlockedCompareExchange`
PR
above it reuses.
The PR also adds the 64-bit `InterlockedCompareStore64` methods, which
DXIL
gates on shader model 6.6.
Fixes: https://github.com/llvm/llvm-project/issues/99128
Assisted by: Github Copilot
Commit: 7bb059d7c6fd5ab1c7873abe132c6d92c7744ab2
https://github.com/llvm/llvm-project/commit/7bb059d7c6fd5ab1c7873abe132c6d92c7744ab2
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
A mlir/test/Target/LLVMIR/omptarget-map-null-descriptor.mlir
A offload/test/offloading/fortran/optional-mapped-arguments-4.f90
Log Message:
-----------
[OpenMP] Fix descriptor allocation for absent optional arrays (#227082)
Commit: 98f3dda3a7364bd022d2cd7d06ef5e26453fa2a8
https://github.com/llvm/llvm-project/commit/98f3dda3a7364bd022d2cd7d06ef5e26453fa2a8
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/setgroups.h
M libc/src/grp/CMakeLists.txt
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
A libc/src/grp/initgroups.cpp
A libc/src/grp/initgroups.h
A libc/src/grp/setgroups.cpp
A libc/src/grp/setgroups.h
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/initgroups_test.cpp
A libc/test/src/grp/setgroups_test.cpp
Log Message:
-----------
[libc] Add setgroups and initgroups entrypoints (#227272)
Add the setgroups and initgroups entrypoints from <grp.h> (GNU
extensions).
A Linux syscall wrapper is added for setgroups, supporting both
SYS_setgroups and SYS_setgroups32. The initgroups entrypoint initialises
the supplementary group access list for a specified user by reading the
group database using a scoped database stream and setting the resulting
groups via setgroups.
Assisted-by: Automated tooling, human reviewed.
Commit: 9c7b7eef6af2d93ab3317e0689715188ae981cc5
https://github.com/llvm/llvm-project/commit/9c7b7eef6af2d93ab3317e0689715188ae981cc5
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Format/AffectedRangeManager.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/unittests/Format/FormatTestMacroExpansion.cpp
Log Message:
-----------
[clang-format] Fix crashes on directives in discarded macro call args (#221501)
Rewinding discarded macro arguments processes their preprocessor
directives twice, duplicating lines and causing crashes. Restore the
preprocessor bookkeeping on rewind, but retain the first set of
directive lines and discard duplicates during replay.
Exclude expansion EOF tokens from directive ranges so directives before
empty expansions are still formatted.
Fixes #131157
Assisted-by: Claude Code
Commit: a6999e6bb0eb59286098e73c975dda3ed4d7d50f
https://github.com/llvm/llvm-project/commit/a6999e6bb0eb59286098e73c975dda3ed4d7d50f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang/CMakeLists.txt
M flang/cmake/modules/AddFlang.cmake
M flang/cmake/modules/CMakeLists.txt
M flang/cmake/modules/FlangConfig.cmake.in
M flang/include/flang/Optimizer/CodeGen/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/include/flang/Optimizer/HLFIR/CMakeLists.txt
M flang/include/flang/Optimizer/OpenACC/CMakeLists.txt
M flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
M flang/include/flang/Optimizer/Transforms/CMakeLists.txt
Log Message:
-----------
[Flang] Fix install components and dependencies (#227365)
Summary:
Two things. After https://github.com/llvm/llvm-project/pull/221724 a
plain `find_package(Flang)` no longer worked with implicit dependencies.
It would reference targets that weren't installed and weren't on the
core dependency path.
Also, ensure that the flang headers have a proper dependency on
tablegen. Makes the generation implicitly depend on them so this stays
in-sync.
Commit: 165f4df30265f4ab1d32e64db1714c35b0adf67e
https://github.com/llvm/llvm-project/commit/165f4df30265f4ab1d32e64db1714c35b0adf67e
Author: Jan Patrick Lehr <JanPatrick.Lehr at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/cmake/caches/AMDGPULibcBot.cmake
Log Message:
-----------
[Offload] Re-add flang to AMDGPU bot cmake cache (#227434)
This (re-) adds flang to the enabled projects in the AMDGPULibcBot CMake
cache.
Commit: 90b29820d4a918183948de8fd495658e0e1eee72
https://github.com/llvm/llvm-project/commit/90b29820d4a918183948de8fd495658e0e1eee72
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes-2.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/looped-phi-nodes.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique-pointer-select.ll
A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique-updatecounter.ll
M llvm/test/CodeGen/DirectX/ResourceAccess/non-unique.ll
Log Message:
-----------
[HLSL][DirectX] report a fatal error when resource access is not guaranteed to be unique (#225285)
Instead of just a diagnostic, report a fatal error when resource access
is not guaranteed to be unique.
Closes #224422
Assisted by GPT-5.6 Sol
Commit: e196a7e873c01c7176345541167ecd3fcb60f2e4
https://github.com/llvm/llvm-project/commit/e196a7e873c01c7176345541167ecd3fcb60f2e4
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
Log Message:
-----------
[X86] Fix CCMP miscompile for flag-source-folded SETCC leaves (#217682)
EmitCmp does not always return a comparison: where
it can it reuses the EFLAGS of an instruction that is computed anyway,
so (X | Y) == 0 comes back as the flags of an X86ISD::OR, (X & Y) == 0
as those of an X86ISD::AND, and (0 - X) == Y is rewritten into
(X + Y) == 0 and comes back as the flags of an X86ISD::ADD.
Only a subtract (CCMP) and an AND (CTEST) have conditional forms, so
build the link from the comparison's own operands rather than from a
flag source:
A comparison with zero can set neither OF nor CF, and TEST clears both,
so the last two are flag-equivalent for every condition code. An equality
comparison is a test of the operands' XOR, so an already live XOR is still
reused instead of keeping both operands live.
---------
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 6a47b139a6a64aed58994554ab51d1a6e9afb857
https://github.com/llvm/llvm-project/commit/6a47b139a6a64aed58994554ab51d1a6e9afb857
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/InstrumentationRuntimeBoundsSafety.cpp
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/Makefile
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/main.c
Log Message:
-----------
Don't crash reloading a corefile saved from a live process (#224324)
Saving a live process as a corefile and reloading it can abort lldb
itself:
```
$ cat main.c
int main(int argc, char **argv) { return argc; }
$ cc -g -O0 -o a.out main.c
$ lldb ./a.out -o 'b main' -o run \
-o 'process save-core --plugin-name=minidump --style=stack core.dmp' \
-o quit
$ lldb -c core.dmp
(lldb) target create --core "core.dmp"
...
Assertion failed: (0 && "breakpoint has no resolved locations"), function Activate, file InstrumentationRuntimeBoundsSafety.cpp, line 467.
```
`InstrumentationRuntimeBoundsSafety::CheckIfRuntimeIsValid` only checks
whether a loaded module exports two soft-trap symbol names
(`__bounds_safety_soft_trap`, `__bounds_safety_soft_trap_s`), not
whether
the process actually uses BoundsSafety.
`InstrumentationRuntimeBoundsSafety::Activate` runs for any process,
sets
a breakpoint on those two names, and, until this change, asserted if
that
breakpoint failed to resolve to any location.
`ProcessMinidump::ReadModuleList` is what makes the breakpoint fail to
resolve. For each module in the minidump, it calls
`Target::GetOrCreateModule(module_spec, /*notify=*/true, ...)`
(`ProcessMinidump.cpp`); that call synchronously triggers
`ModuleList::NotifyModuleAdded`, which runs `Target::ModulesDidLoad` and
from there `Process::ModulesDidLoad` calls
`InstrumentationRuntimeBoundsSafety::Activate`. Only after that returns
does the same loop iteration reach `module_sp->SetLoadAddress(...)` and
registers the module's sections at a load address, and address can be
resolved correct. However, before reaching to this point, the breakpoint
fails to resolve because that module still has no load address at all,
and trigger assert. This is an ordering problem in the reload.
Reloading the same live process from a mach-o corefile does not hit
this,
for two different reasons depending on `--style`. A `--style=stack`
corefile does not load `libsystem_sanitizers.dylib` at all (confirmed
with `target modules list`: only the executable and `dyld` are present),
so `CheckIfRuntimeIsValid` never finds the symbols and `Activate` never
runs. A `--style=full` corefile does load it, and resolves the same
breakpoint correctly, because `ObjectFileMachO::LoadCoreFileImages`
addresses every image in the batch first and only calls
`Target::ModulesDidLoad` once, after every module already has a load
address, instead of notifying and addressing one module at a time.
Added
`lldb/test/API/functionalities/process_save_core_minidump_reload_crash`,
which builds a plain program using no BoundsSafety feature, saves a live
process as a minidump, and reloads it into a fresh target. Before this
change that reload aborted the `lldb` process; it now loads
successfully.
Assited-by: claude
Commit: 2babd10911eb423a52f82a2b4356fe6632f053e9
https://github.com/llvm/llvm-project/commit/2babd10911eb423a52f82a2b4356fe6632f053e9
Author: Daniel Donenfeld <ddonenfeld at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/callchain.ll
A llvm/test/CodeGen/NVPTX/callprototype-dollar-local-label.ll
A llvm/test/CodeGen/NVPTX/callprototype-local-label.ll
M llvm/test/CodeGen/NVPTX/convert-call-to-indirect.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
M llvm/test/CodeGen/NVPTX/indirect_byval.ll
M llvm/test/CodeGen/NVPTX/lower-args-gridconstant.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
M llvm/test/CodeGen/NVPTX/param-align.ll
M llvm/test/CodeGen/NVPTX/vaargs.ll
Log Message:
-----------
[NVPTX] Fix for device function pointer having the same name as generated callprototype (#205639)
The NVPTX backend generates `.callprototype` directives for indirect
calls with compiler generated names previously based off a unsigned
unique call site number. If a \_\_device\_\_ global function pointer is
named prototype_N with a call to that function, we emit ptx with a
global and callprototype with the same name. This PR updates ISel
lowering to produce a unique temporary symbol instead to avoid naming
conflicts with user defined variables.
Commit: ff6c3178a5138adddaf1f323078b24fe60b2c4b6
https://github.com/llvm/llvm-project/commit/ff6c3178a5138adddaf1f323078b24fe60b2c4b6
Author: Sarah Spall <sarahspall at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[HLSL][DirectX] report a fatal error when resource access is not guaranteed to be unique (#225285)
Instead of just a diagnostic, report a fatal error when resource access
is not guaranteed to be unique.
Closes #224422
Assisted by GPT-5.6 Sol
Commit: 4cee350d3ed7439c8237427e47ff8034f62198ff
https://github.com/llvm/llvm-project/commit/4cee350d3ed7439c8237427e47ff8034f62198ff
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
Log Message:
-----------
[HLSL] Fold inverse matrix transposes (#227049)
When the operand is an unused llvm.matrix.transpose with inverse
dimensions, return its original operand and erase the redundant
intrinsic. This handles both explicit transpose(transpose(M))
expressions and transposes that cancel row-major load normalization.
Commit: 1912ab90abb4b1d33049fa5fa4f041a9e9545a1a
https://github.com/llvm/llvm-project/commit/1912ab90abb4b1d33049fa5fa4f041a9e9545a1a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/cmpxchg16b-dead-eflags.mir
A llvm/test/CodeGen/X86/expand-cmpxchg16b-dead-eflags.mir
Log Message:
-----------
X86: Preserve dead flags on EFLAGS when lowering CMPXCHG16B pseudos (#227278)
Commit: d5e13b1b0caf2aa552811e81208403e2f09bc613
https://github.com/llvm/llvm-project/commit/d5e13b1b0caf2aa552811e81208403e2f09bc613
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
Log Message:
-----------
[CAS] Fix UnifiedOnDiskCacheTest build with MSVC 2019 (#227453)
MSVC 2019 (14.29.30133) rejects the local constexpr NumTasks as an
array bound inside the by-reference-capturing runConcurrently lambda
("failure was caused by a read of a variable outside its lifetime").
Make it static constexpr so it is not captured.
Fixes: https://lab.llvm.org/buildbot/#/builders/46/builds/42070
Commit: a367d923818d147b62b566de69bdb7b707cc4395
https://github.com/llvm/llvm-project/commit/a367d923818d147b62b566de69bdb7b707cc4395
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/test/UnitTest/SIMDMatcher.h
Log Message:
-----------
[libc][mathvec] Remove unneeded inf check in within_ulp_tolerance (#227459)
Commit: 7f3fa136e4d28da1d8d536271f2a9b7eff7b7656
https://github.com/llvm/llvm-project/commit/7f3fa136e4d28da1d8d536271f2a9b7eff7b7656
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchange-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchange-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedCompareExchange` function and resource methods (#222165)
This PR adds the `InterlockedCompareExchange` standalone function and
resource
methods. The operation lowers to the same `cmpxchg monotonic` as
`InterlockedCompareStore`.
`InterlockedCompareExchange` reports the previous value, so an
`extractvalue`
reads it from the `cmpxchg` result and stores it through the
`original_value`
reference parameter.
The PR also adds the 64-bit `InterlockedCompareExchange64` methods,
which DXIL
gates on shader model 6.6.
Fixes: https://github.com/llvm/llvm-project/issues/99130
Assisted by: Github Copilot
Commit: 1fbf8123cd0224cbcc7a877269f4e998ba97adf0
https://github.com/llvm/llvm-project/commit/1fbf8123cd0224cbcc7a877269f4e998ba97adf0
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareStoreFloat.ll
Log Message:
-----------
[HLSL] Add `InterlockedCompareStoreFloatBitwise` function and resource methods (#222166)
This PR adds the `InterlockedCompareStoreFloatBitwise` standalone
function and
resource methods.
`cmpxchg` rejects a float operand, clang therefore
bitcasts both float arguments to `i32` before it emits the `cmpxchg`,
and the
backend only ever sees an integer compare exchange. No DXIL legalization
is
needed for this operation.
DXC declares this function for 32-bit float alone, with no integer
overload,
so the overload set here is float only. `half` and `double` are
rejected.
The operation reuses the 32-bit integer DXIL operation, so it needs no
capability bits and works from shader model 6.0. A test checks both
halves of
that: the float-bitwise form is accepted at SM 6.0, and the 64-bit
compare-store is still rejected there.
Fixes: https://github.com/llvm/llvm-project/issues/99202
Assisted by: Github Copilot
Commit: 4a0e98b75de7a93c00b374bfd02b5235e49d4261
https://github.com/llvm/llvm-project/commit/4a0e98b75de7a93c00b374bfd02b5235e49d4261
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedCompareExchangeFloatBitwise` function and resource methods (#222167)
This PR adds the `InterlockedCompareExchangeFloatBitwise` standalone
function
and resource methods. It completes the interlocked stack.
The operation matches `InterlockedCompareStoreFloatBitwise`, except that
it
reports the previous value. Clang bitcasts both float arguments to `i32`
before the `cmpxchg`, then bitcasts the extracted result back to `float`
before it stores it through the `original_value` reference parameter.
As with the compare-store form, DXC declares this function for 32-bit
float
alone, so the overload set is float only, and the operation reuses the
32-bit
integer DXIL operation, so it works from shader model 6.0 without
capability
bits.
Fixes: https://github.com/llvm/llvm-project/issues/99203
Assisted by: Github Copilot
Commit: 72c6b3ba839e09b7b266bbd8f2eaf6ee60527eaf
https://github.com/llvm/llvm-project/commit/72c6b3ba839e09b7b266bbd8f2eaf6ee60527eaf
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Handle select-like i1 sext/zexts in canonicalizeClampLike (#227067)
canonicalizeClampLike matches a select of a select. But if the inner
select has an i1 result type it will be canonicalized to a sext or zext
of the condition. In FFmpeg there is a clamping pattern that shifts the
inverted bits instead of the negated, and the inner select ends up being
canonicalized this way: https://godbolt.org/z/5q8bx69x3
This teaches canonicalizeClampLike to use m_SelectLike to catch these
cases too.
Commit: cedf87190073de36743d90aa1ff0cf43cfd486d7
https://github.com/llvm/llvm-project/commit/cedf87190073de36743d90aa1ff0cf43cfd486d7
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
A lldb/test/Shell/ObjectFile/ELF/relocation-offset-out-of-range.yaml
Log Message:
-----------
[lldb] Bounds-check ELF relocation offsets (#227046)
Relocations applied to ELF debug sections were written at r_offset
without checking that the target fits in the section. A malformed object
file could therefore write anywhere relative to the file buffer.
Check every relocation target against the section data. Skip and report
relocations that fall outside it.
rdar://186921964
Commit: 56ee698b48ab31be816dbdfd4bea8c3761663dbe
https://github.com/llvm/llvm-project/commit/56ee698b48ab31be816dbdfd4bea8c3761663dbe
Author: Kaitlin Peng <kaitlinpeng at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
M clang/test/CodeGenHLSL/builtins/and_mat.hlsl
M clang/test/CodeGenHLSL/builtins/or.hlsl
A clang/test/CodeGenHLSL/builtins/or_mat.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
Log Message:
-----------
[HLSL][Matrix] Convert loaded bool matrices to `i1` (#226599)
Fixes #226308.
This PR converts loaded bool matrices to their `i1` representation
before use, like bool vectors do, and updates the affected matrix
codegen tests.
It also splits matrix tests out of `or.hlsl` into its own `or_mat.hlsl`
file to match the convention of the other matrix intrinsic tests.
Assisted-by: Claude Opus 4.8
Commit: a3db7fe43c223144d4667a78444cc01901e5b9da
https://github.com/llvm/llvm-project/commit/a3db7fe43c223144d4667a78444cc01901e5b9da
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/AMDGPU/twoaddr-insert-subreg-subrange.mir
M llvm/test/CodeGen/PowerPC/dmr-enable.ll
A llvm/test/CodeGen/RISCV/twoaddr-insert-subreg-subrange.mir
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
Log Message:
-----------
TwoAddressInstructions: Fix subranges straddling the INSERT_SUBREG subreg index (#227427)
Rewriting INSERT_SUBREG into a subregister COPY narrows the def from the
whole register down to one subreg index. The live interval fixup for that only
handled subranges entirely disjoint from the inserted lane mask, so a partially
overlapping subrange keeps a value whose def no longer writes all of its lanes.
The stale value makes the lanes outside the inserted subregister look
defined by the COPY, so the copy that actually provides them ends up
dead and its value is lost. Refine the subranges against the subreg index
before narrowing the def, leaving each one either fully redefined by the COPY
or untouched by it.
Fixes a miscompile reported on RISC-V and restores the pre-6286f77214be
output of Thumb2/mve-vst2.ll, Thumb2/mve-vst3.ll and PowerPC/dmr-enable.ll.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 9cfc2b2ac3fd2571369e9d033ce599597177f3e7
https://github.com/llvm/llvm-project/commit/9cfc2b2ac3fd2571369e9d033ce599597177f3e7
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/tools/obj2yaml/obj2yaml.cpp
Log Message:
-----------
[obj2yaml] Suppress leak check on abnormal exit (#227444)
This is a common issue with lsan after exit().
exit() is noreturn, so we cannot expect that the compiler will
preserve pointers to allocations done by callers.
Fixes https://lab.llvm.org/buildbot/#/builders/169/builds/27022
Assisted-by: Gemini
Commit: 9425f1510c31e37f3bb7921ef4ce746824c59fb0
https://github.com/llvm/llvm-project/commit/9425f1510c31e37f3bb7921ef4ce746824c59fb0
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Expression/REPL.cpp
A lldb/test/Shell/REPL/Breakpoint.test
Log Message:
-----------
[lldb] Fix deadlock when a REPL expression hits a breakpoint (#227400)
When a REPL expression stops at a breakpoint,
REPL::IOHandlerInputComplete calls RunIOHandlerAsync to drop into the
command interpreter while it still holds the error stream lock.
RunIOHandlerAsync then takes the IOHandler stack mutex. At the same
time, the event handler thread reports the stop through
IOHandlerStack::PrintAsync, which takes the IOHandler stack mutex first
and the output mutex second. The opposite lock order can deadlock,
leaving lldb hung after it prints "Execution stopped at breakpoint."
The lock scope that covers the call was introduced in 5007dd9d0945
(#183600). Keep printing under the lock, but defer RunIOHandlerAsync
until the lock is released.
This patch adds a test that exercises this path with the C REPL. Because
the deadlock is a race, the test only catches a regression
intermittently: without the fix it hung in about 6% of runs under
parallel load, and in every run when a delay was injected inside the
locked region.
Assisted-by: Claude
Commit: 2b0cd5ff912a8151082c5966e9b5cf67d6936563
https://github.com/llvm/llvm-project/commit/2b0cd5ff912a8151082c5966e9b5cf67d6936563
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
Log Message:
-----------
[AMDGPU][NFC] De-factorize scalar_to_vector bf16 patterns (#226847)
For Fake16, an SGPR and a VGPR can share the same scalar_to_vector
pattern because there is no 16-bit SGPR at all. The separate uniform
SGPR pattern is therefore only needed for Real True16, where the
divergent case uses a VGPR_16 REG_SEQUENCE.
This de-factorization is to prepare for follow-up PRs to separate SGPR
and VGPR patterns of scalar_to_vector for other types.
Commit: 930a1185daae179ad2cec09080c4cfe3741bb6ae
https://github.com/llvm/llvm-project/commit/930a1185daae179ad2cec09080c4cfe3741bb6ae
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/test/CodeGen/AArch64/abi-classify-arg-types.c
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-sve-tuples.c
A clang/test/CodeGen/AArch64/abi-classify-sve-types.c
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
Log Message:
-----------
[LLVMABI][AARCH64] Handle vector types (#225201)
This adds handling for vector types in the AArch64 implementation of the
LLVM ABI library. Legal vectors are passed and returned directly.
Illegal vectors are coerced to an integer or an integer vector, or
passed indirectly if they are too large. Sizeless SVE types are passed
in a register of their own, and fixed-length SVE vectors are coerced to
a scalable vector that occupies the same register. SVE tuples still
report NYI under AAPCS.
Assisted-by: Cursor / claude-opus-5
Commit: 8081af841b56c02d73bb66efb2ad7a041d634d20
https://github.com/llvm/llvm-project/commit/8081af841b56c02d73bb66efb2ad7a041d634d20
Author: Q <60785373+StarryCSF at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV][P-ext] Add scalar multiply high intrinsics (#225561)
Add intrinsics, Clang builtins and SelectionDAG support for the scalar
multiply high operations.
Support
[multiply-high](https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#multiply-high).
On RV32 the non-rounding forms map to the M-extension mulh/mulhu/mulhsu
instructions and the rounding forms to the P-extension
mulhr/mulhru/mulhrsu instructions.
On RV64 the scalar spellings reuse the packed pmulh.w family on the low
words via the existing PMULH*_W patterns.
Commit: 7e0802ba5b177e8d753dfd2f0666e4f7ebcf94da
https://github.com/llvm/llvm-project/commit/7e0802ba5b177e8d753dfd2f0666e4f7ebcf94da
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][CIR] Match CIR return value with OGCG using mem2reg (#227241)
This fixes the test failure introduced by
[226534](https://github.com/llvm/llvm-project/pull/226534)
Currently, the `sve/len.c` test fails because of this difference between
OGCG and CIR:
```
; classic codegen ; CIR (-fclangir)
%2 = mul nuw i64 %1, 16 %6 = mul nuw i64 %5, 16
ret i64 %2 store i64 %6, ptr %3 ; retval slot
%7 = load i64, ptr %3
ret i64 %7
```
So, adding the return value checks as they are breaks the test.
This adds `mem2reg`, so that the CIR output matches OGCG and the same
return value check works for both.
Commit: 8a7dedc80eacf09fb422a997ab940dd18f22ec32
https://github.com/llvm/llvm-project/commit/8a7dedc80eacf09fb422a997ab940dd18f22ec32
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-suite/aarch64.cmake
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang/docs/InternalsManual.md
M clang/docs/LibASTImporter.md
M clang/docs/ReleaseNotes.md
M clang/docs/UsersManual.md
M clang/docs/conf.py
M clang/docs/index.md
M clang/include/clang/AST/Expr.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/CodeGenOptions.def
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Driver/SanitizerArgs.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Options/Options.td
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
M clang/include/clang/Sema/Sema.h
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
A clang/lib/AST/ByteCode/EvalSettings.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/QualTypeMapper.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Driver/SanitizerArgs.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Format/AffectedRangeManager.cpp
M clang/lib/Format/UnwrappedLineParser.cpp
M clang/lib/Format/UnwrappedLineParser.h
M clang/lib/Frontend/CompilerInstance.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Serialization/ASTReader.cpp
M clang/runtime/CMakeLists.txt
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/CIR/CodeGen/pack-indexing.cpp
A clang/test/CIR/CodeGenCoroutines/coro-agg.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p2.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
M clang/test/CodeGen/AArch64/abi-classify-arg-types.c
M clang/test/CodeGen/AArch64/abi-classify-return-types.c
A clang/test/CodeGen/AArch64/abi-classify-sve-tuples.c
A clang/test/CodeGen/AArch64/abi-classify-sve-types.c
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M clang/test/CodeGen/AArch64/sve/len.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/X86/sse41-builtins-constrained.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/builtins-nvptx.c
A clang/test/CodeGen/copyprof.cpp
M clang/test/CodeGen/no-skipped-passes-O0-opt-bisect.c
A clang/test/CodeGenCXX/copyprof-attrs-move.cpp
A clang/test/CodeGenCXX/copyprof-attrs.cpp
M clang/test/CodeGenCXX/pragma-loop-predicate.cpp
M clang/test/CodeGenCXX/pragma-loop-safety.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M clang/test/CodeGenCXX/static-destructor.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixSingleSubscriptGetter.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BoolMatrix.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchange.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedCompareExchangeFloatBitwise.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStore.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedCompareStoreFloatBitwise.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedVectorElement.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchange.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStore.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchange.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareExchangeFloatBitwise.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStore.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedCompareStoreFloatBitwise.hlsl
M clang/test/CodeGenHLSL/builtins/and_mat.hlsl
M clang/test/CodeGenHLSL/builtins/or.hlsl
A clang/test/CodeGenHLSL/builtins/or_mat.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
A clang/test/CodeGenObjC/exceptions-seh.m
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
M clang/test/Driver/Inputs/MacOSX15.1.sdk/SDKSettings.json
A clang/test/Driver/fcopyprof.cpp
M clang/test/Driver/fsanitize-undefined-offload.c
M clang/test/Driver/modulemap-allow-subdirectory-search.c
M clang/test/InstallAPI/Inputs/MacOSX13.0.sdk/SDKSettings.json
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-llvm-help.c
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda_codegen.cpp
M clang/test/Profile/branch-logical-mixed.cpp
M clang/test/Profile/c-captured.c
M clang/test/Profile/c-general.c
M clang/test/Profile/c-ternary.c
M clang/test/Profile/cxx-class.cpp
M clang/test/Profile/cxx-lambda.cpp
M clang/test/Profile/cxx-rangefor.cpp
M clang/test/Profile/cxx-stmt-initializers.cpp
M clang/test/Profile/cxx-templates.cpp
M clang/test/Profile/cxx-throws.cpp
M clang/test/Profile/objc-general.m
M clang/test/Sema/LifetimeSafety/safety.cpp
A clang/test/Sema/warn-fortify-source-poll-not-builtin.c
M clang/test/Sema/warn-fortify-source.c
R clang/test/SemaCXX/new-nothrow-by-value.cpp
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchange-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareExchangeFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStore-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedCompareStoreFloatBitwise-sm60.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchange-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareExchangeFloatBitwise-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStore-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedCompareStoreFloatBitwise-errors.hlsl
A clang/test/SemaOpenCL/builtins-amdgcn-wave-match-err.cl
M clang/test/SemaTemplate/GH71595.cpp
M clang/test/SemaTemplate/temp_arg_nontype_ref.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
M clang/tools/clang-linker-wrapper/CMakeLists.txt
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
M clang/unittests/Basic/CMakeLists.txt
R clang/unittests/Basic/TargetIDTest.cpp
M clang/unittests/Format/FormatTestMacroExpansion.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/VirtualMethodFamilyFormatTest.cpp
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/Modules/SanitizerUtils.cmake
M compiler-rt/cmake/config-ix.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/asan/scripts/CMakeLists.txt
M compiler-rt/lib/copyprof/CMakeLists.txt
M compiler-rt/lib/dfsan/CMakeLists.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/hwasan/scripts/CMakeLists.txt
M compiler-rt/lib/memprof/CMakeLists.txt
M compiler-rt/lib/msan/CMakeLists.txt
M compiler-rt/lib/tsan/rtl/CMakeLists.txt
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/CMakeLists.txt
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
A compiler-rt/lib/ubsan/offload/ubsan_offload_preinit.cpp
M compiler-rt/test/builtins/Unit/arm/aeabi_cmpflags_interwork_test.c
M compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_allowlist_ignorelist.cpp
M compiler-rt/test/ubsan/AMDGPU/host-and-device.hip
M compiler-rt/test/ubsan/AMDGPU/openmp-overflow.cpp
M compiler-rt/test/ubsan/AMDGPU/shift.hip
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-load-order.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/hsa-missing.cpp
M compiler-rt/test/ubsan/lit.common.cfg.py
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
M flang/CMakeLists.txt
M flang/cmake/modules/AddFlang.cmake
M flang/cmake/modules/CMakeLists.txt
M flang/cmake/modules/FlangConfig.cmake.in
M flang/include/flang/Common/api-attrs.h
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/CodeGen/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/Attributes/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CMakeLists.txt
M flang/include/flang/Optimizer/Dialect/MIF/CMakeLists.txt
M flang/include/flang/Optimizer/HLFIR/CMakeLists.txt
M flang/include/flang/Optimizer/OpenACC/CMakeLists.txt
M flang/include/flang/Optimizer/OpenMP/CMakeLists.txt
M flang/include/flang/Optimizer/Transforms/CMakeLists.txt
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Support/Fortran-features.h
M flang/lib/FrontendTool/ExecuteCompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
M flang/lib/Semantics/check-declarations.cpp
R flang/test/Fir/CUDA/cuda-function-rewrite.mlir
A flang/test/Fir/CUDA/cuda-on-device.mlir
M flang/test/Fir/cuf.mlir
A flang/test/Lower/CUDA/cuda-on-device.cuf
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-unstructured-internals.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
A flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
A flang/test/Lower/OpenMP/wsloop-unstructured-internals.f90
M flang/test/Lower/always-execute-loop-body.f90
A flang/test/Lower/do-loop-branch-to-loop-header.f90
A flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-branch-into-body.f90
A flang/test/Lower/pre-fir-tree-unstructured-internals.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/trailing-cycle.f90
A flang/test/Semantics/OpenACC/acc-routine-loop-nesting.f90
A flang/test/Semantics/bind-c20.f90
A flang/test/Semantics/bind-c21.f90
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/CMakeLists.txt
M libc/include/grp.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/common-threads-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
A libc/include/llvm-libc-macros/threads-macros.h
M libc/include/threads.yaml
M libc/include/unistd.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/setgroups.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/cosf.h
A libc/src/__support/math/cosf_double_eval.h
A libc/src/__support/math/cosf_float_eval.h
M libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf_double_eval.h
A libc/src/__support/math/sinf_float_eval.h
M libc/src/__support/mathvec/CMakeLists.txt
M libc/src/__support/mathvec/cosf.h
M libc/src/__support/mathvec/trig_reductionf.h
M libc/src/__support/mathvec/trig_reductionf_nofma.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/thread.cpp
M libc/src/grp/CMakeLists.txt
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
A libc/src/grp/initgroups.cpp
A libc/src/grp/initgroups.h
A libc/src/grp/setgroups.cpp
A libc/src/grp/setgroups.h
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/sysconf.cpp
M libc/test/UnitTest/SIMDMatcher.h
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_tss_test.cpp
M libc/test/integration/src/threads/tss_test.cpp
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/initgroups_test.cpp
A libc/test/src/grp/setgroups_test.cpp
M libc/test/src/math/CMakeLists.txt
R libc/test/src/math/cosf_float_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
R libc/test/src/math/exhaustive/cosf_float_test.cpp
M libc/test/src/math/exhaustive/cosf_test.cpp
R libc/test/src/math/exhaustive/sinf_float_test.cpp
M libc/test/src/math/exhaustive/sinf_test.cpp
R libc/test/src/math/sinf_float_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/mathvec/UnitTestWrappers.h
M libc/test/src/mathvec/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/cosf_test.cpp
M libc/test/src/mathvec/exhaustive/exhaustive_test.h
M libc/test/src/mathvec/exhaustive/sinf_test.cpp
M libc/test/src/mathvec/sinf_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
M libc/utils/hdrgen/hdrgen/function.py
M libc/utils/hdrgen/tests/expected_output/subdir/test.h
M libc/utils/hdrgen/tests/input/subdir/test.yaml
M libcxx/docs/Hardening.rst
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__configuration/attributes.h
M libcxx/include/list
M libcxx/test/benchmarks/algorithms/sorting/push_heap.bench.cpp
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
M libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/push_range_container_adaptors.h
M libcxx/test/std/containers/container.adaptors/queue/queue.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/queue/queue.defn/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.defn/push_range.pass.cpp
R libcxx/utils/ci/images/libcxx_next_runners.txt
R libcxx/utils/ci/images/libcxx_release_runners.txt
R libcxx/utils/ci/images/libcxx_runners.txt
M libcxx/utils/ci/lnt/dispatch-benchmarks
M libcxx/utils/ci/lnt/run-benchmarks
M libcxxabi/src/cxa_personality.cpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/handler.cpp
M libsycl/src/usm_functions.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libsycl/unittests/queue/queue.cpp
M libsycl/unittests/usm/alloc.cpp
M libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M lld/test/ELF/pre_init_fini_array.s
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/wasm/InputFiles.cpp
M lldb/examples/python/formatter_bytecode.py
M lldb/examples/python/templates/scripted_process.py
M lldb/include/lldb/DataFormatters/FormatterBytecode.def
M lldb/packages/Python/lldbsuite/test/lldbplatform.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/source/DataFormatters/FormatterBytecode.cpp
M lldb/source/Expression/REPL.cpp
M lldb/source/Plugins/InstrumentationRuntime/BoundsSafety/InstrumentationRuntimeBoundsSafety.cpp
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
M lldb/test/API/commands/expression/issue_11588/Test11588.py
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/Makefile
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/TestMinidumpReloadCrash.py
A lldb/test/API/functionalities/process_save_core_minidump_reload_crash/main.c
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
A lldb/test/Shell/ObjectFile/ELF/relocation-offset-out-of-range.yaml
A lldb/test/Shell/REPL/Breakpoint.test
M lldb/unittests/DataFormatter/FormatterBytecodeTest.cpp
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/NewPassManager.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/WritingAnLLVMNewPMPass.md
M llvm/examples/Bye/Bye.cpp
M llvm/examples/IRTransforms/SimplifyCFG.cpp
M llvm/include/llvm-c/CAS/PluginAPI_functions.h
M llvm/include/llvm-c/CAS/PluginAPI_types.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ABI/Types.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/CAS/BuiltinUnifiedCASDatabases.h
M llvm/include/llvm/CAS/ObjectStore.h
M llvm/include/llvm/CAS/OnDiskCASLogger.h
M llvm/include/llvm/CAS/UnifiedOnDiskCache.h
M llvm/include/llvm/CAS/ValidationResult.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/IR/Constant.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/include/llvm/Plugins/PassPlugin.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/SandboxIR/Instruction.h
M llvm/include/llvm/Support/Compression.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/GVNHoist.h
A llvm/include/llvm/Transforms/Scalar/GVNSink.h
A llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/MemoryBuiltins.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CAS/BuiltinUnifiedCASDatabases.cpp
M llvm/lib/CAS/OnDiskCASLogger.cpp
M llvm/lib/CAS/OnDiskCommon.h
M llvm/lib/CAS/PluginAPI.h
M llvm/lib/CAS/PluginAPI_functions.def
M llvm/lib/CAS/PluginCAS.cpp
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/LTO/LTOBackend.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Plugins/PassPlugin.cpp
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/Support/Compression.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/AMDGPU/VOP3PInstructions.td
M llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILMemIntrinsics.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/NVPTX/NVPTXMachineFunctionInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVMachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.cpp
M llvm/lib/Target/RISCV/RISCVTargetObjectFile.h
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/lib/Target/X86/X86ExpandPseudo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/lib/TargetParser/Triple.cpp
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Analysis/BlockFrequencyInfo/many-successors-order.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/AMDGPU/cast.ll
M llvm/test/Analysis/CostModel/AMDGPU/expanded-int-fp-casts.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptosi.ll
M llvm/test/Analysis/CostModel/AMDGPU/fptoui.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-bfloat.ll
A llvm/test/Analysis/CostModel/AMDGPU/narrow-int-to-fp.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
A llvm/test/Analysis/ScalarEvolution/trip-count-variable-stride-predicate.ll
M llvm/test/CMakeLists.txt
A llvm/test/CodeGen/AArch64/GlobalISel/select-tls-macho.ll
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll
M llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fdiv.f16.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp-wave32.mir
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp.mir
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fold-int-pow2-with-fmul-or-fdiv.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.perm.pk.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.wave.match.b32.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
A llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo-bf16.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-lo.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
A llvm/test/CodeGen/AMDGPU/remove-short-exec-branches-vperm-pk16.mir
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
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M llvm/test/CodeGen/AMDGPU/ssubo.ll
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A llvm/test/CodeGen/DirectX/ResourceAccess/non-unique-updatecounter.ll
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A llvm/test/CodeGen/DirectX/ShaderFlags/atomic64-typed-resource-cmpxchg.ll
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M llvm/test/CodeGen/DirectX/scalarize-static-array-of-float-vectors.ll
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M llvm/test/CodeGen/Hexagon/cttz-elts-widen.ll
M llvm/test/CodeGen/Hexagon/isel-extload-i1.ll
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A llvm/test/CodeGen/LoongArch/null-streamer.ll
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M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
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A llvm/test/CodeGen/NVPTX/callprototype-local-label.ll
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A llvm/test/CodeGen/NVPTX/convert-fp4-pzo.ll
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A llvm/test/CodeGen/NVPTX/infer-volatile-address-spaces.ll
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A llvm/test/CodeGen/NVPTX/odd-integer-width.ll
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M llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
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M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
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M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
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R llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
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A llvm/test/CodeGen/RISCV/twoaddr-insert-subreg-subrange.mir
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M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
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M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
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M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
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M llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vcvt-fixed-to-float.ll
M llvm/test/CodeGen/Thumb2/mve-vcvt16.ll
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M llvm/test/CodeGen/X86/apx/mul-i1024.ll
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M llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
M llvm/test/Instrumentation/cgprofile.ll
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
M llvm/test/MC/AsmParser/section_names.s
M llvm/test/MC/ELF/section.s
A llvm/test/MC/Hexagon/v79-nontemporal.s
A llvm/test/MC/Mips/eva/set-eva-directive.s
A llvm/test/MC/Mips/eva/set-noeva-directive.s
M llvm/test/Transforms/Attributor/nofpclass.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/FunctionAttrs/noalias.ll
A llvm/test/Transforms/InferAddressSpaces/NVPTX/volatile.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.wave.match.b32.ll
M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/test/Transforms/InstCombine/builtin-dynamic-object-size.ll
M llvm/test/Transforms/InstCombine/cos-1.ll
M llvm/test/Transforms/InstCombine/cos-sin-intrinsic.ll
M llvm/test/Transforms/InstCombine/freeze.ll
M llvm/test/Transforms/InstCombine/minmax-fold.ll
M llvm/test/Transforms/InstCombine/trunc-extractelement.ll
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
M llvm/test/Transforms/JumpTableToSwitch/profile-no-guid-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-prob-1.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/AArch64/findlast-epilogue-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-scalar-epilogue-fallback.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/VPlan/record-execution-frequencies.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
A llvm/test/Transforms/LoopVectorize/scev-variable-stride-predicate.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-last-index-fp.ll
M llvm/test/Transforms/LowerIFunc/ifunc-alias.ll
M llvm/test/Transforms/LowerIFunc/ifunc-program-addrspace.ll
M llvm/test/Transforms/LowerIFunc/lower-ifunc.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/const-gep.ll
M llvm/test/Transforms/PGOProfile/Inputs/cspgo_bar_sample.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_use.ll
M llvm/test/Transforms/PGOProfile/counter_promo.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_merge.ll
M llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll
M llvm/test/Transforms/PGOProfile/counter_promo_sampling.ll
M llvm/test/Transforms/PGOProfile/icp_invoke.ll
M llvm/test/Transforms/PGOProfile/icp_invoke_nouse.ll
M llvm/test/Transforms/PGOProfile/instr_entry_bb.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
A llvm/test/Transforms/SLPVectorizer/X86/reduced-val-replaced-twice.ll
A llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks-alloca.ll
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
A llvm/test/Transforms/SLPVectorizer/X86/store-chains-shared-values.ll
M llvm/test/Transforms/SROA/load-store-overlap.ll
M llvm/test/Transforms/SROA/phi-gep.ll
M llvm/test/Transforms/SampleProfile/pseudo-probe-twoaddr.ll
A llvm/test/Transforms/SimplifyCFG/NVPTX/lit.local.cfg
A llvm/test/Transforms/SimplifyCFG/NVPTX/switch-to-lookup-table-addrspace.ll
A llvm/test/Transforms/TailCallElim/return-value-select-pgo.ll
M llvm/test/Transforms/VectorCombine/binop-scalarize.ll
A llvm/test/Transforms/VectorCombine/cmp-scalarize.ll
M llvm/test/Transforms/VectorCombine/unary-op-scalarize.ll
M llvm/test/lit.cfg.py
M llvm/test/lit.site.cfg.py.in
M llvm/test/tools/dxil-dis/constantexpr-gep.ll
M llvm/test/tools/gold/X86/Inputs/thinlto_cspgo_bar.ll
M llvm/test/tools/llvm-cas/lit.local.cfg
M llvm/test/tools/llvm-cas/logging.test
A llvm/test/tools/llvm-cas/plugin-validation-crash.test
A llvm/test/tools/llvm-cas/plugin-validation.test
A llvm/test/tools/llvm-cas/validate-if-needed.test
M llvm/test/tools/llvm-cas/validation.test
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.c
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.proftext
A llvm/test/tools/llvm-profdata/guid-roundtrip.test
R llvm/test/tools/llvm-readobj/ELF/RISCV/eflags-abi.test
A llvm/test/tools/llvm-readobj/ELF/RISCV/eflags.test
M llvm/test/tools/llvm-reduce/ifunc-alias.ll
M llvm/test/tools/llvm-reduce/remove-ifunc-program-addrspace.ll
M llvm/test/tools/llvm-reduce/remove-ifunc.ll
M llvm/tools/libCASPluginTest/libCASPluginTest.cpp
M llvm/tools/libCASPluginTest/libCASPluginTest.exports
M llvm/tools/llc/lib/llcdriver.cpp
M llvm/tools/llvm-cas/Options.td
M llvm/tools/llvm-cas/llvm-cas.cpp
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/obj2yaml/obj2yaml.cpp
M llvm/tools/opt/NewPMDriver.cpp
M llvm/tools/opt/NewPMDriver.h
M llvm/tools/opt/optdriver.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/IRTypeMapperTest.cpp
M llvm/unittests/ABI/TypesTest.cpp
M llvm/unittests/Analysis/PluginInlineAdvisorAnalysisTest.cpp
M llvm/unittests/Analysis/PluginInlineOrderAnalysisTest.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
M llvm/unittests/CAS/OnDiskCommonUtils.h
M llvm/unittests/CAS/PluginCASTest.cpp
M llvm/unittests/CAS/UnifiedOnDiskCacheTest.cpp
M llvm/unittests/Passes/Plugins/PluginsTest.cpp
M llvm/unittests/ProfileData/InstrProfTest.cpp
M llvm/unittests/Support/CompressionTest.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/build/mac_sdk.gni
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/tools/clang-repl/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/lli/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-jitlink/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Passes/Plugins/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/DynamicLibrary/BUILD.gn
M llvm/utils/gn/secondary/third-party/unittest/unittest.gni
M llvm/utils/profcheck-xfail.txt
M mlir/docs/Tools/mlir-reduce.md
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/IR/Diagnostics.h
M mlir/include/mlir/Support/InterfaceSupport.h
M mlir/include/mlir/Target/Cpp/CppEmitter.h
M mlir/lib/Conversion/MathToXeVM/CMakeLists.txt
M mlir/lib/Conversion/MathToXeVM/MathToXeVM.cpp
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelForToNestedFors.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Conversion/MathToXeVM/algebraic-simplification.mlir
M mlir/test/Conversion/MathToXeVM/math-to-xevm.mlir
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
A mlir/test/Conversion/SCFToOpenMP/scf-to-openmp-unsigned.mlir
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
M mlir/test/Dialect/Async/async-parallel-for-async-dispatch.mlir
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/ControlFlow/invalid.mlir
M mlir/test/Dialect/ControlFlow/ops.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
M mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
M mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
M mlir/test/Dialect/SCF/parallel-to-nested-fors.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
A mlir/test/Pass/remark-final-verify-diagnostics.mlir
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
A mlir/test/Target/LLVMIR/omptarget-map-null-descriptor.mlir
A mlir/test/Transforms/parallel-loop-collapsing-unsigned.mlir
M mlir/test/mlir-reduce/reduction-tree/doc-example.mlir
A mlir/test/mlir-reduce/reduction-tree/except-last.mlir
A mlir/test/mlir-reduce/script/except-last.sh
M mlir/test/mlir-tblgen/op-interface.td
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
A mlir/unittests/Dialect/Arith/ArithUtilsTest.cpp
A mlir/unittests/Dialect/Arith/CMakeLists.txt
M mlir/unittests/Dialect/CMakeLists.txt
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
M mlir/unittests/IR/Diagnostic.cpp
M offload/CMakeLists.txt
M offload/cmake/caches/AMDGPULibcBot.cmake
M offload/include/PluginManager.h
M offload/languages/cuda/CMakeLists.txt
M offload/languages/hip/CMakeLists.txt
M offload/languages/kernel/CMakeLists.txt
M offload/liboffload/API/Common.td
M offload/liboffload/API/Platform.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/PluginManager.cpp
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
A offload/test/offloading/fortran/optional-mapped-arguments-4.f90
M offload/test/offloading/shared_lib_global_var.c
M offload/tools/CMakeLists.txt
M offload/tools/deviceinfo/CMakeLists.txt
M offload/tools/kernelreplay/CMakeLists.txt
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/unittests/OffloadAPI/CMakeLists.txt
M offload/unittests/OffloadAPI/init/olInit.cpp
A offload/unittests/OffloadAPI/platform/olIteratePlatforms.cpp
M openmp/module/CMakeLists.txt
M openmp/runtime/src/kmp_invoke_microtask.cpp
M openmp/runtime/test/misc_bugs/many-microtask-args.c
A openmp/runtime/test/misc_bugs/too-many-microtask-args.c
M polly/lib/Support/RegisterPasses.cpp
M polly/lib/Support/SCEVAffinator.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
A polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
M runtimes/CMakeLists.txt
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Builder/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/test/src/math/libc_math_test_rules.bzl
Log Message:
-----------
Merge branch 'main' into users/adams381/cir-callconv-indirect-variadic
Compare: https://github.com/llvm/llvm-project/compare/920c61b42de2...8a7dedc80eac
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