[all-commits] [llvm/llvm-project] 3eecc4: [SPIRV] Emit NonSemantic DebugValue (#224158)
Steven Wu via All-commits
all-commits at lists.llvm.org
Tue Sep 29 09:17:54 PDT 2026
Branch: refs/heads/users/cachemeifyoucan/spr/cas-support-validation-and-recovery-for-plugin-cas-in-llvm-cas
Home: https://github.com/llvm/llvm-project
Commit: 3eecc4081d4ee225eda7375eee9f79e065f3c411
https://github.com/llvm/llvm-project/commit/3eecc4081d4ee225eda7375eee9f79e065f3c411
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant-existing-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-cross-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-merge-region.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-module-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-postlegalizer-order.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugValue (#224158)
This adds support for emitting `DebugValue` in
`SPIRVNonSemanticDebugHandler` for `DBG_VALUE` records.
NOTE: Much of the new code was necessary to emit constants and their
types at module scope. I also added a bunch of tests as I started
getting into corner cases.
Since
[`DebugValue`](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugValue)
cannot have forward references, it can only reference already emitted
instructions. `DebugValue` cannot come after merge instructions either,
and SPIR-V requires an id defined in a function block to dominate a
non-phi use. The change has four parts:
1. `analyzeDebugRecords()` resolves placement and availability before
emission begins. Each record stays at its source position unless it lies
between a merge instruction and its terminator, in which case it moves
before the merge. A register value is accepted only when its definition
dominates the record. Records without a legal value are dropped.
2. A constant assignment needs a typed SPIR-V result id, but Machine IR
carries only untyped immediates. The type comes from the variable, and
`buildConstDbgValue()` decides whether the value is sign or zero
extended. The backend reuses a module `OpConstant` with that type and
value, or emits one alongside the line and column constants.
3. Debug info must be removable without changing what the module
requires. The handler creates `OpTypeBool` and 32-bit scalar types,
which need no capability, and reuses 8, 16 and 64-bit types only when
the module already defines them. Any other constant assignment is
dropped.
5. `SPIRVPostLegalizer::generateAssignType` placed `ASSIGN_TYPE` after a
`DBG_VALUE` naming the same register, because `updateRegType()` advances
the insertion point past the debug record. This change resets the
insertion point to just after the definition, so `ASSIGN_TYPE` comes
before the record that names it.
Commit: dec20dfbe042962775095e5394b2979fde9a4f45
https://github.com/llvm/llvm-project/commit/dec20dfbe042962775095e5394b2979fde9a4f45
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Add sudot zero/constant folding tests. NFC (#225321)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: d343b26ef687cefe30e7f8072d6befa6f2e0829d
https://github.com/llvm/llvm-project/commit/d343b26ef687cefe30e7f8072d6befa6f2e0829d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-fmul-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/store-chain-leading-slice-wider-vf.ll
Log Message:
-----------
[SLP]Try the wider store slice when the leading VF=2 slice fails
With the register VF 2 the instruction count check may reject the
leading slice of a store chain.
Try the double-width slice at the same position first and keep the wider
slices for the rest of the chain once one is vectorized.
Fixes the remaining perf regression from #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225823
Commit: f96f12533199911caea0ccc0fd96f18df37c8ca4
https://github.com/llvm/llvm-project/commit/f96f12533199911caea0ccc0fd96f18df37c8ca4
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Fold constant add/sub into the dot accumulator (#225002)
`amdgcn.{s,u}dot{2,4,8}(a, b, C) +/- K -> dot(a, b, C +/- K)` when both
the
accumulator C and K are constants. The new constant is computed with
wrapping APInt arithmetic to match the non-clamping accumulate.
Only applies when clamp is false (the saturating accumulate does not
reassociate) and the dot has a single use. K - dot is left alone since
it
would need the dot product negated.
Commit: ae2e61a2b21e38fd8356931aa75baf78a64da365
https://github.com/llvm/llvm-project/commit/ae2e61a2b21e38fd8356931aa75baf78a64da365
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/ptrtoaddr-i32-index-width.ll
Log Message:
-----------
[SCEV] Fix sign bits of pointers wider than their index type. (#225786)
ComputeNumSignBits counts bits over the full pointer width. If all sign
bits are in the high bits, the code previously did not adjust the number
of signed bits. For narrow index types, this could result in the number
of sign bits > than the narrow bitwidth triggering an assert in APInt
(test example has 64 bit pointer with 16 bit index width.
If all sign bits are in the high bits outside the index width, they do
not add any information for the index, just use 1 in that case.
Fixes a crash in the added tests.
PR: https://github.com/llvm/llvm-project/pull/225786
Commit: f22fe777f37bd5b901f92fb7c7ab654711e87da5
https://github.com/llvm/llvm-project/commit/f22fe777f37bd5b901f92fb7c7ab654711e87da5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
Log Message:
-----------
[CostModel][X86] Add masked memory test coverage for VBMI2 capable CPUs (#225790)
Add tigerlake and znver4/5 coverage - znver4 is going to be a pain as it has awful compressstore perf :(
Prep work for #214613
Commit: 0f58d0420f36f3f374e3ae35f679874e0b4ff4de
https://github.com/llvm/llvm-project/commit/0f58d0420f36f3f374e3ae35f679874e0b4ff4de
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#225614)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
UnexpandedParameterPack::first because it is always nonnull.
Specifically, UnexpandedParameterPack is constructed only in the
following places, all of which store a nonnull pointer in first, and
first is never modified afterward:
- CollectUnexpandedParameterPacksVisitor::addUnexpanded in
SemaTemplateVariadic.cpp
- TransformLambdaExpr in TreeTransform.h
- TransformSizeOfPackExpr in TreeTransform.h
Assisted-by: Antigravity
Commit: 53e9da7812f3fa8fa79ae5e000552e1110da8da7
https://github.com/llvm/llvm-project/commit/53e9da7812f3fa8fa79ae5e000552e1110da8da7
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/AVR/AVR.h
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/Hexagon/Hexagon.h
M llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.h
Log Message:
-----------
[Target] Remove declarations without definitions (NFC) (#225615)
initializeAArch64CFIFixupPass: Added on April 11, 2022 in commit
b4ad28da196d3c2b1bc064b4dc46c3e00e93438f without a definition.
AArch64InstructionSelector::selectReduction: The definition was removed
on November 13, 2023 in commit a604c4b562e99470e397f050f1e8707f923ebed7.
AArch64TargetELFStreamer::insertAttributeInPlace: Added on January 23,
2025 in commit ee99c4d4845db66c4daa2373352133f4b237c942 without a
definition.
ARMInstPrinter::printAM2PostIndexOp: The definition was removed on
September 22, 2012 in commit 2fdbdc58701ef41ab6b52c064723926e6ec4b44f.
ARMMCCodeEmitter::getMachineSoImmOpValue: The definition was removed on
October 12, 2010 in commit 12e493ace4fc5b499361122bc5f25d2c46bea5e4.
ARMMCCodeEmitter::getThumbSRImmOpValue: The definition was removed on
August 17, 2011 in commit 46dd413991f6fa74a1da3f139b386e364dfc9f78.
createAVRBranchSelectionPass: The definition was removed on July 5, 2017
in commit a24aa1990084c15f0ad27dbcff7ab1c96369f0f9.
dxil::DXILOpBuilder::getOpFunctionType: Added on August 2, 2024 in
commit 8cf85653b6f5c90b83f8a5741baad5725d6c6932 without a definition.
dxil::DXILBitcodeWriter::VSTOffsetPlaceholder,
dxil::DXILBitcodeWriter::writeIdentificationBlock,
dxil::DXILBitcodeWriter::writePerModuleFunctionSummaryRecord,
dxil::DXILBitcodeWriter::writeModuleLevelReferences,
dxil::DXILBitcodeWriter::addToStrtab,
dxil::DXILBitcodeWriter::createNamedMetadataAbbrev,
dxil::DXILBitcodeWriter::writeNamedMetadata,
dxil::DXILBitcodeWriter::pushGlobalMetadataAttachment,
dxil::DXILBitcodeWriter::writeOperandBundleTags,
dxil::DXILBitcodeWriter::writeSyncScopeNames,
dxil::DXILBitcodeWriter::writeOperandBundles,
dxil::DXILBitcodeWriter::writeGlobalValueSymbolTable: Added on
April 14, 2022 in commit f2526c1a5c6fe6d2740b68e2d73b85c958fd2719
without uses or definitions.
initializeHexagonMergeActivateWeightPass,
createHexagonMergeActivateWeight: Added on August 5, 2024 in commit
c04857cb2c9f6f2e8add61192c62e48a83938efd without definitions.
createHexagonTargetTransformInfoPass: Added on June 15, 2015 in commit
56efafc0566def51ec7e632e09574ed553296b48 without a definition.
HexagonGlobalSchedulerImpl::CanPromoteToDotNew: Added on February 20,
2026 in commit 7064ff2226141034fdb264c29b97acbc733f8dae without a
definition.
HexagonTargetLowering::LowerANY_EXTEND,
HexagonTargetLowering::LowerSIGN_EXTEND,
HexagonTargetLowering::LowerZERO_EXTEND: The definitions were removed on
February 6, 2018 in commit 8abaf8954a97f20d0fd036e8e32e4b69d23f342e.
HexagonTargetLowering::LowerEH_LABEL: Added on December 12, 2011 in
commit 1213a7a57fdcb6c875b3f79103fc96d3e9d30b40 without a definition.
HexagonPacketizerList::isCurifiable: Added on December 16, 2015 in
commit 56bbf54b4303cac8772b6d66e3bd0668f8013067 without a definition.
HexagonMCChecker::checkBranches: The definition was removed on
December 11, 2017 in commit a8ab1b75cb0d84ea61642d7b7c0139e6e367c28e.
createHexagonMCRegisterInfo: Added on February 6, 2017 in commit
8cdfe8ecf3dd14d128148c5ff0b01d74b082e3c2 without a definition.
HexagonShuffler::restrictNoSlot1: Added on January 17, 2020 in commit
c1873631d0a8f2acca4ab428a1e9abea844d97ff without a definition.
MipsAsmParser::parseImm: The definition was removed on August 8, 2016 in
commit 3feeb9c851a193f42d890b35f36816fae198860f.
MipsAsmParser::validateMSAIndex: The definition was removed on April 1,
2014 in commit b50ccf8e26653781191491aab90c7379f29bd5e1.
MipsMCCodeEmitter::getMSAMemEncoding: The definition was removed on
March 31, 2016 in commit dc0602a2c20a3f514541165a19cb1534597c5dc6.
Mips16DAGToDAGISel::initMips16SPAliasReg: The definition was removed on
June 16, 2016 in commit de7816b0cd3ffbd9775681c408298febe4c10fe3.
MipsAsmPrinter::EmitInstrWithMacroNoAT: The definition was removed on
June 2, 2012 in commit 23327b30ef9af2323dd20248e311ef454f9e0dfa.
MipsTargetLowering::emitSEL_D: The definition was removed on July 20,
2017 in commit be0bc71e023455a32d074b69054b6ffee6f1160e.
MipsSEDAGToDAGISel::selectMULT: The definition was removed on April 11,
2013 in commit 4f1130eb66ff01128c0061ace377c10b74128a45.
MipsSETargetLowering::lowerINT_TO_FP,
MipsSETargetLowering::lowerFP_TO_INT: The definitions were removed on
June 17, 2026 in commit de84e7ccc602fe2ef8b886a9b095c80d110f61a0.
MipsSubtarget::IsLinux: All uses were removed on December 19, 2014 in
commit 8985ba912f00de68f3fccf8bf440a30bf5bdb89e.
MipsSubtarget::OverrideMode, MipsSubtarget::setHelperClassesMips16,
MipsSubtarget::setHelperClassesMipsSE: All uses of OverrideMode and the
definitions of setHelperClassesMips16 and setHelperClassesMipsSE were
removed on July 18, 2014 in commit
4e7d1e7e7bb36bcd715297b36d688bdc0ed96bdf.
initializeNVVMReflectPass: The definition was removed on April 10, 2025
in commit 701d726ef09ea89909df9bd2fdc63c63758fe8d6.
NVPTXDAGToDAGISel::SelectTexSurfHandle: The definition was removed on
June 25, 2025 in commit 70333de6cfa76d2e0e36720d6065edd501a3ad8a.
NVPTXDAGToDAGISel::tryConstantFP: The definition was removed on
December 19, 2024 in commit 310e79875752886a7713911e2a1ec14bc75bd4b3.
NVPTXDAGToDAGISel::SelectCpAsyncBulkTensorReduceCommon: The definition
was removed on August 6, 2026 in commit
1ac19e41a0674925911e88cc5218dfd95a09a3ac.
createPPCMachObjectWriter: The definition was removed on March 2, 2020
in commit 3e851f4a688c42315355aae743b403dddeba9860.
createPPCExpandISELPass: The definition was removed on August 27, 2024
in commit 8e901c255df45e38cb1d69a576804029e20868bf.
SystemZTargetLowering::convertPrevCompareToBranch: The definition was
removed on July 25, 2013 in commit
c3f85d73ab781601b2aababa8ef6572fa437c4ff.
VEAsmParser::parseCCOpOperand: Added on June 5, 2020 in commit
117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca without a definition.
VEAsmParser::parseRDOpOperand: Added on June 10, 2020 in commit
34fef0c980446c3ea9595328e0e525db222870f0 without a definition.
WebAssemblyOptimizeReturnedLegacy::visitCallBase: The definition was
moved to a helper class on July 15, 2026 in commit
491539a8b801aad5706cc32fc54a319791d57a91.
X86FixupInstTuningLegacy::processInstruction: The definition was moved
to a helper class on January 12, 2026 in commit
f6d0a512972a74ef100723b9526a6a0ddb23f894.
XCoreTargetLowering::getReturnAddressFrameIndex: Added on November 7,
2008 in commit ca08e0645a9629980156208506b6ae463b746e42 without a
definition.
Assisted-by: Antigravity
Commit: 20c7e959ac021728f493a1d9aca6883b607313ee
https://github.com/llvm/llvm-project/commit/20c7e959ac021728f493a1d9aca6883b607313ee
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
Log Message:
-----------
[AMDGPU] Fix assert on empty inline asm register constraint (#225743)
An empty register name reaches this parser from user source, where
StringRef::front() asserts
Commit: d8ec5c857fded543e1daa439aae17af4cf807e8f
https://github.com/llvm/llvm-project/commit/d8ec5c857fded543e1daa439aae17af4cf807e8f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
A llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
Log Message:
-----------
AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU (#225738)
If an operation is expanded with a dead scc def, the resultant vcc def
will also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 8a67df6af89be4fcfcd6d6d36cae0a0362868949
https://github.com/llvm/llvm-project/commit/8a67df6af89be4fcfcd6d6d36cae0a0362868949
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
Log Message:
-----------
[Target] Remove declarations without definitions (NFC) (#225615)
initializeAArch64CFIFixupPass: Added on April 11, 2022 in commit
b4ad28da196d3c2b1bc064b4dc46c3e00e93438f without a definition.
AArch64InstructionSelector::selectReduction: The definition was removed
on November 13, 2023 in commit a604c4b562e99470e397f050f1e8707f923ebed7.
AArch64TargetELFStreamer::insertAttributeInPlace: Added on January 23,
2025 in commit ee99c4d4845db66c4daa2373352133f4b237c942 without a
definition.
ARMInstPrinter::printAM2PostIndexOp: The definition was removed on
September 22, 2012 in commit 2fdbdc58701ef41ab6b52c064723926e6ec4b44f.
ARMMCCodeEmitter::getMachineSoImmOpValue: The definition was removed on
October 12, 2010 in commit 12e493ace4fc5b499361122bc5f25d2c46bea5e4.
ARMMCCodeEmitter::getThumbSRImmOpValue: The definition was removed on
August 17, 2011 in commit 46dd413991f6fa74a1da3f139b386e364dfc9f78.
createAVRBranchSelectionPass: The definition was removed on July 5, 2017
in commit a24aa1990084c15f0ad27dbcff7ab1c96369f0f9.
dxil::DXILOpBuilder::getOpFunctionType: Added on August 2, 2024 in
commit 8cf85653b6f5c90b83f8a5741baad5725d6c6932 without a definition.
dxil::DXILBitcodeWriter::VSTOffsetPlaceholder,
dxil::DXILBitcodeWriter::writeIdentificationBlock,
dxil::DXILBitcodeWriter::writePerModuleFunctionSummaryRecord,
dxil::DXILBitcodeWriter::writeModuleLevelReferences,
dxil::DXILBitcodeWriter::addToStrtab,
dxil::DXILBitcodeWriter::createNamedMetadataAbbrev,
dxil::DXILBitcodeWriter::writeNamedMetadata,
dxil::DXILBitcodeWriter::pushGlobalMetadataAttachment,
dxil::DXILBitcodeWriter::writeOperandBundleTags,
dxil::DXILBitcodeWriter::writeSyncScopeNames,
dxil::DXILBitcodeWriter::writeOperandBundles,
dxil::DXILBitcodeWriter::writeGlobalValueSymbolTable: Added on
April 14, 2022 in commit f2526c1a5c6fe6d2740b68e2d73b85c958fd2719
without uses or definitions.
initializeHexagonMergeActivateWeightPass,
createHexagonMergeActivateWeight: Added on August 5, 2024 in commit
c04857cb2c9f6f2e8add61192c62e48a83938efd without definitions.
createHexagonTargetTransformInfoPass: Added on June 15, 2015 in commit
56efafc0566def51ec7e632e09574ed553296b48 without a definition.
HexagonGlobalSchedulerImpl::CanPromoteToDotNew: Added on February 20,
2026 in commit 7064ff2226141034fdb264c29b97acbc733f8dae without a
definition.
HexagonTargetLowering::LowerANY_EXTEND,
HexagonTargetLowering::LowerSIGN_EXTEND,
HexagonTargetLowering::LowerZERO_EXTEND: The definitions were removed on
February 6, 2018 in commit 8abaf8954a97f20d0fd036e8e32e4b69d23f342e.
HexagonTargetLowering::LowerEH_LABEL: Added on December 12, 2011 in
commit 1213a7a57fdcb6c875b3f79103fc96d3e9d30b40 without a definition.
HexagonPacketizerList::isCurifiable: Added on December 16, 2015 in
commit 56bbf54b4303cac8772b6d66e3bd0668f8013067 without a definition.
HexagonMCChecker::checkBranches: The definition was removed on
December 11, 2017 in commit a8ab1b75cb0d84ea61642d7b7c0139e6e367c28e.
createHexagonMCRegisterInfo: Added on February 6, 2017 in commit
8cdfe8ecf3dd14d128148c5ff0b01d74b082e3c2 without a definition.
HexagonShuffler::restrictNoSlot1: Added on January 17, 2020 in commit
c1873631d0a8f2acca4ab428a1e9abea844d97ff without a definition.
MipsAsmParser::parseImm: The definition was removed on August 8, 2016 in
commit 3feeb9c851a193f42d890b35f36816fae198860f.
MipsAsmParser::validateMSAIndex: The definition was removed on April 1,
2014 in commit b50ccf8e26653781191491aab90c7379f29bd5e1.
MipsMCCodeEmitter::getMSAMemEncoding: The definition was removed on
March 31, 2016 in commit dc0602a2c20a3f514541165a19cb1534597c5dc6.
Mips16DAGToDAGISel::initMips16SPAliasReg: The definition was removed on
June 16, 2016 in commit de7816b0cd3ffbd9775681c408298febe4c10fe3.
MipsAsmPrinter::EmitInstrWithMacroNoAT: The definition was removed on
June 2, 2012 in commit 23327b30ef9af2323dd20248e311ef454f9e0dfa.
MipsTargetLowering::emitSEL_D: The definition was removed on July 20,
2017 in commit be0bc71e023455a32d074b69054b6ffee6f1160e.
MipsSEDAGToDAGISel::selectMULT: The definition was removed on April 11,
2013 in commit 4f1130eb66ff01128c0061ace377c10b74128a45.
MipsSETargetLowering::lowerINT_TO_FP,
MipsSETargetLowering::lowerFP_TO_INT: The definitions were removed on
June 17, 2026 in commit de84e7ccc602fe2ef8b886a9b095c80d110f61a0.
MipsSubtarget::IsLinux: All uses were removed on December 19, 2014 in
commit 8985ba912f00de68f3fccf8bf440a30bf5bdb89e.
MipsSubtarget::OverrideMode, MipsSubtarget::setHelperClassesMips16,
MipsSubtarget::setHelperClassesMipsSE: All uses of OverrideMode and the
definitions of setHelperClassesMips16 and setHelperClassesMipsSE were
removed on July 18, 2014 in commit
4e7d1e7e7bb36bcd715297b36d688bdc0ed96bdf.
initializeNVVMReflectPass: The definition was removed on April 10, 2025
in commit 701d726ef09ea89909df9bd2fdc63c63758fe8d6.
NVPTXDAGToDAGISel::SelectTexSurfHandle: The definition was removed on
June 25, 2025 in commit 70333de6cfa76d2e0e36720d6065edd501a3ad8a.
NVPTXDAGToDAGISel::tryConstantFP: The definition was removed on
December 19, 2024 in commit 310e79875752886a7713911e2a1ec14bc75bd4b3.
NVPTXDAGToDAGISel::SelectCpAsyncBulkTensorReduceCommon: The definition
was removed on August 6, 2026 in commit
1ac19e41a0674925911e88cc5218dfd95a09a3ac.
createPPCMachObjectWriter: The definition was removed on March 2, 2020
in commit 3e851f4a688c42315355aae743b403dddeba9860.
createPPCExpandISELPass: The definition was removed on August 27, 2024
in commit 8e901c255df45e38cb1d69a576804029e20868bf.
SystemZTargetLowering::convertPrevCompareToBranch: The definition was
removed on July 25, 2013 in commit
c3f85d73ab781601b2aababa8ef6572fa437c4ff.
VEAsmParser::parseCCOpOperand: Added on June 5, 2020 in commit
117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca without a definition.
VEAsmParser::parseRDOpOperand: Added on June 10, 2020 in commit
34fef0c980446c3ea9595328e0e525db222870f0 without a definition.
WebAssemblyOptimizeReturnedLegacy::visitCallBase: The definition was
moved to a helper class on July 15, 2026 in commit
491539a8b801aad5706cc32fc54a319791d57a91.
X86FixupInstTuningLegacy::processInstruction: The definition was moved
to a helper class on January 12, 2026 in commit
f6d0a512972a74ef100723b9526a6a0ddb23f894.
XCoreTargetLowering::getReturnAddressFrameIndex: Added on November 7,
2008 in commit ca08e0645a9629980156208506b6ae463b746e42 without a
definition.
Assisted-by: Antigravity
Commit: 748e21a693d24bdd9168fa718a1a5146d414e8b2
https://github.com/llvm/llvm-project/commit/748e21a693d24bdd9168fa718a1a5146d414e8b2
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCDeclareActionConversion.cpp
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Lower/OpenACC/acc-declare-allocatable-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-unified.f90
M flang/test/Lower/OpenACC/acc-declare-use-associated-allocatable.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
A mlir/test/Conversion/OpenACCToLLVM/declare.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
Log Message:
-----------
[mlir][acc] Add acc declare codegen to ACCToLLVM (#225557)
Extends the acc to LLVM conversion with codegen for `acc declare`. A
structured declare uses the same data entry points as `acc.data`. An
unstructured declare registers its objects with `__tgt_acc_declare`. A
declare in a declare-action recipe only allocates or frees the device
mirror of an object the host already manages, through
`__tgt_acc_mirror_alloc` and `__tgt_acc_mirror_dealloc`. As with the
other directives, these runtime APIs are not yet finalized; the draft
proposal can be found at
https://github.com/llvm/llvm-project/pull/197894.
Placing the globals that a declare directive names into the device image
is not part of this change.
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Commit: 41ab14be8d53df1df1e46d2a80c37463aeb02a31
https://github.com/llvm/llvm-project/commit/41ab14be8d53df1df1e46d2a80c37463aeb02a31
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/cxx20-module-initializer-ms-abi.cppm
Log Message:
-----------
[CIR] Fix assertion on Microsoft-ABI C++20 named module initializer (#225565)
Compiling a C++20 named module interface unit for the Microsoft C++ ABI
asserts in `LoweringPrepare`, because the AST fallback for the
initializer name does an unguarded `cast<ItaniumMangleContext>`
([LoweringPrepare.cpp#L2006-L2013](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp#L2006-L2013)).
That fallback is reachable because CIRGen only emits
`cir.cxx_module_init_fn_name` for the Itanium mangler
([CIRGenModule.cpp#L3985-L3996](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CIR/CodeGen/CIRGenModule.cpp#L3985-L3996)),
mirroring classic codegen's `CXX20ModuleInits`
([CodeGenModule.cpp#L596-L601](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CodeGen/CodeGenModule.cpp#L596-L601)).
This deletes the fallback so the attribute is the only channel: absent
means `_GLOBAL__sub_I_` with internal linkage, which is exactly what
classic codegen does for this ABI
([CodeGenModule.cpp#L1205-L1208](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CodeGen/CodeGenModule.cpp#L1205-L1208)).
The new test pins that lowering and fails with the same assertion
without the fix. It checks CIR rather than LLVM IR because Microsoft-ABI
CIR cannot reach LLVM IR yet (`EH ABI lowering is not yet implemented
for the Microsoft ABI`). This also drops the last `ASTContext` use in
`buildCXXGlobalInitFunc`.
Commit: 37d97297fd3f1fd8c0c5ba79fc81eddd5553cbbb
https://github.com/llvm/llvm-project/commit/37d97297fd3f1fd8c0c5ba79fc81eddd5553cbbb
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang-rt/lib/runtime/derived.cpp
A flang-rt/test/Driver/derived-array-destruction.f90
Log Message:
-----------
[Flang] Restrict the scalar destruction fast path to rank-zero components (#224345)
Restrict the scalar destruction fast path to rank-zero components,
preventing invalid frees for zero-sized derived-type components. Add
regression coverage for scalar and array containers.
Commit: ddf72a3aa679bc2b8b93744443a00d8a6a5dfe50
https://github.com/llvm/llvm-project/commit/ddf72a3aa679bc2b8b93744443a00d8a6a5dfe50
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
Log Message:
-----------
[SLP][NFC]Add a test with the missed vectorization after splats, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225835
Commit: e28d3f11a8ada5012cf28d4a34f9e70c80d6f34e
https://github.com/llvm/llvm-project/commit/e28d3f11a8ada5012cf28d4a34f9e70c80d6f34e
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
Log Message:
-----------
[AMDGPU] Fall back for FP8-to-half conversions without native support (#225528)
The custom `v2i8` source action also handles half results on gfx950,
which has native OCP FP8-to-f32 conversions but lacks FP8-to-f16
instructions. Converting FP8 vectors to half therefore reached
`lowerFromFP8` and asserted that `FP8F16ConversionInsts` was available.
Use generic legalization for half results when the subtarget lacks the
required instructions. Preserve native f32 conversions and native f16
conversions on targets that support them.
Assisted by: Codex (Astra)
Commit: 6b5630dc25728baad8a4daf8697db2da15e7ed58
https://github.com/llvm/llvm-project/commit/6b5630dc25728baad8a4daf8697db2da15e7ed58
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
Log Message:
-----------
[SLP]Do not reorder the tree to match internal gathers of splat subtrees
The internal gathers of the splat gather subtrees are not used as
shuffle sources, but still defined the order of the main tree gathers.
The reorder shuffle stayed after the subtree was dropped as
unprofitable and rejected the profitable tree.
Fixes the perf regression from #220250, reported in #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225839
Commit: f55e761c7fb78381074b07fe7001166c9a1c6019
https://github.com/llvm/llvm-project/commit/f55e761c7fb78381074b07fe7001166c9a1c6019
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
A clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CIR/IR/invalid-matrix.cir
A clang/test/CIR/IR/matrix.cir
Log Message:
-----------
[CIR] Support builtin matrix type (#221773)
Implement the basic support for the built-in matrix type
Issue #221772
Commit: dcd8f3442430915048c57164c193513d257e8ace
https://github.com/llvm/llvm-project/commit/dcd8f3442430915048c57164c193513d257e8ace
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/Sparc/sparcv8-abi.c
Log Message:
-----------
[Sparc][clang] Match GCC's SPARC V8 vector return convention (#222264)
Match GCC's SPARC V8 calling convention for vector return values. Return
floating-point vectors and vectors larger than 64 bits indirectly.
Return smaller integer vectors in floating-point registers.
Assisted-by: Codex
Commit: 4f5ae89a4a8c49549cd3884c1f42f3fbba8d8ff3
https://github.com/llvm/llvm-project/commit/4f5ae89a4a8c49549cd3884c1f42f3fbba8d8ff3
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/Shell/Settings/Inputs/EchoCommandsAll.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNoComments.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNone.out
M llvm/lib/Support/Regex.cpp
M llvm/lib/Support/regcomp.c
A llvm/test/FileCheck/escape.txt
M llvm/unittests/Support/RegexTest.cpp
Log Message:
-----------
[Support] Allow \n, \t, \x in regexes (#223024)
\n and \t were already permitted in Regex::sub, but not in the regex
pattern itself. This commit allows them there too.
\x was not supported at all. This commit allows it both in regex
patterns and in Regex::sub.
The goal is to allow \x to be used in FileCheck patterns and to that
end, a test is also included that this works in FileCheck as expected.
Commit: 4b150e53377a931ab02a2c6b225ccdd75e0d8284
https://github.com/llvm/llvm-project/commit/4b150e53377a931ab02a2c6b225ccdd75e0d8284
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/storepointer.ll
Log Message:
-----------
[GlobalOpt] Use getGetElementPtr() overload accepting a DataLayout (#225789)
To produce the GEP in canonical ptradd form. Unlike other uses,
this one has to take potential failure to create the constant
expression into account.
It also seems like the GEP path was entirely untested, so I added
some basic test coverage for it.
Commit: 7799236d0b84d6fc49a336393aecaba83c061ddf
https://github.com/llvm/llvm-project/commit/7799236d0b84d6fc49a336393aecaba83c061ddf
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Improve multi-reduction layout inference (#224618)
Commit: a9828443a2a90a672551f1f59098393601959ed4
https://github.com/llvm/llvm-project/commit/a9828443a2a90a672551f1f59098393601959ed4
Author: Andrew Haberlandt <ahaberlandt at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M compiler-rt/test/fuzzer/minimize_crash.test
Log Message:
-----------
minimize_crash.test sometimes one-shots the minimization (fix flaky test) (#225544)
After #223470 it is now possible for `minimize_crash.test` to one-shot
the minimization by applying the EraseBytes mutation 3 times (to go from
size 8=>4=>2=>1).
```
| 35: SUMMARY: libFuzzer: deadly signal
| 36: MS: 3 EraseBytes-EraseBytes-EraseBytes-; base unit: 0000000000000000000000000000000000000000
| 37: 0x2a,
| 38: *
```
This causes the test to fail because it only prints the `Test unit
written to` line once. This sets `-mutate_depth` to 2 to guarantee that
it won't be one-shot and thus the line will print more than once.
rdar://188078094
Commit: 7311a69f6caa2a6b50cfb899d4b8a1f9f9eeb210
https://github.com/llvm/llvm-project/commit/7311a69f6caa2a6b50cfb899d4b8a1f9f9eeb210
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DepthFirstIterator.h
Log Message:
-----------
[ADT] Use SmallVector in df_iterator. NFC (#225787)
Helps with compile time. The small size of 8 was chosen to match
ReversePostOrderTraversal.
https://llvm-compile-time-tracker.com/compare.php?from=5bb2e21c30de31871dd01279c13abcfa2c06e75f&to=3f3c5680cae30aa33f6988ee8b326b71f5195577&stat=instructions:u
Commit: 4d2fb60d36492c4dfba957d2b726abf9dd30b8fc
https://github.com/llvm/llvm-project/commit/4d2fb60d36492c4dfba957d2b726abf9dd30b8fc
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/AST/TypeBase.h
M clang/test/SemaCXX/make_integer_seq.cpp
Log Message:
-----------
[clang] Widen SubstTemplateTypeParmType::PackIndex to 16 bits (#225584)
#132748 narrowed PackIndex to 15 bits when adding Final, leaving a bit
unused, so a type pack with 32768 or more elements stores a wrapped pack
index. The node then keys differently from its lookup, failing the
UniquingSet insert assertion. Restore the 16-bit width, matching
SubstPackType's 16-bit NumArgs.
Fix assertion failure https://godbolt.org/z/9r1jEqqob
Aided by Opus 5.5
Commit: 04fe618233c11703862c114caf33b8c29ef27e13
https://github.com/llvm/llvm-project/commit/04fe618233c11703862c114caf33b8c29ef27e13
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/unittests/Callback/CMakeLists.txt
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Interpreter/CMakeLists.txt
M lldb/unittests/Platform/CMakeLists.txt
M lldb/unittests/Process/CMakeLists.txt
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
M lldb/unittests/Protocol/CMakeLists.txt
M lldb/unittests/Target/CMakeLists.txt
Log Message:
-----------
[lldb] Add Options to LINK_COMPONENTS (#225684)
This fixes shared library build of lldb:
```
/usr/bin/ld: lib/liblldbPluginPlatformMacOSX.a(PlatformDarwin.cpp.o): undefined reference to symbol '_ZNK4llvm3opt8OptTable9getOptionENS0_12OptSpecifierE'
/usr/bin/ld: /work/kparzysz/git/llvm.org/b/x86/lib/libLLVMOption.so.24.0git: error adding symbols: DSO missing from command line
clang++: error: linker command failed with exit code 1 (use -v to see invocation)
```
And several other cases in unittests.
Commit: b33ddc8a951321ee4cc6beda31e1cd0880e8d242
https://github.com/llvm/llvm-project/commit/b33ddc8a951321ee4cc6beda31e1cd0880e8d242
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/fsub-chain-reduction-unpaired-signs.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regressed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225846
Commit: fc7aa5f819993f102ca2964cb70a28dd021d94af
https://github.com/llvm/llvm-project/commit/fc7aa5f819993f102ca2964cb70a28dd021d94af
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/SandboxVectorizer/Passes/LoadStoreVec/ptr_diff.ll
Log Message:
-----------
[SandboxVec][NFC] Precommit test (#225221)
This is a test for a follow-up patch that improves pointer the diff
calculation.
Commit: aced9473c0493aceeab07c97db10dfbd04a667b3
https://github.com/llvm/llvm-project/commit/aced9473c0493aceeab07c97db10dfbd04a667b3
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/SPIRV/SPIRVLegalizeResourceBinding.cpp
A llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-cvb-srv-uav.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-texture-sampler.ll
A llvm/test/CodeGen/SPIRV/hlsl-resources/HeapBinding-uav-counter.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeRegisterBinding-Heap.ll
A llvm/test/CodeGen/SPIRV/passes/SPIRVLegalizeRegisterBinding-Heap2.ll
Log Message:
-----------
[SPIRV] Add support for dynamic/heap resources (#224488)
Extends the `SPIRVLegalizeImplicitBinding` pass to support heap
resources and renames it to `SPIRVLegalizeImplicitAndHeapBinding`.
The pass scans the module for calls to
`llvm.spv.resource.handlefromheap` and groups them into CBV/SRV/UAV
resources and samplers. Calls to
`llvm.spv.resource.counterhandlefromheap` form a third group.
The SPIR-V backend represents descriptor heaps as unbounded resource
arrays. After resolving implicit bindings, the pass assigns the first
available binding to each heap group in the following order: CBV/SRV/UAV
resources, samplers, and counters.
For each group, the pass will replace the heap intrinsic calls with the
explicit `llvm.spv.resource.handlefrombinding` equivalents using the
assigned binding. The pass does not actually need to create the
unbounded resource-array globals itself. It only needs to assign a
unique array name shared by all resources belonging to the same array.
The existing `SPIRVInstructionSelector` will create the globals.
Because the CBV/SRV/UAV group can contain resources with different
types, the backend represents each unique resource type with a separate
array. These arrays share the same descriptor set and binding, so their
bindings intentionally overlap.
Fixes #208054
Assisted by GPT-5.6 Sol
Commit: e1125b3b32e3404e6d1d2ef4d2a6809f84127727
https://github.com/llvm/llvm-project/commit/e1125b3b32e3404e6d1d2ef4d2a6809f84127727
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Run cannotHoistOrSinkRecipe after cheap checks. NFC (#225797)
cannotHoistOrSinkRecipe traverses blocks in the aliasing checks so can
be expensive. We can save some compile time by deferring it after we do
the cheaper checks.
https://llvm-compile-time-tracker.com/compare.php?from=5bb2e21c30de31871dd01279c13abcfa2c06e75f&to=caeacf1cabb08be3608bd02a9b0e683111ab2c6a&stat=instructions:u
Commit: 50b8b5a101f2b6a4f99dd6cd77396ff0cce990e1
https://github.com/llvm/llvm-project/commit/50b8b5a101f2b6a4f99dd6cd77396ff0cce990e1
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/tools/clang-format/ClangFormat.cpp
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M clang/tools/offload-arch/OffloadArch.cpp
M llvm/docs/CommandLine.md
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/tools/llvm-gpu-loader/llvm-gpu-loader.cpp
M llvm/tools/llvm-offload-binary/llvm-offload-binary.cpp
M llvm/tools/llvm-offload-wrapper/llvm-offload-wrapper.cpp
M llvm/tools/llvm-reduce/llvm-reduce.cpp
M llvm/unittests/Support/CommandLineTest.cpp
M mlir/lib/Tools/mlir-query/MlirQueryMain.cpp
M mlir/lib/Tools/mlir-reduce/MlirReduceMain.cpp
Log Message:
-----------
[Support] Remove cl::DefaultOption (#225609)
https://reviews.llvm.org/D59746 added cl::DefaultOption so that the
built-in -h could be overridden by llvm-objdump and llvm-readobj, which
have since moved to OptTable. The remaining overrides just call
PrintHelpMessage, so remove them along with the flag. -h and --help
keep working in every tool.
LLM-aided
Commit: 59e62a974c22185003286ee03f35a1ea00678d28
https://github.com/llvm/llvm-project/commit/59e62a974c22185003286ee03f35a1ea00678d28
Author: Karim Alweheshy <karim.alweheshy at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/test/tools/llvm-profdata/Inputs/CSIR_profile.proftext
M llvm/test/tools/llvm-profdata/Inputs/IR_profile.proftext
M llvm/test/tools/llvm-profdata/Inputs/cs.proftext
M llvm/test/tools/llvm-profdata/Inputs/instr-remap.expected
M llvm/test/tools/llvm-profdata/merge-filter.test
A llvm/test/tools/llvm-profdata/text-zero-bitmap.test
Log Message:
-----------
[InstrProf] Disambiguate zero bitmaps in text profiles (#213906)
Commit: 680fb32b0ebcf38431579b813613a2949e4d5d6b
https://github.com/llvm/llvm-project/commit/680fb32b0ebcf38431579b813613a2949e4d5d6b
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/load-combine.ll
Log Message:
-----------
[X86] load-combine.ll - cleanup check prefixes and don't scrub stack math (#225762)
Ensure all stack addresses are visible
Commit: 6f8bca0ce541374893a7e0b2b64d383f515ca632
https://github.com/llvm/llvm-project/commit/6f8bca0ce541374893a7e0b2b64d383f515ca632
Author: Deric C. <cheung.deric at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-srv-load.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/typed-uav-load-additional-formats.ll
Log Message:
-----------
[DirectX] Set TypedUAVLoadAdditionalFormats on UAV texture loads (#225484)
Fixes https://github.com/llvm/llvm-project/issues/225147
This PR makes the `TypedUAVLoadAdditionalFormats` shader flag get set on
UAV texture loads.
Assisted by: GPT 5.6 Sol
Commit: 7c0029df8395a8688ff55feaadc36babd55efaf4
https://github.com/llvm/llvm-project/commit/7c0029df8395a8688ff55feaadc36babd55efaf4
Author: ahmed mohamed kamel <amkzaher at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/Expr.cpp
M clang/test/Sema/stmtexprs.c
Log Message:
-----------
[Clang] Fix integer promotion of bit-fields in statement expressions (#225597)
`Expr::getSourceBitField()` now looks through the final expression of a
statement expression to preserve the bit-field information. This allows
the existing integer promotion rules to correctly promote the bit-field
to `int`.
Also added a regression test for the issue.
Fixes #221542
Commit: 7a7e8bb81b978ef90f6da580bdecd34d053e580f
https://github.com/llvm/llvm-project/commit/7a7e8bb81b978ef90f6da580bdecd34d053e580f
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/test/ELF/ppc64-long-branch-rel14.s
M lld/test/ELF/systemz-gotent-relax-align.s
M lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
Log Message:
-----------
[ELF] Retain relocation sections for GOT entries added by relaxOnce (#225594)
x86-64 and SystemZ relax GOTPCRELX/GOTENT and, in relaxOnce, revert
relaxations that turn out to be out of range or misaligned. The reverted
relocation needs a GOT entry, which in -pie/-shared needs a relative
relocation. If .rela.dyn (or .relr.dyn) was empty, it has already been
removed by removeUnusedSyntheticSections, triggering an assertion
failure.
Retain the section that will receive the relative relocations when
relaxOnce may add GOT entries, and recompute .dynamic in each iteration.
This also fixes a truncated .dynamic when PPC64 PI long-branch thunks
add the first relative relocations to .rela.dyn.
LLM-aided. Fixes #224011
Commit: 4f22636ba6d33280d2609206b281c88a66a65997
https://github.com/llvm/llvm-project/commit/4f22636ba6d33280d2609206b281c88a66a65997
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/test/CodeGen/AArch64/abds.ll
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[DAG] Don't detect flippable signs in MinMax matchers (#220527)
The Min/MaxLike pattern matchers are the only pattern matchers that use
computeKnownBits. They're used to match a smax as a umax if the operands
are known positive and so forth.
However in practice it has no affect on real-world codegen as correlated
value propagation already does this transform earlier in the pipeline,
including for all the tests changed in this PR:
https://llvm.godbolt.org/z/Pr4Ec1xrv
Nothing in the backends will emit a min/max that needs re-transformed in
this way as far as I'm aware.
Removing computeKnownBits from these matchers allows us to remove the
match context in #218372, and saves some compilation time at O3
https://llvm-compile-time-tracker.com/compare.php?from=2f2aa940de68abcdfe4959ddd3b9a0741a7c2a16&to=b771556fb2a7e9c2cb0c853a4a71ea9641e5ede0&stat=instructions:u
Commit: 8913fcc64501c7da8ae02b97c174dc6701f7a8d7
https://github.com/llvm/llvm-project/commit/8913fcc64501c7da8ae02b97c174dc6701f7a8d7
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/test/CodeGen/AMDGPU/asm-printer-check-vcc.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/branch-relax-indirect-branch.mir
M llvm/test/CodeGen/AMDGPU/branch-relax-no-terminators.mir
M llvm/test/CodeGen/AMDGPU/hazards-gfx950.mir
M llvm/test/CodeGen/AMDGPU/ipra-regmask.ll
A llvm/test/CodeGen/AMDGPU/issue197467-virt-reg-rewrite-failure.mir
M llvm/test/CodeGen/AMDGPU/materialize-frame-index-sgpr.ll
M llvm/test/CodeGen/AMDGPU/peephole-fold-imm.mir
M llvm/test/CodeGen/AMDGPU/phys-partial-liveness.mir
M llvm/test/CodeGen/AMDGPU/resource-usage-crash-unhandled-reg.mir
M llvm/test/CodeGen/AMDGPU/sched-image-sample-post-RA.mir
M llvm/test/CodeGen/AMDGPU/set-gpr-idx-peephole.mir
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
M llvm/test/MC/AMDGPU/gfx11_asm_t16_err.s
M llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp
Log Message:
-----------
Reapply "[AMDGPU] Remove definition of hi16 for scalar registers (#197467)" (#201552)
This reapplies #197467. The regression uncovered by this PR has been
fixed in #223653 and a test was added to verify that
`llvm/test/CodeGen/AMDGPU/issue197467-virt-reg-rewrite-failure.mir`.
Commit: 877e3c84a8f4e61f6c635e7eb59793ae9069e717
https://github.com/llvm/llvm-project/commit/877e3c84a8f4e61f6c635e7eb59793ae9069e717
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github] Update remaining libc workflows to Ubuntu 26.04 (#225850)
Some workflows that I missed when trying to do the upgrade previously.
Commit: 36e1dfd58c07b213a5d57095247629f63381ed75
https://github.com/llvm/llvm-project/commit/36e1dfd58c07b213a5d57095247629f63381ed75
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/corrupt-public-offset.py
A lldb/test/Shell/SymbolFile/NativePDB/public-symbol-offset-past-section-end.cpp
Log Message:
-----------
[lldb][NativePDB] don't assert when a public symbol sits past its section (#225734)
Fix an assertion failure in `SymbolFileNativePDB::AddSymbols` when a
public symbol's offset doesn't agree with its section's size (happens
with real-world PDBs after incremental linking). Instead of asserting,
we now log and skip the size estimate for that symbol.
Also adds a regression test that crafts such a PDB and checks lldb
doesn't crash.
This fixes crashes in swiftlang.
Commit: 5eea5218a21a5799bb38d4a36d0d7892b4122fb5
https://github.com/llvm/llvm-project/commit/5eea5218a21a5799bb38d4a36d0d7892b4122fb5
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/TestMultithreaded.py
Log Message:
-----------
[lldb][Windows] skip TestMultithreaded.SBBreakpointCallbackCase.test_python_stop_hook (#225862)
The test is failing in pre-merge testing on Windows.
Commit: 2c80b3dae3bc1f0ee7b4e686a0b411b64c83560c
https://github.com/llvm/llvm-project/commit/2c80b3dae3bc1f0ee7b4e686a0b411b64c83560c
Author: dcandler <david.candler at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/Driver/darwin-static-lib-universal.c
Log Message:
-----------
[Clang] Restrict darwin-static-lib-universal.c in cross-builds (#225447)
A new test was added in 841dbaab188ecfa756d4c946f33b58758d34d339 which
will fail when run on macOS if macOS is not set as the default target.
This has previously been solved in other tests by further restricting
the REQUIRES line to also check the target.
Commit: d4afeda893d3b7b70101f90bc3ec76a31154b0be
https://github.com/llvm/llvm-project/commit/d4afeda893d3b7b70101f90bc3ec76a31154b0be
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DepthFirstIterator.h
Log Message:
-----------
[ADT] Add back load bearing <vector> include (#225872)
This should fix the build failures reported in
https://lab.llvm.org/buildbot/#/builders/25/builds/19816, looks like
other places were relying on it transitively
Commit: f3d4409596d9d500b1fef9b6d44e4908e9c61ad3
https://github.com/llvm/llvm-project/commit/f3d4409596d9d500b1fef9b6d44e4908e9c61ad3
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/include/mlir-c/Diagnostics.h
M mlir/lib/CAPI/IR/Diagnostics.cpp
M mlir/test/CAPI/ir.c
Log Message:
-----------
[mlir-c] Add mlirEmitWarning and mlirEmitRemark (#206542)
Adds C API entry points for emitting warning and remark diagnostics, complementing the existing `mlirEmitError`.
Assisted by: Claude
Commit: c25756a336fe1485f82240c8978411467b8cd0fe
https://github.com/llvm/llvm-project/commit/c25756a336fe1485f82240c8978411467b8cd0fe
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/IR/Constants.cpp
M llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash-inseltpoison.ll
M llvm/test/Transforms/GVN/constexpr-vector-constainsundef-crash.ll
M llvm/test/Transforms/InstSimplify/ConstProp/cast-vector.ll
M llvm/test/Transforms/InstSimplify/ConstProp/icmp-global.ll
M llvm/test/Transforms/InstSimplify/gep.ll
M llvm/test/Transforms/InstSimplify/vector_gep.ll
Log Message:
-----------
[InstSimplify] Use getGetElementPtr() overload accepting DataLayout (#225817)
To directly create GEPs in canonical ptradd representation. The
effect of this is that a) we do not form constexpr GEPs which would
no longer be supported in ptradd representation and b) canonicalize
vector GEPs to ptradd form, because the code that does this as
part of constant folding doesn't support vector GEPs, but the new
API does.
This also converts the isSupportedGetElementPtr() assert into a
condition. The getGetElementPtr() API accepting DataLayout is
already fallible, so it makes sense to directly handle all cases
that can't be represented as a constant expression, instead of
requiring the type to be source element type to be handled separately.
Commit: 48fb6577caa15e8e90c76a40a4cbd5dfe3cb1387
https://github.com/llvm/llvm-project/commit/48fb6577caa15e8e90c76a40a4cbd5dfe3cb1387
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/replace-load-and-with-bzhi.ll
Log Message:
-----------
[X86] Remove combineAndLoadToBZHI (#221025)
The low-bits mask table recognition it performed is now done in the
target-independent AggressiveInstCombine (394c8dd14933), which rewrites
`x & tbl[i]` to `x & ((1 << i) - 1)`; the X86 backend already lowers
that arithmetic to `bzhi` via `matchBitExtract`. Removing the DAG fold
also retires its unchecked matching of scaled indices, folded constant
offsets and extending loads, which could miscompile under the static
relocation model (the original subject of this PR).
`replace-load-and-with-bzhi.ll` is repurposed as an end-to-end pipeline
test (`opt | llc`) covering the cases the DAG fold handled, PIC, which it
could not handle, and the index shapes it miscompiled.
Assisted-by: Claude Code
Commit: fa939745e0aceb6cd92debec4badd42a4e571a71
https://github.com/llvm/llvm-project/commit/fa939745e0aceb6cd92debec4badd42a4e571a71
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/fsub-chain-reduction-unpaired-signs.ll
Log Message:
-----------
[SLP]Pair small sign-aware reduction groups only if both signs have one
The small-group check of the flattened fsub/fneg fadd reductions
used whenever any leaf was negated, vectorizing 2-wide parts that
have no opposite-sign part to combine with via the vector fsub.
Allow it only if both signs have a group of at least 2 values.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225881
Commit: b68692b05a2e575b09a21f4310fc1a94241669ea
https://github.com/llvm/llvm-project/commit/b68692b05a2e575b09a21f4310fc1a94241669ea
Author: Ingo Müller <ingomueller at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/lit.md
Log Message:
-----------
[lit][docs] Document %if conditional substitution in lit CommandGuide (#225683)
`%if ... %else` conditional substitutions (implemented in
`TestRunner.py` and mentioned in `TestingGuide.md`) were missing from
the `SUBSTITUTIONS` table and `available_features` description in
`llvm/docs/CommandGuide/lit.md`. Add `%if` to the base substitutions
table and note that `available_features` can be used in `%if`
conditions.
Signed-off-by: Ingo Müller <ingomueller at google.com>
Commit: aeea5b1050b9388a77cc749b70795fc8701af923
https://github.com/llvm/llvm-project/commit/aeea5b1050b9388a77cc749b70795fc8701af923
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/outer_loop_prefer_scalable.ll
A llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-outer-loop-memchecks.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-gep-nowrap-flags-scev.ll
A llvm/test/Transforms/LoopVectorize/outer-loop-memory-safety.ll
M llvm/test/Transforms/LoopVectorize/outer_loop_contiguous.ll
Log Message:
-----------
[LV] Add additional outer loop vectorization tests. (#225821)
Add test more test coverage for outer loop vectorization path, focusing
on various legality aspects, like supported instructions and memory
checks.
Commit: dfc0d74533a697129b29450bd8ca7d2010007df9
https://github.com/llvm/llvm-project/commit/dfc0d74533a697129b29450bd8ca7d2010007df9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/filesystem.bench.cpp
Log Message:
-----------
[libc++] Don't pass a path lvalue to DoNotOptimize in the filesystem benchmark (#225504)
BM_PathIterateOnceBackwards passes *I directly to DoNotOptimize.
However, libstdc++ returns a const lvalue reference to `path` from that
operation, which selects GoogleBenchmark's deprecated const-ref
overload.
Use the pattern used elsewhere in this file instead.
Commit: d4c1e0c7374e5f38eb8ebba8ef356065e86cbc2b
https://github.com/llvm/llvm-project/commit/d4c1e0c7374e5f38eb8ebba8ef356065e86cbc2b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.192bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds-negative-offset-addressing-mode-loop.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.f16.ll
M llvm/test/CodeGen/AMDGPU/fneg-combines.f16.ll
M llvm/test/CodeGen/AMDGPU/fold-fi-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-with-carry.mir
M llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink.mir
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmax.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fmin.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/trunc-store.ll
Log Message:
-----------
AMDGPU: Preserve dead carry-out when shrinking adds in SIFoldOperands (#225687)
The VOP3 form of add/sub with carry out are sometimes shrunk to the VOPC
form when the carry out is dead. Preserve this information by setting
the dead flag on the new instruction. This alleviates some implicit
dependence on LiveVariables' later recomputation of dead flags.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: a4f389e32f90eae9ee326caa1b7091d28d533e5e
https://github.com/llvm/llvm-project/commit/a4f389e32f90eae9ee326caa1b7091d28d533e5e
Author: Vitaly Buka <vitalybuka at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M compiler-rt/lib/sanitizer_common/symbolizer/scripts/global_symbols.txt
Log Message:
-----------
[NFC][sanitizer] Allow fread in symbolizer (#225853)
Commit 3c63fcb246f3 (#212010) introduced `fread` usage in libc++
`std_stream.h`. Because libc++ is linked into the internal symbolizer,
`fread` is now referenced in `symbolizer.o`. Add `fread U` to
`global_symbols.txt` so symbol verification succeeds.
Assisted-by: Gemini
Commit: edbeccc7c205ccd4e6ea37a01eb63740d065f145
https://github.com/llvm/llvm-project/commit/edbeccc7c205ccd4e6ea37a01eb63740d065f145
Author: Jonathan Zakharov <jzakharov at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/semantics/SV_InstanceID.vs.hlsl
A clang/test/SemaHLSL/Semantics/instanceid.output.hlsl
A clang/test/SemaHLSL/Semantics/instanceid.ps.hlsl
A clang/test/SemaHLSL/Semantics/instanceid.vs.hlsl
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/unittests/Frontend/HLSLSemanticStagesTest.cpp
Log Message:
-----------
[HLSL] Implement the SV_InstanceID semantic (#221091)
Fixes #212572
Adds type validation, stage restriction, and lowering for
`SV_InstanceID`.
- Type check rejects non-uint; DXIL accepts U32/U16, SPIR-V accepts U32
only (VUID-InstanceIndex-InstanceIndex-04265).
- Rejected all sigpoints but Vertex In.
- On SPIR-V, the variable is decorated with `BuiltIn InstanceIndex`
instead of a user-assigned Location.
- SPIR-V lowering loads from the `InstanceIndex` (ID 43) built-in; DXIL
lowering uses `dx.op.loadInput`.
- LIT tests for sema (wrong type, wrong stage, output direction) and
codegen (BuiltIn decoration, no Location).
@dnovillo @pow2clk
Assisted-by: LLM
Commit: 1e5e53db7a6f0170b9d7783acb5a7d0e23a73968
https://github.com/llvm/llvm-project/commit/1e5e53db7a6f0170b9d7783acb5a7d0e23a73968
Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/lib/Sema/SemaChecking.cpp
A clang/test/Sema/warn-fortify-source-recv-not-builtin.c
M clang/test/Sema/warn-fortify-source.c
Log Message:
-----------
[Clang][Sema] Add fortify warnings for recv and recvfrom (#223520)
Add `-Wfortify-source` diagnostics for `recv` and `recvfrom` when the size argument exceeds the destination buffer size.
Part of #142230
Assisted-by: Gemini
Commit: 126134200f56180ef0b5cdab9f627d043f8e918d
https://github.com/llvm/llvm-project/commit/126134200f56180ef0b5cdab9f627d043f8e918d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
A llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-dead-carry.mir
A llvm/test/CodeGen/AMDGPU/shrink-dead-vcc-def.mir
R llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir
Log Message:
-----------
AMDGPU: Preserve carry-out dead flag in buildShrunkInst (#225798)
Shrinking from the e64 to the e32 form drops the explicit carry-out def
in favor of an implicit vcc def. If the original carry out had a dead
flag, preserve it in the shrunk instruction's implicit-def operand.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: 77c91047fb488f1b8d45678065a9b9a0c8e86189
https://github.com/llvm/llvm-project/commit/77c91047fb488f1b8d45678065a9b9a0c8e86189
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVLegalizeResourceBinding.cpp
Log Message:
-----------
[SPIRV] Fix -Wunused-variable in #224488 (#225897)
Use [[maybe_unused]] as the operations either have side effects where we
can't inline them into the assert or the definitions/variable names
provide additional clarity.
Commit: a26ba32319c157f5b8d6f59528ec001db9ff4055
https://github.com/llvm/llvm-project/commit/a26ba32319c157f5b8d6f59528ec001db9ff4055
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
M flang/test/Fir/copy-codegen.fir
M flang/test/HLFIR/assign-codegen-derived.fir
M flang/test/Lower/CUDA/cuda-devptr.cuf
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
Log Message:
-----------
[flang] Fix TRANSFER into derived type with tail padding (#223814)
When assigning a derived type value whose allocated size exceeds its
declared
field size (e.g. `SEQUENCE` type `{i32, i8}` — 5 bytes of fields, 8
bytes
allocated due to ABI tail padding), the assignment path in
`genRecordAssignment` took a "simple type" fast path that called
`genComponentByComponentAssignment`. That function iterated over
declared
fields and copied them one by one via `fir.coordinate_of`/`fir.load`/
`fir.store`, silently skipping the tail-padding bytes and leaving them
**unwritten** in the destination.
This is a compatibility choice rather than a correctness fix: F2023
10.2.1.3
p15 defines derived-type intrinsic assignment component by component,
and p16
allows any means with the same effect, so padding is outside the defined
effect
on either side. gfortran preserves the full allocated storage (including
padding
bytes) on assignment; this patch aligns flang's behaviour with gfortran
for two
cases:
- **`TRANSFER` into a padded SEQUENCE type**: `x = transfer(raw, x)` now
copies
all transferred bytes — including those that fall in the padding region
— into
`x`. A round-trip `raw = transfer(x, raw)` then recovers the original
value.
- **Structure constructor**: `x = t(1, 2_c_int8_t)` now copies the full
temporary, so the padding bytes written into `x` are the temporary's
padding
bytes rather than being left unwritten.
Fix: replace `genComponentByComponentAssignment` with `fir::CopyOp`
(emitting
`fir.copy`). `fir.copy` defers the size computation to codegen via
`genTypeStrideInBytes` and the LLVM data layout, which includes tail
padding.
The dead `genComponentByComponentAssignment` function (≈80 lines) is
removed.
### no_overlap / memmove
`no_overlap` is only sound when the operands are *known* to be
non-overlapping. The `!recTy.isSequence()` fast-path condition is an
*assumption* rather than a proven fact: `flang/docs/Aliasing.md`
documents a
configuration where a Cray pointee aliases a variable with the `TARGET`
attribute, producing overlapping operands even for a non-SEQUENCE type.
A separate `noOverlap` flag is `true` only when non-overlap is *proven*
—
either the LHS is a compiler temporary, or `fir::AliasAnalysis`
explicitly
returns `NoAlias`. When `noOverlap` is `false`, `fir.copy` lowers to
`memmove`, which is correct for all overlap configurations. The
`disjoint`
gate (which selects `fir.copy` over the `_FortranAAssign` runtime path)
is
unchanged.
### Volatile operands
The ref type for each `fir.copy` operand is computed using
`builder.getRefType(recTy, fir::isa_volatile_type(addr.getType()))`, so
a
`fir.convert` is only emitted when the element type actually differs
(e.g. a
module record type assigned to a structurally identical local SEQUENCE
type)
and volatility is always preserved. This ensures whole-record assignment
to or
from a `volatile` derived-type variable passes `ConvertOp::verify` under
`--strict-fir-volatile-verifier`.
### CUFPredefinedVarToGPU
`processDeclareOp` previously cast every use of a predefined-variable
`fir.declare` to `fir.coordinate_of` without a null check, crashing when
the
use was anything else. A whole-record assignment such as `idx =
threadIdx`
lowers to `fir.copy %threadidx to %idx`, producing a non-coordinate use
that
triggered the crash.
`fir.copy` uses of a predefined-variable declare are now expanded into
three
per-field NVVM register reads + stores, so the destination receives
actual GPU
register values rather than a copy from the global backing variable.
Each
field store uses a reference type that inherits the destination's
volatility,
so a `volatile` destination (e.g. `type(dim3), volatile :: idx`)
produces
volatile stores and passes `--strict-fir-volatile-verifier`. The declare
and
the global are erased once all uses are handled; `fir.call` and other
unrecognised uses keep the declare alive.
### Known follow-ups
`fir.copy` does not yet implement `FirAliasTagOpInterface` (recorded as
a TODO
in `FIROps.td`) and its lowering does not forward alignment from the
operand
types. Every simple derived-type assignment now routed through
`fir.copy` —
including the OpenACC/OpenMP recipes and the CUDA paths changed by this
patch —
loses its per-dummy TBAA tags and emits `align 1` instead of the natural
field
alignment. Both losses are conservative and the code remains correct,
but they
may affect optimisation quality at `-O2` and above. Implementing
`FirAliasTagOpInterface` and propagating alignment are left as follow-up
work.
### Example
```fortran
program transfer_bindc_tail_pad
use iso_c_binding, only: c_int, c_int8_t, c_sizeof
implicit none
type :: t
sequence
integer(c_int) :: a
integer(c_int8_t) :: b
end type
type(t) :: x
integer, parameter :: n = int(STORAGE_SIZE(x)/8)
character(len=n) :: raw, rawx
equivalence (x, rawx)
print *, ' STORAGE_SIZE({i32, 8}) bits =', storage_size(x)
rawx = repeat(achar(0), n)
raw = repeat(achar(255), n)
print *, "raw before round trip"
x = transfer(raw, x)
print *, "intermediate round trip value"
call printbytes(rawx)
print *, "raw after round trip"
raw = transfer(x, raw)
call printbytes(raw)
contains
subroutine printbytes(c)
character(*) :: c
integer :: i
do i = 1, n
print '(i2,1x,z2.2)', i, iachar(c(i:i))
end do
end subroutine
end program
```
Before this patch (padding bytes left unwritten; the zeros come from
`rawx = repeat(achar(0), n)` — with a different initialiser the values
would differ):
```
> a.out
STORAGE_SIZE({i32, 8}) bits = 64
raw before round trip
intermediate round trip value
1 FF
2 FF
3 FF
4 FF
5 FF
6 00
7 00
8 00
raw after round trip
1 FF
2 FF
3 FF
4 FF
5 FF
6 00
7 00
8 00
```
After this patch, consistent with gfortran (source bytes fully
preserved):
```
> a.out
STORAGE_SIZE({i32, 8}) bits = 64
raw before round trip
intermediate round trip value
1 FF
2 FF
3 FF
4 FF
5 FF
6 FF
7 FF
8 FF
raw after round trip
1 FF
2 FF
3 FF
4 FF
5 FF
6 FF
7 FF
8 FF
```
Assisted-by: IBM Bob
Commit: b8d50145149b07fab3c7d1fb867fd781f927da8c
https://github.com/llvm/llvm-project/commit/b8d50145149b07fab3c7d1fb867fd781f927da8c
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-mixed.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-sret.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk.cpp
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
Log Message:
-----------
[CIR] Read a non-byval parameter back out of its spill slot (#225010)
CallConvLowering recognizes a forwarded non-byval indirect argument by
the slot its operand was loaded from. At -O1 and above cir-simplify
folds that load away when the slot is a constant alloca, which is what
CIRGen emits for a const-qualified by-value parameter. The walk that
gives each such parameter's slot the alignment the ABI promises now also
reads the record back out of the slot at the spill and points the
parameter's call-argument uses at that load, so an Expand, byval or
coerced argument reads it too.
Assisted-by: Cursor / claude-opus-5
Commit: 14dd7641a4b90184b1cad08be04242ef93ed61cf
https://github.com/llvm/llvm-project/commit/14dd7641a4b90184b1cad08be04242ef93ed61cf
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
A llvm/test/Transforms/VectorCombine/pr225272.ll
Log Message:
-----------
[VectorCombine] shrinkType - only attempt to copy flags/metadata if we create a new instruction (#225776)
CreateBinOp may fold to a constant/argument value etc.
Fixes #225272
Commit: c9eafc159e7caeb4fbb81e7af7dfaacc3cbd3e62
https://github.com/llvm/llvm-project/commit/c9eafc159e7caeb4fbb81e7af7dfaacc3cbd3e62
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/revec-reductions.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
Log Message:
-----------
[SLP] Better track MinBWs between vectorization attempts (#224199)
When retrying vectorization with smaller VF, we may be able to vectorize
further where previously gathering was required. This may expose
[s/z]ext instruction that would allow us to optimize via MinBWs. In such
cases, ignore AnalyzedMinBWVals and recompute MinBWs anyways.
Assisted By: Codex
Commit: 79cfb6f2871f3bc5a75697e29e4ac110605a1a9f
https://github.com/llvm/llvm-project/commit/79cfb6f2871f3bc5a75697e29e4ac110605a1a9f
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[SDPatternMatch] Implement conditionally binding a value by using m_AllOf. NFC (#225559)
Making the predicate part of Value_bind has a non-zero code size and
compile time impact. I assume this is because the non conditional
m_Value needs a dummy predicate.
This patch removes the predicate from Value_bind and uses a m_AllOf so
we only pay for the predicate when we need it. This matches how this is
currently done in IR PatternMatch.
Commit: f1b80f06f2b3f878086a24dd145244053aad51af
https://github.com/llvm/llvm-project/commit/f1b80f06f2b3f878086a24dd145244053aad51af
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
Log Message:
-----------
[CostModel][X86] Add basic AVX512 Intrinsic::masked_expandload cost tables (#225857)
Numbers based off uops.info and Agner averages - they can be polished in
the future, hopefully in conjunction with the scheduler models (which
defaults to treating them as folded variable shuffles).
Still needs splitting/legalization cost adjustments, but the codegen is
pretty good so the split multiplier isn't that far off tbh.
Part of #214613
Commit: 7071b7545aca45e8d66809474f57e10c805af874
https://github.com/llvm/llvm-project/commit/7071b7545aca45e8d66809474f57e10c805af874
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
Revert "Partially Reapply "[libcxx] Move premerge jobs to k8s mode runner set (#221395)"" (#225896)
Reverts llvm/llvm-project#225222
It turns out this did not fully fix the issue.
Commit: 8ec2ba57f65624b4fdcca0fe2b0ff9bfcfe4c4cd
https://github.com/llvm/llvm-project/commit/8ec2ba57f65624b4fdcca0fe2b0ff9bfcfe4c4cd
Author: lexi-nadia <lexinadia at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/SampleProfileInference.h
Log Message:
-----------
Add a missing include of <vector> (#225871)
This file used to get `<vector>` from DepthFirstIterator.h, but
7311a69f6caa2a6b50cfb899d4b8a1f9f9eeb210 removed the associated include.
Commit: bcb89020f2953e414ff525cbf04e9c35be50ece4
https://github.com/llvm/llvm-project/commit/bcb89020f2953e414ff525cbf04e9c35be50ece4
Author: Alexis Perry-Holby <aperry at lanl.gov>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A flang/docs/MeetingNotes/2026/2026-09-23.md
Log Message:
-----------
[flang] Add notes from 9-23-26 Flang Community Call (#225841)
Commit: 88373ba98f5050debb65d5f4b3c631e05a224e60
https://github.com/llvm/llvm-project/commit/88373ba98f5050debb65d5f4b3c631e05a224e60
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/ARM/switch-ssa-lookup-restrictions.ll
A llvm/test/Transforms/SimplifyCFG/X86/switch-result-constants.ll
Log Message:
-----------
[SimplifyCFG] Restrict initializer checks to lookup tables (#224235)
SimplifyCFG currently applies lookup table constant restrictions even
when a switch can be replaced with selects or other SSA values. Move
these checks to lookup table construction so they only apply when a
global initializer is needed.
Commit: efd7e6566d7021116937725cfa70ab55d7b7eb1d
https://github.com/llvm/llvm-project/commit/efd7e6566d7021116937725cfa70ab55d7b7eb1d
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic-sve.c
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
Log Message:
-----------
[CIR] Lowering for __builtin_reduce_add/mul/min/max/in_order_fadd (#224204)
Added lowering for __builtin_reduce_add, __builtin_reduce_mul,
__builtin_reduce_min, __builtin_reduce_max and
__builtin_reduce_in_order_fadd by mimicking the same shape as
__builtin_reduce_xor which mirrors classic Codegen shape
Added test for the same
Commit: bd7e86cd1c74f70085cba6bf776d9612e8179f16
https://github.com/llvm/llvm-project/commit/bd7e86cd1c74f70085cba6bf776d9612e8179f16
Author: Trevor Gross <tg at trevorgross.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/arm/aeabi_unaligned_access_test.c
Log Message:
-----------
[compiler-rt][test] `__aeabi_uread*` now take a const pointer (#225564)
Discussion inspired by a review comment when these were added prompted a
change to RTABI making these take const pointers. Update the test to
match.
This is a pretty insignificant change but cleans up a few warnings.
Review comment mentioning this:
https://github.com/llvm/llvm-project/pull/167913#discussion_r2527018785
RTABI change:
https://github.com/ARM-software/abi-aa/commit/84e54a7045ff8f37949d2ab193dc07c45717eb41
Commit: 80b5921a8ba4da49ecb9ea063517ceb573023682
https://github.com/llvm/llvm-project/commit/80b5921a8ba4da49ecb9ea063517ceb573023682
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/macosx/branch-islands/Makefile
Log Message:
-----------
[LLDB] Simplify Makefile (#225890)
Commit: cfcff78a126040c7757b3343e028a73fc4a17c83
https://github.com/llvm/llvm-project/commit/cfcff78a126040c7757b3343e028a73fc4a17c83
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/test/API/functionalities/scripted_extensions/malformed_scripted_extensions.py
Log Message:
-----------
[lldb] Validate a scripted class abstract methods before running its constructor (#225246)
`CreatePluginObject` called the class's `__init__` and only then checked
that the class implements the methods the interface requires. So a class
we were always going to reject had already executed arbitrary user code,
side effects included, and if `__init__` happened to raise as well, the
constructor's exception masked the real, structural problem.
Lift the abstract-method diagnosis into `CheckAbstractMethods` and run
it against the class object before calling it. The check already
operated on a class rather than an instance (it just happened to reach
it through `instance.__class__`) so nothing about it needed to change.
The pre-existing-object path (`script_obj`) has no constructor to guard,
so it keeps validating after the fact, gated on a flag so the check runs
once.
`ExceptionInitScriptedBreakpointResolver` in the test fixtures claimed
to test a raising `__init__` but also omitted `__callback__`, so it was
only reporting the init exception because construction used to come
first. It now implements `__callback__`, leaving `__init__` as the
single thing wrong with it, which is what the test means to exercise.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 2e351130b6df0452435c5d489bc9a1a13f8ffacc
https://github.com/llvm/llvm-project/commit/2e351130b6df0452435c5d489bc9a1a13f8ffacc
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/gha-codeql.yml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-cron.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-check-generated-files.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/merged-prs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-issues.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries-all.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/subscriber.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
[Github] Bump all workflows to ubuntu-26.04 (#225878)
ubuntu-26.04 is now GA, so move all the jobs up.
Commit: d0c787e447e150eedf5aa191cbaf68ab82f468fa
https://github.com/llvm/llvm-project/commit/d0c787e447e150eedf5aa191cbaf68ab82f468fa
Author: jimingham <jingham at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/ThreadPlan.h
A lldb/include/lldb/Target/ThreadPlanRunToBreakpoint.h
M lldb/include/lldb/Utility/StreamString.h
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Target/CMakeLists.txt
A lldb/source/Target/ThreadPlanRunToBreakpoint.cpp
M lldb/source/Utility/StreamString.cpp
A lldb/test/API/macosx/lazy_library/Makefile
A lldb/test/API/macosx/lazy_library/TestStepThroughLazyLibrary.py
A lldb/test/API/macosx/lazy_library/library.c
A lldb/test/API/macosx/lazy_library/main.c
Log Message:
-----------
Handle stepping through "lazy library" stubs (#225238)
This is a new linker feature that's available for programs built for
macOS 27 and later. The form of the stubs are slightly different, and
need a slightly different trick to get through them.
Commit: 94c31f357625bab5f14dab8eabbca17d20b33cd3
https://github.com/llvm/llvm-project/commit/94c31f357625bab5f14dab8eabbca17d20b33cd3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
Log Message:
-----------
[SLP][NFC]Remove stale FIXME from PR43745 test, NFC
cmp_lt_gt is vectorized, SLP forms both v2f64 compare reductions after
038f5968616a.
Fixes #43090
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225924
Commit: 4989b3b0bb752c436c922d8e65cd7a952038d5db
https://github.com/llvm/llvm-project/commit/4989b3b0bb752c436c922d8e65cd7a952038d5db
Author: James Y Knight <jyknight at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
Log Message:
-----------
[bazel] Use LZMA from bazel registry. (#225877)
PR #220092 added lzma support, but used the system copy of lzma for
bazel, saying it wasn't available in BCR. Since it actually is (under
the name "xz"), switch to using it from there.
Commit: fc1f3ff5a3b3da827cfca31d07a79c036e03b545
https://github.com/llvm/llvm-project/commit/fc1f3ff5a3b3da827cfca31d07a79c036e03b545
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerMicrosoftCXXABI.cpp
M clang/test/CIR/CodeGen/delete-array-aligned.cpp
A clang/test/CIR/CodeGen/delete-array-overaligned-cookie.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/IR/invalid-delete-array.cir
Log Message:
-----------
[CIR] Fix 'cookie' size of array delete on aligned type (#225806)
This came up in some test suite, the cookie size calcuation of a array
delete with a 'cookie' was incorrect if the type had an alignment. This
patch strings the correct alignment through the 'element_align' tag on
the array-delete operation, and uses that for the final calculation,
matching classic codegen.
Commit: 03fb86920dc00a2e739a2d8402f0ebe7323cf9a9
https://github.com/llvm/llvm-project/commit/03fb86920dc00a2e739a2d8402f0ebe7323cf9a9
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M bolt/lib/Core/DynoStats.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/Instrumentation.cpp
M bolt/lib/Passes/StokeInfo.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M bolt/tools/driver/llvm-bolt.cpp
M bolt/tools/merge-fdata/merge-fdata.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/Tooling/CommonOptionsParser.cpp
M clang/tools/clang-diff/ClangDiff.cpp
M clang/tools/clang-import-test/clang-import-test.cpp
M clang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
M clang/tools/clang-refactor/ClangRefactor.cpp
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/lib/CodeGen/BasicBlockMatchingAndInference.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/CodeGen/MIR2Vec.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/IR/OptBisect.cpp
M llvm/lib/Support/DebugCounter.cpp
M llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVAuxDataHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/SPIRV/SPIRVTargetMachine.cpp
M llvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
M llvm/lib/Transforms/Instrumentation/HWAddressSanitizer.cpp
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-ir2vec/llvm-ir2vec.cpp
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
M llvm/tools/llvm-lto2/llvm-lto2.cpp
M llvm/tools/llvm-pdbutil/llvm-pdbutil.cpp
M llvm/tools/llvm-profgen/ProfileGenerator.cpp
M llvm/tools/llvm-split/llvm-split.cpp
M llvm/tools/llvm-undname/llvm-undname.cpp
M mlir/lib/Debug/DebugCounter.cpp
M polly/lib/Analysis/ScopInfo.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
Log Message:
-----------
Remove unneeded cl::Optional from named options. NFC (#225870)
cl::Optional is the default for cl::opt and has been no-op since
https://reviews.llvm.org/D120455 removed the "may only occur zero or one
times!" error.
Extracted from #225628
Commit: ad695d46e4535f953558705541b71c2d938fb72b
https://github.com/llvm/llvm-project/commit/ad695d46e4535f953558705541b71c2d938fb72b
Author: David Tellenbach <dtellenbach at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
A llvm/test/CodeGen/AArch64/sme-za-non-sibling-tailcall.ll
M llvm/test/CodeGen/AArch64/sme-za-tailcall-fpdiff-align.ll
Log Message:
-----------
[AArch64] Don't emit stack restore for SME ZA non-sibling tail calls (#224721)
A tail call from a function with live ZA state was previously prevented
from being lowered as a sibling call to have a CALLSEQ_START to glue
INOUT_ZA_USE to. This led to bogus stack restores.
We now drop the INOUT_ZA_USE marker on tail calls and can thus lower as
sibling calls if needed to take advantage of the existing correct stack
restore behavior.
This is safe to do since tail calls use TCRETURN and the MachineSMEABI
pass requires live ZA state to stay live across returns anyway.
Commit: 1ff88ee1b0710bab455f1da22f7c7f7b36389cda
https://github.com/llvm/llvm-project/commit/1ff88ee1b0710bab455f1da22f7c7f7b36389cda
Author: Clayton Knittel <cknit1999 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/limited-ctor.cpp
Log Message:
-----------
Always emit complete debug info for types which appear as a member of a standard-layout union. (#224439)
[[class.mem]](https://timsong-cpp.github.io/cppwp/n3337/class.mem#19)
states:
> "If a standard-layout union contains two or more standard-layout
structs that share a common initial sequence, and if the standard-layout
union object currently contains one of these standard-layout structs, it
is permitted to inspect the common initial part of any of them. Two
standard-layout structs share a common initial sequence if corresponding
members have layout-compatible types and either neither member is a
bit-field or both are bit-fields with the same width for a sequence of
one or more initial members."
This makes it possible to obtain a reference to a type which was never
constructed, which violates the assumption made by constructor homing
that all types that may require debug info must be constructed.
This change takes the conservative approach of always emitting full
debug info for standard-layout types which appear as a member of a
standard-layout union somewhere in the TU. It could be made more
aggressive by only emitting full debug info if there is another type in
the union that shares a "common initial sequence", but that would add
complexity to this exclusion logic and likely isn't worth it.
---------
Signed-off-by: Clayton Knittel <cknit1999 at gmail.com>
Commit: d28d490e113147bed0061a1bde79ebc982cbdb52
https://github.com/llvm/llvm-project/commit/d28d490e113147bed0061a1bde79ebc982cbdb52
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-dependent-init.cpp
Log Message:
-----------
[alpha.webkit.UncountedLocalVarsChecker] Wait for the instantiation to check a dependent local variable (#224566)
RawPtrRefLocalVarsChecker had the same false positive as the call
arguments checker: a local variable whose declared type is a concrete
raw pointer was reported when its initializer was still type-dependent.
In
template <typename T> void f(T& guard) {
Voice* v = guard.ptr();
}
the declared type Voice* makes isUnsafePtr fire, while guard.ptr() is a
CXXDependentScopeMemberExpr, so tryToFindPtrOrigin bails out before it
can reach the guardian analysis which makes the resolved form safe. The
instantiation is character for character the concrete form, which is not
reported.
Skip type-dependent initializers and traverse the instantiated call
operators of a generic lambda, as in the call arguments checker. Unlike
there, each specialization also has to be installed as DeclWithIssue
while its body is traversed: the guardian analysis runs GuardianVisitor
over the body of DeclWithIssue, and pointed at the function enclosing
the lambda it walks the dependent pattern instead, where VisitCallExpr
gives up on a null getDirectCallee() and every guarded local is reported
again.
Commit: 674fd8d37e9b5806bc1a7ff31dc56bf3a0839c6b
https://github.com/llvm/llvm-project/commit/674fd8d37e9b5806bc1a7ff31dc56bf3a0839c6b
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/test/CodeGen/RISCV/target-abi-invalid.ll
A llvm/test/CodeGen/RISCV/target-abi-synthesize-flag.ll
Log Message:
-----------
RISCV: Don't use MCTargetOptions::ABIName in the ELF target streamer (#224704)
The abi name should come from the target-abi module flag in codegen,
which should be set up in the AsmPrinter. The ABI name field should
only be of practical use in the assembler, which reads the flag in
onBeginOfFile.
Co-Authored-By: Claude <noreply at anthropic.com> (Claude Opus 4.8)
Commit: 46e6aac0ebc5754a8189d7742ba8432fbe17c640
https://github.com/llvm/llvm-project/commit/46e6aac0ebc5754a8189d7742ba8432fbe17c640
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/RISCVUsage.md
Log Message:
-----------
[RISCV][Doc] Remove unratified extensions from the ratified extension status table. NFC (#225898)
Commit: 1bf9ce86b462aa5a184865ab3a2f7e7ea0b4b350
https://github.com/llvm/llvm-project/commit/1bf9ce86b462aa5a184865ab3a2f7e7ea0b4b350
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Target/StackFrame.cpp
M lldb/test/API/commands/frame/var/TestFrameVar.py
Log Message:
-----------
[lldb] Fix crash on a trailing '-' in a legacy variable expression path (#225661)
`StackFrame::LegacyGetValueForVariableExpressionPath` walks a variable
expression path one separator character at a time. On seeing a `-` it
checks that the following character is `>`, to confirm this is really
the `->` operator and not something else:
```
case '-':
expr_is_ptr = true;
if (var_expr.size() >= 2 && var_expr[1] != '>')
return ValueObjectSP();
...
var_expr = var_expr.drop_front(); // Remove the '-'
[[fallthrough]];
case '.': {
var_expr = var_expr.drop_front(); // Remove the '.' or '>'
```
The `var_expr.size() >= 2` guard is only meant to make the `var_expr[1]`
read safe, but it also disables the whole check when `var_expr` is
exactly `"-"` (size 1) with nothing after it. Execution falls through
the `if`, drops the `-` (leaving an empty `StringRef`), then falls
through into the `.` case, which unconditionally drops a second
character on that now-empty string. `StringRef::drop_front` asserts
`size() >= N`, so this aborts.
Reproduced with `settings set target.experimental.use-DIL false` (the
legacy, non-DIL variable-expression-path parser) and a trailing `-`
with no variable-path continuation after it:
```
(lldb) settings set target.experimental.use-DIL false
(lldb) frame variable somevar-
Assertion failed: (size() >= N && "Dropping more elements than exist"), function drop_front, file StringRef.h, line 636.
```
Fix the guard to also reject when `var_expr` is too short to contain a
character after the `-`, not only when that character exists and is
wrong. After the fix the same command reports an ordinary parse error
instead of crashing:
```
(lldb) frame variable somevar-
error: unable to find any variable expression path that matches 'somevar-'
```
Add
`TestFrameVar.test_legacy_expression_path_malformed_trailing_operator`,
which runs `frame variable` on a trailing `-`, a trailing `>`, and `-`
followed by something other than `>`, under `use-DIL false`, and checks
each one fails as an ordinary command error rather than crashing lldb.
Commit: a13aa07af6d0527a14cdc2e2f3fe4ec3d0ccb362
https://github.com/llvm/llvm-project/commit/a13aa07af6d0527a14cdc2e2f3fe4ec3d0ccb362
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/test/API/commands/dwim-print/TestDWIMPrint.py
Log Message:
-----------
[lldb] Fix dwim-print's arrow-operator check to match the substring (#225778)
`CommandObjectDWIMPrint::DoExecute` decides whether to try `expr` as a
limited, dot-only frame variable path before falling back to full
expression evaluation. The comment above the check says a variable
path is not attempted if `expr` contains the arrow operator (`->`) or
the subscript operator (`[]`), or a bare `*` or `&`:
```
const bool try_variable_path =
expr.find_first_of("*&->[]") == StringRef::npos;
```
`find_first_of` treats its argument as a set of characters so this also
matches a lone `-` or a lone `>` anywhere in `expr`, not only the
two-character `->` sequence the comment describes.
Fix the check to test for the `->` substring directly with
`StringRef::contains`, keeping `find_first_of` only for the four
characters that are genuinely excluded one at a time (`*`, `&`, `[`,
`]`).
By itself, this widens which expressions attempt the variable-path
fast path (anything with a lone `-` or `>` now does).
Ordinary arithmetic and comparison expressions containing a lone `-`
or `>` now correctly attempt, and correctly fail, the variable-path
fast path before falling through to `expression`, shown here
```
frame #0: liblldb.24.0git.dylib`lldb_private::CommandObjectDWIMPrint::DoExecute(this=<unavailable>, command=<unavailable>, result=<unavailable>) at CommandObjectDWIMPrint.cpp:169:13 [opt]
(lldb) settings set dwim-print-verbosity full
(lldb) dwim-print expr
note: ran `frame variable expr`
(llvm::StringRef) (Data = "1+1", Length = 3)
(lldb) dwim-print expr.Length-1
warning: `this' is not accessible (substituting 0). Couldn't load 'this' because its value couldn't be evaluated
note: ran `expression expr.Length-1`
(size_t) 2
(lldb) dwim-print expr.Length>0
warning: `this' is not accessible (substituting 0). Couldn't load 'this' because its value couldn't be evaluated
note: ran `expression expr.Length>0`
(bool) true
(lldb) dwim-print frame->m_frame_index
warning: `this' is not accessible (substituting 0). Couldn't load 'this' because its value couldn't be evaluated
note: ran `expression frame->m_frame_index`
(uint32_t) 0
```
Add more expressions in `TestDWIMPrint.test_expressions`, to cover
expressions
containing a lone `-` or `>`. Note that these tests can't tell "the
expression is evaluated by DIL but failed" and "expression isn't
evaluated by DIL at all".
Commit: 38299200b632536a769395c503c1f2fb2184e855
https://github.com/llvm/llvm-project/commit/38299200b632536a769395c503c1f2fb2184e855
Author: Ryosuke Niwa <rniwa at webkit.org>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-dependent-arg.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-generic-lambda.cpp
Log Message:
-----------
[alpha.webkit.UncountedCallArgsChecker] Wait for the instantiation to check a dependent call argument (#224565)
RawPtrRefCallArgsChecker reported a call argument as unsafe when the
call appeared in an uninstantiated template pattern and the argument was
still type-dependent. In
template <typename T> void f(T& voice) {
Wrapper::create(protect(voice));
}
Wrapper::create is qualified, so it is resolved in the pattern and its
parameter is known to be a raw reference, but protect(voice) is a
dependent call whose callee is still an UnresolvedLookupExpr.
tryToFindPtrOrigin has nothing to look at -- there is no callee decl and
the type of the call is '<dependent type>' rather than Ref<Voice> -- so
the argument was reported even though the instantiation resolves it to a
Ref. Giving the parameter a concrete type made the report go away with
no other change. The same happened in the body of a generic lambda,
which is such a pattern.
Skip type-dependent arguments and let the instantiation, which is
visited separately, decide. Function template instantiations were
already traversed, but a generic lambda's instantiated call operators
were not: with ShouldVisitImplicitCode disabled,
RecursiveASTVisitor::TraverseLambdaExpr only walks LambdaExpr::getBody()
and never the closure CXXRecordDecl. Traverse the specializations of the
dependent call operator as well, so that an argument which is only known
to be unsafe after instantiation is still reported.
Commit: b7252822c190a6a924fb15d35b6c4dfa5264fa03
https://github.com/llvm/llvm-project/commit/b7252822c190a6a924fb15d35b6c4dfa5264fa03
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/archives/Makefile
Log Message:
-----------
[LLDB] Simplify Makefile (#225922)
Commit: 408ae6803f0cf2d8a65b00d3e1c9534113c5f0be
https://github.com/llvm/llvm-project/commit/408ae6803f0cf2d8a65b00d3e1c9534113c5f0be
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
Log Message:
-----------
[LLDB] Simplify Makefile for TestBundleWithDotInFilename (#225930)
Commit: f4f785dcc156778dc940252df9408237cd5b01d1
https://github.com/llvm/llvm-project/commit/f4f785dcc156778dc940252df9408237cd5b01d1
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/macosx/find-dsym/deep-bundle/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/TestDeepBundle.py
Log Message:
-----------
[lldb][test] Use the default link rule in TestDeepBundle (#225937)
Commit: 78d4f5ae88311acba1f81560194f74e2c12ca808
https://github.com/llvm/llvm-project/commit/78d4f5ae88311acba1f81560194f74e2c12ca808
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/macosx/function-starts/Makefile
M lldb/test/API/macosx/function-starts/TestFunctionStarts.py
Log Message:
-----------
[lldb]Simplify Makefile in TestFunctionStarts (#225941)
Assisted-by: Claude
Commit: a78e641705a45024a01ebd4d79a3d37b790f64f4
https://github.com/llvm/llvm-project/commit/a78e641705a45024a01ebd4d79a3d37b790f64f4
Author: Adrian Prantl <aprantl at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/API/python_api/sbmodule/Makefile
Log Message:
-----------
[lldb][test] Remove dead a.out rule from TestSBModule's Makefile (#225943)
The custom a.out recipe was overridden by the default $(EXE) rule in
Makefile.rules ("overriding commands for target 'a.out'"), so a.o and
b.o were linked directly into a.out rather than through libfoo.a. Build
only main.c through C_SOURCES and pass libfoo.a via LD_EXTRAS, so the
default rule links against the archive as intended.
Assisted-by: Claude
Commit: da0ded191f82be4ae98eb6eefc01175bd0855ca8
https://github.com/llvm/llvm-project/commit/da0ded191f82be4ae98eb6eefc01175bd0855ca8
Author: MaoJian <maojian16 at huawei.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/X86.cpp
A clang/test/CodeGen/X86/empty-struct-union-array.c
Log Message:
-----------
[X86] Fix CodeGen crash for arrays of empty structs and unions (#224203)
getFPTypeAtOffset() divides by the allocation size of an array element
when normalizing IROffset. Empty structs and unions have zero allocation
size, so arrays of these types can cause a division-by-zero during X86
ABI lowering.
Return nullptr for zero-sized array elements and add CodeGen tests for
empty struct and union arrays.
Commit: db7d6187d470e93f89d142831182ae928472fce7
https://github.com/llvm/llvm-project/commit/db7d6187d470e93f89d142831182ae928472fce7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/PHIElimination.cpp
A llvm/test/CodeGen/X86/phi-elimination-dead-def.mir
Log Message:
-----------
CodeGen: Mark dead PHI destination copies dead in the LiveIntervals path (#225760)
When PHIElimination lowers a PHI whose destination is dead, it records a
dead def in LiveIntervals but did not set the dead flag on the lowered
copy's def operand. The LiveVariables path set this via addVirtualRegisterDead.
Avoids "Instruction ending live segment on dead slot has no dead flag"
verifier errors once LiveVariables is removed.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 45bc3fbacaed869924160d9c3addc2364d2d4cc0
https://github.com/llvm/llvm-project/commit/45bc3fbacaed869924160d9c3addc2364d2d4cc0
Author: Daniel Chen <cdchen at ca.ibm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/Options/FlangOptions.td
M clang/lib/Driver/ToolChains/Flang.cpp
A flang-rt/test/Driver/finit-local-array-exec.f90
A flang-rt/test/Driver/finit-local-char2-exec.f90
A flang-rt/test/Driver/finit-local-charN-exec.f90
M flang/docs/ReleaseNotes.md
M flang/include/flang/Lower/LoweringOptions.def
M flang/include/flang/Lower/LoweringOptions.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/ConvertVariable.cpp
M flang/lib/Optimizer/Dialect/FIRType.cpp
A flang/test/Driver/finit-local.f90
A flang/test/Lower/CUDA/finit-local-cuda.cuf
A flang/test/Lower/finit-local-array-llvm.f90
A flang/test/Lower/finit-local-cray-pointee.f90
A flang/test/Lower/finit-local-exclusions.f90
A flang/test/Lower/finit-local-f128.f90
A flang/test/Lower/finit-local-kind-mapping-rtchar.f90
A flang/test/Lower/finit-local-kind-mapping-subbyte.f90
A flang/test/Lower/finit-local-kind-mapping.f90
A flang/test/Lower/finit-local-logical-llvm.f90
A flang/test/Lower/finit-local-packed.f90
A flang/test/Lower/finit-local-ppc-vector-llvm.f90
A flang/test/Lower/finit-local-real10-llvm.f90
A flang/test/Lower/finit-local-unsigned.f90
A flang/test/Lower/finit-local-volatile-llvm.f90
A flang/test/Lower/finit-local-volatile-real10.f90
A flang/test/Lower/finit-local-volatile.f90
A flang/test/Lower/finit-local.f90
M flang/tools/bbc/bbc.cpp
Log Message:
-----------
[flang] Add -finit-local= to initialize automatic variables (#216164)
This patch implements the `-finit-local=` compiler option, which
initializes automatic (local) Fortran variables that have no explicit or
default initialization.
Assisted-by: IBM Bob
RFC:
https://discourse.llvm.org/t/rfc-add-finit-local-to-flang-for-initializing-automatic-variables/91545
## Accepted values
| Value | Effect |
|-------|--------|
| `zero` | Fill every storage byte with zero |
| `0x` | Fill every storage byte with the given hex pattern |
The gfortran compatibility alias `-finit-local-zero` is equivalent to
`-finit-local=zero`.
## Excluded variables (not initialized)
- Variables with explicit initializers (`integer :: x = 42`)
- Variables initialized via DATA statement
- Derived-type variables whose type has default component initialization
- SAVE variables (static storage)
- Dummy arguments
- ALLOCATABLE and POINTER variables
- Variables in EQUIVALENCE sets
- Cray pointees (their FIR base is a pointer-box descriptor, not value
storage)
- CUDA variables in device-only memory (`device`, `constant`, `shared`,
`usedevice`)
- **PowerPC vector locals** (`vector(real(4))` etc., direct or as a
derived-type component) — `fir::VectorType` does not implement
`DataLayoutTypeInterface`; see `finit-local-ppc-vector-llvm.f90`
## Known limitations
- CHARACTER arrays are not yet initialized (TODO: PR #159788).
- Arrays with unknown or zero extent at compile time are skipped.
- `REAL(16)`/`COMPLEX(16)` require `flang-supports-f128-math`.
- Sub-byte or non-byte-multiple kind mappings for LOGICAL without
allocation padding emit a controlled TODO diagnostic in hex mode only
(zero mode and padded mappings are supported in both modes).
- PowerPC vector locals are excluded (direct or as a derived-type
component).
Commit: 8ec24aa666a738c7258e2541a40b2e53bd7902ec
https://github.com/llvm/llvm-project/commit/8ec24aa666a738c7258e2541a40b2e53bd7902ec
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/CMakeLists.txt
M llvm/lib/Target/Mips/Mips.h
M llvm/lib/Target/Mips/Mips16HardFloat.cpp
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
R llvm/lib/Target/Mips/MipsModuleISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/Mips/MipsTargetObjectFile.cpp
M llvm/lib/Target/Mips/MipsTargetObjectFile.h
M llvm/test/CodeGen/Mips/mips16-hf-attr.ll
M llvm/test/CodeGen/Mips/mips16_32_1.ll
M llvm/test/CodeGen/Mips/mips16_32_10.ll
M llvm/test/CodeGen/Mips/mips16_32_3.ll
M llvm/test/CodeGen/Mips/mips16_32_4.ll
M llvm/test/CodeGen/Mips/mips16_32_5.ll
M llvm/test/CodeGen/Mips/mips16_32_6.ll
M llvm/test/CodeGen/Mips/mips16_32_7.ll
M llvm/test/CodeGen/Mips/mips16_32_8.ll
M llvm/test/CodeGen/Mips/mips16_32_9.ll
M llvm/test/CodeGen/Mips/small-section-reserve-gp.ll
M llvm/test/Transforms/DivRemPairs/Mips/div-expanded-rem-pair.ll
M llvm/utils/gn/secondary/llvm/lib/Target/Mips/BUILD.gn
Log Message:
-----------
[Mips] Remove the subtarget reset pass (#225833)
MIPS updates a target-machine-wide subtarget pointer before instruction
selection. This makes global section placement depend on the last
compiled function and leaves mixed-mode decisions tied to module state.
Use each function's subtarget for lowering, TTI and MIPS16 hard-float
handling, and retain the default subtarget's small-data policy for
global placement. Remove the reset pass, unused fixed subtargets and the
redundant mips-mixed-16-32 option.
Assisted-by: chatgpt-5.6-luna # Testcases
Commit: ae4f4a181f6c7768bee1eb2a5abaae940c9ffa68
https://github.com/llvm/llvm-project/commit/ae4f4a181f6c7768bee1eb2a5abaae940c9ffa68
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
A clang/test/CIR/CodeGen/bitint-wide-be.c
Log Message:
-----------
[CIR] Implement big-bitint lowering for big-endian (#225829)
As a followup to #225470, there was a post-commit comment that we didn't
do big-endian. This patch does that implementation.
However, thanks to the lack of the PPC ABI, we can't use the same test
file (the check lines for functions made the set of prefixes absurd), so
this only does the ones that are effectively different in a meaningful
way, which is a few of the constants. WE match classic in all but
irrelevant differences (packed vs not in 1 place).
Commit: 7008bdc020b6906ce9a5ff7c41224157893a7608
https://github.com/llvm/llvm-project/commit/7008bdc020b6906ce9a5ff7c41224157893a7608
Author: ilia-cher <30845429+ilia-cher at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
A llvm/test/CodeGen/AMDGPU/lirp.mir
Log Message:
-----------
[AMDGPU] Improved register pressure estimates for rescheduling (#213116)
Currently we use instantaneous register pressure estimates during
scheduling. This simple metric counts the number of registers live at
any given moment; scheduler uses it to determine when we are over the
register budget and should start prioritizing instructions that free
registers.
Unfortunately, this metric can sometimes be overly optimistic: for
example, it does not account for register redefinitions (common for
loop-carried vregs), and can underestimate the true register pressure.
This can often result in unnecessary spills and loss of performance in
production kernels.
To fix this, we introduce a stage that selectively reschedules certain
regions: it uses a lightweight, greedy, non-splitting register
allocation simulation to detect when the instantaneous estimate might be
wrong and a region should be rescheduled with tighter register limits.
Test plan:
```
ninja -C build
build/bin/llvm-lit -v llvm/test/CodeGen/AMDGPU/lirp.mir
+ perf testing on a corpus of kernels
```
Commit: 28d90b4824d5b485c891b1fcfc5b79add6052916
https://github.com/llvm/llvm-project/commit/28d90b4824d5b485c891b1fcfc5b79add6052916
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/AIToolPolicy.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AdminTasks.md
M llvm/docs/CodeGenerator.md
M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/llvm-ir2vec.md
M llvm/docs/CommandGuide/llvm-remarkutil.md
M llvm/docs/CompileCudaWithLLVM.md
M llvm/docs/DeveloperPolicy.md
M llvm/docs/ExtendingLLVM.md
M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
M llvm/docs/GitHub.md
M llvm/docs/GitRepositoryPolicy.md
M llvm/docs/GwpAsan.rst
M llvm/docs/HowToAddABuilder.rst
M llvm/docs/HowToBuildWithPGO.md
M llvm/docs/HowToCrossCompileBuiltinsOnArm.md
M llvm/docs/HowToCrossCompileLLVM.md
M llvm/docs/InstrProfileFormat.md
M llvm/docs/InstrRefDebugInfo.md
M llvm/docs/LangRef.md
M llvm/docs/Lexicon.md
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
M llvm/docs/MLGO.rst
M llvm/docs/MarkdownQuickstartTemplate.md
M llvm/docs/MeetupGuidelines.md
M llvm/docs/MemProf.md
M llvm/docs/MergeFunctions.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/OpaquePointers.md
M llvm/docs/PointerAuth.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/Proposals/VectorPredication.md
M llvm/docs/QualGroup.md
M llvm/docs/RISCV/RISCVVectorExtension.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/docs/SandboxIR.md
M llvm/docs/ScudoHardenedAllocator.md
M llvm/docs/SecurityTransparencyReports.md
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/SupportPolicy.md
M llvm/docs/TestingGuide.md
M llvm/docs/tutorial/BuildingAJIT1.md
M llvm/docs/tutorial/BuildingAJIT4.md
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.md
M utils/docs/llvm_sphinx/ext/absolute_links.py
M utils/docs/llvm_sphinx/ext/absolute_links_test/conf.py
M utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
M utils/docs/llvm_sphinx/ext/absolute_links_test/rest.rst
A utils/docs/llvm_sphinx/ext/absolute_links_test/static.html
Log Message:
-----------
[docs] Replace llvm.org/docs links with project links (#222506)
Replace same-project absolute http* URLs with project-local markdown
links. This lets Sphinx validate the targets and keeps local
documentation builds and archived release documentation self-contained.
During the review of the PR, we decided that we prefer markdown-native
links with section header slugs for cross-referencing, when possible.
This is maximally compatible with other markdown renderers, like github.
This has been added to the sphinx quickstart guide, which serves as our
project local Sphinx style guide.
The absolute link checker has been updated to guide people towards the
correct link cross-ref syntax, warning on discouraged constructs.
Part of #214861
Assisted-by: codex
Commit: 396179a4dc3f1493bce1a5c81737175d1601519c
https://github.com/llvm/llvm-project/commit/396179a4dc3f1493bce1a5c81737175d1601519c
Author: David Green <david.green at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/shuffle-other.ll
Log Message:
-----------
[AArch64] Add tests for slice / ext shuffle kinds. NFC (#225949)
Commit: d4fd8328378def36c29e12b57fbfe69b404f10bc
https://github.com/llvm/llvm-project/commit/d4fd8328378def36c29e12b57fbfe69b404f10bc
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang-rt/lib/runtime/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 4989b3b (#225940)
This fixes 4989b3b0bb752c436c922d8e65cd7a952038d5db (#225877).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4989b3b0bb752c436c922d8e65cd7a952038d5db
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 5a03a736fd53f64b66fcb064cd9a6a74214d309b
https://github.com/llvm/llvm-project/commit/5a03a736fd53f64b66fcb064cd9a6a74214d309b
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/Core/IOHandlerCursesGUI.cpp
Log Message:
-----------
[lldb] Remove ConstString from IOHandlerCursesGUI.cpp (#225524)
Commit: 1f6f059b8f15cc34c848f9030fb53e63771bbd2e
https://github.com/llvm/llvm-project/commit/1f6f059b8f15cc34c848f9030fb53e63771bbd2e
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp
M llvm/test/CodeGen/SPIRV/pointers/structured-buffer-access.ll
A llvm/test/CodeGen/SPIRV/pointers/variable-pointers-storage-buffer.ll
Log Message:
-----------
[SPIR-V] Emit variable pointer capability for resources (#225471)
A function-local SPIR-V variable whose allocated type contains a
`StorageBuffer` pointer requires the module to declare the
`VariablePointersStorageBuffer` capability.
This change detects that variable-pointer context while lowering
function-local variables and recursively checks nested aggregate types.
Directly used structured buffers do not enable the capability. It also
registers the capability as available for Vulkan targets that support
SPIR-V 1.3 or `SPV_KHR_variable_pointers`, and emits the extension when
targeting older SPIR-V versions.
Fixes: #202064
Assisted by GPT-5.6 Sol
---------
Co-authored-by: Copilot App <223556219+Copilot at users.noreply.github.com>
Commit: 03a1d68a90c4ba5f6be086fabc37836b0a789b1b
https://github.com/llvm/llvm-project/commit/03a1d68a90c4ba5f6be086fabc37836b0a789b1b
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Lower/BUILD.bazel
Log Message:
-----------
[Bazel] Add ComplexDialect dependency to FortranLower (#225973)
Fixes FortranLower bazel error introduced in commit 45bc3fbacaed, where
ConvertVariable.cpp includes mlir/Dialect/Complex/IR/Complex.h.
Commit: 0ce1b5f91add535d1e8b910ee90c178e054c65eb
https://github.com/llvm/llvm-project/commit/0ce1b5f91add535d1e8b910ee90c178e054c65eb
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/test/CodeGen/AArch64/neon/intrinsics.c
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
A llvm/test/Bitcode/aarch64-neon-minmax-upgrade.ll
M llvm/test/CodeGen/AArch64/abd-combine.ll
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
Log Message:
-----------
[LLVM][AArch64] Remove intrinsics `llvm.aarch64.neon.{s,u}{min,max}` (#225339)
Commit: ade7081e0c7f1a9024256c65e26531da0354a7f1
https://github.com/llvm/llvm-project/commit/ade7081e0c7f1a9024256c65e26531da0354a7f1
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/AutoConvert.h
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/Unix/Path.inc
Log Message:
-----------
[SystemZ][z/OS] Fix compile errors cused by sys::fs::file_t (#225539)
Follow-up to #224859: some calls/prototypes are guarded on z/OS, and
also need to be updated. This change fixes various compile errors.
Commit: 104f644ddbd3891bcc5955164672dd447110bd3c
https://github.com/llvm/llvm-project/commit/104f644ddbd3891bcc5955164672dd447110bd3c
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/unittests/Frontend/HLSLSemanticSignaturePackingTest.cpp
Log Message:
-----------
[HLSLSemanticSignatures] Implement the optimal packing of elements (#218064)
Implements the optimal packing algorithm by sorting the elements in an
optimal order before sorting with prefix packing. This also adds an
explicit packing stage for the clip/cull signature elements that allows
them to be packed with other compatible semantic types.
Resolves: #205874.
Assisted by: Claude Opus 5 and GPT-5.6 Sol
Commit: 57a637ad382b7e496a8a914cbcd3661579d18e13
https://github.com/llvm/llvm-project/commit/57a637ad382b7e496a8a914cbcd3661579d18e13
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Evaluator.cpp
A llvm/test/Transforms/GlobalOpt/constructor-explicit-section.ll
Log Message:
-----------
[GlobalOpt] Fix constructor folding on global with explicit section. (#220729)
Make sure we don't try to emit a non-zero value into BSS, or anything
similar to that.
Commit: bc9119b4259a08bbc58787303a829214f95d079c
https://github.com/llvm/llvm-project/commit/bc9119b4259a08bbc58787303a829214f95d079c
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/Runtime/CUDA/Support.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Builder/Runtime/CUDA/Support.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
A flang/test/Fir/CUDA/cuda-device-is-active.mlir
M flang/test/Fir/cuf.mlir
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-derived.cuf
M flang/test/Lower/CUDA/cuda-return01.cuf
M flang/test/Lower/CUDA/cuda-return02.cuf
Log Message:
-----------
[flang][cuda] Lower device is active as an operation (#225583)
Instead of lowering straight to a functin call, go through an op so it
can be lowered differently between device and host.
Commit: 76d164c48a5076c160285765df23749b9bab1ebc
https://github.com/llvm/llvm-project/commit/76d164c48a5076c160285765df23749b9bab1ebc
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/new-null.cpp
Log Message:
-----------
[CIR] Fix the order of temporary object cleanup (#225560)
We had a problem in CIR where we were performing cleanups in the wrong
order when conditional and unconditional cleanups were needed for
temporary objects created in a single expression. The unconditional
cleanups were being emitted as they occur, while the conditional
cleanups were deferred until the entire expression had been emitted. The
result was that conditional cleanups were performed after unconditional
cleanups, even if the unconditionally destroyed object was created
first.
This change fixes that problem by reorganizing the way conditional
cleanups are handled. A cir.cleanup.scope operation is now created
eagerly where a conditional begins rather than at the start of the full
expression, so that it nests inside the cleanup scopes of temporaries
created before the conditional and outside those created after it. Scope
nesting determines the order in which the cleanup regions run, so this
yields reverse-of-construction order. A ConditionalCleanupScope object
tracks the scope and the conditional cleanups waiting to be emitted into
it. If the eagerly created cleanup scope operation ends up not having
been needed, the canonicalization pass will remove it.
Assisted-by: Cursor / claude-opus-5
Commit: 7e4b8ae111298941e0c31052a7124ab36f5365b5
https://github.com/llvm/llvm-project/commit/7e4b8ae111298941e0c31052a7124ab36f5365b5
Author: Rafael Auler <rafael at rafaelauler.cc>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/DebugNames.h
M bolt/lib/Core/DebugNames.cpp
Log Message:
-----------
[BOLT] Make .debug_names emission reproducible (#225218)
--update-debug-sections does not produce the same binary twice when the
input has a .debug_names section, or is given one with
--create-debug-names-section. Three sections vary from run to run:
.debug_str, .debug_names and .debug_str_offsets. On a two-CU split-DWARF
test binary, ten runs of the same llvm-bolt produced three different
outputs.
PR #197859 made the per-bucket work merge in partition order precisely
so the output would be reproducible, but missed this section. Two
issues:
- .debug_str offsets were handed out from the workers, so main.dwo.dwo
added by the merge step lands in a different place in each run. The
string offsets stored in .debug_names follow from it, and so does
.debug_str_offsets;
- hash colliding names were ordered by insertion (worker) order, also
non-deterministic.
We now determine string positions in the non-concurrent finalize step(),
and order collisions.
Commit: 620a9e9afaae2d51f186fd0f41988e3b326a127c
https://github.com/llvm/llvm-project/commit/620a9e9afaae2d51f186fd0f41988e3b326a127c
Author: Min-Yih Hsu <min.hsu at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-gather.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-masked-scatter.ll
M llvm/test/CodeGen/RISCV/rvv/vector-interleave-fixed.ll
Log Message:
-----------
[RISCV] Combine two consecutive VSLIDEDOWN_VL nodes into one (#225232)
Given this pattern
```
%down0 = RISCVISD::VSLIDEDOWN_VL undef, %val, %offset0, %mask, %vl0
%down1 = RISCVISD::VSLIDEDOWN_VL undef, %down0, %offset1, %mask, %vl1
```
we can turn it into
```
%down1 = RISCVISD::VSLIDEDOWN_VL undef, %val, %offset2, %mask, %vl1
```
where %offset2 is `%offset0 + %offset1`, if `%vl0 >= %offset1 + %vl1`.
Commit: 77d48460414a9abc0743af84e6fc8c488b90ae55
https://github.com/llvm/llvm-project/commit/77d48460414a9abc0743af84e6fc8c488b90ae55
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/SandboxIR/Instruction.cpp
Log Message:
-----------
[SandboxIR] Add missing export to symbol used in test (#225505)
Commit: 263300bfce487bc7a115a31f59619568d9a20632
https://github.com/llvm/llvm-project/commit/263300bfce487bc7a115a31f59619568d9a20632
Author: Andre Sun <andsun9999 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
Log Message:
-----------
[clangd] Enforce SymbolKind YAML coverage with -Wswitch (#225945)
Turn the SymbolKind YAML mappings into switch cases so missing mappings
trigger -Wswitch.
Follow-up to #222070.
Commit: 1c5716860e427859ce8c838ca3883b58eeb8b28c
https://github.com/llvm/llvm-project/commit/1c5716860e427859ce8c838ca3883b58eeb8b28c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/Utils.h
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
M flang/lib/Optimizer/Builder/Runtime/Numeric.cpp
M flang/lib/Optimizer/Builder/Runtime/Reduction.cpp
M flang/lib/Optimizer/Builder/Runtime/Transformational.cpp
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
Log Message:
-----------
[flang] Remove FIRBuilder dependency from optimizer support utilities (#225836)
Fix a GCC 16 build failure where FIROps.cpp.o had undefined references
to
fir::FirOpBuilder::setCommonAttributes(mlir::Operation *) const from
FirOpBuilder::notifyOperationInserted,
RewriterBase::ForwardingListener's notifyOperationInserted, and
OpBuilder::createOrFold<fir::ConvertOp>.
FIROps.cpp includes Optimizer/Support/Utils.h, which previously included
FIRBuilder.h. That exposes the inline virtual override
FirOpBuilder::notifyOperationInserted and its call to the out-of-line
setCommonAttributes implementation. Speculative devirtualization can
turn an ordinary virtual listener call into a guarded direct call and
inline that override, introducing a reference to setCommonAttributes
without an explicit use of FirOpBuilder in FIROps.cpp. This is
consistent with the reported call sites and GCC 16's expanded
speculative devirtualization.
The implementation belongs to FIRBuilder, whereas FIRDialect does not
link FIRBuilder. Adding that link would create a dependency cycle, since
FIRBuilder already depends on FIRDialect. Remove the unnecessary header
dependency instead, so the optimizer cannot see this derived listener
implementation when compiling FIROps.cpp.
The intrinsic type diagnostic helpers only needed the builder to get an
MLIRContext, which is already available from the type. Drop their
builder parameters, use type.getContext(), and update all callers,
including the now-unused parameters in the intrinsic-name diagnostic
helpers. Remove FIRBuilder.h from Utils.h and avoid the string-literal
namespace import it provided transitively. Include FIRBuilder.h
explicitly in CodeGen.cpp, which directly uses factory helpers declared
there.
The standalone FIRBuilder build needed acc_gen generated explicitly for
an unrelated missing OpenACC parser header.
Assisted-by: Codex
Commit: b0c96fd7668d54fba2cd8f37dcc62bbcf5eb57b0
https://github.com/llvm/llvm-project/commit/b0c96fd7668d54fba2cd8f37dcc62bbcf5eb57b0
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/sdk-version.c
M clang/test/CIR/CodeGenCUDA/device-stub.cu
Log Message:
-----------
[CIR] Introduce the cir.sdk_version module attribute (#225953)
CIRGen records the platform SDK version on the module as a
`cir.sdk_version` string attribute, and LoweringPrepare's CUDA/HIP
registration reads it instead of `getTargetInfo().getSDKVersion()` to gate
`__cudaRegisterFatBinaryEnd`, dropping one more `ASTContext` dependency
from the post-CIRGen pipeline.
LLVM IR already records the same fact as the "SDK Version" module flag
(`Module::setSDKVersion/getSDKVersion`), so an attribute on the module
is proper.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 50c52f53edd2fde8d699ce17e7e35edb5e281e85
https://github.com/llvm/llvm-project/commit/50c52f53edd2fde8d699ce17e7e35edb5e281e85
Author: Amy Kwan <amy.kwan1 at ibm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
M llvm/test/CodeGen/PowerPC/O0-pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
Log Message:
-----------
[PowerPC] Restore LiveVariables run before PPCTLSDynamicCallPass (#225816)
This change is a partial revert of 7818c91f7151. Removing the explicit
LiveVariables run before PPCTLSDynamicCallPass causes a crash on ppc64le
-fPIC builds:
```
fatal error: error in backend: Use not jointly dominated by defs.
```
This change was first added in 2016 with an unresolved FIXME.
Unfortunately, the root cause still needs to be understood and
investigated, so restore this for now to fix the broken buildbots.
Commit: ad3b8bec3a8976d6fb1a3f731f01fc453fa66efc
https://github.com/llvm/llvm-project/commit/ad3b8bec3a8976d6fb1a3f731f01fc453fa66efc
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libcxx/docs/TestingLibcxx.rst
Log Message:
-----------
[libc++][docs] Fix typos in TestingLibcxx.rst (#225983)
Commit: 22108b501943f7a315f05ed16f5569ddb5d5d458
https://github.com/llvm/llvm-project/commit/22108b501943f7a315f05ed16f5569ddb5d5d458
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
R llvm/test/TableGen/AMDGPUTargetDefGenericClassification.td
M llvm/test/TableGen/AMDGPUTargetDefGenericFeatures.td
Log Message:
-----------
[AMDGPU] Use synthetic fixtures for generic feature validation tests (#225551)
Remove the classification test that includes the full AMDGPU target.
Real targets are validated when generating AMDGPUTargetParserDef.inc
during the build.
Extend the lightweight generic feature tests to cover inherited
classifications of backend-only features, support through member-side
implications, and unsupported generic-side implied features.
Addresses the timeout reported on #223179
Commit: 9058b9c58e0788fcf3e00a3543587a82b12fa62a
https://github.com/llvm/llvm-project/commit/9058b9c58e0788fcf3e00a3543587a82b12fa62a
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
A llvm/test/CodeGen/RISCV/GlobalISel/half-convert.ll
Log Message:
-----------
[RISCV][GlobalISel] Fix fptosi/fptoui from half to i64 on RV32 (#222316)
The fcvt.l[u].h patterns are RV64-only, so RV32 had no rule for
`G_FPTOSI/G_FPTOUI` with `{s64, s16}.` The magnitude of a half is at
most `65504`, so with Zfh the i32 result of `fcvt.w[u].h` never
overflows and can simply be extended to i64.
Commit: 28fec94991905d8dd8a08658e9590e13b7fe1af5
https://github.com/llvm/llvm-project/commit/28fec94991905d8dd8a08658e9590e13b7fe1af5
Author: Amir Ayupov <aaupov at fb.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/tools/llvm-profgen/AArch64/cs-bogus-trace.test
M llvm/test/tools/llvm-profgen/lit.local.cfg
M llvm/tools/llvm-profgen/PerfReader.cpp
M llvm/tools/llvm-profgen/PerfReader.h
Log Message:
-----------
[llvm-profgen] Fix bogus trace check (#225569)
Commit: 9c2e2cf0289feb7cf4ff5aafb8a46fae82bfeb2f
https://github.com/llvm/llvm-project/commit/9c2e2cf0289feb7cf4ff5aafb8a46fae82bfeb2f
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
M llvm/test/CodeGen/AArch64/code-layout-opt.ll
Log Message:
-----------
Disable AArch64CodeLayoutOpt for Windows targets. (#225974)
The pass is not compatible with Windows unwind info.
Fixes #212819
Commit: 15c447ea081640069246bb22147ed3cc4ab4e1d3
https://github.com/llvm/llvm-project/commit/15c447ea081640069246bb22147ed3cc4ab4e1d3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/global-attributes.fir
Log Message:
-----------
[flang][FIR] Make global section an inherent attribute (#225963)
Preserve the section when lowering fir.global to an LLVM global.
Assisted-by: Codex
Commit: 34d9eab9d702da1c63fd82349ec9cb10834f3ade
https://github.com/llvm/llvm-project/commit/34d9eab9d702da1c63fd82349ec9cb10834f3ade
Author: Piyou Chen <piyou.chen at sifive.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
A llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
Log Message:
-----------
[RISCV] Support getJumpTableIndex (#224197)
This patch implements getJumpTableIndex hook for RISC-V; it trace from
PseudoBRIND back to the %jump-table.N.
The li instruction in jumptable dispatch block exists because the phi
constant is emitted during instruction selection. LLVM chooses the
source block in which to place the phi constant, then postpones moving
it to MachineSink, which relocates the phi constant closer to its use
site. However, to sink it out of the jump table dispatch block,
MachineSink needs to split the critical edge, which requires updating
the jump table entry. It needs the getJumpTableIndex hook to know which
jump table to update.
This avoids unnecessary instructions in the hot path (the jump table
dispatch block).
Commit: 4802f8f42c4b079c12994961f1d81c838581b831
https://github.com/llvm/llvm-project/commit/4802f8f42c4b079c12994961f1d81c838581b831
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXqci.td
M llvm/test/MC/RISCV/xqciio-invalid.s
M llvm/test/MC/RISCV/xqciio-valid.s
Log Message:
-----------
[RISCV][MC] Allow x0 as the destination of qc.inw (#225602)
According to the Xqciio specification, `qc.inw` does not impose any
restriction that excludes `x0` as the destination register. In
`qc.inw.yaml`, `rd` is defined as:
```
- name: rd
location: 11-7
```
This commit removes the incorrect `x0` restriction for `qc.inw`.
Link:
https://github.com/qualcomm/riscv-unified-db/blob/main/arch_overlay/qc_iu/inst/Xqci/qc.inw.yaml
Commit: e8d8ea3a8689a9f669c31a4824cec11e2aa533e3
https://github.com/llvm/llvm-project/commit/e8d8ea3a8689a9f669c31a4824cec11e2aa533e3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt-internal/bedrock/sys/darwin/StandaloneMachOUnwindInfoRegistrar.h
R orc-rt/include/orc-rt/bedrock/StandaloneMachOUnwindInfoRegistrar.h
M orc-rt/lib/bedrock/CMakeLists.txt
R orc-rt/lib/bedrock/StandaloneMachOUnwindInfoRegistrar.cpp
R orc-rt/lib/bedrock/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.cpp
A orc-rt/lib/bedrock/sys/darwin/StandaloneMachOUnwindInfoRegistrar.cpp
A orc-rt/lib/bedrock/sys/darwin/sps/StandaloneMachOUnwindInfoRegistrarSPSCI.cpp
M orc-rt/test/unit/CMakeLists.txt
R orc-rt/test/unit/bedrock/StandaloneMachOUnwindInfoRegistrarTest.cpp
A orc-rt/test/unit/bedrock/sys/darwin/StandaloneMachOUnwindInfoRegistrarTest.cpp
Log Message:
-----------
[orc-rt] Make StandaloneMachOUnwindInfoRegistrar internal. (#225982)
StandaloneMachOUnwindInfoRegistrar depends on libunwind's
__unw_add_find_dynamic_unwind_sections, which is only available on
Darwin, and is only consumed within the runtime. Move its header to
orc-rt-internal/bedrock/sys/darwin/ (no longer installed), and its
sources and unit test to the corresponding sys/darwin/ directories.
The SPS CI adder header stays public, but is now installed only on Apple
platforms.
Commit: 3113e3b63d7e4f480dc30e6438f49a10faa020b0
https://github.com/llvm/llvm-project/commit/3113e3b63d7e4f480dc30e6438f49a10faa020b0
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/test/Fir/CUDA/predefined-variables.mlir
A flang/test/Fir/if-constant-condition-fold.fir
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
A flang/test/Lower/if-constant-condition.f90
Log Message:
-----------
[flang] Fold fir.if with a constant condition (#225542)
Use `populateRegionBranchOpInterfaceInliningPattern` to fold `fir.if`
when the condition is a constant. It inlines the region the condition
selects, replacing uses of the `fir.if` results with the operands of
that region's `fir.result`, and erases the `fir.result`. A false
condition with no else region leaves nothing behind.
Commit: 8e7008ab4399a55353ad8744f1f574a5c1879f30
https://github.com/llvm/llvm-project/commit/8e7008ab4399a55353ad8744f1f574a5c1879f30
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Canonicalize dot constant operands (#225083)
Move constant dot product source operands to the right hand side
and add tests for signed and unsigned dot intrinsics.
Commit: d41ee5c7c900f8c80026d8f477729b4956db7c3c
https://github.com/llvm/llvm-project/commit/d41ee5c7c900f8c80026d8f477729b4956db7c3c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
A llvm/test/Transforms/ConstraintElimination/sdiv.ll
M llvm/test/Transforms/ConstraintElimination/srem.ll
Log Message:
-----------
[ConstraintElim] Add facts for sdiv with a positive divisor. (#225535)
Add signed bounds for `sdiv x, n`:
* `x s>= 0` and `n s> 0` => result s>= 0 and result s<= x
https://alive2.llvm.org/ce/z/Tvb3Nq
* `x s> 0` and `n s> 1` => result s= 0 and result s< x
https://alive2.llvm.org/ce/z/sL-XyG
PR: https://github.com/llvm/llvm-project/pull/225535
Commit: 3b264487a537168a4439c4830692cab646012775
https://github.com/llvm/llvm-project/commit/3b264487a537168a4439c4830692cab646012775
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mknod.cpp
A libc/src/sys/stat/mknod.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mknod_test.cpp
Log Message:
-----------
[libc] Implement mknod in sys/stat (#225677)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function `mknod` in
`<sys/stat.h>`.
Fixes #225664
Commit: 5b8f372ab952fa3a83411d1d289c9a8d2e2fb3dd
https://github.com/llvm/llvm-project/commit/5b8f372ab952fa3a83411d1d289c9a8d2e2fb3dd
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-ppaireo-w.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Select PPAIREO.W when packing with the high word of a value (#225763)
The low-half packed subvector insert is a v2i32 whose low word is the
subvector and whose high word is the high word of the wide vector,
which is exactly `ppaireo.w` (the low word comes from `rs1`, the high
word from `rs2`). Select it directly instead of `srli` + `pack`.
Adds `rvp-ppaireo-w.ll`; `rvp-simd-64.ll` is updated because the scalar
low insert in `test_insert_vector_32` now selects `ppaireo.w`.
Commit: a3ac598a8782df337f477672979d4dd53dc601b0
https://github.com/llvm/llvm-project/commit/a3ac598a8782df337f477672979d4dd53dc601b0
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Builder/FIRBuilder.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
A flang/test/Fir/CUDA/cuda-data-transfer-defer-acc-routine.mlir
Log Message:
-----------
[flang][cuda] Defer data-transfer conversion in OpenACC routines (#225906)
Add an option so cuf-convert can leave cuf.data_transfer in the
host copy of an OpenACC routine until host/device specialization.
After that, transfers in a specialized device body become
assignments. Place allocas inside IsolatedFromAbove offload
regions so later FIR lowering does not store into a temporary
defined outside acc.compute_region.
Commit: cdd0cc72485131b178011dd9c53ed2148f63ed5e
https://github.com/llvm/llvm-project/commit/cdd0cc72485131b178011dd9c53ed2148f63ed5e
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
Log Message:
-----------
[Clang][RISCV] Add packed subvector insert intrinsics (#225771)
Add __riscv_pset_i8x4_i8x8, __riscv_pset_u8x4_u8x8,
__riscv_pset_i16x2_i16x4 and __riscv_pset_u16x2_u16x4, which insert a
32-bit packed subvector into a 64-bit packed vector. The index selects
the low or high half and must be a constant, enforced with
__enable_if__ as for the element insert intrinsics.
Commit: 569085f9a800b2035e9644d71af6a5b495a8d770
https://github.com/llvm/llvm-project/commit/569085f9a800b2035e9644d71af6a5b495a8d770
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-sub-acc.ll
Log Message:
-----------
[Clang][RISCV] Add packed widening subtraction accumulate intrinsics (#225764)
Add Clang header intrinsics for the RISC-V P-extension packed widening
subtraction accumulate operations:
- __riscv_pwsuba_i16x4
- __riscv_pwsuba_i32x2
- __riscv_pwsubau_u16x4
- __riscv_pwsubau_u32x2
Each computes rd + (a - b). The header wrappers use generic LLVM IR,
so RV32 selects the direct `pwsuba.*` / `pwsubau.*` instructions while
RV64 lowers the generic IR to the decomposition specified by the
P-extension intrinsic spec.
Commit: b19a36aaf4b9aaea539b903bd515b54a9f23a639
https://github.com/llvm/llvm-project/commit/b19a36aaf4b9aaea539b903bd515b54a9f23a639
Author: Matteo Di Iorio <104271382+splicer3 at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/test/Dialect/Bufferization/Transforms/buffer-loop-hoisting.mlir
Log Message:
-----------
[mlir][Affine] Prevent buffer hoisting out of affine.parallel (#225324)
I noticed that `buffer-loop-hoisting` can move allocations out of
`affine.parallel`, making a buffer that should be local to each
iteration shared between the parallel iterations.
`AffineParallelOp` implements `LoopLikeOpInterface` but was missing the
`HasParallelRegion` trait, so `isSequentialLoop` treated it as
sequential. This adds the missing trait to `affine.parallel`, allowing
the pass to recognize the parallel boundary without changing the
hoisting logic.
I’ve added a regression test based on the reproducer in #225149, which
checks that the allocation stays inside `affine.parallel` and that the
store and load still use that allocation.
Fixes #225149.
Commit: fbf3c11ccd65fee37c80c9c00c0c4ab638388fe0
https://github.com/llvm/llvm-project/commit/fbf3c11ccd65fee37c80c9c00c0c4ab638388fe0
Author: AJMullen <andreas.mullen at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M bolt/lib/Core/BinaryFunctionProfile.cpp
A bolt/test/AArch64/fix-block-count-multiple.s
A bolt/test/AArch64/fix-block-counts-indirect-branch.s
A bolt/test/AArch64/fix-block-counts-indirect-call.s
A bolt/test/RISCV/fix-block-count-multiple.s
A bolt/test/RISCV/fix-block-counts-indirect-branch.s
A bolt/test/RISCV/fix-block-counts-indirect-call.s
A bolt/test/X86/fix-block-count-multiple.s
A bolt/test/X86/fix-block-counts-indirect-branch.s
A bolt/test/X86/fix-block-counts-indirect-call.s
Log Message:
-----------
[BOLT] Include indirect calls/branches in basic block count estimation (#225104)
**Before:** When BOLT adjusts basic block counts in LBR mode it
considers outgoing branch counts when `--fix-block-counts` is enabled.
This adjustment was made according to the counts of direct calls and
branches which are recorded in the `Count` annotation made in
`DataReader::convertBranchData`. Indirect calls and branches are also
recorded within the `CallProfile` annotation, however they do not
contribute to the adjustment of basic block counts.
**After:** When making this adjustment to basic block counts, also
consider the counts of indirect calls and branches within the
`CallProfile` annotation. Do this by summing the execution counts of the
targets from this call/branch and considering them in determining the
maximum execution count of the basic block.
Assisted by: Codex. This was to write the tests for `x86` and `RISCV`
targets.
Commit: 898dc21a7e97a7a5e055428219fd23f59f6563b4
https://github.com/llvm/llvm-project/commit/898dc21a7e97a7a5e055428219fd23f59f6563b4
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/ItaniumCXXABI.cpp
A clang/test/CodeGenCXX/dllexport-rtti-visibility.cpp
Log Message:
-----------
[clang] Inconsistent attributes for `dllexport __cxxabiv1:: __fundamental_type_info` with `-fvisibility=hidden` (#215859)
Fixes #207963
The issue is `__declspec(dllexport)` and `hidden` visibility cannot be
used together. LLVM rejects `globals` that have both attributes.
For normal globals, `CodeGenModule::setGlobalVisibility` already handles
this by giving `dllexport` priority over the visibility implied by
`-fvisibility=hidden`. RTTI follows a different code path, though.
`ItaniumRTTIBuilder::BuildTypeInfo` applies the visibility and DLL
storage class separately to the generated `_ZTI*` and `_ZTS*` globals,
so the conflict was not resolved.
As a result, marking `__cxxabiv1::__fundamental_type_info` as
`dllexport` while compiling with `-fvisibility=hidden` could generate
RTTI globals with both hidden visibility and `dllexport`, causing LLVM
to fail verification with Broken module found. The same problem can
occur for `dllexport`-ed polymorphic classes when targeting Windows with
the Itanium ABI.
Resolve the conflict directly in `BuildTypeInfo`, where both attributes
are applied. When `dllexport` is present, only hidden visibility is
changed to default; protected visibility is left unchanged because
protected with `dllexport` is valid LLVM IR. Explicit
`visibility("hidden")` on a `dllexport`-ed class continues to produce
the existing diagnostic.
Commit: 11fa04d92150f871fa778460cd8bad35719b9668
https://github.com/llvm/llvm-project/commit/11fa04d92150f871fa778460cd8bad35719b9668
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGenCXX/virtual-base-cast.cpp
Log Message:
-----------
[CIR] Make sure ptr-cast-to-vbase is guarded. (#225969)
It isn't clear how we missed this, but classic codegen does checks this,
so we should too.
Claude Helped diagnose/debug, but I did the copy/pasting :D
Commit: 846ad9de67ebea162840cbcf66b605226be3f18d
https://github.com/llvm/llvm-project/commit/846ad9de67ebea162840cbcf66b605226be3f18d
Author: Akun <cubehan3 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/Tensor/canonicalize.mlir
Log Message:
-----------
[mlir] Fix canonicalizer crash when folding poison or kDynamic-sentinel index values (#223609)
Fixes two canonicalizer crashes, both in foldDynamicIndexList:
* #223333: tensor.extract_slice with a ub.poison offset/size crashes
canonicalization. ub.poison is matched as a constant but is not an
IntegerAttr, so getConstantIntValue returns nullopt and the subsequent
dereference asserts.
* #223336: a memref.subview offset/size/stride that wraps to
ShapedType::kDynamic (INT64_MIN) crashes canonicalization. Folding
INT64_MIN into the static array collides with the "dynamic" marker,
leaving dynamic-looking entries with no matching dynamic operands;
getMixedStrides() then asserts.
Only fold an operand when it is an integer constant whose value is not
ShapedType::kDynamic; poison and sentinel values stay dynamic operands.
Since foldDynamicIndexList is shared, this hardens all its callers.
Adds regression tests in mlir/test/Dialect/MemRef/canonicalize.mlir and
mlir/test/Dialect/Tensor/canonicalize.mlir.
Fixes #223333, #223336.
Commit: 593605cd2335b782cd9e02de961b326131b5add5
https://github.com/llvm/llvm-project/commit/593605cd2335b782cd9e02de961b326131b5add5
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/test/CIR/CodeGen/lifetime-marker.cpp
M clang/test/CIR/Transforms/flatten-cleanup-scope-musttail.cir
Log Message:
-----------
[CIR] Don't create EH paths for lifetime-marker-only cleanups (#224829)
### summary
fix https://github.com/llvm/llvm-project/issues/224821
A lifetime marker is not a real cleanup, so it must never be the reason
an unwind edge exists.
Assisted by : Claude Opus5
Commit: dfd1a85c6109d5a8bf9894d99e034ca178bb69f6
https://github.com/llvm/llvm-project/commit/dfd1a85c6109d5a8bf9894d99e034ca178bb69f6
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/ThinLTOBitcodeWriter.cpp
M llvm/test/Transforms/ThinLTOBitcodeWriter/comdat.ll
A llvm/test/Transforms/ThinLTOBitcodeWriter/split-internal-alias.ll
Log Message:
-----------
[CFI] Don't create alias->alias chains. (#225951)
Discovered downstream after PR #225173, when CFI and HWASAN are
combined.
See also
https://github.com/llvm/llvm-project/pull/225173#issuecomment-5802301926
If there is an alias, we should leave it alone, find its aliasee, and
create a new external linkage alias to that. Even if local linkage, the
existing alias may be referenced by name by e.g. inline assembly.
Commit: 4a7be3f275f2042e50ce80b66d7020bf84e3b09b
https://github.com/llvm/llvm-project/commit/4a7be3f275f2042e50ce80b66d7020bf84e3b09b
Author: lonely eagle <2020382038 at qq.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
A mlir/test/IR/diagnostic-handler-next.mlir
M mlir/test/lib/IR/CMakeLists.txt
A mlir/test/lib/IR/TestDiagnosticsNext.cpp
M mlir/tools/mlir-opt/mlir-opt.cpp
Log Message:
-----------
[mlir] Add support for multi-parts diagnostics (#217804)
Under the current MLIR diagnostic infrastructure, emitting multiple
remarks at the same location requires calling the remark API multiple
times; moreover, every call to remark prints a note. This PR introduces
the concepts of "parts" To diagnostics. A streaming manipulator, called
`next`, similar to `std::endl` can be used to split multiple parts into
a single `InFlightDiagnostic`. This can be used for example to emit
multiple remarks at the same location, share the notes for those
remarks.
---------
Co-authored-by: Mehdi Amini <joker.eph at gmail.com>
Commit: db175d4e22935a0b8992801d3e4be276c0a69794
https://github.com/llvm/llvm-project/commit/db175d4e22935a0b8992801d3e4be276c0a69794
Author: Akun <cubehan3 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Utils/ReshapeOpsUtils.h
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/Tensor/IR/TensorOps.cpp
M mlir/test/Dialect/Tensor/invalid.mlir
Log Message:
-----------
[mlir][Tensor] Reject empty expand_shape reassociation groups (#222648)
`tensor.expand_shape` with an empty reassociation group (e.g. `[[]]`)
used to abort the compiler: ExpandShapeOp::verify forwarded the group to
getSymbolLessAffineMaps, which asserts on missing affine expressions.
The sibling `tensor.collapse_shape` already rejects this input with a
clean diagnostic.
Extract the empty-group check into a helper shared by both tensor
reshape verifiers, invoke it from `ExpandShapeOp::verify`, and add an
invalid.mlir regression test that used to SIGABRT.
Fixes: #222602
Commit: cff0e6b5dc60cce76e85f0d9e9af537e76759315
https://github.com/llvm/llvm-project/commit/cff0e6b5dc60cce76e85f0d9e9af537e76759315
Author: Ying Huang <ying.huang at oss.cipunited.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M compiler-rt/lib/builtins/clear_cache.c
Log Message:
-----------
[Mips] Restrict rdhwr+synci to Linux on MIPS R6 (#222566)
The rdhwr instruction reads synci_step, which is not allowed by OpenBSD
and is not available for ISA older than mips{32/64}r2.
Restrict the rdhwr+synci to Linux on MIPS R6 and fall back to
_flush_cache on all other MIPS targets including OpenBSD and pre-R6
Linux.
Fix #219896.
Commit: 52d5f08f6ac5774e5e2af9b32822e23daec56b65
https://github.com/llvm/llvm-project/commit/52d5f08f6ac5774e5e2af9b32822e23daec56b65
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512vbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
A clang/test/CIR/IR/funnel-shift.cir
A clang/test/CIR/IR/invalid-funnel-shift.cir
A clang/test/CIR/Lowering/funnel-shift.cir
Log Message:
-----------
[CIR] Add cir.fshl and cir.fshr for elementwise funnel shifts (#222396)
Emit dedicated CIR ops from __builtin_elementwise_fshl/fshr instead of
cir.call_llvm_intrinsic.
Assisted-by: grok-4.6
Assisted-by: gpt-5.6-sol
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: 485f28816a3bc6025fa9fba97776f46916fc148f
https://github.com/llvm/llvm-project/commit/485f28816a3bc6025fa9fba97776f46916fc148f
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/test/Dialect/LLVMIR/canonicalize.mlir
M mlir/test/Dialect/LLVMIR/invalid.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/LLVMIR/sroa.mlir
M mlir/test/Target/LLVMIR/Import/constant.ll
M mlir/test/Target/LLVMIR/Import/global-variables.ll
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Support inrange in GEP (#220424)
LLVM IR allows inrange(Start, End) on constant GEP expressions.
Import dropped it because getAsInstruction() does not preserve it.
Model it as LLVM_ConstantRangeAttr on GEPOp, reject empty ranges,
keep it through fold/SROA, and emit ConstantExpr::getGetElementPtr.
Fixes #128031
Assisted-by: gpt-5.6-sol
Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: d01665072d203e0d39bb364919de37cb0dcb9d8e
https://github.com/llvm/llvm-project/commit/d01665072d203e0d39bb364919de37cb0dcb9d8e
Author: SiHuaN <liyongtai at iscas.ac.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Sema/SemaRISCV.cpp
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/Sema/riscv-psati-width-out-of-range.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed saturation intrinsics (#224432)
Add the Packed Saturation intrinsics `psati_i16x2`/`psati_i16x4`/
`psati_i32x2` and `pusati_u16x2`/`pusati_u16x4`/`pusati_u32x2`, their
codegen, and the Clang builtins and `riscv_packed_simd.h` wrappers.
See also
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-saturation
Commit: b30e26d9e0f0f02cdc9563878587a18a745a2cde
https://github.com/llvm/llvm-project/commit/b30e26d9e0f0f02cdc9563878587a18a745a2cde
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/dtor-comdat-key.cpp
Log Message:
-----------
[CIR] Implement comdat 'name' for dtors (#225929)
Itanium emits the complete-object ctor/dtor as an alias to the base
object version when they are able to be put into COMDAT. However, this
is not currently implemented in CIR, where we are missing the 'comdat
with a name' functionality.
This patch limits that to ONLY FuncOp, and only does the named version
(instead of referencing its own name) for these ctor/dtors. Doing this
for the comdat attribute and for GlobalOp is left to a future patch.
This showed up in the 'root' project, where the wrong dtor was called as
a result!
Note: Claude helped me with the diagnosis, and wrote the reproducer.
Commit: f9a544629742f7434ca993d675044be4cabde910
https://github.com/llvm/llvm-project/commit/f9a544629742f7434ca993d675044be4cabde910
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-float-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmin.ll
M llvm/test/CodeGen/AMDGPU/vopd-combine.mir
Log Message:
-----------
[AMDGPU] Exclude GFX11.7 from GFX11 VOPD interlock hazard fix (#225880)
Narrowed the scope of #220348 from all of GFX11. Also, this Hazard
is now defined as a feature in AMDGPU.td.
Commit: 38dcabc41cec041b91be72a4733d571c18c80c6e
https://github.com/llvm/llvm-project/commit/38dcabc41cec041b91be72a4733d571c18c80c6e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
Log Message:
-----------
[RISCV][P-Ext] Remove builtins for pmerge with signed types. (#225975)
We can use the unsigned builtins to implement the signed intrinsics.
Commit: a0e841b2d7034f3756d1c1a0c8fb5577e63fc114
https://github.com/llvm/llvm-project/commit/a0e841b2d7034f3756d1c1a0c8fb5577e63fc114
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Preprocessor/riscv-target-features.c
M llvm/docs/RISCVUsage.md
M llvm/lib/Target/RISCV/RISCVFeatures.td
M llvm/test/CodeGen/RISCV/attributes.ll
M llvm/test/MC/RISCV/attribute-arch.s
M llvm/unittests/TargetParser/RISCVISAInfoTest.cpp
Log Message:
-----------
[RISCV] Bump Zvfofp8min to 0.9 and add link to the spec. (#225848)
The version was bumped to 0.9 when it was moved to an ISA manual PR.
Commit: 262304409c301410d92b50b394aaabc85fab20f8
https://github.com/llvm/llvm-project/commit/262304409c301410d92b50b394aaabc85fab20f8
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/TargetParser/Host.cpp
Log Message:
-----------
[RISCV] Use vlenb CSR to set Zvl*b feature getHostCPUFeatures. (#225486)
Zvl*b features aren't exposed in HwProbe, probably because the vlenb CSR
exists.
Commit: af00034e5ce89ce3fba77b7153f23737662b777a
https://github.com/llvm/llvm-project/commit/af00034e5ce89ce3fba77b7153f23737662b777a
Author: Wenju He <wenju.he at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/tools/clang-sycl-linker/ClangSYCLLinker.cpp
Log Message:
-----------
[clang-sycl-linker] AOT-compile split modules concurrently (#224548)
AOT-compile all split modules in a thread pool instead of one at a time,
cutting AOT wall time when there are multiple split modules.
---------
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: 1c0ab03c1c3e2ae36434162f78709025a0e0f66e
https://github.com/llvm/llvm-project/commit/1c0ab03c1c3e2ae36434162f78709025a0e0f66e
Author: renndong <liumingliang.dev at bytedance.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
A llvm/test/CodeGen/RISCV/tail-calls-sret.ll
M llvm/test/CodeGen/RISCV/tail-calls.ll
Log Message:
-----------
[RISCV] Support tail calls for functions with sret parameters (#223999)
This PR allows RISC-V tail calls from functions with an `sret`
parameter in a conservative set of cases.
RISC-V currently rejects a tail call whenever either the caller or the
callee has an `sret` parameter. This unnecessarily prevents tail-call
optimization.
For example:
```
%struct.Buffer = type { [7 x i32] }
; Function Attrs: mustprogress noinline nounwind uwtable
define void @foo(ptr sret(%struct.Buffer) align 4 %agg.result) {
entry:
tail call void @bar(ptr %agg.result, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6)
ret void
}
```
The caller-provided return buffer is passed to `foo` in a0. The same
pointer is then passed as the bar's ordinary first argument,
which also uses a0. Before this change, RISC-V emits a normal
call with a prologue and epilogue:
```
addi sp, sp, -16
.cfi_def_cfa_offset 16
sd ra, 8(sp) # 8-byte Folded Spill
.cfi_offset ra, -8
li a1, 1
li a2, 2
li a3, 3
li a4, 4
li a5, 5
li a6, 6
call bar
ld ra, 8(sp) # 8-byte Folded Reload
.cfi_restore ra
addi sp, sp, 16
.cfi_def_cfa_offset 0
ret
```
With this change, the call can be emitted directly as:
```
li a1, 1
li a2, 2
li a3, 3
li a4, 4
li a5, 5
li a6, 6
tail bar
```
This change is conservative and only considers cases where the caller’s
sret pointer is passed to callees.
Commit: f6e450004591ba4e13d137dc63b82da6b8de1cae
https://github.com/llvm/llvm-project/commit/f6e450004591ba4e13d137dc63b82da6b8de1cae
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/include/llvm/ABI/DefaultTargetInfo.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/DefaultTargetInfo.cpp
M llvm/unittests/ABI/TargetInfoTest.cpp
Log Message:
-----------
[ABI] Add DefaultTargetInfo for default argument/return classification (#225009)
Summary:
- Introduce `DefaultTargetInfo`, the `llvm::abi` analogue of
`clang::CodeGen::DefaultABIInfo`.
- It provides self-consistent, non-ABI-specific argument/return
classification that targets without special rules can inherit and
delegate to.
Changes:
- `DefaultTargetInfo.h`: new `DefaultTargetInfo` class declaring
`classifyArgumentType`, `classifyReturnType`, and a `computeInfo`
override.
- `DefaultTargetInfo.cpp`: implement them mirroring classic
`DefaultABIInfo`.
- `TargetInfoTest.cpp`: exercise the classifiers through a minimal
`DefaultTargetInfo` subclass.
- Added `hasInt128Type()` and `getLongLongWidth()` hooks plus a
`getBitIntRegThreshold()` helper mirroring classic, and use it in both
`DefaultTargetInfo` classifiers.
Pre-requisite PRs : https://github.com/llvm/llvm-project/pull/225301
Relates to : https://github.com/llvm/llvm-project/issues/220471
Assisted by: claude opus 4.8
Commit: 60bafedef85aecc6d3dba62436a838ec3f4040a7
https://github.com/llvm/llvm-project/commit/60bafedef85aecc6d3dba62436a838ec3f4040a7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
Log Message:
-----------
[clang][bytecode] Split `InterpFrame::shrink()`/`peekData()` into slow and fast paths (#225761)
And move the fast path to the header file, so it can be more easily
inlined.
Commit: 18c1aa83bf243f0aa6b7dfe08ecdb5600c612769
https://github.com/llvm/llvm-project/commit/18c1aa83bf243f0aa6b7dfe08ecdb5600c612769
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-names.cpp
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
Log Message:
-----------
[flang][cuda] Apply implicit managed attribute to scalar pointers (#225934)
Under -gpu=mem:managed, allocatables and array pointers already get an
implicit CUDA managed attribute, but scalar data pointers can still be
EntityDetails during FinishSpecificationPart and only become objects in
ConvertToObjectEntity. That left ALLOCATE of a scalar pointer on the
host heap, so present() failed to find it.
Factor the implicit managed/pinned attribution into
ApplyImplicitCUDADataAttr and invoke it from FinishSpecificationPart,
component declarations, and ConvertToObjectEntity. Skip it when
SetCUDADataAttr is applying an explicit attribute.
Commit: 01f3fe9a021f1b6933e033da89adbedbecd9600d
https://github.com/llvm/llvm-project/commit/01f3fe9a021f1b6933e033da89adbedbecd9600d
Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/TargetID.h
M clang/lib/Basic/TargetID.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/tools/clang-linker-wrapper/ClangLinkerWrapper.cpp
Log Message:
-----------
[clang] Move normalizeForBundler to TargetID for reuse (#225049)
This PR is a prerequisite for #218337. It moves `normalizeForBundler
`from `HIPUtility.cpp` into `clang/Basic/TargetID` so the HIP toolchain,
`clang-linker-wrapper`, and `clang-repl` can share the same
offload-bundle target-name policy.
Assisted by Claude Opus 4.8
Commit: 74a53743efe6ce3feffca0503ca1ec7a53c7f5e6
https://github.com/llvm/llvm-project/commit/74a53743efe6ce3feffca0503ca1ec7a53c7f5e6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
Log Message:
-----------
[Github] Fix TODO around LLVM version in tooling container (#226015)
Now that the build job uses a newer version of podamn we can get this
fixed.
Commit: c986ee5d0b97f53ef82852597d626cfbf079d5a7
https://github.com/llvm/llvm-project/commit/c986ee5d0b97f53ef82852597d626cfbf079d5a7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
Log Message:
-----------
[ORC] Mangle PerfSupportPlugin runtime function names as C (#226010)
The llvm_orc_registerJITLoaderPerf{Start,End,Impl} names are extern "C"
functions in JITLoaderPerf.cpp, so describe them as C names rather than
Verbatim. PerfSupportPlugin is ELF-only, where C mangling adds no
prefix, so this is a no-op in practice.
Commit: 9672f460e7b2d5822e6198b8613c408e91099f5e
https://github.com/llvm/llvm-project/commit/9672f460e7b2d5822e6198b8613c408e91099f5e
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
Log Message:
-----------
[ORC] Name eh-frame alloc actions using ORC rt convention. (#226014)
Rename the eh-frame alloc actions (register, deregister) using the new
ORC runtime's conventions for alloc-action naming.
This aligns the names used in LLVM with an upcoming implementation in
the new ORC runtime.
Commit: 4c367b4ff3cf60fe5fb8e7eba02ed0b42b9e40ab
https://github.com/llvm/llvm-project/commit/4c367b4ff3cf60fe5fb8e7eba02ed0b42b9e40ab
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpHelpers.h
Log Message:
-----------
[clang][bytecode] Remove double pointer type checks in Load{,Pop} (#225802)
Make sure that `CheckLoad` only returns true if the load is actually
valid.
Commit: fbe07e2e386265a5ee77f57ade0410e96736b487
https://github.com/llvm/llvm-project/commit/fbe07e2e386265a5ee77f57ade0410e96736b487
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
[AMDGPU] Remove unneeded code from EmitInstrWithCustomInserter. NFC. (#225919)
Commit: 39398c562f7ffbb6a8303e4f1b518606bd70be9f
https://github.com/llvm/llvm-project/commit/39398c562f7ffbb6a8303e4f1b518606bd70be9f
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
Log Message:
-----------
[doc] Fix markdown bug in LangRef docs for EH model (#226025)
I'm pretty sure this was my fault.
Commit: acf81a81386f88305b346798ef36b4e276c74f82
https://github.com/llvm/llvm-project/commit/acf81a81386f88305b346798ef36b4e276c74f82
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/MC/MCAssembler.cpp
M llvm/test/MC/ELF/leb128-err.s
Log Message:
-----------
[MC] Flush pending errors when layout stops early due to relaxOnce error (#226028)
When relaxOnce returns nonzero after an error has been reported,
layout() returns without flushing the errors recorded by the last
relaxation pass, and Finish() fails `assert(PendingErrors.empty())`.
Fixes #225036
Commit: c8c8cc693ac936a0c16ec47d9bb7053fe3af592e
https://github.com/llvm/llvm-project/commit/c8c8cc693ac936a0c16ec47d9bb7053fe3af592e
Author: Wendi <uwendi at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/QualGroup.md
Log Message:
-----------
[docs] Update Qualification WG working processes (#224904)
Document the working-process decisions agreed during the [September LLVM
Qualification WG
sync-up](https://discourse.llvm.org/t/llvm-qualification-wg-sync-ups-meeting-minutes/87148/36):
- Clarify the intended use of each communication channel.
- Establish GitHub pull requests as the authoritative place for artifact
reviews and their outcomes.
- Document the review requirements for trivial and non-trivial changes.
- Clarify the use of GitHub issues for tracked actions and backlog
items.
This also converts the group-members list from a MyST `list-table`
directive to a standard Markdown table.
Commit: 089fbdd5ab2afce38747b1a79a3c963bbdb4d9da
https://github.com/llvm/llvm-project/commit/089fbdd5ab2afce38747b1a79a3c963bbdb4d9da
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M cross-project-tests/lit.cfg.py
Log Message:
-----------
[cross-project-tests] Avoid requiring packaging for GDB/LLDB version checks (#225126)
Previously, `cross-project-tests/lit.cfg.py` imported `packaging.version` to
compare GDB and LLDB version numbers and unconditionally called
`lit_config.fatal()` when the third-party `packaging` Python package was not
installed in the test environment. Try `packaging.version.parse` first, fall
back to splitting dot-separated integer components when `packaging` is not
available, and raise `ValueError` on unparseable versions so each caller can
emit a context-specific warning instead of aborting the test suite.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225126
Commit: cd417a78a709c206b7079f484aa67388b2ae4c8f
https://github.com/llvm/llvm-project/commit/cd417a78a709c206b7079f484aa67388b2ae4c8f
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinaryFunctionProfile.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/FrameAnalysis.cpp
M bolt/lib/Passes/FrameOptimizer.cpp
M bolt/lib/Passes/IdenticalCodeFolding.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Passes/ReorderAlgorithm.cpp
M bolt/lib/Passes/ReorderData.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/ShrinkWrapping.cpp
M bolt/lib/Passes/TailDuplication.cpp
M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
M bolt/lib/Rewrite/DWARFRewriter.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Transforms/IPO/Instrumentor.cpp
M polly/lib/CodeGen/LoopGenerators.cpp
M polly/lib/Support/PollyDebug.cpp
M polly/lib/Transform/MatmulOptimizer.cpp
M polly/lib/Transform/ScheduleOptimizer.cpp
Log Message:
-----------
Remove unneeded cl::Optional and cl::ZeroOrMore. NFC (#225628)
cl::Optional and cl::ZeroOrMore on a named argument have been no-op
since https://reviews.llvm.org/D120455 removed the "may only occur zero
or one times!" error.
LLM-aided
Commit: 0f6b03f1ecb134c58aaa6a79b9320b3c30f15ef8
https://github.com/llvm/llvm-project/commit/0f6b03f1ecb134c58aaa6a79b9320b3c30f15ef8
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/WebAssembly/eh-invoke-label-suppression.ll
A llvm/test/CodeGen/X86/eh-labels-unknown-personality.ll
Log Message:
-----------
CodeGen: Suppress per-invoke EH labels via an MCAsmInfo object predicate (#225903)
This is to avoid depending on TargetOptions::ExceptionModel in the
X86ISelLowering constructor. This was used to legalize EH_LABEL to a
nop. Legality rules cannot depend on program state, and the exception model
should be read from the IR module flag. In this instance the exception model
isn't really the relevant property. The specific personality and the target
object's EH table format are. Introduce a new MCAsmInfo predicate which
is a known constant for the triple. Also just do this during the initial label
emission instead of leaving it to legalization. This cleans up some unused
labels for wasm. This is also a minor behavior change for unknown
personalities; the labels will now be conservatively emitted.
I don't know all that much about exceptions, there's a lot of AI reverse
engineering of intent here. Another bruteforce approach would be to just
relocate the current condition to the selector which has access to the
exception model, but the MCAsmInfo check will be reusable in other
contexts.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: d6e9ffd58c7cacbde364b149b33ebce8dff3694c
https://github.com/llvm/llvm-project/commit/d6e9ffd58c7cacbde364b149b33ebce8dff3694c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
Log Message:
-----------
[ORC] Re-rename eh-frame alloc actions. (#226038)
Use 'Section' as the suffix rather than 'Frame' to make clear that these
actions register whole sections at a time. This aligns eh-frame
registration action names with the MachO unwind info registration action
names.
An ORC runtime commit implementing these actions will land as a
follow-up commit.
Commit: d68eb988705ce5e14ca6eba12c74ebdadf573ad7
https://github.com/llvm/llvm-project/commit/d68eb988705ce5e14ca6eba12c74ebdadf573ad7
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Metadata.h
M llvm/lib/IR/Metadata.cpp
M llvm/lib/Transforms/Utils/Local.cpp
A llvm/test/Transforms/GVN/callees-metadata.ll
A llvm/test/Transforms/SimplifyCFG/merge-callees-metadata.ll
Log Message:
-----------
[Local] Preserve !callees when merging calls (#225307)
When `SimplifyCFG` hoists or sinks two calls, `combineMetadata` drops `!callees`
even if both calls have it. Take the union of the lists when the retained
call moves, since it must allow the targets of either call. If either call
has no `!callees`, drop it from the merged call. For CSE, keep the list on
the call that stays in place.
Commit: b273b5fdc5c5360d6f1b3c6c7c22e44743d72a8e
https://github.com/llvm/llvm-project/commit/b273b5fdc5c5360d6f1b3c6c7c22e44743d72a8e
Author: Tim Misiak <tim.misiak+github at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/PDB/HashTable.md
Log Message:
-----------
[docs] Fix PDB serialized hash table on-disk format description (#225889)
Fixes #76602
Updating HashTable.md to match how the PDB hash table format is
serialized according to the microsoft-pdb repository:
https://github.com/microsoft/microsoft-pdb/blob/805655a28bd8198004be2ac27e6e0290121a5e89/PDB/include/map.h#L584
The key/value list contains Size entries rather than Capacity entries,
and the present bit vector identifies which bucket each pair belongs to.
Commit: 48a0b894efefb4f2f5dad224860c473e4d26e962
https://github.com/llvm/llvm-project/commit/48a0b894efefb4f2f5dad224860c473e4d26e962
Author: Hamza Qureshi <hamza7771.861 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[mlir][LLVMIR] Fix a crash when `llvm.mlir.constant` fails to create an LLVM constant. (#224951)
Fix the `llvm.mlir.constant` translation to handle a failed
`getLLVMConstant()` conversion. The current code can pass a null
`llvm::Value` to users of the constant, causing an assertion. Check the
result of `getLLVMConstant()` and return failure when the conversion
fails.
Fixes #224815
Commit: 162edfe631ac3ac87a9b30500a451a0fa853d164
https://github.com/llvm/llvm-project/commit/162edfe631ac3ac87a9b30500a451a0fa853d164
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/analyzer/checkers.md
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
A clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
Log Message:
-----------
[WebKit Checkers] Add alpha.webkit.UnborrowedCallArgsChecker (#225854)
Like alpha.webkit.UnborrowedLocalVarsChecker, but for function
arguments.
As in the local variable checker, we do not treat an origin that
outlives a function call as sufficient evidence of safety. We need to
prove not only that an object is live, but also that it prevents
interior destruction.
Assisted-by: Claude
Commit: 93740deeaf7e4201d6117ba51d3f7f961a9d8d56
https://github.com/llvm/llvm-project/commit/93740deeaf7e4201d6117ba51d3f7f961a9d8d56
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/Highlighter/TreeSitter/Swift/tree-sitter-swift/scanner.c
Log Message:
-----------
[lldb] Fix heap-buffer-overflow in tree-sitter-swift scanner state (#224001)
Running the `HighlighterTests` unit test under AddressSanitizer aborts
on every Swift test case, for example `SwiftComments`:
```
==69424==ERROR: AddressSanitizer: heap-buffer-overflow on address 0x602000008070 at pc 0x000116a1f36c bp 0x00016d07c3c0 sp 0x00016d07c3b8
READ of size 4 at 0x602000008070 thread T0
#0 0x000116a1f368 in eat_raw_str_part scanner.c:700
#1 0x000116a1b5f4 in tree_sitter_swift_external_scanner_scan scanner.c:858
#2 0x00012cc77420 in ts_parser_parse
#3 0x00012cc79afc in ts_parser_parse_string
#4 0x00010a3536a4 in lldb_private::TreeSitterHighlighter::Highlight(...)
0x602000008071 is located 0 bytes after 1-byte region [0x602000008070,0x602000008071)
allocated by thread T0 here:
#0 0x00012d68d560 in calloc
#1 0x00012cc763b8 in ts_parser_parse
#2 0x00012cc79afc in ts_parser_parse_string
```
`eat_raw_str_part` reads `state->ongoing_raw_str_hash_count` as its
first statement, a 4 byte field, but the scanner state was allocated
with:
```
void *tree_sitter_swift_external_scanner_create() {
return calloc(0, sizeof(struct ScannerState));
}
```
`calloc` with an element count of 0 has no obligation to reserve room
for `sizeof(struct ScannerState)`, so it works by accident, but is
found by ASAN.
Fix it by allocating one instance, matching the Rust scanner and the
struct's actual use as a single persistent state object across calls.
The existing `HighlighterTest.Swift*` tests already exercise this path
end to end and catch the regression under AddressSanitizer; no new
test is needed.
Commit: 5c1c22673ce6f981a0f399409134576caaf24f87
https://github.com/llvm/llvm-project/commit/5c1c22673ce6f981a0f399409134576caaf24f87
Author: Akun <cubehan3 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/IR/Diagnostics.cpp
Log Message:
-----------
[mlir] Match diagnostic string vector return type (#226011)
Match the local `SmallVector<std::string>` type to
`Diagnostic::strs()`'s declared return type.
Fix the build on some platform/toolchains.
Assisted by: codex
Commit: 2522dfd0dd277691c8ba4aa38b0d929150073702
https://github.com/llvm/llvm-project/commit/2522dfd0dd277691c8ba4aa38b0d929150073702
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/access.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/chdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/chmod.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/faccessat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmod.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/getcwd.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/link.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/mkdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/mkdirat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/readlink.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/readlinkat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/rename.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/rmdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/statx.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/unlink.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/unlinkat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/utimensat.h
Log Message:
-----------
[libc] Migrate filesystem syscall wrappers to syscall_checked (#225636)
Migrate a batch of related filesystem/path syscall wrappers to use
syscall_checked instead of manual syscall_impl error checking.
While in there:
- update file headers to the new style
- reformat includes into a single block so clang-format can sort them
Assisted-by: Gemini
Commit: ea198d02593a8c37f6a090910416669206d877a4
https://github.com/llvm/llvm-project/commit/ea198d02593a8c37f6a090910416669206d877a4
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/unistd.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/fdatasync.h
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/fdatasync.h
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/fdatasync.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/fdatasync_test.cpp
Log Message:
-----------
[libc] Implement fdatasync (#225613)
This patch implements the fdatasync entry point for Linux, matching the
existing fsync implementation. I'm adding it to all supported Linux
architectures (x86_64, aarch64, arm, and riscv), where it's backed by
the SYS_fdatasync syscall.
Assisted-by: Gemini
Commit: a0fe8bbd0143be1a15900faef391dc8b878f856f
https://github.com/llvm/llvm-project/commit/a0fe8bbd0143be1a15900faef391dc8b878f856f
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M openmp/docs/Building.md
M openmp/libompd/gdb-plugin/CMakeLists.txt
M openmp/libompd/gdb-plugin/README.txt
Log Message:
-----------
[OpenMP][OMPD] Set plugin RUNPATH to identify LLVM Libs (#223691)
`ompdModule` links LLVMSupport, but GDB loads it from
`share/gdb/python/ompd/ompdModule.so` while LLVM libs lives in
`lib/LLVMSupport.so` or `lib/LLVM.so`. The dynamic linker (one that
opens .so files) loosk at:
1) paths inside .so (aka RUNPATH)
2) `LD_LIBRARY_PATH`
3) or system defaults paths
After [previous
patch](https://github.com/llvm/llvm-project/pull/222455), a normal
install can fail with "cannot open shared object file" unless the user
sets `LD_LIBRARY_PATH` by hand which is easy to forget after `ninja
install`.
Fix: The approach is to make CMake write RUNPATH on `ompdModule.so`, so
the plugin follows its own directions and hence the linker (same
approach LLDB uses for its Python module). This completes the LLVM link
added in the previous patch. It does not change how `libompd.so` is
located (still `ompd_dll_locations`/`LD_LIBRARY_PATH`).
Commit: a498e642af4aded70fd48bda68b0692a58425e86
https://github.com/llvm/llvm-project/commit/a498e642af4aded70fd48bda68b0692a58425e86
Author: Pengcheng Wang <wangpengcheng.pp at bytedance.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanPatternMatch.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/RISCV/force-vect-msg.ll
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-cost.ll
Log Message:
-----------
[LV] Cost EVL width-adjusting zext/trunc as free (#225016)
With EVL tail folding, the scalar zext/trunc that adjusts the i32
ExplicitVectorLength to the canonical IV type was priced as a regular
cast (cost 1). It never lowers to an instruction, only feeding the
(free) IV increment and AVL decrement, so the phantom cost dropped
borderline loops such as TSVC s351 on RV64 to VF 1.
Here we return 0 for such casts so that we don't over-estimate the
cost.
Fixes #224987
Assisted-by: TRAE CLI (Opus 4.8)
Commit: b899756b5bf2193ab5d354a53aa7a2e746f4806c
https://github.com/llvm/llvm-project/commit/b899756b5bf2193ab5d354a53aa7a2e746f4806c
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
Log Message:
-----------
[Mips][GlobalISel] Keep split double arguments live across calls (#225879)
Mark both GPRs assigned by custom f64 argument lowering as implicit uses
of the call. Without these uses, dead machine instruction elimination
can remove the copies that pass the argument.
Check call operands after IR translation and optimized FPR-to-GPR
argument passing with FP32 and FP64 register modes.
Commit: cc5f53a2a7585b013f872b859f019d601a754307
https://github.com/llvm/llvm-project/commit/cc5f53a2a7585b013f872b859f019d601a754307
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][ODS] Reuse property storage in generated builders (NFC) (#226061)
Retrieve operation properties once in each generated builder that writes
them, then use the same reference for segment sizes, properties, and
attributes. This improved MLIR build time by avoiding repeated storage
lookup, e.g. cuts OpenMPDialect.cpp compiler instructions by 1.2%.
Assisted-by: Codex
Commit: bc83777c2e2c3d027cd12e7715a138d12921c98b
https://github.com/llvm/llvm-project/commit/bc83777c2e2c3d027cd12e7715a138d12921c98b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/OperationSupport.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][ODS] Share generated attribute property conversion (NFC) (#226057)
Move repeated attribute-backed property assignment and dictionary entry
construction into common helpers. This reduces MLIR build time by saving
optimizer work in large generated dialect translation units while
preserving diagnostics and conversion behavior.
Assisted-by: Codex
Commit: f05c3d51c42b23f1684d74c9084537ac5ea7ca36
https://github.com/llvm/llvm-project/commit/f05c3d51c42b23f1684d74c9084537ac5ea7ca36
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/tools/lldb-fuzzer/CMakeLists.txt
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/CMakeLists.txt
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/corefile.dict
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/lldb-corefile-fuzzer.cpp
Log Message:
-----------
[lldb] Add a corefile fuzzer (#225103)
Fuzzes the metadata parser when LLDB opens a corefile for Mach-O
and ELF.
The fuzzer writes input data to a tempfile and loads it through
`Process::LoadCore()`, the same way `target create --core` does.
It initializes both the macOS and Linux host platforms so the
core-load path runs regardless of which of the two OSes the fuzzer
itself is built on.
`lldb-target-fuzzer` does not reach any of this. It only calls
`SBDebugger::CreateTarget`, which builds a Target and its executable
Module; identifying that module parses the Mach-O/ELF header and
load/section commands, but never calls `Process::LoadCore`.
---------
Co-authored-by: Jonas Devlieghere <jonas at devlieghere.com>
Commit: a73d995096d23a56458c815b6934b95cd9a8bb53
https://github.com/llvm/llvm-project/commit/a73d995096d23a56458c815b6934b95cd9a8bb53
Author: Victor Campos <victor.campos at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[Clang] Add fixes to padding clearing logic to the release notes (#225340)
Commit: 022fdfa1e5a0b85dc785d30b17be3880768b22dc
https://github.com/llvm/llvm-project/commit/022fdfa1e5a0b85dc785d30b17be3880768b22dc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/move-to-valu-absdiff.mir
Log Message:
-----------
AMDGPU: Mark the carry-out of the scalar abs expansion dead (#226046)
Commit: f4eb722b0c41a8ac1a239edc8384f8577a1abed4
https://github.com/llvm/llvm-project/commit/f4eb722b0c41a8ac1a239edc8384f8577a1abed4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/WinEHPrepare.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
A llvm/test/CodeGen/WebAssembly/wineh-prepare-wasm-personality.ll
A llvm/test/CodeGen/X86/wineh-prepare-dwarf-personality.ll
Log Message:
-----------
CodeGen: Derive WinEHPrepare PHI demotion from the personality (#225676)
Previously WinEHPrepare had a catchswitch-only pass option which was
set based on the exception model in the pass config. The only special
case using it was for Wasm EH, which reuses the Windows EH instruction but
does not outline funclets so only needs the catchwitch dispatch phi handling.
Instead check the properties of the personality function inside the pass, so the
pass config is less dependent on knowing the exception model.
Also, make sure the pass is a nop for dwarf EH which appears to be untested.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f5d74f58b7b2449b4ef79145670f309607b803b8
https://github.com/llvm/llvm-project/commit/f5d74f58b7b2449b4ef79145670f309607b803b8
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
Log Message:
-----------
[AMDGPU] Remove unneeded usesCustomInserter on some opcodes. NFC. (#226055)
Commit: 4c9931d4af3c2dc86eb061057c6e2383466250ee
https://github.com/llvm/llvm-project/commit/4c9931d4af3c2dc86eb061057c6e2383466250ee
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
A llvm/test/Transforms/SjLjEHPrepare/respect-exception-model-flag.ll
Log Message:
-----------
CodeGen: Respect the exception-model module flag in SjLjEHPrepare (#225726)
Teach SjLjEHPrepare to consult the "exception-model" module flag and
only prepare when the module selects the SjLj model. When the flag is absent
the pass runs as before, implicitly relying on the pass config not running
the pass.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 7942551c1a93e7418be9c168bb0e674efbd68a29
https://github.com/llvm/llvm-project/commit/7942551c1a93e7418be9c168bb0e674efbd68a29
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A offload/libompaccsupport/AsyncInfo.cpp
M offload/libomptarget/CMakeLists.txt
M offload/libomptarget/omptarget.cpp
Log Message:
-----------
[offload][nfc] Move AsyncInfoTy's definitions to libompaccsupport (#220991)
AsyncInfoTy will be used by both OpenMP and OpenACC. Extract its
implementation from `omptarget.cpp` into `libompaccsupport` so that it
can also be compiled independently by libacctarget.
Commit: 07fbbac878025ecf8f3b25f28ec38c826e6f4891
https://github.com/llvm/llvm-project/commit/07fbbac878025ecf8f3b25f28ec38c826e6f4891
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
Log Message:
-----------
[mlir] Reduce Diagnostic storage across standard library debug modes (NFC) (#226070)
The multi-part diagnostic support added a SmallVector of part boundaries
to Diagnostic. With libstdc++'s _GLIBCXX_DEBUG enabled, the two
std::vector members also grow substantially: sizeof(Diagnostic) reaches
288 bytes. This exceeds the 256-byte limit for default
SmallVector<Diagnostic> and breaks Transform dialect builds that use
that type.
Use zero-inline SmallVectors for the owned string buffers and attached
notes. Both collections already allocated when populated, while their
empty representation no longer grows under _GLIBCXX_DEBUG. Give the
part-boundary vector zero inline elements as well: ordinary diagnostics
have a single part and never populate it. Keep the four inline argument
slots, so common diagnostic assembly retains its existing allocation
behavior. Splitting a diagnostic now allocates boundary storage.
On this 64-bit checkout, sizeof(Diagnostic) falls from 224 to 192 bytes
normally and from 288 to 192 bytes with _GLIBCXX_DEBUG.
Assisted-by: Codex
Commit: e26fb78a9767cf0a9b0995286cd393c8f6f8c017
https://github.com/llvm/llvm-project/commit/e26fb78a9767cf0a9b0995286cd393c8f6f8c017
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/test/mlir-tblgen/op-attribute.td
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-operand.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][ODS] Reuse collective builders for zero-result ops (NFC) (#226059)
Forward the no-result separate-argument builder to its collective
counterpart instead of generating the same operand, attribute, and
region construction twice. This cuts OpenMPDialect.cpp build time by
1.5% and its machine-code text by about 71 KB.
Assisted-by: Codex
Commit: 27cddfe63e88792d80b9eddf14ad4e580c9a2c7e
https://github.com/llvm/llvm-project/commit/27cddfe63e88792d80b9eddf14ad4e580c9a2c7e
Author: Anand Mistry (MSFT) <anandmistry at microsoft.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsInstrInfo.td
M llvm/test/MC/Mips/cnmips/valid.s
M llvm/test/MC/Mips/cnmipsp/valid.s
M llvm/test/MC/Mips/mips32r2/valid.s
M llvm/test/MC/Mips/mips32r3/valid.s
M llvm/test/MC/Mips/mips32r5/valid.s
M llvm/test/MC/Mips/mips32r6/valid.s
M llvm/test/MC/Mips/mips64r2/valid.s
M llvm/test/MC/Mips/mips64r3/valid.s
M llvm/test/MC/Mips/mips64r5/valid.s
M llvm/test/MC/Mips/mips64r6/valid.s
Log Message:
-----------
[Mips] Add sync instruction aliases (#225866)
These aliases are documented in the MIPS ISA Reference Manual. These
also exist in binutils and are declared to be part of the MIPS32R2 ISA.
Commit: 84afb5ad1ffd52e62889b3a86d9754b1e15f6ba6
https://github.com/llvm/llvm-project/commit/84afb5ad1ffd52e62889b3a86d9754b1e15f6ba6
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/CodeGen/CodeGenOpenMP.cpp
M flang/lib/Optimizer/Dialect/CUF/CUFOps.cpp
M flang/lib/Optimizer/Dialect/FIROps.cpp
M flang/lib/Optimizer/HLFIR/Transforms/ConvertToFIR.cpp
M flang/lib/Optimizer/Transforms/ConstantArgumentGlobalisation.cpp
M flang/lib/Optimizer/Transforms/FIRToSCF.cpp
M flang/test/Fir/CUDA/cuda-alloc-free.fir
M flang/test/Fir/CUDA/cuda-allocate.fir
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-data-transfer.fir
M flang/test/Fir/CUDA/cuda-device-global-internal-linkage.fir
M flang/test/Fir/CUDA/cuda-device-global.f90
M flang/test/Fir/CUDA/cuda-heap-alloc-managed.fir
M flang/test/Fir/CUDA/cuda-heap-alloc-unified.fir
M flang/test/Fir/CUDA/cuda-launch.fir
M flang/test/Fir/CUDA/cuda-shared-offset.mlir
M flang/test/Fir/FirToSCF/if.fir
M flang/test/Fir/FirToSCF/iter-while.fir
M flang/test/Fir/MIF/change_team2.mlir
M flang/test/Fir/OpenACC/recipe-bufferization.mlir
M flang/test/Fir/OpenACC/use-device-canonicalizer.mlir
M flang/test/Fir/abstract-results.fir
M flang/test/Fir/allocation-policy-pipeline.fir
M flang/test/Fir/array-coor-canonicalization.fir
M flang/test/Fir/convert-to-llvm-access-group.fir
M flang/test/Fir/do_concurrent.fir
M flang/test/Fir/fir-ops.fir
M flang/test/Fir/global-attributes.fir
M flang/test/Fir/memory-allocation-opt-2.fir
M flang/test/Fir/memory-allocation-opt-do-concurrent.fir
M flang/test/Fir/memory-allocation-opt.fir
M flang/test/Fir/simd-nontemporal.fir
M flang/test/HLFIR/as_expr-codegen.fir
M flang/test/HLFIR/associate-codegen.fir
M flang/test/HLFIR/bufferize-poly-expr.fir
M flang/test/HLFIR/bufferize-workshare.fir
M flang/test/HLFIR/bufferize01.fir
M flang/test/HLFIR/char_extremum-bufferization.fir
M flang/test/HLFIR/cmpchar-lowering.fir
M flang/test/HLFIR/concat-bufferization.fir
M flang/test/HLFIR/element-codegen-issue-118922.fir
M flang/test/HLFIR/elemental-codegen-nested.fir
M flang/test/HLFIR/elemental-codegen.fir
M flang/test/HLFIR/elemental-shallow-copy.fir
M flang/test/HLFIR/elemental-with-empty-check-codegen.fir
M flang/test/HLFIR/eval_in_mem-codegen.fir
M flang/test/HLFIR/expression-simplification.fir
M flang/test/HLFIR/index-lowering.fir
M flang/test/HLFIR/inline-hlfir-assign-pointer-overlap.fir
M flang/test/HLFIR/inline-hlfir-assign-scalar-index.fir
M flang/test/HLFIR/inline-hlfir-assign-self-copy-runtime-stride.fir
M flang/test/HLFIR/inline-hlfir-assign.fir
M flang/test/HLFIR/inline-hlfir-copy-stack.fir
M flang/test/HLFIR/inline-hlfir-copy.fir
M flang/test/HLFIR/opt-bufferization-eval_in_mem-with-associate.fir
M flang/test/HLFIR/opt-bufferization.fir
M flang/test/HLFIR/opt-scalar-assign.fir
M flang/test/HLFIR/order_assignments/array-temp-many-forall.f90
M flang/test/HLFIR/order_assignments/array-temp.fir
M flang/test/HLFIR/order_assignments/forall-codegen-no-conflict.fir
M flang/test/HLFIR/order_assignments/inlined-stack-temp.fir
M flang/test/HLFIR/order_assignments/saving-mask-and-rhs.fir
M flang/test/HLFIR/order_assignments/user-defined-assignment-finalization.fir
M flang/test/HLFIR/order_assignments/user-defined-assignment.fir
M flang/test/HLFIR/set_length-codegen.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-cmpchar-scalar.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-eoshift.fir
M flang/test/HLFIR/simplify-hlfir-intrinsics-index.fir
M flang/test/HLFIR/trim.fir
M flang/test/HLFIR/volatile.fir
M flang/test/HLFIR/volatile1.fir
M flang/test/HLFIR/volatile2.fir
M flang/test/HLFIR/volatile3.fir
M flang/test/HLFIR/volatile4.fir
M flang/test/Integration/allocatable-polymorphic.f90
M flang/test/Integration/dense-array-any-rank.f90
M flang/test/Lower/CUDA/cuda-allocatable.cuf
M flang/test/Lower/CUDA/cuda-cooperative.cuf
M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
M flang/test/Lower/CUDA/cuda-doconc.cuf
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M flang/test/Lower/CUDA/cuda-gpu-unified.cuf
M flang/test/Lower/CUDA/cuda-kernel-alloca-block.cuf
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-module-use.cuf
M flang/test/Lower/CUDA/cuda-pointer-sync.cuf
M flang/test/Lower/CUDA/cuda-program-global.cuf
M flang/test/Lower/HLFIR/actual_target_for_dummy_pointer.f90
M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/allocatable-return.f90
M flang/test/Lower/HLFIR/array-ctor-as-elemental-nested.f90
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
M flang/test/Lower/HLFIR/array-ctor-character.f90
M flang/test/Lower/HLFIR/array-ctor-derived.f90
M flang/test/Lower/HLFIR/array-ctor-index.f90
M flang/test/Lower/HLFIR/bindc-entry-stmt.f90
M flang/test/Lower/HLFIR/calls-array-results.f90
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/charconvert.f90
M flang/test/Lower/HLFIR/convert-mbox-to-value.f90
M flang/test/Lower/HLFIR/convert-variable-block.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
M flang/test/Lower/HLFIR/custom-intrinsic.f90
M flang/test/Lower/HLFIR/dummy-scope.f90
M flang/test/Lower/HLFIR/elemental-array-ops.f90
M flang/test/Lower/HLFIR/elemental-call-vector-subscripts.f90
M flang/test/Lower/HLFIR/elemental-result-length.f90
M flang/test/Lower/HLFIR/elemental-user-procedure-ref-polymorphic.f90
M flang/test/Lower/HLFIR/entry_return.f90
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/HLFIR/ignore-rank-unlimited-polymorphic.f90
M flang/test/Lower/HLFIR/index.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/HLFIR/matmul.f90
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
M flang/test/Lower/HLFIR/null.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-nopass.f90
M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/HLFIR/procedure-designators.f90
M flang/test/Lower/HLFIR/procedure-pointer-component-structure-constructor.f90
M flang/test/Lower/HLFIR/procedure-pointer-in-generics.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/HLFIR/product.f90
M flang/test/Lower/HLFIR/select-type-selector.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/HLFIR/sum.f90
M flang/test/Lower/HLFIR/tdesc-character-comp-init.f90
M flang/test/Lower/HLFIR/transpose.f90
M flang/test/Lower/HLFIR/trim.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
M flang/test/Lower/HLFIR/vector-subscript-as-value.f90
M flang/test/Lower/HLFIR/visible-cray-pointer-target.f90
M flang/test/Lower/HLFIR/where.f90
M flang/test/Lower/Intrinsics/associated-proc-pointers.f90
M flang/test/Lower/Intrinsics/associated.f90
M flang/test/Lower/Intrinsics/bessel_yn.f90
M flang/test/Lower/Intrinsics/btest.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_devptr_eq_ne.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/chdir.f90
M flang/test/Lower/Intrinsics/free.f90
M flang/test/Lower/Intrinsics/get_command.f90
M flang/test/Lower/Intrinsics/getcwd-function.f90
M flang/test/Lower/Intrinsics/getpid.f90
M flang/test/Lower/Intrinsics/hostnm-func.f90
M flang/test/Lower/Intrinsics/ibset.f90
M flang/test/Lower/Intrinsics/ichar.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_compare.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
M flang/test/Lower/Intrinsics/ieee_real.f90
M flang/test/Lower/Intrinsics/ieee_rem.f90
M flang/test/Lower/Intrinsics/ieee_rint_int.f90
M flang/test/Lower/Intrinsics/ieee_rounding.f90
M flang/test/Lower/Intrinsics/ieee_signbit.f90
M flang/test/Lower/Intrinsics/ieee_unordered.f90
M flang/test/Lower/Intrinsics/ierrno.f90
M flang/test/Lower/Intrinsics/malloc.f90
M flang/test/Lower/Intrinsics/min.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/test/Lower/Intrinsics/not.f90
M flang/test/Lower/Intrinsics/perror.f90
M flang/test/Lower/Intrinsics/putenv-func.f90
M flang/test/Lower/Intrinsics/rand.f90
M flang/test/Lower/Intrinsics/real.f90
M flang/test/Lower/Intrinsics/reduce.f90
M flang/test/Lower/Intrinsics/rename.f90
M flang/test/Lower/Intrinsics/selected_char_kind.f90
M flang/test/Lower/Intrinsics/selected_logical_kind.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/system_clock.f90
M flang/test/Lower/Intrinsics/time.f90
M flang/test/Lower/Intrinsics/unlink-func.f90
M flang/test/Lower/Intrinsics/verify.f90
M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-hlfir.f90
M flang/test/Lower/OpenACC/acc-atomic-update.f90
M flang/test/Lower/OpenACC/acc-atomic-write.f90
M flang/test/Lower/OpenACC/acc-bounds.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping.f90
M flang/test/Lower/OpenACC/acc-data-operands.f90
M flang/test/Lower/OpenACC/acc-data.f90
M flang/test/Lower/OpenACC/acc-declare-common-present-in-function.f90
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/OpenACC/acc-declare-use-associated.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenACC/acc-enter-data.f90
M flang/test/Lower/OpenACC/acc-exit-data.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-allocatable-component.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
M flang/test/Lower/OpenACC/acc-host-data.f90
M flang/test/Lower/OpenACC/acc-kernels-loop.f90
M flang/test/Lower/OpenACC/acc-kernels.f90
M flang/test/Lower/OpenACC/acc-loop.f90
M flang/test/Lower/OpenACC/acc-parallel-loop.f90
M flang/test/Lower/OpenACC/acc-parallel.f90
M flang/test/Lower/OpenACC/acc-private.f90
M flang/test/Lower/OpenACC/acc-reduction.f90
M flang/test/Lower/OpenACC/acc-serial-loop.f90
M flang/test/Lower/OpenACC/acc-serial.f90
M flang/test/Lower/OpenACC/acc-set.f90
M flang/test/Lower/OpenACC/acc-update.f90
M flang/test/Lower/OpenACC/acc-use-device.f90
M flang/test/Lower/OpenACC/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-adjustable-array.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map-2.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-simple.f90
M flang/test/Lower/OpenMP/allocatable-array-bounds.f90
M flang/test/Lower/OpenMP/array-bounds.f90
M flang/test/Lower/OpenMP/atomic-capture.f90
M flang/test/Lower/OpenMP/atomic-compare.f90
M flang/test/Lower/OpenMP/atomic-implicit-cast.f90
M flang/test/Lower/OpenMP/atomic-read.f90
M flang/test/Lower/OpenMP/atomic-update.f90
M flang/test/Lower/OpenMP/atomic-write.f90
M flang/test/Lower/OpenMP/block-use-predetermined-privatization.f90
M flang/test/Lower/OpenMP/block_implicit_privatization.f90
M flang/test/Lower/OpenMP/block_predetermined_privatization.f90
M flang/test/Lower/OpenMP/cancel.f90
M flang/test/Lower/OpenMP/cancellationpoint.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
M flang/test/Lower/OpenMP/common-block-map.f90
M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/critical.f90
M flang/test/Lower/OpenMP/declare-target-data.f90
M flang/test/Lower/OpenMP/declare_target_module.f90
M flang/test/Lower/OpenMP/default-clause-byref.f90
M flang/test/Lower/OpenMP/default-clause.f90
M flang/test/Lower/OpenMP/delayed-privatization-private-firstprivate.f90
M flang/test/Lower/OpenMP/delayed-privatization-private.f90
M flang/test/Lower/OpenMP/derived-type-map.f90
M flang/test/Lower/OpenMP/fuse01.f90
M flang/test/Lower/OpenMP/fuse02.f90
M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
M flang/test/Lower/OpenMP/implicit-dsa.f90
M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-nested-parallel.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-teams.f90
M flang/test/Lower/OpenMP/lastprivate-iv.f90
M flang/test/Lower/OpenMP/linear_modifier.f90
M flang/test/Lower/OpenMP/local-intrinsic-sized-array-map.f90
M flang/test/Lower/OpenMP/map-component-ref.f90
M flang/test/Lower/OpenMP/masked_taskloop.f90
M flang/test/Lower/OpenMP/metadirective-loop.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate-align.f90
M flang/test/Lower/OpenMP/omp-declarative-allocate.f90
M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
M flang/test/Lower/OpenMP/omp-declare-target-program-var.f90
M flang/test/Lower/OpenMP/optional-argument-map-2.f90
M flang/test/Lower/OpenMP/parallel-masked-taskloop.f90
M flang/test/Lower/OpenMP/parallel-private-clause-fixes.f90
M flang/test/Lower/OpenMP/parallel-private-clause-str.f90
M flang/test/Lower/OpenMP/parallel-private-clause.f90
M flang/test/Lower/OpenMP/parallel-reduction-add-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-add.f90
M flang/test/Lower/OpenMP/parallel-reduction-allocatable-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex-mul.f90
M flang/test/Lower/OpenMP/parallel-reduction-complex.f90
M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-rename.f90
M flang/test/Lower/OpenMP/parallel-reduction.f90
M flang/test/Lower/OpenMP/parallel-reduction3.f90
M flang/test/Lower/OpenMP/private-derived-type.f90
M flang/test/Lower/OpenMP/reduction-array-intrinsic.f90
M flang/test/Lower/OpenMP/reduction-equivalence.f90
M flang/test/Lower/OpenMP/sections-predetermined-private.f90
M flang/test/Lower/OpenMP/sections.f90
M flang/test/Lower/OpenMP/shared-loop.f90
M flang/test/Lower/OpenMP/simd-linear.f90
M flang/test/Lower/OpenMP/simd.f90
M flang/test/Lower/OpenMP/single.f90
M flang/test/Lower/OpenMP/stop-stmt-in-region.f90
M flang/test/Lower/OpenMP/target-teams-private.f90
M flang/test/Lower/OpenMP/target.f90
M flang/test/Lower/OpenMP/task-affinity.f90
M flang/test/Lower/OpenMP/task-depend-structure-component.f90
M flang/test/Lower/OpenMP/task.f90
M flang/test/Lower/OpenMP/taskgroup-task_reduction01.f90
M flang/test/Lower/OpenMP/taskloop-cancel.f90
M flang/test/Lower/OpenMP/taskloop-collapse.f90
M flang/test/Lower/OpenMP/taskloop-grainsize.f90
M flang/test/Lower/OpenMP/taskloop-inreduction.f90
M flang/test/Lower/OpenMP/taskloop-numtasks.f90
M flang/test/Lower/OpenMP/taskloop-reduction.f90
M flang/test/Lower/OpenMP/taskloop.f90
M flang/test/Lower/OpenMP/threadprivate-char-array-chararray.f90
M flang/test/Lower/OpenMP/threadprivate-common-block-pointer.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock-use.f90
M flang/test/Lower/OpenMP/threadprivate-commonblock.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-2.f90
M flang/test/Lower/OpenMP/threadprivate-host-association-3.f90
M flang/test/Lower/OpenMP/threadprivate-use-association.f90
M flang/test/Lower/OpenMP/tile01.f90
M flang/test/Lower/OpenMP/tile02.f90
M flang/test/Lower/OpenMP/unroll-heuristic01.f90
M flang/test/Lower/OpenMP/unroll-heuristic02.f90
M flang/test/Lower/OpenMP/unroll-heuristic03.f90
M flang/test/Lower/OpenMP/unroll-partial01.f90
M flang/test/Lower/OpenMP/unstructured.f90
M flang/test/Lower/OpenMP/wsloop-chunks.f90
M flang/test/Lower/OpenMP/wsloop-collapse.f90
M flang/test/Lower/OpenMP/wsloop-linear.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-add.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable-array-minmax.f90
M flang/test/Lower/OpenMP/wsloop-reduction-allocatable.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array-assumed-shape.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array.f90
M flang/test/Lower/OpenMP/wsloop-reduction-array2.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-iand.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ieor.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-ior.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-and.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-eqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-neqv.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-logical-or.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-max.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-min.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul-byref.f90
M flang/test/Lower/OpenMP/wsloop-reduction-mul.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multi.f90
M flang/test/Lower/OpenMP/wsloop-reduction-multiple-clauses.f90
M flang/test/Lower/OpenMP/wsloop-reduction-pointer.f90
M flang/test/Lower/OpenMP/wsloop-variable.f90
M flang/test/Lower/achar.f90
M flang/test/Lower/allocatable-assignment.f90
M flang/test/Lower/allocatable-caller.f90
M flang/test/Lower/allocatable-return.f90
M flang/test/Lower/allocatable-runtime.f90
M flang/test/Lower/allocatables.f90
M flang/test/Lower/allocate-mold.f90
M flang/test/Lower/allocate-source-allocatables.f90
M flang/test/Lower/allocate-source-pointers.f90
M flang/test/Lower/alternate-return.f90
M flang/test/Lower/always-execute-loop-body.f90
M flang/test/Lower/arithmetic-goto.f90
M flang/test/Lower/array-character.f90
M flang/test/Lower/array-constructor-1.f90
M flang/test/Lower/array-constructor-2.f90
M flang/test/Lower/array-elemental-calls-char-dynamic.f90
M flang/test/Lower/array-elemental-calls-char.f90
M flang/test/Lower/array.f90
M flang/test/Lower/assignment.f90
M flang/test/Lower/associate-construct.f90
M flang/test/Lower/assumed-shape-caller.f90
M flang/test/Lower/assumed-type.f90
M flang/test/Lower/basic-call.f90
M flang/test/Lower/block.f90
M flang/test/Lower/bug172157-3.f90
M flang/test/Lower/c-interoperability-c-pointer.f90
M flang/test/Lower/c-interoperability.f90
M flang/test/Lower/call-implicit.f90
M flang/test/Lower/call.f90
M flang/test/Lower/character-elemental.f90
M flang/test/Lower/character-local-variables.f90
M flang/test/Lower/common-block-2.f90
M flang/test/Lower/common-block-char0.f90
M flang/test/Lower/common-block-multiple-init.f90
M flang/test/Lower/complex-real.f90
M flang/test/Lower/computed-goto.f90
M flang/test/Lower/constant-literal-mangling.f90
M flang/test/Lower/constant-logical-transfer.f90
M flang/test/Lower/convert.f90
M flang/test/Lower/cray-pointer.f90
M flang/test/Lower/declare-with-storage.f90
M flang/test/Lower/default-initialization-globals.f90
M flang/test/Lower/default-initialization.f90
M flang/test/Lower/dense-attributed-array.f90
M flang/test/Lower/derived-type-descriptor.f90
M flang/test/Lower/derived-type-finalization.f90
M flang/test/Lower/derived-type-temp.f90
M flang/test/Lower/do_concurrent.f90
M flang/test/Lower/do_concurrent_delayed_locality.f90
M flang/test/Lower/do_concurrent_reduce.f90
M flang/test/Lower/do_loop.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/dummy-argument-optional-2.f90
M flang/test/Lower/dummy-procedure-character.f90
M flang/test/Lower/dummy-procedure.f90
M flang/test/Lower/entry-statement.f90
M flang/test/Lower/equivalence-1.f90
M flang/test/Lower/equivalence-2.f90
M flang/test/Lower/equivalence-static-init.f90
M flang/test/Lower/explicit-interface-results.f90
M flang/test/Lower/extrn_subp.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-where-2.f90
M flang/test/Lower/global-alignment.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/host_module_variable_instantiation_use_device.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/inlinealways-directive.f90
M flang/test/Lower/intentout-deallocate.f90
M flang/test/Lower/io-derived-type.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-statement-1.f90
M flang/test/Lower/io-statement-3.f90
M flang/test/Lower/io-statement-clean-ups.f90
M flang/test/Lower/io-write.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
M flang/test/Lower/module_definition.f90
M flang/test/Lower/module_use.f90
M flang/test/Lower/namelist-common-block.f90
M flang/test/Lower/namelist.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/pointer-initial-target-2.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic-types.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/select-type-2.fir
M flang/test/Lower/select-type.f90
M flang/test/Lower/simd-directive.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/transformational-intrinsics.f90
M flang/test/Lower/typeof-classof.f90
M flang/test/Lower/unroll.f90
M flang/test/Lower/unroll_and_jam.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/variable-common-viewed-as-module-var.f90
M flang/test/Lower/variable.f90
M flang/test/Lower/vector-always.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Lower/vectorlength.f90
M flang/test/Lower/volatile-derived-type.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile1.f90
M flang/test/Lower/volatile2.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Lower/while_loop.f90
M flang/test/Lower/zero-size.f90
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M flang/test/Transforms/DoConcurrent/reduce_add.mlir
M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
M flang/test/Transforms/DoConcurrent/reduce_local.mlir
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
M flang/test/Transforms/FIRToMemRef/slice.mlir
M flang/test/Transforms/OpenACC/acc-implicit-declare-module-parameter.fir
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-alloca.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-embox.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-rebox.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-type_desc.F90
M flang/test/Transforms/OpenMP/lower-workdistribute-fission-host.mlir
M flang/test/Transforms/OpenMP/lower-workdistribute-fission-target.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/do-concurrent-localizer-dealloc-region.fir
M flang/test/Transforms/do-concurrent-localizer-init-region.fir
M flang/test/Transforms/licm.fir
M flang/test/Transforms/loop-versioning.fir
M flang/test/Transforms/lower-repack-arrays.fir
M flang/test/Transforms/simplifyintrinsics.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
M flang/test/Transforms/stack-arrays.fir
M flang/test/Transforms/tbaa-cray-pointer.fir
M flang/test/Transforms/tbaa-derived-type-records.fir
M flang/test/Transforms/tbaa-derived-with-descriptor.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-value-dummy-arg.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
Log Message:
-----------
[flang] Stop using Operation::getAttrs (NFC) (#223049)
Migrate FIR attribute copying and printing to the explicit inherent and
discardable attribute APIs.
Also upgrade the textual assembly to stop mixing inherent and
discardable attributes in the same dictionary.
This is part of a general migration to use the "new" properties-based
APIs and stop mixing discardable/inherent attributes, see #155475
Assisted-by: Codex
Commit: 6cf36fd5bc4bb3782dbfedc00d4506a3cff1719f
https://github.com/llvm/llvm-project/commit/6cf36fd5bc4bb3782dbfedc00d4506a3cff1719f
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libcxx/docs/Status/Cxx17Issues.csv
Log Message:
-----------
[libc++][docs] Mark LWG2727 Complete in LLVM 24 (#225606)
In 9853cb54d9d2684b27f0d0db89c00c2da7e31b88 and
672843a3f2ee2aaaed0463ec9064b6ccea2a5d4d, we implemented parallel
versions of `std::min_element`, `std::max_element`, and
`std::minmax_element` without adding incorrect `constexpr`. This
essentially implemented the resolution of LWG2727.
Commit: 65d651bc8fd6d83ae4989d93dc89cb287231afd2
https://github.com/llvm/llvm-project/commit/65d651bc8fd6d83ae4989d93dc89cb287231afd2
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/GlobalISel/combine-readlane-redundant-and.mir
A llvm/test/CodeGen/AMDGPU/GlobalISel/known-bits-readlane.mir
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.readfirstlane.ll
M llvm/test/CodeGen/AMDGPU/llvm.set.rounding.ll
A llvm/test/CodeGen/AMDGPU/readlane-known-bits.ll
Log Message:
-----------
[AMDGPU] Look through readfirstlane/readlane in computeKnownBitsForTargetInstr. (#224275)
Currently, `computeKnownBitsForTargetInstr` in GISel and
`computeKnownBitsForTargetNode` in SDAG treats
`amdgcn.readfirstlane/readlane` as fully unknown, even though both just
return the data operand's value from some lane. This patch teaches it to
recurse into the data operand (operand 2) and reuse its known bits.
Thus, it unblocks known-bits combines (e.g. redundant_and) that see
these intrinsics while still generic.
Commit: 108770859571a22679b9f5e871ac6ffc311b0f4e
https://github.com/llvm/llvm-project/commit/108770859571a22679b9f5e871ac6ffc311b0f4e
Author: CHANDRA GHALE <chandra.nitdgp at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Semantics/resolve-directives.cpp
M flang/test/Semantics/OpenMP/defaultmap-clause-none.f90
Log Message:
-----------
[flang][OpenMP] Fix crash in defaultmap(none) on structure constructors (#220994)
Fixes :
[https://github.com/llvm/llvm-project/issues/218929](https://github.com/llvm/llvm-project/issues/218929)
Flang was crashing when a target defaultmap(none:...) region contained a
structure constructor, like this:
```
program p
type t
end type
type(t) :: x
!$omp target defaultmap(none:aggregate)
x = t()
!$omp end target
end
```
The problem is in `IsOpenMPAggregate` and `IsOpenMPScalar`. When the
OpenMP attribute visitor walks the names in the region, it hits the t in
t(), which resolves to the derived-type definition symbol rather than a
variable. `Symbol::GetType() `returns nullptr for such a symbol, and
both helpers dereferenced that pointer directly `(type->category())`
without checking, causing a segfault. The fix adds a null check to both
helpers returning false since a symbol with no declared type belongs to
no defaultmap category.
Co-authored-by: Chandra Ghale <ghale at pe34genoa.hpc.amslabs.hpecorp.net>
Commit: 43a0a957553dd2cb5258e5d814675a8b54f5099c
https://github.com/llvm/llvm-project/commit/43a0a957553dd2cb5258e5d814675a8b54f5099c
Author: Heejin Ahn <aheejin at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
M llvm/test/CodeGen/WebAssembly/cfg-stackify-eh-legacy.mir
M llvm/test/CodeGen/WebAssembly/exception-legacy.mir
Log Message:
-----------
[WebAssembly] Remove per-invoke EH_LABEL handling (#226053)
Per-invoke `EH_LABEL`s are no longer emitted after #225903. This removes
code that handles per-invoke `EH-LABEL`s and removes them from mir
tests.
Commit: 303cf70bb64bebbe4549b52a59e3dbe1d4d5979a
https://github.com/llvm/llvm-project/commit/303cf70bb64bebbe4549b52a59e3dbe1d4d5979a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/test/Transforms/SLPVectorizer/RISCV/revec.ll
Log Message:
-----------
[TargetFolder] Use getGetElementPtr() overload accepting DataLayout (#226068)
To directly construct the constant GEP in canonical ptradd form.
The test change is because this ends up canonicalizing the vector
GEP case as well, rather than just the scalar cases.
Commit: c12a0d255928c9376a6e1a6df36d4338b6cfedf8
https://github.com/llvm/llvm-project/commit/c12a0d255928c9376a6e1a6df36d4338b6cfedf8
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/IR/OperationSupport.cpp
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir][ODS] Share optional operand and type parser logic (NFC) (#226066)
Move repeated optional operand and type parsing into out-of-line
helpers.
Generated parsers now reuse those helpers across operations.
This improves MLIR build time by avoid redundant compilation of these
helpers.
Assisted-by: Codex
Commit: c949a973db32c7bc80bed6a38057912fea41ddc3
https://github.com/llvm/llvm-project/commit/c949a973db32c7bc80bed6a38057912fea41ddc3
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
Log Message:
-----------
[mlir] Fold operation trait lookup without a temporary array (NFC) (#226081)
Compare trait IDs directly in the generated pack expansion. This avoids
building and scanning a local array in every operation trait lookup.
Assisted-by: Codex
Commit: ba5c0a651eea7949da3bd6cfd8c7cd61ba2ff1ce
https://github.com/llvm/llvm-project/commit/ba5c0a651eea7949da3bd6cfd8c7cd61ba2ff1ce
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
Log Message:
-----------
[mlir] Store OperationState property callbacks as function pointers (NFC) (#226083)
The property callbacks never capture state. Store their function
pointers directly instead of wrapping them in function_ref. This improve
slightly MLIR build time and generates slightly smaller binaries.
Assisted-by: Codex
Commit: a60626ab1223f82fca15c66041bee3a6adae193a
https://github.com/llvm/llvm-project/commit/a60626ab1223f82fca15c66041bee3a6adae193a
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Integration/debug-common-block-1.f90
M flang/test/Integration/debug-include-file.f90
Log Message:
-----------
[flang][debug] Emit debug for a COMMON block from an INCLUDE'd file (#225867)
This handles the case of a common block that was missed in #225068 and
pointed out in
https://github.com/llvm/llvm-project/pull/225068#issuecomment-5782632548.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: c64f6cdb7c780868999f084279ef9470634f671e
https://github.com/llvm/llvm-project/commit/c64f6cdb7c780868999f084279ef9470634f671e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Support/InterfaceSupport.h
Log Message:
-----------
[mlir] Fold interface-map trait packs without recursive templates (NFC) (#226084)
Count interface traits and insert their models with fold expressions.
This keeps insertion order and avoids two recursive template chains for
every registered operation.
Assisted-by: Codex
Commit: f4c248edc7cbee9a042b8c1c3cdf07b30f3d2164
https://github.com/llvm/llvm-project/commit/f4c248edc7cbee9a042b8c1c3cdf07b30f3d2164
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/MC/MCDwarf.cpp
Log Message:
-----------
[MC] Prevent multiplication overflow when calling `encodeULEB128` (#224647)
`encodeULEB128` takes its `Value` as a 64-bit integer but the
multiplication is done using 32 bits. This fixes two issues reported by
a CodeQL scan however it's unclear how realistic an overflow is in this
case.
Commit: 63d15eed742076b33100a5051f27aece1287b104
https://github.com/llvm/llvm-project/commit/63d15eed742076b33100a5051f27aece1287b104
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[GlobalISel] Only narrow IEEE half in narrowScalarFPTOI (#223615)
narrowScalarFPTOI swaps a conversion for a narrower one plus an
extension, which is only valid if every finite value of the source fits
in the narrow type. The guard tests the width, so it also accepts
bfloat, which has float's exponent range.
Match LLT::float16() instead of LLT::scalar(16). Register types come
from LLT::floatingPoint(), which degrades to ANY_SCALAR without extended
LLTs, and an ANY_SCALAR LLT matches any scalar of the same size, so this
is unchanged on such targets. AArch64 and AMDGPU only narrow
LLT::float16() sources and WebAssembly does not narrow these at all, so
they are unaffected too.
Commit: 47d06b4bf9499135a942a85867ad2c4536676ff6
https://github.com/llvm/llvm-project/commit/47d06b4bf9499135a942a85867ad2c4536676ff6
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/test/CodeGen/AMDGPU/true16-fold.mir
Log Message:
-----------
[AMDGPU] Simplify true16 SGPR folding (#226082)
Rewrite part of the SGPR folding "hack" from #128929 using
getChannelFromSubReg to avoid relying on the exact numbering of subreg
indices.
This also fixes a potential bug when folding a copy with no subreg on
the source operand like `%1:sgpr_lo16 = COPY %0:sgpr_lo16`. The old
implementation would have generated `%0.sub0:sgpr_lo16` which fails
machine verification.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: e34e80918571ac5af5d00191bc053d7d60c1f039
https://github.com/llvm/llvm-project/commit/e34e80918571ac5af5d00191bc053d7d60c1f039
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.h
M llvm/lib/Target/Mips/MipsInstructionSelector.cpp
M llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
A llvm/test/CodeGen/Mips/GlobalISel/irtranslator/big-endian.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
A llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/big-endian-memory.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll
M llvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_store_vec.ll
Log Message:
-----------
[Mips][GlobalISel] Fix Big Endian lowering (#225972)
Flip on the big-endian switch in Mips call lowering. Fix split memory
piece placement, short-load bit extraction, and unaligned left/right
instruction offsets for big-endian targets.
Add BE/LE test coverage.
Commit: 59435d02e0d866bd0bce3a7904835bee48f43de8
https://github.com/llvm/llvm-project/commit/59435d02e0d866bd0bce3a7904835bee48f43de8
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
Log Message:
-----------
Revert "[LLDB] Simplify Makefile for TestBundleWithDotInFilename" (#226092)
Reverts llvm/llvm-project#225930
This breaks the Green Dragon bot. Reverting for now.
Commit: 2c1c2ddaca27dffb99b70dad233ca2b39520a0a7
https://github.com/llvm/llvm-project/commit/2c1c2ddaca27dffb99b70dad233ca2b39520a0a7
Author: Pedro da Rosa Pinheiro <106494823+pedropiin at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
Log Message:
-----------
[CIR][OpenMP] Implement lowering for the 'if' clause for 'parallel' d… (#204999)
Implementing the lowering of the `if` clause for the `#pragma omp
parallel` directive. The clause simply accepts the condition from
`OMPIfClause` and lowers it to an `I1` to allow for emission.
Followed the same approach as the one in my other PR #202466 and based
myself off of PR #172501 that implements the lowering for the
`proc_bind` clause.
### Evidence:
Output of: `python3 build/bin/llvm-lit -sv
clang/test/CIR/CodeGenOpenMP/parallel.c`
```
llvm-lit: /home/pedro/dev/projects/my-llvm-project/llvm/utils/lit/lit/llvm/config.py:569: note: using clang: /home/pedro/dev/projects/my-llvm-project/build/bin/clang
Testing Time: 0.10s
Total Discovered Tests: 1
Passed: 1 (100.00%)
```
Commit: b5683453d42e762a39f212a811d030f45809bb6b
https://github.com/llvm/llvm-project/commit/b5683453d42e762a39f212a811d030f45809bb6b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
A orc-rt/include/orc-rt-internal/bedrock/sys/posix/DWARFEHFrameRegistrar.h
A orc-rt/include/orc-rt/bedrock/sps/DWARFEHFrameRegistrarSPSCI.h
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sps/AllSPSCI.cpp
A orc-rt/lib/bedrock/sys/posix/DWARFEHFrameRegistrar.cpp
A orc-rt/lib/bedrock/sys/posix/sps/DWARFEHFrameRegistrarSPSCI.cpp
Log Message:
-----------
[orc-rt] Add DWARFEHFrameRegistrar for .eh_frame registration. (#226093)
Adds sys::posix::DWARFEHFrameRegistrar, which registers JIT'd .eh_frame
sections, and expose it to controllers via the
orc_rt_ci_aa_sps_DWARFEHFrameRegistrar_registerSection and
orc_rt_ci_aa_sps_DWARFEHFrameRegistrar_deregisterSection allocation
actions.
The interface is added to the controller interface on Linux only; on
Darwin, StandaloneMachOUnwindInfoRegistrar is preferred.
Commit: cbfb9a698f5c499c2f91a7bf37dd16de5a93f868
https://github.com/llvm/llvm-project/commit/cbfb9a698f5c499c2f91a7bf37dd16de5a93f868
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
M mlir/test/Dialect/XeGPU/sg-to-lane-distribute-unit.mlir
Log Message:
-----------
[MLIR][XeGPU] Optimize create_mask sg-to-lane lowering (#221198)
Commit: 39150b47fc3ecb1dcebc01bdbe6d52737d034336
https://github.com/llvm/llvm-project/commit/39150b47fc3ecb1dcebc01bdbe6d52737d034336
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpImplementation.h
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[mlir][ODS] Share parser operand storage cleanup (NFC) (#226094)
Group variable-length operand vectors in generated parsers and move
their construction and cleanup into a shared storage template. This
reduces repeated cleanup code in parsers with many optional operand
groups.
Assisted-by: Codex
Commit: c2aef227d600e8e8677697745ef953f9f43e8b87
https://github.com/llvm/llvm-project/commit/c2aef227d600e8e8677697745ef953f9f43e8b87
Author: Vimal Patel <vimal.patel at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
M llvm/test/CodeGen/AArch64/fcvt-fixed.ll
Log Message:
-----------
[AArch64][GlobalISel] Improve fixed-point int-to-fp selection (#224055)
Select scalar fixed-point integer-to-float conversions directly in
GlobalISel when their integer operand is already in the FPR bank. Teach
the fixed-point immediate matcher about reciprocal constants. Refine
register-bank selection for scalar conversion intrinsics.
Commit: c3fae693da306d9e0ef78d7353d4b197159ff60a
https://github.com/llvm/llvm-project/commit/c3fae693da306d9e0ef78d7353d4b197159ff60a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AArch64/arm64-abi_align.ll
M llvm/test/CodeGen/AArch64/arm64-ccmp-heuristics.ll
M llvm/test/CodeGen/AArch64/arm64-fastcc-tailcall.ll
M llvm/test/CodeGen/AArch64/arm64-prefetch-new.ll
M llvm/test/CodeGen/AArch64/arm64-prefetch.ll
M llvm/test/CodeGen/AArch64/instr-ref-ldv.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
M llvm/test/CodeGen/AMDGPU/lower-lds-with-alias-scope.ll
M llvm/test/CodeGen/AMDGPU/lower-lds-with-noalias.ll
M llvm/test/CodeGen/Hexagon/bugAsmHWloop.ll
M llvm/test/CodeGen/Hexagon/circ_ld.ll
M llvm/test/CodeGen/Hexagon/cmpb-eq.ll
M llvm/test/CodeGen/Hexagon/early-if-spare.ll
M llvm/test/CodeGen/Hexagon/hwloop-preh.ll
M llvm/test/CodeGen/Hexagon/insert4.ll
M llvm/test/CodeGen/Hexagon/mux-basic.ll
M llvm/test/CodeGen/Hexagon/pic-simple.ll
M llvm/test/CodeGen/Hexagon/pic-static.ll
M llvm/test/CodeGen/Hexagon/predicate-logical.ll
M llvm/test/CodeGen/Hexagon/rdf-copy.ll
M llvm/test/CodeGen/Hexagon/sdata-basic.ll
M llvm/test/CodeGen/Hexagon/store-widen.ll
M llvm/test/CodeGen/Hexagon/swp-stages4.ll
M llvm/test/CodeGen/Hexagon/swp-stages5.ll
M llvm/test/CodeGen/Hexagon/vect/vect-vshifts.ll
M llvm/test/CodeGen/PowerPC/aa-tbaa.ll
M llvm/test/CodeGen/SystemZ/alias-01.ll
M llvm/test/CodeGen/X86/merge_store_duplicated_loads.ll
M llvm/test/Transforms/GVN/opt-remarks.ll
M llvm/test/Transforms/GVN/tbaa.ll
M llvm/test/Transforms/GVNSink/sink-common-code.ll
M llvm/test/Transforms/InstCombine/store.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/lsr-memset.ll
M llvm/test/Transforms/LoopVectorize/AArch64/transform-narrow-interleave-to-widen-memory-metadata.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/MergedLoadStoreMotion/preserve-store-metadata.ll
M llvm/test/Transforms/NewGVN/tbaa.ll
M llvm/test/Transforms/RelLookupTableConverter/X86/relative_lookup_table.ll
M llvm/test/Transforms/SLPVectorizer/X86/metadata.ll
M llvm/test/Transforms/SROA/tbaa-struct2.ll
M llvm/test/Transforms/Scalarizer/basic-inseltpoison.ll
M llvm/test/Transforms/Scalarizer/basic.ll
M llvm/test/Transforms/SimplifyCFG/X86/sink-common-code.ll
M llvm/test/Transforms/SimplifyCFG/basictest.ll
M llvm/test/Transforms/VectorCombine/alias.ll
Log Message:
-----------
[llvm] Update tests to use struct path TBAA (#226051)
The new format was introduced more than a decade ago, so make sure it's
used in tests. The tests currently get away with it due to a TBAA
upgrade applied in the IR parser.
Disclosure: AI-generated change.
Commit: 373c617456bb9d8fab088858f6958bfb9d0859c3
https://github.com/llvm/llvm-project/commit/373c617456bb9d8fab088858f6958bfb9d0859c3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Instrumentation/SanitizerCoverage.cpp
Log Message:
-----------
[SanitizerCoverage] Directly create ptradd constant expression (NFC) (#226107)
Don't go through an IRBuilder without insertion point for a case
that always creates a constant expression.
Commit: 23cc19ae2dc9fa7db608fc748cbcf04c186b64f0
https://github.com/llvm/llvm-project/commit/23cc19ae2dc9fa7db608fc748cbcf04c186b64f0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Invalidate VCC live ranges when lowering kill instructions (#226040)
lowerKillInstr replaces the kill pseudo with a v_cmp defining VCC plus
two instructions reading it, but left any previously computed VCC
regunit ranges alone. If something had already materialized them, the
new uses have no live segment:
*** Bad machine code: No live segment at use ***
- instruction: $exec = S_ANDN2_B64_term $exec, $vcc, implicit-def $scc
Drop the ranges so they are recomputed on demand, as is already done for
EXEC and SCC.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: fe665796d2c1e73d5c82656840643a588767ca9b
https://github.com/llvm/llvm-project/commit/fe665796d2c1e73d5c82656840643a588767ca9b
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
M clang/test/CodeGen/AArch64/sve/dup.c
Log Message:
-----------
[clang][AArch64] Consolidate codegen tests for SVE's DUP intrinsics (#223933)
This patch completes the migration of the tests from:
* clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
to:
* clang/test/CodeGen/AArch64/sve/dup.c
`dup.c` covers all the cases previously tested by `acle_sve_dup.c`.
However, unlike `acle_sve_dup.c`, it was only tested as C. Add `-x c++`
RUN lines to provide the equivalent C++ coverage, including lowering
via CIR.
Commit: 453900c197e9bccfd9b9426338c22173d3021410
https://github.com/llvm/llvm-project/commit/453900c197e9bccfd9b9426338c22173d3021410
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/memset.ll
M llvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
M llvm/test/Transforms/SLPVectorizer/X86/fabs.ll
M llvm/test/Transforms/SLPVectorizer/X86/fcopysign.ll
M llvm/test/Transforms/SLPVectorizer/X86/fma.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmuladd.ll
Log Message:
-----------
[X86] Prepare bdver tests for TuningPrefer128Bit (#226103)
Ensure the check prefixes correctly handle XOP targets independently,
I've also reordered some of the tests so we can cleanly order the
eventual AVX128/AVX256/AVX512 checks
Help reduce the diff for #225838
Commit: f96febaf2701fc5f1979a4e0b49bdd97cae3fdb6
https://github.com/llvm/llvm-project/commit/f96febaf2701fc5f1979a4e0b49bdd97cae3fdb6
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFAddConstructor.cpp
M flang/test/Fir/CUDA/cuda-constructor-2.f90
M flang/test/Fir/CUDA/cuda-managed-descriptor-component.fir
A flang/test/Fir/CUDA/cuda-managed-pointer-linkage.cuf
Log Message:
-----------
[flang][cuda] Share the managed companion pointer across translation units (#225710)
A non-allocatable managed module variable is accessed through a
companion pointer in the `__nv_managed_data__` section, which the CUDA
runtime fills in with the unified memory address at module
initialization. Every translation unit referencing the variable emitted
its own internal pointer and registered it. The runtime populates only
the registration performed first for a given variable name (*), so every
other unit was left loading through a null pointer and crashed at run
time.
Emit a single pointer with external linkage instead. The unit defining
the variable emits the definition, zero-initialized and in
`__nv_managed_data__`, and registers it; a unit that only USEs the
variable emits a declaration and no registration, resolving to that
definition at link time.
(*) I verified this using the following reproducer:
`exp_mod.f90`:
```fortran
module m
implicit none
type :: t
integer :: n
real, allocatable, managed :: a(:)
end type
type(t) :: g
end module
```
`exp_use.f90`:
```fortran
program p
use m
allocate(g%a(4))
g%n = 4
print *, "n=", g%n, " size=", size(g%a)
end program
```
And the following sequence of events:
1. Compile each source individually to its `*.o` file.
2. Manually link the 2 object files: 2.1. If we link `exp_mod.o
exp_use.o` (object file that does actually use the global last), then we
get a seg fault because the companion global is not initialized. 2.2. If
we reverse the linking order `exp_use.o exp_mod.o`, the companion
pointer of the users object file get proper initialized and the binary
does not seg fault.
If we add uses to both files, then we get a seg fault regradless of the
linking order.
Commit: 896f344605665ad74f34521ecd11ef84c7617987
https://github.com/llvm/llvm-project/commit/896f344605665ad74f34521ecd11ef84c7617987
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/test/Transforms/InstCombine/gep-custom-dl.ll
M llvm/test/Transforms/InstCombine/gep-vector.ll
M llvm/test/Transforms/InstCombine/vectorgep-crash.ll
Log Message:
-----------
[ConstantFolding] Use getGetElementPtr() overload accepting DataLayout (#226104)
To directly create the constant GEP in canonical form. The practical
effect is that we a) canonicalize vector GEPs and b) decline to
create a GEP which can't be represented in ptradd form (in the
constant_fold_custom_dl test due to a non-canonical index type).
Commit: d098bf235dacecec02d4c2ccc0ff4bc6a00461d2
https://github.com/llvm/llvm-project/commit/d098bf235dacecec02d4c2ccc0ff4bc6a00461d2
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/stdio.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/renameat.h
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/linux/CMakeLists.txt
A libc/src/stdio/linux/renameat.cpp
A libc/src/stdio/renameat.h
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/renameat_test.cpp
Log Message:
-----------
[libc] Implement renameat in stdio (#225739)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function renameat in
<stdio.h>.
Fixes #225679
Commit: 0145ade4fb7c16780a76fb54138974892a941857
https://github.com/llvm/llvm-project/commit/0145ade4fb7c16780a76fb54138974892a941857
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.h
M clang/test/AST/ByteCode/invalid.cpp
Log Message:
-----------
[clang][bytecode] Diagnose array-to-pointer-decays on unsized opaque pointers (#226027)
Commit: 5b6bfedc496ded375231a5afebe5d0f27821b7f2
https://github.com/llvm/llvm-project/commit/5b6bfedc496ded375231a5afebe5d0f27821b7f2
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/gh154704.cpp
Log Message:
-----------
[Clang][OpenMP] Use the list item location as point of instantiation in mapper lookup (#225604)
Fixes #154704
When a variable is implicitly mapped on `#pragma omp target`, Clang
looks for a user-defined mapper for its type through ADL, and ADL may
have to instantiate class template specializations named by the type's
template arguments (for `std::map<int, int>` that's its allocator).
Implicit map clauses carry no source location by design, and the
"default" mapper id was stamped with that empty location, so the
instantiation was recorded with an invalid point of instantiation and
`setPointOfInstantiation` asserted.
`buildUserDefinedMapperRef` now takes the location of the mapped list
item and uses it for the ADL and the derived-class checks, which is what
the other default-mapper lookups in `SemaOpenMP.cpp` already did.
Diagnostics about the mapper id and the mapper reference itself keep the
mapper-id location, so explicit `mapper(id)` behavior is unchanged. The
instantiation is now attributed to the mapped variable inside the
region, which is also where the "in instantiation requested here" note
points.
Commit: 3be1abd559ad2084a0b5ee082656bc590697d44d
https://github.com/llvm/llvm-project/commit/3be1abd559ad2084a0b5ee082656bc590697d44d
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXAndes.td
A llvm/test/MC/RISCV/xandesvsinth-invalid.s
M llvm/test/MC/RISCV/xandesvsinth-valid.s
Log Message:
-----------
[RISCV] Require Zve32f for XAndesVSIntH FP conversions (#226001)
`XAndesVSIntH` currently implies only `Zve32x`. This commit requires
vector floating-point support for its four integer-to-FP conversion
instructions.
Commit: 4aa4a6d9e82dcef3e6a1c9ae249a144e60384f52
https://github.com/llvm/llvm-project/commit/4aa4a6d9e82dcef3e6a1c9ae249a144e60384f52
Author: Hans Wennborg <hans at hanshq.net>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/test/DebugInfo/PDB/pdbdump-raw-bytes.test
M llvm/test/tools/llvm-pdbutil/explain-pdb-stream.test
Log Message:
-----------
[PDB] Correctly read/write the named stream map's niMac value (#225729)
The serialization of a PDB stream's named stream map ends with an
integer value, NMTNI::niMac in the microsoft-pdb code.
Since 05d5e6136f5a3f5de28ae64077200bbdc2cacfb4, LLVM was writing this
out as an undocumented zero between the named streams map and feature
codes, and reading it as an unknown/ignored feature code.
The actual value doesn't seem particularly important, but it's better to
read/write these explicitly, and it should not be read as a feature
code.
This fixes one of the issues in
https://github.com/llvm/llvm-project/issues/206120
Commit: 3306ae1c98d695d7d111bd8037380c7d09e818b6
https://github.com/llvm/llvm-project/commit/3306ae1c98d695d7d111bd8037380c7d09e818b6
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
Log Message:
-----------
[WasmEHPrepare] Don't use IRBuilder for constexpr GEP (#226108)
Do not use an IRBuilder without an insertion point to create
a constant expression get. Directly create the constant expression
instead.
Commit: ec221fb9375f6a66d73a1588c7b7386c8d9519cf
https://github.com/llvm/llvm-project/commit/ec221fb9375f6a66d73a1588c7b7386c8d9519cf
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
R llvm/test/CodeGen/Generic/sjlj-eh-prepare.ll
A llvm/test/Transforms/SjLjEHPrepare/sjlj-eh-prepare.ll
Log Message:
-----------
CodeGen: Move Generic sjlj test to Transforms (#226112)
Test the IR-only SjLjEHPrepare pass in the dedicated pass test
directory. Also add the module flag so it is really triple
independent.
Commit: 9c16b67820883dc90851278471f1d1a386ab0a2b
https://github.com/llvm/llvm-project/commit/9c16b67820883dc90851278471f1d1a386ab0a2b
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/COFFVCRuntimeSupport.cpp
Log Message:
-----------
[ORC] Describe COFFPlatform symbol names by mangling kind (#226097)
Replace Verbatim with the accurate SymbolNameKind for the names that
COFFPlatform and COFFVCRuntimeBootstrapper look up: C for the ORC
runtime's extern "C" __orc_rt_coff_* entry points, the C runtime's
__scrt_* functions, and __run_after_c_init; Linker for the MSVC
C++-decorated ?__scrt_initialize_type_info@@YAXXZ, which is already a
linker-level name.
Commit: 12f5b245fa09c91317bf74e5e207a2a7da661407
https://github.com/llvm/llvm-project/commit/12f5b245fa09c91317bf74e5e207a2a7da661407
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineNegator.cpp
Log Message:
-----------
[InstCombine] Directly add negated instructions to the worklist (#226118)
This code was doing something really confusing: Resetting the
insertion point and debug location and then inserting the
instructions -- which should be a no-op. It turns out that the
purpose of this code is to invoke the InstCombine IRBuilder
insertion callback, which will add these instructions to the
worklist.
Instead of going through these contortions, directly add the
new instructions to the worklist.
Commit: 42dcd3f72eb95200beb3b518f436b88479e6fac6
https://github.com/llvm/llvm-project/commit/42dcd3f72eb95200beb3b518f436b88479e6fac6
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Log Message:
-----------
[MISched] Make `getUnderlyingObjectsForInstr()` preserve unidentified objects (#225085)
Commit: ceee3c39e1be9692557a22aedc7b87ae88ef5811
https://github.com/llvm/llvm-project/commit/ceee3c39e1be9692557a22aedc7b87ae88ef5811
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M polly/lib/Analysis/ScopInfo.cpp
A polly/test/ScopInfo/multidim-shrunk-element-type.ll
Log Message:
-----------
[Polly] Restate array sizes and subscripts when the element type shrinks (#221496)
Polly uses the smallest type to an array with element type of its
ScopArrayInfo. So a byte-wise access, such as a memset, can make the
element type smaller after the sizes of the array dimensions have
already been stored. Those sizes were not updated when the element type
changed: a row of a two-dimensional array of double kept the size. Every
access to the array then looks like it goes past the end of its row, the
inbounds assumption becomes impossible to satisfy, and the SCoP is
dropped without any message. Finally, this patch multiplies the size of
the innermost dimension.
Assisted-by: Claude (Anthropic)
Commit: c4048fb6de5097256045212f9f80c5f0ab41deed
https://github.com/llvm/llvm-project/commit/c4048fb6de5097256045212f9f80c5f0ab41deed
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/fptosi-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptosi.ll
M llvm/test/Transforms/SLPVectorizer/X86/fptoui.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp-inseltpoison.ll
M llvm/test/Transforms/SLPVectorizer/X86/sitofp.ll
M llvm/test/Transforms/SLPVectorizer/X86/uitofp.ll
Log Message:
-----------
[X86] Prepare bdver fp<->int tests for TuningPrefer128Bit (#226121)
Ensure the check prefixes can handle bdver targets independently, I've
also reordered some of the tests so we can cleanly order the eventual
AVX128/AVX256/AVX512 checks
Help reduce the diff for #225838
Commit: b912c9c767056ca7a7bbbf41925d45dbb3dac1b3
https://github.com/llvm/llvm-project/commit/b912c9c767056ca7a7bbbf41925d45dbb3dac1b3
Author: Alexander Hück <ahuck at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SOPInstructions.td
Log Message:
-----------
[AMDGPU] Mark CDBG branches as having side effects (#226123)
The change marks all four CDBG branch variants as having unmodeled side
effects, consistent with reading externally controlled debug state.
Commit: ad71e8769e21715555f0e8fb0094f3d2d00557dd
https://github.com/llvm/llvm-project/commit/ad71e8769e21715555f0e8fb0094f3d2d00557dd
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/test/CodeGenCXX/mangle-class-nttp.cpp
Log Message:
-----------
[clang][bytecode] Don't add an LValuePath to APValues with invalid bases (#226096)
If the APValue is created for an opaque pointer, check first if the base
is valid. If not, we're not supposed to provide an LValuePath at all.
Commit: a8705c33dda2bb831ee6d6e0500b2d20bb902d0c
https://github.com/llvm/llvm-project/commit/a8705c33dda2bb831ee6d6e0500b2d20bb902d0c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M orc-rt/test/unit/support/ErrorExceptionInteropTest.cpp
Log Message:
-----------
[orc-rt] Fix unused variable warning in unit test. (#226139)
Fix a clang warning about RTTIName being unused in
ORC_RT_ENABLE_EXCEPTIONS=Off builds.
Commit: ea9f4c16ec59a210753b6e5dd23e6b0ee0a8542c
https://github.com/llvm/llvm-project/commit/ea9f4c16ec59a210753b6e5dd23e6b0ee0a8542c
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/unittests/IR/InstructionsTest.cpp
Log Message:
-----------
[InstructionsTest] Avoid IRBuilder without insertion point (NFC) (#226145)
Directly create the instruction instead of going through an IRBuilder
without insertion point.
Commit: c6ee71d5e8a5d53a24539dcd2a098e02e4e38a05
https://github.com/llvm/llvm-project/commit/c6ee71d5e8a5d53a24539dcd2a098e02e4e38a05
Author: Alexandros Lamprineas <alexandros.lamprineas at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M bolt/include/bolt/Core/BinaryContext.h
M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Rewrite/RewriteInstance.cpp
A bolt/test/AArch64/relax-branches-with-thunk-chain.s
A bolt/test/AArch64/relax-call-long-thunk-reuse.s
A bolt/test/AArch64/relax-call-short-thunk-reuse.s
A bolt/test/AArch64/relax-calls.s
A bolt/test/AArch64/relax-cross-fragment-calls.s
R bolt/test/AArch64/relax-exp.s
Log Message:
-----------
[BOLT][AArch64] Relax calls and branches with fragment clusters (#215825)
Build relaxation clusters from emitted function fragments instead
of whole functions, so split hot/cold code is modeled in the order
it will be emitted. Use those clusters to place short and long call
thunks, and to build forward/backward thunk chains for in-layout
inter-cluster branches.
Rely on relaxLocalBranches() to lower short local branches to local
stubs first, then relax the remaining direct 28-bit edges. Warn and
leave out-of-layout unconditional branches unrelaxed; route
out-of-layout calls through long thunks.
This lets the experimental AArch64 relaxation path handle large
split binaries where direct call/branch relocations can cross the
+/-128 MiB range after BOLT changes the layout. By default, it
does not assume PLT entries are near emitted code.
Tested with stage2-clang-bolt and Chromium using Speedometer
profile data, with lite mode disabled and no assumptions about
PLT proximity.
Assisted-by: Codex
Commit: 0d7414aec9d65f40e79334fb3adce570aa217f14
https://github.com/llvm/llvm-project/commit/0d7414aec9d65f40e79334fb3adce570aa217f14
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/LowerIFunc/ifunc-alias.ll
M llvm/test/Transforms/LowerIFunc/ifunc-nonsense-resolvers.ll
M llvm/test/Transforms/LowerIFunc/ifunc-program-addrspace.ll
M llvm/test/Transforms/LowerIFunc/lower-ifunc.ll
Log Message:
-----------
[LowerIFunc] Regenerate test checks (NFC) (#226151)
Commit: ece0035d0e771f1f23c8f630c8eccd7bdb0932f0
https://github.com/llvm/llvm-project/commit/ece0035d0e771f1f23c8f630c8eccd7bdb0932f0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/ARM/extracted-subfields-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP][NFC]Add extra tests for missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226159
Commit: 2ac696e23ca31d68a89060c7a935c75bc4efb846
https://github.com/llvm/llvm-project/commit/2ac696e23ca31d68a89060c7a935c75bc4efb846
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
Log Message:
-----------
[clang][bytecode] Try to avoid a `SmallVector` in `Pointer::toAPValue()` (#226143)
Only create the local variable if we really need it.
Commit: 34f5f2c594111e6a3edf65673c3ea2849e96e2cb
https://github.com/llvm/llvm-project/commit/34f5f2c594111e6a3edf65673c3ea2849e96e2cb
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAArch64.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Headers/arm_acle.h
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaChecking.cpp
A clang/test/CodeGen/AArch64/atomic-store-hint-template.cpp
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/builtins-arm64.c
M clang/test/Sema/builtins-arm64.c
A llvm/include/llvm/Support/AArch64MemoryHints.h
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
A llvm/test/CodeGen/AArch64/Atomics/aarch64-atomic-store-hint.ll
A llvm/test/CodeGen/AArch64/Atomics/aarch64-relaxed-store-hint.ll
A llvm/test/CodeGen/AArch64/Atomics/atomic-store-pseudo.mir
Log Message:
-----------
[AArch64] Implement the atomic store with hint intrinsic (#198316)
Adds the following ACLE intrinsic as described in [1]:
void __arm_atomic_store_with_hint(type *ptr, type data,
int memory_order, int hint);
An atomic store instruction is emitted in Clang for this builtin with additional
metadata attached with !mem.cache_hint, which ensures the instruction is
recognised as atomic by later passes in LLVM. When an atomic store is found
with this metadata, it is lowered to the ATOMIC_STORE_HINT pseudo which is
later expanded into an STSHH instruction plus an atomic store.
The hint is a suggestion to the compiler and maps directly to a specific hint
instruction variant in the ISA. The compiler may use this hint when selecting
code sequences, but it is not required to emit a specific hint instruction or a
specific instruction sequence.
Supported atomic store hints are currently:
HINT_STSHH_KEEP: Requests retention of the updated location in the
local cache of the updating PE.
HINT_STSHH_STRM: Requests that the updated location not be retained
in the local cache of the updating PE.
[1] https://github.com/ARM-software/acle/pull/432
Commit: 314348fbfbef2cd628f05e4974811de4fa1b0d39
https://github.com/llvm/llvm-project/commit/314348fbfbef2cd628f05e4974811de4fa1b0d39
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
Log Message:
-----------
[LowerIFunc] Regenerate test checks (NFC) (#226151)
Commit: 053331c2c9f47fb0795c19f33c128ab82205b4cd
https://github.com/llvm/llvm-project/commit/053331c2c9f47fb0795c19f33c128ab82205b4cd
Author: jon-gibney <jonathon.gibney at hpe.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/CodeGen/CGPasses.td
M flang/include/flang/Optimizer/CodeGen/CodeGen.h
M flang/lib/Optimizer/CodeGen/CodeGen.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
R flang/test/Fir/convert-to-llvm-unsafe-fp-conversion.fir
Log Message:
-----------
Revert "[flang] Respect math flags during conversions (#214311)" (#225887)
This reverts commit 688119653fd40fa46244e1c300e728677a4f001a.
This caused a regression in Fujitsu test 0291/0291_0008.f with
`-ffast-math -march=native -03`. That test does a conversion that always
overflows, so without saturating math it produces poison, which causes
it to treat the rest of the routine as unreachable, resulting in a crash
on x86. I'll have to try another approach.
Commit: 520b1687095eaf9dd410fb48ab622205e9fec044
https://github.com/llvm/llvm-project/commit/520b1687095eaf9dd410fb48ab622205e9fec044
Author: Konstantin Bogdanov <thevar1able at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/test/Analysis/ValueTracking/phi-known-nonzero.ll
Log Message:
-----------
[ValueTracking] An or recurrence with a non-zero start value is non-zero (#226155)
Or-ing anything into a non-zero value keeps it non-zero, so
`isNonZeroRecurrence` can accept a simple `%iv = or %iv, %step`
recurrence with a non-zero constant start value, regardless of the step.
The first commit precommits the tests in `phi-known-nonzero.ll`.
This is split out of #222334. Together with a follow-up that stops
limiting the recursion depth for single-incoming (LCSSA) phis in
`isKnownNonZero`, it lets LoopIdiomRecognize (#222373) form `llvm.ctlz`
for the clz loop in ffmpeg's `sbc_calc_scalefactors`.
Commit: 12a8c418b4df10ae6241e26e9e114935656f197f
https://github.com/llvm/llvm-project/commit/12a8c418b4df10ae6241e26e9e114935656f197f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
Log Message:
-----------
[VPlan] Simplify extract-lane from same single-scalar. (#226102)
Generalize extract-lane(idx, single-scalar) -> single-scalar to also
apply if there are multiple vectors to extract and all values are the
same single-scalar.
PR: https://github.com/llvm/llvm-project/pull/226102
Commit: ce36410607a87ee035224e2a6a819b24aa8f0bab
https://github.com/llvm/llvm-project/commit/ce36410607a87ee035224e2a6a819b24aa8f0bab
Author: Shikhar Jain <shikharj at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
M polly/lib/Analysis/ScopInfo.cpp
A polly/test/CodeGen/broken-dominance-escaping-scalar.ll
Log Message:
-----------
[Polly] Materialize escaping scalars from empty-domain statements as poison (#220008)
Problem Summary: In a versioned SCoP, Polly may remove a statement with
an empty iteration domain before building its access relations. If that
statement contains an escaping MemoryKind::Value MUST_WRITE access,
removing the
statement also prevents the corresponding ScopArrayInfo from being
registered. During code generation, Polly then fails to materialize the
escaping scalar, leaving a merge PHI that refers to a value defined only
on the original path.
This causes an LLVM verifier failure because the value does not dominate
all uses.
Fix: When removeStmtNotInDomainMap() is about to remove a statement with
a null or empty domain, register the ScopArrayInfo for its qualifying
escaping scalar accesses before allowing the statement to be removed.
The statement is still pruned normally, but code generation can now
materialize the scalar through a .s2a slot and reload it on the
optimized merge edge. Since the defining statement is absent on that
path, the reload is poison. This is sound because
the poison is used only for parameter ranges where the original program
already has undefined behavior
The new .merge PHI provides a dominating definition on the optimized
edge, which resolves the verifier failure while keeping the region
optimized.
Fixes #206551
Commit: f05ae447f56404dce7b43145676242d63e0734f4
https://github.com/llvm/llvm-project/commit/f05ae447f56404dce7b43145676242d63e0734f4
Author: Milad Fa <mfarazma at ibm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/docs/ReleaseNotes.md
Log Message:
-----------
[libclang/python] Fix visitor callback return data type (#221024)
Declare the visitor callbacks return as c_long, i.e. a full register
word rather than c_int.
This is currently causing an issue on s390x, a 64-bit big-endian target.
The V8 JavaScript engine has recently started using libclang as a
dependency
to parse header files. It is currently crashing on s390x with a SIGFPE
due to this issue.
Both the s390x ELF ABI and libffi require the value to be sign/zero
extended to register
size, and leaving it as `c_int` leaves garbage on the high side.
cindex.py calls into libclang through ctypes, which builds the callback
closures using
libffi. With a `c_int` return, ctypes writes only the low 32 bits and
skips the extension
that both the ABI and libffi's closure contract require, so libffi hands
libclang a register
whose high bits are garbage.
Using c_long makes the value fill the register at its native width on
all platforms.
Commit: 77fe47d9a004ec14bf8f5c4f647ea7cdee34c83c
https://github.com/llvm/llvm-project/commit/77fe47d9a004ec14bf8f5c4f647ea7cdee34c83c
Author: robertvirany <robertvirany at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/test/CodeGen/NVPTX/arbitrary-fp-to-float.ll
M llvm/test/CodeGen/NVPTX/machine-cse-predicate-inversion-multiple-users.ll
Log Message:
-----------
[NVPTX] Extend SETP commuting to support SELP users (#215897)
Extend NVPTX SETP commuting to support predicates used by SELP
instructions.
When commuting a SETP reverses its predicate, update each SELP user by
swapping its true and false operands. This allows MachineCSE to elimiate
redundant inverse comparisons whose predicates are used by both branches
and selects.
Add regression coverage for register and immediate SELP operands. This
also removes redundant predicates from the arbitrary floating-point
conversion tests.
Commit: c709a1a352a486ef173cc7164e0af07d5e102e48
https://github.com/llvm/llvm-project/commit/c709a1a352a486ef173cc7164e0af07d5e102e48
Author: Zibi Sarbinowski <zibi at ca.ibm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SystemZ/soft-float-05.ll
Log Message:
-----------
[SystemZ] Use complete triple s390x-linux-gnu in soft-float-05.ll (#225851)
Specify `-mtriple=s390x-linux-gnu` instead of the incomplete
`-mtriple=s390x` in `soft-float-05.ll`.
When LLVM is configured with a default target triple that has a
different OS environment (such as `s390x-ibm-zos`), bare
`-mtriple=s390x` inherits the default OS/ABI and fails the Linux SystemZ
assembly checks.
Commit: 2c1ca898c2baed18179811e088f7694b1927a816
https://github.com/llvm/llvm-project/commit/2c1ca898c2baed18179811e088f7694b1927a816
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/loop_dependence_mask.ll
M llvm/test/CodeGen/AArch64/get-active-lane-mask-extract-nosve.ll
A llvm/test/CodeGen/AArch64/neon-get-active-lane-mask.ll
Log Message:
-----------
[LLVM][CodeGen][AArch64] Implement expansion for fixed-length get.active.lane.mask. (#225459)
A step in the direction of removing the shouldExpandGetActiveLaneMask
TTI hook. For this PR I've implemented enough functionality to allow all
legalish fixed-length variants of get.active.lane.mask to bypass the
SelectionDAGBuilder based expansion for AArch64.
The AArch64TargetLowering::shouldExpandGetActiveLaneMask restrictions
are related to maintaining current code quality and not because the
expansion code cannot handle them.
Tests are a copy of active_lane_mask.ll with the scalable vector tests
removed.
Commit: 3501bbfcff7a0e87b1b90d9f67f1ad12f0feb3d7
https://github.com/llvm/llvm-project/commit/3501bbfcff7a0e87b1b90d9f67f1ad12f0feb3d7
Author: leovance <leovancekang at outlook.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVMUtils.h
M mlir/lib/Conversion/OpenACCToLLVM/ACCExecutableDirectivePatterns.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCToLLVMUtils.cpp
M mlir/test/Conversion/OpenACCToLLVM/data.mlir
M mlir/test/Conversion/OpenACCToLLVM/wait.mlir
Log Message:
-----------
[mlir][OpenACC] Preserve explicit device numbers in wait lowering (#222604)
WaitOpLowering currently ignores wait_devnum and always passes zero as
the device number to __tgt_acc_wait.
Forward the converted operand when present, adapting it to the runtime's
i32 parameter. Zero-extend narrow unsigned integers, sign-extend narrow
signed or signless integers, and truncate wider operands. Determine
signedness from the original operand type, since LLVM type conversion
makes integer types signless.
Keep the default device number unchanged when wait_devnum is absent.
Add regression coverage for explicit device numbers, integer width and
signedness conversions, index operands, and waits combining if and
async.
Commit: f36af5d17f273d6f70249a1b97bf452302e18ce6
https://github.com/llvm/llvm-project/commit/f36af5d17f273d6f70249a1b97bf452302e18ce6
Author: michaelselehov <michael.selehov at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/test/Transforms/LoadStoreVectorizer/batch-aa-compile-time.ll
Log Message:
-----------
[CaptureTracking] Raise the default use budget from 100 to 150 (#222654)
Commit: 5eb23d2ae9f1dab06a31e5f9d7d64fa23a775604
https://github.com/llvm/llvm-project/commit/5eb23d2ae9f1dab06a31e5f9d7d64fa23a775604
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/error_message.c
M clang/test/OpenMP/error_message.cpp
M clang/test/OpenMP/parallel_message_messages.cpp
Log Message:
-----------
[clang][OpenMP] Only accept char strings in the message clause (#226080)
Fixes #140338
The `message` clause accepted any character-typed string, checked with
`isAnyCharacterType()`, but everything that consumes it assumes a `char`
string: Sema evaluates it into a `std::string` for the compile-time
diagnostic, and codegen passes it straight to the `const char *`
parameter of `__kmpc_error` and `__kmpc_push_num_threads_strict`. When
the issue was filed this hit the assertion in
`StringLiteral::getString()`. Since #146405 the assert is gone, but the
underlying problem stayed: in C++ a wide literal like `message(L"bar")`
prints `b<NUL><NUL>` as the error text, and with `at(execution)` a
`wchar_t` array is emitted as the runtime's `char *` argument. C was
only spared because `wchar_t` is an integer typedef there, so the clause
was already rejected.
The clause now only accepts `char` element types, which is what the spec
requires (OpenMP 5.1 §2.5.4: msg-string is a string of `const char *`
type). Wide, `UTF-16/32` and C++20 `u8` literals get the existing
"expected string in 'clause message' - ignoring" warning and the
directive still fires with its generic message, matching what C already
did and what GCC does. Doing this at the single point where the clause
is built covers the diagnostic, both codegen paths, and template
instantiation without touching the evaluator.
Commit: 7e3927d7b4c48948cbce1fafa8faec90e8499f4b
https://github.com/llvm/llvm-project/commit/7e3927d7b4c48948cbce1fafa8faec90e8499f4b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-check-generated-files.yml
Log Message:
-----------
[Github] Downgrade libcxx generated files check to 24.04 (#226016)
It is failing to install clang-format with the updated version.
Commit: af77e07eafa8ffda52ad620ef1cdb0188745ddca
https://github.com/llvm/llvm-project/commit/af77e07eafa8ffda52ad620ef1cdb0188745ddca
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/windows/launch/replace-dll/TestReplaceDLL.py
Log Message:
-----------
[lldb][Windows] Compare real paths in TestReplaceDLL (#226177)
lldb reports a module's canonical path, which differs from the build
artifact path when the build tree is reached through a subst drive
(`S:\...` vs `C:\S\...`). Compare real paths instead.
Fixes `windows/launch/replace-dll/TestReplaceDLL.py` in swiftlang CI
where we use subst drives.
Commit: dd4b3b7f0880c5bd15cea1867f0c4b30468fdd0c
https://github.com/llvm/llvm-project/commit/dd4b3b7f0880c5bd15cea1867f0c4b30468fdd0c
Author: Gheorghe-Teodor Bercea <gt.bercea at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/complex-mul-fma.ll
Log Message:
-----------
[AMDGPU] Price only the fmul that fuses into an fadd/fsub as free (#226009)
An fadd/fsub with two fmul operands can fuse with only one of them into
an FMA. Currently they are both priced as if they are fused (i.e. free).
Commit: 645b6da50af57797b9e7ca5208d59bdd1b3dba6b
https://github.com/llvm/llvm-project/commit/645b6da50af57797b9e7ca5208d59bdd1b3dba6b
Author: ahmed mohamed kamel <amkzaher at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/test/Sema/stmtexprs.c
Log Message:
-----------
[Clang] Fix stmtexprs.c to not specify -pedantic (#226161)
Fixes a buildbot failure (llvm-clang-x86_64-sie-ubuntu-fast) where
`stmtexprs.c` didn't specify a C standard, causing `_Static_assert` and
`_Generic` to be flagged as C11 extensions on targets that default to an
older standard.
This removes `-pedantic` from the RUN line because the test does not
test any extension behavior anyway.
Follow-up to #225597.
Commit: d1106deb71cc81016406a1917d0508d2df296266
https://github.com/llvm/llvm-project/commit/d1106deb71cc81016406a1917d0508d2df296266
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/duplicate-archive-members/Makefile
M lldb/test/API/lang/objc/conflicting-definition/Makefile
M lldb/test/API/lang/objc/hidden-ivars/Makefile
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/Makefile
Log Message:
-----------
[lldb][test] Use MKDIR_P in more API test Makefiles (#226157)
Replace `mkdir -p` with `$(call MKDIR_P,...)` in a few API test
Makefiles so they work with the Windows shell.
Commit: 0c5f2fc610675233de4e95cfc173a687c61cba8c
https://github.com/llvm/llvm-project/commit/0c5f2fc610675233de4e95cfc173a687c61cba8c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/containers/github-action-ci/Dockerfile
Log Message:
-----------
[Github] Install sccache from apt repo (#226019)
Now that we are on ubuntu 26.04 we have sccache 0.13.0 which should be
new enough that everything works.
Commit: 44be0efbe3ae7593da00770f8505486011ca7057
https://github.com/llvm/llvm-project/commit/44be0efbe3ae7593da00770f8505486011ca7057
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/HTTP/HTTPClient.cpp
Log Message:
-----------
[HTTP][Windows] Apply the configured timeout to WinHttpReceiveResponse (#226172)
`WinHttpSetTimeouts` does not bound the wait inside
`WinHttpReceiveResponse`, which has its own separate
`WINHTTP_OPTION_RECEIVE_RESPONSE_TIMEOUT`.
For example: with the SymStore timeout set to 1s, a server stalling 5s
before responding is not cancelled: `perform()` returns success with a
200 and no body, so lldb handed back a path to a file the response
handler never created.
This fixes `symstore/TestSymStore.py` (test_http_timeout) in swiftlang.
Commit: 833166e22fe20c3513a77a02e34385c16128ea31
https://github.com/llvm/llvm-project/commit/833166e22fe20c3513a77a02e34385c16128ea31
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/Transforms/XeGPUSgToLaneDistribute.cpp
A mlir/test/Dialect/XeGPU/sg-to-lane-distribute-convert-layout-slice.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
Log Message:
-----------
[mlir][xegpu] Distribute three more convert_layout cases to lanes (#222693)
`xegpu-sg-to-lane-distribute` could not lower an `xegpu.convert_layout`
whose effective `lane_layout` changes in a way that moves elements
between lanes. Add one pattern per case found in the workgroup-level
mx-fp GEMM quantize-A kernels, where `#xegpu.slice` layouts of a rank-3
layout meet the rank-2 layouts of `load_nd` and `dpas_mx`:
- fully broadcast source to one row per lane: `vector.extract`
- source broadcast over two lane groups to one row per lane:
`vector.extract` plus two `gpu.shuffle`
- fully broadcast source to one column per lane group:
`vector.deinterleave` plus a select on the lane group
Commit: 1794efe8f33a965e55c1f532c88949cfcc152c1d
https://github.com/llvm/llvm-project/commit/1794efe8f33a965e55c1f532c88949cfcc152c1d
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/lib/Dialect/LLVMIR/IR/XeVMDialect.cpp
A mlir/test/Dialect/LLVMIR/xevm-canonicalize.mlir
Log Message:
-----------
[mlir][xevm] Fold xevm.truncf of an xevm.extf round trip (#225875)
A xevm.extf followed by a xevm.truncf through the same pair of formats
returns the value it started from, so the pair can be dropped. Fold it
on the truncf, the way arith::TruncFOp::fold recognizes truncf(extf(a)),
and gate it on APFloatBase::isLosslesslyConvertibleTo of the two formats
the element type attributes stand for.
That gate excludes bf8: it is IEEE-like, so extending a signaling NaN
quiets it and the original value cannot be recovered, which is the same
reason arith does not fold an f8E5M2 round trip. f8 (E4M3, NaN only) and
e2m1 (finite only) do fold.
Mark both ops Pure so the extf left without users is removed and the
pair folds to nothing.
Commit: d4367db7021b08647c0d733234e053f6f987a6b7
https://github.com/llvm/llvm-project/commit/d4367db7021b08647c0d733234e053f6f987a6b7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
Log Message:
-----------
[AMDGPUSwLowerLDS] Fix non-deterministic global ordering (#226184)
Ran into this when generated UTC checks kept changing order.
Commit: 2b9e54c6aebb44b642e1298bb9b704a7136e35dc
https://github.com/llvm/llvm-project/commit/2b9e54c6aebb44b642e1298bb9b704a7136e35dc
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/PGOProfile/indirect_call_profile.ll
Log Message:
-----------
[InstrProf][NFC] Expand indirect_call_profile.ll test (#220691)
Commit: a33352ddde6d781ba823e6e856d06eeceb15a1fa
https://github.com/llvm/llvm-project/commit/a33352ddde6d781ba823e6e856d06eeceb15a1fa
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
M llvm/unittests/Transforms/Utils/CodeExtractorTest.cpp
Log Message:
-----------
[CodeExtractor] Preserve the original DIExpression for extracted inputs. (#224360)
58430692fc15 always inserted an empty expression when cloning debug
records for outlined inputs, which dropped existing expression. Fixed by
using the existing expression instead of creating an empty one.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: d41006c17bfc36cf899f39e93f839ae8ed3db637
https://github.com/llvm/llvm-project/commit/d41006c17bfc36cf899f39e93f839ae8ed3db637
Author: Gábor Horváth <xazax.hun at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/test/Sema/LifetimeSafety/Inputs/lifetime-analysis.h
M clang/test/Sema/LifetimeSafety/annotation-suggestions.cpp
M clang/test/Sema/LifetimeSafety/capture-by.cpp
M clang/test/Sema/LifetimeSafety/cfg-bailout.cpp
M clang/test/Sema/LifetimeSafety/dangling-field.cpp
M clang/test/Sema/LifetimeSafety/dangling-global.cpp
M clang/test/Sema/LifetimeSafety/inapplicable-lifetimebound.cpp
M clang/test/Sema/LifetimeSafety/invalidations.cpp
M clang/test/Sema/LifetimeSafety/lifetime-facts.cpp
M clang/test/Sema/LifetimeSafety/lifetimebound-violation.cpp
M clang/test/Sema/LifetimeSafety/nocfg.cpp
M clang/test/Sema/LifetimeSafety/noescape-violation.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
M clang/unittests/Analysis/LifetimeSafetyTest.cpp
Log Message:
-----------
[LifetimeSafety] Revamp how accesses and uses are handled (#225799)
Previously every DeclRefExpr was a use, so naming a pointer, taking its
address
or copying it counted as reading what it points to. Writes were then
exempted
after the fact through a UseFact -> Expr map and a special case for
writes
through references.
Now a use is an access: an lvalue-to-rvalue conversion, a write through
an
assignment, increment or asm output, or a copy of a class object from a
glvalue.
It is recorded on the accessed lvalue's outer origin, the loans saying
which
storage it may name. The visitors for `*p`, `p->f` and `p[i]` already
flow the
base pointer there, so dereferences need no special handling. Reads of a
value
go through readValue(), which records the access; writes peel the outer
origin
directly. Values handed to opaque code still use every level.
Consequences:
- Copying a pointer, taking an address, `(void)p` and `p++` are not
uses.
- Writing through a dangling pointer (`*p = 1`, `p->f = 1`) is now
diagnosed.
- An access of an origin that names a declaration outright is skipped:
it
only holds a loan to that declaration, which is valid wherever it is
named.
- UseFact::IsWritten and markUseAsWrite are removed; kills on assignment
already come from the destination's OriginFlowFact or KillOriginFact.
Fewer use facts are generated, e.g. on the lifetime-safety lit tests:
safety.cpp 1886 -> 882
invalidations.cpp 616 -> 451
nocfg.cpp 544 -> 415
capture-by.cpp 395 -> 324
Assisted by: Opus 5.5
---------
Co-authored-by: Gabor Horvath <gaborh at apple.com>
Commit: d55a3fd2cec0e02d475bebba4772c1edee02aa89
https://github.com/llvm/llvm-project/commit/d55a3fd2cec0e02d475bebba4772c1edee02aa89
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/test/Transforms/LoopVectorize/AArch64/sve2-histcnt.ll
Log Message:
-----------
[VPlan] Mark histogram increment as only having its first lane used. (#226138)
The second operand (increment ) of llvm.experimental.vector.histogram.*
is a scalar. Handle it in usesFirstLaneOnly.
PR: https://github.com/llvm/llvm-project/pull/226138
Commit: 1bfac635af65eb573d373dee663492c636aa0a3d
https://github.com/llvm/llvm-project/commit/1bfac635af65eb573d373dee663492c636aa0a3d
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
Log Message:
-----------
[AMDGPUMemoryUtils] Use MapVector for FunctionVariableMap (#226198)
At least AMDGPUSwLowerLDS iterated over this map in a way that
affects IR output order. Use MapVector to make it deterministic.
Commit: 59651039cc264619f71dfad40d061df2a615eaf1
https://github.com/llvm/llvm-project/commit/59651039cc264619f71dfad40d061df2a615eaf1
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libcxx/docs/Contributing.rst
Log Message:
-----------
[libcxx] Update docs for updating the CI container image (#226018)
The process is a lot less complicated now that one can do it purely by
modifying the image hash in the workflow file.
Commit: 7669cf3e4b1c883dd5775a781669a18174300015
https://github.com/llvm/llvm-project/commit/7669cf3e4b1c883dd5775a781669a18174300015
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/llvm/unittests/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes a33352d (#226196)
This fixes a33352ddde6d781ba823e6e856d06eeceb15a1fa (#224360).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=a33352ddde6d781ba823e6e856d06eeceb15a1fa
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 4127345110ee862f01e81801fbfe8f84e4a75874
https://github.com/llvm/llvm-project/commit/4127345110ee862f01e81801fbfe8f84e4a75874
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/test/Analysis/Checkers/WebKit/mock-system-header.h
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
Log Message:
-----------
[WebKit Checkers] Do not report lambda captures in system headers (#226182)
This matches the policy in other WebKit checkers.
Some `std` namespace lambdas like `find` lack the `noescape` annotation,
so the borrow checker flags them.
Assisted-by: Claude
Commit: e5c969157449c62ac255389dfad4847b213a4773
https://github.com/llvm/llvm-project/commit/e5c969157449c62ac255389dfad4847b213a4773
Author: Felipe de Azevedo Piovezan <fpiovezan at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
Log Message:
-----------
[lldb] Fix OOB write in MultiMemRead response parsing (#226168)
Change some memory writes in ParseMultiMemReadPacket so that it no
longer asserts on OOB accesses, instead returning an error. This makes
the code correct even in release builds.
Commit: dbeaf3d1d6b1ac027a9130579c4c359aacd81e3b
https://github.com/llvm/llvm-project/commit/dbeaf3d1d6b1ac027a9130579c4c359aacd81e3b
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/InstructionSimplify.cpp
Log Message:
-----------
[InstSimplify] Add missing FRem in FMF overload (#225987)
Commit: 6bef34a7ebbef9b11654aef83c8fbc1b0dc16860
https://github.com/llvm/llvm-project/commit/6bef34a7ebbef9b11654aef83c8fbc1b0dc16860
Author: Nikita Kornev <nikita.kornev at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/tools/offload-arch/CMakeLists.txt
M clang/tools/offload-arch/LevelZeroArch.cpp
M clang/unittests/offload-arch/CMakeLists.txt
M clang/unittests/offload-arch/OffloadArchTest.cpp
A llvm/include/llvm/TargetParser/IntelGPUTargetParser.def
A llvm/include/llvm/TargetParser/IntelGPUTargetParser.h
M llvm/include/module.modulemap
M llvm/lib/TargetParser/CMakeLists.txt
A llvm/lib/TargetParser/IntelGPUTargetParser.cpp
M llvm/unittests/TargetParser/CMakeLists.txt
A llvm/unittests/TargetParser/IntelGPUTargetParserTest.cpp
Log Message:
-----------
[TargetParser] Add a list of Intel GPUs, and use it in offload-arch (#222072)
Currently offload-arch prints Intel GPU identifiers like "Intel(R) Data
Center GPU Max 1100" which are not legal values for clang's
--offload-arch option.
Print an architecture name instead, e.g. "xe-pvc". The driver reports a
GPU IP version, the GMDID, for every device. Add a table that maps a
GMDID to a name, and look the device up in it. A device that is missing
from the table is printed by its numeric version, e.g. "xe_35.11.0". A
device whose driver does not report a GMDID is skipped.
The table goes in llvm/TargetParser, next to the other GPU lists,
because other tools need it too. Some of them are LLVM libraries, which
cannot include a clang header.
Every row of IntelGPUTargetParser.def holds a name that --offload-arch
accepts, the major and minor components of the GMDID that the device
reports, and the IGCA (Intel Graphics Compute Architecture) target and
feature sets that the name maps to. The revision component is left out,
so every revision of a device gets the same name. A few names, such as
xe-dg2, cover a whole product line. No device reports a GMDID for those,
so offload-arch never prints them.
The header declares only the functions that offload-arch needs. More
will follow when something needs them.
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5f7d8a2fadec43d1e70f1ebed812eda52234623c
https://github.com/llvm/llvm-project/commit/5f7d8a2fadec43d1e70f1ebed812eda52234623c
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/poll_macros.h
M libc/include/CMakeLists.txt
M libc/include/poll.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/ppoll.h
M libc/src/poll/CMakeLists.txt
M libc/src/poll/linux/CMakeLists.txt
A libc/src/poll/linux/ppoll.cpp
A libc/src/poll/ppoll.h
M libc/test/src/poll/CMakeLists.txt
A libc/test/src/poll/ppoll_test.cpp
Log Message:
-----------
[libc] Implement ppoll in poll (#225767)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function ppoll in
<poll.h>.
Fixes #225681
Commit: 591f2e73fd4b81298d847ff0e39fe7e01985d8d6
https://github.com/llvm/llvm-project/commit/591f2e73fd4b81298d847ff0e39fe7e01985d8d6
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/select-struct.ll
Log Message:
-----------
[SCCP] Implement Structure support in Selection (#225946)
Same as my previous work on PhiNode, we support structure in SelectInst
if there is at least one member is not overdefined.
As structure type check code has multiple consumers now, we create a
helper function forEachLatticeElement, which accept a function to
indicate what we want to do for a single lattice element. The lattice
getter function is passed as a currying function of the callback.
Also, remove an assertion for testing DenseMap reference as
isInstFullyOverDefined has already emit elements in DenseMap.
Commit: a45a57c0fb284997699ab0ac1829152fa0bb24be
https://github.com/llvm/llvm-project/commit/a45a57c0fb284997699ab0ac1829152fa0bb24be
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineLowering.cpp
M mlir/test/Dialect/OpenACC/acc-routine-lowering.mlir
Log Message:
-----------
[mlir][openacc] Copy all host function attributes to the device routine (#226127)
`createFunctionForDeviceStaging` copied only the discardable attributes
of the host function, so the device copy lost sym_visibility, arg_attrs,
res_attrs and no_inline, which are inherent attributes of func.func. A
private host with llvm.signext/llvm.noundef on its signature became a
public function with a bare signature.
Fixes #225259
Commit: 32adedc8fb569f911d10df88bcbee015249dba02
https://github.com/llvm/llvm-project/commit/32adedc8fb569f911d10df88bcbee015249dba02
Author: Clayton Knittel <cknit1999 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/test/DebugInfo/CXX/limited-ctor.cpp
Log Message:
-----------
[DebugInfo] Ignore undefined constexpr constructors in constructor homing. (#221971)
This is a roll-forward of
https://github.com/llvm/llvm-project/pull/218165, which inadvertantly
caused missing debug info in
https://github.com/llvm/llvm-project/issues/221560 due to an existing
issue with standard-layout unions and layout-compatible aliasing (see
[[class.mem]](https://timsong-cpp.github.io/cppwp/n3337/class.mem#19)).
Constexpr constructors without a visible definition in the TU are not
callable in a constexpr context, which means it is not possible to
construct a type in constexpr without emitting debug info for the
constructor itself. Although undefined constexpr constructors are still
callable, they are normal out of line functions, requiring a definition
to link against.
Commit: a3710621385a3aea7cb67525f4d34681e4c93118
https://github.com/llvm/llvm-project/commit/a3710621385a3aea7cb67525f4d34681e4c93118
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/dev-mode-logging.ll
Log Message:
-----------
[MLGO] Remove copy to /tmp/test in dev-mode-logging.ll (#226199)
Commit: b290704acb41f045f2cb8b32b8e38c0a44dc0b61
https://github.com/llvm/llvm-project/commit/b290704acb41f045f2cb8b32b8e38c0a44dc0b61
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-check-generated-files.yml
Log Message:
-----------
[libc++] Trigger check-generated-files consistently with other workflows (#225912)
We want to trigger the CI workflow whenever it changes and whenever any
libc++ or libc++ adjacent code is touched, like we do for other
workflows.
Commit: a0102e124830769edfafb977a0460ead9c94b77a
https://github.com/llvm/llvm-project/commit/a0102e124830769edfafb977a0460ead9c94b77a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
M libcxx/docs/index.rst
M libcxx/utils/ci/lnt/machines.json
Log Message:
-----------
[libc++] Bump macOS CI runners from 26.5 to 26.6.2 (#226012)
This bumps the macOS runners used by the libc++ conformance CI and the
machines tracked in LNT from macOS 26.5 to macOS 26.6.2, and switches to
Xcode 26.6 accordingly.
We introduce new names for the new LNT machines since their
configuration is changed.
Commit: 0dadfa004c8bac744279c168e5edb6b265a02e7c
https://github.com/llvm/llvm-project/commit/0dadfa004c8bac744279c168e5edb6b265a02e7c
Author: Cheng-Chieh Liu <jay87406 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Vector/Transforms/LowerVectorBroadcast.cpp
M mlir/test/Dialect/Vector/vector-broadcast-lowering-transforms.mlir
Log Message:
-----------
[mlir][Vector] Fix scalable dim guard in broadcast lowering (#225021)
The scalable outer dim guard in `BroadcastOpLowering` only covered the
"stretch not at start" case (`m != 0`). The "stretch at start" case
unrolls the same `dstType.getDimSize(0)` trip count and has the same
bug: broadcasting e.g. `vector<1x4xf32>` to `vector<[3]x4xf32>` only
fills the static minimum lanes via `vector.insert`, leaving the rest as
`ub.poison`.
Widen the guard to cover both cases, and add a regression test.
Commit: bd0da2bf7dae083c66f154064aed08bfc2987531
https://github.com/llvm/llvm-project/commit/bd0da2bf7dae083c66f154064aed08bfc2987531
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/lld/test/BUILD.bazel
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/BUILD.bazel
M utils/bazel/llvm-project-overlay/third-party/cc_library_wrapper.bzl
Log Message:
-----------
[bazel] Add support for libxml2 (#225158)
I enabled this by default to match cmake, but we could leave it off by
default if we wanted. The flag is ignored on macOS since macOS ships
this with the system and we just always use that version instead.
This is used by lld for windows manifests, used by lldb for a few
cases, and used by c-index-test for docs
Commit: d7b16806c4f1758f3642a966eedf83c58e770e76
https://github.com/llvm/llvm-project/commit/d7b16806c4f1758f3642a966eedf83c58e770e76
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/lit.cfg.py
Log Message:
-----------
[lldb][test] Stop deleting the clang module cache between lit runs (#226174)
A test binary's DWARF names the .pcm files in this cache, and make will
not rebuild an up-to-date `a.out` to regenerate them. Deleting it leaves
every ClangImporter test pointing at a deleted module.
Deleting is also redundant: a changed compiler already forces a rebuild
through `tool_prereq` inside of `Makefile.rules`.
On Windows, in swiftlang, this fixes 26 tests in `check-lldb-swift`
(ClangImporter/DWARFImporter/cxx-interop) and 105 "module file does not
exist" errors.
Commit: 01df360d349bec88509f39e6ad3be6f739d28bf0
https://github.com/llvm/llvm-project/commit/01df360d349bec88509f39e6ad3be6f739d28bf0
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir-c/IR.h
M mlir/lib/CAPI/IR/IR.cpp
M mlir/test/CAPI/ir.c
Log Message:
-----------
[mlir-c] Add mlirOperationIsAncestor and mlirOperationIsProperAncestor (#206556)
Exposes `Operation::isAncestor` and `Operation::isProperAncestor` through the MLIR C API.
Assisted by: Claude
Commit: 8ee4426e3dae25d155d102d20f7cd395bd035174
https://github.com/llvm/llvm-project/commit/8ee4426e3dae25d155d102d20f7cd395bd035174
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libcxx/test/CMakeLists.txt
R libcxx/test/benchmarks/CMakeLists.txt
A libcxx/test/benchmarks/lit.local.cfg
M libcxx/test/configs/harness-configuration.cfg.in
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/format.py
A libcxx/utils/libcxx/test/googlebenchmark.py
M libcxx/utils/libcxx/test/params.py
M libcxxabi/test/CMakeLists.txt
M libcxxabi/test/configs/cmake-bridge.cfg.in
M libunwind/test/CMakeLists.txt
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Re-apply "Build GoogleBenchmark directly from Lit" (#225856)
Previously, we would build GoogleBenchmark against the just-built
library, not against the library being tested. When testing historical
versions of libc++ or other standard libraries, this breaks. So instead
of building Google Benchmark against the just-built library in CMake, do
it from Lit as part of the test suite's configuration.
I'm not a huge fan of using Lit as a poor man's build system and we
should make the CMake test suite self-contained, however this is a step
in the right direction and it removes a major coupling between the test
suite and the regular libc++ build.
This patch re-applies 1bfe9893f3dc which was reverted in 62ea87e542c3
because it broke the Fuchsia bots. This new version of the patch also
threads through the path to the CMake program being used, the CMake
generator and the CMake "make program" from the top-level CMake to the
test-suite, so that the Google Benchmark build can inherit what the
top-level CMake is using.
Commit: 705738b26f0b8f413f7b628e1677613fb7ea71d1
https://github.com/llvm/llvm-project/commit/705738b26f0b8f413f7b628e1677613fb7ea71d1
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/IR/CycleInfo.cpp
Log Message:
-----------
[CycleInfo] Add missing exports to symbols used in tests (#225737)
Commit: e637d7d130f1be9ff06128db3007c69ca00bbaf5
https://github.com/llvm/llvm-project/commit/e637d7d130f1be9ff06128db3007c69ca00bbaf5
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/test/TableGen/AsmPredicateCombiningRISCV.td
M llvm/test/TableGen/CompressInstEmitter/suboperands.td
M llvm/test/TableGen/RegClassByHwModeCompressPat.td
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/utils/TableGen/CompressInstEmitter.cpp
Log Message:
-----------
[RISCV][TableGen] Return instruction size from isCompressibleInst (#225660)
Not all compress patterns compress to a 2 byte instruction. There are a
few `Xqci` instructions that compress from a 6 byte instruction to a 4
byte instruction. Having `isCompressibleInst` optionally return the size
of the compressed instruction will help us better estimate instruction
sizes.
Assisted by gpt-5.6-luna
Commit: ae5a2966682bb89d0cba976f0459eb1adc20f8bc
https://github.com/llvm/llvm-project/commit/ae5a2966682bb89d0cba976f0459eb1adc20f8bc
Author: Zahira Ammarguellat <zahira.ammarguellat at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
A clang/test/OpenMP/reduction_non_copyable_with_initializer.cpp
Log Message:
-----------
[OpenMP] Fix OpenMP reduction segfault with non-copyable types and user initializers. (#219265)
OpenMP custom reductions with user-defined initializers segfault when
the reduction variable type is non-copyable and has non-trivial members
(e.g., std::string). `Clang` was emitting only the user initializer
function call, leaving non-trivial
members uninitialized with garbage values, causing segfaults when those
members are accessed or assigned.
See https://godbolt.org/z/bboqKbhsT
This patch fixes the issue.
Commit: 33726c20882b4f8dc1d34990e0a516e5b627acb8
https://github.com/llvm/llvm-project/commit/33726c20882b4f8dc1d34990e0a516e5b627acb8
Author: Vasileios Porpodas <vasileios.porpodas at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/SandboxIR/Value.cpp
M llvm/unittests/SandboxIR/SandboxIRTest.cpp
Log Message:
-----------
[SandboxIR] Fix Value::stripAndAccumulateConstantOffsets (#225980)
The original test was not exercising the ExternalAnalysis FnRef, and we
we are passing a non-nullptr lambda even if the user has passed a
nullptr, which would cause a crash.
This patch fixes it.
Commit: 599fc2cfc60421ea402dd0ec57f5106bf452962c
https://github.com/llvm/llvm-project/commit/599fc2cfc60421ea402dd0ec57f5106bf452962c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder.dockerfile
Log Message:
-----------
[Github] Bump libcxx image to ubuntu 26.04 (#225550)
To match the rest of the premerge CI images.
Commit: 6702faa9c52cedeaad7d8f8fbc82be44cbc8f637
https://github.com/llvm/llvm-project/commit/6702faa9c52cedeaad7d8f8fbc82be44cbc8f637
Author: robertvirany <robertvirany at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/NVPTXUsage.md
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/st_bulk.ll
A llvm/test/CodeGen/NVPTX/st_bulk_i32.ll
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/lib/Target/LLVMIR/Dialect/NVVM/NVVMToLLVMIRTranslation.cpp
M mlir/test/Dialect/LLVMIR/nvvm.mlir
M mlir/test/Target/LLVMIR/nvvmir-invalid.mlir
M mlir/test/Target/LLVMIR/nvvmir.mlir
Log Message:
-----------
[NVPTX] Support 32-bit size operand for st.bulk (#217703)
PTX ISA 9.0 extends the `st.bulk` instruction to accept a 32-bit `size`
operand.
Add `i32` variants of the generic and `.shared::cta` NVVM intrinsics and
select them to `st.bulk` instructions using 32-bit registers. The new
patterns require PTX ISA 9.0 and `sm_100`.
The existing intrinsics continue to represent the original 64-bit forms.
Add code-generation coverage for both the default and short-pointer
ABIs.
Commit: af50c4643d0cfd4acb81c7b6b3b0618ed2700be8
https://github.com/llvm/llvm-project/commit/af50c4643d0cfd4acb81c7b6b3b0618ed2700be8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/cttz_elts.ll
Log Message:
-----------
[RISCV] Fix crash costing cttz.elts with zvl32b. (#226181)
With +zvl32b fixed-length vectors are not legalized to RVV types and
getTypeLegalizationCost returns a scalar MVT. Skip non-vector types and
return Invalid instead of asserting in the getVectorElementType call
below.
Hit this while fuzzing some LoopVectorize changes.
Aided by Claude Opus.
PR: https://github.com/llvm/llvm-project/pull/226181
Commit: 3e7abfccd079c2303c8bb21cad3c425f2507ac88
https://github.com/llvm/llvm-project/commit/3e7abfccd079c2303c8bb21cad3c425f2507ac88
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/Value.h
Log Message:
-----------
[SandboxIR] Add missing exports to symbols used in unittests (#225977)
Commit: c2c25c67b5385c02b3a7c6d6b3523ff406eaad2e
https://github.com/llvm/llvm-project/commit/c2c25c67b5385c02b3a7c6d6b3523ff406eaad2e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/masked_compressstore.ll
Log Message:
-----------
[X86] masked_compressstore.ll - add VBMI2 test coverage (#226221)
VBMI2 added vXi8/i16 compressstore handling
Commit: cb4c63ef8f72e93b58277bb5443251e70dadb401
https://github.com/llvm/llvm-project/commit/cb4c63ef8f72e93b58277bb5443251e70dadb401
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/clang-tools-extra/unittests/BUILD.bazel
M utils/bazel/llvm-project-overlay/flang-rt/lib/runtime/BUILD.bazel
Log Message:
-----------
Fix layering failure for clang-doc and flang (#225964)
This was introduced in commit 4989b3b0bb752c436c922d8e65cd7a952038d5db.
* `src/liblzma/api/config.h` is exposed in hdrs of lzma_src_liblzma_api.
* `strip_include_prefix = "src/liblzma/api"` strips the path, exposing
the header as `config.h` in a virtual include directory
(`_virtual_includes/lzma_src_liblzma_api/config.h`).
Fixed by adding `strip_include` to the relevant `config.h` headers that
were causing failures.
Commit: 7701f727799a8cfb6ca20802c5824d12f7c93b5e
https://github.com/llvm/llvm-project/commit/7701f727799a8cfb6ca20802c5824d12f7c93b5e
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/GCOVProfiling/exit-block.ll
M llvm/test/Transforms/GCOVProfiling/function-numbering.ll
M llvm/test/tools/llvm-cov/gcov/basic.test
Log Message:
-----------
[test] Use -- for llvm-cov gcov long options (#226236)
Prepare for the OptTable migration of llvm-cov gcov, where long options
take `--` only.
Commit: 78ff5215e53a117851dc6e81e793a106f1a79df8
https://github.com/llvm/llvm-project/commit/78ff5215e53a117851dc6e81e793a106f1a79df8
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/AST/DeclContextInternals.h
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#226047)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
DeclListNode::Decls in StoredDeclsList because the operands are always
nonnull:
- StoredDeclsList::getAsDecl and StoredDeclsList::getAsList are called
only after verifying !isNull() (in StoredDeclsList::getASTContext,
StoredDeclsList::addOrReplaceDecl, and ASTImporterTest.cpp).
- DeclListNode::Rest is always nonnull because the singly-linked list of
DeclListNode is terminated by a NamedDecl *, not by nullptr.
Assisted-by: Antigravity
Commit: 585b10be7b8487440227fa1da5f08fa6938ca32e
https://github.com/llvm/llvm-project/commit/585b10be7b8487440227fa1da5f08fa6938ca32e
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Log Message:
-----------
[LV] Remove unused functions (NFC) (#226048)
isInductionVariable:
The last caller was removed on December 19, 2025 in commit
1f78f6a2d629b0dd410a3d20429f76377ac5d6c3, leaving
isCastedInductionVariable without any callers and
InductionCastsToIgnore without any readers.
getNumStores, getNumLoads:
The last callers were removed on August 5, 2025 in commit
c9dd14d1d4c357ad29e0e5c446f1bb8f596ab9c0.
hasVector:
The last caller was removed on June 24, 2024 in commit
abf5969f76c6b4196b08fe5ea9c2890e97a61357.
getInLoopReductionImmediateChain:
The last caller was removed on September 4, 2026 in commit
278d9f76594de1ad0fac669468bf083ad6616a0f, leaving
InLoopReductionImmediateChains without any readers.
preferTailFoldedLoop:
The last caller was removed on August 12, 2026 in commit
97773f262edefabce826ed56f438005d34a78f4b.
Assisted-by: Antigravity
Commit: 34474905abda1ecedca7c4f7b4a6e871aa07f910
https://github.com/llvm/llvm-project/commit/34474905abda1ecedca7c4f7b4a6e871aa07f910
Author: sujianIBM <Jian.Su at ibm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-ppa2.ll
Log Message:
-----------
[SystemZ][z/OS] Fix product version format in PPA2 on z/OS. (#225749)
The product version in PPA2 should be right-aligned (e.g. 090807)
instead of left-aligned (e.g. 908070) on z/OS.
Commit: 3ab91ef29fc59cd48ac88fe0d5226fed6b7fd939
https://github.com/llvm/llvm-project/commit/3ab91ef29fc59cd48ac88fe0d5226fed6b7fd939
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/include/flang/Lower/SymbolMap.h
M flang/include/flang/Semantics/scope.h
M flang/include/flang/Semantics/semantics.h
M flang/include/flang/Semantics/tools.h
M flang/lib/Lower/ConvertCall.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/SymbolMap.cpp
M flang/lib/Semantics/check-call.cpp
M flang/lib/Semantics/expression.cpp
M flang/lib/Semantics/resolve-directives.cpp
M flang/lib/Semantics/semantics.cpp
M flang/lib/Semantics/tools.cpp
A flang/test/Lower/OpenACC/acc-data-cuda-device.f90
Log Message:
-----------
[flang][cuda][openacc] Resolve DEVICE dummies against !$acc data mapped objects (#225899)
CUDA Fortran generic resolution rejects a call when an actual argument
with
no CUDA data attribute is associated with an ATTRIBUTES(DEVICE) dummy.
That
makes cuBLAS-style generic interfaces unusable inside a structured
OpenACC
data region, even though the mapped objects do have a device copy there:
```
!$acc data copyin(a, b) copyout(c)
call cublaszgemm(transa, transb, m, n, k, alpha, a, lda, b, ldb, beta, c, ldc)
!$acc end data
error: No specific subroutine of generic 'cublaszgemm' matches the actual
arguments
dummy argument 'a=' has ATTRIBUTES(DEVICE) but its associated actual
argument has no CUDA data attribute
```
Treat an object mapped by an enclosing structured `acc data` construct
as if
the actual had CUDADataAttr::UseDevice, which is the attribute already
used
for `host_data use_device` and which matches either a DEVICE dummy or a
host
dummy. Scalars and unmapped objects keep no attribute, so a specific
taking
host scalars and device arrays is preferred over one requiring every
argument
to be on the device.
Semantics records the mapped objects on the OpenACC construct scope
rather
than on the symbols themselves, so ordinary references inside the region
still denote the host object; only argument association consults the
mapping.
The lookup walks enclosing scopes so nested data regions work, and is
skipped
entirely when the compilation contains no such mapping.
Lowering keeps the host binding in the symbol map and adds a parallel
device-binding stack populated from the `acc.data` operands. A call
argument
is rebuilt from the device binding only when the dummy is DEVICE;
objects
without a whole-object binding, such as common block members and
component
references, are left on the host path.
Only `acc data` is handled; compute constructs are unaffected.
Commit: b1ba3d515a0238adbfc6c349ed3b33f9060cea72
https://github.com/llvm/llvm-project/commit/b1ba3d515a0238adbfc6c349ed3b33f9060cea72
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/test/tools/llvm-reduce/mir/parallel-jobs-unsupported.mir
M llvm/tools/llvm-reduce/deltas/Delta.cpp
M llvm/tools/llvm-reduce/deltas/Delta.h
M llvm/tools/llvm-reduce/llvm-reduce.cpp
Log Message:
-----------
llvm-reduce: Error on -j with MIR inputs (#226225)
Parallel chunk processing distributes work by serializing the program to
bitcode and reparsing it in each worker thread. Bitcode cannot represent
MachineFunctions, so readBitcode leaves ReducerWorkItem::MMI null and
the reparsed item reports isMIR() == false. The delta pass list is still the
MIR one, chosen from the original program, so the worker runs a MIR pass
over an item with no MachineModuleInfo and dereferences null.
This broke every MIR reduction using -j > 1, though not immediately: the
parallel path is only taken once there is more than one chunk left to
process, so the crash appeared after the first granularity increase.
Reject the combination up front instead of crashing partway through a
reduction. Supporting it would mean exchanging MIR text rather than
bitcode, and giving each worker its own TargetMachine.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: d1c2388b476953feb646d8de5ee291ff988b9a07
https://github.com/llvm/llvm-project/commit/d1c2388b476953feb646d8de5ee291ff988b9a07
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/CommandGuide/llvm-cov.md
M llvm/tools/llvm-cov/CMakeLists.txt
A llvm/tools/llvm-cov/GcovOpts.td
M llvm/tools/llvm-cov/gcov.cpp
M llvm/utils/gn/secondary/llvm/tools/llvm-cov/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[llvm-cov] Migrate gcov to OptTable (#224955)
llvm-cov gcov is the last user of cl::Grouping. Parse its options with
an OptTable that enables grouped short options, as the other
binutils-style tools do, so that cl::Grouping can be removed.
Spellings follow the other migrated tools: long options take `--` only,
so `-gcno` and `-gcda=` become `--gcno` and `--gcda=`. `--help` now
lists only gcov's options rather than every cl:: option linked into
llvm-cov, and an unknown option or a missing source file is reported
as `llvm-cov gcov: error: ...`.
LLM-aided
Commit: 78a1fe99f4935677a285a1f6d789b8b5b01b24b1
https://github.com/llvm/llvm-project/commit/78a1fe99f4935677a285a1f6d789b8b5b01b24b1
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M utils/bazel/.bazelrc
M utils/bazel/.bazelversion
M utils/bazel/MODULE.bazel.lock
M utils/bazel/llvm-project-overlay/clang/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch2/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch3/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch4/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch5/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch6/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/toy/Ch7/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch2/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch3/BUILD.bazel
M utils/bazel/llvm-project-overlay/mlir/examples/transform/Ch4/BUILD.bazel
Log Message:
-----------
[bazel] Update to 9.x (#225466)
Mostly just staying up to date, but this has performance improvements
with remote exec too
Commit: 23a4893c0ddb4c6df17fa487bd74d0d9ab6e658a
https://github.com/llvm/llvm-project/commit/23a4893c0ddb4c6df17fa487bd74d0d9ab6e658a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/TargetParser/IntelGPUTargetParser.cpp
Log Message:
-----------
[TargetParser] Fix -Wunused-variable in #222072 (#226243)
Use [[maybe_unused]] as the name is a lot nicer than the raw constant.
Commit: d968b5fcfdaee96643a8051b498f8daee3a73773
https://github.com/llvm/llvm-project/commit/d968b5fcfdaee96643a8051b498f8daee3a73773
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
A lldb/test/Shell/SymbolFile/NativePDB/dedupe-exported-public-symbols.cpp
Log Message:
-----------
[lldb][NativePDB] Don't duplicate public symbols that restate a PE export (#226200)
`SymbolFileNativePDB::AddSymbols` adds every
[`S_PUB32`](https://llvm.org/docs/PDB/CodeViewSymbols.html#s-pub32-0x110e)
to the symtab, but `ObjectFilePECOFF` has usually already added the same
name and address from the PE export table, so the symbol resolves to two
entries.
On the other hand, `ObjectFilePECOFF` already solves this for its own
`export`/`symtab` overlap by marking the duplicate entry as
`eSymbolTypeAdditional`:
https://github.com/llvm/llvm-project/blob/d1106deb71cc81016406a1917d0508d2df296266/lldb/source/Plugins/ObjectFile/PECOFF/ObjectFilePECOFF.cpp#L839-L844
This patch implements the same for `SymbolFileNativePDB::AddSymbols`.
In swiftlang, this fixes
`lang/swift/expression/exclusivity_suppression/TestExclusivitySuppression.py`
on Windows.
Commit: e27c7439ab588237a4c526feb3bb632f9aea8530
https://github.com/llvm/llvm-project/commit/e27c7439ab588237a4c526feb3bb632f9aea8530
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/sys_xattr_macros.h
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
A libc/include/llvm-libc-macros/linux/sys-xattr-macros.h
A libc/include/llvm-libc-macros/sys-xattr-macros.h
M libc/include/sys/xattr.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/fgetxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/fsetxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/getxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/lgetxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/lsetxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setxattr.h
M libc/src/sys/xattr/CMakeLists.txt
A libc/src/sys/xattr/fgetxattr.h
M libc/src/sys/xattr/flistxattr.h
A libc/src/sys/xattr/fsetxattr.h
A libc/src/sys/xattr/getxattr.h
A libc/src/sys/xattr/lgetxattr.h
M libc/src/sys/xattr/linux/CMakeLists.txt
A libc/src/sys/xattr/linux/fgetxattr.cpp
M libc/src/sys/xattr/linux/flistxattr.cpp
A libc/src/sys/xattr/linux/fsetxattr.cpp
A libc/src/sys/xattr/linux/getxattr.cpp
A libc/src/sys/xattr/linux/lgetxattr.cpp
M libc/src/sys/xattr/linux/listxattr.cpp
M libc/src/sys/xattr/linux/llistxattr.cpp
A libc/src/sys/xattr/linux/lsetxattr.cpp
A libc/src/sys/xattr/linux/setxattr.cpp
M libc/src/sys/xattr/listxattr.h
M libc/src/sys/xattr/llistxattr.h
A libc/src/sys/xattr/lsetxattr.h
A libc/src/sys/xattr/setxattr.h
M libc/test/src/sys/xattr/CMakeLists.txt
R libc/test/src/sys/xattr/flistxattr_test.cpp
A libc/test/src/sys/xattr/fxattr_test.cpp
R libc/test/src/sys/xattr/listxattr_test.cpp
R libc/test/src/sys/xattr/llistxattr_test.cpp
A libc/test/src/sys/xattr/lxattr_test.cpp
A libc/test/src/sys/xattr/xattr_test.cpp
Log Message:
-----------
[libc] Add the get and set sys/xattr.h entrypoints. (#224729)
This is a follow-up to #224357, implementing more of sys/xattr.h. As
before, these are non-POSIX APIs.
The list of entrypoints is: `fgetxattr`, `getxattr`, `lgetxattr`,
`fsetxattr`, `setxattr`, and `lsetxattr`.
Assisted-by: Automated tooling, human reviewed.
Commit: 5dac0fe905fe71b672d7dca9d78dcdb362d2236d
https://github.com/llvm/llvm-project/commit/5dac0fe905fe71b672d7dca9d78dcdb362d2236d
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/test/InstallAPI/exclusive-passes-platform.test
M llvm/test/ObjectYAML/MachO/export_trie_lc_dyld_exports_trie.yaml
M llvm/test/ObjectYAML/MachO/export_trie_lc_dyld_info_only.yaml
M llvm/test/ObjectYAML/MachO/function_starts.yaml
M llvm/test/tools/llvm-readobj/COFF/codeview-merging-ghash.test
M llvm/test/tools/llvm-tli-checker/ifuncs.yaml
M llvm/test/tools/llvm-tli-checker/ps4-tli-check.yaml
Log Message:
-----------
[test] Use -o <file> for yaml2obj (#226245)
`-o <file>` is the preferred form. Prepare for the OptTable migration of
yaml2obj, where -o=<file> is no longer accepted.
Commit: becb38d14dafea1ebaf446b9c2f8f8c31fe335e8
https://github.com/llvm/llvm-project/commit/becb38d14dafea1ebaf446b9c2f8f8c31fe335e8
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/tools/split-file/help.test
M llvm/utils/gn/secondary/llvm/utils/split-file/BUILD.gn
M llvm/utils/split-file/CMakeLists.txt
A llvm/utils/split-file/Opts.td
M llvm/utils/split-file/split-file.cpp
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[split-file] Migrate to OptTable (#224966)
split-file is one of three tools that parse with
cl::ParseCommandLineOptions(LongOptionsUseDoubleDash=true). Parse its
options with an OptTable instead, so that the mode can be removed from
cl::. --no-leading-lines now overrides an earlier --leading-lines
rather than being ignored, and `--help` lists only split-file's
options. `--version` still exits 0, which libc++'s test configuration
relies on to detect the tool.
LLM-aided
Commit: 0b2b0cca1214db3f0e1d34033594cb36a3faed7f
https://github.com/llvm/llvm-project/commit/0b2b0cca1214db3f0e1d34033594cb36a3faed7f
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/tools/obj2yaml/help.test
M llvm/tools/obj2yaml/CMakeLists.txt
A llvm/tools/obj2yaml/Opts.td
M llvm/tools/obj2yaml/obj2yaml.cpp
M llvm/utils/gn/secondary/llvm/tools/obj2yaml/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[obj2yaml] Migrate to OptTable (#224965)
obj2yaml is one of three tools that parse with
cl::ParseCommandLineOptions(LongOptionsUseDoubleDash=true). Parse its
options with an OptTable instead, so that the mode can be removed from
cl::. Spellings follow the other migrated tools: -o<file> and -o <file>,
--raw-segment=<segment> and --raw-segment <segment>, -h/--help and
--version. `--help` lists only obj2yaml's options.
LLM-aided
Commit: 06d67477d57a07fdbc40742678136369b725933f
https://github.com/llvm/llvm-project/commit/06d67477d57a07fdbc40742678136369b725933f
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/omptarget-llvm.mlir
M mlir/test/Target/LLVMIR/omptarget-nowait.mlir
M mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
A mlir/test/Target/LLVMIR/omptarget-target-data-source-loc-nodebug.mlir
A mlir/test/Target/LLVMIR/omptarget-target-region-source-loc-nodebug.mlir
A mlir/test/Target/LLVMIR/omptarget-target-region-source-loc.mlir
Log Message:
-----------
[Flang][OpenMP][MLIR] Attach source location to target/target-data runtime c… (#222389)
…alls
This commit adds ident info to the OpenMP target call so the runtime now
reports the kernels source location in -g and non -g builds
Of note this does diverge from clang where the file info is only
provided with `-g` builds, however similar work is done in
`createMappingInformation` in
`mlir/lib/Target/LLVMIR/Dialect/OpenMPCommon.cpp`.
Commit: 666f22b6aa5b449bc5a4f2348f912faa1012909b
https://github.com/llvm/llvm-project/commit/666f22b6aa5b449bc5a4f2348f912faa1012909b
Author: Chris B <chris.bieneman at me.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVStructurizer.cpp
A llvm/test/CodeGen/SPIRV/structurizer/branch-no-switch.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.for.short-circuited-cond.ll
M llvm/test/CodeGen/SPIRV/structurizer/cf.while.short-circuited-cond.ll
Log Message:
-----------
[SPIRV] Support structurizing nested break chains (#222459)
This PR updates the SPIRVStructurizer to handle nested break chains.
This pattern occurs when switch statements are lowered instead as branch
instructions and break statements need to exit out to an outer
containing block.
This is a required change to support #112056.
Assisted-by: GitHub Copilot
Commit: f676944065576ceba42691edeba053898b57c1bf
https://github.com/llvm/llvm-project/commit/f676944065576ceba42691edeba053898b57c1bf
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Log Message:
-----------
[SLP][NFC] Use BoUpSLP::getNumberOfParts() where appropriate (#225995)
Caches the results for better performance rather than directly calling
slpvectorizer::getNumberOrParts().
Small improvement in compile time.
Commit: dcef585fd51c423acb1175bdeea8c5a3ed05b7cd
https://github.com/llvm/llvm-project/commit/dcef585fd51c423acb1175bdeea8c5a3ed05b7cd
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
Log Message:
-----------
[VPlan] Compute execution probability via APFloat for printing. (#226135)
Similar to #201824 (8e517e1d17b1), use APFloat to compute the execution
probability. This ensures the output is independent of the underlying
libc/OS/architecture.
Suggested in https://github.com/llvm/llvm-project/pull/203982.
Commit: 4584e4bb15bb8bf0c1c190b3cbe85908bcc2a56e
https://github.com/llvm/llvm-project/commit/4584e4bb15bb8bf0c1c190b3cbe85908bcc2a56e
Author: Peter Rong <peterrong96 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Writer.cpp
M lld/test/MachO/arm64-reloc-tlv-load.s
M lld/test/MachO/flat-namespace-interposable.s
A lld/test/MachO/got-to-tlv-reference.s
M lld/test/MachO/indirect-symtab.s
R lld/test/MachO/invalid/bad-got-to-dylib-tlv-reference.s
R lld/test/MachO/invalid/bad-got-to-tlv-reference.s
M lld/test/MachO/map-file.s
M lld/test/MachO/tapi-link.s
M lld/test/MachO/tlv-dylib.s
A lld/test/MachO/tlv-dynamic-lookup-x86.s
A lld/test/MachO/tlv-dynamic-lookup.s
A lld/test/MachO/tlv-non-lazy-pointer.s
M lld/test/MachO/weak-binding.s
M lld/test/MachO/weak-reference.s
Log Message:
-----------
[lld][MachO] Remove `__thread_ptrs` section so TLV can relocate against dynamic-lookup symbols (#221364)
lld/MachO rejects a relocation whenever `hasAttr(TLV) != sym->isTlv()`, but
`isTlv()` cannot separate "not thread-local" from "unknown", so that one
inequality rejects three unrelated cases and only one of them is ill-formed.
C++20 `constinit` made another of them common: it lets the compiler elide the
thread-local wrapper and access a cross-TU object directly ([folly 2c666105](https://github.com/facebook/folly/commit/2c666105e9a694aef7290cce3da14ed1ebf14462)),
producing a TLV relocation against a dynamic-lookup symbol. The check was also
masking a defect — `Symbol::gotIndex` is one field indexing whichever of `__got`
or `__thread_ptrs` holds the symbol — and never enforced it anyway, since
`UnwindInfoSection` and the stub paths call `in.got->addEntry` directly, so a
thread-local personality already collided on stock lld.
Both pools hold the same value, the descriptor's address, and ld-prime never
synthesizes `__thread_ptrs` at all. Make `__got` the sole non-lazy pointer
section, deleting `TlvPointerSection`, `NonLazyPointerSectionBase`,
`in.tlvPointers`, `Symbol::getTlvVA` and the indirect-symbol-table
special-casing, and collapsing `resolveGotVA`/`resolveTlvVA` into
`resolveNonLazyPtrVA`. One section, one index, so the collision becomes
unrepresentable. Input objects with a real `__thread_ptrs` section still pass
through unchanged.
The check can now say what is actually wrong: TLV relocations against
dynamic-lookup symbols and GOT, branch or unsigned relocations against
thread-locals are accepted; a TLV relocation against a symbol known not to be
thread-local still errors, and a direct relocation against an imported
thread-local gets its own diagnostic. Two tests asserted a diagnostic ld64 does
not raise, so they keep their inputs, move out of `invalid/`, and assert the new
behaviour.
Commit: 915c3bd9d4659165e1b4bb4a13204d559592b1c0
https://github.com/llvm/llvm-project/commit/915c3bd9d4659165e1b4bb4a13204d559592b1c0
Author: Domenic Nutile <domenic.nutile at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
A llvm/test/Transforms/InstCombine/extractelement-strided-ptr-vector.ll
Log Message:
-----------
[InstCombine] Fold variable extract of a constant-strided pointer vector (#217078)
A vector built from pointers that all point into the same object at a
constant stride is a table of addresses, so a variable extract from it
is address arithmetic:
%v0 = insertelement <4 x ptr> poison, ptr %b, i64 0
%v1 = insertelement <4 x ptr> %v0, ptr %b + 8, i64 1
%v2 = insertelement <4 x ptr> %v1, ptr %b + 16, i64 2
%v3 = insertelement <4 x ptr> %v2, ptr %b + 24, i64 3
%r = extractelement <4 x ptr> %v3, i32 %i
-->
%r = getelementptr i8, ptr %b, i64 %i * 8
Fold it to a single GEP. Every element must be reachable from one base
pointer at a constant byte offset, every lane of the vector must be
defined, and the offsets must form an arithmetic sequence; otherwise the
pattern is left alone.
Commit: 606e2acdd1cd869831600b001d76dbe123e80e2c
https://github.com/llvm/llvm-project/commit/606e2acdd1cd869831600b001d76dbe123e80e2c
Author: Colin De Vlieghere <cdevlieghere at tesla.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/test/Dialect/ControlFlow/one-shot-bufferize-analysis.mlir
Log Message:
-----------
[mlir][bufferization] Relax happens-before analysis (#223777)
On unstructured control-flow, the one-shot analysis is rather
conservative in regards to computing RaW conflicts, requiring strict
dominance which may not always be satisfied.
Relax this requirement to allow more cases to not be marked as
conflicting. Notably, readers/writers within a region that contains a
"diamond" or multiple loops are now handled.
This is a simpler version of
https://github.com/llvm/llvm-project/pull/223006 without the CFGLoopInfo
analysis, meaning it is a bit more conservative when analyzing regions
with nested loops.
Commit: 6ca0abd3c4da280402f72488c2dc0ef0b8455de9
https://github.com/llvm/llvm-project/commit/6ca0abd3c4da280402f72488c2dc0ef0b8455de9
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang-tools-extra/docs/conf.py
M clang/docs/analyzer/conf.py
M clang/docs/conf.py
M libc/docs/conf.py
M libcxx/docs/conf.py
M lld/docs/conf.py
M lldb/docs/conf.py
M llvm/docs/ReleaseNotes.md
M llvm/docs/conf.py
M polly/docs/conf.py
M utils/docs/llvm_sphinx/__init__.py
Log Message:
-----------
[docs] Require MyST for Sphinx documentation builds (#223829)
Fedora plans to use the separate llvm_man_pages package that we build as part of our release process now:
https://discourse.llvm.org/t/rfc-make-myst-markdown-the-llvm-docs-format-rip-rest/90840/37
I'm assuming that other distributions are either going to be able to
install the necessary Python modules that we depend on (myst_parser
etc), or will use this man page package if they need it. Therefore, I think we
can remove this enum and associated complexity.
Assisted-by: codex
Commit: 62fd85fe5a008a88d1d00aab468a8779aac4bd0a
https://github.com/llvm/llvm-project/commit/62fd85fe5a008a88d1d00aab468a8779aac4bd0a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAnd.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMin.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedXor.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedExchange-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedExchange-sm65-errors.hlsl
A clang/test/SemaHLSL/BuiltIns/InterlockedExchange-errors.hlsl
Log Message:
-----------
[HLSL] Add `InterlockedExchange` function and resource methods (#222161)
This PR adds the `InterlockedExchange` standalone function and resource
methods. The operation lowers to `atomicrmw xchg`.
`InterlockedExchange` is the first interlocked operation that reports
the
previous value. It takes that value through an `original_value`
reference
parameter, so this PR adds a `RequiresOriginalValue` flag to
`HLSLBuiltinTypeDeclBuilder` and a matching overload shape to
`HLSLExternalSemaSource`. The later compare operations reuse both.
The float overload of `InterlockedExchange` follows in a separate PR in
this
stack. This PR covers the integer overloads alone, so it links
https://github.com/llvm/llvm-project/issues/99129 without closing it.
Assisted by: Github Copilot
Commit: 2ed7fafcb06c8c314fc5d88580a93a50e9054d1a
https://github.com/llvm/llvm-project/commit/2ed7fafcb06c8c314fc5d88580a93a50e9054d1a
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-i64-sm65.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-texture-unsupported-kind.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-texture.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange-unsupported-result.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicCompareExchange.ll
Log Message:
-----------
[DirectX] Support `cmpxchg` on buffer resources in DXIL lowering (#222162)
This PR is a backend change alone. It teaches DXIL lowering to handle a
`cmpxchg` on a buffer resource pointer, which the
`InterlockedCompareStore`
and `InterlockedCompareExchange` PRs above it in this stack need.
The PR adds:
- the `llvm.dx.resource.atomic.compare.exchange` intrinsic,
- its DXIL operation and op lowering,
- the `DXILResourceAccess` handling that turns a `cmpxchg` on a value
returned by `llvm.dx.resource.getpointer` into that intrinsic.
DXIL has no atomic compare exchange for texture resources, so the pass
reports an error for them. A test covers that path.
There is no Clang change here, and no HLSL function becomes available.
Assisted by: Github Copilot
Commit: dd17367613c43e3224289f175b9938c55a7e8bbc
https://github.com/llvm/llvm-project/commit/dd17367613c43e3224289f175b9938c55a7e8bbc
Author: Wael Yehia <wmyehia2001 at yahoo.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/TargetInfo.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/Targets/PPC.cpp
M clang/lib/Sema/SemaPPC.cpp
M clang/test/CodeGen/PowerPC/attr-target-clones.c
M clang/test/Sema/PowerPC/attr-target-clones.c
M llvm/include/llvm/TargetParser/PPCTargetParser.def
M llvm/include/llvm/TargetParser/PPCTargetParser.h
M llvm/lib/TargetParser/PPCTargetParser.cpp
Log Message:
-----------
[FMV][AIX] Implement target_clones part 2 (target-features) (#206786)
This is part 2 (of 2) of FMV on AIX that would allow specifying
target-feature strings on the ``target_clones`` attribute. Part 1 was in
#177428.
The list of attributes supported is a subset of the attribute accepted
on the `target` attribute on AIX, specifically those that are runtime
detectable via the `__builtin_cpu_supports` builtin.
---------
Co-authored-by: Wael Yehia <wyehia at ca.ibm.com>
Commit: 08ee0ef5da10d27d5776df1e1ff81c46a38d9b5c
https://github.com/llvm/llvm-project/commit/08ee0ef5da10d27d5776df1e1ff81c46a38d9b5c
Author: satyanarayana reddy janga <satyajanga at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectContainer/CMakeLists.txt
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/CMakeLists.txt
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/ObjectContainerClangOffloadBundle.cpp
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/ObjectContainerClangOffloadBundle.h
M lldb/source/Symbol/ObjectFile.cpp
M lldb/unittests/ObjectContainer/CMakeLists.txt
A lldb/unittests/ObjectContainer/ObjectContainerClangOffloadBundleTest.cpp
Log Message:
-----------
[lldb] Add plugin for Clang offload bundle object container (#222362)
## Summary
Clang supports embedding binaries using the clang offload bundler:
https://clang.llvm.org/docs/ClangOffloadBundler.html
This patch creates an ObjectContainer plug-in that allows us to get the
contained binaries within any executable.
### why we need this?
AMD/HIP host binaries may contain a .hip_fatbin section holding a Clang
offload bundle with one or more AMDGPU ELF code objects, typically for
different GPU architectures. Each ELF code object can contain multiple
ml kernels.
### Test
Added tests for the logic.
NOTE: Caching was intentionally left out to keep the upstream initial
implementation simple; i will add it as a followup.
---------
Co-authored-by: Greg Clayton <gclayton at fb.com>
Co-authored-by: Bar Soloveychik <barsolo at meta.com>
Co-authored-by: Bar Soloveychik <barsolo at fb.com>
Commit: 4ebb19efe952ded7f9d937731418baf3b28babd0
https://github.com/llvm/llvm-project/commit/4ebb19efe952ded7f9d937731418baf3b28babd0
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M llvm/test/tools/yaml2obj/help.test
M llvm/tools/yaml2obj/CMakeLists.txt
A llvm/tools/yaml2obj/Opts.td
M llvm/tools/yaml2obj/yaml2obj.cpp
M llvm/utils/gn/secondary/llvm/tools/yaml2obj/BUILD.gn
M utils/bazel/llvm-project-overlay/llvm/BUILD.bazel
Log Message:
-----------
[yaml2obj] Migrate to OptTable (#224964)
yaml2obj is one of three tools that parse with
cl::ParseCommandLineOptions(LongOptionsUseDoubleDash=true). Parse its
options with an OptTable instead, so that the mode can be removed from
cl::. Spellings follow the other migrated tools: -D<macro>=<v> and
-D <macro>=<v>, -o<file> and -o <file>, --docnum=<n> and --docnum <n>,
--max-size likewise, -E, -h/--help and --version. `-o=<file>` is no
longer accepted; the tests that used it are updated. `--help` lists
only yaml2obj's options.
LLM-aided
Commit: d869b1001e5750d9bc7de3e9e4e2adddcdf547c5
https://github.com/llvm/llvm-project/commit/d869b1001e5750d9bc7de3e9e4e2adddcdf547c5
Author: Yusra Syeda <99052248+ysyeda at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
Log Message:
-----------
[SystemZ] Fix zero length PR section for zero size BSS globals (#225863)
PR sections must have a non zero length. This was already handled for
ADA sections via requiresNonZeroLength(), but not for BSS globals
declared with zero size. This change extends the existing inflation to
also cover BSS PR sections.
---------
Co-authored-by: Yusra Syeda <yusra.syeda at ibm.com>
Commit: 7d16aafe51fdbf03da4cf08c7785d91faecc0d27
https://github.com/llvm/llvm-project/commit/7d16aafe51fdbf03da4cf08c7785d91faecc0d27
Author: Jonathan Cohen <joncoh at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/test/CodeGen/AArch64/aarch64-reassociate-accumulators.ll
Log Message:
-----------
[AArch64] Fix accumulator chain opcode for SABAv2i32 (#226062)
A typo in `AArch64InstrInfo::getAccumulationStartOpcode` caused
`SABAv2i32` to be matched instead of `SABDv2i32`.
Fixes #225984
Commit: 67005b724c917e1bdca50c82ecaa1b21a69244ed
https://github.com/llvm/llvm-project/commit/67005b724c917e1bdca50c82ecaa1b21a69244ed
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.h
M llvm/test/Transforms/PhaseOrdering/AArch64/scalarize-load-ext-extract.ll
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/SLPVectorizer/ARM/extracted-subfields-cost.ll
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
M llvm/test/Transforms/SLPVectorizer/X86/reduce-or-bitpack.ll
Log Message:
-----------
[SLP]Model gathers of extracted integer sub-fields as bitcast+permute+ext
Emit gathered zero-extended sub-fields of one wider integer scalar as a
bitcast to the field vector plus a permutation and an extension, instead
of an insertelement chain or a splat-shift+trunc tree.
Fixes #55693
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/224919
Commit: 01278da5ac2621f25d73654486791993a2f26f9f
https://github.com/llvm/llvm-project/commit/01278da5ac2621f25d73654486791993a2f26f9f
Author: Lucas Mellone <github.snugness349 at passinbox.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-check-generated-files.yml
Log Message:
-----------
[libc++] Bump Ubuntu version back to 26.04 and remove Install Dependencies step for Generated Files check (#226219)
Updates the version for Ubuntu to 26.04 and removes Install Dependencies
step for Generated Files check, since clang-format wasn't needed in that
job.
Commit: c9343d674eda6cd406154e39cb0b2f0f645fc9a5
https://github.com/llvm/llvm-project/commit/c9343d674eda6cd406154e39cb0b2f0f645fc9a5
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Trust forced kernel module load addresses (#224856)
ProcessFreeBSDKernelCore explicitly selects this dynamic loader after
libkvm establishes the kernel section load addresses. Use that supplied
module and its target load address instead of requiring an ELF header at
the runtime kernel base, since ppc64, ppc64le, and riscv on FreeBSD do
not map file headers there.
Assisted-by: GPT
Commit: 4938b4832d5bc2e405f8f61fa5e60837bc8d896f
https://github.com/llvm/llvm-project/commit/4938b4832d5bc2e405f8f61fa5e60837bc8d896f
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Fix missing num_load_section increment (#224842)
num_load_section should increment when section load address is set by a
fixed slide.
Fixes: b3cc4804d45d6b612ac9b3cc47ebbb0da44ebc60
Commit: 8267555e8a7cbe000f1e25c484635162c1420239
https://github.com/llvm/llvm-project/commit/8267555e8a7cbe000f1e25c484635162c1420239
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
Log Message:
-----------
[lldb][FreeBSDKernel] Update kernel/kmod ELF type (#224847)
In FreeBSD, kernel and kmod are not always `ET_EXEC`/`ET_DYN`. A few
exceptions exist:
- amd64's kmod is `ET_REL`
- ppc64 and ppc64le's kernel is `ET_DYN`
Reflect these in code that identifies if module is kernel, kmod, or
relocatable object.
Fixes: b3cc4804d45d6b612ac9b3cc47ebbb0da44ebc60
Commit: bae129c2aa96ea9258b6718191690665ed969a0c
https://github.com/llvm/llvm-project/commit/bae129c2aa96ea9258b6718191690665ed969a0c
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/docs/AlignedBundling.md
R llvm/docs/AlignedBundling.rst
A llvm/docs/BlockFrequencyTerminology.md
R llvm/docs/BlockFrequencyTerminology.rst
A llvm/docs/BranchWeightMetadata.md
R llvm/docs/BranchWeightMetadata.rst
A llvm/docs/BugLifeCycle.md
R llvm/docs/BugLifeCycle.rst
A llvm/docs/CIBestPractices.md
R llvm/docs/CIBestPractices.rst
A llvm/docs/CodeReview.md
R llvm/docs/CodeReview.rst
A llvm/docs/ConvergenceAndUniformity.md
R llvm/docs/ConvergenceAndUniformity.rst
A llvm/docs/ConvergentOperations.md
R llvm/docs/ConvergentOperations.rst
A llvm/docs/DependenceGraphs/index.md
R llvm/docs/DependenceGraphs/index.rst
A llvm/docs/FaultMaps.md
R llvm/docs/FaultMaps.rst
A llvm/docs/FuzzingLLVM.md
R llvm/docs/FuzzingLLVM.rst
A llvm/docs/GetElementPtr.md
R llvm/docs/GetElementPtr.rst
A llvm/docs/GitBisecting.md
R llvm/docs/GitBisecting.rst
A llvm/docs/GitHubActionsRunners.md
R llvm/docs/GitHubActionsRunners.rst
A llvm/docs/GwpAsan.md
R llvm/docs/GwpAsan.rst
A llvm/docs/HowToAddABuilder.md
R llvm/docs/HowToAddABuilder.rst
A llvm/docs/HowToReleaseLLVM.md
R llvm/docs/HowToReleaseLLVM.rst
A llvm/docs/HowToSetUpLLVMStyleRTTI.md
R llvm/docs/HowToSetUpLLVMStyleRTTI.rst
A llvm/docs/HowToSubmitABug.md
R llvm/docs/HowToSubmitABug.rst
A llvm/docs/HowToUseInstrMappings.md
R llvm/docs/HowToUseInstrMappings.rst
A llvm/docs/InAlloca.md
R llvm/docs/InAlloca.rst
A llvm/docs/InterfaceExportAnnotations.md
R llvm/docs/InterfaceExportAnnotations.rst
A llvm/docs/KernelInfo.md
R llvm/docs/KernelInfo.rst
M llvm/docs/Lexicon.md
A llvm/docs/LoopFusion.md
R llvm/docs/LoopFusion.rst
A llvm/docs/MLGO.md
R llvm/docs/MLGO.rst
M llvm/docs/ScudoHardenedAllocator.md
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.md
Log Message:
-----------
[LLVM][docs] Rename remaining reST docs to Markdown (batch 10) (#223097)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
The stacked conversion and cleanup is in #223099.
Commit: 780a95c64f186810c24caa1fe66fa7a1dc138f74
https://github.com/llvm/llvm-project/commit/780a95c64f186810c24caa1fe66fa7a1dc138f74
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/AlignedBundling.md
M llvm/docs/BlockFrequencyTerminology.md
M llvm/docs/BranchWeightMetadata.md
M llvm/docs/BugLifeCycle.md
M llvm/docs/CIBestPractices.md
M llvm/docs/CodeReview.md
M llvm/docs/ConvergenceAndUniformity.md
M llvm/docs/ConvergentOperations.md
M llvm/docs/DependenceGraphs/index.md
M llvm/docs/FaultMaps.md
M llvm/docs/FuzzingLLVM.md
M llvm/docs/GetElementPtr.md
M llvm/docs/GitBisecting.md
M llvm/docs/GitHubActionsRunners.md
M llvm/docs/GwpAsan.md
M llvm/docs/HowToAddABuilder.md
M llvm/docs/HowToReleaseLLVM.md
M llvm/docs/HowToSetUpLLVMStyleRTTI.md
M llvm/docs/HowToSubmitABug.md
M llvm/docs/HowToUseInstrMappings.md
M llvm/docs/InAlloca.md
M llvm/docs/InterfaceExportAnnotations.md
M llvm/docs/KernelInfo.md
M llvm/docs/LoopFusion.md
M llvm/docs/MLGO.md
Log Message:
-----------
[LLVM][docs] Finish MyST migration for remaining docs (batch 10) (#223099)
Migration notes:
- Removed accidental blockquotes around lists and code blocks.
- Used `eval-rst` in `ConvergentOperations` because native Markdown
ordered lists only preserve numeric markers.
- Lots of table conversions to different kinds of tables. I tried to use
list-table and pipe tables in the appropriate places.
- Removed local contents directive in `GitHubActionsRunners` because it
caused a Furo warning.
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #223097, which is a standalone commit that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
This was prepared with rst2myst plus LLM-assisted cleanup.
Assisted-by: Codex
Commit: 6dc4a4ba2850369afd537001377fb9d404653d26
https://github.com/llvm/llvm-project/commit/6dc4a4ba2850369afd537001377fb9d404653d26
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
Log Message:
-----------
[lldb][Windows] Cap the loader helper's one-thread timeout at 5s (#226171)
llvm/llvm-project#215593 replaced the 5s cap from
llvm/llvm-project#213010 with `utility-expression-timeout / 2`. The
test suite sets that to 600s, so the `LoadLibrary` helper runs with
every other inferior thread suspended for up to 300s.
A Swift concurrency inferior cannot finish the load single-threaded, so
it waits for the whole budget before the "all threads" retry succeeds.
This fixes test timeouts in swiftlang.
Commit: b0dac3939e1fee6db11876257f2870fd5a26585a
https://github.com/llvm/llvm-project/commit/b0dac3939e1fee6db11876257f2870fd5a26585a
Author: Thomas Köppe <tkoeppe at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
A openmp/runtime/test/affinity/no_leak_with_disabled.c
Log Message:
-----------
[clang] [OpenMP] Memory leaks in OpenMP when affinity is disabled (#225441)
When running with `KMP_AFFINITY=disabled`, there are two places in the
OpenMP codebase that currently leak memory.
Found by the ASAN leak sanitizer.
Commit: 4a6eb1417cafc6361cf49870cf9f0df716e3709a
https://github.com/llvm/llvm-project/commit/4a6eb1417cafc6361cf49870cf9f0df716e3709a
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/wide-load-reduction.ll
Log Message:
-----------
[SLP] Add new test for usage of getRegUsageForType() (#226276)
Creates a large vector reduction where the vector width is larger than
the entire vector register file.
Commit: af516e6391f926cbc81e07a7bb88c95271b08c65
https://github.com/llvm/llvm-project/commit/af516e6391f926cbc81e07a7bb88c95271b08c65
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
Log Message:
-----------
[lldb][FreeBSDKernel] Support cross-architecture FreeBSD kernel cores (#224800)
FreeBSD's kvm_open(3) man page states that a valid resolver is required
to debug non-native kernel images as libkvm needs to map symbol names to
kernel virtual addresses. Since ProcessFreeBSDKernelCore aims to debug
kernel image and core dump from any architectures, pass a valid resolver
to kvm_open2().
Assisted-by: GPT
Commit: d9e8ad1dc8af2c478f9580e95b81f4cd54a9c6b7
https://github.com/llvm/llvm-project/commit/d9e8ad1dc8af2c478f9580e95b81f4cd54a9c6b7
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonBitTracker.cpp
Log Message:
-----------
[Hexagon] Use MCRegisterClass::hasSubClassEq in HexagonBitTracker. NFCI. (#226110)
This avoids depending on the exact names of synthesized register classes
(motivated by #225809 which will change some of these) and generally
feels more future-proof.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: fb6bc7fd73b3881b50453a5ffb52e5c00ae590f1
https://github.com/llvm/llvm-project/commit/fb6bc7fd73b3881b50453a5ffb52e5c00ae590f1
Author: Florian Mayer <fmayer at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
R openmp/runtime/test/affinity/no_leak_with_disabled.c
Log Message:
-----------
Revert "[clang] [OpenMP] Memory leaks in OpenMP when affinity is disabled" (#226292)
Reverts llvm/llvm-project#225441
Commit: f26431d1e224f1e704fc167c2f509e4221e04220
https://github.com/llvm/llvm-project/commit/f26431d1e224f1e704fc167c2f509e4221e04220
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
Log Message:
-----------
[lldb][test] Strip the MTE tag in TestExpeditedRecentReads (#226272)
When the inferior runs with MTE enabled, both heap cases in
`TestExpeditedRecentReads.py` fail at their first stop:
```
AssertionError: [] == [] : the first stop should read the heap buffer from the stub; reads: [0x104da8a00,0x104da8c00)
AssertionError: [] == [] : the first stop should read the heap buffer from the stub; reads: [0x1047acb30,0x1047acb38), [0x1047acb30,0x1047acb38), ...
```
lldb did read the heap buffer. `calloc` returns a pointer with an MTE
tag in its top byte, and lldb strips the tag before it reads memory:
```
(lldb) breakpoint set -p "break here" -f main.c
(lldb) process launch --memory-tagging
...
(lldb) frame variable heap
(Payload *) heap = 0x0b000001005b0b30
(lldb) script v = lldb.frame.FindVariable("heap"); print("GetValueAsUnsigned: 0x%x" % v.GetValueAsUnsigned(0)); print("GetValueAsAddress: 0x%x" % v.GetValueAsAddress())
GetValueAsUnsigned: 0xb000001005b0b30
GetValueAsAddress: 0x1005b0b30
```
Reading `heap->values[0]` then sends `x1005b0a00,200`, which reads the
untagged address. `heap_range` takes the address from
`GetValueAsUnsigned`, which keeps the tag, so `covering` never matches
a read. Use `GetValueAsAddress`, which returns the address with the
non-addressable bits cleared.
Assisted-by: claude
Commit: d01d1da97442654ca837893d46c4b50463473687
https://github.com/llvm/llvm-project/commit/d01d1da97442654ca837893d46c4b50463473687
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/test/API/macosx/expedited-stack-memory/main.c
Log Message:
-----------
[lldb][test] Run TestExpeditedStackMemory's call chain on a new thread (#226248)
`test_memory_reads_when_examining_all_frames_locals` fails on some
machine,
```
AssertionError: 0 not greater than 0 : expected stack memory reads while examining deeper frames' stack-resident locals.
memory reads while examining locals: stack=0 heap=1 other=1 (total=2)
```
In the packet log of one run, lldb stops at dyld's `lldb_image_notifier`
before `main` runs, and reads image info array is on the main thread's
stack,
and lldb reads one cache line (512 bytes) in one go.
Due to the new feature #223417, debugserver keeps this range as a recent
read and sends it again at later stops. At the breakpoint in `func_e`,
`jThreadsInfo` also sends the recent reads, which cover the call chain's
stack by accident, so lldb reads every local on every frame from its
cache
and the walk sends no stack read. That is why test failed.
Run the call chain on a new thread. No stop before the breakpoint reads
that thread's stack, so a recent read cannot cover the frames under
test.
Assisted-by: claude
Commit: 51fe9ce8248d783bb6b3b96fe883dd8cd05642ad
https://github.com/llvm/llvm-project/commit/51fe9ce8248d783bb6b3b96fe883dd8cd05642ad
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-call-frame-dead-eflags.ll
Log Message:
-----------
X86: Mark the EFLAGS def of the FastISel call frame pseudos dead (#226281)
ADJCALLSTACKDOWN/UP are declared to clobber EFLAGS because they may
expand to a sub/add, but nothing reads the result. SelectionDAG's InstrEmitter
marks the def dead.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5b47a7c81c5518f5c603a9203a23beed869d00f5
https://github.com/llvm/llvm-project/commit/5b47a7c81c5518f5c603a9203a23beed869d00f5
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SCCPSolver.cpp
A llvm/test/Transforms/SCCP/fastmath-flags.ll
Log Message:
-----------
[SCCP] Call correct simplifyBinOp in FP operation (#225992)
This simplify FPOps with correct FMF, which covers non-inlined functions
that can not be simplified by InstComb pass.
Commit: f33b28a6979d6db40096da872befbf923357c322
https://github.com/llvm/llvm-project/commit/f33b28a6979d6db40096da872befbf923357c322
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Utility/Policy.cpp
M lldb/unittests/Utility/PolicyTest.cpp
Log Message:
-----------
[lldb] Consult Policy for expression evaluation capabilities (#225312)
`can_evaluate_expressions`, `can_run_all_threads` and
`can_try_all_threads` have been unused since 3fe311f215d0 added them:
nothing outside `Policy.h` and its unit test ever read them.
Two of them already had a hand-rolled equivalent, though.
`Target::EvaluateExpression` forces single-threaded execution while a
frame provider is active, which is what the two thread capabilities
describe. That check predates them by six weeks (e1cd55879b5f) and the
adoption patch never came back for it. Living in `Target` also means it
only sees expressions that go through `Target`, not the ones coming from
`FunctionCaller` or `IRInterpreter`.
This patch changes that to consult the capabilities where the decision
is actually made: `UserExpression::Evaluate` for
`can_evaluate_expressions`, and `RunThreadPlan` for the other two. The
Target check goes away.
`RunThreadPlan` refuses rather than rewrites. Clearing stop-others asks
for the other threads, and since that option defaults to true, clearing
it is deliberate, so it errors instead of being silently turned back on.
Asking for the all-threads retry is refused the same way. The retry is
still switched off quietly when the caller never asked for it, since
that option defaults to on and so says nothing about intent.
It also checks the thread capabilities in `CreateScriptedExtensionCall`
rather than somewhere frame-provider specific. Not altering the state
you were asked to describe applies to any extension the debugger calls
into, so this increases the scope of the check it replaces: synthetic
children, OS plugin thread lists and scripted thread plans are now
covered too.
Since scripted commands set `UserCanRunDirectly` to true, the
`ScriptedExtensionCall` policy never gets pushed, so these expression
evaluation capabilities are kept and that is the behavior we want: the
user invoked the command directly, so there is no debugger operation
already in flight whose state it could alter.
rdar://176223894
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 590116564fd9045db6a950102dd772e864a6a9fc
https://github.com/llvm/llvm-project/commit/590116564fd9045db6a950102dd772e864a6a9fc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/tools/llc/lib/llcdriver.cpp
Log Message:
-----------
llc: Compute the DataLayout from the triple and ABI (#224576)
This is the minimum change to avoid createDataLayout. Future work
will be needed here to really drop use of the ABIName field.
Commit: 4bd5979264ba739f8cb266b90c40e519eb7f3008
https://github.com/llvm/llvm-project/commit/4bd5979264ba739f8cb266b90c40e519eb7f3008
Author: Joe Nash <joseph.nash at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
A llvm/test/CodeGen/AMDGPU/vopd3-f64-opy-last-vgpr-gfx1250.mir
Log Message:
-----------
[AMDGPU] Work around gfx1250 VOPD3 FP64 OPY hazard (#224741)
In a VOPD3 instruction whose OPX is a 64-bit operation, an OPY VGPR
source operand reads back the wrong value when it is the last VGPR the
wave owns.
A wave always owns a whole number of VGPR allocation granules, 16
registers each on gfx1250, so the last VGPR it owns is always the one
just below a granule boundary. Reject a pair whose OPY reads such a
register in checkVOPDRegConstraints, leaving the two components as
separate instructions.
VOPD is only an optimization, so losing a pairing is always safe.
The workaround is gated on a new vopd3-f64-opy-src-hazard subtarget
feature, enabled for gfx1250, gfx1251, gfx1250-strict.
Assisted-by: Claude Code:claude-opus-5
Commit: fed2b1df79fc9e0668093c8e91aaf9b85ce1d5da
https://github.com/llvm/llvm-project/commit/fed2b1df79fc9e0668093c8e91aaf9b85ce1d5da
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/CodeGen/RISCV/machine-sink-jumptable-edge-split.ll
Log Message:
-----------
[RISCV] Add RUN lines for other code-models and PIC to machine-sink-jumptable-edge-split.ll. NFC (#226235)
Commit: b4fafec40e20f1de3b672f5354529063ef8acc74
https://github.com/llvm/llvm-project/commit/b4fafec40e20f1de3b672f5354529063ef8acc74
Author: Scott Manley <rscottmanley at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Builder/IntrinsicCall.cpp
A flang/test/Lower/Intrinsics/mvbits-unsigned.f90
Log Message:
-----------
[flang] Convert unsigned MVBITS TO values before arith ops (#226189)
Load TO with its memory type and insert fir.convert to a signless
integer instead of a typed fir.load whose result type does not match the
referent. Mem2Reg otherwise forwards the stored unsigned value into
arith.andi, which only accepts signless integers.
Previously, MVBITS of UNSIGNED lowered TO as:
```
%to = fir.load %addr : !fir.ref<ui8> // result type i8
%and = arith.andi %mask, %to : i8
```
Generic form:
```
%to = "fir.load"(%addr) : (!fir.ref<ui8>) -> i8
```
Commit: d051060325e27aba3536419925f985321e441db9
https://github.com/llvm/llvm-project/commit/d051060325e27aba3536419925f985321e441db9
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaDeclCXX.cpp
A clang/test/CodeGenCXX/GH176161.cpp
M clang/test/SemaCXX/paren-list-agg-init.cpp
Log Message:
-----------
[Clang] Re-analyze parenthesized aggregate mem-initializers on instantiation (#224918)
Fixes #176161
Fixes #189005
Fixes #213284
Since #138518, template instantiation keeps a parenthesized aggregate
initialization as a `CXXParenListInitExpr`, but its elements have
already been reverted to their written form (a braced list stays a
braced list, an implicit cast is stripped), so whoever consumes the node
has to redo the initialization from them. Variable initializers,
new-expressions and functional casts do that. `BuildMemberInitializer`
didn't: it took the whole node as one argument, guaranteed elision
accepted it as-is, and the constructor ended up with a member
initializer that was never analyzed. Depending on the shape that's the
`EmitAggExpr` assertion (#176161, #189005), a `0` stored as 32 bits into
a 64-bit field (#213284), a rejected valid array member like `arr(1,
2)`, or a union member silently left uninitialized. Clang 20 handled all
of these. The lambda and local class in #176161 are incidental; a plain
class template reproduces it.
`BuildMemberInitializer` now treats a `CXXParenListInitExpr` the way it
treats a `ParenListExpr` and performs the initialization from the
user-specified elements. Using only those elements (not the trailing
default-member-initializer and value-initialization ones Sema appends)
means they get rebuilt for the instantiated class rather than fed back
in as arguments. This mirrors what #141342 did for variable initializers
and #142988 for new-expressions, and supersedes #213565.
Commit: 482bb48e9dd8c2b69bec4923d94252f88a7bff5e
https://github.com/llvm/llvm-project/commit/482bb48e9dd8c2b69bec4923d94252f88a7bff5e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll
Log Message:
-----------
[SCEV] Handle PtrToAddrExpr in SCEVLoopGuardRewriter. (#226228)
Adding support for PtrToAddr to loop guard rewriting was missed during
the initial bring-up.
Fixes https://github.com/llvm/llvm-project/issues/225918.
PR: https://github.com/llvm/llvm-project/pull/226228
Commit: ef8d9d19fb232076b7a2070860666a65a2cf563e
https://github.com/llvm/llvm-project/commit/ef8d9d19fb232076b7a2070860666a65a2cf563e
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_globals_win.cpp
M compiler-rt/lib/asan/asan_win.cpp
M compiler-rt/lib/asan/asan_win_common_runtime_thunk.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_defs.h
M compiler-rt/lib/sanitizer_common/sanitizer_win_thunk_interception.cpp
Log Message:
-----------
[compiler-rt] Retain sanitizer callbacks with MinGW GCC (#222711)
MSVC and clang-cl use /include directives emitted by WIN_FORCE_LINK. GNU
tools need an ordinary used relocation instead. Keep the sanitizer
initialization callbacks and ASan DSO registration object reachable when
linking with MinGW GCC.
---------
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 16d88a5e65b141b4ecf7a237c6104e1425a335d9
https://github.com/llvm/llvm-project/commit/16d88a5e65b141b4ecf7a237c6104e1425a335d9
Author: oltolm <oleg.tolmatcev at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M compiler-rt/lib/asan/asan_win.cpp
Log Message:
-----------
[compiler-rt][asan] Use native TLS for TSD on Windows (#222705)
GCC 16 supports native Windows TLS. Use compiler-rt's THREADLOCAL
abstraction for fake_tsd on all compilers instead of spelling the
MSVC-specific storage-class syntax directly. GCC configurations using
emulated TLS remain unsupported.
Co-authored-by: Hannes Domani <ssbssa at yahoo.de>
Commit: 2b8362fe2e2a04c8905d445fb5e7407dda32e742
https://github.com/llvm/llvm-project/commit/2b8362fe2e2a04c8905d445fb5e7407dda32e742
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M libsycl/src/CMakeLists.txt
A libsycl/test/basic/linux-rpath.test
M libsycl/test/lit.cfg.py
Log Message:
-----------
[libsycl] Add $ORIGIN to RPATH for libLLVMSYCL (#224885)
Previously, libLLVMSYCL was built and installed without $ORIGIN set in
RPATH on ELF systems. This resulted in load failures due to failure to
find libLLVMOffload when LD_LIBRARY_PATH was not set. This change adds
$ORIGIN to RPATH both when building libLLVMSYCL in a build tree, and
when installing libLLVMSYCL in an install tree.
Commit: 9c0f5509f959b0d44e2f2395bb5ef8e89eacac0b
https://github.com/llvm/llvm-project/commit/9c0f5509f959b0d44e2f2395bb5ef8e89eacac0b
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/Sema/HeuristicResolver.cpp
M clang/unittests/Sema/HeuristicResolverTest.cpp
Log Message:
-----------
[clang][HeuristicResolver] Resolve more dependent member accesses (#223667)
`HeuristicResolver` already falls back to a template parameter's default
argument when there is nothing else it can do with the parameter, but it
only did so when it met the parameter directly. Two common ways of
arriving at one were missed, both of which occur in `std::vector`:
- through a dependent name — libstdc++ has `typedef _Alloc
allocator_type;`, so `std::vector<T>::allocator_type` resolves to a bare
template parameter;
- through the sugar of the member typedef itself, e.g. when it is the
declared return type of a member function.
Neither can be done on a canonicalized type: a canonical
`TemplateTypeParmType` does not retain its `TemplateTypeParmDecl` (see
`ASTContext::getTemplateTypeParmType()`), so there is no default
argument left to consult. The typedef's underlying type as written is
consulted instead.
A separate gap shows up on the same example. A member re-exported from a
dependent base class by a using declaration, such as libstdc++'s `using
_Base::get_allocator;`, is found as an `UnresolvedUsingValueDecl`, which
has no function type of its own, so `resolveTypeOfCallExpr()` could not
determine the type of a call to it. Such a declaration is now resolved
to what it names, using the existing `resolveUsingValueDecl()`.
Together these make code completion work for, for example:
```c++
template <class T> void f(std::vector<T> &v) {
typename std::vector<T>::allocator_type al = v.get_allocator();
al. // now offers std::allocator's members
}
```
Tests are also added for cases the heuristic does not get right, so that
they are recorded and will be noticed if that ever changes: a parameter
whose default argument is not the one we end up looking at, because
looking a name up in a base class's primary template discards the
arguments the derived class passes to it; and an explicitly provided
template argument being ignored in favour of the default. Tests
asserting that a name does not resolve now state whether that is the
desired behaviour or a limitation worth lifting.
Commit: 2cd5243774ef4d825d7118b39ec1085d39a7bbe7
https://github.com/llvm/llvm-project/commit/2cd5243774ef4d825d7118b39ec1085d39a7bbe7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/test/CodeGen/AArch64/constant-pool-partition.ll
M llvm/test/CodeGen/AArch64/jump-table-partition.ll
M llvm/test/CodeGen/X86/global-variable-partition.ll
Log Message:
-----------
[StaticDataLayout] Add option to control the emission of .hot suffix (#226239)
We have not thoroughly studied the impact of separating out lukewarm/hot
data into separate sections. This option gives us a way to consolidate
the sections and enables easy experimentation.
Co-Authored-By: Mingming Liu <mingmingl at google.com>
Commit: 8bff8fbc71f43a1f721aa6403e0e66e913c05395
https://github.com/llvm/llvm-project/commit/8bff8fbc71f43a1f721aa6403e0e66e913c05395
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/test/CodeGen/X86/global-variable-partition-with-dap.ll
M llvm/test/Transforms/PGOProfile/data-access-profile.ll
Log Message:
-----------
[StaticDataLayout] Enable string literal partitioning by default (#225928)
We have started to roll this out internally, so enable it by default
upstream as well. This will enable seamless removal of the flag
internally with respect to our release process.
Commit: 0326d5ca1c402a0295c5115a51a1ba080f94a9c5
https://github.com/llvm/llvm-project/commit/0326d5ca1c402a0295c5115a51a1ba080f94a9c5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/countable-early-exit-no-epilogue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
Log Message:
-----------
[LV] Add more tests with low trip counts. (NFC) (#226298)
Add additional tests with low trip counts where TC == VF.
Commit: 92289bdbced90ccc9f63da0c7fdaa71879c70964
https://github.com/llvm/llvm-project/commit/92289bdbced90ccc9f63da0c7fdaa71879c70964
Author: Thomas Köppe <tkoeppe at google.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_affinity.cpp
M openmp/runtime/src/kmp_affinity.h
A openmp/runtime/test/affinity/no_leak_with_disabled.c
Log Message:
-----------
[Clang][OpenMP] Reapply "Memory leaks in OpenMP when affinity is disabled" (#226292) (#226294)
The previous version was applying a compiler flag to the smoke test
that would result in an unrunnable binary on non-ARM platforms. The
intention is for ASAN on ARM to run, and we get that by just not
specifying any flags and relying on the test system to include this
platform.
Commit: f9d25d67d4f7a5b9c37047306a700b234fd6c2c8
https://github.com/llvm/llvm-project/commit/f9d25d67d4f7a5b9c37047306a700b234fd6c2c8
Author: Minsoo Choo <minsoo at minsoo.io>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
Log Message:
-----------
[lldb][FreeBSD] Adopt file_t for closeFile() (#226290)
Fixes: ae82b85123a2271df24ceb28c09a2a0c467c16d5
Commit: 4010c1ac00e25464ecc7e20950cba84edd0e3880
https://github.com/llvm/llvm-project/commit/4010c1ac00e25464ecc7e20950cba84edd0e3880
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpImplementation.h
M mlir/lib/IR/AsmPrinter.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
M mlir/tools/mlir-tblgen/OpFormatGen.cpp
Log Message:
-----------
[MLIR] Reduce generated assembly printer compile time (NFC) (#225740)
Use fixed arrays for statically elided attributes and combine leading
spaces with literals. Move common operand printing out of generated call
sites and emit sliced operand getters to reduce optimizer work in large
printers.
For omp.target, optimized print IR drops from 3,893 to 2,667
instructions.
Assisted-by: Codex
Commit: a858e5ebb33c3988ac593cefe4593040029169b4
https://github.com/llvm/llvm-project/commit/a858e5ebb33c3988ac593cefe4593040029169b4
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
Log Message:
-----------
[LV] Add tests showing incorrect flags for sub inductions (NFC). (#226301)
Add tests showing incorrect NUW/NSW flags preserved on wide induction
where the induction step uses sub.
Tests for https://github.com/llvm/llvm-project/issues/224024.
Commit: 5e7f66672867f3ccf23baa6156d16ec4541de29b
https://github.com/llvm/llvm-project/commit/5e7f66672867f3ccf23baa6156d16ec4541de29b
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OperationSupport.h
M mlir/lib/IR/OperationSupport.cpp
M mlir/test/mlir-tblgen/op-decl-and-defs.td
M mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Log Message:
-----------
[mlir][ODS] Share generated legacy property splitting (NFC) (#226085)
Route generated legacy builder attributes through an out-of-line helper
that partitions inherent and discardable attributes before converting
properties. This avoids compiling the same loop and error path for every
operation.
Assisted-by: Codex
Commit: 45ea3b957284d8940b109b6b6706f451e9719ef9
https://github.com/llvm/llvm-project/commit/45ea3b957284d8940b109b6b6706f451e9719ef9
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/CodeGenHLSL/builtins/InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
A clang/test/SemaHLSL/BuiltIns/ByteAddressBuffer-InterlockedExchangeFloat-sm60.hlsl
M clang/test/SemaHLSL/BuiltIns/InterlockedExchange-errors.hlsl
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
A llvm/test/CodeGen/DirectX/LegalizeAtomicExchangeFloat-unsupported-width.ll
A llvm/test/CodeGen/DirectX/LegalizeAtomicExchangeFloat.ll
M llvm/test/CodeGen/DirectX/ResourceAtomicBinOp-texture-nonscalar.ll
A llvm/test/CodeGen/DirectX/ResourceAtomicExchangeFloat.ll
Log Message:
-----------
[HLSL] Add float overload for `InterlockedExchange` (#222163)
This PR adds the float overload of `InterlockedExchange`, and the
`InterlockedExchangeFloat` method on `RWByteAddressBuffer` and
`RasterizerOrderedByteAddressBuffer`.
The HLSL interlocked builtins are declared with a variadic type in
`Builtins.td`, so Clang applies the default argument promotions to their
arguments. That promotion turns a `float` argument into a `double`
before Sema
sees it. The Sema check then rejects the call and names the type as
`'double'`
in the diagnostic, which does not match what the user wrote.
`CustomTypeChecking` suppresses that promotion, so the argument keeps
its
`float` type and the diagnostic names it correctly.
Only the builtins that can see a float argument need the attribute. This
PR
sets it on `__builtin_hlsl_interlocked_exchange` alone. The later float
builtins in this stack set it as they are added. The integer-only
builtins do
not set it, because they never see a float and the promotion cannot
affect
them.
Fixes: https://github.com/llvm/llvm-project/issues/99129
Assisted by: Github Copilot
Commit: 3a4d4104528d44e1bae74464f8a104d7ee86a7ac
https://github.com/llvm/llvm-project/commit/3a4d4104528d44e1bae74464f8a104d7ee86a7ac
Author: Ivan R. Ivanov <iivanov at nvidia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M offload/include/OpenMP/OMPT/Callback.h
M offload/include/OpenMP/OMPT/Interface.h
M offload/include/device.h
M offload/liboffload/src/OffloadImpl.cpp
M offload/libompaccsupport/PluginManager.cpp
M offload/libompaccsupport/device.cpp
M offload/libomptarget/OffloadRTL.cpp
M offload/libomptarget/OpenMP/OMPT/Callback.cpp
M offload/plugins-nextgen/amdgpu/src/rtl.cpp
M offload/plugins-nextgen/common/include/PluginInterface.h
M offload/plugins-nextgen/common/src/PluginInterface.cpp
M offload/plugins-nextgen/cuda/src/rtl.cpp
M offload/plugins-nextgen/host/src/rtl.cpp
Log Message:
-----------
[offload] Extract OMPT out of PluginInterface (#221726)
Some of the OMPT callbacks, namely the device lifetime and image related
ones, lived in the generic PluginInterface even though they are OpenMP
specific. This patch extracts them out to the PluginManager, and removes
some device ID tracking functionality which was only necessary for
OpenMP from PluginInterface. The OpenMP device ID mapping should live
only in libomptarget.
Commit: 16cbe80f1d294451026cc79d25754e98172d4d1f
https://github.com/llvm/llvm-project/commit/16cbe80f1d294451026cc79d25754e98172d4d1f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.mir
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.mir
M llvm/test/CodeGen/AMDGPU/i1-divergent-phi-fix-sgpr-copies-assert.mir
M llvm/test/CodeGen/AMDGPU/lower-i1-copies-clear-kills.mir
M llvm/test/CodeGen/AMDGPU/lower-i1-copies-implicit-def-unstructured-loop.mir
M llvm/test/CodeGen/AMDGPU/mmra.ll
M llvm/test/CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies-order-of-phi-incomings.mir
M llvm/test/CodeGen/AMDGPU/si-lower-i1-copies.mir
Log Message:
-----------
AMDGPU: Mark the SCC def dead when merging lane masks (#226282)
The scalar and/or/xor used to merge a lane mask with EXEC clobber SCC,
but nothing reads the result. Avoid depending on later dead flag inference.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 25ba11d9dd3053d82af538e8b2cd7d449dcc867c
https://github.com/llvm/llvm-project/commit/25ba11d9dd3053d82af538e8b2cd7d449dcc867c
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/OpDefinition.h
Log Message:
-----------
[mlir] Constant-initialize registered operation hook tables (NFC) (#226320)
Make the generic operation hook accessors constexpr so registered
operation hook tables can be constant-initialized. Keep the table
declared static const to support non-constexpr downstream overrides.
In OpenMPDialect.cpp this removes 72 initialization guards and 10,368
bytes of object text, and saves about 0.56B compiler instructions.
Assisted-by: Codex
Commit: ec32f94a2d5f871624fce2e0c51c4902ee02ec15
https://github.com/llvm/llvm-project/commit/ec32f94a2d5f871624fce2e0c51c4902ee02ec15
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Add -show-jit-result option (#226149)
Add a -show-jit-result option that prints the int result of the JIT'd
main / entry function to stdout as:
JIT result: <return value>
This makes the result of the JIT'd main / entry function FileCheck-able,
and distinguishable from an llvm-jitlink failure.
This will be used in upcoming ORC runtime tests.
Since we don't currently run code under llvm-jitlink in LLVM regression
tests, this commit does not include an LLVM-side test.
Commit: 0d049f14804d436b12d81846de00c45516541f0b
https://github.com/llvm/llvm-project/commit/0d049f14804d436b12d81846de00c45516541f0b
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/AllocationOrder.h
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/unittests/CodeGen/AllocationOrderTest.cpp
Log Message:
-----------
[RegAlloc] Add register allocation anti-hints infrastructure (#218071)
This PR adds a RA anti-hint mechanism. MachineRegisterInfo is extended
to track anti-hints
between vregs to try avoiding to be allocated on the same physical
register. AllocationOrder can
queries these and also allows the target reorder the allocation order
through the new
TargetRegisterInfo::applyRegAllocationAntiHints hook. The default
implementation moves
the anti-hinted registers to the end of the order, so they are only used
as a last option.
## Stack
PR **1/4**. Next: MIR serialization #218073.
Commit: 25485b3c4964ab704e7d4961b67ab2501fedbdbe
https://github.com/llvm/llvm-project/commit/25485b3c4964ab704e7d4961b67ab2501fedbdbe
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPTypeUtils.h
M llvm/test/Transforms/SLPVectorizer/RISCV/wide-load-reduction.ll
Log Message:
-----------
[SLP] Use getRegUsageForType() rather than getNumberOfParts() when determining reduction width (#226277)
`getRegUsageForType()` is more appropriate for comparison to total
number of registers. `getNumberOfParts()` is legalization cost based,
but in this situation, we are looking to make sure we don't create
vectors that are widen than the register file can handle.
Commit: 9d90850fe6b01d877a7d7559a097fd4e785b4f5a
https://github.com/llvm/llvm-project/commit/9d90850fe6b01d877a7d7559a097fd4e785b4f5a
Author: Zachary Yedidia <zyedidia at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/LFI.md
M llvm/lib/Target/X86/CMakeLists.txt
M llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.cpp
M llvm/lib/Target/X86/MCTargetDesc/X86MCLFIRewriter.h
M llvm/lib/Target/X86/X86.h
M llvm/lib/Target/X86/X86CodeGenPassBuilder.cpp
A llvm/lib/Target/X86/X86LFIRewritePass.cpp
M llvm/lib/Target/X86/X86PassRegistry.def
M llvm/lib/Target/X86/X86TargetMachine.cpp
A llvm/test/CodeGen/X86/lfi-align.ll
A llvm/test/MC/X86/LFI/control-flow-errors.s
A llvm/test/MC/X86/LFI/control-flow.s
Log Message:
-----------
[LFI][X86] Add control-flow rewrites (#210913)
This adds LFI rewrites for control-flow operations. All jumps and
calls are rewritten so that their target is both guaranteed to be within
the sandbox, and at an address that is a multiple of the bundle size.
When combined with bundling, this restricts control-flow to the sandbox
region.
With Intel MPK support, this can provide a complete sandbox. A future
patch will also introduce software-based memory sandboxing so that MPK
is not required for memory isolation.
Commit: 2428c10786f12f8e4e7bffa63b0393c137b031bb
https://github.com/llvm/llvm-project/commit/2428c10786f12f8e4e7bffa63b0393c137b031bb
Author: Greg Clayton <gclayton at fb.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
A llvm/test/tools/llvm-gsymutil/X86/macho-last-symbol-section-end.yaml
M llvm/tools/llvm-gsymutil/llvm-gsymutil.cpp
Log Message:
-----------
Improve llvm-gsymutil to set the end address correctly. (#225593)
When converting DWARF in llvm-gsymutil, if the last function info had no
size, it would set it to the end of the valid text ranges. This meant a
symbol could get a larger than necessary size in mach-o files. This
patch will set the address to the minimum of the last TextRanges or the
end of the section that contains the symbol.
Commit: 56e0b9a7d7acb82a2cc4499808277c388b1e4332
https://github.com/llvm/llvm-project/commit/56e0b9a7d7acb82a2cc4499808277c388b1e4332
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaProfileCompliance.cpp
Log Message:
-----------
[mlir][tosa] Use optnone for compliance initialization under HWAsan (#226310)
Similar to #223586, compiling the file is very slow when we enable
HWAsan internally. Mark the constructor with optnone under
LLVM_HWADDRESS_SANITIZER_BUILD to skip expensive optimization and
register allocation passes, bringing compilation time from 10+m to ~30s.
Commit: 73aa0db9662ca7e38337761076a622e8095011af
https://github.com/llvm/llvm-project/commit/73aa0db9662ca7e38337761076a622e8095011af
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A llvm/test/tools/llvm-readobj/ELF/RISCV/eflags-abi.test
M llvm/tools/llvm-readobj/ELFDumper.cpp
Log Message:
-----------
[RISCV][llvm-readobj] Treat RISC-V float ABI e_flags field as an enum (#226313)
EF_RISCV_FLOAT_ABI is a 2-bit field, not independent flag bits, so
printFlags needs to be told about the mask. Previously a quad-float ABI
object printed "single-float ABI, double-float ABI, quad-float ABI"
instead of just "quad-float ABI".
Co-Authored-By: Claude Sonnet 5 <noreply at anthropic.com>
Commit: eaddb12b0463d9baa048da856c21f50fa9bfc1cf
https://github.com/llvm/llvm-project/commit/eaddb12b0463d9baa048da856c21f50fa9bfc1cf
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
Log Message:
-----------
[RISCV] Make the getJumpTableIndex search more structured. NFC (#226266)
Instead of recursively searching through instructions with certain
opcodes, look for the specific patterns we use for jump tables.
I've added a few TODOs for Zilx and SHXADD_UW.
Commit: 2c6ac60714745ffc338e1b9664d10ec46212185b
https://github.com/llvm/llvm-project/commit/2c6ac60714745ffc338e1b9664d10ec46212185b
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Bufferization/Transforms/OneShotAnalysis.cpp
M mlir/test/Dialect/Tensor/one-shot-bufferize.mlir
M mlir/test/Dialect/Vector/one-shot-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Handle disjoint subsets in One-Shot Analysis (#224184)
Teach One-Shot Analysis to ignore RaW conflicts between provably
disjoint subset reads and writes. Trace aliasing reads back to subset
extraction ops to handle alias-only operations such as
tensor.extract_slice.
Add tensor and vector tests for disjoint, overlapping, and unknown
subsets.
Commit: 10e12674cb9c52611d1f3c3c4c92ce43b586b7fe
https://github.com/llvm/llvm-project/commit/10e12674cb9c52611d1f3c3c4c92ce43b586b7fe
Author: Ziliang Zhang <zzl.coding at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Linalg/Transforms/BufferizableOpInterfaceImpl.cpp
M mlir/test/Dialect/Linalg/one-shot-bufferize-analysis.mlir
M mlir/test/Dialect/Linalg/one-shot-bufferize.mlir
Log Message:
-----------
[mlir][bufferization] Support matching permutation maps in Linalg analysis (#226079)
Generalize `LinalgOpInterface::bufferizesToElementwiseAccess` to
recognize participating tensor operands with identical permutation
indexing maps, instead of requiring identity maps.
This enables in-place bufferization after loop interchange. Projected
and mismatching maps, reduction iterators, and sparse operands remain
conservatively rejected.
The tests cover the analysis decision as well as end-to-end
bufferization without an allocation or copy.
Commit: dd3534fd5af15575d0d8dea116740b2abb8f3328
https://github.com/llvm/llvm-project/commit/dd3534fd5af15575d0d8dea116740b2abb8f3328
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
R clang/test/ClangScanDeps/build-session-validation-relocated-modules.c
M clang/test/ClangScanDeps/modules-relocated-mm-macro.c
Log Message:
-----------
[clang][DepScan] Disable relocation checks (#225563)
This internally broke an incremental build. Disable while it gets
investigated.
This is partial revert of cf8597bd3b87
resolves: rdar://188026923
Commit: 051daff864822f9edcb05acb8ccb30852753dfc5
https://github.com/llvm/llvm-project/commit/051daff864822f9edcb05acb8ccb30852753dfc5
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M clang/docs/analyzer/checkers.md
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
A clang/test/Analysis/Checkers/WebKit/unborrowed-lambda-captures.cpp
Log Message:
-----------
[WebKit Checkers] Add alpha.webkit.UnborrowedLambdaCapturesChecker (#226288)
Like alpha.webkit.UnborrowedLocalVarsChecker, but for lambda captures.
This checker is pretty restrictive because, unlike a refcounted object,
a lifetime-dependent pointer/reference/view cannot be captured in an
escaping closure at all. Still, we permit capturing in a NOESCAPE
closure.
Commit: 6e687f8dea8825c52fc6f31459dabb0ee0c1d4bd
https://github.com/llvm/llvm-project/commit/6e687f8dea8825c52fc6f31459dabb0ee0c1d4bd
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MIRParser/MIParser.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
A llvm/test/CodeGen/MIR/AMDGPU/register-allocation-antihints-mir-print-parse.mir
Log Message:
-----------
[MIR][AMDGPU] Serialize register allocation anti-hints (#218073)
This PR adds MIR print and parse support for the register allocation
anti-hints through
a per vreg anti-hints: [ .. ] field in the registers: section. The
printer only emits
the anti-hint registers only when the it is non-empty to keep existing
tests unchanged.
## Stack
PR **2/4**. Depends on #218071. Next: Apply Occupancy-Aware allocation
anti-hints #218074.
Commit: 7ee53ccefc851c05f3183b1d2cc5bf811cdb62df
https://github.com/llvm/llvm-project/commit/7ee53ccefc851c05f3183b1d2cc5bf811cdb62df
Author: Helena Kotas <hekotas at microsoft.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
A clang/docs/HLSL/DynamicResources.md
M clang/docs/HLSL/HLSLDocs.md
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_detail.h
A clang/lib/Headers/hlsl/hlsl_resources.h
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
A clang/test/AST/HLSL/DynamicResources-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
A clang/test/CodeGenHLSL/resources/dynamic-resources.hlsl
M clang/test/SemaHLSL/Language/InitLists.hlsl
M clang/test/SemaHLSL/Resources/Textures-SampleCmpLevelZero.hlsl
A clang/test/SemaHLSL/Resources/dynamic-resources-availability.hlsl
A clang/test/SemaHLSL/Resources/dynamic-resources.hlsl
M llvm/utils/gn/secondary/clang/lib/Headers/BUILD.gn
Log Message:
-----------
[HLSL] Add support for dynamic resources (#221103)
Adds support for dynamic resources, also known as bindless or directly
indexed resources. The design is described in
https://github.com/llvm/wg-hlsl/issues/204.
The change adds:
- The `ResourceDescriptorHeap` and `SamplerDescriptorHeap` global
symbols, which expose the Shader Model 6.6 descriptor heaps.
- Internal `hlsl::__detail::heap_resource_info` and
`hlsl::__detail::heap_sampler_info` types, which are produced by
indexing the corresponding descriptor heap. HLSL resource and sampler
types can be implicitly constructed from these values.
- Constructors that accept the corresponding internal heap info type for
all currently implemented resource classes.
- Clang builtins `__builtin_hlsl_resource_handlefromheap` and
`__builtin_hlsl_resource_counterhandlefromheap` for creating resource
and counter handles from descriptor heap indices.
- Sema validation and return-type handling for the new builtins.
For DXIL, the built-in function is lowered to
`llvm.dx.resource.handlefromheap`. For SPIR-V, the built-ins are lowered
to `llvm.spv.resource.handlefromheap` and
`llvm.spv.resource.counterhandlefromheap`.
Fixes #133831
Assisted by GPT 5.6 Sol and Claude Opus 4.8.
Commit: 35f073eb07f641713513fefb1ae4f4a5eb0bc604
https://github.com/llvm/llvm-project/commit/35f073eb07f641713513fefb1ae4f4a5eb0bc604
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU] Fold a constant add/sub into the sudot4/sudot8 accumulator (#225322)
Fold a constant add into the accumulator operand of sudot4 and sudot8
when
clamping is disabled:
```
sudot(a, b, C1, false) + C2 -> sudot(a, b, C1 + C2, false)
```
Subtraction by a constant is canonicalized to addition of its negation.
Commit: 3243453c7b919c155a16e4e70e50d5f8417839d9
https://github.com/llvm/llvm-project/commit/3243453c7b919c155a16e4e70e50d5f8417839d9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/test-at-commit
Log Message:
-----------
[libc++] Take the benchmark testing configuration from the test suite (#226267)
Previously, we'd use the testing configuration (the .cfg.in file) from
the checked out test suite for the PR benchmarking, but we'd use the one
from `main` for the historical benchmarking. Since the config file is
logically part of the test suite (just like the rest of the Lit setup),
it makes more sense to take it from the checked-out test suite version.
Commit: 4880e16f73dfc25762a857b9c08ad2bd5c14c8e0
https://github.com/llvm/llvm-project/commit/4880e16f73dfc25762a857b9c08ad2bd5c14c8e0
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/sifive-interrupt-attr-err.ll
M llvm/test/CodeGen/RISCV/sifive-interrupt-attr.ll
M llvm/test/CodeGen/RISCV/sifive-interrupt-frame-flags.ll
A llvm/test/CodeGen/RISCV/sifive-interrupt-frame-pointer.ll
Log Message:
-----------
[RISCV] Support frame pointers in SiFive CLIC preemptible handlers (#221318)
This commit adds frame-pointer support for SiFive CLIC preemptible
handlers by using t0 to save mcause and mepc to dedicated stack slots in
both cases.
Commit: 8c237a2c9f979a7b8716ef1073d3a5a0558d1415
https://github.com/llvm/llvm-project/commit/8c237a2c9f979a7b8716ef1073d3a5a0558d1415
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx/build-at-commit/action.yml
Log Message:
-----------
[libc++] Run the PR benchmarking tooling from main (#226278)
Previously, we'd use the workflow file and machines.json from the main
branch, but the rest of the tools (e.g. build-at-commit) would be taken
from the PR head. This patch switches to using the tools from main and
only using the PR head's content for the actual code and benchmarks.
This should make it easier to evolve the tools and the workflow files
without breaking PR benchmarking for people who submit PRs from slightly
outdated bases.
Commit: f119c93418ebd6aa3a95b7346fe3f6c86fba57f7
https://github.com/llvm/llvm-project/commit/f119c93418ebd6aa3a95b7346fe3f6c86fba57f7
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Interpreter/CommandInterpreter.cpp
A lldb/test/Shell/ScriptInterpreter/Python/nested_command_selected_target.test
Log Message:
-----------
[lldb] Use the selected target when the override context is the dummy (#226332)
Commit: f91a3b1bcd7bb69634bc40da1f599daab2aea67c
https://github.com/llvm/llvm-project/commit/f91a3b1bcd7bb69634bc40da1f599daab2aea67c
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M bolt/test/X86/dwarf5-debug-names-skip-forward-decl.s
Log Message:
-----------
[BOLT,test] Add missing pipe in dwarf5-debug-names-skip-forward-decl.s (#226338)
With cl::Grouping, --check-prefix=POSTCHECK parses as -c -h..., so
llvm-dwarfdump prints --help and exits 0, and the checks never run.
Commit: b9123f788eb3e62c5cf18fd7d7b093dd3206b60d
https://github.com/llvm/llvm-project/commit/b9123f788eb3e62c5cf18fd7d7b093dd3206b60d
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[Support] Remove cl::Grouping (#224958)
This feature emulates POSIX's grouped short options in a non-perfect
way. https://reviews.llvm.org/D61270 made every single-character
cl::option implicitly group, leading to weird error message for `opt
-foo=bar`: `opt: for the -o option: may not occur within a group!`
Every tool (primarily binutils-style tools) has since migrated to
OptTable,
with llvm-cov gcov the last (#224955).
Delete this feature, which would block TableGen based representation.
LLM-aided
Commit: e9c56af6e91289a9be5604c74309638d685999be
https://github.com/llvm/llvm-project/commit/e9c56af6e91289a9be5604c74309638d685999be
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[GlobalISel] Fix segment size when narrowing G_INSERT (#226275)
When an inserted value starts inside a destination piece, bound the
overlap by the size of the inserted value. Including the offset from the
start of the piece can produce an extract wider than its source.
---------
Co-authored-by: Hongyu Chen <hongchen at nvidia.com>
Commit: 178caae5c39dbf9a03f52f9a3d7edc11d3b02405
https://github.com/llvm/llvm-project/commit/178caae5c39dbf9a03f52f9a3d7edc11d3b02405
Author: Syadus Sefat <42645939+mssefat at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.anti-hints.mir
Log Message:
-----------
[AMDGPU] Apply occupancy-aware register allocation anti-hints (#218074)
This PR overrides applyRegAllocationAntiHints in the SIRegisterInfo so
anti-hints
try to protect against occupancy regression. Changing of the allocation
order is
confined to the vgpr budget of the current occupancy. Reordering is
skipped when
the allocation is near the budget (80% of the target-occupancy vgpr
limit or 95%
of the current occupancy vgpr limit). Below this, the anti-hinted
registers are
moved behind the non-anti-hinted ones within the budget.
## Stack
PR **3/4**. Depends on #218073. Next: Add anti-hints in
GCNPreRAOptimizatioins #218075.
Commit: 007551bacb899a409218574908d96b0633d52018
https://github.com/llvm/llvm-project/commit/007551bacb899a409218574908d96b0633d52018
Author: Sudharsan Veeravalli <svs at qti.qualcomm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfo.h
Log Message:
-----------
[RISCV] Remove getInstSizeVerifyMode override (#226241)
Now that we generate the correct instruction sizes for the compressed
instructions we can remove this function override.
Commit: 3489ea3b567c719f497bfcf83348e27cfd79cdb7
https://github.com/llvm/llvm-project/commit/3489ea3b567c719f497bfcf83348e27cfd79cdb7
Author: Himadhith <hima130602 at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/no_locale/strtonum.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/src/support/win32/locale_win32.cpp
Log Message:
-----------
[libcxx][locale] Refactor strtonum functions using __str_to_float_c_locale<FloatT> (#222081)
Replace the 3 separate functions `__strtof`, `__strtod` and `__strtold`
with a single template `__str_to_float_c_locale<FloatT>` across
locale_base_api and all platform support headers. Since
`__str_to_float_c_locale<FloatT>` now does not need `__get_c_locale`
argument we can directly call it instead of `__do_strtod`.
This removes `__setAndRestore` from `aix.h` entirely as `__locale_guard`
is now used directly in the template specialisations to switch locales.
`num.h` is updated to call `__locale::__str_to_float_c_locale<T>`
uniformly across the 3 separate `__do_strtod` specialisation calls.
Additionally,
- linux.h, bsd_like.h, newlib.h delegate to the platform's native
`strtof_l`/`strtod_l`/`strtold_l`.
- openbsd.h, no_locale/strtonum.h call bare `strtof`, `strtod` and
`strtold` (no locale needed).
- windows.h, locale_win32.cpp's MSVCRT path inlines the 3 functions and
the non-MSVCRT path exports explicit specialisations from the library.
- Changes `__locale_guard` to take `__locale_t` by value now by removing
`&`.
- Forward declared the `__get_c_locale()` function as it's being used
well before the include.
---------
Co-authored-by: himadhith <himadhith.v at ibm.com>
Commit: 585df631037b5cf8d822b9d6de5abb74cf79d1f4
https://github.com/llvm/llvm-project/commit/585df631037b5cf8d822b9d6de5abb74cf79d1f4
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
A lldb/test/Shell/ObjectFile/wasm/data-segment-names.yaml
Log Message:
-----------
[lldb] Index Wasm data segment names by their entry's index (#226302)
ParseNames bounds-checked each data segment name entry's index but wrote
the name to the slot of the loop counter. A name subsection with more
entries than segments wrote past the end of the segment vector, and
entries listed out of order named the wrong segment.
rdar://186890690
Commit: 8e7254831f7793abbad795c203d4f1bbc47929b1
https://github.com/llvm/llvm-project/commit/8e7254831f7793abbad795c203d4f1bbc47929b1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/SocketConnector.h
M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/bedrock/SocketConnectorTest.cpp
Log Message:
-----------
[orc-rt] Reject non-socket descriptors in socket:adopt (#226354)
The socket connector now checks with getsockopt(SO_TYPE) that the
descriptor named by a socket:adopt spec is a socket before wrapping it
in a SocketHandle. Non-sockets (pipes, files, etc.) are rejected with an
error and left open. Sockets are claimed after verification so that they
can be closed on error paths (e.g. if GetAttachInfo fails).
Adds SocketConnectorTest.
Commit: 7a732b1ccfbf9694aad53817ebd47d29335590bc
https://github.com/llvm/llvm-project/commit/7a732b1ccfbf9694aad53817ebd47d29335590bc
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/cmake/OrcRTTesting.cmake
A orc-rt/test/regression/README.md
R orc-rt/test/regression/check-rt-process-info.test
R orc-rt/test/regression/darwin/lit.local.cfg
R orc-rt/test/regression/init.test
A orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
A orc-rt/test/regression/jit-free-foundations/lit.local.cfg
A orc-rt/test/regression/jit-free-foundations/logging/lit.local.cfg
A orc-rt/test/regression/jit-free-foundations/logging/os_log/delivery.test
A orc-rt/test/regression/jit-free-foundations/logging/os_log/lit.local.cfg
A orc-rt/test/regression/jit-free-foundations/logging/os_log/no-printf-output.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/bad-level.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/debug-compiled-out.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/debug-level.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/format.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/level-off.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/lit.local.cfg
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/output-redirect.test
A orc-rt/test/regression/jit-free-foundations/logging/printf-backend/runtime-level.test
A orc-rt/test/regression/jit-free-foundations/ogre-help.test
A orc-rt/test/regression/jit-free-foundations/smoke-check.test
A orc-rt/test/regression/languages/c/lit.local.cfg
A orc-rt/test/regression/languages/c/return-zero.c
R orc-rt/test/regression/linux/lit.local.cfg
M orc-rt/test/regression/lit.cfg.py
R orc-rt/test/regression/logging/lit.local.cfg
R orc-rt/test/regression/logging/os_log/delivery.test
R orc-rt/test/regression/logging/os_log/lit.local.cfg
R orc-rt/test/regression/logging/os_log/no-printf-output.test
R orc-rt/test/regression/logging/printf-backend/bad-level.test
R orc-rt/test/regression/logging/printf-backend/debug-compiled-out.test
R orc-rt/test/regression/logging/printf-backend/debug-level.test
R orc-rt/test/regression/logging/printf-backend/format.test
R orc-rt/test/regression/logging/printf-backend/level-off.test
R orc-rt/test/regression/logging/printf-backend/lit.local.cfg
R orc-rt/test/regression/logging/printf-backend/output-redirect.test
R orc-rt/test/regression/logging/printf-backend/runtime-level.test
A orc-rt/test/regression/object-formats/lit.local.cfg
A orc-rt/test/regression/object-formats/mach-o/arm64/lit.local.cfg
A orc-rt/test/regression/object-formats/mach-o/arm64/return-zero.s
A orc-rt/test/regression/object-formats/mach-o/lit.local.cfg
R orc-rt/test/regression/smoke-check.test
Log Message:
-----------
[orc-rt] Reorganize regression tests, add JIT'd code support (#226356)
Reorganize orc-rt/test/regression so that tests are placed by the
question they ask, rather than by the kind of input they use:
jit-free-foundations/ Tests of runtime facilities that can be
exercised without JIT'd code: ogre's command
line, process info, logging, and (in future)
connection lifecycle.
languages/<language>/ Tests that source-language constructs behave
correctly when JIT'd under the ORC runtime.
object-formats/<format>/<arch>/
Tests that object format features (e.g.
relocations, sections, and directives) are
handled correctly, written in assembly.
A README.md describes where tests should go, and the conventions for
writing them. Existing tests move into jit-free-foundations/, and
init.test is renamed to ogre-help.test to describe what it tests. The
darwin/ and linux/ directories are removed: they contained no tests, and
gated on the host rather than the runtime's target. Tests should gate on
features instead.
Add lit support for compiling and running JIT'd code:
%{jit} Runs its inputs under ogre, with llvm-jitlink as the
controller.
%{ogre} The path to ogre.
%{cc} Compiles C for the runtime's target.
%{cxx} Compiles C++ for the runtime's target.
%{mc} Assembles its input for the runtime's target, using
llvm-mc.
%{cc} and %{cxx} default to clang and clang++ from the LLVM tools
directory, and can be overridden with --param orc-rt-cc=<cc> and --param
orc-rt-cxx=<cxx> to test the runtime against output from other
compilers. %{mc} can't be overridden, so that object format tests always
check the runtime against the same assembler.
Tests that use these substitutions are gated on the llvm-jitlink,
llvm-mc, orc-rt-cc, and orc-rt-cxx features, so they are reported as
unsupported (rather than failing) when the tools aren't available.
clang, llvm-jitlink, and llvm-mc are added to the test dependencies if
they're being built alongside the runtime. Object format tests are also
gated on new target-arch=<arch> and target-object-format=<format>
features, derived from the runtime's target triple.
jit-free-foundations/ removes the %{cc}, %{cxx}, %{mc}, and %{jit}
substitutions, so that tests there can't accidentally depend on JIT'd
code.
Add languages/c/return-zero.c and object-formats/mach-o/arm64/
return-zero.s as the first tests that run JIT'd code, establishing the
pattern for each kind of test. They use llvm-jitlink's -show-jit-result
option to check that the JIT'd main actually ran and returned zero.
Commit: 79443248bd4a8bdb8ecfb0de94fa1e7bfb1b16f6
https://github.com/llvm/llvm-project/commit/79443248bd4a8bdb8ecfb0de94fa1e7bfb1b16f6
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/offload-arch/BUILD.gn
Log Message:
-----------
[gn] port 6bef34a7ebbef (#226362)
Commit: 1777581615ec7a7278b87c0a11445c05e34db066
https://github.com/llvm/llvm-project/commit/1777581615ec7a7278b87c0a11445c05e34db066
Author: Vaisman <vasili.svirski at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/test/Dialect/NVGPU/invalid.mlir
Log Message:
-----------
[mlir][nvgpu] Add negative tests for invalid FP8 warpgroup MMA types (#208047)
Add negative tests for invalid FP8 type combinations in
nvgpu.warpgroup.mma.
FP8 inputs are supported for f16/f32 accumulators, but the verifier
should still reject unsupported combinations such as FP8 accumulators
and mixed FP8/non-FP8 input element types.
Tested:
llvm-lit mlir/test/Dialect/NVGPU/invalid.mlir
Commit: d9635c615c4d7b00c26d7281036bc5cf210d85fb
https://github.com/llvm/llvm-project/commit/d9635c615c4d7b00c26d7281036bc5cf210d85fb
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/TargetParser/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/TargetParser/BUILD.gn
Log Message:
-----------
[gn build] Port 6bef34a7ebbe (#226366)
Commit: 0ce55c6cfa837dcad4561ca7d5740e7c7cdc5154
https://github.com/llvm/llvm-project/commit/0ce55c6cfa837dcad4561ca7d5740e7c7cdc5154
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Log Message:
-----------
[gn build] Port 9d90850fe6b0 (#226367)
Commit: 045cefb54385763d1159782ea97b95bb34ff2f2b
https://github.com/llvm/llvm-project/commit/045cefb54385763d1159782ea97b95bb34ff2f2b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lldb/source/Target/BUILD.gn
Log Message:
-----------
[gn build] Port d0c787e447e1 (#226368)
Commit: a1c9df8e73402eac4c0b3a467e7876f3c387e408
https://github.com/llvm/llvm-project/commit/a1c9df8e73402eac4c0b3a467e7876f3c387e408
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/ABI/BUILD.gn
Log Message:
-----------
[gn build] Port f6e450004591 (#226369)
Commit: 5035ea5e1b16ba89eba76994ef50bdf0ff439840
https://github.com/llvm/llvm-project/commit/5035ea5e1b16ba89eba76994ef50bdf0ff439840
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
Log Message:
-----------
Orc: Compute the JIT DataLayout from the triple and ABI (#226316)
getDefaultDataLayoutForTarget was constructing a throwaway TargetMachine
purely to read back its cached DataLayout. Directly compute it from
the triple and ABI name instead.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: b15daae148e77f1ad2e20990094ddbeb8cc598ac
https://github.com/llvm/llvm-project/commit/b15daae148e77f1ad2e20990094ddbeb8cc598ac
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstructions.td
A llvm/test/CodeGen/AMDGPU/scalar_to_vector_v2bf16.ll
Log Message:
-----------
[AMDGPU] Add scalar_to_vector pattern for v2bf16 (#225303)
A target DAGCombine rewrites `v2bf16 = scalar_to_vector` into bitcast(any_extend),
but it only runs at -O1 and above, so at -O0 the node reaches ISel and fails to select.
Add the missing pattern, mirroring the v2f16 one, for both fake-true16 and real-true16.
Fixes: ROCM-31415
Commit: 28cbb0f0a0c4cbf5e732fa74a362e451a648d26b
https://github.com/llvm/llvm-project/commit/28cbb0f0a0c4cbf5e732fa74a362e451a648d26b
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/AST/OpenMPClause.h
Log Message:
-----------
[AST] Avoid deprecated implicit `this` capture for C++20; NFC (#226142)
`OpenMPClause.h` contains a lambda with an implicit `this` capture,
which triggers the C++20 deprecation warning in many compilation units
that (transitively) include this header.
Commit: 6f44f333c3572d3ee54cdfdcba9124424b6ad1df
https://github.com/llvm/llvm-project/commit/6f44f333c3572d3ee54cdfdcba9124424b6ad1df
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
A llvm/test/Analysis/TypeBasedAliasAnalysis/merge-immutable.ll
Log Message:
-----------
[TBAA] Only keep the immutable flag if both merged tags have it (#225907)
getMostGenericTBAA() can return one of the two tags unchanged, as it
does when both have the same base type and offset. If only that tag has
the immutable flag, the merged access claims that the memory is constant
on both paths. For example, after SimplifyCFG hoists two such loads, GVN
can forward a load across a store to the same location.
Keep the immutable flag only if both tags have it. Otherwise drop just
the flag and keep the rest of the tag.
Commit: cfc320ace31d7a62bfbcdbcb08191d89e8e529cf
https://github.com/llvm/llvm-project/commit/cfc320ace31d7a62bfbcdbcb08191d89e8e529cf
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/placeholder_escape.ll
A llvm/test/tools/UpdateTestChecks/update_test_checks/Inputs/placeholder_escape.ll.expected
A llvm/test/tools/UpdateTestChecks/update_test_checks/placeholder_escape.test
M llvm/utils/UpdateTestChecks/common.py
Log Message:
-----------
[UpdateTestChecks] Escape special characters more consistently (#226203)
The `{{` and `[[` character sequences have special meaning in FileCheck.
Escape these when generating check lines.
We were already doing this for `{{` in analyze tests, where this pattern
occurs e.g. for nested SCEV addrecs. Extend this to `[[`, which occurs
in IR tests due to nested array initializers for globals.
We now need to do this escaping much earlier: `[[...]]` is introduced by
the check line generalization. But even before that, `{{...}}` can be
introduced either via `--replace-value-regex` or via asm scrubbing. So
we perform this escaping right at the start now.
This also updates some AMDGPU LDS tests, which were the motivation for
this change. I've had to manually fix up those check lines one too many
times now...
Commit: 4a63d32442818fd311739ec60c0a31a8e60fe64d
https://github.com/llvm/llvm-project/commit/4a63d32442818fd311739ec60c0a31a8e60fe64d
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Support/CommandLine.h
M llvm/lib/Support/CommandLine.cpp
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[Support] Remove LongOptionsUseDoubleDash from cl::ParseCommandLineOptions (#226347)
The mode (https://reviews.llvm.org/D61294), in which `-` introduces only
single-character options and `--` long ones, was added for the
binutils-style tools, which have since moved to OptTable. Its last
users, yaml2obj, obj2yaml and split-file, parse with OptTable now.
LLM-aided
Commit: 210e8f1c567bbaa1b2ac8e3fcb11b106e7b4c520
https://github.com/llvm/llvm-project/commit/210e8f1c567bbaa1b2ac8e3fcb11b106e7b4c520
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.format.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.format.f32.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.ptr.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.load.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.f16.ll
M llvm/test/CodeGen/AMDGPU/legalize-amdgcn.raw.tbuffer.store.ll
M llvm/test/CodeGen/AMDGPU/legalize-soffset-mbuf.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-vimage-vsample.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.mir
Log Message:
-----------
AMDGPU: Mark the SCC def dead in the waterfall loop expansion (#226300)
Commit: 6c6c968398f25c2a56705004f2eb68d21d5de900
https://github.com/llvm/llvm-project/commit/6c6c968398f25c2a56705004f2eb68d21d5de900
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/AggressiveInstCombine/TruncInstCombine.cpp
M llvm/test/Transforms/AggressiveInstCombine/trunc_unreachable_bb.ll
Log Message:
-----------
[AggressiveInstCombine] Bail out on graph nodes in unreachable blocks (#226383)
TruncInstCombine::run() already skips truncs in unreachable blocks, but
the expression graph of reachable trunc can still be extended into an
unreachable block through a phi incoming value. Dead code may contain an
instruction that is its own operand, and buildTruncExpressionGraph only
breaks cycles at phi nodes, so such a cycle leaves the graph unorderable
and ReduceExpressionGraph asks for the reduced value of a node it has
not built yet.
Solution: Bail out as soon as a graph node is found in an unreachable
block, which extends the existing rule from the trunc itself to the
whole graph.
Fixes #58008.
Commit: 67f685af1b364056fd59fc42841d7f428d46ee1a
https://github.com/llvm/llvm-project/commit/67f685af1b364056fd59fc42841d7f428d46ee1a
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/atomic.c
A clang/test/CIR/CodeGen/builtin-memcpy.c
M clang/test/CIR/CodeGen/libc.c
M clang/test/CIR/CodeGen/union-copy-move-assignment.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
Log Message:
-----------
[CIR] Lower __builtin_memcpy/mempcpy to cir.libc.memcpy (#225845)
These previously were lowered to a call to undefined memcpy function
which caused link failures when compiled for AMDGPU since there it is
never resolved to a library function.
cir.libc.memcpy is later lowered to llvm.memcpy intrinsic call which
matches classic codegen.
This also adds alignment attributes to cir.libc.memcpy op so resulting
LLVM IR also has them just like LLVM IR produced by the classic codegen
Assisted by: claude
Commit: d9a236056a778276b286d6df818fecc5766603a6
https://github.com/llvm/llvm-project/commit/d9a236056a778276b286d6df818fecc5766603a6
Author: Ralf Jung <post at ralfj.de>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/docs/UndefinedBehavior.md
Log Message:
-----------
LangRef: mention that willreturn can cause time-traveling UB (#214229)
I think with #192992, the only remaining possible source of
time-traveling UB in LLVM are `willreturn` annotations emitted by the
frontend. So let's add a note about that.
I think ideally we'd also say somewhere "UB cannot time-travel except if
you put `willreturn` on a function that has observable behavior", but I
am not sure what would be a good place for that.
Cc @nikic @dtcxzyw @gonzalobg
Commit: fe1f8494628afdd4252fc607d7bccafa2fb64b35
https://github.com/llvm/llvm-project/commit/fe1f8494628afdd4252fc607d7bccafa2fb64b35
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
A clang/test/Driver/print-enabled-extensions/riscv-gaisler-gr765.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Misc/target-invalid-cpu-note/riscv.c
M llvm/docs/ReleaseNotes.md
M llvm/lib/Target/RISCV/RISCVProcessors.td
Log Message:
-----------
[RISCV] Add processor definition for GR765 (#225638)
Add support for the GR765 processor from Frontgrade Gaisler.
https://www.gaisler.com/products/gr765
Assisted-by: Codex
Commit: 6a9a95bf0c62cccbffed5b481b40cdbae8a5c959
https://github.com/llvm/llvm-project/commit/6a9a95bf0c62cccbffed5b481b40cdbae8a5c959
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
Log Message:
-----------
[Analysis][NFC] Address review comments from PR #213013 (#225800)
Commit: cf8ce56a1f39f9a771d03aeedd9d89475e72a659
https://github.com/llvm/llvm-project/commit/cf8ce56a1f39f9a771d03aeedd9d89475e72a659
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/RegAllocFast.cpp
A llvm/test/CodeGen/X86/regallocfast-implicit-def-live-out.mir
Log Message:
-----------
RegAllocFast: Mark unspilled implicit_def physreg defs dead (#226295)
When a virtual register defined by an IMPLICIT_DEF is live out of the
block, or reloaded below, defineVirtReg deliberately skips the spill.
If there is also no use of the value in the block, the resulting physreg
def has no reader at all, but was left without a dead flag.
This avoids some unnecessary churn between regalloc runs on AMDGPU.
Since RA runs multiple times, missed dead flags in the first RA run get
re-inferred by the later runs which this avoids.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: f131c8c21397e19c439070070348c17cc3ca2112
https://github.com/llvm/llvm-project/commit/f131c8c21397e19c439070070348c17cc3ca2112
Author: ilia-cher <30845429+ilia-cher at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/lirp.mir
Log Message:
-----------
[AMDGPU] Use CFG in LIRP tests (#226260)
LIRP tests (llvm/test/CodeGen/AMDGPU/lirp.mir) use live intervals with
gaps and redefinitions.
With added -verify-machineinstrs, current test examples trigger machine
code check failure ("Multiple connected components in live interval").
This PR updates the tests to use CFG (loops with loop-carried vregs)
similar to the real world use cases, to fix the verification, and also
simplifies the tests a bit (using implifit defs and kills).
Test:
```
ninja -C build
ninja -C build check-llvm
./build/bin/llvm-lit -v llvm/test/CodeGen/AMDGPU/lirp.mir
```
Commit: 6bfa1c552ea19edad20a76c773f480175ef58797
https://github.com/llvm/llvm-project/commit/6bfa1c552ea19edad20a76c773f480175ef58797
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/select.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/pselect6.h
M libc/src/sys/select/CMakeLists.txt
M libc/src/sys/select/linux/CMakeLists.txt
A libc/src/sys/select/linux/pselect.cpp
M libc/src/sys/select/linux/select.cpp
A libc/src/sys/select/pselect.h
M libc/test/src/sys/select/CMakeLists.txt
A libc/test/src/sys/select/pselect_test.cpp
Log Message:
-----------
[libc] Implement pselect in sys/select (#226237)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function `pselect` in
`<sys/select.h>`, bringing `<sys/select.h>` to 100% POSIX completion.
Fixes #226195.
Commit: 1306a7839d3eb573ff155fea66ee13e97cabf814
https://github.com/llvm/llvm-project/commit/1306a7839d3eb573ff155fea66ee13e97cabf814
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/compressstore.ll
M llvm/test/CodeGen/RISCV/rvv/expandload.ll
Log Message:
-----------
[RISCV] Fix scalable expandload lowering for i8 types (#225141)
This PR adds tests for scalable expandload/compressstore intrinsics, and
also fixes a crash where we tried to query getVectorNumElements on a
scalable vector for i8 element types.
We need to use vrgatherei16 when VLMAX may exceed 255, so compute this
for scalable vectors based off of getRealMaxVLen.
This is in preparation for compress pattern vectorization support in
https://github.com/llvm/llvm-project/pull/214491
Commit: 7bcd6b42a9250baab46ad735d0c4bb4d43e74c37
https://github.com/llvm/llvm-project/commit/7bcd6b42a9250baab46ad735d0c4bb4d43e74c37
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/rvv-expandload-compressstore.ll
Log Message:
-----------
[RISCV] Return cost for scalable compressstore/expandload intrinsics (#225143)
The type based cost still needs fixed.
Commit: 74c5a6421b6bb260ef09e6d5f941970ae55629ce
https://github.com/llvm/llvm-project/commit/74c5a6421b6bb260ef09e6d5f941970ae55629ce
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.cpp
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
Log Message:
-----------
[RISCV] Remove getMaxLMULForFixedLengthVectors. NFC (#226111)
The value can no longer be overridden after
https://github.com/llvm/llvm-project/pull/207312. Now there's nothing
specific about it to fixed vectors, so just inline it.
Commit: f17893d88ac11a34fc26dacd78f18bde2836334b
https://github.com/llvm/llvm-project/commit/f17893d88ac11a34fc26dacd78f18bde2836334b
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/chmod.h
M libc/src/sys/stat/linux/CMakeLists.txt
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
Log Message:
-----------
[libc] Fix chmod syscall arguments and add symlink test (#226144)
Our Linux chmod wrapper had two bugs in how it invoked syscalls:
- the fchmodat syscall only takes three arguments (dfd, filename, mode),
but we were passing four (with a trailing 0 for flags).
- for fchmodat2, we were (mistakenly) passing AT_SYMLINK_NOFOLLOW, even
though chmod is specified to follow symlinks.
I reorder the checks to prefer fchmodat2 (with flags=0) if available,
and otherwise invoke fchmodat with the three arguments it expects.
I also add a test to verify that chmod follows symlinks and updates the
target file's permissions, and that attempting to chmod a dangling
symlink fails with ENOENT.
Assisted-by: Gemini
Commit: 6c5ea9581684f5a819aa1691f30ae410d2a24df4
https://github.com/llvm/llvm-project/commit/6c5ea9581684f5a819aa1691f30ae410d2a24df4
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/LazyValueInfo.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/SimplifyQuery.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.cpp
M llvm/lib/Target/Hexagon/HexagonTargetTransformInfo.h
M llvm/lib/Target/Lanai/LanaiTargetTransformInfo.h
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.cpp
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
M llvm/lib/Target/PowerPC/PPCTargetTransformInfo.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.h
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
M llvm/lib/Target/SystemZ/SystemZTargetTransformInfo.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetTransformInfo.h
M llvm/lib/Target/X86/X86TargetTransformInfo.cpp
M llvm/lib/Target/X86/X86TargetTransformInfo.h
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstCombineInternal.h
M llvm/lib/Transforms/InstCombine/InstCombineMulDivRem.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
M llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
M llvm/lib/Transforms/Scalar/CorrelatedValuePropagation.cpp
M llvm/lib/Transforms/Scalar/JumpThreading.cpp
M llvm/lib/Transforms/Scalar/MergeICmps.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCostAnalysis.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/unittests/Analysis/ValueTrackingTest.cpp
M llvm/unittests/FileCheck/FileCheckTest.cpp
Log Message:
-----------
[LLVM] Fix typo "CxtI" (#226137)
LLVM had many instances of both "CxtI" and "CtxI". This patch
standardizes on the latter. I regard the former as a mistake that should
never have spread. In general usage, "ctx" is much more common as an
abbreviation for "context".
Same for "CxtF" and "CxtPhi" which occurred a few times each.
Also fix the few instances of "Cxt" to "Ctx", which was already
overwhelmingly more common.
Commit: b202c00d967c22f5d4d83561024690f1de05bc01
https://github.com/llvm/llvm-project/commit/b202c00d967c22f5d4d83561024690f1de05bc01
Author: Manuel Carrasco <Manuel.Carrasco at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/utils/lit/lit/main.py
M llvm/utils/lit/lit/util.py
A llvm/utils/lit/tests/unit/Histogram.py
Log Message:
-----------
[lit] Include zero-duration tests in the --time-tests histogram (#226132)
`--time-tests` treated an elapsed time of 0 as missing, so they were
omitted from the histogram. That made time-tests.py flaky when FileCheck
expected every test to be listed.
The PR also avoids log(0) when every recorded time is zero.
Fixes
https://github.com/llvm/llvm-project/pull/208444#issuecomment-5805067757.
Commit: 54e14c19be73548fd0c990bc3aac6d9204f3ebf8
https://github.com/llvm/llvm-project/commit/54e14c19be73548fd0c990bc3aac6d9204f3ebf8
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/support/Error.h
M orc-rt/test/unit/support/ErrorTest.cpp
Log Message:
-----------
[orc-rt] Make Expected's move operations conditionally noexcept. (#226393)
Expected<T>'s move constructor and move assignment operator are now
noexcept whenever T's storage type is nothrow-move-constructible.
Error's move operations are already noexcept, so this is the only
condition under which moving an Expected can throw.
This allows callables that take Expected<T> by value to be stored in
noexcept-qualified move_only_functions: is_nothrow_invocable includes
the initialization of by-value parameters, which previously used
Expected's potentially-throwing move constructor.
Commit: 0a0e0fa181cf162bcc93be85abf2b1b911027e73
https://github.com/llvm/llvm-project/commit/0a0e0fa181cf162bcc93be85abf2b1b911027e73
Author: yahia <yahia.a.abdrabou at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/arpa/inet.yaml
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_pton.cpp
A libc/src/arpa/inet/inet_pton.h
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_pton_test.cpp
Log Message:
-----------
Implement inet_pton (#224644)
Implement the `inet_pton` function for `IPV4` and its unit tests.
Assisted-by: gemini
Commit: 1cc5657c4ff663f1284d8a4ba4ef156e4b1664ae
https://github.com/llvm/llvm-project/commit/1cc5657c4ff663f1284d8a4ba4ef156e4b1664ae
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
Log Message:
-----------
[lldb-dap] Create telemetry data only when built with telemetry. (#225785)
I am exploring fuzzing some parts of lldb-dap. but there is a fixed
amount of memory lldb-dap can use before the fuzzing stops to catch
memory leaks.
The telemetry dispatcher always creates telemetry regardless of if lldb
is built with telemetry enabled.
`SBStructuredData::SetFromJSON` adds the telemetry string to the
ConstString pool for every request and grows lldb-dap's memory usage
rapidly.
Commit: 91d5a537b6b2b62eb1d3dbc5c9c358d2d699ff26
https://github.com/llvm/llvm-project/commit/91d5a537b6b2b62eb1d3dbc5c9c358d2d699ff26
Author: Bruno De Fraine <bruno.defraine at globalfoundries.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/CMakeLists.txt
M clang/lib/CIR/CMakeLists.txt
M clang/tools/cir-opt/CMakeLists.txt
Log Message:
-----------
[clang] Drop explicit -Woverloaded-virtual build option (#225359)
Nowadays, Clang and GCC have reasonable (and aligned) default
`-Woverloaded-virtual` warnings when using `-Wall`. Fall back to this
default and omit the more aggressive `-Woverloaded-virtual` warnings
only present in GCC's level 2 mode of the warning.
The motivation for this change is discussed in the following RFC:
https://discourse.llvm.org/t/rfc-drop-explicit-woverloaded-virtual-clang-build-option/91857
Removing the explicit `-Woverloaded-virtual` build option also allows
removing the workaround from e1bd39c.
Commit: 1735c1018def10b48b8bc1c0f6875737ae0fd9da
https://github.com/llvm/llvm-project/commit/1735c1018def10b48b8bc1c0f6875737ae0fd9da
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
A llvm/test/Instrumentation/SanitizerCoverage/missing_dbg_stack_depth.ll
Log Message:
-----------
[SanitizerCoverage] Split test (NFC) (#226405)
So these tests can actually be regenerated without heavy manual
editing.
Commit: d9dbd9671c1f2481727a9015d7fa23129a7c396d
https://github.com/llvm/llvm-project/commit/d9dbd9671c1f2481727a9015d7fa23129a7c396d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
Log Message:
-----------
[VPlan] Only retain NSW when possible in getFlagsFromIndDesc. (#226315)
getFlagsFromIndDesc is used to get the flags to use for wide inductions.
Those are normalized to Adds, with the step negated if the induction
binop is Sub.
Only retain all flags for Add. For Sub, never retain NUW and only keep
NSW if the step is known to not be signed min.
Alive2 Proofs showing incorrect NUW/NSW transfer and transfer of NSW if
step is != signed INT_MIN: https://alive2.llvm.org/ce/z/zGKeZg
Fixes https://github.com/llvm/llvm-project/issues/224024.
Commit: a465ac2be931ec1f21c9807434d59cb3b92d4b06
https://github.com/llvm/llvm-project/commit/a465ac2be931ec1f21c9807434d59cb3b92d4b06
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/AST/APValue.cpp
Log Message:
-----------
[clang][NFC] Use llvm::ListSeparator in APValue::printPretty (#226125)
Instead of the manual `First` flag tracking.
Commit: 81e2e4474b3eb6a06e4269b97c7d33c561a3f14f
https://github.com/llvm/llvm-project/commit/81e2e4474b3eb6a06e4269b97c7d33c561a3f14f
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/trip-count13.ll
Log Message:
-----------
[SCEV] Set BTC to zero, if constant max BTC < BECountIfTaken. (#226098)
If ConstantMaxBECount < BECountIfTaken, we know that the backedge is
never taken and BTC is zero.
No changes in
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1426.
The main motivation is to remove another difference between
howManyLessThans
and howManyGreaterThans, which does not have the BECountIfBackedgeTaken
logic and would compute tighter bounds for backedges never taken.
No compile-time impact:
https://llvm-compile-time-tracker.com/compare.php?from=022fdfa1e5a0b85dc785d30b17be3880768b22dc&to=475eeff40ba520620a406a3f615d660ed7c3eec0&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/226098
Commit: 99b454814e243b4d5f206d9605d3ab5b6e73f4b4
https://github.com/llvm/llvm-project/commit/99b454814e243b4d5f206d9605d3ab5b6e73f4b4
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
Log Message:
-----------
[InstrProfiling] Generate test checks (NFC) (#226409)
Commit: 41165fd5d503b4297cb1033fdeb1688ce0863b68
https://github.com/llvm/llvm-project/commit/41165fd5d503b4297cb1033fdeb1688ce0863b68
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3bf16.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3f16.v2f16.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v3i16.v2i16.ll
M llvm/test/CodeGen/X86/bfloat.ll
M llvm/test/CodeGen/X86/dag-topological-sort.ll
M llvm/test/CodeGen/X86/load-partial-dot-product.ll
Log Message:
-----------
[DAG] SimplifyMultipleUseDemandedBits - simplify ISD::SCALAR_TO_VECTOR to ISD::POISON if we don't demand 0th element (#225530)
Equivalent fold to SimplifyDemandedBits/SimplifyDemandedVectorElts
Fixes a number of minor regressions from #217185
Commit: d689d0fd01a0ffcfbc1c947ec3a14997f96217d0
https://github.com/llvm/llvm-project/commit/d689d0fd01a0ffcfbc1c947ec3a14997f96217d0
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_select.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll
Log Message:
-----------
[DFSan] Generate test checks (NFC) (#226410)
Commit: af8da03a34ba80c310b9253c4cb062fdfdd5a143
https://github.com/llvm/llvm-project/commit/af8da03a34ba80c310b9253c4cb062fdfdd5a143
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/lib/bedrock/NativeDylibManager.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/tools/ogre/ogre.cpp
Log Message:
-----------
[orc-rt] Make more Session callbacks noexcept. (#226385)
Session's OnDisconnectFn, OnDetachFn, and OnShutdownFn callbacks should
not throw exceptions.
Commit: f4620e36f5d06df795fda3ef4fd421509609ca5a
https://github.com/llvm/llvm-project/commit/f4620e36f5d06df795fda3ef4fd421509609ca5a
Author: Andrew Ng <andrew.ng at sony.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lld/ELF/MarkLive.cpp
M lld/test/ELF/why-live.test
Log Message:
-----------
[LLD][ELF] Skip symbols to dead mergeable section pieces for --why-live (#226238)
Before this change, `--why-live=*` in "why-live.test" incorrectly prints
`live symbol: b.o:(dead)`.
Commit: 75811754a2e6c846543354358317ee02c32c2ce4
https://github.com/llvm/llvm-project/commit/75811754a2e6c846543354358317ee02c32c2ce4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tensor/Transforms/ScalarizeFunctionResult.cpp
Log Message:
-----------
[mlir][Tensor] Stop using `getAttrs()` and only copy discardable call attributes explicitly (#226412)
Preserve discardable metadata when recreating a typed direct call; its
builder supplies the inherent fields.
Part of #155475
Assisted-by: Codex
Commit: 728813099e29e7255e2c4ab7098297ba0eb9b320
https://github.com/llvm/llvm-project/commit/728813099e29e7255e2c4ab7098297ba0eb9b320
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCRoutineLowering.cpp
Log Message:
-----------
[mlir][OpenACC] Stop using getAttrs() and copy function properties separately (NFC) (#226414)
Copy inherent properties and discardable attributes explicitly when
staging a device function.
Part of #155475
Assisted-by: Codex
Commit: 0e232314ca9eda04abe27bc8c7cf7c10666c54c1
https://github.com/llvm/llvm-project/commit/0e232314ca9eda04abe27bc8c7cf7c10666c54c1
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Quant/Transforms/NormalizeQuantTypes.cpp
Log Message:
-----------
[mlir][Quant] Stop using Operation::getAttrs (NFC) (#226413)
Pass raw attributes separately from property storage when recreating an
operation.
Part of #155475
Assisted-by: Codex
Commit: e6115bc07692e0e9e632c88b2b4da99728d2951d
https://github.com/llvm/llvm-project/commit/e6115bc07692e0e9e632c88b2b4da99728d2951d
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
Log Message:
-----------
[AMDGPU] Make setImpSCCDefDead default to true. NFC. (#226406)
In SILowerControlFlow, in helper function setImpSCCDefDead, make
parameter IsDead default to true to match MachineOperand::setIsDead.
Commit: afa81ffa95ca08a20c28d9e9487404ea06a89c55
https://github.com/llvm/llvm-project/commit/afa81ffa95ca08a20c28d9e9487404ea06a89c55
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
Log Message:
-----------
[mlir][LLVM] Stop using Operation::getAttrs in custom printers (NCF) (#226418)
At the moment, the assembly format for these operations mixes
discardable and inherent attributes. We should fix it. But for now, stop
using the `getAttrs()` API that is on its way to deprecation.
Part of #155475
Assisted-by: Codex
Commit: 51b1c275718891743493f3ed5d9e54d91a027e2d
https://github.com/llvm/llvm-project/commit/51b1c275718891743493f3ed5d9e54d91a027e2d
Author: John Brawn <john.brawn at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
A llvm/test/Transforms/SROA/load-store-overlap.ll
Log Message:
-----------
[SROA] Pre-split overlapping move slices within a partition (#210061)
When we have an overlapping load and store within an alloca, e.g. due to
a memmove that has been transformed into a load+store by InstCombine,
then currently SROA can't do anything with it. By pre-splitting such
loads and stores we eliminate any overlap between slices and thus SROA
can optimize them.
Commit: 581edb7b4a7cd8a274aec9ea4ce067eae4aaec70
https://github.com/llvm/llvm-project/commit/581edb7b4a7cd8a274aec9ea4ce067eae4aaec70
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/lib/Conversion/XeVMToLLVM/XeVMToLLVM.cpp
Log Message:
-----------
[mlir][XeVM] Stop using `getAttrs()`: explicitly preserve properties when cloning operations (NFC) (#226420)
Pass raw attributes and serialized properties separately through
OperationState when cloning an operation.
Part of #155475
Assisted-by: Codex
Commit: dc744d9839ca01185a9d19790f0b6bc18361d667
https://github.com/llvm/llvm-project/commit/dc744d9839ca01185a9d19790f0b6bc18361d667
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Dialect/FIROps.td
M flang/include/flang/Optimizer/Dialect/FIROpsSupport.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/test/Fir/fir-ops.fir
A flang/test/Integration/debug-submodule-ancestor.F90
A flang/test/Integration/debug-submodule-nested.F90
M flang/test/Integration/debug-submodule-procedure.F90
A flang/test/Lower/debug-submodule.f90
M flang/test/Transforms/debug-module-submodule-procedure.fir
A flang/test/Transforms/debug-submodule.fir
Log Message:
-----------
[flang][debug] Describe submodules in the debug info (#225852)
A submodule had no presence of its own in the debug info. Everything it
defined was attributed to the module at the root of its ancestry, so a
debugger showed one module per source file, every one of them carrying
the
name and the line of that ancestor, and it listed the variables of a
submodule as if the ancestor had declared them.
This PR describes a submodule in its own right. There are two
independent strands to it, and they meet only in that both decide which
module an entity is scoped in.
## Thread A: describing the submodule
### Recording the ancestry
A submodule is not a first class entity in FIR. It is not mangled into
the name of anything it declares in a way that distinguishes it from a
module, and its own name is unqualified, so nothing downstream could
tell `impl` of
`shapes` from a module called `impl`. Lowering now records the ancestry
on `fir.module_debug_imports`, which it already emits once for every
module and submodule it compiles:
```
fir.module_debug_imports "shapes" { }
fir.module_debug_imports "impl" in "shapes" parent "shapes" { }
fir.module_debug_imports "deep" in "shapes" parent "impl" { }
```
`ancestor_module` is the module at the root, and `parent_module` is the
one directly above, which is that same module for a first level
submodule and a submodule of it otherwise. Both are needed and neither
can be derived from
the other in a unit that compiles the submodule alone. The division
mirrors semantics, which keeps `ModuleDetails::ancestor()` and
`ModuleDetails::parent()` apart for the same reason.
### Naming
DWARF has no way to say that a module entry is a submodule, so the name
has to carry it. The submodule is named after the module at the root of
its ancestry and itself, joined with a `.`, which is what gfortran does:
```
DW_TAG_module DW_AT_name ("shapes.impl")
DW_TAG_module DW_AT_name ("shapes.deep")
```
The standard makes the pair unique among the submodules of a program,
and a `.` cannot appear in a Fortran identifier, so the result can never
be confused with a module that is really called that. A nested submodule
is named after the root and itself, not after the submodule containing
it, so `deep` of `shapes:impl` is `shapes.deep`. That too follows
gfortran, and it keeps the name independent of how deep the nesting
happens to be.
### Importing the parent
Scoping the entities of a submodule at the submodule loses something: a
submodule also has access to everything declared above it, and nothing
in the name of a module entry says so. Each submodule therefore imports
the one
directly above it:
```
DW_TAG_module DW_AT_name ("shapes.impl")
DW_TAG_imported_module DW_AT_import ("shapes")
DW_TAG_module DW_AT_name ("shapes.deep")
DW_TAG_imported_module DW_AT_import ("shapes.impl")
```
A debugger walks that chain up from wherever it is stopped, so an entity
declared anywhere above a submodule is still found by name. This is
again what gfortran emits, down to importing the immediate parent rather
than the root.
The entries hang off the compile unit rather than off any one procedure,
so that a submodule needs a single one however many procedures it holds.
That makes the compile unit name a module that names the compile unit
back, so it
is built as a recursive attribute, the same way a subprogram holding
imported entities already is. A unit that compiles no submodule is
unchanged.
## Thread B: separate module procedures
A separate module procedure is mangled with the module that declares its
interface rather than the submodule that defines it, because that is the
name its callers use:
```fortran
module shapes
interface
module function square(n) result(r) ! declared here
```
```fortran
submodule (shapes) impl
contains
module function square(n) result(r) ! defined here
```
```
DW_AT_linkage_name ("_QMshapesPsquare") ! names shapes, not impl
```
Every other entity of a submodule carries the whole chain in its uniqued
name: `_QMshapesSimplSdeepEdeep_var` names `shapes`, `impl` and `deep`
in turn. A separate module procedure names only the ancestor, so the
submodule defining it is recorded nowhere, and the procedure was
reported as belonging to the ancestor. Lowering now notes that submodule
on the function as `fir.defining_submodule`.
With that, nothing is scoped at the ancestor of a submodule any more,
and `AddDebugInfoPass::markSubmoduleAncestorsDefined` goes away. It
marked the ancestor as defined wherever a submodule was compiled, so
that the entities hanging off it could reach a compile unit; its comment
said it should go once submodules were described in their own right.
## What this looks like in a debugger
Given a module, a submodule defining its procedure, and a program
calling it:
```fortran
module subpar
interface
module subroutine hello()
end subroutine
end interface
end module subpar
```
```fortran
submodule (subpar) subkid
contains
module subroutine hello()
print *, 'hello from submodule'
end subroutine hello
end submodule subkid
```
A breakpoint on the bare name works before and after, but it now reports
where
the procedure really is, and it can be qualified that way too:
| `gdb -batch -ex 'break ...'` | before | after |
| --- | --- | --- |
| `hello` | `in subpar::hello at kid.f90:4` | `in subpar.subkid::hello
at kid.f90:4` |
| `subpar.subkid::hello` | `Function ... not defined.` | `in
subpar.subkid::hello at kid.f90:4` |
| `subpar::hello` | `in subpar::hello at kid.f90:4` | `Function ... not
defined.` |
The last row is the one to note: `break subpar::hello` stops working,
since the procedure is no longer described as belonging to `subpar`
alone. That is a deliberate change rather than a step backwards and
gfortran behaves exactly as this patch does on all three spellings, so
this brings flang into line with it rather than away from it.
The import is what keeps name lookup working from inside a submodule.
Stopped in a procedure of `submodule (par3) kid3`, which uses `pv`, `pk`
and `ptbl` from `par3` and its own `sq`:
```
(gdb) print pv $1 = 1
(gdb) print pk $1 = 5
(gdb) print ptbl $1 = (7, 8, 9)
(gdb) print sq $1 = (9, 8, 7)
```
Fixes https://github.com/llvm/llvm-project/issues/215811
Assisted By: Cursor
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 771af157a35d7342a895a016f87b62b02a54aceb
https://github.com/llvm/llvm-project/commit/771af157a35d7342a895a016f87b62b02a54aceb
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M flang/lib/Optimizer/Transforms/CUDA/CUFDeviceFuncTransform.cpp
Log Message:
-----------
[flang][CUDA] Stop using Operation::getAttrs in host stubs (NFC) (#226421)
Copy function properties and discardable attributes separately when
creating a host stub.
Part of #155475
Assisted-by: Codex
Commit: fb13f6fa52cbcd501b0dcac128254818e2d24214
https://github.com/llvm/llvm-project/commit/fb13f6fa52cbcd501b0dcac128254818e2d24214
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/RISCV/tail-folding-complex-mask.ll
Log Message:
-----------
[VPlan] Append recipes created via builder to worklist
(#213900)
The previous PR appended the top most created recipe to the worklist,
and this PR extends it to any other nested recipes that were created,
similar to InstCombine.
This removes the header mask in a good few more places on RISC-V as
measured on SPEC CPU 2017, e.g. for the following loop:
```c
long f(const int *p, const int *q, long n) {
long a = 0, b = 0;
for (long i = 0;; i++) {
if (p[i] && q[i]) { a += i; b += i; }
if (i + 1 == n) break;
}
return a + b;
}
```
Before:
```asm
LBB0_1:
sh2add a4, a3, a0
vsetvli a5, a2, e32, m1, ta, ma
vle32.v v16, (a4)
vmsne.vi v0, v16, 0
sh2add a4, a3, a1
vsetvli zero, zero, e64, m2, ta, ma
vmsltu.vx v16, v10, a5
vle32.v v17, (a4), v0.t
vsetvli zero, zero, e32, m1, ta, ma
vmsne.vi v17, v17, 0
vmand.mm v17, v0, v17
vmand.mm v0, v16, v17
vsetvli zero, zero, e64, m2, tu, mu
vadd.vv v8, v14, v8, v0.t
vadd.vv v12, v14, v12, v0.t
vsetvli zero, zero, e64, m2, ta, ma
vadd.vx v14, v14, a5
sub a2, a2, a5
add a3, a3, a5
bnez a2, .LBB0_1
```
After:
```asm
.LBB0_1:
sh2add a4, a3, a0
vsetvli a5, a2, e32, m1, ta, ma
vle32.v v14, (a4)
vmsne.vi v0, v14, 0
sh2add a4, a3, a1
vle32.v v14, (a4), v0.t
vmsne.vi v14, v14, 0
vmand.mm v0, v0, v14
vsetvli zero, zero, e64, m2, tu, mu
vadd.vv v8, v12, v8, v0.t
vadd.vv v10, v12, v10, v0.t
vsetvli zero, zero, e64, m2, ta, ma
vadd.vx v12, v12, a5
sub a2, a2, a5
add a3, a3, a5
bnez a2, .LBB0_1
```
We can also remove the (X && Y) | (X && !Y) -> X combine, but this is
left for another NFC PR.
Commit: 4b66c9678662933ff13f8362e3a208cbe6284808
https://github.com/llvm/llvm-project/commit/4b66c9678662933ff13f8362e3a208cbe6284808
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[SDPatternMatch] Remove MatchContext. NFC (#218372)
This removes the match context templating now that trivial VP nodes are
gone.
`m_Negative` and the other computeKnownBits matchers previously used the
DAG within the match context. But they're now unused after #220527, so
this removes them. Since computeKnownBits is an expensive operation, any
combines in future that need to check the sign should likely call
computeKnownBits outside of the pattern match
Commit: a631bc15c5445e48124a06a884ecf4bf9ec491e2
https://github.com/llvm/llvm-project/commit/a631bc15c5445e48124a06a884ecf4bf9ec491e2
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
A llvm/test/CodeGen/AArch64/sve-vector-repeat.ll
A llvm/test/Verifier/vector-repeat-intrinsic-invalid.ll
A llvm/test/Verifier/vector-repeat-intrinsic-valid.ll
M llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp
Log Message:
-----------
[IR][REVEC] Define llvm.vector.repeat intrinsic (#208212)
This intrinsic is used to repeat a <N x Ty> fixed-length vector `vscale`
times to form a <vscale x N x Ty> scalable vector. The patch adds
legalisation support and ISel for AArch64.
This intrinsic is required to support re-vectorisation of fixed-length
vectors to scalable ones, as shufflevector instructions do not support
scalable vectors. Re-vectorisation was discussed in this RFC:
https://discourse.llvm.org/t/rfc-re-vectorisation-to-wider-vectors-in-loopvectorizer/91071
Assisted-by: codex (tests)
Commit: 22312472de3ef8b4c5318da0b527510c5d498ae9
https://github.com/llvm/llvm-project/commit/22312472de3ef8b4c5318da0b527510c5d498ae9
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/lib/IR/Verifier.cpp
M llvm/test/Transforms/MemCpyOpt/vscale-crashes.ll
A llvm/test/Verifier/byval-scalable.ll
Log Message:
-----------
[IR] Reject a scalable byval argument in the verifier (#226170)
A byval argument is copied into the caller's frame, and the current
implementation needs the size of that copy at compile time, which a
scalable type does not have. Plain `llc` fails on such IR today, and
SafeStack crashed on it in #182759. Nothing in the tree produces it and
no target needs it yet, so rather than teach SafeStack to step around it
(#225067), disallow it in the LangRef and reject it in the verifier
until the necessary support exists. `isScalableTy()` also covers a
struct with a scalable member.
Fixes #182759.
Commit: ffcb13aadde867aca18819f8716972afaccf124f
https://github.com/llvm/llvm-project/commit/ffcb13aadde867aca18819f8716972afaccf124f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
Log Message:
-----------
Orc: Move getDefaultDataLayoutForTarget out of line (#226416)
Try to fix link errors with shared library builds.
Commit: 3897817145ffa3204e2593cb0b26c535724221c2
https://github.com/llvm/llvm-project/commit/3897817145ffa3204e2593cb0b26c535724221c2
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
Log Message:
-----------
[AArch64][CostModel] Consider some nxv1 operations as legal (#214471)
This is allowing some operations on vscale x 1 types, namely:
- load/store
- masked load/store
- arithmetic instructions like add/sub/mul
For those, there is already codegen coverage. See e.g.
- llvm/test/CodeGen/AArch64/sve-int-arith.ll
- llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
- llvm/test/CodeGen/AArch64/sve-masked-gather.ll
- llvm/test/CodeGen/AArch64/sve-masked-scatter.ll
These types are relevant for enabling REVEC in LoopVectorizer. For
AArch64, the main target there is turning NEON vector sizes into SVE
vector size, i.e. using VF = "vscale x 1". For loops with mixed vector
and scalar types, we'll want to allow vectorising scalar types with such
a VF.
Commit: 55b498466a7b2620d09fcdf1b2300f71a35f6d8b
https://github.com/llvm/llvm-project/commit/55b498466a7b2620d09fcdf1b2300f71a35f6d8b
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/EvaluationResult.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/CodeGenCXX/global-init.cpp
M clang/test/SemaCXX/PR19955.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
[clang][bytecode] Stop relying on `CheckEvaluationResult()` (#186045)
We already have to do a lot of check in `EvaluationResult` ourselves, only to redo some of them on the `APValue` we create. Just do all the checks before creating the `APValue` in the first place.
Commit: 76c1ac4608e9cabf9e27e95094f7cd11dcc8ebcb
https://github.com/llvm/llvm-project/commit/76c1ac4608e9cabf9e27e95094f7cd11dcc8ebcb
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 0a0e0fa (#226400)
This fixes 0a0e0fa181cf162bcc93be85abf2b1b911027e73 (#224644).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0a0e0fa181cf162bcc93be85abf2b1b911027e73
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: e34e31190233a5733d6b7751160a29e50cd8b41c
https://github.com/llvm/llvm-project/commit/e34e31190233a5733d6b7751160a29e50cd8b41c
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGStmtOpenMP.cpp
A clang/test/OpenMP/target_map_address_space_codegen.c
Log Message:
-----------
[clang][OpenMP] Cast by-reference captures to the address space of the captured field (#226229)
Fixes #140069
Sema strips all qualifiers, including the address space, from the type
of a variable captured by an OpenMP region, so the outlined function for
a `target` region takes `int __seg_gs a;` as a plain `int &`, i.e. a
pointer in the default address space. That is the intended model: inside
the region the variable is an ordinary object, and the host's segment
address space means nothing on a device. `GenerateOpenMPCapturedVars`
ignored the captured field's type for by-reference captures though, and
passed the variable's own address. With `map(alloc: a)` that is a `ptr
addrspace(256)` argument for a `ptr` parameter, and emitting the host
fallback call tripped the "Calling a function with a bad signature"
assertion. The same call is emitted on the `omp_offload.failed` path
when offloading targets are given, so this wasn't limited to host-only
compiles.
By-reference captures now convert the address to the type of the
captured field, adding an `addrspacecast` only when the address spaces
differ. On x86 the cast doesn't change the pointer value, so the region
gets the linear address of the object, which is also what the mapping
passes to the runtime and what GCC does for the same code. Captures
whose address already has the right type are untouched.
Commit: c6c8f3006f378079cf2c89e4e4bddc0adb15f8ea
https://github.com/llvm/llvm-project/commit/c6c8f3006f378079cf2c89e4e4bddc0adb15f8ea
Author: Walter Lee <49250218+googlewalt at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for aa6b03e (#226426)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=aa6b03ed5a9ffe5ba6f0d945fac9961884b5c6ed
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: b7c4b2171d5f4e902dad4b207625bc08c45e8cbf
https://github.com/llvm/llvm-project/commit/b7c4b2171d5f4e902dad4b207625bc08c45e8cbf
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/AttributorAttributes.cpp
A llvm/test/Transforms/Attributor/callback-noalias.ll
M llvm/test/Transforms/Attributor/callbacks.ll
M llvm/test/Transforms/OpenMP/parallel_deletion.ll
Log Message:
-----------
[Attributor] Check callback broker argument aliases correctly (#218672)
Fix a bug in AANoAliasCallSiteArgument. AbstractCallSite uses separate
callback argument and broker operand numbers. Example:
```llvm
call void @broker(
ptr @callee, # broker arg 0
ptr %slot, # broker arg 1
ptr %slot # broker arg 2
) !callback !0
define internal void @callee(
ptr align 8 dereferenceable(8) %a, # callback arg 0
ptr align 8 dereferenceable(8) %b # callback arg 1
) {
```
In `mayAliasWithArgument`, `OtherArgNo` is the broker (call-site) arg
number (0, 1 or 2), so it should be compared against
`getCallSiteArgNo()` not `getCalleeArgNo()`. Otherwise it will compare
the argument with itself, and skip some comparisons with other args, and
wrongly infer/fail to infer `noalias`.
Commit: 02f6eaf60dcc3794ed563c0d3953de2d029f024f
https://github.com/llvm/llvm-project/commit/02f6eaf60dcc3794ed563c0d3953de2d029f024f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP]Extract vectorized source of gathered sub-fields
The bitcast emitted for gathered sub-fields used the source scalar
directly, even if it was vectorized and erased, causes the crash,
register the bitcast as an external user of the vectorized source.
Fixes the crash reported in #224919.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226437
Commit: a98f7ed68ea1cbe43a6786a68c3f9f2e1b9cceb7
https://github.com/llvm/llvm-project/commit/a98f7ed68ea1cbe43a6786a68c3f9f2e1b9cceb7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
Log Message:
-----------
AMDGPU: Mark SCC def dead in init exec lowering (#226373)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a8250aacd1436752d3862005155e611da512710e
https://github.com/llvm/llvm-project/commit/a8250aacd1436752d3862005155e611da512710e
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
Log Message:
-----------
AMDGPU: Mark SCC def dead in wave reduction expansions (#226370)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 0ebe3a65e87819ff5068f21fb5a6615b3d580e64
https://github.com/llvm/llvm-project/commit/0ebe3a65e87819ff5068f21fb5a6615b3d580e64
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/X86/avg.ll
M llvm/test/Transforms/PhaseOrdering/X86/vector-reductions.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/abs-mul-buildvector-in-loop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/div.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-reduce-regression.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/gather-buildvector-with-minbitwidth-user.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/recalc-copyable-deps-on-reorder.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop-schedule.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-keep-drop.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-loop-extracts.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-satd.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-store-chain.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/buildvector-all-external-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/complex-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/partial-vec-invalid-cost.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/reordered-buildvector-scalars.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-extracts.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim-combined.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/splat-gather-trim.ll
M llvm/test/Transforms/SLPVectorizer/X86/deleted-instructions-clear.ll
M llvm/test/Transforms/SLPVectorizer/X86/div-possibly-extended-with-poisons.ll
M llvm/test/Transforms/SLPVectorizer/X86/external-bin-op-user.ll
M llvm/test/Transforms/SLPVectorizer/X86/gathered-loads-non-full-reg.ll
M llvm/test/Transforms/SLPVectorizer/X86/lookahead.ll
M llvm/test/Transforms/SLPVectorizer/X86/original-inst-scheduled-after-copyable.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassoc-copyable-in-another-entry.ll
M llvm/test/Transforms/SLPVectorizer/X86/reassoc-flattened-copyable-operand.ll
M llvm/test/Transforms/SLPVectorizer/X86/reorder_phi.ll
M llvm/test/Transforms/SLPVectorizer/X86/select-copyable-cmp-poison.ll
M llvm/test/Transforms/SLPVectorizer/X86/split-node-reorder-node-with-ops.ll
M llvm/test/Transforms/SLPVectorizer/X86/subvector-minbitwidth-unsigned-value.ll
M llvm/test/Transforms/SLPVectorizer/X86/trimmed-subtree-schedule.ll
Log Message:
-----------
[SLP]Cancel scheduling of the trimmed nodes
The nodes, trimmed during throttling, are not vectorized, but their
bundles were still scheduled by the final scheduling.
Cancel these bundles before the final scheduling, recalculate the
dependencies and schedule their scalars as separate instructions, so
they keep their original order and stay close to their users, which
helps instructions scheduler and save some time for bundles scheduling.
Assisted-by: Cursor
Reviewers: bababuck, RKSimon
Pull Request: https://github.com/llvm/llvm-project/pull/226268
Commit: 57e112ccb2a509c0e1d36963b187fccdd59566de
https://github.com/llvm/llvm-project/commit/57e112ccb2a509c0e1d36963b187fccdd59566de
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/IR/RuntimeLibcalls.cpp
A llvm/test/Transforms/Util/DeclareRuntimeLibcalls/divmod.ll
Log Message:
-----------
RuntimeLibcalls: Describe register-returning divmod libcall ABIs (#217825)
Teach RuntimeLibcallsInfo::getFunctionTy about the ARM AEABI
(__aeabi_*divmod) and Windows (__rt_*div*) divmod signatures. Currently
the custom lowering to these calls hardcodes the call signature
information, but in the future this should be automatically handled.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: 2fe83ee7dc5bb40e2f15e164c21a01bec01c1792
https://github.com/llvm/llvm-project/commit/2fe83ee7dc5bb40e2f15e164c21a01bec01c1792
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/test/CodeGen/SystemZ/atomicrmw-fadd-04.ll
M llvm/test/CodeGen/SystemZ/cmpxchg-01.ll
M llvm/test/CodeGen/SystemZ/cmpxchg-02.ll
A llvm/test/CodeGen/SystemZ/dead-cc-defs.ll
Log Message:
-----------
SystemZ: Mark unread CC defs dead at build time (#226434)
The custom inserters for the subword atomic pseudos and for probed
allocas, plus the inline stack probe emitted by frame lowering, build
instructions whose CC def is never read. Set the dead flags.
Marking the RISBG32 in the subword cmpxchg loop dead lets MachineSink
move it out of the compare block and into the store block, so it is
skipped when the comparison fails.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 4e50049d9d5b44028c9cca9763f6ceeda1c667fb
https://github.com/llvm/llvm-project/commit/4e50049d9d5b44028c9cca9763f6ceeda1c667fb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-phis-no-lane-mask-merging.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-divergent-i1-used-outside-loop.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-structurizer.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/divergence-temporal-divergent-i1.ll
M llvm/test/CodeGen/AMDGPU/block-should-not-be-in-alive-blocks.mir
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/collapse-endcf.mir
M llvm/test/CodeGen/AMDGPU/divergent-branch-uniform-condition.ll
M llvm/test/CodeGen/AMDGPU/i1-copy-from-loop.ll
M llvm/test/CodeGen/AMDGPU/insert-waitcnts-merge.ll
M llvm/test/CodeGen/AMDGPU/loop_break.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-intervals.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/lower-control-flow-other-terminators.mir
M llvm/test/CodeGen/AMDGPU/sgpr-scavenge-fi-stack-id.ll
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow-remove-redundant-block-liveintervals.mir
M llvm/test/CodeGen/AMDGPU/si-lower-control-flow.mir
M llvm/test/CodeGen/AMDGPU/transform-block-with-return-to-epilog.ll
Log Message:
-----------
AMDGPU: Mark the SCC def dead when expanding CF pseudos (#226249)
The control flow pseudos start with dead flags on the implicit scc def,
but did not transfer to the replacement instruction
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: 319529bbe0ef99a5262fef91317e1327fa1e8453
https://github.com/llvm/llvm-project/commit/319529bbe0ef99a5262fef91317e1327fa1e8453
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/add_sub_u64_pseudos.mir
Log Message:
-----------
AMDGPU: Mark the SCC def dead when expanding 64-bit scalar add/sub (#226269)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 01b8b4dfc99e46273b9811cb4663a90c2fb61676
https://github.com/llvm/llvm-project/commit/01b8b4dfc99e46273b9811cb4663a90c2fb61676
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Log Message:
-----------
[AArch64] Remove variable only used in assert (#226433)
This caused a buildbot failure after the variable was introduced in #208212
Commit: 0e7fb8bcf11a59d564bf45d0568d528bf1e9bdcf
https://github.com/llvm/llvm-project/commit/0e7fb8bcf11a59d564bf45d0568d528bf1e9bdcf
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Vector/Transforms/VectorTransforms.h
M mlir/lib/Dialect/Vector/Transforms/VectorMaskElimination.cpp
M mlir/test/Dialect/Vector/eliminate-masks.mlir
M mlir/test/lib/Dialect/Vector/TestVectorTransforms.cpp
Log Message:
-----------
[mlir][vector] Support fixed-size masks in `eliminateVectorMasks` (#221595)
`eliminateVectorMasks` returned immediately unless a `VscaleRange` was
supplied. The TODO above that early return argued the fixed-size case
was unlikely to be useful, because "for fixed-size code dimensions are
all static so masks tend to fold away".
That is only true when the mask operand is constant. When it comes from
an induction variable, which is what tiling produces, the operand is not
constant and no fold removes the mask, even though value-bounds analysis
can prove it all-true. For example, `-canonicalize` leaves this alone:
```mlir
scf.for %i = %c0 to %c1024 step %c4 {
%rem = arith.subi %c1024, %i : index
%mask = vector.create_mask %rem : vector<4xi1>
%v = vector.transfer_read %t[%i], %f0, %mask : tensor<1024xf32>, vector<4xf32>
...
}
```
`%i <= 1020`, so `%rem >= 4` and the mask is all-true.
The algorithm was never scalable-specific; only the bound query was.
This makes `vscaleRange` genuinely optional: without one, the lower
bound is computed with `ValueBoundsConstraintSet::computeConstantBound`
and compared against the mask dimension. Scalable dimensions still need
a range and bail without one, so a fixed-size caller cannot prove a
dimension whose runtime size is `vscale` times the size in the type. The
scalable path is unchanged, and the existing test still passes with its
RUN line untouched.
### Behaviour change for downstream callers
An omitted `vscaleRange` used to make the call a no-op. It now runs the
fixed-size analysis.
No in-tree caller relies on the old meaning, but IREE does call this
unconditionally in `Codegen/Common/GenericVectorization.cpp`, passing
`getDefaultVscaleRange()`, which returns `std::nullopt` for every target
other than AArch64+SVE. For those targets this patch turns a no-op into
live mask elimination. That is the intended benefit, but it is worth
knowing before the next integrate. The added cost is bounded: constant
and `vscale`-multiple operands short-circuit before any analysis, so
only `create_mask` ops with unknown operands pay for a bound query.
### Tests
New `eliminate-masks-fixed-size.mlir`, run through a `fixed-size` option
added to the test pass: two cases that are eliminated (the tiled loop
above, and a dynamic operand bounded by `arith.maxsi`) and three that
are not (an unbounded operand, a lower bound smaller than the mask
dimension, and a scalable dimension with no vscale range). Each negative
was checked to fail for the stated reason, by making the smallest change
that flips it.
Context:
https://discourse.llvm.org/t/rfc-should-vector-transfer-read-write-keep-in-bounds-measurements-on-the-masking-alternative/91649
Assisted-by: Claude
Commit: 675c1cfa5d925232db882942674a40de41654bc5
https://github.com/llvm/llvm-project/commit/675c1cfa5d925232db882942674a40de41654bc5
Author: Paul Walker <paul.walker at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/test/CodeGen/AArch64/insert-subvector-res-legalization.ll
M llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll
M llvm/test/CodeGen/AArch64/masked-srem-scalable.ll
M llvm/test/CodeGen/AArch64/masked-urem-scalable.ll
M llvm/test/CodeGen/AArch64/sve-bf16-combines.ll
M llvm/test/CodeGen/AArch64/sve-bf16-int-converts.ll
M llvm/test/CodeGen/AArch64/sve-bitcast.ll
M llvm/test/CodeGen/AArch64/sve-fpext-load.ll
M llvm/test/CodeGen/AArch64/sve-ld1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/sve-load-store-legalisation.ll
M llvm/test/CodeGen/AArch64/sve-lsrchain.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-dot-product.ll
M llvm/test/CodeGen/AArch64/sve-partial-reduce-wide-add.ll
M llvm/test/CodeGen/AArch64/sve-pred-selectop2.ll
M llvm/test/CodeGen/AArch64/sve-shift-trunc-combine.ll
M llvm/test/CodeGen/AArch64/sve-st1-addressing-mode-reg-imm.ll
M llvm/test/CodeGen/AArch64/vec-combine-compare-to-bitmask.ll
M llvm/test/CodeGen/AArch64/vector-absolute-difference.ll
M llvm/test/Transforms/LoopStrengthReduce/AArch64/vscale-fixups.ll
Log Message:
-----------
[LLVM][CodeGen] Enable the AArch64PTrueCoalescing pass. (#225830)
Fixes https://github.com/llvm/llvm-project/issues/137040
Commit: 68a9cd31fd277f9f6b8a8ab95e18d00a786e7c12
https://github.com/llvm/llvm-project/commit/68a9cd31fd277f9f6b8a8ab95e18d00a786e7c12
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
A polly/test/ScopInfo/user-assumption-cached-precondition.ll
Log Message:
-----------
[Polly] Detect preconditions of cached user assumption translations (#226204)
`addUserAssumptions` detected preconditions of a user assumption by
checking whether building its condition recorded new assumptions, but
`SCEVAffinator` caches translated expressions, so a precondition shared
with an earlier assumption (e.g. the same truncation) was missed and the
assumption went into the context, removing the runtime check it relied
on. For example, with `__builtin_assume((signed char)n >= 0)` and
`__builtin_assume((signed char)n < 10)`, the `n >= 128` check was
dropped, although `n = 261` satisfies both assumptions. Instead, check
the invalid domain of each assumption, which is also cached, and if it
is non-empty, add the assumption to the defined behavior context as in
#189350.
Assisted-by: Claude (Anthropic)
Commit: 940105295f88426cb85b01b075f44f36a90c12fd
https://github.com/llvm/llvm-project/commit/940105295f88426cb85b01b075f44f36a90c12fd
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M .github/workflows/sycl-tests.yml
Log Message:
-----------
[CI][libsycl] Enable -Werror in libsycl precommit testing (#226129)
Commit: 952fa726ae35661f86ea92ed989d0efa36e69c7f
https://github.com/llvm/llvm-project/commit/952fa726ae35661f86ea92ed989d0efa36e69c7f
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
M clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][AArch64] Consolidate codegen tests for SVE's LEN intrinsics (#226131)
This patch completes the migration of the tests from:
* clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
to:
* clang/test/CodeGen/AArch64/sve/len.c
`len.c` covers all the cases previously tested by `acle_sve_len.c`.
However, unlike `acle_sve_dup.c`, it was only tested as C. Add `-x c++`
RUN lines to provide the equivalent C++ coverage, including lowering
via CIR.
Commit: f1c5f1e98cac5bf9d688272f2137da992ab005da
https://github.com/llvm/llvm-project/commit/f1c5f1e98cac5bf9d688272f2137da992ab005da
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/BootstrapInfo.h
M orc-rt/lib/bedrock/BootstrapInfo.cpp
Log Message:
-----------
[orc-rt] Make BootstrapInfo construction noexcept. (#226459)
These methods should never throw.
Commit: df26d549b9115ff7c32b6fb9031250994d0f3515
https://github.com/llvm/llvm-project/commit/df26d549b9115ff7c32b6fb9031250994d0f3515
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
Log Message:
-----------
ARM: Use divmod type signatures from RuntimeLibcallsInfo (#217869)
Start moving towards an API to emit calls from RuntimeLibcallsInfo's
knowledge about the type signature of a function instead of manually
computing an IR type from the EVT of the operation.
Also change the swap of arguments to be based on the libcall impl,
rather than the ABI since it's logically a property of the function
itself.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: dcdeeebef2ef008326211b661cfb81d1d35b4086
https://github.com/llvm/llvm-project/commit/dcdeeebef2ef008326211b661cfb81d1d35b4086
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/CodeGen/LoongArch/pr177863.ll
A llvm/test/CodeGen/X86/vec_setcc-3.ll
Log Message:
-----------
[DAG] SimplifySetCC - adjust setcc result type when peeking through truncates (#226422)
For the "(setcc (trunc x) (trunc y)) -> (setcc x y)" fold with non vXi1
cmp result type, make sure we adjust the type and then trunc/extend it
correctly using BooleanContent.
Fixes #226365
Commit: a509a4e98a50a2acc172a5f6eba77b8df020e3cd
https://github.com/llvm/llvm-project/commit/a509a4e98a50a2acc172a5f6eba77b8df020e3cd
Author: Benedek Kaibas <82393336+benedekaibas at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/LifetimeSafety.md
M clang/docs/ReleaseNotes.md
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Clang.cpp
A clang/test/Driver/flifetime-safety-c.c
M clang/test/Sema/LifetimeSafety/annotation-suggestions-fixits.c
M clang/test/Sema/LifetimeSafety/safety-c.c
Log Message:
-----------
[LifetimeSafety] Enable C support by default under -Wlifetime-safety (#224028)
This PR extends the lifetime safety analysis to C. When the analysis is
enabled with `-Wlifetime-safety`, it now also runs on C code without the
extra `-fexperimental-lifetime-safety-c` flag.
I have renamed `-fexperimental-lifetime-safety-c` to
`-flifetime-safety-c` since it is on by default from now on. The
`-fno-lifetime-safety-c` flag disables the analysis for C. I have
updated the documentation and the release notes and rewrote the RUN
lines of the test cases that used the old flag.
Commit: b60afea0d31f4da34b9d867a00817a0e53dbdb05
https://github.com/llvm/llvm-project/commit/b60afea0d31f4da34b9d867a00817a0e53dbdb05
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-call-debugloc.ll
Log Message:
-----------
[SimplifyCFG] Keep a debug location on calls cloned by `FoldBranchToCommonDest` (#224247)
Fixes #220848
When folding a branch to a common destination, SimplifyCFG clones the
bonus instructions into the predecessor and resets their debug
locations, so the debugger doesn't step onto code from a branch that
wasn't taken. It did that with `setDebugLoc(DebugLoc::getDropped())` for
every instruction. That's fine for an `icmp`, but with
`-bonus-inst-threshold=2` a `speculatable` call can be a bonus
instruction too, and an inlinable call in a function with debug info
must have a `!dbg` location, otherwise the inliner can't set up the
inlined-at scope. The verifier rejects the module with "inlinable
function call in a function with debug info must have a !dbg location".
The clone now uses `Instruction::dropLocation()`, which is what
`speculativelyExecuteBB` in the same file already does. Non-call
instructions still lose their location as before, while calls get a line
0 location in the function's scope, so nothing misleading shows up when
stepping and the IR stays valid. `dropLocation()` needs the parent
function, so the clone is inserted into the predecessor before its
location is updated. An earlier attempt at this swap (674f57870f4c) was
reverted after buildbot crashes; the clone was still unparented when
`dropLocation()` ran there, which would explain them.
Commit: eae3e9e64de82ae5a162783808c89521cfea7742
https://github.com/llvm/llvm-project/commit/eae3e9e64de82ae5a162783808c89521cfea7742
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/support/move_only_function.h
M orc-rt/test/unit/support/move_only_function-test.cpp
Log Message:
-----------
[orc-rt] Fix move_only_function storing references to lvalue callables. (#226474)
move_only_function's converting constructor instantiated CallableImpl
with the deduced forwarding-reference type, so constructing from an
lvalue callable stored a reference to it rather than a copy, leaving the
move_only_function dangling once the original went out of scope.
This commit decays the callable type before instantiating CallableImpl,
and adds a static_assert to CallableImpl to enforce that it's only
instantiated with decayed types.
Commit: 176a24691b1b315cfd0f15ee8bb8adcc086683be
https://github.com/llvm/llvm-project/commit/176a24691b1b315cfd0f15ee8bb8adcc086683be
Author: George Burgess IV <george.burgess.iv at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/SourceBasedCodeCoverage.md
M compiler-rt/include/profile/instr_prof_interface.h
M compiler-rt/lib/profile/InstrProfiling.h
M compiler-rt/test/profile/instrprof-api.c
Log Message:
-----------
[docs][clang] Document additional public profile runtime APIs (#224424)
Android's code coverage runtime started using these functions recently,
and I noticed they were undocumented (and the reviewer highlighted
that `instr_prof_interface.h` exists).
So this commit:
- Moves their declarations to that header
- Updates `SourceBasedCodeCoverage.md` to highlight that header
- Adds quips to said `.md` file for these functions
An LLM was used to take a first pass at this; I reviewed and refined.
Commit: 8de4cb45931adab063265b565408ff2b72be668d
https://github.com/llvm/llvm-project/commit/8de4cb45931adab063265b565408ff2b72be668d
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M orc-rt/test/unit/support/move_only_function-test.cpp
Log Message:
-----------
[orc-rt] Tighten move_only_function ShouldCopyInitialize test. (#226483)
ShouldCopyInitialize only checked that constructing a move_only_function
from an lvalue didn't move the callable, so it passed when the callable
was held by reference and never copied at all.
This commit replaces the moved flag with copy and move counters, and
checks that construction performs exactly one copy and no moves.
Commit: 83589c854329a8366672f9932ee27b422902038f
https://github.com/llvm/llvm-project/commit/83589c854329a8366672f9932ee27b422902038f
Author: google-yfyang <yfyang at google.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
Log Message:
-----------
Fix Bazel build for 0a0e0fa (#226489)
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=0a0e0fa181cf162bcc93be85abf2b1b911027e73
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 84d75c8ab6eb610cde0048458f96085f923fc392
https://github.com/llvm/llvm-project/commit/84d75c8ab6eb610cde0048458f96085f923fc392
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/TargetParser/AArch64TargetParser.cpp
Log Message:
-----------
[AArch64] Make compiling arm_neon.h faster (#226378)
Replace two linear scans with map lookups.
On my system, reduces time to compile a TU that does nothing but
`#include <arm_neon.h>` from 92.0 ms ± 1.4 ms to 70.9 ms ± 1.3 ms.
No behavior change.
Commit: f2f70fc15fca532f4968ba211e430e269dd18489
https://github.com/llvm/llvm-project/commit/f2f70fc15fca532f4968ba211e430e269dd18489
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
A llvm/test/tools/llubi/main_declaration.ll
M llvm/tools/llubi/llubi.cpp
Log Message:
-----------
[llubi] Error if main is not a definition (#226475)
Currently this crashes. Ran into this while using llubi with
llvm-reduce.
Commit: 2dc2a1f1b94f1953f0ef52bd748fb1f0c07cd780
https://github.com/llvm/llvm-project/commit/2dc2a1f1b94f1953f0ef52bd748fb1f0c07cd780
Author: Anonmiraj <ezzibrahimx at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/src/__support/math/lgammaf.h
Log Message:
-----------
[libc][math] Fix lgammaf 1-ULP errors in non-FMA builds (#225449)
There were some inaccuracies in the non-FMA builds.
I retested exhaustively with FMA both enabled and disabled, and all
tests seems to pass noww.
Commit: e1dc804fcc352b841e798efe0aa4a6c40ba1f2b3
https://github.com/llvm/llvm-project/commit/e1dc804fcc352b841e798efe0aa4a6c40ba1f2b3
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/tools/llvm-objdump/MachO/AArch64/macho-arm64-subtypes.test
M llvm/test/tools/llvm-objdump/MachO/universal-arm64.test
Log Message:
-----------
Add more llvm-objdump test coverage for arm64e.x1 (#224110)
Commit: 6ad85f11c5151f18a3686322e37f8e64a48be327
https://github.com/llvm/llvm-project/commit/6ad85f11c5151f18a3686322e37f8e64a48be327
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M polly/lib/Analysis/ScopBuilder.cpp
M polly/test/ScopInfo/issue190128.ll
M polly/test/ScopInfo/simple_loop_unsigned.ll
A polly/test/ScopInfo/zext-loop-bound-unbounded.ll
Log Message:
-----------
[Polly] Do not assume loops to be bounded if latch conditions are invalid (#226202)
If a loop with an `<nsw>` induction variable appears to be unbounded for
some parameter values, `addLoopBoundsToHeaderDomain` removes them from
its domain without a runtime check, but the loop may only appear
unbounded because its latch condition is modeled incorrectly for these
values, e.g. `(zext i16 %n to i64)` is modeled as `n` under the
assumption `n >= 0`. Removing them also dropped that assumption, so for
`n < 0` the loop was not executed at all instead of running `65536 + n`
iterations. Exclude the parameter values for which the latch conditions
are invalid by a runtime check instead.
Fixes #192616 and #192618.
Assisted-by: Claude (Anthropic)
Commit: 9de286c070e3f3176e7bbfb79d3c4d95807e19a5
https://github.com/llvm/llvm-project/commit/9de286c070e3f3176e7bbfb79d3c4d95807e19a5
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-omp-structure.cpp
M flang/lib/Semantics/check-omp-structure.h
M flang/lib/Semantics/check-omp-syntax.cpp
M flang/lib/Semantics/check-omp-variant.cpp
Log Message:
-----------
[flang][OpenMP] Rename some symbols in check-omp-syntax.cpp (#226484)
Some function names did not conform to the naming convention. Include a
couple of other non-significant changes.
Commit: ff5f397d6cd06d0eb72f798b4454d490050fb442
https://github.com/llvm/llvm-project/commit/ff5f397d6cd06d0eb72f798b4454d490050fb442
Author: Lei Zhang <antiagainst at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
A llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
Log Message:
-----------
[AMDGPU] Fix dynamic LDS consistency check in setDynLDSAlign (#225825)
5bf967cb132b ("[RFC][AMDGPU] Add BARRIER address space") changed the
absolute-address check in `setDynLDSAlign` to read the dynamic LDS
global being lowered (`GV`) instead of the kernel's representative
`llvm.amdgcn.<kernel>.dynlds` variable (`Dyn`).
`amdgpu-lower-module-lds` attaches `!absolute_symbol` only to the
representative; uses of the original dynamic LDS global inside the
kernel are left in place and never carry that metadata. As a result, a
kernel that accesses dynamic LDS both directly and through a non-inlined
callee now aborts with "Inconsistent metadata on dynamic LDS variable".
Commit: a514ce406f06bfbebeb5d8d9bc76e9cc5ec6a92b
https://github.com/llvm/llvm-project/commit/a514ce406f06bfbebeb5d8d9bc76e9cc5ec6a92b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
Log Message:
-----------
[gn] Add clang_static_plugin_sources to link out-of-tree plugins into clang (#226381)
This is useful for testing and profiling e.g. Chromium's clang plugins
without having to export symbols from the clang binary.
# args.gn
clang_static_plugin_sources = [
"/path/to/chromium/src/tools/clang/plugins/FindBadConstructsAction.cpp",
...
]
clang_static_plugin_include_dirs = [ "/path/to/chromium/src" ]
...or put the above in a gni file and put just `import("plugins.gni")`
in args.gn
No behavior change if the list is empty (the default).
Commit: 1978a469493fec319cd61e2eac42abade837fafc
https://github.com/llvm/llvm-project/commit/1978a469493fec319cd61e2eac42abade837fafc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/AST/ASTImporter.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#226390)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
ExprWithCleanups::CleanupObject because it is always nonnull.
Specifically, ExprWithCleanups::getObjects() is populated from a slice
of Sema::ExprCleanupObjects, which only receives nonnull pointers in
the following places:
- Sema::BuildCompoundLiteralExpr
- Sema::ActOnBlockStmtExpr
- Sema::BuildBlockForLambdaConversion
Assisted-by: Antigravity
Commit: 76d4a51fe990d5915c8b30587b09d57e45d533a2
https://github.com/llvm/llvm-project/commit/76d4a51fe990d5915c8b30587b09d57e45d533a2
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[Vectorize] Remove unused functions (NFC) (#226392)
BoUpSLP::TreeEntry::isOneOf:
The last caller was removed on April 1, 2025 in commit
0e3049c562ccdea288c3b1f3b3d1ce5992d284b0.
BoUpSLP::ScheduleCopyableData::verify:
Introduced on August 11, 2025 in commit
2d7b55a028139dde58a994a65895841190dfde96 without any callers.
HorizontalReduction::hasSameParent:
The last caller was removed on July 29, 2024 in commit
197f4a90519df308d9bfddcc931f7683a5ae9cb9.
VPBlockBase::getHierarchicalPredecessors:
The last caller was removed on May 24, 2025 in commit
dcef154b5caf6556e69bb18bbb0506d274aa474e.
VPIRFlags::isNonNeg:
The last caller was removed on July 1, 2025 in commit
6b3d2b629cc3805d483ec4522cc97e2540070ae1.
VPHistogramRecipe::getOpcode:
Introduced on September 27, 2024 in commit
6f1a8c2da278a04565877e277bc4d5b70055ac74 without any callers.
VPWidenInductionRecipe::setStepValue:
The last caller was removed on May 22, 2026 in commit
5c853423f4f9e7296b7596b7f3ccade481686bfd.
VPReductionPHIRecipe::isPartialReduction:
Introduced on November 26, 2025 in commit
071d1fb8beda4c0ec9ede0acab12a382f34758fe without any callers.
VPTransformState::reset:
The last callers were removed on May 3, 2026 in commit
efd429fdfb6f3f0a6991d9d08ab15ca89f27a7c3.
VPValue::hasDefiningRecipe:
The last caller was removed on June 28, 2026 in commit
7abad0faf4bfe1cb674d7fd362cc31edb1d0c460.
Assisted-by: Antigravity
Commit: 58e81dc9a3e25cc41ad26f7cf222dea2c4aa391b
https://github.com/llvm/llvm-project/commit/58e81dc9a3e25cc41ad26f7cf222dea2c4aa391b
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
M llvm/test/Transforms/LoopVectorize/RISCV/sink-to-early-exit.ll
M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
M llvm/test/Transforms/LoopVectorize/early-exit-load-live-out.ll
M llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
M llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
M llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
M llvm/test/Transforms/LoopVectorize/predicated-single-exit.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
M llvm/test/Transforms/LoopVectorize/sink-to-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
Log Message:
-----------
[VPlan] Use frozen combined condition in early exit first-active-lane (#223643)
Combined is used both to compute if an early exit was taken via
VPInstruction::AnyOf, as well as the index of the early-exited lane in
VPInstruction::FirstActiveLane.
Combined can have poison lanes past the exited lane, so the AnyOf uses
freeze to prevent branching on poison. However FirstActiveLane on a
vector with a poison lane is poison (see #223935), so we need to also
use the frozen version of Combined to prevent poison there.
Commit: 7af28a7e7b3073593d5f394d02b10f382d6cbab1
https://github.com/llvm/llvm-project/commit/7af28a7e7b3073593d5f394d02b10f382d6cbab1
Author: Kai Nacke <kai.peter.nacke at ibm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/test/CodeGen/SystemZ/zos-section-1.ll
M llvm/test/CodeGen/SystemZ/zos-section-2.ll
M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
Log Message:
-----------
[SystemZ][z/OS] Use section ordinal for temporary symbols (#226306)
A relocation involving a temporary symbol is interpreted as offset of
the symbol to the section begin. Currently, this is resolved via the
begin symbol of the section. However, that symbol may also have the
temporary flag set, and therefore has an index of 0. Since a symbol is
emitted of reach section, it is safe to use the ordinal of the section
instead, avoiding all issues with temporary symbols.
Commit: 621e088c0f5d435506a0d344d3b62ddc11f16147
https://github.com/llvm/llvm-project/commit/621e088c0f5d435506a0d344d3b62ddc11f16147
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
Log Message:
-----------
[lldb-dap] Always return the up-to-date thread if possible. (#226140)
Only send the initial thread list if the process is not stopped and only
the first time.
Remove the workaround in tests. This should not affect tests since we
mostly get the `threadId` from a stopped event.
Commit: edd241997b82b7803bd496933e340762cc06bd77
https://github.com/llvm/llvm-project/commit/edd241997b82b7803bd496933e340762cc06bd77
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
Log Message:
-----------
[LV] Remove unused VectorizationFactor comparison operators (NFC) (#226511)
VectorizationFactor::operator== and operator!= have no users. Remove it.
Commit: 8ccb1826dad0257eda59d88b5fd35a0bc3b933f8
https://github.com/llvm/llvm-project/commit/8ccb1826dad0257eda59d88b5fd35a0bc3b933f8
Author: Pedro Vicente <pmadcv at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm-c/Core.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/Instruction.def
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
A llvm/test/Assembler/bitinsert-bitextract-invalid.ll
A llvm/test/Assembler/bitinsert-bitextract.ll
M llvm/test/Bitcode/compatibility.ll
A llvm/test/CodeGen/AArch64/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/AArch64/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/AArch64/bitinsert-bitextract.ll
A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
A llvm/test/CodeGen/ARM/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/ARM/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/PowerPC/bitinsert-bitextract.ll
A llvm/test/CodeGen/RISCV/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
A llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
A llvm/test/CodeGen/X86/bitinsert-bitextract-common-offsets.ll
A llvm/test/CodeGen/X86/bitinsert-bitextract-fp.ll
A llvm/test/CodeGen/X86/bitinsert-bitextract.ll
A llvm/test/Verifier/bitextract-bitinsert-invalid-verifier.ll
M llvm/test/tools/llvm-ir2vec/entities.ll
M llvm/test/tools/llvm-ir2vec/triplets.ll
M llvm/tools/llvm-c-test/echo.cpp
M llvm/unittests/Analysis/IR2VecTest.cpp
Log Message:
-----------
[IR] Implementation and lowering of `bitinsert` and `bitextract` (#200605)
This PR introduces `bitinsert` and `bitextract` instructions for LLVM
IR. These allow bit manipulation for byte types. Both were lowered to
GlobalIsel and SDag.
Tests were added for AArch64, AMDGPU, ARM, PowerPC, RISCV, x86 and LLVM
IR.
The LangRef was updated to document the new instructions.
The lowering of `bitextract` and `bitinsert` instructions are
implemented using integer operations.
In order to obtain the results for `bitextract`, a shift right
instruction with a specific offset is used (that can be a variable or an
immediate).
Relative to floating-point, in `bitinsert`, we reinterpret the bits of
the floating-point value as if it is an integer.
Pointer operands and results are reinterpreted as if by bitcast, as
specified in the LangRef.
This PR is based on the RFC:
https://discourse.llvm.org/t/rfc-bitinsert-and-bitextract-instructions-for-llvm-ir-2/90764
Commit: 5b8e65685b4fe99191a217bfa0527c51cf36925c
https://github.com/llvm/llvm-project/commit/5b8e65685b4fe99191a217bfa0527c51cf36925c
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M offload/include/Shared/SourceInfo.h
M openmp/docs/ReleaseNotes.md
Log Message:
-----------
[Offload][OpenMP] remove SourceInfo::removePath (#226283)
Following discussion on
https://discourse.llvm.org/t/rfc-add-opt-in-option-for-full-source-paths-in-offload-info-output/91901
this commit removes SourceInfo::removePath which changes
LIBOMPTARGET_INFO to provide a non truncated source path:
``` c
#include <stdio.h>
#define N 4
int main(void) {
int a[N];
for (int i = 0; i < N; ++i)
a[i] = 0;
#pragma omp target map(tofrom : a[0 : N])
{
a[0] = 1;
}
printf("%d\n", a[0]); /* expect 1 */
return 0;
}
```
``` bash
clang -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -g ./test/test.c
# new
LIBOMPTARGET_INFO=-1 ./a.out
omptarget device 0 info: Entering OpenMP kernel at ./test/test.c:9:1 with 1 arguments:
# old
LIBOMPTARGET_INFO=-1 ./a.out
omptarget device 0 info: Entering OpenMP kernel at test.c:9:1 with 1 arguments:
```
Commit: 0551d60c516c2dc161007ee9ed466f36be40667d
https://github.com/llvm/llvm-project/commit/0551d60c516c2dc161007ee9ed466f36be40667d
Author: Zorojuro <sawantsukumar at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/src/__support/math/bf16sub.h
M libc/src/__support/math/bf16subf.h
M libc/src/__support/math/bf16subf128.h
M libc/test/shared/shared_math_constexpr_test.cpp
Log Message:
-----------
[libc] Make bf16sub functions constexpr (#223506)
Makes the bf16sub for all types constexpr along with tests
Commit: d4c354ca333192d2db3d45b2b028a98f9fbbd347
https://github.com/llvm/llvm-project/commit/d4c354ca333192d2db3d45b2b028a98f9fbbd347
Author: Maksim Levental <maksim.levental at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/include/mlir-c/Rewrite.h
M mlir/lib/CAPI/Transforms/Rewrite.cpp
M mlir/test/CAPI/CMakeLists.txt
M mlir/test/CAPI/rewrite.c
Log Message:
-----------
[mlir-c] Add mlirDialectMaterializeConstant (#206553)
Exposes `Dialect::materializeConstant` through the MLIR C API, letting
callers ask a dialect to build a constant operation for a given
attribute and type.
Assisted by: Claude
Commit: 14f451262dc753b53f79a103744dd6988894467f
https://github.com/llvm/llvm-project/commit/14f451262dc753b53f79a103744dd6988894467f
Author: Derek Schuff <dschuff at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/test/CodeGen/thread-model.c
M clang/test/CodeGenCXX/static-init-wasm.cpp
M clang/test/Preprocessor/init.c
M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
M llvm/lib/TargetParser/Triple.cpp
R llvm/test/CodeGen/WebAssembly/coalesce-features-thread-model.ll
Log Message:
-----------
[clang][WeAssembly] Do not override thread model when building without atomics (#225981)
This change does 2 things. The first is to revert #223917, setting the
Triple's
default thread model back to posix. The second is to stop overriding it
when
atomics are not enabled.
This means that compiles with no thread- or atomics-related flags will
get the default posix thread model, independently of whether they get
_REENTRANT defined or the atomics feature is enabled. Practically this
means that the thread model will always be posix unless explicitly
overridden at the driver command line.
The leftover setting of Opts.POSIXThreads became a no-op when used
with the clang driver because the logic would only activate when
-pthread
was not already used (since the driver has separate logic linking
several
flags together).
This is a safer version of the status quo before the thread-model
module flag was introduced, because atomics are still lowered
in the same way but there is no risk of unsafe initialization
or LICM in such scenarios. We could probably further simplify
the interaction between various thread- and atomics-related
flags and thread agnosticism, but this is a small step
that fixes a known hazard.
Commit: 73fc71b19905b15e6ff14ae3149c6fabce961c1b
https://github.com/llvm/llvm-project/commit/73fc71b19905b15e6ff14ae3149c6fabce961c1b
Author: Jan Svoboda <jan_svoboda at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/unittests/Lex/LexerTest.cpp
Log Message:
-----------
[clang][test] Fix lifetimes of HS/PP options (#225885)
PR #133467 changed how lifetimes work for `PreprocessorOptions`. In
LexerTest.cpp, the lifetimes were set up incorrectly, leading to
potential use-after-free crashes. This PR fixes that by expanding the
lifetime of both `PreprocessorOptions` and `HeaderSearchOptions`.
Commit: 9068aede6fcbd3e47602fce96fbb077e3e4d8cc4
https://github.com/llvm/llvm-project/commit/9068aede6fcbd3e47602fce96fbb077e3e4d8cc4
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
Log Message:
-----------
[LV] Fix early exit tests after #223643. NFC (#226521)
Commit: 44f262eb67778e6bcb7675599384e010062cae10
https://github.com/llvm/llvm-project/commit/44f262eb67778e6bcb7675599384e010062cae10
Author: Alison Zhang <alisonzhang at ibm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-preserves-unrelated-zero-length-insert.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-stderr-without-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/empty-input.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/identical-overlap.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/no-conflict-sarif-empty.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/non-overlapping.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/order-invariance.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/parent-dir-missing.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-identical-non-zero-length.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-zero-length-insert.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-cluster-of-three-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/sarif-out-parent-dir-missing.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input-internal-conflict.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-all-conflict.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-conflicts-different-offsets-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict.test
Log Message:
-----------
[test][ssaf][AIX] Fix sed -i portability for AIX (#226293)
AIX's sed does not support the `-i` flag, causing the tests added in
https://github.com/llvm/llvm-project/pull/216183 to fail on AIX. This
patch updates the tests to use a POSIX-compliant redirect instead.
Commit: f1129f338806da062347a8ce019b88b51452917f
https://github.com/llvm/llvm-project/commit/f1129f338806da062347a8ce019b88b51452917f
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
R llvm/test/Transforms/PGOProfile/Inputs/indirect_call.proftext
M llvm/test/Transforms/PGOProfile/indirect_call_annotation.ll
Log Message:
-----------
[NFC][PGOProfile] Inline icall annotation proftext test (#226324)
Commit: 378ceb307bbc729bb918601a28c468df419b4d34
https://github.com/llvm/llvm-project/commit/378ceb307bbc729bb918601a28c468df419b4d34
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-Ext] Add builtins and IR intrinsics for packed shifts. (#225968)
The packed shift instructions use 5-bit shift amounts regardless of
element width. The C intrinsic should match this which means we can't
use C shift operators to implement them.
Rename RISCVISD::PSHL to RISCVISD::PSLL.
Commit: 1f9d3b2506fa32981fd281aab56357404af53ffe
https://github.com/llvm/llvm-project/commit/1f9d3b2506fa32981fd281aab56357404af53ffe
Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
Log Message:
-----------
[NFC][PGOProfile] Inline icall annotation proftext test (#226324)
Commit: bff7b7503c1cdfdba72bcd12ef8208ad42130946
https://github.com/llvm/llvm-project/commit/bff7b7503c1cdfdba72bcd12ef8208ad42130946
Author: Ömer Sinan Ağacan <omer at osa1.net>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
Log Message:
-----------
[msan] Update intrinsic list in arm64-vmax.ll (NFC) (#226387)
The intrinsics llvm.aarch64.neon.{u,s}{min,max} were removed in
0ce1b5f91add535d1e8b910ee90c178e054c65eb, remove the mentions of them in
the test file as per the review comment in #225339.
Commit: 6ec87e7ec4b3ca6f665a02e05d0e5fe9c37cd6cc
https://github.com/llvm/llvm-project/commit/6ec87e7ec4b3ca6f665a02e05d0e5fe9c37cd6cc
Author: Anshul Nigham <nigham at google.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
Log Message:
-----------
[Bazel] Add Telemetry dependency to lldb-dap (#226526)
Fixes lldb-dap bazel layering failure introduced in commit 1cc5657c4ff6,
where LLDBUtils.h includes llvm/Telemetry/Telemetry.h.
Commit: 23e12c97a04c034a9487f4b95e3531d1ead90c59
https://github.com/llvm/llvm-project/commit/23e12c97a04c034a9487f4b95e3531d1ead90c59
Author: Kunal Dubey <xakep8 at protonmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/test/CIR/IR/enum-attrs.cir
M clang/test/CIR/Lowering/call-llvm-intrinsic.cir
Log Message:
-----------
[CIR] Added fast-math flags to LLVM intrinsic calls (#224899)
Added fast-math flags attribute to CIR which cir.call_llvm_intrinsic now
carries through DirectToLLVM lowering. CIR now preserves fast-math flags
such as reassoc when lowering to llvm.call_intrinsic.
Added test for the same.
Commit: 774b4527fd60dc5ef7ed6539a8f2e6fe100e337b
https://github.com/llvm/llvm-project/commit/774b4527fd60dc5ef7ed6539a8f2e6fe100e337b
Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Target/RISCV/RISCVProcessors.td
M llvm/lib/Target/RISCV/RISCVSubtarget.h
M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
Log Message:
-----------
[Analysis][RISCV] More accurately estimate the cost of strided vector loads (#175135)
For small constant strides, attempt to predict the amount of coalescing
that will be done by the target machine to give a better cost estimate.
Currently, strided loads/stores are costed as having a cost of 1 per
element (i.e. being equivalent to scalar loads/stores).
---------
Co-authored-by: Luke Lau <luke_lau at icloud.com>
Commit: f2b3ba3affb147bf085fd58f1f7261dd32ae91c8
https://github.com/llvm/llvm-project/commit/f2b3ba3affb147bf085fd58f1f7261dd32ae91c8
Author: Sang Ik Lee <sang.ik.lee at intel.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
A mlir/test/Integration/Dialect/XeGPU/WG/simple_gemm_bf16.mlir
R mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F8.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F8.mlir
M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F8.mlir
Log Message:
-----------
[MLIR][XeGPU] Add MXFP fp8 WG GEMM tests and use shared input set (#225944)
Adds four workgroup-level tests, updates two and renames one, so that
seven tests covering bf16, mx-fp4 and mx-fp8 exercise the same
arithmetic on the same operand values and check against the same
expected result.
1. simple_mxfp_gemm -> simple_mxfp_gemm_F4 - renamed, for consistency
with the F4/F8 suffixes used by the quantize and dequantize tests
2. (new) simple_gemm_bf16 - non-quantized bf16 GEMM at the MXFP problem
size, as the unquantized comparison point, and where the shared input
set is documented
3. (new) simple_mxfp_gemm_F8 - f8E5M2 operands with f8E8M0FNU scales
4. (new) simple_mxfp_gemm_dequantizeB_F8
5. (new) simple_mxfp_gemm_quantizeA_F8 - fp8 counterparts of the
existing fp4 tests
6. simple_mxfp_gemm_dequantizeB_F4 and simple_mxfp_gemm_quantizeA_F4 are
updated in place.
What the update changes:
* Meaningful operand values. The tests previously used all-ones
operands, which cannot distinguish a correct kernel from one that swaps
the two fp4 values in a byte, misapplies a scale, or mixes up lanes or
tiles. Operands are now drawn from the 8 magnitudes e2m1 can represent -
0, 0.5, 1, 1.5, 2, 3, 4, 6 - indexed by (i + k) % 8 and (j + k) % 8, so
consecutive K values differ and the packing is exercised. Every value is
exact in f4E2M1FN, f8E5M2, bf16 and f32, which is what lets one input
set serve all three formats.
* Non-unit block scales. A carries a per-K-block divisor and B a
per-K-block scale, three of each, all powers of two, cycling per block
of 32. The quantized formats realise the same values through their own
scales, so a scale that is ignored or applied to the wrong block now
changes the result.
* One reference result. Each test computes its expected C with a host
f32 GEMM over f32 shadows of the operands, filled in the same loop that
writes the device operands so the two cannot drift. Every product is a
multiple of 0.25 and the largest result is well under 2^24, so the
accumulation is exact and the comparison is bit-for-bit rather than
approximate.
* A labelled result line. verifyMemRefF32's mismatch count is printed as
"mismatches: <n>" via printString/printI64/printNewline and matched with
{{^mismatches: 0$}}. A bare "0" check is a substring match over all of
stdout, so it passes on any 0 the runtime happens to print, including
one inside a larger number, and cannot distinguish a correct run from a
kernel that never ran.
* A fix for the fp4 A operand in simple_mxfp_gemm_F4.
gpu.alloc/memcpy/dealloc size a memref by rounding the element type up
to a whole byte - the size is lowered as gep(null, numElements) on i4,
which LLVM strides by 1 byte - so a packed fp4 memref is sized at twice
its real footprint. The test allocated A as memref<256x4096xf4E2M1FN>,
giving a 512 KB overread of a 524288-byte host buffer; because
mgpuMemcpy is asynchronous the fault surfaces later, at the stream sync
inside the first mgpuMemFree, so the test passed regardless. A now
crosses as memref<524288xi8> and is viewed as fp4 on the device, which
is what the B operand already does.
All seven follow the existing convention in this directory: the mlir-opt
compile is the active RUN line and the mlir-runner pipeline is kept
behind RUN-DISABLED with a MISMATCH check prefix, so no device is needed
and the compile-only run cannot pick up the result check.
Commit: b3ed324d42c0487e38980f4beddbb67c096f5f3f
https://github.com/llvm/llvm-project/commit/b3ed324d42c0487e38980f4beddbb67c096f5f3f
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lld/test/Unit/lit.cfg.py
M lld/unittests/AsLibELF/CMakeLists.txt
M lld/unittests/AsLibELF/OutputStream.cpp
M lld/unittests/AsLibELF/ROCm.cpp
Log Message:
-----------
[lld][test] Use LLVM helpers for input file discovery (#220404)
This was a suggestion on #220340 to avoid the custom env var handling
and use the `getInputFileDirectory` helper from the LLVM support library
Commit: 07aec21c88f48907b5da1d42f4522e106d30a9f1
https://github.com/llvm/llvm-project/commit/07aec21c88f48907b5da1d42f4522e106d30a9f1
Author: Guo Chen <guochen2 at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
A llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
A llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
Log Message:
-----------
[AMDGPU] merge 16bit mov pairs in post-RA peephole (#208625)
Address https://github.com/llvm/llvm-project/issues/207011. Add 5
patterns to merge 16bit mov pairs.
Since we hoist instruction which might cross the waitcnt boundary,
insert a new pass before waitcnt for this transformation
Co-Authored-By: Claude
Commit: 3621db6aff701dcd9e6ff54ea281d24ee2f43448
https://github.com/llvm/llvm-project/commit/3621db6aff701dcd9e6ff54ea281d24ee2f43448
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/for_loop_bitint_messages.c
Log Message:
-----------
[Clang][OpenMP] Fix crash on `_BitInt` loop bounds and counters in loop analysis (#226464)
Fixes #140074
When building the iteration count of an OpenMP loop, Sema derives a few
integer types from bit widths, e.g. to promote the upper bound to an
unsigned type as wide as the wider bound so that `upper - lower` cannot
overflow. Those types came from `ASTContext::getIntTypeForBitwidth`,
which only knows the standard integer widths and returns a null type for
anything else. With a bound or loop counter of type `_BitInt(931)` the
request was for a 960-bit type, the result was null, and it went
straight into `PerformImplicitConversion`, which asserted. The
`collapse(2)` in the reduced reproducer is incidental; a plain `#pragma
omp for` on the same loop crashes the same way.
The loop analysis now goes through a small helper that asks for the
standard type first and otherwise builds the `_BitInt` type of that
width and signedness with `ASTContext::getBitIntType`. It is used at the
three places that derive a type from a loop width: the upper-bound
promotion in `calculateNumIters`, the conversion to the loop variable's
width in `buildNumIterations`, and the logical iteration type in
`ActOnOpenMPCanonicalLoop`. Wide `_BitInt` loop variables are then
narrowed to the runtime's 64-bit iteration variable with the existing
warning, the same as `__int128` today.
Commit: 05f0bf084929c4fdbb5ac2952047ed00cd1d8b57
https://github.com/llvm/llvm-project/commit/05f0bf084929c4fdbb5ac2952047ed00cd1d8b57
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsSubtarget.h
Log Message:
-----------
Mips: Remove redundant Triple copy from the subtarget (#226528)
MCSubtargetInfo already stores the target triple, so MipsSubtarget's own
copy is unnecessary.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3bcbae4bed67f5cadd9f68d39af47ae5b5af1794
https://github.com/llvm/llvm-project/commit/3bcbae4bed67f5cadd9f68d39af47ae5b5af1794
Author: Alex Langford <alangford at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/source/Target/DynamicRegisterInfo.cpp
Log Message:
-----------
[lldb] Introduce DynamicRegisterInfo::RegisterSetWithStorage (#225555)
The RegisterSet struct is created in 2 different ways:
1.) Statically in headers/source files for register sets that are known
ahead of time.
2.) Dynamically according to input from outside of LLDB. Usually this is
through the gdb-remote stub, but may also come from a python script or
by determining an ISA variant's features (e.g. in RISCV).
This PR aims to address the lifetime of strings in RegisterSet. In
scenario (1), the lifetime of all data in a RegisterSet is static and
there is no concern about dangling pointers. However, in scenario (2),
DynamicRegisterInfo maintains a vector of RegisterSets. Until now, it
has relied on ConstString to persist the storage for the strings
indefinitely. As part of my quest to remove ConstString, I am
introducing a new struct wrapping RegisterSet that is responsible for
the storage and lifetime of the underlying RegisterSet strings.
Commit: d220d5e8239db918bd68f404dae589385a8029e8
https://github.com/llvm/llvm-project/commit/d220d5e8239db918bd68f404dae589385a8029e8
Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/Interpreter/Interpreter.cpp
A clang/test/Interpreter/HIP/hip-environment.hip
A clang/test/Interpreter/HIP/lit.local.cfg
M clang/test/lit.cfg.py
M clang/tools/clang-repl/ClangRepl.cpp
Log Message:
-----------
[clang-repl] Initialized HIP environment for clang-repl (#217582)
This PR initializes the HIP environment for clang-repl. Since an
IncrementalHipDeviceParser does not exist yet, a message is printed
after the environment setup indicating that the HIP environment was set
up but is not yet supported.
It also adds a test file that runs clang-repl with the -hip option and
checks that this message is printed. Once the parser is built, the
current test file will be removed and replaced with tests that verify
the complete flow.
This PR has a prerequisite, #217228, which skips emitting the
`__hip_cuid_` global under incremental extensions. Without it,
clang-repl's HIP mode would emit the same symbol in every incremental
module and fail at JIT link with a duplicate-symbol error.
Assisted by Claude Opus 4.8
Commit: 0ae27ad06c80796bdae576e27a44b2877e5c2a4f
https://github.com/llvm/llvm-project/commit/0ae27ad06c80796bdae576e27a44b2877e5c2a4f
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
M llvm/test/CodeGen/AArch64/sve-int-arith.ll
M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
Log Message:
-----------
Revert "[AArch64][CostModel] Consider some nxv1 operations as legal" (#226531)
Reverts llvm/llvm-project#214471
This caused a failure in
https://lab.llvm.org/buildbot/#/builders/198/builds/15417 and I want to
spend a bit more time to test the ISel for vector_reverse and
vector_splice. It's also quite surprising that the test picked a VF of
`vscale x 1`
Commit: 9214c04da2ea302b773797f50ad11636c7bab097
https://github.com/llvm/llvm-project/commit/9214c04da2ea302b773797f50ad11636c7bab097
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/test/CodeGen/align-loops.c
Log Message:
-----------
clang: Emit llvm.loop.align metadata for -falign-loops (#223147)
Commit: 9dcb4291cea195b9f0941d39540a4f2ccb9ff6bd
https://github.com/llvm/llvm-project/commit/9dcb4291cea195b9f0941d39540a4f2ccb9ff6bd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/test/API/python_api/value/TestValueAPI.py
Log Message:
-----------
[lldb][test] Skip the sp/rsp check in register sets that have no rsp (#226176)
The test asserts the ABI name `"sp"` resolves to `"rsp"` within the same
register set. However, on Windows the architectural 16-bit `"sp"` lives
in `"supplementary registers"` while `"rsp"` is in `"General Purpose
Registers"`, so there is nothing to compare against.
https://learn.microsoft.com/en-us/windows-hardware/drivers/debugger/x64-architecture
This fixes `python_api/value/TestValueAPI.py` (`test_register`) on
Windows in swiftlang.
Commit: 51ccdfeadcfe29b1d46f978e8582ada109aebb91
https://github.com/llvm/llvm-project/commit/51ccdfeadcfe29b1d46f978e8582ada109aebb91
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Add benchmark for string::pop_back() (#223729)
Commit: 68d354f5795682ea1fe03304ac3e7b2a43a36b0d
https://github.com/llvm/llvm-project/commit/68d354f5795682ea1fe03304ac3e7b2a43a36b0d
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M offload/include/Shared/SourceInfo.h
M openmp/docs/ReleaseNotes.md
Log Message:
-----------
Revert "[Offload][OpenMP] remove SourceInfo::removePath (#226283)" (#226557)
This reverts commit 5b8e65685b4fe99191a217bfa0527c51cf36925c.
In https://github.com/llvm/llvm-project/pull/226283 I forgot to update
info.c to account for the full file paths in its output, will update
commit with fixed test and re open PR
Commit: d92a0c1e5eba51dbf9a4c2a61a709b6758f2e40d
https://github.com/llvm/llvm-project/commit/d92a0c1e5eba51dbf9a4c2a61a709b6758f2e40d
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinDialect.td
M mlir/include/mlir/IR/BuiltinOps.td
M mlir/test/IR/module-op.mlir
M mlir/test/Transforms/sccp-callgraph.mlir
M mlir/test/Transforms/test-symbol-dce.mlir
M mlir/test/python/dialects/ml_program.py
Log Message:
-----------
[MLIR] Enable strict assembly properties for the builtin dialect (#225750)
Commit: 48884d2ddba0718960f68eb01a5b8c42c089f27c
https://github.com/llvm/llvm-project/commit/48884d2ddba0718960f68eb01a5b8c42c089f27c
Author: Cyndy Ishida <cyndy_ishida at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/Lex/HeaderSearch.cpp
A clang/test/ClangScanDeps/modules-context-hash-case-sensitive-vfs-paths.c
M clang/test/ClangScanDeps/modules-context-hash-module-map-path.c
A clang/test/Modules/implicit-module-map-path-case-sensitive.c
Log Message:
-----------
[clang][Modules] Respect case sensitivity when hashing implicit module map path (#226339)
Before this patch, the implicit module hash normalized the module map
path, but explicit modules always respected the case in paths. This
worked by depending on FileEntry caching and/or relocation checking to
resolve correctly. This behavior was both subtle and difficult to
understand. Instead, respect the casing in paths for hashing to match
explicitly built modules so they can never diverge.
This patch also updates `modules-context-hash-module-map-path.c` to
match a downstream version that already tested for the case where vfs
overlay entries differ by case but point to the same file.
`modules-context-hash-case-sensitive-vfs-paths.c` is the same but points
to different underlying files.
Commit: 36e7743d8ec9e743ae66485ddf2a6b27549c8833
https://github.com/llvm/llvm-project/commit/36e7743d8ec9e743ae66485ddf2a6b27549c8833
Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
Log Message:
-----------
[SandboxVec][LoadStoreVec][NFC] Tighten bundle element types (#226348)
Use Instruction*/Constant* for LoadStoreVec APIs where that is what
callers hold, and template getCombinedVectorTypeFor so BndlRef is not
forced through a non-covariant Value* conversion.
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 72674697a28c25467649c4993eb033dc4af65951
https://github.com/llvm/llvm-project/commit/72674697a28c25467649c4993eb033dc4af65951
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
Log Message:
-----------
[LV] Add tests for zero branch weights and execution frequencies (NFC). (#226553)
Add missing test coverage for VPlan-based execution frequency
computation:
* blocks entered via an edge with zero branch weight,
* blocks whose sibling edge has zero weight,
* nested branches whose skipping edges have zero weight,
* a block executing on all paths through the loop after a switch whose
probabilities do not add up to 1,
* frequencies below the smallest representable non-zero one
* all-zero weights making a join's frequency unknown
* estimated frequencies propagating through a branch with weights.
Also updates
llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
to check frequencies directly after the frequencies have been recorded.
Commit: a9809116ca6130906f20c727464ba8e878b59aa5
https://github.com/llvm/llvm-project/commit/a9809116ca6130906f20c727464ba8e878b59aa5
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-cron.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Add a benchmark machine for libstdc++ (#226346)
Add a machine that benchmarks the libstdc++ shipped with GCC 16 on macOS
instead of a libc++ build. To enable that, generalize the scripts and
workflows to make more aspects of machines.json optional (e.g. support
machines that don't need to build libc++).
Commit: 8dc7b3d92cc6371d942dc7619a81faa1f56de938
https://github.com/llvm/llvm-project/commit/8dc7b3d92cc6371d942dc7619a81faa1f56de938
Author: Joshua Batista <jbatista at microsoft.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/Sema/SemaHLSL.cpp
A clang/test/CodeGenHLSL/builtins/WaveReadLaneFirst.hlsl
A clang/test/SemaHLSL/BuiltIns/WaveReadLaneFirst-errors.hlsl
M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
A llvm/test/CodeGen/DirectX/LongVector/wave-readlane-first.ll
M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
A llvm/test/CodeGen/DirectX/WaveReadLaneFirst.ll
A llvm/test/CodeGen/DirectX/WaveReadLaneFirst_mat.ll
A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/wave-readlane-first.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst.ll
A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst_mat.ll
Log Message:
-----------
Add WaveReadLaneFirst HLSL function (#220373)
This PR adds the `WaveReadLaneFirst` HLSL function.
Fixes https://github.com/llvm/llvm-project/issues/99164
Assisted by: Github Copilot
Commit: 7b42d2f9991c3680627878a49b1b323cb56176a0
https://github.com/llvm/llvm-project/commit/7b42d2f9991c3680627878a49b1b323cb56176a0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Log Message:
-----------
[gn build] Port 07aec21c88f4 (#226571)
Commit: cc527d5399997024a68be6241e3a70a6f05a338e
https://github.com/llvm/llvm-project/commit/cc527d5399997024a68be6241e3a70a6f05a338e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
Log Message:
-----------
[gn] port b3ed324d42c04 (#226570)
Commit: bbd2e0f7ce13d2a1ff8336018d3b034eb3c698a0
https://github.com/llvm/llvm-project/commit/bbd2e0f7ce13d2a1ff8336018d3b034eb3c698a0
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/test/CodeGen/Mips/extins.ll
Log Message:
-----------
[Mips] Enable generic bitfield extract preparation (#226491)
Enable CodeGenPrepare's shift sinking when the subtarget supports
bitfield extract instructions. This exposes shift-and-mask patterns
across basic blocks to the existing MIPS extract combine.
Use hasExtractInsert() to keep this disabled for pre-r2 targets and
MIPS16. Add a minimal cross-block regression case to extins.ll.
Commit: 5bc083e278a59853fcfcf3649ba7a20457ead1e5
https://github.com/llvm/llvm-project/commit/5bc083e278a59853fcfcf3649ba7a20457ead1e5
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
Log Message:
-----------
[gn] port b3ed324d42c04 more (#226574)
Commit: 0a21a0712b800a3cc1af87e1d0ceb1a84f2b24bd
https://github.com/llvm/llvm-project/commit/0a21a0712b800a3cc1af87e1d0ceb1a84f2b24bd
Author: Patrick Rachford <pat at modular.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/test/MC/WebAssembly/reloc-pic64.s
Log Message:
-----------
[WebAssembly] Emit i64 GOT import globals on wasm64 (#226326)
WasmObjectWriter hardcodes the synthetic GOT import globals
(GOT.mem/GOT.func) to i32, but on wasm64 they hold 64-bit addresses, so
the object is type-invalid against the i64 global.get that consumes
them. wasm-ld already emits i64 GOT imports on wasm64, so this aligns
the object writer with the linker: the import type is gated on
is64Bit(), and the reloc-pic64 expectations are updated. The wasm32
checks are unchanged.
Commit: 229e7000493f118d49d23073d3bfa613b3798d85
https://github.com/llvm/llvm-project/commit/229e7000493f118d49d23073d3bfa613b3798d85
Author: Marcos Ramirez Joos <mramirezjoos.oss at proton.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M libc/src/__support/FPUtil/FEnvImpl.h
Log Message:
-----------
[libc] Avoid system fenv.h in FEnvImpl.h when LIBC_MATH_HAS_NO_EXCEPT is set (#224384)
The warning being added under #199009 triggers errors in subprojects
(e.g., flang) using libc headers that gate the use of `#pragma STDC
FENV_ACCESS ON` on the internal libc
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag, when building under
`-Wfenv-access -Werror`. As the idea is for these subprojects to not
access the libc FP environment (see
https://github.com/llvm/llvm-project/pull/199009#issuecomment-5299119396),
gating the use of system fenv.h functions on the
`LIBC_MATH_HAS_NO_EXCEPT` flag avoids having to specify the
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag when building them.
The three line removals are a clean-up related to
https://github.com/llvm/llvm-project/pull/200268. These uses are
redundant as the called functions already use the pragma when
appropriate.
Commit: 7ca0ce59bb82557a3052666562cc8f0d6d03ec41
https://github.com/llvm/llvm-project/commit/7ca0ce59bb82557a3052666562cc8f0d6d03ec41
Author: Finn Plummer <mail at inbelic.dev>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/test/CodeGen/DirectX/LoadInput.ll
M llvm/test/CodeGen/DirectX/StoreOutput.ll
Log Message:
-----------
[DirectX] Preserve all shader-stage bits during DXIL op lowering (#225874)
The vertex-stage bit is above bit 15 and was lost when the mask was
narrowed to uint16_t. This would cause an incorrect lowering error:
https://godbolt.org/z/rEMj8ssK9.
Corrected by keeping it as a 32 bit value.
Assisted by: ChatGPT 6 Astra
Commit: 44c84768990686eb1e24b4d1dcbd13fff37442bb
https://github.com/llvm/llvm-project/commit/44c84768990686eb1e24b4d1dcbd13fff37442bb
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVExpandPseudoPostRA.cpp
M llvm/lib/Target/RISCV/RISCVExpandPseudoPreEmit.cpp
M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
Log Message:
-----------
[RISCV] Replace uses of RegState::Define. NFC (#226569)
Either pass the destination register to the BuildMI call or use addDef
if there are multiple defs or other flags are set.
Commit: 19d72fd6deab2ea3addd8b945807abd02b1bbb70
https://github.com/llvm/llvm-project/commit/19d72fd6deab2ea3addd8b945807abd02b1bbb70
Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/Sema/SemaARM.cpp
M llvm/include/llvm/Support/AArch64MemoryHints.h
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
Log Message:
-----------
[AArch64] Rename memory hints to avoid clash with arm_acle.h macros (#226432)
Renames the hints in AArch64MemoryHints.h, as HINT_STSHH_KEEP and
HINT_STSHH_STRM are already defined in arm_acle.h.
Commit: e76dd51398a8ceac33e9e5bf3253dd6b03b965dd
https://github.com/llvm/llvm-project/commit/e76dd51398a8ceac33e9e5bf3253dd6b03b965dd
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll
Log Message:
-----------
[SLP][NFC]ADd a test with the missed vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226581
Commit: d506ee743cdaef27448964890f813bd3b7da7953
https://github.com/llvm/llvm-project/commit/d506ee743cdaef27448964890f813bd3b7da7953
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll
Log Message:
-----------
[SLP]Reuse the trimmed nodes in the perfectly matched gathers of the same user
The gather node, perfectly matching the node of the same user
transformed to gather during throttling, did not treat this node as a
reuse source, and was costed and emitted as a separate buildvector.
Fixes #219030
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226582
Commit: f57595ff59a0f012e0481c69613be907942c30b1
https://github.com/llvm/llvm-project/commit/f57595ff59a0f012e0481c69613be907942c30b1
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
Log Message:
-----------
[VPlan] Only exempt MaskedCond from cross-block dominance in verifier. (#226512)
Previously the verifier skipped all use-before-def checks for
MaskedCond, including uses in the same block before the definition.
Restrict the exemption to users in blocks not dominated by the
MaskedCond's block, so same-block use-before-def is still diagnosed.
Commit: 08af99fae9e079b448cd8877fc57376efe680cda
https://github.com/llvm/llvm-project/commit/08af99fae9e079b448cd8877fc57376efe680cda
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[SDPatternMatch] Implement m_True/False using SelectionDAG::isBoolConstant. (#226216)
Better than duplicating existing functionality.
Commit: e4af48bd3b330282f36f075d6fa7a4a0742376c1
https://github.com/llvm/llvm-project/commit/e4af48bd3b330282f36f075d6fa7a4a0742376c1
Author: Ehsan Amiri <ehsan.amiri at huawei.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LoopFuse.cpp
A llvm/test/Transforms/LoopFusion/guard_skip_empty_block.ll
Log Message:
-----------
[LoopFusion] Cleanup control flow before Fusion (#226289)
Non-loop successor of loop guard is sometimes modified by JumpThreading
(and potentially some other passes) to jump to a new block, that doesn't
post dominate the exit block of the loop:
Guard: br %c, %Preheader, %Skip
Skip: br %Merge
...
Exit: br %Merge
Merge: ...
Later on, this block becomes empty, so it can be removed. Its presence
prevents Loop::getLoopGuardBranch() from detecting the loop guard which
results in missed fusion opportunities. SimplifyCFG will run when "Skip"
is still not optimzied, so it cannot resolve this issue.
Assisted by Claude Code
Commit: ee3b6b045bc37b156c3860481090d68367e961dc
https://github.com/llvm/llvm-project/commit/ee3b6b045bc37b156c3860481090d68367e961dc
Author: agozillon <Andrew.Gozillon at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
M flang/lib/Lower/OpenMP/Utils.cpp
M flang/lib/Lower/OpenMP/Utils.h
M flang/test/Lower/OpenMP/declare-mapper.f90
A flang/test/Lower/OpenMP/target-map-nested-dtype-allocatable-member.f90
Log Message:
-----------
[Flang][OpenMP] Fix broken offload test caused by MapInfoFinalization code movement (#226384)
This change addresses the breakage in
target-map-nested-dtype-allocatable-member.f90 I inadvertently broke it
by removing the excess bit of implicit mapping code in the
MapInfoFinalizaiton pass without correctly addressing it.
This PR tries to do so by allowing mappers to be generated for member
maps such as var1%b, var2%b, which were previously being blocked.
Currently (and conveniently for this patch) we do avoid duplicate maps
in the scenario where we specify something along the lines of:
map(tofrom: var1, var1%b, var2, var2%b)
But that is through the fact that we completely negate var1/var2's
mapper attachment in this scenario, which I do not believe is the
correct behavior. But it's the existing behavior and facilitates this
patch, but it is something I'll see if I can address in a follow up PR
in the near future, the logic might need a bit of debating. For now this
simply seeks to amend the existing test without rocking the boat more
than required (that's the hope at least).
Commit: ae614a9564425ab206940f2b91607b1d77826068
https://github.com/llvm/llvm-project/commit/ae614a9564425ab206940f2b91607b1d77826068
Author: Aaron <58265908+aaronsms at users.noreply.github.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/lib/Format/ContinuationIndenter.cpp
M clang/unittests/Format/FormatTest.cpp
Log Message:
-----------
[clang-format] Preserve enum initializer continuation indentation (#223435)
Fixes #223011
Enum assignment operators are annotated as TT_EnumEqual so they can be
aligned independently in #194154. However, this means
ContinuationIndenter no longer recognizes a wrapped enum `=` as
TT_BinaryOperator. As a result, it may force unnecessary breaks within
the RHS binary expression.
Co-authored-by: Aaron Saw Min Sern <aaron at aaronsms.com>
Commit: 4db3dceb8d7bffa4b69042fe043652d616396237
https://github.com/llvm/llvm-project/commit/4db3dceb8d7bffa4b69042fe043652d616396237
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Support/StringRef.cpp
M llvm/unittests/ADT/StringRefTest.cpp
Log Message:
-----------
[llvm] produce a more consistent estimates of bit width needed when parsing an integer (#205947)
A colleague of mine noticed that `"12535824225335233"` parses in MLIR's
integer attribute parser as a 68-bit integer, even though it is a 53-bit
constant. I traced this back to `StringRef::consumeInteger`'s heuristic
estimate of the bit size. This change replaces that heuristic with a
default 64-bit storage, doubling the storage as more digits are parsed.
This produces a potentially larger over-estimate of the total storage
required, but does so in a less arbitrary manner and reduces the
over-approximation for numbers close to the 64-bit boundary.
Nb., A first iteration of this change tightened that estimate to at most
a 1-bit overapproximation with a lookup-table.
Assisted by Gemini
Commit: 1b4e7f41268eb3db5300e79256764140e509e3f5
https://github.com/llvm/llvm-project/commit/1b4e7f41268eb3db5300e79256764140e509e3f5
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaType.cpp
M clang/test/Sema/large-bit-int.c
M clang/test/Sema/types.c
M clang/test/SemaCXX/vector.cpp
Log Message:
-----------
[Clang] Enforce the same size limits for `vector_size` and `ext_vector_type` (#226375)
Fixes #165458
A `bool` vector declared with `ext_vector_type` isn't lowered as an LLVM
vector in memory: `ConvertTypeForMem` packs it into a single integer
with one bit per element. `BuildExtVectorType` only checked that the
element count fits in 32 bits, though, so a vector of 187,553,262 bools
got through Sema and the first consumer that needed its memory type (the
zero initializer of a tentative definition here) asked
`IntegerType::get` for far more than the 2^23 bits it supports. The
count matters for every element type, not just `bool`, because Sema also
forms bool vectors out of other vectors (`c ? true : false` with a
`char` vector condition), and `vector_size` was no better off with its
limits of 2^32 elements and 2^61 bytes.
Both attributes now go through the same two limits when the type is
built, reusing the existing "vector size too large" error: at most
`llvm::IntegerType::MAX_INT_BITS` (2^23) elements, and at most 2^28
bytes so that the natural alignment, the size rounded up to a power of
two, still fits in the `unsigned` alignment of `TypeInfo`. These replace
the old `isIntN(61)` and `UINT32_MAX` checks in `BuildVectorType`.
Commit: 210ecf77c9021941ee32c496df8b715615163df4
https://github.com/llvm/llvm-project/commit/210ecf77c9021941ee32c496df8b715615163df4
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/Instrumentor.cpp
Log Message:
-----------
[Instrumentor] Use CreateAllocationSize to compute size of alloca (#226330)
No significant functional change, but the IR might look slightly
different.
Commit: 14e819f14307fd85fe830cf9fe8d168a27b3db89
https://github.com/llvm/llvm-project/commit/14e819f14307fd85fe830cf9fe8d168a27b3db89
Author: Eli Friedman <efriedma at qti.qualcomm.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
Log Message:
-----------
[Instrumentor] Delete dead code from getAlloca() (#226331)
Commit: 8af5ec67c2001eb379d53cc61ccce0ca521a6c3c
https://github.com/llvm/llvm-project/commit/8af5ec67c2001eb379d53cc61ccce0ca521a6c3c
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/IR/AutoUpgrade.cpp
A llvm/test/Bitcode/upgrade-tbaa-struct.ll
A llvm/test/Bitcode/upgrade-tbaa-struct.ll.bc
Log Message:
-----------
[AutoUpgrade] Upgrade old-style !tbaa.struct field tags (#225967)
Extend the TBAA auto-upgrade to rewrite old-style scalar field tags
inside !tbaa.struct
to the struct-path aware format. bitcode (MetadataLoader) upgraded to
match the existing top-level !tbaa upgrade.
Commit: 35df00b0aa5d9f4deec215306dc24d247f5eb66c
https://github.com/llvm/llvm-project/commit/35df00b0aa5d9f4deec215306dc24d247f5eb66c
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
Log Message:
-----------
[TBAA] Recover !tbaa for a memcpy of struct with same type fields (#214116)
When InstCombine widens a small same-typed aggregate copy into an
integer load/store, it derives no !tbaa, and !tbaa.struct is nulled out,
so the load/store are left untyped. An untyped access may-alias every
typed access and blocks optimization:
struct Coord { int x, y; };
void copy_if_inbounds(Coord *dst, const Coord *src, const long *bound,
int n) {
for (int i = 0; i < n; ++i)
if (i < *bound)
dst[i] = *src; // {int,int} copy -> memcpy + !tbaa.struct
}
compare this to field-by-field copy, which has typed field access
void copy_fields_if_inbounds(Coord *dst, const Coord *src, const long
*bound, int n) {
for (int i = 0; i < n; ++i)
if (i < *bound) { dst[i].x = src->x; dst[i].y = src->y; } // per-field,
typed
}
Commit: 1173687801b5ab1e996f1aef21b760318e5da8c9
https://github.com/llvm/llvm-project/commit/1173687801b5ab1e996f1aef21b760318e5da8c9
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.cpp
M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
Log Message:
-----------
[VPlan] Use NeedsSingleScalar consistently for ::get (NFC). (#226494)
IsScalar/IsSingleScalar as used currently may be consfusing, as it could
be read as implying that the VPValue is a single-scalar, see
https://github.com/llvm/llvm-project/pull/226153.
But here it means that the caller only needs a single scalar. Update
wording.
PR: https://github.com/llvm/llvm-project/pull/226494
Commit: b4842bea58e6ca2a3de8692d5214b2441285513d
https://github.com/llvm/llvm-project/commit/b4842bea58e6ca2a3de8692d5214b2441285513d
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
M llvm/test/CodeGen/AMDGPU/call-constant.ll
M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
Log Message:
-----------
[GlobalISel] Preserve volatile and ordered atomic stores of undef (#226265)
Guard `erase_undef_store` with `isUnordered()`, matching InstCombine.
Ensures volatile and ordered atomic stores are preserved.
---------
Co-authored-by: Hongyu Chen <hongchen at nvidia.com>
Commit: f9f5ed22a7026261aec0075caa9862953a8a5fe6
https://github.com/llvm/llvm-project/commit/f9f5ed22a7026261aec0075caa9862953a8a5fe6
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/runtimes/CMakeLists.txt
Log Message:
-----------
[LLVM] Use complete runtime dependency list for multilibs (#226580)
Summary:
The current handling makes the multilib job depend on the base runtimes
job. This means that we will potentially depend on things that don't
necessarily need to be built to fulfil the multilibs job. Instead, just
depend on the individual targets for that multilib.
Commit: 91d0e2e91e2dc4c4729cbe911f67388453ee509d
https://github.com/llvm/llvm-project/commit/91d0e2e91e2dc4c4729cbe911f67388453ee509d
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M offload/include/Shared/SourceInfo.h
M offload/test/offloading/info.c
M openmp/docs/ReleaseNotes.md
Log Message:
-----------
[Offload][OpenMP] remove SourceInfo::removePath (#226586)
This Pr is the same as https://github.com/llvm/llvm-project/pull/226283
(which was reverted in https://github.com/llvm/llvm-project/pull/226557)
This Pr is the same as https://github.com/llvm/llvm-project/pull/226283
but with an update to info.c to account for the new full path output.
Commit: 5f3a611fa194ca76c91d3889adb68532cef44cee
https://github.com/llvm/llvm-project/commit/5f3a611fa194ca76c91d3889adb68532cef44cee
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M utils/bazel/MODULE.bazel.lock
M utils/bazel/linux_uapi.bzl
Log Message:
-----------
[bazel] Download linux UAPI headers when no local dir is set (#216868)
This PR defines a hermetic source for `@linux_api//:linux_uapi_headers`
that will be used in CI. If no `LINUX_UAPI_INCLUDE_DIR` value is
specified, then Bazel will download the linux-libc-dev debian package
and use its headers.
I originally wanted to pull from https://github.com/torvalds/linux and
build UAPI headers from source as it gives more control, but the repo is
rather large and took ~20s to download and ~10s to build. Using the
debian package's headers is closer to what the LLVM-libc fullbuild CI
[currently
does](https://github.com/llvm/llvm-project/blob/007551bacb899a409218574908d96b0633d52018/.github/workflows/containers/libc/Dockerfile#L38)
and is very fast.
Commit: c4195f63a560990bdb854357d66f759259bf1d3e
https://github.com/llvm/llvm-project/commit/c4195f63a560990bdb854357d66f759259bf1d3e
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/docs/Interfaces.md
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/test/mlir-tblgen/op-interface.td
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
Log Message:
-----------
[mlir][ODS] Share operation interface methods with raw-op bodies (NFC) (#226317)
Allow an operation interface method to use a shared callback when its
body only needs the raw Operation. Use it for OpenMP block-argument
indexing and slicing methods, avoiding per-operation wrappers while
preserving the existing fallback and external model paths.
Reduces the size of the OpenMP dialect text section by 1.68%.
Assisted-by: Codex
Commit: 7fbfd203131aa597c63d89e45392454280f89cfa
https://github.com/llvm/llvm-project/commit/7fbfd203131aa597c63d89e45392454280f89cfa
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/include/lldb/Utility/StructuredData.h
M lldb/source/Commands/CommandObjectVersion.cpp
M lldb/source/Utility/StructuredData.cpp
Log Message:
-----------
[lldb] Add StructuredData::Dictionary::ForEachSorted (NFC) (#226597)
`Dictionary::Serialize`, `Dictionary::GetDescription` and the build
configuration dump in `CommandObjectVersion` each collect the
dictionary's keys and sort them before iterating, so that the output
doesn't depend on StringMap's ordering. Factor that into a new
`ForEachSorted` method.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 5cab2963e13496c272a482145b11796e9e26eeb4
https://github.com/llvm/llvm-project/commit/5cab2963e13496c272a482145b11796e9e26eeb4
Author: Demetrios Chiuratto Agourakis <demetrios at agourakis.med.br>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/X86/llvm.frexp.ll
Log Message:
-----------
[SelectionDAG] Fix result index and vector width in unrollExpandedOp (#225886)
Fixes #224127.
In `DAGTypeLegalizer::WidenVectorResult`, `unrollExpandedOp` computes
the unroll count and widened vector type from the result being legalized
(`ResNo`) rather than unconditionally using result 0. For multi-result
nodes where result types differ (e.g. `ISD::FFREXP`), this prevents
mismatched vector widths and preserves the correct result index from
`DAG.UnrollVectorOp`.
Assisted-by: Claude
---------
Co-authored-by: Demetrios Chiuratto Agourakis <agourakis82 at gmail.com>
Commit: 5aa8fcc29bc47056411b3d23b0e7acc981ec3934
https://github.com/llvm/llvm-project/commit/5aa8fcc29bc47056411b3d23b0e7acc981ec3934
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
Log Message:
-----------
[RISCV] Support swapped select operands in combineTruncSelectToSMaxUSat. (#226584)
Handle (trunc (vselect (setugt X, 2^N-1), (sext (setgt X, 0)), X)) in
addition to the existing (trunc (vselect (setult X, 2^N), X,
(sext (setgt X, 0)))) form.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 7e91ef5d6aeaa7191a9354ddcff67d84bd8aebaf
https://github.com/llvm/llvm-project/commit/7e91ef5d6aeaa7191a9354ddcff67d84bd8aebaf
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/swap_ranges.h
M libcxx/include/module.modulemap.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/pstl.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
Log Message:
-----------
[libc++][pstl] Implementation of parallel std::swap_ranges() based on parallel __for_each (#224967)
This PR adds an implementation of parallel `std::swap_ranges()` based on
`__parallel_for_each_iter_pair()`.
The implementation is effectively a one-liner, but has to deal with
iterator ranges, thus is located in `cpu_algos`:
```c++
__pstl::__parallel_for_each_iter_pair<_Backend>(
first1, last1, first2,
[](ForwardIterator1 brick_first1, ForwardIterator1 brick_last1, ForwardIterator2 brick_first2) {
std::swap_ranges(std::move(brick_first1), std::move(brick_last1), std::move(brick_first2));
});
```
Part of #99938
Commit: 7fc4f276a4d0a4b1f968003d863ee50dc9ebcedd
https://github.com/llvm/llvm-project/commit/7fc4f276a4d0a4b1f968003d863ee50dc9ebcedd
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M flang/lib/Parser/openacc-parsers.cpp
M flang/test/Parser/acc-label-do.f90
Log Message:
-----------
[flang][openacc] Build full shared-label DO nests in AccNonBlockDoConstruct (#225997)
When an `!$acc loop` is associated with a labeled DO,
AccNonBlockDoConstruct
turned only that outer loop into a DoConstruct and left sibling
LabelDoStmts
that share the same terminator for later CanonicalizeDo. An inner `!$acc
loop`
then swallowed the shared terminator into its own DoConstruct, so
AnalyzeLabels (which runs before CanonicalizeDo) rejected the remaining
LabelDoStmts with "Label 'N' is not in DO loop scope".
Recurse on nested LabelDoStmts while parsing the associated loop so the
whole shared-label nest is a DoConstruct before label analysis. Add a
parser test where only the outer and innermost loops have LOOP
directives.
Commit: ce8e98386b89cf25065349c0e8147f839afda5dd
https://github.com/llvm/llvm-project/commit/ce8e98386b89cf25065349c0e8147f839afda5dd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorInterfaces.td
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAInterfaces.td
M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
Log Message:
-----------
[mlir][Interfaces] Share more operation interface bodies (NFC) (#226603)
Use raw operation access for methods that do not depend on the concrete
operation type. Keep typed access where operation-specific APIs are
needed.
This save a little bit of code size and improves build time.
Assisted-by: Codex
Commit: b5426c132f47b14874de7ce26a4e1bca80182e4c
https://github.com/llvm/llvm-project/commit/b5426c132f47b14874de7ce26a4e1bca80182e4c
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/support/Logging.h
M orc-rt/test/unit/support/LoggingTest.cpp
Log Message:
-----------
[orc-rt] Add ORC_RT_LOG_ENABLED macro. (#226500)
ORC_RT_LOG_ENABLED(Level) reports whether log sites at the given level
are compiled in, taking into account both the backend and the
ORC_RT_LOG_LEVEL floor. It takes the same level token as ORC_RT_LOG and
can be used in preprocessor conditionals, allowing code that relies on
logging to surface something important (e.g. a logging error reporter)
to choose an alternative when logging is compiled out.
Commit: f739fbc831cbd670b9dc3044a492240cfede20c3
https://github.com/llvm/llvm-project/commit/f739fbc831cbd670b9dc3044a492240cfede20c3
Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/diff-checks-force-interleave-count.ll
Log Message:
-----------
[LV] Honor -force-vector-interleave when generating diff checks (#225768)
We use both IC and UserIC in the checks below. However, once those
checks are done, UserIC will always override IC if it's non-zero. That
means using the max is unnecessary and can result in overly conservative
checks when UserIC < IC.
Commit: 201e76d4559e9d8acdfec1c202df8f2269acbd8b
https://github.com/llvm/llvm-project/commit/201e76d4559e9d8acdfec1c202df8f2269acbd8b
Author: Changpeng Fang <changpeng.fang at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
A llvm/test/CodeGen/AMDGPU/detect-dead-lanes-reg-sequence-narrow-slot.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
A llvm/test/CodeGen/AMDGPU/true16-uniform-f16-phi-copysign.ll
Log Message:
-----------
[CodeGen] Fix DetectDeadLanes for same-class copies with mismatched widths (#226556)
isCrossCopy() returned early whenever source and destination shared a
register class, treating the transfer as lane-for-lane. That is wrong
when a REG_SEQUENCE names a subregister slot narrower than the source
operand, e.g. a 32-bit vreg used as the lo16 piece of another 32-bit
vreg. Only take the early exit when the two widths match; otherwise fall
through to findCommonRegClass().
Fixes: ROCM-31212
Commit: 3a2787d5ca6ba0271f7203997f8a9b65679398a4
https://github.com/llvm/llvm-project/commit/3a2787d5ca6ba0271f7203997f8a9b65679398a4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt-c/config.h.in
M orc-rt/include/orc-rt-c/support/Logging.h
Log Message:
-----------
[orc-rt] Move ORC_RT_LOG_ENABLED into config.h. (#226617)
ORC_RT_LOG_ENABLED depends only on the logging configuration values
defined in config.h, but was defined in Logging.h, so checking whether a
log level is compiled in required pulling in the logging backend's
headers (e.g. <os/log.h>).
This commit moves ORC_RT_LOG_ENABLED (and its level-token aliases) into
config.h, so that headers can check the logging configuration without
including Logging.h.
Commit: f8c2918d49d3a3803ae3c9e1b6c216b24db9ad51
https://github.com/llvm/llvm-project/commit/f8c2918d49d3a3803ae3c9e1b6c216b24db9ad51
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/ordered-reduction-of-loads.ll
M llvm/test/Transforms/SLPVectorizer/RISCV/ordered-reduction.ll
Log Message:
-----------
[SLP][NFC]Add extra test for reductions vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226618
Commit: 90c150f868adb53b45dbf7489e93a23c22f6b6b3
https://github.com/llvm/llvm-project/commit/90c150f868adb53b45dbf7489e93a23c22f6b6b3
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/tools/clang-format/ClangFormat.cpp
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
Log Message:
-----------
Replace cl::bits with cl::list. NFC (#226399)
cl::bits packs enum values into an unsigned, which would block migration
to TableGen based representation. The three users only test membership.
LLM-aided
Commit: 0b61b734cf84a19491f4bcb61e04956995807051
https://github.com/llvm/llvm-project/commit/0b61b734cf84a19491f4bcb61e04956995807051
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/tool/ClangdMain.cpp
Log Message:
-----------
[clangd] Report retired flags after parsing (#226360)
cl::callback will be removed to enable migration to TableGen
https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/3
LLM-aided
Commit: ab08c75ffe0a40626a4dc62ed010d6e3ceece056
https://github.com/llvm/llvm-project/commit/ab08c75ffe0a40626a4dc62ed010d6e3ceece056
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/ReorderFunctions.cpp
M bolt/lib/Profile/DataAggregator.cpp
Log Message:
-----------
[BOLT] Remove cl::callback uses (#226359)
cl::callback will be removed to enable migration to TableGen based
representation.
https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/3
LLM-aided
Commit: e59a0c697552ae7d1c3aeed5774e829cdc5e16b5
https://github.com/llvm/llvm-project/commit/e59a0c697552ae7d1c3aeed5774e829cdc5e16b5
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/lib/bedrock/Session.cpp
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/tools/ogre/ogre.cpp
Log Message:
-----------
[orc-rt] Pass the reporting Session to Session error reporters. (#226622)
Session error reporters previously received only the Error, and had to
be supplied to the Session constructor, so they had no direct way to
refer to the Session reporting the error (e.g. to include its address in
a log message).
This commit changes ErrorReporterFn to take the reporting Session along
with the Error, and adds a Session::logErrors reporter that logs errors
via ORC_RT_LOG at Error level in the Session category. logErrors is only
available when Error-level logging is compiled in
(ORC_RT_LOG_ENABLED(Error)), so that it can't silently discard errors in
configurations where logging is compiled out. The noErrors and
AccumulateErrors test helpers are updated to work as both plain and
Session error reporters.
Commit: 240a9cb75dd9210cae8e987700d0ef6537b723cb
https://github.com/llvm/llvm-project/commit/240a9cb75dd9210cae8e987700d0ef6537b723cb
Author: Twice <twice at apache.org>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M mlir/python/mlir/dialects/ext.py
M mlir/test/python/dialects/ext.py
Log Message:
-----------
[MLIR][Python] Allow `Attribute` to denote unconstrained attributes in Python-defined ops (#224679)
Operation definitions support attribute constraints such as
`IntegerAttr`, `StringAttr`, and `IntegerAttr | StringAttr`, but
currently reject `Attribute` itself.
This change allows `Attribute` to denote an unconstrained attribute,
accepting both built-in and Python-defined attributes:
```python
class MyOp(MyDialect.Operation, name="my_op"):
arg: Operand
attr: Attribute
res: Result
```
This complements the unconstrained `Operand` and `Result` annotations
introduced in #220216. The annotation also works with `attribute()`
field specifiers, including `kw_only` and `default_factory`.
Assisted-by: Codex / GPT6
Commit: 163950475fc724cd5d62e868bdb46ba0c39e5519
https://github.com/llvm/llvm-project/commit/163950475fc724cd5d62e868bdb46ba0c39e5519
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
Log Message:
-----------
[CIR] Attach address space to global variables (#226455)
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 60059de6eb6d647857ac55b48d465580aa3ecdc5
https://github.com/llvm/llvm-project/commit/60059de6eb6d647857ac55b48d465580aa3ecdc5
Author: A. Jiang <de34 at live.cn>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M libcxx/include/__ranges/adjacent_transform_view.h
M libcxx/include/__ranges/adjacent_view.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/common_view.h
M libcxx/include/__ranges/concat_view.h
M libcxx/include/__ranges/counted.h
M libcxx/include/__ranges/drop_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/elements_view.h
M libcxx/include/__ranges/empty_view.h
M libcxx/include/__ranges/enumerate_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/__ranges/join_view.h
M libcxx/include/__ranges/join_with_view.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__ranges/movable_box.h
M libcxx/include/__ranges/non_propagating_cache.h
M libcxx/include/__ranges/rbegin.h
M libcxx/include/__ranges/rend.h
M libcxx/include/__ranges/reverse_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/split_view.h
M libcxx/include/__ranges/stride_view.h
M libcxx/include/__ranges/take_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/to.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__ranges/views.h
M libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__ranges/zip_view.h
Log Message:
-----------
[libc++][NFC] Avoid empty namespace in internal headers of `<ranges>` (#226034)
...in pre-C++20/23 modes. This follows up
0c94a978df783bd67535350eac84088fc482716a and fixes more complaints from
clang-tidy checks in CI.
Commit: 18af9ef08eec59d1bce7b941f164ba3f866acf59
https://github.com/llvm/llvm-project/commit/18af9ef08eec59d1bce7b941f164ba3f866acf59
Author: Douglas Yung <douglas.yung at sony.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/SemaOpenMP.cpp
R clang/test/OpenMP/error_message.c
M clang/test/OpenMP/error_message.cpp
M clang/test/OpenMP/parallel_message_messages.cpp
Log Message:
-----------
Revert "[clang][OpenMP] Only accept char strings in the message clause" (#226636)
Reverts llvm/llvm-project#226080
The newly added test error_message.c is failing on the PS4 bot
https://lab.llvm.org/buildbot/#/builders/144/builds/66294
Commit: e0316c1b4762263caa49e3c41ddde752a2b6b775
https://github.com/llvm/llvm-project/commit/e0316c1b4762263caa49e3c41ddde752a2b6b775
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/EvaluationResult.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/CodeGenCXX/global-init.cpp
M clang/test/SemaCXX/PR19955.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
Revert "[clang][bytecode] Stop relying on `CheckEvaluationResult()` (… (#226637)
…#186045)"
This reverts commit 55b498466a7b2620d09fcdf1b2300f71a35f6d8b.
This breaks two msan builders and reproducing the failure locally takes
forever.
Commit: 6a37cee09997b28c6cc708dd36b283bbd5bd7147
https://github.com/llvm/llvm-project/commit/6a37cee09997b28c6cc708dd36b283bbd5bd7147
Author: asudarsa-qti <asudarsa at qti.qualcomm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/lib/Interpreter/IncrementalAction.cpp
A clang/test/Interpreter/nonexistent-xcc-file.cpp
Log Message:
-----------
Fix for a clang-repl crash when passing non-existent file to --Xcc (#225861)
Problem: When clang-repl fails to initialize because an --Xcc file does
not exist, Interpreter::create() destroys the partially initialized
Interpreter. Its destructor unconditionally calls FinalizeAction(),
which invokes FrontendAction::EndSourceFile() without a registered
CompilerInstance and triggers an assertion.
Fix: Track whether interpreter initialization completed successfully and
only finalize the frontend action for successfully initialized
interpreters.
Test: Add a regression test covering a nonexistent --Xcc file.
This change resolves https://github.com/llvm/llvm-project/issues/225429
Assisted by gpt-5.6-luna
---------
Co-authored-by: Anutosh Bhat <andersonbhat491 at gmail.com>
Commit: c4896792fb97b2ad237c5c404cdda2d0cd4fcf61
https://github.com/llvm/llvm-project/commit/c4896792fb97b2ad237c5c404cdda2d0cd4fcf61
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M lldb/include/lldb/Target/Process.h
M lldb/source/API/SBProcess.cpp
M lldb/source/Target/Process.cpp
M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py
Log Message:
-----------
[lldb] Rebuild stack frames when a process address mask changes (#224989)
Commit: 4257da8ee2e84b3e62d2a2a5010e81823b799805
https://github.com/llvm/llvm-project/commit/4257da8ee2e84b3e62d2a2a5010e81823b799805
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-fixed-vf-no-epilogue.ll
M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
Log Message:
-----------
[LV] Always try to use fixed VF for low TC loops if no epilogue allowed. (#226318)
Remove the MaxPowerOf2RuntimeVF gate for falling back to using fixed
width VFs when no epilogue is allowed and the trip count is below the
minimum for tail folding.
MaxPowerOf2RuntimeVF being not set means we cannot compute the maximum
runtime VF, due to missing max vscale. In that case we are not able to
determine if a epilogue loop remains for scalable VFs, but we can still
pick a fixed VF, if no epilogue remains for it.
Also updates processLoop to ignore CM_EpilogueNotNeededFoldTail, if the
trip count is below the tail-folding threshold.
PR: https://github.com/llvm/llvm-project/pull/226318
Commit: 825903711948134578537eda6dd94a488ed50319
https://github.com/llvm/llvm-project/commit/825903711948134578537eda6dd94a488ed50319
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/support/bind.h
M orc-rt/test/unit/support/bind-test.cpp
Log Message:
-----------
[orc-rt] make bind_front match std::bind_front semantics. (#226646)
orc_rt::bind_front stands in for std::bind_front until the ORC runtime
can use C++20, so code written against it should keep working after the
switch. This commit brings its behavior in line with std::bind_front:
- noexcept propagation
- const and rvalue call operators, forwarding the wrapper's qualifiers
- no fallback to a differently-qualified call operator
- reference return types
- member pointers
- copyable wrappers, including nested binds
The unit tests are reorganized and extended to cover these.
Assisted-by: Claude
Commit: 0b4f72d00bdd2ef1707c5098d12936bfa159b414
https://github.com/llvm/llvm-project/commit/0b4f72d00bdd2ef1707c5098d12936bfa159b414
Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
A clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation (#218337)
This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.
This PR only adds the parser class, wiring it into Interpreter.cpp and
the end-to-end tests will come in a follow-up.
Assisted by Claude Opus 4.8
Commit: 5f609f950d2e80addf5566623013db68394334db
https://github.com/llvm/llvm-project/commit/5f609f950d2e80addf5566623013db68394334db
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/docs/CommandLine.md
M llvm/include/llvm/Support/CommandLine.h
M llvm/unittests/Support/CommandLineTest.cpp
Log Message:
-----------
[Support] Remove cl::bits (#226628)
cl::list covers the same use, and cl::bits would block migration to
TableGen based representation.
LLM-aided
Commit: c0b6ee14c2f8dece229da557352e116f9a6d7064
https://github.com/llvm/llvm-project/commit/c0b6ee14c2f8dece229da557352e116f9a6d7064
Author: David Green <david.green at arm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll
Log Message:
-----------
[AArch64] Add tests for sve fixed length reverse shuffles. NFC (#226661)
Commit: 96b5cc3d836494c56c8d5ae1e73e90864eb19a5d
https://github.com/llvm/llvm-project/commit/96b5cc3d836494c56c8d5ae1e73e90864eb19a5d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
Log Message:
-----------
[BPI] Add getEdgeProbabilitiesFromWeights (NFC). (#226560)
Move computing edge probabilities from branch weights to a static
helper. This allows re-using the core logic when computing execution
frequencies in VPlan, fixing a number of subtle differences.
While touching the code, also modernize the code slightly.
Note that the helper does not handle the case where all successors are
unreachable. This would need additional info and is not needed for the
VPlan case.
PR: https://github.com/llvm/llvm-project/pull/226560
Commit: 97e9558844822e1ff8f986319ef354fda42b8215
https://github.com/llvm/llvm-project/commit/97e9558844822e1ff8f986319ef354fda42b8215
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/DetectDeadLanes.cpp
R llvm/test/CodeGen/AMDGPU/detect-dead-lanes-reg-sequence-narrow-slot.mir
M llvm/test/CodeGen/AMDGPU/frem.ll
R llvm/test/CodeGen/AMDGPU/true16-uniform-f16-phi-copysign.ll
Log Message:
-----------
Revert "[CodeGen] Fix DetectDeadLanes for same-class copies with mismatched widths" (#226665)
Reverts llvm/llvm-project#226556
This is handling malformed IR and adding size based instead of register
class based reasoning
Commit: d94f3a52dad756d7354a9ca688b4ac76a97b9d38
https://github.com/llvm/llvm-project/commit/d94f3a52dad756d7354a9ca688b4ac76a97b9d38
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/test/unit/CMakeLists.txt
R orc-rt/test/unit/bedrock/SocketConnectorTest.cpp
M orc-rt/test/unit/bedrock/SocketTestUtils.h
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
A orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
Log Message:
-----------
[orc-rt] Make socket unit tests portable; build them on POSIX. (#226662)
SimpleRemoteCAOverSocketTest.cpp tests a POSIX-only implementation, so
move it to the POSIX source list. Its tests are portable, so move the
fixture's POSIX code into SocketTestUtils (makeStreamSocketPair,
sendAll, recvAll, makeNativeNonStreamSocket) rather than moving the file
under sys/posix; a Windows transport will need only Windows definitions
of those helpers.
makeStreamSocketPair documents the properties the tests rely on beyond a
connected stream pair: neither direction buffers StallingPayloadSize
bytes, and closing an end delivers what it already sent even if it has
unread data. AF_UNIX provides both; a loopback TCP pair may not.
SocketConnectorTest.cpp tests fd adoption with pipe and fcntl, so it is
a test of the POSIX implementation: move it to sys/posix/.
Assisted-by: Claude
Commit: a4e311d3f80f0bc1b0912d3f9f650a8d949a06e5
https://github.com/llvm/llvm-project/commit/a4e311d3f80f0bc1b0912d3f9f650a8d949a06e5
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
Log Message:
-----------
[ORC] Call createPThreadKey through a Proxy in MachO/ELFNixPlatform (#226656)
Replace the callSPSWrapper calls in MachOPlatform::createPThreadKey and
ELFNixPlatform::createPThreadKey with a Proxy built over the address
recorded during bootstrap, using a local CI descriptor for each
platform's create_pthread_key wrapper. The address stays in the
platforms' RuntimeFunction table, which is filled uniformly by the
bootstrap recording pass.
Commit: 0407861c32056a8ac57de2d7ef304ebbb3922139
https://github.com/llvm/llvm-project/commit/0407861c32056a8ac57de2d7ef304ebbb3922139
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/lib/Target/Mips/MipsFastISel.cpp
M llvm/lib/Target/Mips/MipsISelLowering.cpp
M llvm/lib/Target/Mips/MipsMachineFunction.cpp
M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
Log Message:
-----------
Mips: Route ABI queries through the subtarget (#226667)
Commit: e7019f85692bab245c02f4fa433b37105f2d9c0d
https://github.com/llvm/llvm-project/commit/e7019f85692bab245c02f4fa433b37105f2d9c0d
Author: Ivan Ho <ivan.ho at cl.cam.ac.uk>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
Log Message:
-----------
[MLIR][IRDL] Instantiate "." in IRDL-defined names as nested namespaces (#207035)
In PR #187911, it was revealed that the constraints on IRDL op names
placed by irdl-to-cpp were too restrictive.
This PR will address that by allowing "." in operation names to denote
nested namespaces, but not "$".
To discuss:
- ops like `wmma.f16.16x16x64.bf8_bf` cannot be registered as C++
identifiers cannot begin with a number. In discussions, we have opted to
prefix the generated namespaces with _.
Codex was used to generate the lit tests.
Close #187911.
Assisted-by: OpenAI Codex (GPT-5 and 6)
Commit: e8e4a54cfbbc054ec9801dea03e6c6868bf0708a
https://github.com/llvm/llvm-project/commit/e8e4a54cfbbc054ec9801dea03e6c6868bf0708a
Author: David Green <david.green at arm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll
Log Message:
-----------
[AArch64] Use SVE rev for full reverse shuffles with SVE128 (#224589)
When the vscale_range is always 1, we can make use of the SVE rev
instruction to perform a full 128bit vector reverse.
Sidesteps #223597 for SVE128
Commit: fccc8632f21fa8a13f7962932b614e8c1079d9ac
https://github.com/llvm/llvm-project/commit/fccc8632f21fa8a13f7962932b614e8c1079d9ac
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
Log Message:
-----------
[orc-rt] SimpleRemoteCAOverSocket: require a stream socket. (#226676)
SimpleRemote framing reads each message in as many parts as the socket
delivers it, which a socket that preserves message boundaries (datagram,
seqpacket) would truncate. Check SO_TYPE up front and reject anything
but SOCK_STREAM; the socket is owned by then, so it is closed on
failure.
Assisted-by: Claude
Commit: e9e27436e89127e5e42863cc6804945b3619b015
https://github.com/llvm/llvm-project/commit/e9e27436e89127e5e42863cc6804945b3619b015
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRDevices.td
M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
R llvm/lib/Target/AVR/TODO.md
Log Message:
-----------
[AVR][NFC] Improve some comment messages (#226423)
Commit: c495a9b796c46456e523a5eeb3690415ba99f5db
https://github.com/llvm/llvm-project/commit/c495a9b796c46456e523a5eeb3690415ba99f5db
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
M flang/include/flang/Optimizer/Dialect/FIRDialect.td
M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
M mlir/docs/DefiningDialects/Operations.md
M mlir/docs/DefiningDialects/_index.md
M mlir/docs/ReleaseNotes.md
M mlir/examples/toy/Ch4/include/toy/Ops.td
M mlir/examples/toy/Ch5/include/toy/Ops.td
M mlir/examples/toy/Ch6/include/toy/Ops.td
M mlir/examples/toy/Ch7/include/toy/Ops.td
M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUBase.td
M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
M mlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationBase.td
M mlir/include/mlir/Dialect/Complex/IR/ComplexBase.td
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
M mlir/include/mlir/Dialect/IRDL/IR/IRDL.td
M mlir/include/mlir/Dialect/Index/IR/IndexDialect.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.td
M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
M mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td
M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
M mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
M mlir/include/mlir/Dialect/MLProgram/IR/MLProgramBase.td
M mlir/include/mlir/Dialect/MPI/IR/MPI.td
M mlir/include/mlir/Dialect/Math/IR/MathBase.td
M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
M mlir/include/mlir/Dialect/PDL/IR/PDLDialect.td
M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
M mlir/include/mlir/Dialect/Quant/IR/QuantBase.td
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/include/mlir/Dialect/SMT/IR/SMTDialect.td
M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
M mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td
M mlir/include/mlir/Dialect/Shard/IR/ShardBase.td
M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
M mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
M mlir/include/mlir/Dialect/UB/IR/UBOps.td
M mlir/include/mlir/Dialect/Vector/IR/Vector.td
M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSABase.td
M mlir/include/mlir/Dialect/X86/X86.td
M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
M mlir/include/mlir/IR/BuiltinDialect.td
M mlir/include/mlir/IR/DialectBase.td
M mlir/test/lib/Dialect/Test/TestDialect.td
M mlir/test/mlir-tblgen/op-format-invalid.td
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/python/python_test_ops.td
Log Message:
-----------
[mlir] Enable strict properties in assembly formats by default (#225742)
Make strict property assembly formats the default and remove redundant
per-dialect settings. Keep legacy test fixtures explicitly opted out and
update the documentation.
Downstream can opt out for now using `let
useStrictPropertiesInAssemblyFormat = 0;` ; This will be removed in a
future release.
Part of #155475
Assisted-by: Codex
Commit: 9f8d812535d90508d9932cc7c7d39756a5e5d2db
https://github.com/llvm/llvm-project/commit/9f8d812535d90508d9932cc7c7d39756a5e5d2db
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
R clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
Revert "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226679)
Reverts llvm/llvm-project#218337 buildbot failures
Commit: 10872feadab49e23b8a2ef831dc454b712937ae2
https://github.com/llvm/llvm-project/commit/10872feadab49e23b8a2ef831dc454b712937ae2
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/reduced-value-next-to-fused-fmul.ll
A llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-sunk-into-fadd-block.ll
Log Message:
-----------
[SLP][NFC]Add extra FMA candidates tests, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226684
Commit: 8b96ddbf9cb3437ee4e47a9f60dc983a1f2be8d5
https://github.com/llvm/llvm-project/commit/8b96ddbf9cb3437ee4e47a9f60dc983a1f2be8d5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/trimmed-node-matching-gather-emitted-first.ll
Log Message:
-----------
[SLP]Do not reuse transformed nodes in gathers emitted before their user
Gathers of the users with all scalars used outside the block are emitted
before the user, while the transformed nodes are emitted with the user.
Reusing such a transformed node postponed the gather and moved only the
last instruction of the transformed node buildvector, breaking dominance.
Fixes #226674
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226687
Commit: ea0493b90c036776652105da246ce3fa56e33901
https://github.com/llvm/llvm-project/commit/ea0493b90c036776652105da246ce3fa56e33901
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyExtractorTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyTestSupport.h
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/ParsedAST.h
Log Message:
-----------
[SSAF] Extract the virtual method override relation per TU (#213316)
A virtual call may dispatch to any override of its callee, so a whole-program
analysis cannot reason about a method's parameters and return value in
isolation. It needs to know which method overrides which, and which slots
that relates. Collect this per TU, so a later pass can join the related
slots into families.
JSON serialization lands separately, so the summary is not writable via
`--ssaf-extract-summaries` yet.
§1 of rdar://179151603
Assisted-By: claude
Commit: 2305da864cb3b66e1fe857c3018bf7d94253bb8a
https://github.com/llvm/llvm-project/commit/2305da864cb3b66e1fe857c3018bf7d94253bb8a
Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
Log Message:
-----------
[NFC][SLP][AMDGPU] Precommit a cross-block fmul fadd contraction test (#226609)
Two contract fmuls feed contract fadds in different successors. AMDGPU
sinks such an fmul into the block of its user and fuses the pair, so the
scalar form is one fma per path. Record the current behaviour, the pair
is kept scalar when the fmul is operand 0 of the fadd and paired when it
is operand 1.
Commit: 6b85e67a473ebe127aa31b742adc1fe2d53cb5bf
https://github.com/llvm/llvm-project/commit/6b85e67a473ebe127aa31b742adc1fe2d53cb5bf
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/test/CIR/CodeGenCUDA/device-stub.cu
A clang/test/CIR/CodeGenCUDA/missing-gpubinary.cu
A clang/test/CIR/Diagnostics/mlir-error-routing.cpp
R clang/test/CIR/Diagnostics/mlir-error-routing.cu
A clang/test/CIR/IR/invalid-cuda-device-binary.cir
Log Message:
-----------
[CIR][CUDA] Read fat binary in CIRGen and store its bytes on the module (#225971)
Two problems with the current implementation of GPU CIR:
1. `LoweringPrepare` read the fat binary from disk, via
`astCtx->getSourceManager().getFileManager().getVirtualFileSystem()`. A
transform pass should not do I/O, and this is one of the `ASTContext`
dependencies that keeps the post-CIRGen pipeline from being IR-to-IR.
Some of the related discussion on this has been done
[here](https://discourse.llvm.org/t/rfc-clangir-making-cir-pipeline-boundaries-first-class-driver-artifacts/90998)
and PR: #219048
2. `#cir.cu.binary_handle` stored the *file path*. That's a build input,
not a
property of the program: it bakes one machine's directory layout into a
`.cir`.
The PR removes the file path and adds an attribute
CIRGen now reads the file in and records the contents
as `#cir.cu.device_binary`, a `StringAttr` of raw bytes. The
attribute is deleted once LoweringPrepare "consumes" it.
A couple of notes:
1. The GPU dialect has a similar representation. We may want to move
towards that direction slowly, but I don't see any value doing this now.
It will confuse the direction of this PR.
2. The test `clang/test/CIR/Diagnostics/mlir-error-routing.cu` has
completely
changed, because it relied on an error occurring when the file attribute
was missing.
Since we deleted that attribute completely, the test was failing.
---------
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 0a90c92d5285cae7f7b7ae26573e39df5898cafc
https://github.com/llvm/llvm-project/commit/0a90c92d5285cae7f7b7ae26573e39df5898cafc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M mlir/examples/toy/Ch4/include/toy/Ops.td
M mlir/examples/toy/Ch5/include/toy/Ops.td
M mlir/examples/toy/Ch6/include/toy/Ops.td
M mlir/examples/toy/Ch7/include/toy/Ops.td
M mlir/test/Analysis/DataFlow/test-last-modified-callgraph.mlir
M mlir/test/Analysis/DataFlow/test-last-modified.mlir
M mlir/test/Analysis/DataFlow/test-next-access.mlir
M mlir/test/Analysis/DataFlow/test-strided-metadata-range-analysis.mlir
M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
M mlir/test/Dialect/Affine/int-range-interface.mlir
M mlir/test/Dialect/Affine/simplify-min-max-ops.mlir
M mlir/test/Dialect/Affine/simplify-with-bounds.mlir
M mlir/test/Dialect/Affine/transform-op-simplify-min-max-ops.mlir
M mlir/test/Dialect/Arith/int-range-analysis-convergence.mlir
M mlir/test/Dialect/Arith/int-range-interface.mlir
M mlir/test/Dialect/Arith/int-range-loop-iter-args.mlir
M mlir/test/Dialect/Arith/int-range-narrowing.mlir
M mlir/test/Dialect/Arith/int-range-opts-bug-119045.mlir
M mlir/test/Dialect/Arith/int-range-opts.mlir
M mlir/test/Dialect/GPU/int-range-interface-cluster.mlir
M mlir/test/Dialect/GPU/int-range-interface.mlir
M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
M mlir/test/Dialect/MemRef/int-range-inference.mlir
M mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
M mlir/test/Dialect/Tensor/int-range-inference.mlir
M mlir/test/Dialect/Vector/int-range-interface.mlir
M mlir/test/IR/attribute.mlir
M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops-invalid.mlir
M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops.mlir
M mlir/test/Transforms/loop-invariant-code-motion.mlir
M mlir/test/Transforms/make-composed-folded-affine-apply.mlir
M mlir/test/lib/Dialect/Test/TestDialect.td
M mlir/test/lib/Dialect/Test/TestOps.td
M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
M mlir/test/mlir-tblgen/constant-str-attr-invalid.mlir
M mlir/test/mlir-tblgen/op-format-invalid.td
M mlir/test/mlir-tblgen/op-format.mlir
M mlir/test/mlir-tblgen/op-format.td
M mlir/test/mlir-tblgen/pattern.mlir
M mlir/test/python/dialects/python_test.py
M mlir/test/python/python_test_ops.td
Log Message:
-----------
[mlir] Remove remaining strict property assembly opt-outs (#226702)
Migrate Toy, test, and Python dialect formats to use prop-dict for
inherent properties. Update assembly fixtures and expected output for
strict property printing.
Assisted-by: Codex
Commit: 688a1498b3ce9011ee58c214086e3cd408e86f5e
https://github.com/llvm/llvm-project/commit/688a1498b3ce9011ee58c214086e3cd408e86f5e
Author: Amit Tiwari <Amit.Tiwari at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/collapse_iv_width_codegen.cpp
Log Message:
-----------
[Clang][OpenMP] Optimize `collapse` IV bit-width precision expression (#225612)
`collapse` used to build both a 32-bit and a 64-bit trip-count, then
keep one.
This patch does the same in `checkOpenMPLoop`:
If we know 32-bit is enough, build only 32-bit.
Else build 64-bit first.
Build 32-bit only when the product is a compile-time constant and fits.
Origin: `flatten` already builds only the width it keeps.
Commit: e217205575ac65acd6d301b036bea8875f5eaa16
https://github.com/llvm/llvm-project/commit/e217205575ac65acd6d301b036bea8875f5eaa16
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
Log Message:
-----------
[VPlan] Mark default value or ExtractLastActive as only first lane used. (#226153)
The default value (operand 0) of ExtractLastActive is the scalar value
of @llvm.experimental.vector.extract.last.active. Only the first lane is
used, mark accordingly.
PR: https://github.com/llvm/llvm-project/pull/226153
Commit: f950b04465ee6a198f3fa5644e4f70711041df8a
https://github.com/llvm/llvm-project/commit/f950b04465ee6a198f3fa5644e4f70711041df8a
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/lib/Transforms/Utils/LoopUnroll.cpp
M llvm/lib/Transforms/Utils/LoopUtils.cpp
Log Message:
-----------
[Transforms] Remove unused functions (NFC) (#226655)
createAnyOfReduction:
The last caller was removed on January 18, 2026 in commit
ae1bd068db293c494c4c6314da3b9d138706460d.
canHaveUnrollRemainder:
The last caller, in an assert, was removed on May 1, 2026 in commit
316f0d3bfeaf7eee7b6d4ae60d357a8216ec5264.
Assisted-by: Antigravity
Commit: ab52e9f971d626346d70190df72636b477f6c089
https://github.com/llvm/llvm-project/commit/ab52e9f971d626346d70190df72636b477f6c089
Author: Yordan Vásquez <vyordangiovani at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/include/complex
M libcxx/include/valarray
A libcxx/test/std/numerics/complex.number/complex/complex_requires_cv_unqualified_object.verify.cpp
A libcxx/test/std/numerics/numarray/template.valarray/valarray_requires_cv_unqualified_object.verify.cpp
Log Message:
-----------
[libc++] Add static_assert diagnostics for LWG3133 named requirements (#212360)
Add a static_assert to both std::complex<T> and std::valarray<T>
requiring that T be a cv-unqualified object type that satisfies the
Cpp17DefaultConstructible, Cpp17CopyConstructible, Cpp17CopyAssignable,
and Cpp17Destructible named requirements, per the revised wording in
[numeric.requirements]. This mirrors the existing pattern already used
by std::optional<T>.
Non-_v (class-style) trait forms are used throughout so that the
assertion is well-formed even when <complex>/<valarray> are included in
C++03/11/14 mode.
Test coverage:
- A .verify.cpp for complex<T> and one for valarray<T>, each covering
six failure modes: cv-qualified types, and one type violating each of
the four named requirements individually.
Follows-up e062a29cf865bb7cadea6cb605c9f3515e5b883f.
Commit: 5302d361339066363854a4e12e16e413af9ce1ce
https://github.com/llvm/llvm-project/commit/5302d361339066363854a4e12e16e413af9ce1ce
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/docs/analyzer/checkers.md
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
M clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
Log Message:
-----------
[WebKit Checkers] Add built-in recognition for standard view types (#226350)
libc++ doesn't fully annotate `[[clang::lifetimebound]]` for all view
types. This results in false negatives in borrow checking.
Ultimately we need to fix this in libc++, but for now we can work around
the most common / most important false negatives. For example, borrow
checking can now check
for (auto& x : vector | std::views::reverse) { ... }
Assisted-by: Claude
Commit: 207f7f00ced9adf54e79f2bbf2c59a485a608495
https://github.com/llvm/llvm-project/commit/207f7f00ced9adf54e79f2bbf2c59a485a608495
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/arith-fp.ll
Log Message:
-----------
[CostModel][X86] arith-fp.ll - test AVX512DQ instead of AVX512BW (#226519)
AVX512DQ has instructions relevant to fp arithmetic (vXi64 fp2int in particular)
Commit: d297af3b3d7a086d64f1477cfa682a16fcfa3260
https://github.com/llvm/llvm-project/commit/d297af3b3d7a086d64f1477cfa682a16fcfa3260
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/AArch64/sve-induction-wrapflags.ll
M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
Log Message:
-----------
[LV] Add tests for wide induction wrap flags (NFC). (#226715)
Add tests for:
* inductions where the lane offsets may signed-overflow, even if the
scalar induction values do not,
* inductions whose increment does not directly update the phi, where the
increment's wrap flags do not apply to the induction,
* narrow inductions where the VF may exceed the signed maximum of the
induction type.
Commit: 555d8a58b85f0cfcbad0fc7cf7b13bbef4d4ca30
https://github.com/llvm/llvm-project/commit/555d8a58b85f0cfcbad0fc7cf7b13bbef4d4ca30
Author: David Green <david.green at arm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
Log Message:
-----------
[AArch64] Reorganise perfect shuffle generation. NFC (#224526)
This adds a generatePerfectShuffle implementation for parsing through
the perfect shuffle tables, generating a list of ShuffleEntry's that
represent the sequence of shuffles that need to be performed. This is
intended to be a NFC as-is, allowing it to be reused in global isel and
extended in the future to handle shuffles that are not part of the
shuffle table. The number of instructions generated can also be used for
costing shuffles, as we do for immediate generation.
Commit: 0ead65c731fa09596fbcc9b5109e504e9e7adb7e
https://github.com/llvm/llvm-project/commit/0ead65c731fa09596fbcc9b5109e504e9e7adb7e
Author: Michael G. Kazakov <mike.kazakov at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A libcxx/test/benchmarks/algorithms/nonmodifying/pstl.find.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/pstl.sort.bench.cpp
A libcxx/test/benchmarks/numeric/pstl.transform_reduce.bench.cpp
Log Message:
-----------
[libc++][pstl] Add more benchmarks of the parallel algorithms (#225908)
This PR adds benchmarks of these 3 parallel algorithms:
- `std::find(policy, ...)`
- `std::sort(policy, ...)`
- `std::transform_reduce(policy, ...)`
---------
Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>
Commit: 6aefa9a60eb523ca3d8601ab69509e057730ac8d
https://github.com/llvm/llvm-project/commit/6aefa9a60eb523ca3d8601ab69509e057730ac8d
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.h
M llvm/test/CodeGen/ARM/module-target-abi.ll
Log Message:
-----------
ARM: Remove cached TargetABI from ARMBaseTargetMachine (#226482)
This cannot account for the "target-abi" module flag, so
let the uses query that. ARMElfTargetObjectFile was the one user of
this value, so this failed to respect the module flag.
Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>
Commit: fc99ddb168769dd732f40b74c09f9d800c30e7e3
https://github.com/llvm/llvm-project/commit/fc99ddb168769dd732f40b74c09f9d800c30e7e3
Author: Alan Zhao <ayzhao at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/cmake/modules/GetLibraryName.cmake
Log Message:
-----------
[cmake][Windows] Do not strip library prefixes on Windows (#226635)
Commit: 808c726db2fe24f7ba2901f5701ae19cfe602f0a
https://github.com/llvm/llvm-project/commit/808c726db2fe24f7ba2901f5701ae19cfe602f0a
Author: Prajit Rahul <prajitrahul05 at gmail.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/docs/Lexicon.md
Log Message:
-----------
[LLVM][Docs] Define IR in the lexicon (#221388)
Define IR in the LLVM lexicon using terminology from the LLVM Language
Reference Manual, including its SSA-based structure and three equivalent
representations.
Fixes #139867
AI Usage: ChatGPT
Commit: 315a38a1ef3825e4e7ebe188353b4c5329751453
https://github.com/llvm/llvm-project/commit/315a38a1ef3825e4e7ebe188353b4c5329751453
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
M llvm/test/Transforms/LoopVectorize/pr35773.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
Log Message:
-----------
[VPlan] Take wide induction wrap flags from the increment of the phi. (#226726)
The binary operator of an integer InductionDescriptor is the incoming
value from the latch, which is not required to have the phi as operand.
E.g. for
%x = add i32 %iv, 5
%iv.next = add nuw nsw i32 %x, 1
the flags only apply to %x + 1, while the induction step is 6, and %iv +
6 may wrap even though %iv.next does not. Determine the wrap flags from
the increment of the header phi instead, and only if it adds to or
subtracts from the phi directly.
Commit: 899d817c7950c997402cd229935cd822acf45b08
https://github.com/llvm/llvm-project/commit/899d817c7950c997402cd229935cd822acf45b08
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
M llvm/test/Transforms/LoopVectorize/RISCV/countable-early-exit-no-epilogue.ll
Log Message:
-----------
[LV] Skip low-trip count logic there is no scalar tail. (#225633)
https://github.com/llvm/llvm-project/pull/195823 added logic consider
vectorization of low trip count loops if there was no or a single
iteration remaining.
This causes loops to be vectorized with a VF where no scalar tail
remains, even if it is required for legality (loop with multiple
countable exits require scalar epilogue to pick the exit).
For now, limit to cases where there's a scalar iteration remaining.
PR: https://github.com/llvm/llvm-project/pull/225633
Commit: e0b3e4c82911376fcb2dfcbc4a3dd3f4f5891aba
https://github.com/llvm/llvm-project/commit/e0b3e4c82911376fcb2dfcbc4a3dd3f4f5891aba
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
Log Message:
-----------
[LAA] Remove unused functions (NFC) (#226733)
Remove RuntimePointerChecking::empty and LoopAccessInfo::getNumLoads /
getNumStores, which have no callers, together with the NumLoads and
NumStores counters that were only read by the latter.
Commit: 8c153f78f7c0a842edfee3f1601dee1776c941d6
https://github.com/llvm/llvm-project/commit/8c153f78f7c0a842edfee3f1601dee1776c941d6
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
Log Message:
-----------
[SCEV] Remove unused classof(const SCEVUse *) overloads (NFC) (#226734)
isa/cast/dyn_cast on SCEVUse go through simplify_type or CastInfo.
classof(SCEVUse) is unused.
Commit: 7615da10b75c57286a4032eac8bb43c1b8d2ba46
https://github.com/llvm/llvm-project/commit/7615da10b75c57286a4032eac8bb43c1b8d2ba46
Author: Dan Salvato <dan at teamsalvato.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
M llvm/lib/Target/M68k/M68kInstrArithmetic.td
M llvm/lib/Target/M68k/M68kInstrData.td
M llvm/lib/Target/M68k/M68kInstrInfo.cpp
M llvm/lib/Target/M68k/M68kInstrInfo.h
M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
M llvm/test/CodeGen/M68k/Bits/btst.ll
M llvm/test/CodeGen/M68k/Control/cmp.ll
M llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
M llvm/test/CodeGen/M68k/Control/setcc.ll
M llvm/test/CodeGen/M68k/Data/load-extend.ll
M llvm/test/CodeGen/M68k/Data/sext-i1.ll
M llvm/test/CodeGen/M68k/register-spills.ll
Log Message:
-----------
[M68k] Finish implementation of `MOVX` (move and extend) pseudo-instructions and fix related errors (#218938)
This patch adds remaining addressing modes to the "move and extend"
pseudo-instructions, and fixes a few errors and inconsistencies in the
logic that caused inefficient code generation.
- Remaining addressing modes were implemented to match non-pseudo `MOVE`
instructions.
- Names of the pseudos now correctly reflect the register classes they
operate on, e.g. `MOVZXd32r16` for XR16 -> DR32.
- Fixed an issue where `MOVZX` could be allocated to an address
register, which has no way to zero-extend the result. (There were even
some of these in the test `register-spills.ll`, emitted as illegal
instructions, but the test doesn't have instruction verification
enabled, so it wasn't caught.)
- Fixed some `extload` patterns where the register was unnecessarily
extended to 32 bits before being truncated to its final size, causing
redundant instructions to be omitted.
- Fixed `anyext` patterns lowering to `MOVZX` instead of `MOVX`, causing
unnecessary zero-extensions.
- An inconsistency was fixed where the expansion logic would perform a
source-sized move when loading from memory, but a destination-sized move
when moving between registers. They now always perform a source-sized
move, which improves clarity in the assembly output and has more
opportunity for future optimizations.
Commit: bf529329b5ce85d42a5c793951ec9b31100cd84e
https://github.com/llvm/llvm-project/commit/bf529329b5ce85d42a5c793951ec9b31100cd84e
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
A clang/test/CodeGen/RISCV/lto-module-asm-abi.c
A cross-project-tests/.clang-format
A cross-project-tests/riscv/lit.local.cfg
A cross-project-tests/riscv/lto-inline-asm-abi.c
M lld/test/ELF/lto/riscv-target-abi.ll
M llvm/test/CodeGen/RISCV/module-asm-features.ll
M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
M llvm/test/LTO/RISCV/module-asm.ll
M llvm/test/MC/RISCV/mapping-across-sections.s
Log Message:
-----------
[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)
No functional change intended here, just adding test coverage for RISC-V LTO
inline assembly ABI handling (following up on
https://github.com/llvm/llvm-project/pull/223606) and for the `$x<arch>` ELF
mapping symbols emitted for module and function target features.
The `TODO`s for `.lto_discard` dropping module inline asm target features and
for the missing/duplicate `$x<arch>` mapping symbols will be addressed in the
following commits.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225129
Commit: 22d3cccd0beaf7d2c7728d0bc6fa347283b0bc13
https://github.com/llvm/llvm-project/commit/22d3cccd0beaf7d2c7728d0bc6fa347283b0bc13
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M cross-project-tests/riscv/lto-inline-asm-abi.c
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/test/LTO/RISCV/module-asm.ll
Log Message:
-----------
[LTO] Preserve module inline asm target properties for .lto_discard and symvers (#225130)
Previously, LTO::addRegularLTO() and IRLinker::run() called
prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when
synthesizing `.lto_discard` and imported `.symver` directives, creating a new
GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving
the existing module inline asm's properties. Copy the front fragment's Props so
these synthesized directives are merged into the module's inline asm with the
same target features.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225130
Commit: 0ab3502ec56a5d8330c79849945b9fefd2668f01
https://github.com/llvm/llvm-project/commit/0ab3502ec56a5d8330c79849945b9fefd2668f01
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/test/MC/RISCV/mapping-across-sections.s
Log Message:
-----------
[RISC-V][MC] Fix mapping symbol section tracking on popSection() (#225131)
Previously, RISCVELFStreamer::changeSection() saved LastEMS and LastEmittedArch
under getPreviousSection().first instead of getCurrentSection().first. When
MCStreamer::popSection() switches back to a previous section,
getPreviousSection() already points to the destination section being restored
rather than the section being exited. This clobbered the destination section's
saved mapping symbol state and caused duplicate `$x<arch>` mapping symbols to
be emitted whenever returning to `.text`.
Use getCurrentSection().first instead, matching AArch64ELFStreamer and
ARMELFStreamer.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225131
Commit: 6eeb3b4ebdae20cd5f1e0fe5e74df3b418b654e2
https://github.com/llvm/llvm-project/commit/6eeb3b4ebdae20cd5f1e0fe5e74df3b418b654e2
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M cross-project-tests/riscv/lto-inline-asm-abi.c
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
Log Message:
-----------
[RISC-V][MC] Update ELF streamer ArchString in setFlagsFromFeatures() (#225140)
During LTO, the TargetMachine subtarget is initialized with the linker's
default CPU (e.g. `generic-rv64`, `rv64i2p1`), while
RISCVAsmPrinter::emitStartOfAsmFile() reconstructs the module's actual ISA from
the `riscv-isa` module flag and calls RISCVTargetStreamer::setFlagsFromFeatures()
and RISCVTargetStreamer::emitTargetAttributes(). Because
RISCVTargetELFStreamer previously only initialized InitialArchString and
ArchString in its constructor rather than in setFlagsFromFeatures(), direct
object emission bypassed the update and tagged `.text` with `$xrv64i2p1`
instead of the module's full architecture string.
Move the InitialArchString and ArchString initialization into
RISCVTargetELFStreamer::setFlagsFromFeatures() and also call setArchString()
alongside emitTextAttribute(RISCVAttrs::ARCH, ...) in
RISCVTargetStreamer::emitTargetAttributes().
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225140
Commit: 0e2ebe79f5c4ea36d7daecb76fb4867452d6973e
https://github.com/llvm/llvm-project/commit/0e2ebe79f5c4ea36d7daecb76fb4867452d6973e
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
M llvm/test/CodeGen/RISCV/module-asm-features.ll
M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
Log Message:
-----------
[RISC-V] Update streamer ArchString in emitTargetFeaturePush() (#225133)
Previously, RISCVAsmPrinter::emitTargetFeaturePush() only emitted `.option push`
and `.option arch` without updating the streamer's active ArchString. When
emitting an ELF object file directly (`-filetype=obj`),
RISCVTargetELFStreamer::emitDirectiveOptionArch() is a no-op while
emitTargetFeaturePop() resets ArchString back to the pushed ArchString, so
module-level inline assembly and functions with custom `target-features` failed
to emit updated `$x<arch>` mapping symbols.
Call RTS.setArchString() with the parsed ISA string in emitTargetFeaturePush()
so `-filetype=obj` records the active `$x<arch>` mapping symbol alongside
`.option arch`.
This commit was created with the help of AI tools
Pull-Request: https://github.com/llvm/llvm-project/pull/225133
Commit: b380036c75b82ab16aa988331b65cea6323091e7
https://github.com/llvm/llvm-project/commit/b380036c75b82ab16aa988331b65cea6323091e7
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M .github/workflows/docs.yml
Log Message:
-----------
[Github] Build BOLT docs on changes (#226747)
We were already set up to build the BOLT docs, but the workflow did not
actually trigger on changes to the BOLT docs specifically. This change
fixes that.
Commit: fb9596b7117dac3a1bc680b1041464944d0caa24
https://github.com/llvm/llvm-project/commit/fb9596b7117dac3a1bc680b1041464944d0caa24
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir.mlir
Log Message:
-----------
[MLIR][LLVM] Produce canonical const GEP in convertGEPOp (#226699)
The DataLayout overload of ConstantExpr::getGetElementPtr is the form
that replaces typed constant GEPs. Use it for inrange GEPs and fail
translation when the indices cannot be reduced to a byte offset.
This resolves
https://github.com/llvm/llvm-project/pull/220424#discussion_r4092337505
Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: e54a8d183eda0097771b422399ee929a334fb0af
https://github.com/llvm/llvm-project/commit/e54a8d183eda0097771b422399ee929a334fb0af
Author: Alan Zhao <ayzhao at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/cmake/modules/GetLibraryName.cmake
Log Message:
-----------
[cmake][Windows] Fix CMake variable (#226745)
As a follow-up fix to #226635, the variable is `WIN32` not `Win32`.
Commit: 32ee4f7ed0ba2f169d22416c73360146153c9711
https://github.com/llvm/llvm-project/commit/32ee4f7ed0ba2f169d22416c73360146153c9711
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
Log Message:
-----------
[SDPatternMatch] Simplify EffectiveOperands and drop the template specialization. NFC (#226036)
The chain and glue operands are in fixed locations, we don't need a loop
to find them.
Use the template parameter to skip the constructor body instead of using
template specialization.
Commit: 50f802581bd16b82bd68a9a4682cdbdc560368df
https://github.com/llvm/llvm-project/commit/50f802581bd16b82bd68a9a4682cdbdc560368df
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][AST] Mark APValue as LLVM_ATTRIBUTE_WARN_UNUSED (#226632)
Commit: 4c85cbebc59d62d6845ea31f649d8519813b55ff
https://github.com/llvm/llvm-project/commit/4c85cbebc59d62d6845ea31f649d8519813b55ff
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/docs/AllocToken.md
M clang/docs/ClangLinkerWrapper.md
M clang/docs/ClangOffloadBundler.md
M clang/docs/ClangTransformerTutorial.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/ControlFlowIntegrityDesign.md
M clang/docs/InternalsManual.md
M clang/docs/IntroductionToTheClangAST.md
M clang/docs/LanguageExtensions.md
M clang/docs/LibASTImporter.md
M clang/docs/LifetimeSafety.md
M clang/docs/SafeBuffers.md
M clang/docs/ScalableStaticAnalysis/user-docs/SummaryExtraction.md
M clang/docs/WarningSuppressionMappings.md
M clang/docs/analyzer/checkers.md
M clang/docs/analyzer/user-docs/Annotations.md
M clang/docs/conf.py
M clang/include/clang/Basic/AttrDocs.td
M llvm/docs/SphinxQuickstartTemplate.md
M utils/docs/llvm_sphinx/ext/absolute_links.py
M utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md
Log Message:
-----------
[docs] Replace clang.llvm.org/docs links with Sphinx links (#222507)
Use Sphinx document and option roles or project-relative links for links
within the Clang documentation. Repair stale generated-document
fragments found while validating the replacements. This ensures that
standalone documentation builds are self-contained, although
cross-project links (Clang->LLVM) typically go via absolute llvm.org
hrefs.
Part of #214861
Assisted-by: Codex
Commit: dbea9bd01b3ffec3ff35bfacb628257db8655ee5
https://github.com/llvm/llvm-project/commit/dbea9bd01b3ffec3ff35bfacb628257db8655ee5
Author: Amilendra Kodithuwakku <amilendra.kodithuwakku at arm.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M bolt/docs/conf.py
Log Message:
-----------
[docs][bolt] Remove Markdown enum (#226411)
Remove use of Markdown enum from the bolt docs. Related to #223829.
This should fix our ATfL build
[failure](https://github.com/arm/arm-toolchain/actions/runs/36103090912/job/107969633028#step:7:22533)
```
Traceback (most recent call last):
File "/workspace/python/.venv/lib/python3.12/site-packages/sphinx/config.py", line 529, in eval_config_file
exec(code, namespace) # NoQA: S102
^^^^^^^^^^^^^^^^^^^^^
File "/workspace/src/bolt/docs/conf.py", line 18, in <module>
globals().update(common_conf(tags, markdown=Markdown.NEVER))
^^^^^^^^
NameError: name 'Markdown' is not defined
```
Commit: 126dbd97fc5d33edf43a1fce12fb5d3ea46e5be7
https://github.com/llvm/llvm-project/commit/126dbd97fc5d33edf43a1fce12fb5d3ea46e5be7
Author: Alexander Richardson <alexrichardson at google.com>
Date: 2026-09-26 (Sat, 26 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/lto-module-asm-abi.c
Log Message:
-----------
[Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds (#226752)
Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.
Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
Pull-Request: https://github.com/llvm/llvm-project/pull/226752
Commit: 57721b7c631b3dacc8f59b2467992e3ff4866cc6
https://github.com/llvm/llvm-project/commit/57721b7c631b3dacc8f59b2467992e3ff4866cc6
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M orc-rt/include/CMakeLists.txt
M orc-rt/include/orc-rt-c/config.h.in
A orc-rt/include/orc-rt-c/support/LogLevel.h
M orc-rt/include/orc-rt-c/support/Logging.h
M orc-rt/include/orc-rt/bedrock/Session.h
Log Message:
-----------
[orc-rt] Move ORC_RT_LOG_ENABLED out of config.h; catch typos. (#226751)
Move ORC_RT_LOG_ENABLED to orc-rt-c/support/LogLevel.h so that config.h
is kept for build options only.
Switch to using function-like macros so that typos in level-names become
compilation errors.
Commit: 689040ca0cb30b3f93edb5e51f64333b23e4610f
https://github.com/llvm/llvm-project/commit/689040ca0cb30b3f93edb5e51f64333b23e4610f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
M llvm/lib/Target/M68k/M68kTargetObjectFile.h
Log Message:
-----------
CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs (#226769)
TargetLoweringObjectFile::Initialize already records the TargetMachine
in a base class field.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 9bf0c497dceba0c7eb882c0f2a96c8151ce74ae3
https://github.com/llvm/llvm-project/commit/9bf0c497dceba0c7eb882c0f2a96c8151ce74ae3
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
M orc-rt/lib/bedrock/ConnectorRegistry.cpp
M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
M orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
M orc-rt/tools/ogre/ogre.cpp
Log Message:
-----------
[orc-rt] Simplify ConnectorRegistry::connect and ogre setup. (#226772)
ConnectorRegistry::connect and ConnectorFn now take the Session and
BootstrapInfo directly, replacing the GetAttachInfo callback and the
AttachInfo struct. The callback let the Session be built lazily, after
the connector had validated its spec, but a connection can fail after
validation anyway, so callers already had to handle discarding a Session
built for a failed connection. Build the Session first, then connect.
ogre's setup is restructured to match: makeSession detects the process
info, builds a thread-pool dispatcher and the Session, adds the host
services, then connects; runOgre waits for the detach. Errors are
reported via Session::logErrors when logging is enabled.
SocketConnectorTest now connects a real Session. Its ownership test
adopts a non-stream socket, which the connector accepts and
createSimpleRemoteCAOverSocket then rejects, rather than relying on a
failing GetAttachInfo.
Commit: 80b46c9d74a868cd20720cc7932a2f88bda43d25
https://github.com/llvm/llvm-project/commit/80b46c9d74a868cd20720cc7932a2f88bda43d25
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGenBuiltins/builtin-nondeterministic-value.c
Log Message:
-----------
[CIR][NFC] Add vector of boolean test to __builtin_nondeterministic_value (#219550)
Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: dfde6ac69e6e0c5a717042de3fa7f118eea7d830
https://github.com/llvm/llvm-project/commit/dfde6ac69e6e0c5a717042de3fa7f118eea7d830
Author: Mamadou Wane <mamadouswane at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/bugprone/redundant-branch-condition.cpp
Log Message:
-----------
[clang-tidy] Fix redundant-branch-condition false positive in loops (#225827)
Fixes #205685.
`bugprone-redundant-branch-condition` decides whether the condition
variable changes between the outer and inner `if` by comparing source
positions. When a loop sits between the two, a mutation that comes after
the inner `if` in the source still runs before the inner condition is
evaluated again on the next iteration, so the check reports a redundant
condition that isn't, and the fix-it changes behavior.
The fix walks the parents of the inner `if` up to the outer `if` and
finds the outermost enclosing loop. If the variable is mutated anywhere
in that loop, the check does not warn. This follows NagyDonat's
suggestion in the issue: the existing check already covers mutations
between the outer condition and the loop, so only the loop itself needs
the extra query. The walk passes through declarations, so an inner `if`
inside a lambda stored in a variable is handled too, and it stops at the
enclosing function. I chose a syntactic walk instead of the CFG
(`utils::ExprSequence`), since it covers the range the issue asks for
without building a CFG on every match.
Tests cover `for`, `while`, `do`, and range-based `for`, a mutation in a
`do`/`while` condition, a lambda stored in a variable inside the loop,
and an inner loop whose enclosing loop does the mutation. Each of these
warns without the patch. Three positive cases confirm the warning is
kept when the loop never mutates the variable, when the mutation comes
after the loop, and when the loop encloses both `if` statements.
Limitations:
- Any mutation in the loop suppresses the warning, including one
followed by an exit from the loop (`break`, `return`, `throw`) or one
that cannot make the condition false. The inner condition is still
redundant in those cases; telling them apart needs the CFG. I added the
`break` case under Unhandled Cases. The change only removes warnings, so
it adds no new false positives.
- Loops built with `goto` and Objective-C `for ... in` loops are not
recognized, so the false positive remains there.
I used Claude to help write the code. I tested and reviewed all of it
myself, and worked through the approach and suggestions with Claude.
Commit: 719341a64c02261b7b43e4aa6a25f597cca8626d
https://github.com/llvm/llvm-project/commit/719341a64c02261b7b43e4aa6a25f597cca8626d
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
M llvm/test/Analysis/CostModel/X86/speculative-load.ll
Log Message:
-----------
[TTI] Provide conservative legality + costs for @llvm.speculative.load. (#180036)
Add TTI support for @llvm.speculative.load, including cost and legaltiy
checking support.
The initial implementation for AArch64 checks if the loaded type is
<= 16 bytes, and only considers such cases legal due to MTE.
PR:
https://github.com/llvm/llvm-project/pull/180036
Depends on https://github.com/llvm/llvm-project/pull/179642
Commit: 6909c17f14683203621f5a3d8fbf04dfd5d9c623
https://github.com/llvm/llvm-project/commit/6909c17f14683203621f5a3d8fbf04dfd5d9c623
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
Log Message:
-----------
[ConstraintElim] Don't request SCEV if there are no loops. (NFC) (#226736)
ConstraintElimination only uses SCEV when there are any loops. Don't
request the analysis if there are no loops.
This reduces compile-time a bit (more for workloads with large number of
functions w/o loops):
stage1-O3: -0.03%
stage1-ReleaseThinLTO: -0.04%
stage1-ReleaseLTO-g: -0.02%
stage1-aarch64-O3: -0.03%
stage2-O3: -0.04%
stage2-clang: -0.09%
https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c4453240417d8705b0752c3feda8d02365f8175c&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/226736
Commit: 57630fd809ca4964f887dd531e1a09618d962b10
https://github.com/llvm/llvm-project/commit/57630fd809ca4964f887dd531e1a09618d962b10
Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
A clang/test/CodeGen/AArch64/sve/addv.c
Log Message:
-----------
[clang][CIR] Add tests for SVE ADDV intrinsics (#225648)
This adds CIR tests for `svaddv` (plain SVE) intrinsics following the
task description in
[223963](https://github.com/llvm/llvm-project/issues/223963).
Moves and adapts `sve-intrinsics/acle_sve_addv.c` to `sve/addv.c`.
Commit: 68fddbbe019b63698e9c4a898b313b9112019cab
https://github.com/llvm/llvm-project/commit/68fddbbe019b63698e9c4a898b313b9112019cab
Author: David Green <david.green at arm.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
Log Message:
-----------
[DAG] Scalarise trivial splat operations (#226257)
This fixes an issue reported on #224255, where a single active lane
masked store is converted to a v1f16 extract_subvector, which becomes a
v1f16 splat, which fails to scalarize. Add the necessary trivial
scalarisation of the splat by using the f16 input operand.
(I was originally going to fix this by generating a scalar f16 extract
directly (which would have the benefit of treating f16 as legal), but
that seems to cause a regression in 2 x86 tests).
Commit: 6b51046ae30cd78fc4b26605e2dcf3b70c282f4c
https://github.com/llvm/llvm-project/commit/6b51046ae30cd78fc4b26605e2dcf3b70c282f4c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-gathered-leftover-leaf.ll
Log Message:
-----------
[SLP]Fix erasing gathered leftover narrowed reduction leaves
A leftover narrowed reduction leaf, only gathered in the tree, loses all
users once the tree scalars are erased and is swept as a dead operand,
though the reduction epilogue still uses it. Keep such values alive.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5855368565
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226782
Commit: a9407d59c4abfb8bf49da7dfcec6775707288b9e
https://github.com/llvm/llvm-project/commit/a9407d59c4abfb8bf49da7dfcec6775707288b9e
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/include/__ostream/print.h
Log Message:
-----------
[libc++] Port #200996 to ostream (#226372)
Reduces the time to compile a TU with just `#include <ostream>` from
254.7 ms ± 3.0 ms to 227.7 ms ± 2.1 ms on my system (-std=c++23, -O2,
arm64 macOS).
See #195466 for details. Without this, the call is evaluated when the
template is parsed, which evaluates format_string's consteval
constructor for "\n" in every translation unit that includes <ostream>,
even if nothing calls println().
No behavior change.
Commit: 14df65f5db67d0096ef2360abb1e30891dae66b5
https://github.com/llvm/llvm-project/commit/14df65f5db67d0096ef2360abb1e30891dae66b5
Author: Leonidas Spyropoulos <artafinde at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/include/__chrono/duration.h
M libcxx/test/std/time/months.pass.cpp
M libcxx/test/std/time/years.pass.cpp
Log Message:
-----------
[libc++][chrono] Fix years/months periods on GCC/i386 (#223669)
`static_cast<int>(365.2425 * 60 * 60 * 24)`, added in
f537b4e51822b19780386e0575ff95e82f8ec445, isn't exactly 31556952 on
every host: GCC targeting i386 folds it in x87 extended precision and
gets 31556951, making `years::period` and `months::period` coprime and
breaking `year_month` arithmetic.
Use the literal values instead, there's no readability to lose since
they were only there to avoid a template instantiation in the first
place.
Signed-off-by: Leonidas Spyropoulos <artafinde at archlinux.org>
Commit: 0b401e859b9fec54231b11ffb39085ea02e053c0
https://github.com/llvm/llvm-project/commit/0b401e859b9fec54231b11ffb39085ea02e053c0
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
M llvm/lib/Target/PowerPC/PPC.h
M llvm/tools/dsymutil/DwarfLinkerForBinary.h
M llvm/tools/llvm-cov/CodeCoverage.cpp
M llvm/tools/llvm-objdump/COFFDump.h
M llvm/tools/llvm-objdump/ELFDump.h
M llvm/tools/llvm-objdump/OffloadDump.cpp
M llvm/tools/llvm-objdump/WasmDump.h
M llvm/tools/llvm-profgen/PerfReader.h
Log Message:
-----------
[llvm] Remove declarations without definitions (NFC) (#226764)
HexagonConstEvaluator::evaluateHexVector2: Added on July 28, 2016 in
commit 167d918225ecd05a63f6b8d449c317feda741e18 without a definition or
any callers.
initializePPCExpandISELPass: The definition and caller were removed on
August 27, 2024 in commit 8e901c255df45e38cb1d69a576804029e20868bf.
dsymutil::DwarfLinkerForBinary::createStreamer: The definition and
caller were removed on April 1, 2023 in commit
36f351098cd50809658493d9b2e22a795874bab0 (when the non-template
declaration in DwarfLinkerForBinary.h was replaced with a template
declaration without a definition).
exportCoverageDataToJson: The definition and caller were replaced with
CoverageExporterJson on January 4, 2018 in commit
1ef3a778ac47564aa5a7f04bbf572d22d1c616fb.
objdump::printCOFFFileHeader, objdump::printELFFileHeader, and
objdump::printWasmFileHeader: The definitions and callers were replaced
with Dumper::printPrivateHeaders on July 14, 2023 in commit
0af663f80da0009f6fd879cf4d41743d4c88a2db.
disassembleObject: Added on May 23, 2025 in commit
51a03ed27282166d418399f2ade9814ea5be9944 without a definition or any
callers.
sampleprof::VirtualUnwinder::recordRangeCount: The definition and
callers were removed on January 11, 2021 in commit
3869309a0c92735228afaa5663d1c10bb372bb54.
Assisted-by: Antigravity
Commit: 1345a4fa8d60bdd33d59b7a1c0613eaef7d8e01f
https://github.com/llvm/llvm-project/commit/1345a4fa8d60bdd33d59b7a1c0613eaef7d8e01f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
Log Message:
-----------
[SLP][NFC]Add an extra test witj missing vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226802
Commit: 0f5a125bad555b6bf4bb2318b9f1ea7936adf19d
https://github.com/llvm/llvm-project/commit/0f5a125bad555b6bf4bb2318b9f1ea7936adf19d
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
A libcxx/docs/ABIGuarantees.md
R libcxx/docs/ABIGuarantees.rst
A libcxx/docs/AddingNewCIJobs.md
R libcxx/docs/AddingNewCIJobs.rst
A libcxx/docs/CodingGuidelines.md
R libcxx/docs/CodingGuidelines.rst
A libcxx/docs/Contributing.md
R libcxx/docs/Contributing.rst
A libcxx/docs/Contributing/NewStandardProcedure.md
R libcxx/docs/Contributing/NewStandardProcedure.rst
A libcxx/docs/Contributing/PostMeetingProcedure.md
R libcxx/docs/Contributing/PostMeetingProcedure.rst
A libcxx/docs/Contributing/ReleaseProcedure.md
R libcxx/docs/Contributing/ReleaseProcedure.rst
A libcxx/docs/DesignDocs/ABIVersioning.md
R libcxx/docs/DesignDocs/ABIVersioning.rst
A libcxx/docs/DesignDocs/AtomicDesign.md
R libcxx/docs/DesignDocs/AtomicDesign.rst
A libcxx/docs/DesignDocs/CapturingConfigInfo.md
R libcxx/docs/DesignDocs/CapturingConfigInfo.rst
A libcxx/docs/DesignDocs/ExperimentalFeatures.md
R libcxx/docs/DesignDocs/ExperimentalFeatures.rst
A libcxx/docs/DesignDocs/ExtendedCXX03Support.md
R libcxx/docs/DesignDocs/ExtendedCXX03Support.rst
A libcxx/docs/DesignDocs/FeatureTestMacros.md
R libcxx/docs/DesignDocs/FeatureTestMacros.rst
A libcxx/docs/DesignDocs/FileTimeType.md
R libcxx/docs/DesignDocs/FileTimeType.rst
A libcxx/docs/DesignDocs/HeaderRemovalPolicy.md
R libcxx/docs/DesignDocs/HeaderRemovalPolicy.rst
M libcxx/include/__configuration/abi.h
Log Message:
-----------
[libc++][docs] Rename documentation files to Markdown (batch 1) (#221512)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.
Commit: 61b428e0edfe674b84d77f7b55aa687fce3b501e
https://github.com/llvm/llvm-project/commit/61b428e0edfe674b84d77f7b55aa687fce3b501e
Author: Reid Kleckner <rkleckner at nvidia.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/docs/ABIGuarantees.md
M libcxx/docs/AddingNewCIJobs.md
M libcxx/docs/CodingGuidelines.md
M libcxx/docs/Contributing.md
M libcxx/docs/Contributing/NewStandardProcedure.md
M libcxx/docs/Contributing/PostMeetingProcedure.md
M libcxx/docs/Contributing/ReleaseProcedure.md
M libcxx/docs/DesignDocs/ABIVersioning.md
M libcxx/docs/DesignDocs/AtomicDesign.md
M libcxx/docs/DesignDocs/CapturingConfigInfo.md
M libcxx/docs/DesignDocs/ExperimentalFeatures.md
M libcxx/docs/DesignDocs/ExtendedCXX03Support.md
M libcxx/docs/DesignDocs/FeatureTestMacros.md
M libcxx/docs/DesignDocs/FileTimeType.md
M libcxx/docs/DesignDocs/HeaderRemovalPolicy.md
M libcxx/docs/conf.py
Log Message:
-----------
[libc++][docs] Convert documentation from reST to Markdown (batch 1) (#221513)
This is the first batch of changes to migrate libc++ documentation from
rst to markdown.
I use a local pixel diff tool to compare the rendered HTML, and all
diffs seem like fixes. They tend to fall into the following categories:
- dashed bullet lists were previously not rendered, but now they are
- extra indentation interpreted as blockquotes has been removed
- single backticks are now codefont spans, not italic spans
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #221512, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.
-----
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|
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Commit: 6cff1c56d1678e3d7eb70650d1fe138eac80c05e
https://github.com/llvm/llvm-project/commit/6cff1c56d1678e3d7eb70650d1fe138eac80c05e
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
Log Message:
-----------
[SLP]Look through truncation of shifted extracted sub-fields
The masked sub-field of the shifted truncation of a wider scalar was
matched with the truncation as its source, while the other fields
matched the scalar itself, so the gather of the fields was rejected.
The field is within the truncated bits, look through the truncation.
Fixes #74380
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226803
Commit: 20bbd88cf9e7be286b25c29c877c2d0564da9ecf
https://github.com/llvm/llvm-project/commit/20bbd88cf9e7be286b25c29c877c2d0564da9ecf
Author: Guy David <guyda96 at gmail.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
A llvm/test/Transforms/SimplifyCFG/AArch64/speculate-vector-phi-select-cost.ll
A llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-phi-select-cost.ll
A llvm/test/Transforms/SimplifyCFG/RISCV/speculate-mask-phi-select-cost.ll
A llvm/test/Transforms/SimplifyCFG/X86/speculate-mask-phi-select-cost.ll
Log Message:
-----------
[SimplifyCFG] Cost speculated selects with their real scalar condition (#217664)
`validateAndCostRequiredSelects()` priced the selects that
`speculativelyExecuteBB()` would create using
`CmpInst::makeCmpResultType(PN->getType())` as the condition type. For a
vector phi, that asks the target for the cost of a per-lane vector
select, but the select actually created uses the branch condition, which
is always a scalar `i1`.
This only changes behaviour where a target's cost model distinguishes
the two condition types. Of the targets checked, only AArch64 does.
This may worsen the compiler's output in RISC-V, X86, ARM, so no
intention to merge soon before collecting more feedback on how the
different targets should communicate this property.
Commit: f8cfaa7dc0caf6bd51b82798718c51ac3fd68c12
https://github.com/llvm/llvm-project/commit/f8cfaa7dc0caf6bd51b82798718c51ac3fd68c12
Author: Jake Egan <Jake.egan at ibm.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/test/configs/ibm-libc++-shared.cfg.in
Log Message:
-----------
[libc++][AIX] Add system library path via blibpath for lldb (#223837)
On AIX some tools we use for testing libc++, like lldb, are linked
against the system libc++, which has additional members (e.g
`shr2_64.o`) that the newly built libc++.a doesn't have. But the current
test harness set the `LIBPATH` to point at the newly built libc++, which
can load break these tools.
This change removes the `LIBPATH` and instead sets the `blibpath`
(equivalent to rpath on other systems), which helps lldb find the system
libc++.a, while still running the tests against the libc++ build under
test.
Commit: db9f06ce021c54523afc8bf9d0cfe45aba2eba09
https://github.com/llvm/llvm-project/commit/db9f06ce021c54523afc8bf9d0cfe45aba2eba09
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Log Message:
-----------
Remove cl::callback from AArch64CodeLayoutOpt and AddressSanitizer (#226757)
cl::callback will be removed to enable migration to TableGen based
representation
LLM-aided
Commit: 8e6f2603dc5d4a93400aa8ba28ea624644be0c9a
https://github.com/llvm/llvm-project/commit/8e6f2603dc5d4a93400aa8ba28ea624644be0c9a
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/lib/Support/CMakeLists.txt
A llvm/lib/Support/DenseMap.cpp
M llvm/unittests/ADT/DenseMapTest.cpp
M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Log Message:
-----------
[DenseMap] Share rehash and grow for relocatable bucket types. NFC (#225018)
DenseMap is heavily instantiated and moveFrom and grow are among the
largest code families. For trivially copy constructible and destructible
bucket types (also satisfied by std::pair), call an out-of-line
`growRelocatable` with size/align/hasher (dictionary passing style).
A pointer key hashed by its value hashes inline, which a null
BucketHasher asks for, sparing a call per entry.
DenseMapInfo<T *>::PointerValueHash names the class declaring it, so an
info that specializes or inherits it to hash the pointee -- Attributor's
InstExclusionSet, VPCSEDenseMapInfo, MachineInstrExpressionTrait --
keeps its own hash. Any other key hashes through a thunk, one per
(KeyT, KeyInfoT) whatever the map's value type.
SmallDenseMap's in-place rehash for remove_if shares the loop through
`rehashRelocatable`. It rehashes once rather than into a temporary map
and back, which can reorder a probe chain that wraps around the table.
Building clang takes 0.86% fewer instructions and the binary is 0.64%
smaller.
Aided by Opus 5
Commit: 9e44a6664500bcc01fb9ddc35710b4d0fd748b06
https://github.com/llvm/llvm-project/commit/9e44a6664500bcc01fb9ddc35710b4d0fd748b06
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP][NFC]Add extra tests with incorrect vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226827
Commit: eea552937b1e30c8b74bf3748cccab1357dd0d57
https://github.com/llvm/llvm-project/commit/eea552937b1e30c8b74bf3748cccab1357dd0d57
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
Log Message:
-----------
[SLP]Fix reused scales for sub-fields gathered in natural order
The reduction root sub-fields were emitted in the natural order, but the
reused values were scaled by the original lane order. Reorder the root
scalars instead.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5858504241
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226828
Commit: d0ea8a8e46091f71684091f48412ce500165d76f
https://github.com/llvm/llvm-project/commit/d0ea8a8e46091f71684091f48412ce500165d76f
Author: Martin Storsjö <martin at martin.st>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/unittests/Support/LLVMToolSession/LLVMToolSessionTest.cpp
Log Message:
-----------
[unittests] Fix a recent test on Windows with LLVM_WINDOWS_PREFER_FORWARD_SLASH (#224963)
This fixes errors like these:
```
Expected equality of these values:
Context.Path
Which is: "D:/a/llvm-mingw/llvm-mingw/llvm-project/build/unittests/Support/LLVMToolSession/./LLVMToolSessionTests.exe"
ExecutablePath.c_str()
Which is: "D:\\a\\llvm-mingw\\llvm-mingw\\llvm-project\\build\\unittests\\Support\\LLVMToolSession\\.\\LLVMToolSessionTests.exe"
```
Commit: df7a21f8210426653d12c50475651c4d7518b804
https://github.com/llvm/llvm-project/commit/df7a21f8210426653d12c50475651c4d7518b804
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
Log Message:
-----------
[LV] Remove EpilogueLoopVectorizationInfo::EpilogueUF (NFC). (#226792)
The epilogue vector loop is always unrolled by 1: the only construction
site passes 1 and the constructor asserted it. Drop the field and use 1
directly at its users, and drop the now always 1 EpilogueUF parameter of
addMinimumVectorEpilogueIterationCheck.
Clean-up in preparation for removing/simplifying
EpilogueLoopVectorizationInfo.
Commit: d8b43a8db3cd5314e5c9cc51af04fca342715187
https://github.com/llvm/llvm-project/commit/d8b43a8db3cd5314e5c9cc51af04fca342715187
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
M llvm/lib/Target/Mips/MipsSubtarget.cpp
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/Mips/MipsTargetMachine.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
A llvm/test/CodeGen/Mips/target-abi-module-flag.ll
Log Message:
-----------
Mips: Properly account for target-abi in subtarget construction (#226721)
Commit: 5ad4959a040a6e31eba7ab46f3bf4fd41cd224dc
https://github.com/llvm/llvm-project/commit/5ad4959a040a6e31eba7ab46f3bf4fd41cd224dc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/NestedNameSpecifierBase.h
M clang/lib/AST/NestedNameSpecifier.cpp
Log Message:
-----------
[clang] Unique NamespaceAndPrefixStorages with a UniquingSet (NFC) (#224221)
This patch migrates NamespaceAndPrefixStorages in ASTContext from
llvm::FoldingSet to llvm::UniquingSet.
NamespaceAndPrefixStorage keys on a pair of const NamespaceBaseDecl *
and NestedNameSpecifier. Switching to UniquingSet allows us to look
up storages with a typed key, eliminating FoldingSetNodeID
serialization at lookup sites and removing
NamespaceAndPrefixStorage::Profile.
Assisted-by: Antigravity
Commit: 15eef1398e36befcaaf6cc19872805f6eb3ae5a4
https://github.com/llvm/llvm-project/commit/15eef1398e36befcaaf6cc19872805f6eb3ae5a4
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
Log Message:
-----------
[ORC] Call Perf/VTune support wrappers through Proxies (#226677)
Hold PerfSupportPlugin's start/end registration wrappers and
VTuneSupportPlugin's unregister wrapper as Proxy members, replacing
their callSPSWrapper calls. Each proxy is built in the constructor from
the address it already takes, so the constructor signatures are
unchanged. The Perf impl and VTune register wrappers are only used as
alloc-action tags and stay ExecutorAddrs.
Commit: dbde1428562362792d85cb9bbb58415f1b21cb48
https://github.com/llvm/llvm-project/commit/dbde1428562362792d85cb9bbb58415f1b21cb48
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Fixing linux tests to enable CI (#226766)
Commit: a432c764f54c72f60bb1c2df0c050e5cc29db2dd
https://github.com/llvm/llvm-project/commit/a432c764f54c72f60bb1c2df0c050e5cc29db2dd
Author: Ben Shi <2283975856 at qq.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86RegisterInfo.td
Log Message:
-----------
[X86][NFC] Simplify definition of TMM registers (#226779)
Commit: 6c75b015778cdb22d688d6c6f6e40ccb6d9eb352
https://github.com/llvm/llvm-project/commit/6c75b015778cdb22d688d6c6f6e40ccb6d9eb352
Author: Letu Ren <fantasquex at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][LLVM] Add smulh and umulh intrinsics. (#226776)
Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>
Commit: cef4b65cbd0d960b7ab8aa19654be28f5a5f830e
https://github.com/llvm/llvm-project/commit/cef4b65cbd0d960b7ab8aa19654be28f5a5f830e
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Fold zero dot operands to accumulator (#225003)
Fold AMDGPU dot intrinsics when either operand is zero.
`dot(a, 0) = 0` and `dot(0, b) = 0`, so replace the intrinsic with its
accumulator.
This avoids unrelated clamp and add/sub reassociation cases.
Commit: 373c54d763c98487df27599247412f80d933e177
https://github.com/llvm/llvm-project/commit/373c54d763c98487df27599247412f80d933e177
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
M orc-rt/test/tools/orc-rt-process-info-check.cpp
Log Message:
-----------
[orc-rt] Prefix test tool output, update test. (#226862)
Prefix the triple, page-size, and cpu-features lines of the
orc-rt-process-info-check. The prefixes can be used to ensure that the
test doesn't try to match patterns against the wrong lines.
Also relaxes the feature string check to allow an empty feature string.
Commit: 795457f653fb5e9f769678ed025ecb63d7bfbf53
https://github.com/llvm/llvm-project/commit/795457f653fb5e9f769678ed025ecb63d7bfbf53
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/lib/MC/ELFObjectWriter.cpp
Log Message:
-----------
[MC] Add ELF::getSymbolInfo and fix bitwise OR between enumeration types. NFC (#226860)
`ELF::STT_FILE | ELF::STB_LOCAL` puts the binding in the type bits,
which only works because STB_LOCAL is 0.
It combines enumerators from two distinct unnamed enums, which is
deprecated in C++20 and ill-formed in C++26 (P2864R2).
Commit: d34c0c8bdcd3c718eb1f4b125a44bd3863dd3ef6
https://github.com/llvm/llvm-project/commit/d34c0c8bdcd3c718eb1f4b125a44bd3863dd3ef6
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Rename os-version substitution. (#226863)
This substitution is available and being tested on all platforms. It's
currently only populated on Darwin, but may be useful on other
platforms, so rename it to reflect its role.
Commit: 372dc97670f7b3ce422dc26e5f626b2711426e8d
https://github.com/llvm/llvm-project/commit/372dc97670f7b3ce422dc26e5f626b2711426e8d
Author: ykiko <ykiko at clice.io>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxx/include/__format/buffer.h
A libcxx/test/std/utilities/format/format.functions/bug_154670.pass.cpp
Log Message:
-----------
[libc++][format] Don't leave the output buffer full after a bulk write (#226791)
__output_buffer::push_back writes a code unit before it makes room, so
the buffer must always have a free one. __copy, __transform and __fill
write in chunks of the available space and could end with the buffer
full. Formatting into a back_insert_iterator of a string, vector or
deque goes through a 256 code unit buffer, so an argument or fill whose
length is a multiple of 256, followed by a literal, wrote that literal
past the end of the buffer.
Make room in a full buffer at the end of these functions, as push_back
does.
Fixes #154670
Commit: 6bc9070d58e6b1396f380fcc48234e49ede900f8
https://github.com/llvm/llvm-project/commit/6bc9070d58e6b1396f380fcc48234e49ede900f8
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang] clang-format two constructors (#226737)
I'd like to change these two in a patch, and the diff looks a bit
confusing since they aren't formatted yet. So format them in a prep
commit to make the diff clearer.
No behavior change.
Commit: af39a0147d97320ccf9de1ca4a58f92a519ecbff
https://github.com/llvm/llvm-project/commit/af39a0147d97320ccf9de1ca4a58f92a519ecbff
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
Log Message:
-----------
[gn build] Port ea0493b90c03 (#226870)
Commit: 3e36b024db71848df98de3124953316c49dd9131
https://github.com/llvm/llvm-project/commit/3e36b024db71848df98de3124953316c49dd9131
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
Log Message:
-----------
[gn build] Port 7e91ef5d6aea (#226869)
Commit: fb720063a6a01d1d31c8ac1b9318e5259110be58
https://github.com/llvm/llvm-project/commit/fb720063a6a01d1d31c8ac1b9318e5259110be58
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/test/regression/README.md
M orc-rt/test/regression/jit-free-foundations/lit.local.cfg
M orc-rt/test/regression/languages/c/lit.local.cfg
M orc-rt/test/regression/languages/c/return-zero.c
M orc-rt/test/regression/lit.cfg.py
M orc-rt/test/regression/object-formats/lit.local.cfg
M orc-rt/test/regression/object-formats/mach-o/arm64/return-zero.s
Log Message:
-----------
[orc-rt] Rename lit %{jit} substitution to %{obj-jit}. (#226867)
This substitution jit-loads object files via llvm-jitlink. Future tests,
e.g. for lazy compilation, may want to JIT from other representations
and will need different substitutions. Rename now to make the intent
clear and save us renaming later.
Commit: c52392a6f464e5aa6bff198e4056ca58e43e0656
https://github.com/llvm/llvm-project/commit/c52392a6f464e5aa6bff198e4056ca58e43e0656
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ExprConstant.cpp
A clang/test/SemaCXX/new-nothrow-by-value.cpp
Log Message:
-----------
[Clang][ExprConst] Drop PRValue for nothrow new (#226753)
A user defined operator new can accept prvalue for nothrow. However, it
should not be a ConstExpr. Early returns by
isUsableAsGlobalAllocationFunctionInConstantEvaluation instead of doing
LValue evaluation.
Also, move CheckPlacement new logic into new OpCode. This decouples
checking from Interp.cpp to Compiler.cpp.
Commit: b1f5907d79d1d52ca5e938875ca4018ed6fb8bd7
https://github.com/llvm/llvm-project/commit/b1f5907d79d1d52ca5e938875ca4018ed6fb8bd7
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
Log Message:
-----------
[llvm-jitlink] Call __orc_rt_run_program_wrapper through a Proxy (#226859)
Replace runWithRuntime's callSPSWrapper call with a Proxy.
Commit: bebb7fe62f8883d822f084687cfb84c5cfe12bbb
https://github.com/llvm/llvm-project/commit/bebb7fe62f8883d822f084687cfb84c5cfe12bbb
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/CharUnits.h
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][NFC] Pass/Return `CharUnits` by value (#226115)
`CharUnits` is just an `int64_t`, but passed around by const reference
for some reason.
Also update the `CharUnits` documentation since we touch most of the
lines anyway (due to clang-format).
Commit: b1f66905515904d048c9c53e92b1c0d2423aca19
https://github.com/llvm/llvm-project/commit/b1f66905515904d048c9c53e92b1c0d2423aca19
Author: Sairudra More <sairudra60 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/docs/OpenMPSupport.md
M flang/lib/Lower/OpenMP/OpenMP.cpp
A flang/test/Integration/OpenMP/allocate-clause-equivalence.f90
A flang/test/Integration/OpenMP/scope-allocate-clause.f90
M flang/test/Lower/OpenMP/Todo/allocate-clause-unsupported.f90
A flang/test/Lower/OpenMP/Todo/scope-allocate-clause-unsupported.f90
M flang/test/Lower/OpenMP/scope.f90
M flang/test/Lower/OpenMP/target-scope.f90
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Dialect/OpenMP/invalid.mlir
M mlir/test/Dialect/OpenMP/ops.mlir
M mlir/test/Target/LLVMIR/openmp-allocate-clause.mlir
A mlir/test/Target/LLVMIR/openmp-scope-allocate-clause.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[flang][OpenMP] Support allocate clauses on scope constructs (#221229)
Flang already lowers OpenMP 5.2 `allocate` clauses on `scope` constructs
to `omp.scope`, but LLVM IR translation previously rejected them.
This change maps allocation operands to their corresponding private or
firstprivate slots and reuses the existing allocator-backed
private-storage and OpenMPIRBuilder allocation/free paths.
Support is currently limited to host-side fixed-size intrinsic scalar
private and firstprivate variables, including SAVE variables and
individually listed COMMON-block members. Arrays, descriptors, pointers,
allocatables, derived types, named COMMON-block list items, and
target/device allocation remain unsupported.
Commit: a98dcad4fed01b7d1d2f3a5306a30d658059c431
https://github.com/llvm/llvm-project/commit/a98dcad4fed01b7d1d2f3a5306a30d658059c431
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
M llvm/utils/LLVMVisualizers/llvm.natvis
M llvm/utils/gdb-scripts/prettyprinters.py
M llvm/utils/lldbDataFormatters.py
Log Message:
-----------
[ADT] Extract DenseMapStorage from DenseMap (NFC) (#226664)
This patch extracts the bucket and occupancy storage management from
DenseMap into a new helper class, densemap::detail::DenseMapStorage,
and updates DenseMap to use it via composition.
DenseMapBase::Rep is also moved to densemap::detail::StorageRep so
that DenseMapStorage::getRep() can return it directly.
This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255). I'm planning to post a similar patch for
SmallDenseMap before actually removing CRTP.
Commit: 4564e3842abad0130a6dba143e91307e1336224e
https://github.com/llvm/llvm-project/commit/4564e3842abad0130a6dba143e91307e1336224e
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
M orc-rt/tools/ogre/CMakeLists.txt
Log Message:
-----------
[orc-rt] add stub for windows socket support. (#226855)
Commit: e50507339d91208da79b28f70d4f927828bb7d29
https://github.com/llvm/llvm-project/commit/e50507339d91208da79b28f70d4f927828bb7d29
Author: Mend Renovate <bot at renovateapp.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/get-llvm-version/action.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
M .github/workflows/libc-shared-tests.yml
M .github/workflows/libclang-abi-tests.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-benchmark-cron.yml
M .github/workflows/libcxx-build-containers.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-check-generated-files.yml
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
M .github/workflows/lldb-pylint-action.yml
M .github/workflows/llvm-abi-tests.yml
M .github/workflows/llvm-bugs.yml
M .github/workflows/mlir-spirv-tests.yml
M .github/workflows/new-prs.yml
M .github/workflows/pr-code-format.yml
M .github/workflows/pr-code-lint.yml
M .github/workflows/premerge.yaml
M .github/workflows/prune-branches.yml
M .github/workflows/release-asset-audit.yml
M .github/workflows/release-binaries.yml
M .github/workflows/release-documentation.yml
M .github/workflows/release-llvm-testing-tools.yml
M .github/workflows/release-sources.yml
M .github/workflows/release-tasks.yml
M .github/workflows/scorecard.yml
M .github/workflows/spirv-tests.yml
M .github/workflows/sycl-tests.yml
M .github/workflows/test-suite.yml
M .github/workflows/test-unprivileged-download-artifact.yml
M .github/workflows/upload-release-artifact/action.yml
M .github/workflows/version-check.yml
M .github/workflows/zizmor.yml
Log Message:
-----------
Update [Github] Update GHA Dependencies to v7 (#226858)
This PR contains the following updates:
| Package | Type | Update | Change |
|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v6.0.3` → `v7.0.1` |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v6.0.2` → `v7.0.1` |
| [actions/labeler](https://redirect.github.com/actions/labeler) |
action | major | `v6.2.0` → `v7.0.0` |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | major | `v6.5.0` → `v7.0.0` |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | major | f |
Commit: e7dc4d6436526c4c7b31afec47a47530d98a6801
https://github.com/llvm/llvm-project/commit/e7dc4d6436526c4c7b31afec47a47530d98a6801
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libc/src/__support/OSUtil/linux/syscall_wrappers/close.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup3.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fsync.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/ftruncate.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/lseek.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/memfd_create.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/read.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/write.h
Log Message:
-----------
[libc] Migrate file I/O syscall wrappers to syscall_checked (#226477)
Migrate a batch of related file descriptor and core I/O syscall wrappers
to use syscall_checked instead of manual syscall_impl error checking.
While in there:
- update file headers to the new style
- reformat includes into a single block so clang-format can sort them
Assisted-by: Gemini
Commit: be628f333947bf070839e6706f6701099e0c83eb
https://github.com/llvm/llvm-project/commit/be628f333947bf070839e6706f6701099e0c83eb
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-27 (Sun, 27 Sep 2026)
Changed paths:
M libcxx/utils/ci/docker/linux-builder.dockerfile
Log Message:
-----------
[libcxx] Still use CMake 3.31 in the CI image (#226749)
This ensures support with the minimum supported version rather than what
26.04 ships with by default (4.2.3).
Commit: 70f22b8e024924ff69674da78a61da4c200b0e3c
https://github.com/llvm/llvm-project/commit/70f22b8e024924ff69674da78a61da4c200b0e3c
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/MachineBasicBlock.cpp
A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir
Log Message:
-----------
CodeGen: Fix SplitCriticalEdge using wrong VNInfo for subranges (#226214)
This fixes verifier errors when LiveIntervals is run before phi
elimination.
When extending a live interval across a newly split critical edge for a
PHI source operand, the subrange segments were added using the VNInfo of
the main range instead of the subrange's own value. Look up the
subrange's value at the predecessor's last index, as the other subrange
loop in the same function already does, and skip subranges with no value
there.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 7cb518a5a1acf0c2c1df7b5ed207518c45046916
https://github.com/llvm/llvm-project/commit/7cb518a5a1acf0c2c1df7b5ed207518c45046916
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
M llvm/lib/Target/Mips/MipsTargetMachine.h
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/PowerPC/PPCTargetMachine.h
M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
M llvm/lib/Target/RISCV/RISCVTargetMachine.h
M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
M llvm/lib/Target/Sparc/SparcISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/lib/Target/VE/VEISelLowering.cpp
M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86TargetMachine.cpp
M llvm/lib/Target/X86/X86TargetMachine.h
Log Message:
-----------
TargetMachine: Remove pointer-size query methods (#226404)
Remove the shim methods from the TargetMachine's copy of the DataLayout,
which will soon be eliminated. The Module owns the authoritative DataLayout,
so callers should read the value from the contextual Module.
Completely unreasonably, Mips's ABI name can change the pointer size which
we probably should just not support. Many other triple checks will never be
correct. This avoids potential mismatches in these contexts, but I still expect
this to be widely broken.
Some of the TargetLowering constructor changes and AMDGPULegalizerInfo
changes are kind of annoying. We could pass in the DataLayout through the
subtarget constructors but it didn't seem worth the effort and the information
should be derivable from the triple anyway.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: ee28ae7685e567d56e9ebb15ac4daf451d43f998
https://github.com/llvm/llvm-project/commit/ee28ae7685e567d56e9ebb15ac4daf451d43f998
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/tools/ogre/ogre.cpp
Log Message:
-----------
[orc-rt] Add comments to the ogre utility. NFC. (#226900)
Commit: 55f6f9304fff9a69373d6703d782b8e401d0af86
https://github.com/llvm/llvm-project/commit/55f6f9304fff9a69373d6703d782b8e401d0af86
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M orc-rt/cmake/OrcRTTesting.cmake
M orc-rt/test/regression/README.md
A orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
A orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
A orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
A orc-rt/test/regression/languages/c/addressing/same-object/global-data-pointer-in-data.c
A orc-rt/test/regression/languages/c/addressing/same-object/global-data-store.c
A orc-rt/test/regression/languages/c/addressing/same-object/static-array-element-load.c
A orc-rt/test/regression/languages/c/addressing/same-object/static-data-load.c
M orc-rt/test/regression/languages/c/lit.local.cfg
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Add initial C addressing regression tests. (#226901)
Add tests that check that JIT'd C code can address data, both in the
same object and in other objects. Each test covers a single construct
(e.g. a load of static data, or a pointer to an array element in another
object stored in initialized data), since linker/loader bugs usually
crash the JIT'd program, and a crash identifies only the failing test.
Each test runs at -O0 and -O2.
To support multi-object tests, add a split-file substitution and lit
feature, and accept .test files in languages/c.
Update the README's test conventions to match: one construct per test,
"Check that" and "Stresses:" header comments, -O0 and -O2 RUN lines, and
guidance on keeping constructs alive under optimization without hiding
the optimized lowering.
Assisted-by: Claude
Commit: bbbfd872877d184d6a5bd0d2a5322c9fe8387648
https://github.com/llvm/llvm-project/commit/bbbfd872877d184d6a5bd0d2a5322c9fe8387648
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/docs/ORCv2.md
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
Log Message:
-----------
[ORC] Remove callSPSWrapper, callSPSWrapperAsync, and callWrapper (#226893)
All in-tree callers now use Proxy. Remove the SPS convenience call
methods from ExecutionSession and ExecutorProcessControl, along with the
unit tests that exercised them (Proxy dispatch is covered by
SPSProxySpecTest). Also remove the blocking callWrapper convenience
methods, which have no remaining users.
Add a "How to call functions in the executor" section to
llvm/docs/ORCv2.md describing Proxy, controller-interface descriptors
and sps::ProxySpec, how lookupAndApply and recordProxy resolve proxies,
and how to migrate from callSPSWrapper.
Clients calling these methods directly should migrate to Proxy; see "How
to call functions in the executor" in llvm/docs/ORCv2.md.
Commit: 10cd57a6f616dc4836ef572399410d62b16f701d
https://github.com/llvm/llvm-project/commit/10cd57a6f616dc4836ef572399410d62b16f701d
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/CodeGenDataReader.h
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
Log Message:
-----------
[CGData] Stop exporting cl::opts. NFC (#226861)
LTO reads `-codegen-data-thinlto-two-rounds` through
`extern cl::opt<bool> CodeGenDataThinLTOTwoRounds`, and llvm-cgdata
assigns
`IndexedCodeGenDataLazyLoading`, exported from CodeGenDataReader.h. Add
`cgdata::thinLTOTwoRounds()` for LTO, and pass lazy loading to
`CodeGenDataReader::create` as a parameter, so that the options can be
file-local.
Aided by Opus 5.5
Commit: 4362da25049882128f50a0f6b4fb69c1a0f8fd57
https://github.com/llvm/llvm-project/commit/4362da25049882128f50a0f6b4fb69c1a0f8fd57
Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
Log Message:
-----------
[AMDGPU] Add wait states between different MFMAs sharing an accumulator (#218363)
A full-register src2/C read after an MFMA write emits no wait states,
relying on accumulator forwarding that only works while the chain stays
on one MFMA. Two different MFMAs sharing an accumulator instead need the
wait states of a partial overlap: on gfx950, v_mfma_f32_16x16x32_f16
then
v_mfma_f32_16x16x16_f16 on the same tuple needs 5 and got none. Compare
canonicalized opcodes so mac and register-bank forms still match.
Assisted-by: Claude Opus 5
Commit: 7a931b5ec3f305a51f702cb0702d2a07f7e74c0b
https://github.com/llvm/llvm-project/commit/7a931b5ec3f305a51f702cb0702d2a07f7e74c0b
Author: Kiroo (Chanung) <ung at zlfn.space>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Log Message:
-----------
[GlobalISel] Use getCmpLibcallReturnType() for FCMP libcalls (NFC) (#226813)
The GCC soft-float comparison routines return `CMPtype`, not always
`i32`.
https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html#Comparison-functions-1
> 3.2.3 Comparison functions
> There are two sets of basic comparison functions.
> ...
> Runtime Function: CMPtype __unordsf2 (float a, float b)
> Runtime Function: CMPtype __unorddf2 (double a, double b)
> Runtime Function: CMPtype __unordtf2 (long double a, long double b)
> ...
The FCMP libcall result was hardcoded to i32. Use
`getCmpLibcallReturnType()`, as SelectionDAG does.
NFC for in-tree targets.
Co-authored-by: Thorbjørn Ravn Andersen <tra at ravnand.dk>
Commit: 8fe3fdd6630e04b48dd8253894a8d4ba429e4663
https://github.com/llvm/llvm-project/commit/8fe3fdd6630e04b48dd8253894a8d4ba429e4663
Author: Oliver Hunt <oliver at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/IR/Verifier.cpp
M llvm/lib/Transforms/Utils/CodeExtractor.cpp
A llvm/test/Assembler/invalid-diexpression-arg-negative.ll
A llvm/test/DebugInfo/AArch64/dbg-value-arg-index-out-of-range.ll
A llvm/test/Transforms/HotColdSplit/split-out-dbg-val-arglist.ll
A llvm/test/Verifier/dbg-record-expression-arg-out-of-range.ll
Log Message:
-----------
[CodeExtractor][Verifier] Fix OoB read when a DIExpression is used multiple times (#226857)
#224360 made fixupDebugInfoPostExtraction reuse the existing
DIExpression, but this is not sound if the expression is referenced
multiple times, as occurs with cold/hot code splitting.
This PR is the trivial fix of restricting this change to only apply if
there is a single user of the expression.
I've also added an additional verifier guard to capture these failures.
Fixes #226848
AI usage: Claude used to find a way to construct
dbg-value-arg-index-out-of-range.ll so that I could add a verifier guard
that bypassed the other existing verifier guards.
Commit: cb9ee31ad93d35af0ee9172cd368dd537546a8d6
https://github.com/llvm/llvm-project/commit/cb9ee31ad93d35af0ee9172cd368dd537546a8d6
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/CMakeLists.txt
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/test/Transforms/licm-acc-captured-ref.fir
A flang/test/Transforms/licm-acc-compute-only.fir
A flang/test/Transforms/licm-scope.fir
Log Message:
-----------
Reland [flang] Support scoped LICM and OpenACC capture provenance (#225401) (#226909)
Follow compute-region capture operands when checking whether scalar and
scalar-descriptor loads are safe to speculate. Preserve the existing
optional, array-element, and loop-modification safety checks.
Add an optional only-inside operation-name selector while retaining
function-scoped alias analysis. Resolve the name once per function and
compare interned operation names during ancestor traversal. The default
continues to select all loops. An explicit name selects loops with a
matching ancestor within the function, including the function itself.
Cover capture safety, host exclusion, non-OpenACC and nested scopes,
loop boundaries, unmatched names, and the function boundary.
The motivation for this is to allow running LICM only on device relevant
loop at O0.
Reland #225401 with CMakeFiles.txt change to fix shared library builds.
Commit: 084a4e6002a9b718adb31dd906b233cafd3a9814
https://github.com/llvm/llvm-project/commit/084a4e6002a9b718adb31dd906b233cafd3a9814
Author: Steffen Larsen <sholstla at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip
Log Message:
-----------
[CIR][AMDGPU] Implement __builtin_amdgcn_*_dpp* builtins (#226469)
This commit implements the `__builtin_amdgcn_update_dpp`,
`__builtin_amdgcn_mov_dpp`, and `__builtin_amdgcn_mov_dpp8` builtins in
CIR, closely matching the implementation in
CodeGenFunction::EmitAMDGPUBuiltinExpr from OGCG.
Assisted-by: Claude Sonnet 5
Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>
Commit: 44d86afe24ce107f76141ae45f6fe44c44675bbe
https://github.com/llvm/llvm-project/commit/44d86afe24ce107f76141ae45f6fe44c44675bbe
Author: Kane Wang <wangqiang1 at kylinos.cn>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Log Message:
-----------
[GlobalISel][NFC] Restore the extended LLT flag to its saved value in tests (#224897)
AArch64GISelMITest's setUp() constructs an AArch64TargetMachine, which
unconditionally enables the process-global extended LLT flag. Ending the
ExtLLT tests with setUseExtended(false) therefore disables the flag for
every test that runs afterwards in the same process.
Save the flag's value on entry and restore it on exit instead.
Commit: 310cf744bd0c1af7b07377a8fa5a6c2fd72ef4a3
https://github.com/llvm/llvm-project/commit/310cf744bd0c1af7b07377a8fa5a6c2fd72ef4a3
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Log Message:
-----------
[VPlan] Remove (X && Y) | (X && !Y) -> X combine. NFC (#219368)
We have smaller combines that can take care of this now that we process
recipes in a worklist after #213900
Commit: 6ee306ddac89f9cbfc8815e8956240f0bf832dcb
https://github.com/llvm/llvm-project/commit/6ee306ddac89f9cbfc8815e8956240f0bf832dcb
Author: Chris Kennelly <ckennelly at ckennelly.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
A llvm/test/CodeGen/X86/bzhi-standalone-mask.ll
Log Message:
-----------
[X86] Select standalone ~(-1 << n) masks as BZHI (#226158)
InstCombine canonicalizes (1 << n) - 1 to xor (shl -1, n), -1. When that
mask feeds an AND, X86DAGToDAGISel::matchBitExtract folds the whole
expression into BZHI, and the add form is selected as BZHI even on its
own because Select enters matchBitExtract from ISD::ADD. The xor form on
its own is not: a mask that is returned, stored, or consumed by anything
but AND is selected as mov -1; shlx; not.
Enter matchBitExtract from ISD::XOR too under BMI2, so the standalone
mask becomes mov -1; bzhi. That is one instruction shorter and avoids
the shlx+not dependency chain. BMI1-only targets keep the shift form,
since BEXTR would need the count moved into bits 15:8 first.
Assisted-by: Claude Code
Commit: 3804292c4c3adcd4b8505dc78aed73e211b44752
https://github.com/llvm/llvm-project/commit/3804292c4c3adcd4b8505dc78aed73e211b44752
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/unittests/ObjectContainer/ObjectContainerClangOffloadBundleTest.cpp
Log Message:
-----------
[lldb] Fix offload bundle unit tests on 32-bit systems (#226922)
DataExtractor::GetByteSize returns uint64_t for reasons I don't yet
understand. I might change it to size_t but let's unblock the build for
now.
Fixes #222362 / 08ee0ef5da10d27d5776df1e1ff81c46a38d9b5c.
Commit: 2a96d5737524012839e786699a0b327f22d1cfee
https://github.com/llvm/llvm-project/commit/2a96d5737524012839e786699a0b327f22d1cfee
Author: ioana ghiban <ioana.ghiban at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
M mlir/lib/Dialect/GPU/CMakeLists.txt
M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
M mlir/lib/IR/BuiltinTypes.cpp
M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
M mlir/test/Dialect/GPU/decompose-memrefs.mlir
M mlir/test/Dialect/MemRef/canonicalize.mlir
M mlir/test/Dialect/MemRef/elide-reinterpret-cast-load.mlir
M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
M mlir/test/Dialect/MemRef/ops.mlir
Log Message:
-----------
[mlir][memref] Enforce consistent reinterpret_cast metadata (#217338)
This PR implements [[RFC] Clarify `memref.reinterpret_cast` Verification
of Dynamic
Metadata](https://discourse.llvm.org/t/rfc-clarify-memref-reinterpret-cast-verification-of-dynamic-metadata).
## Context
`memref.reinterpret_cast` describes its result through both its mixed
offset/size/stride metadata and its result `MemRefType`. Currently,
verification allowed a dynamic result-type correspond to static
operation metadata, introducing inconsistent descriptors.
For example, the verifier permits:
```mlir
%r = memref.reinterpret_cast %base
to offset: [0], sizes: [%n, 2], strides: [%s, 1] : memref<f32>
to memref<?x?xf32, strided<[?, ?], offset: ?>>
```
where the operation constructs a descriptor with a statically known
second size and stride, but the result type does not expose those facts.
## Changes
This PR consolidates the verifier to require `reinterpret_cast` result
type’s sizes, offset, and strides to exactly match the static/dynamic
representation and values of the operation metadata.
Transforms that create `memref.reinterpret_cast`, including GPU memref
decomposition and strided-metadata expansion for `subview` and
`collapse_shape`, now derive the result type from the final, potentially
folded descriptor instead of inheriting the original operation’s result
type.
When this descriptor-derived type differs from the original result type,
the rewrite inserts a `memref.cast` back to the original type. These
rewrites are not type-conversion patterns, so their existing
users—including function returns and calls—must retain their original
types. Identity stride layouts are canonicalized when possible to avoid
unnecessary explicit layouts and casts.
Tests are updated to use result types consistent with their
`reinterpret_cast` metadata. In the SPIR-V tests, the size `10` is
represented by an SSA value because those cases intentionally remain
dynamically shaped and lower to element pointers; making the size static
would change the SPIR-V pointee type and prevent the existing
`reinterpret_cast` lowering from applying.
A regression test also verifies that folded `subview` offsets and
strides are reflected in the generated `reinterpret_cast` type.
---
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.
Commit: fe5ace607b587df1d46174846c40e3afe2c0a4a3
https://github.com/llvm/llvm-project/commit/fe5ace607b587df1d46174846c40e3afe2c0a4a3
Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
M mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/constant_folding.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
M mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold-dense-resource.mlir
M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
Log Message:
-----------
[mlir][tosa] Add assembly format for CONST (#226147)
This commit adds an assembly format for the TOSA CONST operation.
Previously, the generic assembly format was used while all other
operations had a custom format. It takes advantage of the incoming
textual format changes in #217291, to minimise impact to downstream
consumers.
Commit: 9fdcf6a0cafba6af912da2acb58f19addeb7722c
https://github.com/llvm/llvm-project/commit/9fdcf6a0cafba6af912da2acb58f19addeb7722c
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
Log Message:
-----------
[GVN] Decouple GVNValueTable and GVNPass (NFC) (#226232)
This is a first patch in series with the ultimate goal to move `GVNPass`
out of `GVN.h` and into `GVN.cpp`.
This is not straightforward because because of the rather tangled
dependencies between `GVNPass`, `GVNHoistPass`, `ValueTable`, and
`LeaderMap`.
The `GVNHoistPass` pass references `GVNPass::ValueTable`, by peeking
into `GVNPass`, resp. including `GVN.h`. Since `GVNHoistPass` does not
actually depend on `GVNPass` itself, but only on the `ValueTable` it
contains, it would make more sense to move `ValueTable` out of `GVN.h`
to its own header file, to be included by both `GVN.h` and
`GVNHoist.cpp.`
That's not entirely straightforward either since `ValueTable` has
several member functions taking a `GVNPass` reference as an argument.
This prevents moving `GVNPass` out of `GVN.h` and into an anonymous
namespace in `GVN.cpp`.
These `GVNPass` (in `ValueTable`) references are only used to access the
`LeaderMap`. Consequently, `LeaderMap` can be moved out of `GVNPass` and
into the `llvm` namespace and forward declared for its uses by
`ValueTable` (when `ValueTable` gets its own header).
This patch moves the `LeaderMap` out of `GVNPass`, into the `llvm`
namespace, and renames it to `GVNLeaderMap`.
Commit: be2eb0a91356ae3a1910d8226137b54db480166d
https://github.com/llvm/llvm-project/commit/be2eb0a91356ae3a1910d8226137b54db480166d
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err-fake16.s
A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err.s
Log Message:
-----------
[AMDGPU] Add gfx13 MC support for exclusive scan instructions (#226077)
Commit: f1de563a490b486738e65a6fef040e0e40d1bb21
https://github.com/llvm/llvm-project/commit/f1de563a490b486738e65a6fef040e0e40d1bb21
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP][NFC]Add a test with the missing runtime checks for vectorization, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/226947
Commit: 4c31d2c7641e180c2c9098e466b2247bb470fc25
https://github.com/llvm/llvm-project/commit/4c31d2c7641e180c2c9098e466b2247bb470fc25
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
Log Message:
-----------
AMDGPU: Make rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll less allocator sensitive (#226913)
This test is sensitive to the exact split and spills which occur, and disappeared under
a future upstream improvement. Use basic RA with a fixed occupancy since it more
stably produces the spill pattern.
Also add a codegen reference test for the same kernel, so future codegen
improvements are visible.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: c44450f30d17c64005fc74c506a01c373ddf702c
https://github.com/llvm/llvm-project/commit/c44450f30d17c64005fc74c506a01c373ddf702c
Author: Weiwen He <60433849+he-weiwen at users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
A llvm/test/CodeGen/X86/cmp-shrink-unsigned.ll
Log Message:
-----------
[X86] Shrink i32 unsigned compares to i8/i16 when high bits are zero (#197801)
Shrink i32 compares to 8 or 16 bit for non-constant operands when high
bits are zero, following the precedent of i64 -> i32 case.
Fixes the cases in #196827 where both sides of the compare are
non-constants, as this allows the `and(X, mask) `to be eliminated
downstream in DAGCombine.
I believe we can extend to constant operands as long as the length
changing prefix problem for i16 immediates is accounted for - however:
1. it's not sufficient to fix the remaining cases in the motivating
issue alone: when the rhs is constant, InstCombine clear the bits in the
mask that does not affect the comparison result (`icmp (and X, 255),
123` -> `icmp (and X, 252), 123`), so the mask does not fill the full
width of the truncated type, making the analysis trickier.
2. it leads to a lot of check line drifts, i'm not sure if it's worth
the effort to account for all of them, even if most don't look like
regressions.
Commit: a945adae2eb9236392fbbfe1ab5181f8c073d6f8
https://github.com/llvm/llvm-project/commit/a945adae2eb9236392fbbfe1ab5181f8c073d6f8
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Use makeExactNoWrapRegion for constant operands. (NFC) (#223973)
Use makeExactNoWrapRegion when constant is available.
Together with https://github.com/llvm/llvm-project/pull/223969, this
reduces compile-time in SCEV heavy workloads:
stage1-O3: -0.10%
stage1-ReleaseThinLTO: -0.0.9%
stage1-ReleaseLTO-g: -0.08%
stage1-aarch64-O3: -0.09%
stage2-O3: -0.07%
https://llvm-compile-time-tracker.com/compare.php?from=016fa12d18058b83c528f2af859e45df4548034f&to=e2efeaf6a19ac8c53170f2a2b196f3d38268fd32&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/223973
Commit: 7f133e72828d68cbd8ce06bf64ea0fe8b8528c06
https://github.com/llvm/llvm-project/commit/7f133e72828d68cbd8ce06bf64ea0fe8b8528c06
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/lib/AsmParser/LLParser.cpp
M llvm/test/Bitcode/upgrade-tbaa.ll
A llvm/test/Bitcode/upgrade-tbaa.ll.bc
M polly/test/CodeGen/OpenMP/single_loop_with_loop_invariant_baseptr.ll
Log Message:
-----------
[AsmParser] Remove TBAA auto-upgrade in IR parser (#226914)
At this point, the struct path TBAA format is more than a decade old, so
remove support for upgrading from the old format in the textual IR
parser. Bitcode upgrade support is retained, as bitcode is backwards
compatible.
This avoids introduction of new tests using the old format. Existing
tests were migrated in https://github.com/llvm/llvm-project/pull/226051.
Commit: 82aa78850bb1c90df3d747062555b2f34b0466c5
https://github.com/llvm/llvm-project/commit/82aa78850bb1c90df3d747062555b2f34b0466c5
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Rename SCEVFlags -> SCEVFlagsPair (NFC) (#226935)
Make it clear that it's a pair of no-wrap flags, and free up the
SCEVFlags name for renaming SCEVNoWrapFlags to it.
Commit: c786529445a1ecb3e8618eba4d68132e40c2e40f
https://github.com/llvm/llvm-project/commit/c786529445a1ecb3e8618eba4d68132e40c2e40f
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
M llvm/test/Transforms/SimplifyCFG/hoist-common-skip.ll
Log Message:
-----------
[SimplifyCFG] Drop UB-implying attributes when hoisting speculatively (#226746)
`hoistCommonCodeFromSuccessors()` can hoist identical instructions past
non-identical ones that it skips. If a skipped instruction may throw or
not return, the hoisted instruction is speculated, but it keeps its
UB-implying attributes and metadata, like `noundef`. Drop them in that
case, as SimplifyCFG already does when it speculates.
Commit: bc4c516f6e324d147eaeea1bd7d58eb57d03a671
https://github.com/llvm/llvm-project/commit/bc4c516f6e324d147eaeea1bd7d58eb57d03a671
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
Log Message:
-----------
[lldb][test] Enable TestFrameProviderThreadFilter.py on Arm (#226953)
Fixes #191855. I do not know why, but this test no longer crashes on
Arm.
Commit: 17b078d0b68d8d081e5add811b0d6cd91b374160
https://github.com/llvm/llvm-project/commit/17b078d0b68d8d081e5add811b0d6cd91b374160
Author: Tomas Matheson <Tomas.Matheson at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
Log Message:
-----------
[BuildLibCalls] Infer attributes for posix_memalign (#226943)
Handle posix_memalign in inferNonMandatoryLibFuncAttrs.
Commit: 3123f219c9a536a586df1d253d13ec49ab95ca38
https://github.com/llvm/llvm-project/commit/3123f219c9a536a586df1d253d13ec49ab95ca38
Author: Mian Miftah <mmiftah.duna at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/MergeFunctions.cpp
A llvm/test/Transforms/MergeFunc/redirect-call-debug-loc.ll
Log Message:
-----------
[MergeFunctions] Add debug locations to redirected calls (#225625)
A call to a function without debug info does not need a debug location,
even in a function with debug info. If MergeFunctions redirects such a
call to an equivalent function that has debug info, the verifier fails:
```
inlinable function call in a function with debug info must have a !dbg location
```
Before redirecting such a call, give it a line 0 location in the scope
of the caller, as `DwarfEHPrepare` does for the call to the rewind
function. This covers both ways calls are redirected:
`replaceDirectCallers()`, and `replaceAllUsesWith()` for `unnamed_addr`
functions.
Commit: 380d489bcd2a4e4dbe877f9518ee696348f419ea
https://github.com/llvm/llvm-project/commit/380d489bcd2a4e4dbe877f9518ee696348f419ea
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp
Log Message:
-----------
[lldb][test] Fix undefined behaviour in multi process driver (#226949)
This code was using strcmp on function names. Function names can be null
(see SBFrame::GetFunctionName), and passing null to strcmp is UB.
Commit: ccd2a3f748d7a4898fe2850491796f01603e8d72
https://github.com/llvm/llvm-project/commit/ccd2a3f748d7a4898fe2850491796f01603e8d72
Author: Dávid Bolvanský <david.bolvansky at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
Log Message:
-----------
[BasicAA] Compute minimal access extents lazily (#226931)
`aliasCheck` computes the minimal extent of an access before calling
`isObjectSmallerThan`, even though the latter immediately returns false
when the other pointer is not an identified object.
Move the extent computation behind the existing `isIdentifiedObject`
check. This preserves the result: whenever the extent can affect the
answer, the same value is computed and used as before; otherwise only
unused work is skipped.
Commit: 4df13761d078a2f3c10c4ed7fab033df116b6cdc
https://github.com/llvm/llvm-project/commit/4df13761d078a2f3c10c4ed7fab033df116b6cdc
Author: Tim Besard <tim.besard at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/X86/strength-reducible-address.ll
Log Message:
-----------
[SLP] Add tests for affine loop address computations (NFC) (#226907)
Precommit tests for #226220: related affine address recurrences in a
loop whose index arithmetic SLP currently vectorizes and extracts per
lane for scalar loads and stores, which LSR would otherwise turn into
pointer increments.
`X86/strength-reducible-address.ll` has Haswell and skylake-avx512 RUN
lines. It covers strided loads, constant-offset GEPs, and a load/store
at the same address. The negative cases are loop-loaded offsets,
escaping addresses, and offsets computed in the preheader. The checks
are generated with current main.
Commit: eac59201583b098cbd6b4b4619d165e90f50937d
https://github.com/llvm/llvm-project/commit/eac59201583b098cbd6b4b4619d165e90f50937d
Author: Vikash Gupta <Vikash.Gupta at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-freeze.mir
M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
Log Message:
-----------
[GlobalISel] Support GISelValueTracking for G_FREEZE. (#223696)
Port the SDAG FREEZE handling to GlobalISel. Look through G_FREEZE in
computeKnownBits, computeNumSignBits, and computeKnownFPClass when the
source is guaranteed not undef or poison.
Part of #150515.
---------
Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>
Commit: 71cbaace075d39f87063afa9d0da165ee04345b3
https://github.com/llvm/llvm-project/commit/71cbaace075d39f87063afa9d0da165ee04345b3
Author: David Green <david.green at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/binopshuffles.ll
M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Combine truncate(buildvector) -> buildvector (#223787)
If late in the pipeline we are left with truncate(buildvector), we can
generate the buildvector directly. This helps remove the xtn and can
lead to other simplification.
Commit: ca1b270af6e567ae7caa50cd2b3ede418b7cde5f
https://github.com/llvm/llvm-project/commit/ca1b270af6e567ae7caa50cd2b3ede418b7cde5f
Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/tools/clang-ssaf-src-edit-merge/SrcEditMerge.cpp
Log Message:
-----------
[SystemZ][z/OS] Open text files as text (#226518)
This patch fixes lit regressions in clang-ssaf-src-edit-merge by opening
text files as text.
Commit: 6861b01646bd770523e94f3efe572f598cfdcc53
https://github.com/llvm/llvm-project/commit/6861b01646bd770523e94f3efe572f598cfdcc53
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
Log Message:
-----------
[DWARFYAML] Declare `OffsetEntryCount` as `uint64_t` (#224631)
This prevents a potential multiplication overflow when `OffsetsSize` is
calculated and fixes an issue reported by a CodeQL scan.
Commit: 141ad3d5e3312eccc977b20af18c978e46fd9b40
https://github.com/llvm/llvm-project/commit/141ad3d5e3312eccc977b20af18c978e46fd9b40
Author: Dhairyashil R G <dhairyashil25 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir
Log Message:
-----------
[MLIR][NVVM] Add SM version requirements to mbarrier Ops (#224105)
The mbarrier Ops had no `NVVMRequiresSM` trait, so a `gpu.module`
targeting an older chip (e.g. `sm_75`) accepted them, and the error only
showed up later. This adds the trait to all 13 of them, same as #192257
and `mbarrier.check_layout` in #217252.
| floor | Ops |
|---|---|
| `sm_80` | `init`, `inval`, `arrive`, `arrive_drop`,
`arrive.nocomplete`, `arrive_drop.nocomplete`, `test.wait` |
| `sm_90` | `expect_tx`, `complete_tx`, `arrive.expect_tx`,
`arrive_drop.expect_tx`, `try_wait`, `try_wait.parity` |
The floors come from the Target ISA Notes in the [PTX ISA
8.5](https://docs.nvidia.com/cuda/pdf/ptx_isa_8.5.pdf) (section
9.7.12.15), and they match the backend: every Op that lowers to an
intrinsic fails to compile one arch below its floor and compiles at it.
`arrive_drop` at sm_80 relies on #222916.
Since the trait is per Op, some settings that need sm_90 still get
through on sm_80: an explicit `count`, `scope = cluster`, a
`shared::cluster` pointer, `relaxed = true`, or `layout` on `init`.
Catching those would mean the Ops implementing `getRequiredMinSMVersion`
themselves, which no Op does yet. Happy to add that if you'd like. PTX
version isn't covered either (#69448).
One behaviour change: `gpu-lower-to-nvvm-pipeline` and
`nvvm-attach-target` default to `sm_75`, so using mbarrier Ops with that
default now fails earlier, with a clear message. `verifyTarget = false`
turns the check off.
Tests are in `nvvm_check_target_sm.mlir`: one failing case per Op just
below its floor, plus passing cases at the floor, above it, and on
`sm_90a`.
Assisted-by: Claude
Commit: 3eb90f564e8b3c8bc93c1f139589ebad30f09b9e
https://github.com/llvm/llvm-project/commit/3eb90f564e8b3c8bc93c1f139589ebad30f09b9e
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
Log Message:
-----------
[VPlan] Distribute execution frequencies with BlockFrequencyInfo's code. (#226841)
Instead of hand-rolling frequency propagating, manually construct BFI
and use BFI::distributeMass.
Adds a final step where frequencies are rounded up to at least one, to
distinguish between unreachable and almost never executed blocks. This
matches BFI behavior.
Note that we need to still track whether frequencies are from edges with
unknown profile info.
PR: https://github.com/llvm/llvm-project/pull/226841
Commit: d8b7da91eb8d8c2232c58a9f8b9f2136861da343
https://github.com/llvm/llvm-project/commit/d8b7da91eb8d8c2232c58a9f8b9f2136861da343
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm-c/DebugInfo.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/lib/BinaryFormat/Dwarf.cpp
A llvm/test/DebugInfo/Generic/compileunit-source-language-name-roc.ll
Log Message:
-----------
[DWARF] Support Roc Language (#225631)
The Roc language has been assigned language codes for DWARF v5 and v6.
See [DWARF Issue 260821.1](https://dwarfstd.org/issues/260828.1.html).
Commit: cf5a39d92984abb7e6e2bac57af6dd9c0abba21a
https://github.com/llvm/llvm-project/commit/cf5a39d92984abb7e6e2bac57af6dd9c0abba21a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Add/update descriptors for extension clauses (#226509)
Commit: 5d8b5942fa5924d1bf1920fe63623d8e50c58d9a
https://github.com/llvm/llvm-project/commit/5d8b5942fa5924d1bf1920fe63623d8e50c58d9a
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
Log Message:
-----------
[OpenMP] Update modifier set properties on some clauses (#226508)
The modifier sets on DEPEND, NUM_TEAMS and REDUCTION in 6.1 only have
the exclusive property.
Commit: 8af4ce85a25634994ebd19223dac15213b1a7dbc
https://github.com/llvm/llvm-project/commit/8af4ce85a25634994ebd19223dac15213b1a7dbc
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/test/CIR/Analysis/alias-analysis-modref.cir
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/alignment.c
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/bitint-memory.c
M clang/test/CIR/CodeGen/bitint-record-layout.c
M clang/test/CIR/CodeGen/bitint-wide-be.c
M clang/test/CIR/CodeGen/bitint-wide.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/builtin-call.cpp
M clang/test/CIR/CodeGen/compound_literal.c
M clang/test/CIR/CodeGen/delete-array-aligned.cpp
M clang/test/CIR/CodeGen/delete-array-overaligned-cookie.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
M clang/test/CIR/CodeGen/delete-array.cpp
M clang/test/CIR/CodeGen/empty-union.cpp
M clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/fp-contract.c
M clang/test/CIR/CodeGen/global-const-alignment.cpp
M clang/test/CIR/CodeGen/global-init-fenv.cpp
M clang/test/CIR/CodeGen/global-section.c
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/globals.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
M clang/test/CIR/CodeGen/non-odr-use-non-ref.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-indirect-field.cpp
M clang/test/CIR/CodeGen/pointer-width-32bit.cpp
M clang/test/CIR/CodeGen/pragma-fenv_access.c
M clang/test/CIR/CodeGen/predefined-expr.c
M clang/test/CIR/CodeGen/source-loc.cpp
M clang/test/CIR/CodeGen/static-local-in-ctor.cpp
M clang/test/CIR/CodeGen/static-local-info.cpp
M clang/test/CIR/CodeGen/tls-model.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-strict-fp.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCUDA/device-stub.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
M clang/test/CIR/CodeGenCXX/zero_init_bases.cpp
M clang/test/CIR/IR/attribute-visibility.cir
M clang/test/CIR/IR/fenv.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-cast.cir
M clang/test/CIR/IR/invalid-cmp.cir
M clang/test/CIR/IR/invalid-delete-array.cir
M clang/test/CIR/IR/invalid-static-local-info.cir
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/invalid-tls.cir
M clang/test/CIR/IR/invalid-vtable.cir
M clang/test/CIR/IR/static-local-info.cir
M clang/test/CIR/IR/static-local.cir
M clang/test/CIR/IR/string-trailing-zeros.cir
M clang/test/CIR/IR/var-registration.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtable-attr.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/call-llvm-intrinsic.cir
M clang/test/CIR/Lowering/fenv.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/unittests/CIR/FenvOpTest.cpp
Log Message:
-----------
Make CIR assembly formats strict properties compatible (#226600)
Bind inherent attributes explicitly in CIR operation formats and update
assembly tests for the resulting syntax.
Assisted-by: Codex
Commit: 2fa97ac9671c00e8ddff5cc85a82ff84cebaf392
https://github.com/llvm/llvm-project/commit/2fa97ac9671c00e8ddff5cc85a82ff84cebaf392
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/EvaluationResult.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/CodeGenCXX/global-init.cpp
M clang/test/SemaCXX/PR19955.cpp
M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp
Log Message:
-----------
Reapply "[clang][bytecode] Stop relying on `CheckEvaluationResult()` … (#226879)
…(… (#226637)
This reverts commit e0316c1b4762263caa49e3c41ddde752a2b6b775.
This time we also check `Pointee.isInitialized()` in
`PtrView::isInitialized()` to catch cases where we call `invokeDtor()`
on a Block.
Commit: b5cae89e8463dd397960f8a37bb877a06306c0f4
https://github.com/llvm/llvm-project/commit/b5cae89e8463dd397960f8a37bb877a06306c0f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
M llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
M llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
M llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
Log Message:
-----------
[SLP]Fix fmul/fadd fusion costs and retry FMA seeds after all blocks
Fix the cost for the scalar of fmul+fadd pairs: fused fmul lanes add
the full fmul cost, fadd lanes with gathered fmuls were costed as
fmuladd, and the FMulAdd combine missed fmuls in the second operand,
c - a*b and constant lanes. Cost fused fmul lanes at (fmuladd - fadd),
such fadd lanes at (fmuladd - fmul), form the combine for either
operand, and treat a multi-use reduction root as fused. Extract nodes
take no credit for extracts the target folds into their users.
Reviewers: RKSimon, bababuck, MrSidims
Pull Request: https://github.com/llvm/llvm-project/pull/226117
Commit: 74f859b9d46e480fe43d7b904b1e80efb8a331a2
https://github.com/llvm/llvm-project/commit/74f859b9d46e480fe43d7b904b1e80efb8a331a2
Author: Aayush Mainali <aayushmainali.codes at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp
Log Message:
-----------
[clang-tidy] Fix readability-trailing-comma false positive on #endif (#219634)
The `readability-trailing-comma` check looks at the token immediately
before an enum's closing brace to decide whether a trailing comma is
present. When the last enumerators are wrapped in `#ifdef` / `#else` /
`#endif`, that token is the directive identifier `endif`, so the check
reports a missing comma and `-fix` inserts `,` after `#endif`. That is
outside the enumerator list and corrupts the source even when every
enumerator already has a trailing comma.
Skip the diagnostic when the token before `}` is a preprocessor
directive (`#` or a token preceded by `#`). An enumerator whose name
happens to be `endif` is still diagnosed, because it is not preceded by
`#`.
Fixes #218957
Commit: d789b97789e1a220d3e8b58c76bdd0cb495c3736
https://github.com/llvm/llvm-project/commit/d789b97789e1a220d3e8b58c76bdd0cb495c3736
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/COFFYAML.cpp
A llvm/test/tools/yaml2obj/COFF/bb-addr-map-pgo-analysis-map.yaml
A llvm/test/tools/yaml2obj/COFF/bb-addr-map.yaml
A llvm/test/tools/yaml2obj/COFF/section-semantic-content.yaml
Log Message:
-----------
[yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)
Commit: b3f84790c4e5092745b22525bd249146ccf2ebad
https://github.com/llvm/llvm-project/commit/b3f84790c4e5092745b22525bd249146ccf2ebad
Author: Haohai Wen <haohai.wen at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)
Teach yaml2coff to emit .llvm_bb_addr_map sections using the same
BBAddrMap YAML schema as yaml2elf.
Treat Entries as the complete section payload and reject its use with
SectionData, StructuredData, or SizeOfRawData.
Commit: 30ffad255bbde381abe1146446a6974d0b27ff37
https://github.com/llvm/llvm-project/commit/30ffad255bbde381abe1146446a6974d0b27ff37
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 2a96d57 (#226932)
This fixes 2a96d5737524012839e786699a0b327f22d1cfee (#217338).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2a96d5737524012839e786699a0b327f22d1cfee
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 271cb24b4d3831c719bc8282748f8266d3d08598
https://github.com/llvm/llvm-project/commit/271cb24b4d3831c719bc8282748f8266d3d08598
Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-register-pressure.ll
A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-vgpr-limit.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
Log Message:
-----------
[AMDGPU] Limit DVGPR entry function max VGPRs to block size (#226242)
AMDGPUPromoteAlloca.cpp has its own version of `getMaxVGPRs` so limit is
enforced in two places.
Co-Authored-By: Claude
Commit: 20913cfb73ee109c0ad4e9cb298e2c1a0595fb0b
https://github.com/llvm/llvm-project/commit/20913cfb73ee109c0ad4e9cb298e2c1a0595fb0b
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
Log Message:
-----------
[PDB] Prevent potential overflow when calculating `Base` in `formatMsfStreamData` (#224662)
The `Base` is calculated as a product of two 32-bits number but the
results is assigned to a 64-bit value. By casting one of the operands to
64-bit, the multiplication is done using the whole width of the `Base`
variable, preventing a potential overflow. This fixes an issue reported
by a CodeQL scan.
Commit: 26f6f833e6b11db16003fe6033049b9a6f615019
https://github.com/llvm/llvm-project/commit/26f6f833e6b11db16003fe6033049b9a6f615019
Author: David Green <david.green at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/test/CodeGen/AArch64/add.ll
M llvm/test/CodeGen/AArch64/andorxor.ll
M llvm/test/CodeGen/AArch64/arm64-rev.ll
M llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
M llvm/test/CodeGen/AArch64/bitcast.ll
M llvm/test/CodeGen/AArch64/ctlz.ll
M llvm/test/CodeGen/AArch64/ctpop.ll
M llvm/test/CodeGen/AArch64/cttz.ll
M llvm/test/CodeGen/AArch64/ldst-opt.ll
M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
M llvm/test/CodeGen/AArch64/mul.ll
M llvm/test/CodeGen/AArch64/neon-rshrn.ll
M llvm/test/CodeGen/AArch64/neon-truncstore.ll
M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/shufflevector.ll
M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
M llvm/test/CodeGen/AArch64/store.ll
M llvm/test/CodeGen/AArch64/sub.ll
M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
Log Message:
-----------
[AArch64] Add custom v2i32->v2i16 store lowering. (#223659)
This extends the existing v4i16->v4i8 lowering to handle v2i32->v2i16
stores too, which in general helps keep the number of instructions down.
Commit: 21277fd5587ad8055b47d5684d6a313e09860325
https://github.com/llvm/llvm-project/commit/21277fd5587ad8055b47d5684d6a313e09860325
Author: Nikolas Klauser <nikolasklauser at berlin.de>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Add a benchmark for string::append (#226559)
Commit: 83c3a2d69a927491bf9785ad5012a8db6eeb7e1a
https://github.com/llvm/llvm-project/commit/83c3a2d69a927491bf9785ad5012a8db6eeb7e1a
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M offload/plugins-nextgen/level_zero/src/L0Program.cpp
A offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][l0] Execute dynamic linking for all formats (#226980)
Also do dynamic linking when necessary for Offload Binaries and SPIR-V
images and not just for the old ELF format.
Commit: 7eb87fc1e1126c6c064731c6e476ffccc6e5c490
https://github.com/llvm/llvm-project/commit/7eb87fc1e1126c6c064731c6e476ffccc6e5c490
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/common.h
Log Message:
-----------
[lldb][test] Simplify multithreaded_queue (#226979)
This makes it easier to see how the timeout is applied in pop.
push now releases the mutex before notifying, where before the watchers
would have to wait for push to return. Likely not going to make anything
much faster, but it makes a bit more sense. Finish adding the new item,
then notify.
Commit: 3eda2aebadd430199a1d588b6b22c966af5356d5
https://github.com/llvm/llvm-project/commit/3eda2aebadd430199a1d588b6b22c966af5356d5
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/test/API/python_api/event/TestEvents.py
Log Message:
-----------
[lldb][test] Disable TestEvents.py (#226486)
This test is flaky on Linux, macOS and Windows. The usual failure on
macOS is as follows:
```
FAIL: test_shadow_listener (TestEvents.EventAPITestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 801, in wrapper
func(*args, **kwargs)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 485, in test_shadow_listener
state, restarted = self.wait_for_next_event(None, False)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 346, in wait_for_next_event
self.assertEqual(
>>> AssertionError: 2 != 3 : matching stop hook
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/lldb-build/bin/clang
----------------------------------------------------------------------
```
The test is already skipped on all platforms except macOS. This patch
skips it on all platforms.
Commit: e3cf33561946626500b3a3684430ce5da61d2882
https://github.com/llvm/llvm-project/commit/e3cf33561946626500b3a3684430ce5da61d2882
Author: Andreas Jonson <andjo403 at hotmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
A llvm/test/Transforms/InstCombine/pr226504-commuted.ll
A llvm/test/Transforms/InstCombine/pr226504.ll
Log Message:
-----------
[InstCombine] Fix miscompilation in sinkNotIntoOtherHandOfLogicalOp (#226783)
Consider the following: `or X, (not (not X))`
sinkNotIntoOtherHandOfLogicalOp calls `freelyInvert(X)` but as X is used
in the not this call result in the new instruction is `and (not X), (not
(not X)) -> and (not X), X` instead of the expected `and (not X), (not
X)`
fixes https://github.com/llvm/llvm-project/issues/226504
Commit: b5a51c5b670728f0b3bcb3d31bc063821cbcfb4b
https://github.com/llvm/llvm-project/commit/b5a51c5b670728f0b3bcb3d31bc063821cbcfb4b
Author: Alexey Samsonov <vonosmas at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libc/include/fcntl.yaml
M libc/include/llvm-libc-macros/linux/fcntl-macros.h
Log Message:
-----------
[libc] Add a few missing fcntl.h macro. (#226810)
* Add a few POSIX-specified symbolic constants to `<fcntl.h>`:
`O_RSYNC`,
`AT_SYMLINK_FOLLOW`, and `F_DUPFD_CLOEXEC`.
* Don't add `_CLOFORK` variants, since those are not supported by Linux.
* List the constants in the `fcntl.yaml` file for posterity.
Commit: c226f8dec63924b6fef645f5818eb42f52ffd1fe
https://github.com/llvm/llvm-project/commit/c226f8dec63924b6fef645f5818eb42f52ffd1fe
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
A llvm/test/CodeGen/SystemZ/zos-frame-callee-saved.ll
M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
M llvm/test/CodeGen/SystemZ/zos-ret-addr.ll
Log Message:
-----------
[SystemZ][z/OS] Allocate a stack frame when callee-saved registers are saved (#226681)
On z/OS (XPLINK64), a function without calls and without stack objects
that uses callee-saved registers got a stack size of 0. No stack frame
was allocated, so `STMG` stored the registers relative to the unchanged
stack pointer, i.e. into the register save area of the caller's DSA,
overwriting the caller's saved return address. Only skip the frame when
there is nothing to save.
Two existing tests (`zos-ret-addr.ll`, `zos-frameaddr.ll`) encoded this
store into the caller's frame and are updated; the values returned by
`llvm.returnaddress`/`llvm.frameaddress` are unchanged (the old stack
pointer is still read from offset 2048 of the current frame). New test
`zos-frame-callee-saved.ll`.
Found with GMP 6.3.0 on z/OS 3.1 (`mpn_mul_1`): code after the call ran
twice, then S0C4/S0C6. With this change GMP works.
Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported).
Fixes #226657.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: b4bccce2099984c74e5b29d767b586cb7b6e8dd6
https://github.com/llvm/llvm-project/commit/b4bccce2099984c74e5b29d767b586cb7b6e8dd6
Author: Alex Strelnikov <strel at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libc/src/__support/printf_core/float_dec_converter.h
M libc/src/__support/printf_core/float_dec_converter_limited.h
M libc/src/__support/printf_core/float_hex_converter.h
M libc/src/__support/printf_core/float_inf_nan_converter.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/test/src/stdlib/strfromf_test.cpp
Log Message:
-----------
[libc] Fix strfromf handling inf/nan. (#225805)
The root cause of #217708 is primarily in
libc/src/stdlib/str_from_util.h, which splits the utilities into
1. `parse_from_format()` which takes in a floating point and returns a
`FormatSection`, and
2. `strfromfloat_convert()`, which takes in the `FormatSection` and not
the floating point value.
`parse_from_format()` [does special case
handling](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L41-L49)
for `float`: it must place a `double` into `FormatSection::conv_val_raw`
when working with `%a` or `%A`. `strfromfloat_convert()` extracts the
bits from `conv_val_raw` to create `fputil::FPBits<T>`, but it [always
uses the template
type](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L115),
effectively creating type confusion when those bits are passed to
`convert_float_hex_exp()`.
An additional challenge in strfrom* functions is that the format string
naturally does not need or support a length modifier as in printf
functions. This is mostly a non-issue as `strfromfloat_convert()` is
templated on floating point type, and calls the "typed" conversion
functions. However, there are no templated / typed versions of
`convert_float_hex_exp()` or `convert_inf_nan()`. These two functions
currently depend on the value of `FormatSection::length_modifier` to
extract the correct type out of `FormatSection::conv_val_raw`:
[`convert_float_hex_exp()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_hex_converter.h#L70-L86)
and
[`convert_inf_nan()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_inf_nan_converter.h#L46-L60).
This coupling interacts with the type confusion created in
`strfromfloat_convert()`, and forces the implementation of `strfroml()`
to [manually set the
`length_modifier`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/strfroml.cpp#L26-L28).
The fix in this PR:
1. Merges the two str_from_float.h utility functions to remove the type
confusion.
2. Lifts the dependency on `FormatSection::length_modifier` and
`conv_val_raw` out of `convert_float_hex_exp()` and `convert_inf_nan()`;
similarly to how the "typed" conversion functions currently work, but
without templating on float point.
3. Updates some conversion function names to mark which ones only handle
finite floating point values.
This allows `strfroml()` to not manually set the length modifier. It
also enables `strfromf128()` to be added in a straightforward
implementation, because it will not need to depend on the existence of
`LengthModifier::Q`, controlled in part by
`LIBC_COPT_PRINTF_NO_CONVERT_FLOAT128`. In the future, it may be good
to separate `conv_val_raw` out of `FormatSection` to be its own argument
to non-typed functions.
Fixes #217708.
Commit: 18763d854a42a4db9c49a1434c4f48e6467714ed
https://github.com/llvm/llvm-project/commit/18763d854a42a4db9c49a1434c4f48e6467714ed
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/tools/llvm-strings/chunk-boundary.test
M llvm/tools/llvm-strings/llvm-strings.cpp
Log Message:
-----------
[llvm-strings] Use small buffer instead of reading whole file (#163073)
Commit: 5961b1283fab21a6836be87cbc693c8c81089b83
https://github.com/llvm/llvm-project/commit/5961b1283fab21a6836be87cbc693c8c81089b83
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
Log Message:
-----------
[NVPTX] Auto-upgrade NVVM mulhi intrinsics to generic mulh (#226578)
Commit: e721bde41d23ee1bc8c6f0413c1f7da8af388171
https://github.com/llvm/llvm-project/commit/e721bde41d23ee1bc8c6f0413c1f7da8af388171
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
M llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
M llvm/test/CodeGen/AArch64/GlobalISel/integration-shuffle-vector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exp.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir
Log Message:
-----------
AArch64: Mark the LR def of GlobalISel calls dead (#226256)
In SelectionDAG InstrEmitter would have marked this dead.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 47d9dee08242cb69c284fa47a642e4af978f911f
https://github.com/llvm/llvm-project/commit/47d9dee08242cb69c284fa47a642e4af978f911f
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/test/API/api/multithreaded/common.h
M lldb/test/API/api/multithreaded/test_listener_event_description.cpp
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
M lldb/test/API/api/multithreaded/test_listener_resume.cpp
Log Message:
-----------
[lldb][test][NFC] Set multithreaded_queue pop timeout in one place (#226988)
All callers of pop were passing 5 seconds. I don't forsee us needing to
change it per caller either, so just hardcode it in pop().
Commit: 63cb4e37ce2caf24426c08cf54c11e44f80d1fb0
https://github.com/llvm/llvm-project/commit/63cb4e37ce2caf24426c08cf54c11e44f80d1fb0
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
A .github/workflows/libcxx-benchmark-libstdcxx.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
A libcxx/utils/ci/lnt/run-libstdcxx-benchmarks
R libcxx/utils/ci/lnt/schema.yaml
A libcxx/utils/ci/lnt/schemas/libcxx.yaml
A libcxx/utils/ci/lnt/schemas/libstdcxx.yaml
Log Message:
-----------
[libc++] Use a self-contained job to run libstdc++ benchmarks (#226985)
After trying to retrofit libstdc++ benchmarking into our existing libc++
pipeline, I am giving up and setting up a self-contained job to do it
instead. It's much simpler as we can just run exactly what we need
instead of fighting to decouple libc++ specific logic from the libc++
benchmarking pipeline.
Various parts can still be extracted (e.g. gathering hardware
information for LNT reports, reading machines.json, etc) and will be
extracted in future iterations.
Also, add the corresponding libstdcxx LNT test suite schema so we can
start submitting results to it.
Commit: 0d429d44791ec27e40f08b3e9d51b743ee7fd870
https://github.com/llvm/llvm-project/commit/0d429d44791ec27e40f08b3e9d51b743ee7fd870
Author: Andrey Grabezhnoy <andrey.grabezhnoy at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/test/Transforms/LICM/hoist-binop.ll
Log Message:
-----------
[LICM] Preserve nsw when reassociating integer adds (#221210)
When LICM reassociates (LV + C1) + C2 into LV + (C1 + C2), it currently
drops nsw unless both original additions also have nuw.
After applying the usual OverflowTracking flags, set nsw directly on
both generated additions when both original additions have nsw and value
tracking proves that C1 + C2 cannot overflow in signed arithmetic. This
enables hoistAdd() later in the same LICM run.
Tests cover constant operands, scalar and vector operands proven safe
through known bits, operands constrained by dominating assumptions, and
the case where only the outer addition has nsw.
[Alive2 proof](https://alive2.llvm.org/ce/z/DC2dWY) of the
reassociation. The llvm.assume models the separately established fact
that C1 + C2 cannot overflow in signed arithmetic. The public example
uses i8 to finish quickly; the same proof also succeeds locally with
i32.
Fixes #220897
Commit: 92c62f30ec4a9d9ec9786aa403922fad7d536ae2
https://github.com/llvm/llvm-project/commit/92c62f30ec4a9d9ec9786aa403922fad7d536ae2
Author: Pedro da Rosa Pinheiro <pedarosa04 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/test/CIR/CodeGenOpenMP/parallel.c
Log Message:
-----------
[CIR][OpenMP] Implement lowering for the 'num_threads' clause for 'parallel' directive (#202466)
Implementing the emission of the "single-dimension" `num_threads` clause
for the `#pragma omp parallel` directive. The clause just accepts an
integer value and creates the `numThreadsVars` `llvm::SmallVector` with
that single value (representing a single num_thread dimension).
Based myself off of PR #172501 that implements the lowering for the
`proc_bind` clause.
Following this, I'll work on a PR to adapt CIR to deal with the
"dimensions" modifier introduced in openmp 6.1 (as also tackled by PR
#171767).
### Evidence:
Output of: `python3 build/bin/llvm-lit -sv
clang/test/CIR/CodeGenOpenMP/parallel.c`
```
llvm-lit: /home/pedro/dev/projects/my-llvm-project/llvm/utils/lit/lit/llvm/config.py:569: note: using clang: /home/pedro/dev/projects/my-llvm-project/build/bin/clang
Testing Time: 0.09s
Total Discovered Tests: 1
Passed: 1 (100.00%)
```
Commit: df11f86c50a1399c7af2816facd330988c19b32b
https://github.com/llvm/llvm-project/commit/df11f86c50a1399c7af2816facd330988c19b32b
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[llvm-strings] Use small buffer instead of reading whole file (#163073)
To prevent large memory footprint, we use small buffer and a seperated
string to print. This can largely reduce the memory consumption when
processing.
In the following example, the test file is a clang-24 debug build
binary. Each runs with three rounds and use the median number as a
result.
reading from stdin:
blast at localhost ~/o/l/build (main)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null
Executed in 3.94 secs fish external
usr time 3.03 secs 2.27 millis 3.03 secs
sys time 1.43 secs 0.00 millis 1.43 secs
Memory usage is 3.784 GB from valgrind massif.
reading from file:
blast at localhost ~/o/l/build (main)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null
Executed in 2.99 secs fish external
usr time 2.91 secs 1.14 millis 2.91 secs
sys time 0.08 secs 0.00 millis 0.08 secs
Memory usage is 1.802 GB from valgrind massif.
This patch:
reading from stdin:
blast at localhost ~/o/l/build (strings/fix_oom)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null
Executed in 2.53 secs fish external
usr time 2.28 secs 0.00 millis 2.28 secs
sys time 0.34 secs 1.33 millis 0.33 secs
Memory usage is 78.03 KB from valgrind massif.
reading from file:
blast at localhost ~/o/l/build (strings/fix_oom)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null
Executed in 2.57 secs fish external
usr time 2.37 secs 641.00 micros 2.37 secs
sys time 0.20 secs 206.00 micros 0.20 secs
Memory usage is 78.13 KB from valgrind massif.
Commit: fdcab03ed53bfa5842f6af464d3ffd50a19e3188
https://github.com/llvm/llvm-project/commit/fdcab03ed53bfa5842f6af464d3ffd50a19e3188
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-libstdcxx.yml
Log Message:
-----------
[libc++] Update GHA pins in libcxx-benchmark-libstdcxx.yml (#227003)
This workflow landed with older versions of actions/checkout and
actions/setup-python than the (recently updated) versions used by other
workflows.
Commit: e1941f8db3ab710e4ff3eb6b6fb32d4c8eb79b82
https://github.com/llvm/llvm-project/commit/e1941f8db3ab710e4ff3eb6b6fb32d4c8eb79b82
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
Log Message:
-----------
[bazel][libc] Refactor to allow copts under full-build mode (#226851)
This PR moves away from having sets of predefined groups of `copts` to
just directly listing `copts` for each target. The idea behind
[`copt_sets`](https://github.com/llvm/llvm-project/blob/dbde1428562362792d85cb9bbb58415f1b21cb48/utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl#L80)
in `_libc_library` was to restrict the different ways `copts` could be
defined, since `libc_release_library` doesn't respect `copts` and in
general having fewer combinations of `copts` allows for using fewer
`cc_library` targets. This PR allows `copts` to only be configurable if
the target is full-build only, so at least overlay libc function are
still more restricted.
Commit: a401e6562a56a21c6c8f0844d8b8bf9f270bf827
https://github.com/llvm/llvm-project/commit/a401e6562a56a21c6c8f0844d8b8bf9f270bf827
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
Log Message:
-----------
[bazel] Port 4faf0ae, 15cff90, 9028ff14, 4057f8e4 (#226853)
Commit: d5275610d14e0911000246139dd537890f30831b
https://github.com/llvm/llvm-project/commit/d5275610d14e0911000246139dd537890f30831b
Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
A llvm/test/CodeGen/Mips/msa/f16vec-shuffle.ll
Log Message:
-----------
[Mips] Promote MSA half-vector shuffles to integer vectors (#226105)
Promote v8f16 VECTOR_SHUFFLE operations to v8i16 to avoid expanding them
through EXTRACT_VECTOR_ELT and BUILD_VECTOR with an illegal scalar f16
type.
Fixes: #223618
Assisted-by: Codex # Tests
Commit: eb7f12adf832667a08debc0cdc65f762f615a99d
https://github.com/llvm/llvm-project/commit/eb7f12adf832667a08debc0cdc65f762f615a99d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-minbw-root.ll
Log Message:
-----------
[SLP]Fix narrowed leaf masks for demoted reduction root
The root of the narrowed-leaf reduction may be demoted and resized to the
reduction bitwidth of the wide reduction operations, while the masks are
built for the narrow leaves type, causes the crash.
Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5869787812
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227009
Commit: 19b0091751d8c786c92e749a2d3404595edd359b
https://github.com/llvm/llvm-project/commit/19b0091751d8c786c92e749a2d3404595edd359b
Author: Jackson Stogel <jtstogel at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/bazel-checks.yml
Log Message:
-----------
[Github] Add LLVM-libc's full-build to Bazel Checks workflow (#224749)
Adds a job to run LLVM-libc's full build test suite in Bazel via
`bazelisk test -- at llvm-project//libc:build_mode=full
@llvm-project//libc/...`. It is part of an effort to support LLVM-libc's
full build functionality in Bazel.
Commit: d87df4a9c352b275d89ef62f549c9225c0e51a51
https://github.com/llvm/llvm-project/commit/d87df4a9c352b275d89ef62f549c9225c0e51a51
Author: Will Hawkins <hawkinsw at obs.cr>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/MC/MCDwarf.cpp
Log Message:
-----------
[MC][Dwarf] Support DWARF Version 6 in CIE (#226997)
According to the latest draft (as of 9/28/2026) of the V6 specification
of DWARF, section 8.24 states
"The value of the CIE version number is 4."
(PDF of the draft as of 9/28/2026 available at
https://snapshots.sourceware.org/dwarfstd/dwarf-spec/latest/dwarf6-20260920-2248.pdf).
Fixes #226994.
Commit: 9e34a621d761e73eeb7e4a1c62070d4fd5ce1d0a
https://github.com/llvm/llvm-project/commit/9e34a621d761e73eeb7e4a1c62070d4fd5ce1d0a
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Mark shlib_global_var test unsupported for AMD (#227008)
The shared library test introduced in #226980 seems to fail with the AMD
builbot so mark it unsupported for AMD GPUs.
Commit: c472da0034ee42666d626b57e026b54013649f8f
https://github.com/llvm/llvm-project/commit/c472da0034ee42666d626b57e026b54013649f8f
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaOpenACCAtomic.cpp
M clang/test/SemaOpenACC/atomic-construct.cpp
Log Message:
-----------
[OpenACC] Fix diagnostic for atomic assignment (#227004)
Not sure how this escaped having code coverage, but a mis-placed closing
paren caused this to go very wrong :) This patch fixes it and adds the
original test case.
Fixes: #226905
Commit: f37b81afe94a1625ccd2b949d3bbfde78d612db9
https://github.com/llvm/llvm-project/commit/f37b81afe94a1625ccd2b949d3bbfde78d612db9
Author: Tuomas Kärnä <tuomas.karna at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
M mlir/test/Dialect/Linalg/erase-unused-operands-and-results.mlir
M mlir/test/Dialect/Linalg/swap-extract-slice-with-fill.mlir
A mlir/test/Dialect/Linalg/td/erase-unused-operands-and-results.mlir
A mlir/test/Dialect/Linalg/td/swap-extract-slice-with-fill.mlir
R mlir/test/Dialect/Linalg/transform-op-swap-extract-slice-with-fill.mlir
M mlir/test/python/dialects/transform.py
Log Message:
-----------
[mlir][transform] add ApplyEraseUnusedOperandsAndResultsPatternsOp transform op (#225864)
The existing pattern
`mlir::linalg::populateEraseUnusedOperandsAndResultsPatterns` can remove
unused linalg op operands and/or results. At the moment, this pattern is
however only applicable via the `linalg-fuse-elementwise-ops` pass. This
PR exposes this pattern via a standalone transform dialect op.
Following the naming convention, the transform op is called
`transform.apply_patterns.linalg.erase_unused_operands_and_results`. The
the Python bindings expose it as
`transform.structured.apply_patterns_linalg_erase_unused_operands_and_results()`.
Assisted-by: Claude
Commit: 6e3c393f4a4dcf07b16df1f442883dcecf8bd011
https://github.com/llvm/llvm-project/commit/6e3c393f4a4dcf07b16df1f442883dcecf8bd011
Author: Phoebe Linck <phoebe.linck at hpe.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/check-omp-structure.cpp
R flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
A flang/test/Semantics/OpenMP/taskwait-nowait.f90
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
M mlir/test/Target/LLVMIR/openmp-todo.mlir
Log Message:
-----------
[Flang][OpenMP] Support 'nowait' clause on taskwait (#219247)
No longer errors when a `nowait` clause is present on a `taskwait`, and
passes the info along to the runtime call `__kmpc_omp_taskwait_deps_51`.
Note that the runtime doesn't appear to use the `has_no_wait` parameter
at the moment, so `taskwait depend(...) nowait` will still block on
tasks it is dependent on. This should match the current Clang behavior.
Commit: 0203bc81f2869a8cf7e0d78759d2e40878d9afae
https://github.com/llvm/llvm-project/commit/0203bc81f2869a8cf7e0d78759d2e40878d9afae
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbinline.py
Log Message:
-----------
[lldb][test] Let inline tests opt into PDB debug info (#227001)
`MakeInlineTest` builds the test class with `type()`, so
`LLDBTestCaseFactory` only sees the attributes passed in that call.
Setting `TEST_WITH_PDB_DEBUG_INFO=True` on the returned class is too
late: the debug info variants have already been generated without pdb.
This patch adds a `test_with_pdb_debug_info` keyword argument that is
forwarded as the class attribute. It defaults to `False`, so existing
inline tests are unchanged.
rdar://188590558
Commit: 357a253eedf18fc8e113731a5e816741cdea20d9
https://github.com/llvm/llvm-project/commit/357a253eedf18fc8e113731a5e816741cdea20d9
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Rename session logs through their extended-length path (#226976)
On Windows, renaming `Incomplete.log` to `<Prefix>_<test-name>.log`
makes the destination longer than the source, so it can cross `MAX_PATH`
where the source did not. `os.rename` then fails with `WinError 3` on a
file that exists, and a test that behaved correctly is reported as
unresolved:
```
FileNotFoundError: [WinError 3] The system cannot find the path specified:
'...\Incomplete.log' -> '...\ExpectedFailure_test_implementation_only_import_main_executable_resilient_no_library_module_dwarf_clang_swift.log'
```
Address the destination through `lldbutil.get_extended_windows_path`,
including the existence check and removal above it.
Commit: 5c20fe98552af8fdbcd7ce714c1fad1f1e731a65
https://github.com/llvm/llvm-project/commit/5c20fe98552af8fdbcd7ce714c1fad1f1e731a65
Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
A clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226930)
This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.
This PR only adds the parser class, wiring it into `Interpreter.cpp`;
the end-to-end tests will come in a follow-up.
Reland of #218337 (reverted in #226679 due to buildbot failures): the
original hit a build race where `DeviceOffload.cpp` could be compiled
before the tablegen-generated `AMDGPUTargetParserDef.inc` existed. Fixed
by adding `target_parser_gen `to `clang/lib/Interpreter/CMakeLists.txt`.
Assisted by Claude Opus 4.8
Commit: b550208f48a83a889910e50456003438fc81cd76
https://github.com/llvm/llvm-project/commit/b550208f48a83a889910e50456003438fc81cd76
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
M llvm/test/CodeGen/Mips/msa/bitcast.ll
Log Message:
-----------
[MIPS] add f16 vector bitcast patterns (#226287)
came across this failure
https://godbolt.org/z/YPK78ea76
```llvm
; -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64
define <4 x float> @f(<8 x half> %a) {
%b = bitcast <8 x half> %a to <4 x float>
ret <4 x float> %b
}
```
Gives
```
LLVM ERROR: Cannot select: 0x3b4ac900: v8f16 = bitcast 0x3b4acf90
0x3b4acf90: v4i32 = insert_vector_elt 0x3b4aceb0, 0x3b4ac5f0, Constant:i32<3>
0x3b4aceb0: v4i32 = insert_vector_elt 0x3b4acdd0, 0x3b4ac510, Constant:i32<2>
0x3b4acdd0: v4i32 = insert_vector_elt 0x3b4accf0, 0x3b4ac3c0, Constant:i32<1>
0x3b4accf0: v4i32 = insert_vector_elt undef:v4i32, 0x3b4ac2e0, Constant:i32<0>
0x3b4ac2e0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %1
0x3b4ac3c0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %2
0x3b4ac510: i32,ch = load<(load (s32) from %fixed-stack.1)> 0x3b3c7b88, FrameIndex:i32<-1>, poison:i32
0x3b4ac5f0: i32,ch = load<(load (s32) from %fixed-stack.0)> 0x3b3c7b88, FrameIndex:i32<-2>, poison:i32
In function: f
```
Just adding the patterns fixes that, and seems straightforward enough.
I'm using `fexupl` in the tests to force the bitcast, otherwise the
bitcast just gets optimized out (and just a store of the input vector
type happens).
This test should maybe start using the automatic update script?
Commit: 28acf4e5adf67b336b6ac86cf3db0f1088b140b9
https://github.com/llvm/llvm-project/commit/28acf4e5adf67b336b6ac86cf3db0f1088b140b9
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
Log Message:
-----------
[lldb][Windows][CI] remove in process plugin testing (#226989)
lldb-server is now the default on Windows, stop testing the in process
plugin.
Commit: d9495236da19d3f11d6e00ad13f15281e879c61f
https://github.com/llvm/llvm-project/commit/d9495236da19d3f11d6e00ad13f15281e879c61f
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
Log Message:
-----------
[X86] Add tests for CCMP chain leaves with a folded flag source (#226797)
Tests for #217682
Assisted-by: Claude Code
Commit: d359e9d80b4baaa2699ed5fc613533a6a147e188
https://github.com/llvm/llvm-project/commit/d359e9d80b4baaa2699ed5fc613533a6a147e188
Author: Vladimir Shiryaev <w at tagolog.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/unittests/Support/raw_socket_stream_test.cpp
Log Message:
-----------
[llvm][Support] Use ::closesocket for native sockets on Windows (#226613)
Calling ::close on a Windows SOCKET that has not been converted with
_open_osfhandle crashes and aborts the process with 0xC0000409 instead
of returning an error.
Use ::closesocket on Windows for those sockets, and keep ::close on
POSIX.
Commit: 33eb30d7b79d79558afcf65186d2b97dfb000efe
https://github.com/llvm/llvm-project/commit/33eb30d7b79d79558afcf65186d2b97dfb000efe
Author: 陈子昂 <2802328816 at qq.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
A llvm/test/CodeGen/RISCV/rvp-widening-shift.ll
Log Message:
-----------
[Clang][RISCV] Add packed widening shift intrinsics (#224790)
This PR adds support for the Packed Widening Shift intrinsics:
- `__riscv_pwsll_s_u16x4`
- `__riscv_pwsll_s_u32x2`
- `__riscv_pwsla_s_i16x4`
- `__riscv_pwsla_s_i32x2`
Commit: 517839bdb319b9a604087909c1af9a699884df24
https://github.com/llvm/llvm-project/commit/517839bdb319b9a604087909c1af9a699884df24
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/test/Transforms/LoopVectorize/intrinsic.ll
Log Message:
-----------
[VectorUtils] Allow trivial vectorization of llvm.pdep and llvm.pext intrinsics (#227019)
Commit: 0767e7c6bace2f7df6d13601b021280b569d371a
https://github.com/llvm/llvm-project/commit/0767e7c6bace2f7df6d13601b021280b569d371a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
Log Message:
-----------
[lldb][test] Don't add pdb to explicitly tagged debug info categories (#226999)
`LLDBTestCaseFactory` appends `"pdb"` to `dbginfo_categories` whenever
the class sets `TEST_WITH_PDB_DEBUG_INFO=True`. When a test method is
tagged with explicit debug info categories
(`@add_test_categories(["dwarf"])`), `dbginfo_categories` is the set
intersection of the method's categories and the known debug info
categories, not a list, so the class failed to load with
```
AttributeError: 'set' object has no attribute 'append'
```
and dotest reported the whole file as UNRESOLVED.
Only add "pdb" when the method is not tagged, which is also the only
case where the default categories are used.
rdar://188589961
Commit: a0f704dc2dbdc0a77e7cc100c640eb63f80028c7
https://github.com/llvm/llvm-project/commit/a0f704dc2dbdc0a77e7cc100c640eb63f80028c7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
Log Message:
-----------
[SCEV] Skip invalidation with empty ValueExprMap (NFC). (#226845)
forgetLoop, forgetValue and forgetValues walk the def-use chains from
the forgotten instructions and erase each visited value's SCEV. This can
be expensive.
If ValueExprMap is empty, there's nothing to forget and skipping the
walk reduces compile-time a bit:
stage1-O3: -0.05%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.03%
stage1-aarch64-O3: -0.04%
stage2-O3: -0.05%
stage2-clang: -0.01%
https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c43f92b9840b62f75ab8a45b7379188d78d81135&stat=instructions:u
PR: https://github.com/llvm/llvm-project/pull/226845
Commit: 221fe115600f4051c7d3a92614da15e183073afa
https://github.com/llvm/llvm-project/commit/221fe115600f4051c7d3a92614da15e183073afa
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Sema/SemaHLSL.h
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/Type.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/TreeTransform.h
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
M clang/test/CodeGen/matrix-type-indexing.c
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/matrix-type-indexing.hlsl
M clang/test/CodeGenHLSL/builtins/mul.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
A clang/test/CodeGenHLSL/matrix-layout-register-representation.hlsl
M clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
M clang/test/SemaHLSL/matrix_layout_attr.hlsl
Log Message:
-----------
[HLSL] Preserve matrix layout as AST storage metadata (#225519)
fixes #213996
fixes #211977
fixes https://godbolt.org/z/rhTYx1KGf
Keep matrix layout metadata on noncanonical matrix types without
affecting type identity, overload resolution, deduction, or mangling.
Normalize matrix values to column-major register representation when
loading from memory, and convert them back to the destination layout
when storing. Preserve layout metadata through typedefs, arrays,
records, resources, serialization, AST import, and template
substitution.
This change also starts the reversal of encoding row\column major via
indexing changes in codegen and instead ops for a stable index but
transpose intrinsics for swapping matrix majorness.
Commit: 81cdde2cef226f50fcd7db798b5ee5e22dcb1dba
https://github.com/llvm/llvm-project/commit/81cdde2cef226f50fcd7db798b5ee5e22dcb1dba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
Log Message:
-----------
AArch64: Mark the NZCV def dead for unused overflow results (#227018)
Avoid implicitly depending on later recomputed dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8ece76768f67c9a5ff67a45db38dee7bb700dc20
https://github.com/llvm/llvm-project/commit/8ece76768f67c9a5ff67a45db38dee7bb700dc20
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)
This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.
This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664). With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.
Assisted-by: Antigravity
Commit: 4fce7d6bfb18abfd20021e679f8fce489a6ed898
https://github.com/llvm/llvm-project/commit/4fce7d6bfb18abfd20021e679f8fce489a6ed898
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTContext.h
M clang/lib/AST/ASTContext.cpp
Log Message:
-----------
[clang] Add one-entry cache for ASTContext::getDeclAttrs() (#226610)
In libc++, almost every decl has attributes, so ASTContext::DeclAttrs
has 50k-150k entries when using libc++. But attributes are often queried
several times in a row for the same decl (e.g. `D->hasAttr<A>() ||
D->hasAttr<B>()`). Numbers for some Chromium TUs:
getDeclAttrs() same Decl as table
calls previous call size
blink logical_box_fragment.cc 19.6M 88.4% 156132
glic_webui_contents_manager.cc 16.0M 86.1% 144545
tflite kernels/conv.cc 6.1M 91.2% 52623
So add a one-element cache. AttrVecs are allocated separately, so
keeping a pointer to the result is safe.
Build time for 60 random Chromium TUs drawn with probability
proportional to their compile time:
CPU time: 240.3 s => 237.4 s, -1.20%
instructions: 2489.0e9 => 2452.9e9, -1.45%
(To check noise level, running this with the same binary twice: +-0.04%
CPU time, +-0.01% instructions.)
Every one of the 60 TUs improves, by 0.98% to 2.26% in instructions.
No behavior change.
Commit: fc1e244c970c1ab169fb1b43c06797a931fe7082
https://github.com/llvm/llvm-project/commit/fc1e244c970c1ab169fb1b43c06797a931fe7082
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)
This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.
This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664). With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.
Assisted-by: Antigravity
Commit: f4c1a20178107dd75e0b38ff875bcb0a1b48d6a0
https://github.com/llvm/llvm-project/commit/f4c1a20178107dd75e0b38ff875bcb0a1b48d6a0
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
A llvm/test/CodeGen/X86/fpcw-dead-eflags.ll
Log Message:
-----------
X86: Mark EFLAGS dead on the FP control word OR (#227017)
Fix custom inserters to add dead flags.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 99667ddd5e99f3cf2dfe3e12912e1ae37626f3ba
https://github.com/llvm/llvm-project/commit/99667ddd5e99f3cf2dfe3e12912e1ae37626f3ba
Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/CodeGen/X86/apx/bls-egpr.ll
Log Message:
-----------
[X86][APX] Precommit test for BLSI/BLSMSK i8 patterns with EGPR (NFC) (#226793)
The i8 BLSI/BLSMSK patterns always select the VEX forms, so when only
extended GPRs (r16-r31) are available the operands get spilled instead
of using the EVEX forms.
Tests for #226796
Assisted-by: Claude Code
Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 1306e151f1b7874b0dee2e8b037a5a117e6e809b
https://github.com/llvm/llvm-project/commit/1306e151f1b7874b0dee2e8b037a5a117e6e809b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Analysis/UnsafeBufferUsage.cpp
Log Message:
-----------
[-Wunsafe-buffer-usage] Speed up warning a bit (#226605)
Checking a type is faster than calling ignoreUnsafeBufferIn...(). The
latter has to get the Stmt's begin loc, look up diagnostic state and
suppression, etc. And the type check lets us skip most Stmts cheaply, so
do that first.
In a sampling profile of 48 Chromium TUs (which are built with
-Wunsafe-buffer-usage), UnsafeBufferUsageReporter's
ignoreUnsafeBufferInLibcCall() and ignoreUnsafeBufferInContainer() were
1.35% and 1.29% of the total compile time, and 3.75% for
checkUnsafeBufferUsage() as a whole.
For 60 random Chromium TUs drawn with probability proportional to their
compile time, sum over all TUs:
CPU time: 242.9 s => 237.5 s, -2.2%
instructions: 2452.6e9 => 2371.8e9, -3.3%
No behavior change.
Commit: 82f8753b9c1e2574ad979cf2a9e4adfb4b19c224
https://github.com/llvm/llvm-project/commit/82f8753b9c1e2574ad979cf2a9e4adfb4b19c224
Author: Ross Burton <ross.burton at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/examples/Kaleidoscope/MCJIT/cached/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/cached/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/complete/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/complete/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/lazy/genk-timing.py
M llvm/test/DebugInfo/Inputs/check-fake-use.py
M llvm/test/Other/opt-bisect-helper.py
M llvm/test/TableGen/JSON-check.py
M llvm/test/tools/llvm-reduce/Inputs/sleep-and-check-stores.py
M llvm/tools/opt-viewer/extract-reproducers.py
M llvm/tools/opt-viewer/opt-diff.py
M llvm/tools/opt-viewer/opt-stats.py
M llvm/tools/opt-viewer/opt-viewer.py
M llvm/tools/opt-viewer/optrecord.py
M llvm/utils/DSAclean.py
M llvm/utils/DSAextract.py
M llvm/utils/Misc/zkill
M llvm/utils/Target/ARM/analyze-match-table.py
M llvm/utils/abtest.py
M llvm/utils/bisect
M llvm/utils/chunk-print-before-all.py
M llvm/utils/clang-parse-diagnostics-file
M llvm/utils/convert-constraint-log-to-z3.py
M llvm/utils/create_ladder_graph.py
M llvm/utils/docker/scripts/llvm_checksum/llvm_checksum.py
M llvm/utils/extract-section.py
M llvm/utils/extract_symbols.py
M llvm/utils/extract_vplan.py
M llvm/utils/indirect_calls.py
M llvm/utils/lint/common_lint.py
M llvm/utils/lint/cpp_lint.py
M llvm/utils/lint/generic_lint.py
M llvm/utils/lit/lit/ProgressBar.py
M llvm/utils/lit/tests/Inputs/check_path.py
M llvm/utils/lit/tests/Inputs/fake-externals/cd
M llvm/utils/lit/tests/Inputs/fake-externals/diff
M llvm/utils/lit/tests/Inputs/fake-externals/env
M llvm/utils/lit/tests/Inputs/fake-externals/export
M llvm/utils/lit/tests/Inputs/fake-externals/mkdir
M llvm/utils/lit/tests/Inputs/fake-externals/rm
M llvm/utils/lit/tests/Inputs/googletest-crash/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-detect-duplicate/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-discovery-failed/subdir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-format-respect-gtest-sharding-env-vars/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-format/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-no-sharding/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-prefix/DummySubDir/test_one.py
M llvm/utils/lit/tests/Inputs/googletest-sanitizer-error/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/googletest-timeout/DummySubDir/OneTest.py
M llvm/utils/lit/tests/Inputs/shtest-format/write-bad-encoding.py
M llvm/utils/lit/tests/Inputs/shtest-format/write-control-chars.py
M llvm/utils/lit/tests/Inputs/shtest-not-posix/fail-signal.py
M llvm/utils/lit/tests/Inputs/shtest-not/fail.py
M llvm/utils/lit/tests/Inputs/shtest-not/fail2.py
M llvm/utils/lit/tests/Inputs/shtest-not/pass.py
M llvm/utils/lit/tests/Inputs/shtest-output-printing/write-a-lot.py
M llvm/utils/lit/tests/Inputs/shtest-shell/check_args.py
M llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stderr.py
M llvm/utils/lit/tests/Inputs/shtest-shell/write-to-stdout-and-stderr.py
M llvm/utils/lit/tests/check-tested-lit-timeout-ability
M llvm/utils/llvm-gisel-cov.py
M llvm/utils/llvm-original-di-preservation.py
M llvm/utils/merge-json.py
M llvm/utils/release/findRegressions-nightly.py
M llvm/utils/release/findRegressions-simple.py
M llvm/utils/remote-exec.py
M llvm/utils/schedcover.py
M llvm/utils/shuffle_fuzz.py
M llvm/utils/shuffle_select_fuzz_tester.py
M llvm/utils/sort_includes.py
M llvm/utils/testgen/mc-bundling-x86-gen.py
M llvm/utils/unicode-case-fold.py
M llvm/utils/wciia.py
Log Message:
-----------
[llvm] Unify python shebangs (#187255)
As per PEP-0394[1], there is no real concensus over what binary names
Python has, specifically 'python' could be Python 3, Python 2, or not
exist.
However, everyone has a python3 interpreter and the scripts are all
written for Python 3. Unify the shebangs so that the ~50% of shebangs
that use python now use python3.
[1] https://peps.python.org/pep-0394/
Commit: 2d254ab1e39a31dd7a4afc03e782d371e0d83b13
https://github.com/llvm/llvm-project/commit/2d254ab1e39a31dd7a4afc03e782d371e0d83b13
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/include/flang/Lower/PFTDefs.h
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/assigned-goto-labeled-end.f90
M flang/test/Lower/ifconvert.f90
A flang/test/Lower/pre-fir-tree-incoming-branches.f90
M flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Record the evaluations that branch to each evaluation (#225755)
The PFT records where each branch goes, but not where it comes from, so
asking whether anything branches into a construct means walking the
whole procedure.
Record the reverse edges beside the forward ones, and print them in PFT
dumps so both directions of the branch graph are visible.
Commit: a3cf6f45fb686ec4d80d59d274132bbe95a06790
https://github.com/llvm/llvm-project/commit/a3cf6f45fb686ec4d80d59d274132bbe95a06790
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Mark SCC def dead in kill/demote lowering (#227024)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: dbe2ac32c9e6791a635479ee0137feb722ef47ce
https://github.com/llvm/llvm-project/commit/dbe2ac32c9e6791a635479ee0137feb722ef47ce
Author: hidekisaito <hidekido at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/test/CodeGen/AMDGPU/coexec-sched-flavor-classification.mir
Log Message:
-----------
[AMDGPU] Make GFX1250VALUBlockingCycles a feature. (#226314)
Included (intentional) behavior change: gfx1251 (w/ FullRate64Ops) does
not have GFX1250VALUBlockingCycles feature --- table is only partially usable for
gfx1251.
Commit: 9fcdae44a6465714fd53acf90a356cc2cca96ddd
https://github.com/llvm/llvm-project/commit/9fcdae44a6465714fd53acf90a356cc2cca96ddd
Author: Nikhil Kotikalapudi <nak00001 at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
Log Message:
-----------
[CodeGen] Re-land reverted PR (#216510): "Use RegisterClassInfo for remaining allocation-order users" (#222450)
Re-land PR #216510 which was reverted in #221749 and fixed by @mhalk in
#221849.
Additionally addresses the comment in the reversion PR to fix
`/llvm/test/CodeGen/AArch64/wineh-try-catch.ll` with -regalloc=pbqp by
refreshing RCI with updateReservedRegs from my previous PR.
Edit: Removed PBQP related items from this PR.
Assisted by composer 2.5
Commit: 9073f2403eac0845d72eb806bab6d0d6aced13f6
https://github.com/llvm/llvm-project/commit/9073f2403eac0845d72eb806bab6d0d6aced13f6
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/Unit/lit.cfg.py
M lld/unittests/AsLibELF/CMakeLists.txt
M lld/unittests/AsLibELF/OutputStream.cpp
M lld/unittests/AsLibELF/ROCm.cpp
Log Message:
-----------
Revert "[lld][test] Use LLVM helpers for input file discovery" (#227045)
Reverts llvm/llvm-project#220404
Based on post merge comments on that change
Commit: f974015a10cfa86855b8e11e59a2b14079a4b8eb
https://github.com/llvm/llvm-project/commit/f974015a10cfa86855b8e11e59a2b14079a4b8eb
Author: lzcnt <lzcunt at rawr.fun>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Basic/Targets/OSTargets.h
M clang/test/Preprocessor/init.c
M llvm/include/llvm/TargetParser/Triple.h
Log Message:
-----------
[clang][mlibc] Predefine `__mlibc__` for mlibc targets (#225654)
Pretty much all users of mlibc targets currently vendor this or similar
patches and having it upstream would be useful.
Commit: 1abae183ec2d58bd9fba2ec713266ad29175705f
https://github.com/llvm/llvm-project/commit/1abae183ec2d58bd9fba2ec713266ad29175705f
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
M llvm/test/CodeGen/SPIRV/llvm-intrinsics/ldexp.ll
Log Message:
-----------
[SPIR-V] Fix ldexp exponent splat for vectors wider than four elements (#225617)
The shared createVirtualRegister helper sets the full vector LLT, which
does not match the 128-bit vector register classes and trips a size
assert
Commit: d306fc59fcffc2779d1710c7dea8bc7699b5950a
https://github.com/llvm/llvm-project/commit/d306fc59fcffc2779d1710c7dea8bc7699b5950a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
Log Message:
-----------
AMDGPU: Mark SCC defs dead in the indirect addressing expansion (#227012)
The exec manipulation and index offset computations clobber SCC but
never use it.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 2ad73e6250f656aca147f024c0fe00d411f1c5c0
https://github.com/llvm/llvm-project/commit/2ad73e6250f656aca147f024c0fe00d411f1c5c0
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/lib/Target/Cpp/TranslateToCpp.cpp
M mlir/test/Target/Cpp/expressions.mlir
Log Message:
-----------
Give emitc.member_call_opaque operator precedence (#226349)
The original problem here is that member_call_opaque could not be used
inside an emitc.expression. When I added the op to the precedence table,
I noticed that the emitter was generating spurious parentheses (e.g.,
`(v).at(i)`), and so, with AI help, I forwarded emitc::LoadOp operands
in CppEmitter::emitOperand when evaluating sub-expressions, so
lvalue-to-rvalue loads do not introduce spurious parentheses around
receiver variables.
---------
Co-authored-by: ioana ghiban <ioana.ghiban at arm.com>
Commit: 5abc636bed3f5b8938cbbf626e881c194a284267
https://github.com/llvm/llvm-project/commit/5abc636bed3f5b8938cbbf626e881c194a284267
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Log Message:
-----------
DAG: Use poison for some vector element folds (#225406)
Commit: f2eddce184a57aff4265d0f3ee3a7d4b0f1f6162
https://github.com/llvm/llvm-project/commit/f2eddce184a57aff4265d0f3ee3a7d4b0f1f6162
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/matrix.cpp
Log Message:
-----------
[CIR] Support load & store for builtin matrix type (#226259)
Implement support for the load and store built-in matrix type
Issue #221772
Commit: 2190e84833b8f8ae1fa235dc2868bd13112d0c05
https://github.com/llvm/llvm-project/commit/2190e84833b8f8ae1fa235dc2868bd13112d0c05
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.md
R clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.md
R clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.rst
A clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.md
R clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.rst
Log Message:
-----------
[clang-tidy][docs] Rename readability check docs to Markdown [4/5] (#221640)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fourth part of the mechanical rename of the check
documentations in readability module.
The rewrite is provided by the next PR in this stack.
Commit: 0d59780b887782c21274868dbc8eb6d5c83e8e12
https://github.com/llvm/llvm-project/commit/0d59780b887782c21274868dbc8eb6d5c83e8e12
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-member-init.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-nested-if.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-parentheses.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-preprocessor.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-qualified-alias.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-string-init.md
M clang-tools-extra/docs/clang-tidy/checks/readability/redundant-typename.md
M clang-tools-extra/docs/clang-tidy/checks/readability/reference-to-constructed-temporary.md
M clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.md
Log Message:
-----------
[clang-tidy][docs] Rewrite readability check docs to Markdown [4/5] (#221641)
Tracking issue: #201242
See the [migration guide] for more information.
[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is the fourth part of rewriting check documentations in readability
module from reST to MyST Markdown.
AI Usage: This was prepared with rnk's fork of rst2myst and
GPT5.6-assisted (both Codex and AmpCode) cleanup.
I manually verified that the documentation renders as expected.
Preview site:
https://broken.life/llvm-staging/readability-markdown-port/index.html
---------
Co-authored-by: Amp <amp at ampcode.com>
Commit: 5d23afa97db69773dc705ffda8a44a380e04ef57
https://github.com/llvm/llvm-project/commit/5d23afa97db69773dc705ffda8a44a380e04ef57
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/test/CodeGen/AMDGPU/licm-wwm.mir
M llvm/test/CodeGen/AMDGPU/si-init-whole-wave.mir
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr-terminator.mir
M llvm/test/CodeGen/AMDGPU/wqm-debug-instr.mir
M llvm/test/CodeGen/AMDGPU/wqm-propagate-for-execz-side-effect.mir
M llvm/test/CodeGen/AMDGPU/wqm-terminators.mir
M llvm/test/CodeGen/AMDGPU/wqm.mir
Log Message:
-----------
AMDGPU: Mark SCC defs dead in SIWholeQuadMode state transitions (#227015)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 03cb1db40787ab170cd2e4588840fe8b5ecf8fcf
https://github.com/llvm/llvm-project/commit/03cb1db40787ab170cd2e4588840fe8b5ecf8fcf
Author: Ivan Butygin <ivan.butygin at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/SymbolTable.h
M mlir/lib/IR/SymbolTable.cpp
M mlir/lib/Transforms/RemoveDeadValues.cpp
A mlir/test/Transforms/remove-dead-values-symbol-scope.mlir
M mlir/unittests/IR/SymbolTableTest.cpp
Log Message:
-----------
[mlir] `remove-dead-values`: properly handle symbol users outside of a pass root. (#225355)
Follow up to the
https://github.com/llvm/llvm-project/pull/224831#pullrequestreview-5262450200
comment.
Add `areAllUsesVisible` query to the `SymbolUserMap` to check is all
users are visible and use it in `remove-dead-values`.
Commit: c4c1cbbcf2147ce18e4a0ad654a695719f253b66
https://github.com/llvm/llvm-project/commit/c4c1cbbcf2147ce18e4a0ad654a695719f253b66
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
[X86][NVPTX] Use `m_Value(N, Pattern)` overload to simplify matching. (#226621)
Replace the `m_AllOf(Pattern, m_Value(N))` idiom (match-and-bind) with
the `m_Value(N, Pattern)` overload.
Commit: 407f8a1f7d1edf096cb9e9ca868916599ad52b4e
https://github.com/llvm/llvm-project/commit/407f8a1f7d1edf096cb9e9ca868916599ad52b4e
Author: Brian Cain <brian.cain at oss.qualcomm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/Hexagon.cpp
A clang/test/Driver/hexagon-eh-frame-pic.c
A llvm/test/MC/Hexagon/eh-frame.s
Log Message:
-----------
[Hexagon][Driver] Tell llvm-mc about PIC under -fno-integrated-as (#213821)
Hexagon picks the .eh_frame FDE pointer encoding from whether the code
is position independent: DW_EH_PE_pcrel if so, DW_EH_PE_absptr otherwise
(MCObjectFileInfo::initELFMCObjectFileInfo). Unlike most targets,
Hexagon uses llvm-mc rather than GNU as for -fno-integrated-as, and the
driver was not passing the PIC setting along. llvm-mc defaults to
non-PIC, so the same source assembled the two ways produced different
unwind tables: the integrated assembler emitted R_HEX_32_PCREL, while
-fno-integrated-as emitted R_HEX_32 with an absptr CIE augmentation.
hexagon-unknown-linux-musl defaults to PIC, so it was the default config
that diverged.
Pass -position-independent to llvm-mc when the relocation model is PIC.
Non-PIC keeps DW_EH_PE_absptr, unchanged.
Commit: dee78e33993c9275a0cdd3dc22a0b21958a42ef4
https://github.com/llvm/llvm-project/commit/dee78e33993c9275a0cdd3dc22a0b21958a42ef4
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/CodeGen/msp430-register-names.c
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-sme2-asm.ll
M llvm/test/CodeGen/AArch64/aarch64-za-clobber.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/PowerPC/pr47155-47156.ll
M llvm/test/CodeGen/RISCV/GlobalISel/irtranslator-inline-asm.ll
M llvm/test/CodeGen/X86/cfi-xmm.ll
M llvm/test/CodeGen/X86/inline-asm-avx512f-x-constraint.ll
M llvm/test/CodeGen/X86/inline-asm-default-clobbers.ll
M llvm/test/CodeGen/X86/tail-dup-asm-goto.ll
Log Message:
-----------
CodeGen: Mark inline asm clobber defs dead (#227026)
A clobber operand has no value associated with it, so the def is always
dead. Set the flag where the INLINEASM is built instead of relying on
later inference.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: f32a45cfd8c688fcd002295ebcedac054b81e0bf
https://github.com/llvm/llvm-project/commit/f32a45cfd8c688fcd002295ebcedac054b81e0bf
Author: Andrzej Warzyński <andrzej.warzynski at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/CodeGen/AArch64/sve/dup.c
M clang/test/CodeGen/AArch64/sve/len.c
Log Message:
-----------
[clang][CIR] Add missing return stmt in tests (#226534)
This PR makes sure that tests in:
* clang/test/CodeGen/AArch64/sve/
follow the format previously establised in:
* clang/test/CodeGen/AArch64/sve-intrinsics/
Commit: 26033a3b66ed79f44524065c6004a7a809616b49
https://github.com/llvm/llvm-project/commit/26033a3b66ed79f44524065c6004a7a809616b49
Author: gallopruss-sie <russell.gallop at sony.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/Driver/riscv32-toolchain-extra.c
M clang/test/Driver/riscv64-toolchain-extra.c
Log Message:
-----------
[clang][test] Pass -resource-dir in riscv*-toolchain-extra.c tests (#226952)
Fixes issue reported in
https://github.com/llvm/llvm-project/pull/216996#issuecomment-5846218483
These tests check that, with no GCC installation, the driver finds the
linker, crt0 and sysroot relative to its own bin/ directory. The
compiler-rt paths come from the resource directory, which the tests did
not specify, so they relied on the build's CLANG_RESOURCE_DIR placing it
within the fake toolchain tree.
With a relative CLANG_RESOURCE_DIR containing several "..", e.g.
../../../../lib/clang/24 as used by Gentoo, the resource directory
resolves outside of the test tree. This previously passed only because
the unnormalized path still contained "riscv64-nogcc/". Since
99988429d395 removed the dots from the path, the checks fail.
Pass an explicit -resource-dir within the test tree so the tests don't
depend on the build configuration.
Claude Code helped with this.
Commit: e40e0bc36b14d296df5798c52792f662c715b445
https://github.com/llvm/llvm-project/commit/e40e0bc36b14d296df5798c52792f662c715b445
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/tools/llubi/intr_speculative_load.ll
A llvm/test/tools/llubi/intr_speculative_load_ub.ll
M llvm/tools/llubi/lib/Interpreter.cpp
Log Message:
-----------
[llubi] Add support for llvm.speculative.load. (#226839)
Implement the direct form of llvm.speculative.load, where the number of
accessible bytes N is passed as an i64. Only the N accessible bytes are
read from memory and they must be in bounds of the underlying object;
all other bytes are poison. With from_end, the accessible bytes are the
last N bytes of the loaded value. It is UB if N is poison or exceeds the
size of the loaded type.
Support for the oracle form will be added as follow-up.
PR: https://github.com/llvm/llvm-project/pull/226839
Commit: d1133c1d71ae87e6f77cf188b01ac976265f1363
https://github.com/llvm/llvm-project/commit/d1133c1d71ae87e6f77cf188b01ac976265f1363
Author: Raphael Isemann <rise at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Clike/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
Log Message:
-----------
[lldb][Clike][NFC] Add the TypeSystemClike plugin skeleton (#222611)
Introduces an empty TypeSystem plugin infrastructure for the new
TypeSystemClike.
For the RFC with more information and background, see
https://discourse.llvm.org/t/rfc-a-faster-more-reliable-type-system-for-c-languages/91459
and #225371
assisted-by: claude
Commit: 111f1d4940427c04718fd038726da5d1860b94e3
https://github.com/llvm/llvm-project/commit/111f1d4940427c04718fd038726da5d1860b94e3
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/AST/ASTConcept.h
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#226653)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
UnsatisfiedConstraintRecord because it is always nonnull.
Specifically, ConstraintSatisfaction::Details only receives nonnull
pointers in the following places:
- ASTNodeImporter::ImportConstraintSatisfaction
- ConstraintSatisfactionChecker::consumeSFINAEFailure
- ConstraintSatisfactionChecker::EvaluateSlow
- ConstraintSatisfactionChecker::Evaluate
- readConstraintSatisfaction
Assisted-by: Antigravity
Commit: 869989ee3450903263300b247e127d1495f5e893
https://github.com/llvm/llvm-project/commit/869989ee3450903263300b247e127d1495f5e893
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/docs/dil-expr-lang.ebnf
M lldb/source/ValueObject/DILParser.cpp
Log Message:
-----------
[lldb][NFC] Add missing composite assignments to DIL grammar (#226558)
Commit: 4f70f183ac0e57c83dc470e12490a244e0570210
https://github.com/llvm/llvm-project/commit/4f70f183ac0e57c83dc470e12490a244e0570210
Author: David Green <david.green at arm.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/AArch64/cast.ll
M llvm/test/Analysis/CostModel/AArch64/sve-cast.ll
Log Message:
-----------
[AArch64] Add extra bitcast cost coverage. NFC (#227048)
Commit: c04cc6bcceeb34add319b1dcf0c066bfc033d85b
https://github.com/llvm/llvm-project/commit/c04cc6bcceeb34add319b1dcf0c066bfc033d85b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/test/tools/llvm-profdata/profile-symbol-list.test
M llvm/unittests/ProfileData/SampleProfTest.cpp
Log Message:
-----------
[ProfileData] Support merging MD5-based ProfileSymbolList (#226594)
This patch supports merging MD5-based ProfileSymbolList instances and
writing the merged result to an extensible binary profile.
#210235 introduced the MD5-based ProfileSymbolList section in the
Eytzinger layout, where profile merging was initially supported only
from strings to an MD5-based Eytzinger array.
This patch adds DenseSet<uint64_t> GUIDs to ProfileSymbolList to
accumulate 64-bit MD5 hashes when merging MD5-based symbol lists,
while keeping ColdGUIDTable (EytzingerTableSpan) for zero-copy lookups
during compilation. collectGUIDs, contains, and size are updated to
query GUIDs when populated.
RFC:
https://discourse.llvm.org/t/rfc-faster-sample-profile-loading/90957/7
Assisted-by: Antigravity
Commit: 31ac095ef1ccbda0b37c55c718478a38609b30ae
https://github.com/llvm/llvm-project/commit/31ac095ef1ccbda0b37c55c718478a38609b30ae
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/IR/ConstantRange.cpp
M llvm/unittests/IR/ConstantRangeTest.cpp
Log Message:
-----------
[ConstantRange] Compute exact no-wrap region w/o materializing CR. (#223969)
Inline logic into makeExactNoWrapRegion() so we do not need to construct
temporary constant ranges.
Together with using makeExecuteNoWrapRegion in SCEV, this improves
compile-time on SCEV-heavy workloads.
Analysis aided by Opus 5.
PR: https://github.com/llvm/llvm-project/pull/223969
Commit: f7f538b7ecf2baede19b86eca567f14095235b3a
https://github.com/llvm/llvm-project/commit/f7f538b7ecf2baede19b86eca567f14095235b3a
Author: Keith Smiley <keithbsmiley at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A utils/bazel/llvm-project-overlay/lld/unittests/BUILD.bazel
Log Message:
-----------
[bazel] Run lld unittests (#220340)
Commit: 73014a8d08f4b205fd1f09bc0eb3e0cba7c5eff0
https://github.com/llvm/llvm-project/commit/73014a8d08f4b205fd1f09bc0eb3e0cba7c5eff0
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/Sema/TreeTransform.h
M clang/test/SemaTemplate/matrix-type.cpp
Log Message:
-----------
[Clang] Fix assertion when instantiating a matrix type with an invalid element type (#224331)
Fixes #202744
`Sema::BuildMatrixType` skips the element type check while the element
type is dependent, so `template <typename Y> using matrix_5_5 = Y
__attribute__((matrix_type(5, 5)));` gives a `ConstantMatrixType` whose
element is still unchecked. On instantiation,
`TreeTransform::RebuildConstantMatrixType` called
`ASTContext::getConstantMatrixType` directly, so nothing ever validated
the substituted type. `matrix_5_5<matrix_5_5<float>>` then hit the "need
a valid element type" assertion. The dependent-dimension case
(`matrix_type(R, C)`) was fine because `RebuildDependentSizedMatrixType`
already goes through `BuildMatrixType`.
`RebuildConstantMatrixType` now goes through `Sema::BuildMatrixType` as
well, the same way `RebuildExtVectorType` does for vectors: it takes the
attribute location and wraps the dimensions in integer literals. An
invalid instantiated element type now gets the usual `invalid matrix
element type` error instead of crashing, and the `_BitInt` element check
that this path also skipped is applied too.
Commit: 04032854901d949ca4a1b8e57c62fb53969a6ffc
https://github.com/llvm/llvm-project/commit/04032854901d949ca4a1b8e57c62fb53969a6ffc
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-divrem-dead-defs.ll
Log Message:
-----------
X86: Mark the unused defs of FastISel selected div/rem dead (#227053)
The DIV/IDIV instructions define the quotient, the remainder and the
flags, but X86FastISel::X86SelectDivRem only reads one of the quotient
and remainder. Mark the rest dead when building the instruction instead
of relying on later recomputatios.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: c069c0e16445cd954146807451f1067f75a61f6c
https://github.com/llvm/llvm-project/commit/c069c0e16445cd954146807451f1067f75a61f6c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
Log Message:
-----------
[HLSL] Fix -Wunused-variable in #225519 (#227059)
Inline the variable names given the variable names don't add much
clarity and they aren't used anywhere outside of asserts.
Commit: 15d2ca3ced8c18dcbc0b666f4de5067d4586e857
https://github.com/llvm/llvm-project/commit/15d2ca3ced8c18dcbc0b666f4de5067d4586e857
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/include/lldb/API/SBBreakpoint.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/Options.td
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
Log Message:
-----------
[lldb] Speed up evaluating breakpoint conditions by using DIL (#224740)
The goal of this patch is to speed up the evaluation of breakpoint
conditions. Similar to how UserExpression is used to evaluate the
condition expression, DIL lexes and parses the expression once, and then
only evaluates the AST tree on every breakpoint location hit. If DIL
fails at any step, the evaluation falls back to UserExpression, and DIL
doesn't make any new attempts on subsequent breakpoint hits. The
breakpoint default evaluation mode (DIL, UserExpression or DWIM) can be
changed by `target.breakpoints-condition-mode` setting. The mode can
also be changed separately for a specific breakpoint via command line
option `-Z (--condition-mode)` or by SB API
`SBBreakpoint::SetConditionMode`.
Commit: aecdab8027a023de337992d47c4e9a8bb768beba
https://github.com/llvm/llvm-project/commit/aecdab8027a023de337992d47c4e9a8bb768beba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-sext-dead-eflags.ll
Log Message:
-----------
X86: Mark EFLAGS dead on the NEG8r for sext from i1 in fast isel (#227058)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8959ec064109a202c05cf0e1751cc953a7634f63
https://github.com/llvm/llvm-project/commit/8959ec064109a202c05cf0e1751cc953a7634f63
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/test/wasm/dylink.s
M lld/test/wasm/emit-relocs.s
M lld/test/wasm/locals-duplicate.test
M lld/test/wasm/lto/relocatable-undefined.ll
M lld/test/wasm/pie.s
M lld/test/wasm/relocatable.ll
M lld/test/wasm/rpath.s
M lld/test/wasm/shared-needed.s
M lld/test/wasm/shared-weak-undefined.s
M lld/test/wasm/shared.s
M lld/test/wasm/shared64.s
M lld/test/wasm/signature-mismatch-relocatable.s
M lld/test/wasm/signature-mismatch.s
M lld/test/wasm/stack-pointer.s
M lld/test/wasm/tls-export.s
M lld/test/wasm/weak-alias.s
M lld/wasm/InputFiles.cpp
M lld/wasm/SyntheticSections.cpp
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/test/CodeGen/WebAssembly/profile.ll
M llvm/test/MC/WebAssembly/assembler-binary.ll
M llvm/test/MC/WebAssembly/call-indirect-relocs.s
M llvm/test/MC/WebAssembly/comdat.ll
M llvm/test/MC/WebAssembly/common.s
M llvm/test/MC/WebAssembly/custom-sections.ll
M llvm/test/MC/WebAssembly/data-section.s
M llvm/test/MC/WebAssembly/debug-info.ll
M llvm/test/MC/WebAssembly/debug-info64.ll
M llvm/test/MC/WebAssembly/export-name.s
M llvm/test/MC/WebAssembly/function-sections.ll
M llvm/test/MC/WebAssembly/global-ctor-dtor.ll
M llvm/test/MC/WebAssembly/globals.s
M llvm/test/MC/WebAssembly/init-array-label.s
M llvm/test/MC/WebAssembly/init-array.s
M llvm/test/MC/WebAssembly/reloc-pic.s
M llvm/test/MC/WebAssembly/reloc-pic64.s
M llvm/test/MC/WebAssembly/tables.s
M llvm/test/MC/WebAssembly/tag-section.s
M llvm/test/MC/WebAssembly/tls.s
M llvm/test/MC/WebAssembly/tls64.s
M llvm/test/MC/WebAssembly/type-index.s
M llvm/test/MC/WebAssembly/unnamed-data.ll
M llvm/test/MC/WebAssembly/wasm64.s
M llvm/test/MC/WebAssembly/weak-alias.s
M llvm/test/ObjectYAML/wasm/dylink_section.yaml
M llvm/test/ObjectYAML/wasm/linking_section.yaml
M llvm/tools/obj2yaml/wasm2yaml.cpp
Log Message:
-----------
[WebAssembly] Add target architecture to object file format (#225979)
Store the target architecture string (`wasm32` or `wasm64`) in a new
`WASM_TARGET_ARCH` subsection in the `linking` custom section and in a
new `WASM_DYLINK_TARGET_ARCH` subsection in the `dylink.0` custom
section.
Previously, architecture detection for object files and shared libraries
relied on heuristics (such as whether memory64 was imported/defined or
presence of 64-bit relocations). For modules that do not access memory,
this resulted in wasm64 objects/shared libraries being incorrectly
detected as wasm32.
With this change:
- `WasmObjectWriter` emits the `WASM_TARGET_ARCH` subsection in
`linking`.
- `wasm-ld` emits `WASM_DYLINK_TARGET_ARCH` when generating shared
libraries and `WASM_TARGET_ARCH` when generating relocatable output
(`-r`).
- `WasmObjectFile::getArch()` checks these subsections first before
falling back to the `HasMemory64` heuristic.
- `SharedFile` in `lld` now checks the object architecture via
`checkArch()`.
- Added support to `obj2yaml` and `yaml2obj`.
Fixes: #98778
Commit: 156ba8d3015afb36aa16831dfcac1ea229db85aa
https://github.com/llvm/llvm-project/commit/156ba8d3015afb36aa16831dfcac1ea229db85aa
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/test/CodeGen/AArch64/ldexp.ll
M llvm/test/CodeGen/X86/ldexp-avx512.ll
M llvm/test/CodeGen/X86/ldexp.ll
Log Message:
-----------
[SelectionDAG] Fix crash scalarizing `FLDEXP` with a legal `<1 x i1>` exponent (#224809)
Fixes #219695
When the result of an `FLDEXP` node is scalarized, we went through the
generic `ScalarizeVecRes_BinOp` handler, which asks for the scalarized
form of both operands. That only works when both operands share the
result's type action. `ldexp` is not a true binop: its exponent has its
own integer vector type, and under AVX-512 `<1 x i1>` is a legal mask
type. It was never scalarized, so it never made it into the table, and
the lookup hit `TableId should be non-zero`. It isn't specific to i1
either: on AArch64, `ldexp <1 x half>, <1 x i32>` hits the same assert
because `v1f16` is scalarized while `v1i32` is widened.
`FLDEXP` now has its own scalarization handler. The FP operand is
scalarized as before, while the exponent is legalized according to its
own type action: its scalarized value is used when one exists, otherwise
the single element is extracted from the vector. This is the same
approach `ScalarizeVecRes_UnaryOp` and `ScalarizeVecRes_SETCC` already
take for operands that don't need scalarizing, and mirrors what
`SplitVecRes_FPOp_MultiType` does for the split case.
Commit: 374c5e71b89783a84693140f9e69536e748b1f3f
https://github.com/llvm/llvm-project/commit/374c5e71b89783a84693140f9e69536e748b1f3f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-subtree-schedule-operands.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regression after disabling scheduling of instructions, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227080
Commit: d3429a751155c803e03fa4521ffe42c4868bfe7c
https://github.com/llvm/llvm-project/commit/d3429a751155c803e03fa4521ffe42c4868bfe7c
Author: Yian Su <yiansu.developer at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-thread-private-storage-remark.mlir
Log Message:
-----------
[mlir][openacc] Update remark for privates (#227074)
Update the "thread-private" term to use "Local memory or registers" for
privates remark printing.
Co-authored-by: Yian Su <yians at nvidia.com>
Commit: 0408ea5cf54710e0db1b2492b1fbb03d4c0f5268
https://github.com/llvm/llvm-project/commit/0408ea5cf54710e0db1b2492b1fbb03d4c0f5268
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FastISel.cpp
A llvm/test/CodeGen/X86/fast-isel-shift.ll
Log Message:
-----------
X86: Mark the EFLAGS def of FastISel selected shifts dead (#227060)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3f10d989c803cc2bbc4e0a1a741eb9408979b19b
https://github.com/llvm/llvm-project/commit/3f10d989c803cc2bbc4e0a1a741eb9408979b19b
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
Log Message:
-----------
[InstCombine][NFC] Use uint64_t for ExtractIdx in vector_extract fold (#225156)
## Summary
This changes `ExtractIdx` from `unsigned` to `uint64_t` in the
`Intrinsic::vector_extract` case.
unsigned ExtractIdx = cast<ConstantInt>(Idx)->getZExtValue();
`ExtractIdx` is initialized from the extract index operand via
`getZExtValue()` , which returns `uint64_t`. In the
`get_active_lane_mask` sub-case, it is scaled and compared against the
mask's upper bound:
if (ExtractIdx * ScaleFactor >= ALMUpperBound->getZExtValue())
Here `ALMUpperBound->getZExtValue()` returns `uint64_t`, and
`ScaleFactor` is `unsigned`.
With `ExtractIdx` declared `unsigned`, the value from `getZExtValue()`
is truncated to 32 bits, and the product `ExtractIdx * ScaleFactor` is
computed in 32 bits before being widened to compare against the
`uint64_t` right-hand side. Declaring `ExtractIdx` as `uint64_t` removes
the truncation and performs the comparison in the same width as the RHS.
Assisted by: Cline
---------
Co-authored-by: Ahmed Radwan <ahradwan at amd.com>
Commit: c8ae6e04d629ee08b74248155143698e0e31e6d5
https://github.com/llvm/llvm-project/commit/c8ae6e04d629ee08b74248155143698e0e31e6d5
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/lcssa-phi-extract-scale.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/trimmed-subtree-schedule-operands.ll
Log Message:
-----------
[SLP]Schedule instructions with calculated deps after trimming
Cancelling the bundles of the trimmed nodes clears all the dependencies
in the scheduling region, but they are recalculated only for the
remaining bundles, the trimmed scalars and their users. The
instructions, whose dependencies were calculated earlier (e.g. for the
bundles, failed to be scheduled), are not scheduled anymore and are
moved above all the scheduled instructions, breaking the original order.
Recalculate the dependencies for all such instructions.
Fixes the regression, reported in
https://github.com/llvm/llvm-project/pull/226268#issuecomment-5872192154
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227083
Commit: f2b0119d0bb724ab31124ed84a51d36eb5fe1857
https://github.com/llvm/llvm-project/commit/f2b0119d0bb724ab31124ed84a51d36eb5fe1857
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/dereferenceable-declaration.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/dropped_debug_info_assert.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-assert-align.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-abi-attribute-hints.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-implicit-args.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-return-values.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-sret.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-indirect-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-sibling-call.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-call.ll
M llvm/test/CodeGen/AMDGPU/call-c-function.ll
M llvm/test/CodeGen/AMDGPU/call-defs-mode-register.ll
M llvm/test/CodeGen/AMDGPU/irtranslator-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/isel-amdgpu-cs-chain-cc.ll
M llvm/test/CodeGen/AMDGPU/isel-whole-wave-functions.ll
M llvm/test/CodeGen/AMDGPU/mmra.ll
Log Message:
-----------
AMDGPU: Mark the return address def of SI_CALL dead (#227062)
The call writes the return address but nothing in the local function
reads the new value. Avoid needing to recover the dead flag later.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: b9c1e19ac6d105ccd98db107716f27e96695625d
https://github.com/llvm/llvm-project/commit/b9c1e19ac6d105ccd98db107716f27e96695625d
Author: Kunal Pathak <kunalspathak at hotmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopIdiomVectorize.cpp
A llvm/test/Transforms/LoopIdiom/AArch64/find-first-byte-nested.ll
Log Message:
-----------
[LoopIdiomVectorize] Don't add the match-index block to the parent loop when it exits (#225576)
`expandFindFirstByte` unconditionally adds BB4, the block that computes
the index of the match, to the parent loop. BB4 branches only to
ExitSucc. When the `find_first_of` idiom is nested inside another loop,
and a match exits that enclosing loop, BB4 always leaves the parent loop
and so is not part of it. `LoopInfo` is then inconsistent, and
`LoopBase::verifyLoop()` fails with `"Loop block has no in-loop
successors!"`.
A release build compiles that check out. It instead crashes later, in a
pass that consumes the stale analysis. IndVarSimplify is the one seen in
practice.
Only add BB4 to the parent loop when the parent loop contains ExitSucc.
The sibling `expandFindMismatch` is unaffected, because its success path
lands in a block split out of the preheader, which is inside the parent
loop already.
This is a regression from #101976. It reproduces from 21.1.0 through
main. It needs `+sve2` in practice, because the expansion is gated on
the cost of `llvm.experimental.vector.match`.
Fixes: https://github.com/llvm/llvm-project/issues/225571
Assisted-by: GPT-5.6
Commit: 2f5fba5abf122845eef6c485fed67bd5de1e2d11
https://github.com/llvm/llvm-project/commit/2f5fba5abf122845eef6c485fed67bd5de1e2d11
Author: janr-bay <jrehders at baylibre.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBlockPlacement.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/MVETailPredUtils.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
Log Message:
-----------
[ARM] Replace uses of ARM::NoRegister with Register() or isValid() NFC (#224083)
Same as https://github.com/llvm/llvm-project/pull/220227 but for the ARM
backend. This replaces remaining uses of ARM::NoRegister and unsigned
with the Register class in lib/Target/ARM.
Commit: 194c292ff93cf82be3064c94d405b9171d776164
https://github.com/llvm/llvm-project/commit/194c292ff93cf82be3064c94d405b9171d776164
Author: nvptm <pmathew at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/Transforms/Passes.td
M mlir/lib/Dialect/OpenACC/Transforms/ACCBindRoutine.cpp
A mlir/test/Dialect/OpenACC/acc-bind-routine-missing-materialization.mlir
M mlir/test/Dialect/OpenACC/acc-bind-routine.mlir
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-bound-routine-call.mlir
A mlir/test/Dialect/OpenACC/acc-materialize-routine-bind-targets-invalid.mlir
Log Message:
-----------
[mlir][OpenACC] Materialize routine bind targets before parallel call rewriting. (#227035)
Separate string-bound OpenACC routine target materialization from call
rewriting.
Add a module-level pass that creates declarations for string-bound
routine targets before the existing per-function ACCBindRoutine pass
rewrites calls. Run the new pass once on the outer module and once on
each GPU module. Remove declaration creation from ACCBindRoutine.
Extend coverage with two outer-module callers and two GPU callers that
reference the same bound routine, a GPU-module-local routine case, and
negative tests for missing materialization and invalid pass placement.
Update the pipeline test to verify ordering in both outer-module and
GPU-module pipelines.
Commit: e5b60e5dfcce8f985296a512a74386b722572b8a
https://github.com/llvm/llvm-project/commit/e5b60e5dfcce8f985296a512a74386b722572b8a
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
Log Message:
-----------
[SDPatternMatch] Make m_SetCC work like m_ICmp from IR PatternMatch. (#226623)
The condition code is stored an operand, but we don't need to expose
that to the interface.
This adds 2 signatures of m_Setcc, one that takes 2 operands and matches
any condition code and one that takes the matched condition code by
reference. For m_SpecificCondCode cases, I've added m_SpecificSetCC.
Similar changes have been applied to m_SelectCC and m_SelectCCLike.
Out of tree targets will need to update to the new interface.
Assisted-by: Claude
Commit: 57012c694b24252493e0274c69e0d6471adfd337
https://github.com/llvm/llvm-project/commit/57012c694b24252493e0274c69e0d6471adfd337
Author: Jan Leyonberg <jan_sjodin at yahoo.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
Log Message:
-----------
[CIR] Fix order of creation so that lit test will not fail (#226706)
This patch fixes the order of creation, otherwise the compiler may
evaluate one before the other and the lit test fail.
Commit: 844f9339a276cf18b7aac38c89f02a0d42e2339b
https://github.com/llvm/llvm-project/commit/844f9339a276cf18b7aac38c89f02a0d42e2339b
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/pwd.yaml
M libc/src/__support/pwd/flat_file_db.h
M libc/src/pwd/CMakeLists.txt
A libc/src/pwd/getpwent_r.cpp
A libc/src/pwd/getpwent_r.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/test/src/pwd/CMakeLists.txt
A libc/test/src/pwd/getpwent_r_test.cpp
Log Message:
-----------
[libc] Add getpwent_r entrypoint (#226966)
Add the reentrant password database iteration entrypoint getpwent_r.
getpwent_r reads the next password database record from the stream into
the caller-supplied struct passwd and buffer, returning 0 on success,
ENOENT at end-of-file, or an error number (such as ERANGE) on failure.
When a record exceeds the caller buffer size, FlatFileDatabase::getnext
rewinds the stream to the beginning of that record so that a subsequent
retry with a larger buffer reads the same entry.
* Add getpwent_r entrypoint and pwd::read_next fixed-buffer overload
* Rewind stream on ERANGE in FlatFileDatabase::getnext(EntryType *,
span<char>)
* Define getpwent_r in include/pwd.yaml and Linux entrypoints.txt
* Add unit tests for getpwent_r
Assisted-by: Automated tooling, human reviewed.
Commit: d66a1931ed18ee715090b87fc778e619ec8e2a42
https://github.com/llvm/llvm-project/commit/d66a1931ed18ee715090b87fc778e619ec8e2a42
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/test/CIR/CodeGen/atomic.c
Log Message:
-----------
[CIR] Correct 2 lowering bugs of atomic cmp-xchng builtins (#227054)
This patch fixese two bugs that showed up in a benchmark.
First; convertToAtomicIntPointer was zero-filling the source object
directly, rather than the temporary. The result was that anything that
would not be overwritten thanks to the power-of-2 write, would be
incorrect, and corrupted.
Second; emitAtomicCmpXchg didn't set the 'old' value back into the real
object. This ends up doing an additional argument on this function that
better matches classic-codegen.
Commit: 620ad7e90ade5051e34410496ab2a241223d28a6
https://github.com/llvm/llvm-project/commit/620ad7e90ade5051e34410496ab2a241223d28a6
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCasts.cpp
M llvm/test/Transforms/InstCombine/truncating-saturate.ll
Log Message:
-----------
[InstCombine] Match swapped form of truncating saturation clamp (#226614)
Extend the fold added in #189703 to also handle the inverted select:
trunc (select (icmp ugt A, DestTy_umax), sext(icmp sgt A, 0), A) -->
trunc (smin (smax (0, A), DestTy_umax))
InstCombine canonicalizes (A & NegPow2) != 0 into the ult form with
swapped select operands, but if SCCP first rewrites the compare as
icmp uge A, C, InstCombine only turns it into icmp ugt and never swaps
the select, so the original fold is missed.
While here, match the compare constant with m_APInt instead of
m_Constant + getUniqueInteger, and build TruncatedMax directly with
APInt::getLowBitsSet. Comparing the constant against TruncatedMax + 1
or TruncatedMax makes the separate zero check unnecessary.
Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>
Commit: 5ab44c4cd1e9e414eb6f9277f243a2a9c8db7048
https://github.com/llvm/llvm-project/commit/5ab44c4cd1e9e414eb6f9277f243a2a9c8db7048
Author: Mariusz Sikora <mariusz.sikora at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
A llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.scale.pk32.gfx13.ll
Log Message:
-----------
[AMDGPU] Add intrinsics and builtins for v_cvt_scale_pk32_* instructions (#222617)
Commit: 0a7dc5213f12d3acd69898efb2033f80530c785b
https://github.com/llvm/llvm-project/commit/0a7dc5213f12d3acd69898efb2033f80530c785b
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Remove CRTP from DenseMapBase (NFC) (#227063)
This patch removes CRTP from DenseMapBase by replacing DerivedT with
StorageT (DenseMapStorage or SmallDenseMapStorage).
DenseMapBase now owns the Storage member by composition and provides
the entire user-facing map interface -- from constructors, the
destructor, and operator= to find, try_emplace, and erase. DenseMap
and SmallDenseMap simply specialize DenseMapBase with their respective
storage types.
This completes the effort to replace CRTP in DenseMapBase with
composition (see #168255, #226664, and #226882).
Assisted-by: Antigravity
Commit: d8a24983fe52f8deb97eecfdad332499ac5253de
https://github.com/llvm/llvm-project/commit/d8a24983fe52f8deb97eecfdad332499ac5253de
Author: Abhay Kanhere <a_kanhere at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Verifier.h
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/test/Transforms/AtomicExpand/AMDGPU/expand-atomic-i16.ll
M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
M llvm/test/Verifier/tbaa-struct.ll
Log Message:
-----------
[Verifier] Validate !tbaa.struct metadata (#225910)
Check that !tbaa.struct operands come in (offset, size, tag) triples
with constant offset and size.
Commit: 2aa363fb173680653fa2ba913011646361abcb08
https://github.com/llvm/llvm-project/commit/2aa363fb173680653fa2ba913011646361abcb08
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
Log Message:
-----------
[VPlan] Compute edge probabilities via getEdgeProbabilitiesFromWeights. (#226981)
Use getEdgeProbabilitiesFromWeights (added in
https://github.com/llvm/llvm-project/pull/226560) to compute edge
probabilities like BFI.
This makes sure the VPlan-based logic combines weights of parallel edges
like BFI.
PR: https://github.com/llvm/llvm-project/pull/226981
Commit: 8085363c87a0eee12e40a49ee1b860aa9bc019f3
https://github.com/llvm/llvm-project/commit/8085363c87a0eee12e40a49ee1b860aa9bc019f3
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Mark shlib_global_var test unsupported for NVIDIA (#227098)
The shared library test introduced in #226980 seems to fail with NVIDIA
backend. Marking it unsupported.
Commit: bf1009b31706708886bd15fb6b3b2a4f17de03b7
https://github.com/llvm/llvm-project/commit/bf1009b31706708886bd15fb6b3b2a4f17de03b7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/Target/X86/X86FastISel.cpp
M llvm/utils/TableGen/FastISelEmitter.cpp
Log Message:
-----------
FastISel: Assert the emitted instruction defines the result (#226502)
The fallback path copied the result out of implicit_defs()[0], assuming
the first implicit physical register def is the result. That is an X86
assumption about MUL/IMUL, and it is unreachable for all but
fastEmitInst_r: FastISelEmitter skips any instruction whose first
operand is not an output register, so every opcode reaching these
helpers from generated code has an explicit def.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 16036fdccdbcc14b5ae6afb54529733bb9741b0f
https://github.com/llvm/llvm-project/commit/16036fdccdbcc14b5ae6afb54529733bb9741b0f
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/grp.yaml
M libc/src/grp/CMakeLists.txt
A libc/src/grp/getgrouplist.cpp
A libc/src/grp/getgrouplist.h
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/getgrouplist_test.cpp
Log Message:
-----------
[libc] Add getgrouplist entrypoint (#226958)
Add the getgrouplist entrypoint from <grp.h> (BSD extension), which
scans the group database to obtain the list of groups to which a user
belongs.
The base group passed by the caller is included unconditionally, and
supplementary groups for the user are gathered with duplicate group IDs
suppressed. A small-buffer-optimised container avoids heap allocations
for users belonging to up to 32 groups, falling back to dynamic
allocation when more groups are present. Note that this fallback does
not use AllocChecker because it relies on realloc to grow the buffer.
The lookup uses a scoped database stream to avoid disturbing concurrent
iteration.
Assisted-by: Automated tooling, human reviewed.
Commit: 4f92dab3bff4c09d78ac3d4567633f2604320446
https://github.com/llvm/llvm-project/commit/4f92dab3bff4c09d78ac3d4567633f2604320446
Author: Daria Sukhonina <dariasukhonina at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/docs/Tools/mlir-reduce.md
M mlir/lib/Reducer/ReductionNode.cpp
M mlir/test/mlir-reduce/reduction-tree/doc-example.mlir
A mlir/test/mlir-reduce/reduction-tree/except-last.mlir
A mlir/test/mlir-reduce/script/except-last.sh
Log Message:
-----------
[MLIR] Fix mlir-reduce splitting smallest range instead of the largest one (#214738)
The function `max_element` expects comparison lambda function to return
true if first argument is **less** than the second one, which is the
opposite to the current code.
Commit: 348d23c3b238016836d84ba30aa573ba3a39649d
https://github.com/llvm/llvm-project/commit/348d23c3b238016836d84ba30aa573ba3a39649d
Author: Nick Desaulniers <ndesaulniers at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxx/include/__chrono/convert_to_tm.h
Log Message:
-----------
[libc++][chrono] Initialize optional tm_zone member in __convert_to_tm (#220068)
Defensively initialize `struct tm`'s optional `tm_zone` member in
`__convert_to_tm` before passing it to `strftime` or `time_put`.
`tm_zone` is a BSD extension standardized in POSIX.1-2024, but is not
part
of standard C or C++ (and is absent on Windows). Instead of guarding
with
`#ifdef __GLIBC__`, use `if constexpr (requires ...)` so it is
initialized
on all platforms that provide it (such as Bionic, musl, macOS, and BSDs,
whether typed as `const char*` or `char*`).
Assisted-by: Gemini
Commit: 8d752fbc26fe62687b8005438c66e55191fb2db3
https://github.com/llvm/llvm-project/commit/8d752fbc26fe62687b8005438c66e55191fb2db3
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPCompatibilityAnalysis.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
Log Message:
-----------
[SLP][NFC]Broader use of filter/isa ranges
Most of loops of the form "for (...) { if (cond) continue; ... }"
become make_filter_range, and dyn_cast-and-skip loops become
make_isa_range.
Assisted-by: Cursor
Reviewers: bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226535
Commit: 385d0745697eb9ec81617eeaebe62bc5280cf3a0
https://github.com/llvm/llvm-project/commit/385d0745697eb9ec81617eeaebe62bc5280cf3a0
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
Log Message:
-----------
[gn build] Port 5c20fe98552a (#227114)
Commit: cdbca60c7d5f41ec7f332341f97f16e4e2e221cb
https://github.com/llvm/llvm-project/commit/cdbca60c7d5f41ec7f332341f97f16e4e2e221cb
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXTargetTransformInfo.h
M llvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
M llvm/test/CodeGen/NVPTX/forward-ld-param.ll
A llvm/test/CodeGen/NVPTX/infer-volatile-address-spaces.ll
M llvm/test/CodeGen/NVPTX/local-stack-frame.ll
M llvm/test/CodeGen/NVPTX/lower-byval-args.ll
A llvm/test/Transforms/InferAddressSpaces/NVPTX/volatile.ll
Log Message:
-----------
[InferAddressSpaces] Check volatile support in the destination AS (#224702)
Perviously we nonsensically checked the old address space...
Avoid introducing a regression by adding ADDRESS_SPACE_SHARED_CLUSTER to
NVPTX hasVolatileVariant.
Commit: dc306a24fefef0e3cbde890bc25e30d4b753498f
https://github.com/llvm/llvm-project/commit/dc306a24fefef0e3cbde890bc25e30d4b753498f
Author: Farzon Lotfi <farzonlotfi at microsoft.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
Log Message:
-----------
[HLSL] Build elementwise cast results from poison (#225591)
I noticed this unnecessary alloca while doing this pr:
https://github.com/llvm/llvm-project/pull/225519
The change is to initialize vector and matrix elementwise cast results
with poison instead of loading uninitialized temporary storage.
We do this because every result element is overwritten before use,
making the temporary allocation and load unnecessary.
Commit: c5f99a117bd799b43cd26880a9dccb96b33767ff
https://github.com/llvm/llvm-project/commit/c5f99a117bd799b43cd26880a9dccb96b33767ff
Author: Borys Perski <borys.perski at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/CodeGen/X86/sse41-builtins-constrained.c
M clang/test/CodeGen/X86/sse41-builtins.c
Log Message:
-----------
[clang][X86] Fix round builtins tests (#226708)
Fixed minor issues in round builtins tests. Noticed them while working on #215787.
Commit: a69848d73eb5134b86c56ed9937b6a91d84472f9
https://github.com/llvm/llvm-project/commit/a69848d73eb5134b86c56ed9937b6a91d84472f9
Author: Mircea Trofin <mtrofin at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[profcheck] Exclude find-first-byte-nested.ll (#227121)
We only fixed x86 for LoopIdiom. PR #225576 added a test that looks like
it's just exposing existing propagation issues.
Commit: 285a8656517a05596a91a8f104c9c6b592b8e144
https://github.com/llvm/llvm-project/commit/285a8656517a05596a91a8f104c9c6b592b8e144
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/build/BUILD.gn
M llvm/utils/gn/build/BUILDCONFIG.gn
M llvm/utils/gn/secondary/clang/tools/clang-repl/BUILD.gn
M llvm/utils/gn/secondary/clang/unittests/Interpreter/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llc/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/lli/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/llvm-jitlink/BUILD.gn
M llvm/utils/gn/secondary/llvm/tools/opt/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/CodeGen/CGPluginTest/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/Orc/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Passes/Plugins/BUILD.gn
M llvm/utils/gn/secondary/llvm/unittests/Support/DynamicLibrary/BUILD.gn
M llvm/utils/gn/secondary/third-party/unittest/unittest.gni
Log Message:
-----------
[gn] Build executables without exported symbols on macOS (#227120)
Speeds up `clang --version` from 12 ms to 4 ms on my system. 8 ms faster
startup isn't a lot, but there's also no reason not to do it.
No intended behavior change.
Commit: a8debc5a8610b955b2756ea349630a00724450bc
https://github.com/llvm/llvm-project/commit/a8debc5a8610b955b2756ea349630a00724450bc
Author: Jeremy Kun <jkun at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Target/Cpp/CppEmitter.h
Log Message:
-----------
Add registerToCppTranslation to CppEmmitter.h (#226337)
Currently if one wants to register `mlir-to-cpp` out of tree, they must
include `mlir/InitAllTranslations.h` and depend transitively on all
translation targets (in bazel, `@llvm-project//mlir:AllTranslations`).
This change adds the registration declaration to `CppEmitter.h` so that
one can depend just on the `MLIRTargetCpp` target (or
`@llvm-project//mlir:TargetCpp` in bazel).
This matches the organization of the SMTLib codegen registration in
`mlir/include/mlir/Target/SMTLIB/ExportSMTLIB.h` (though some other
targets like `IRDLToCpp` do it differently).
Commit: 6ab3be2e5efa370c8ca539b1f5a312d7e9b2fb65
https://github.com/llvm/llvm-project/commit/6ab3be2e5efa370c8ca539b1f5a312d7e9b2fb65
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/build/mac_sdk.gni
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: 4ca8a56ba3c579c01c3a9e30c6b972b8baaad208
https://github.com/llvm/llvm-project/commit/4ca8a56ba3c579c01c3a9e30c6b972b8baaad208
Author: Hugo Melder <service at hugomelder.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGObjCRuntime.cpp
A clang/test/CodeGenObjC/exceptions-seh.m
Log Message:
-----------
[ObjC][SEH] Fix clang crash when using finally statements (#176779)
When targeting a platform that does not have funclet-based EH, we push
the finally cleanup (normal edge) and catchall (unwind edge) onto the
EHStack _before_ pushing all catch handlers. The try statement is then
emitted and catch handlers popped from EHStack. Last, the finally
cleanup is popped from EHStack.
For funclet-based EH, we outline and push the finally funclet (of type
`NormalAndEHCleanup`) onto the EHStack _after_ pushing the catch
handlers and never pop it. This results in a crash during codegen when
we try to emit the catch handlers. Not popping the finally cleanup from
the EHStack results in incorrect calls to cleanup handlers in nested
try/catch/finally statements.
I fixed the two issues by:
1. Pushing the finally cleanup first, and
2. Popping it at the end of `CGObjCRuntime::EmitTryCatchStmt`.
Fixes #51899
Commit: c021bb407f8eb2e3dac57cae5760a258a4564f5c
https://github.com/llvm/llvm-project/commit/c021bb407f8eb2e3dac57cae5760a258a4564f5c
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[gn] bump deployment target to macOS 13 (#227124)
macOS 13 is four years old by now.
This has the effect that lld starts defaulting to chained fixups with
this. Chained fixups reduces `clang --version` from 4 ms to 3.2 ms. (Not
that it matters.)
(Without #227120, chained fixups reduce `clang --version` from 12.5 ms
to 10.9 ms.)
No behavior change.
Commit: c87ad07c33661ca39ec512c834d01f17375673f4
https://github.com/llvm/llvm-project/commit/c87ad07c33661ca39ec512c834d01f17375673f4
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPMemoryUtils.cpp
Log Message:
-----------
[SLP][NFC]Fix build for MSVC compiler, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/46/builds/42017
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227129
Commit: 64907b6d3201f1755a149d029b3a65c4e0ee663f
https://github.com/llvm/llvm-project/commit/64907b6d3201f1755a149d029b3a65c4e0ee663f
Author: Joel Dice <joel.dice at akamai.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M libcxxabi/src/cxa_personality.cpp
M libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/test/CodeGen/WebAssembly/eh-lsda.ll
M llvm/test/CodeGen/WebAssembly/exception-legacy.ll
M llvm/test/CodeGen/WebAssembly/exception.ll
M llvm/test/CodeGen/WebAssembly/wasm-eh-prepare.ll
Log Message:
-----------
fix Wasm exceptions + coop threading + shared libraries (#222747)
Prior to this commit, the combination of Wasm exception handling,
cooperative multithreading, and shared libraries was broken.
Specifically, the code generation in `WasmEHPrepare.cpp` involved
direct, cross-library access to `libunwind.so`'s thread-local
`__wasm_lpad_context` variable. However, the ABI used for cooperative
multithreading does not support cross-library access to thread-local
variables.
The solution used here is to add a new `_Unwind_GetWasmLPadContext`
function to `libunwind.so` and use that to get address of the
`__wasm_lpad_context` for the current thread, both in the code generated
by `WasmEHPrepare.cpp` and in the `__gxx_wasm_personality_v0` function
defined in `cxa_personality.cpp`. I've used this strategy
unconditionally for all targets, regardless of whether cooperative
multithreading and/or position-independent are enabled. If desired (e.g.
for performance or code complexity reasons), I could make it conditional
on both of those features being enabled and fall back to using
`__wasm_lpad_context` directly otherwise.
Co-authored-by: Derek Schuff <dschuff at chromium.org>
Commit: c6b15d38928d586064932c3cc26d8c777e104196
https://github.com/llvm/llvm-project/commit/c6b15d38928d586064932c3cc26d8c777e104196
Author: Sam Clegg <sbc at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/wasm/InputFiles.cpp
Log Message:
-----------
[lld][WebAssembly] Fix error message when linking wasm64 file with -mwasm32 (#227091)
When `-mwasm32` is explicitly passed and a wasm64 object file is linked,
the error message previously stated:
"wasm32 object file can't be linked in wasm64 mode". Fix this to report
that the wasm64 object file cannot be linked in wasm32 mode.
Commit: 60f717946cb5ca911b6be22169b9bd646225c59f
https://github.com/llvm/llvm-project/commit/60f717946cb5ca911b6be22169b9bd646225c59f
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[libc++] Move test tools CI job back to k8s runner sets (#226564)
While the issue with k8s runners in #226230 is still not resolved, it is
better to target the k8s runners and get transient failures than to
target the old runners and have the jobs hang forever (there seems to be
no runners registered in llvm-premerge-libcxx-runners).
Co-authored-by: Aiden Grossman <aidengrossman at google.com>
Commit: 6fee55d8425e735e652968007ee0d6bc35aa6f26
https://github.com/llvm/llvm-project/commit/6fee55d8425e735e652968007ee0d6bc35aa6f26
Author: Ron Green [NVIDIA] <rogreen at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Support/Fortran-features.h
M flang/lib/Semantics/check-declarations.cpp
A flang/test/Semantics/bind-c20.f90
A flang/test/Semantics/bind-c21.f90
Log Message:
-----------
[flang][Semantics] Warn on BIND(C) interfaces with assumed-shape/rank dummies (#225965)
## Motivation
Fortran 2018 §18.3.6 requires assumed-shape, deferred-shape, and
assumed-rank `BIND(C)` dummy arguments to be passed using a CFI
descriptor (`CFI_cdesc_t`). Some existing C/C++ interfaces predate this
requirement and expect such an argument to be passed by bare address
instead. Declaring a `BIND(C)` Fortran interface against such code
currently produces a silent calling-convention mismatch — no diagnostic
warns the user that the ABI they've declared doesn't match what
pre-2018 C/C++ code expects.
## What this PR does
Adds a portability warning in `CheckSubprogram`
(`flang/lib/Semantics/check-declarations.cpp`) that fires when a
`BIND(C)` interface declares an assumed-shape or assumed-rank dummy
argument, under a new `UsageWarning` category, `BindCArrayDescriptor`.
The warning is **off by default** and enabled by `-pedantic` (or
individually via `-Wbind-c-array-descriptor`), matching the existing
precedent set by other portability-only categories in the same enum
(e.g. `CharacterInteroperability`, `LogicalVsCBool`).
To avoid firing on compiler-provided runtime libraries that
legitimately dispatch through CFI-descriptor-consuming `BIND(C)`
wrappers (e.g. an OpenACC runtime module's internal specific procedures
for generic entry points like `acc_copyin`), the warning is suppressed
when the `BIND(C)` binding name — explicit or the implicit default —
starts with `_`, which marks an implementation-internal interface
rather than genuine external interoperability.
This is a **pure diagnostic** — no lowering, `LoweringOptions`, or
codegen changes of any kind. It does not alter how any argument is
actually passed.
## Test plan
- `flang/test/Semantics/bind-c20.f90`: assumed-shape and assumed-rank
dummies warn under `-pedantic` (both default and explicit `BIND(C)
NAME=`); explicit-shape dummies and a leading-underscore binding name
do not.
- `flang/test/Semantics/bind-c21.f90`: the same
assumed-shape/assumed-rank
interfaces produce no diagnostic without `-pedantic`.
- Existing `flang/test/Semantics` and `flang/test/Lower/HLFIR` lit
suites
(1752 tests) pass.
- Verified no false positives against real OpenACC (`use openacc`,
`-acc=gpu`) and CUDA Fortran (`use cudafor`, `-cuda`) runtime API
calls, plus a static scan of all `cu*.mod` runtime interface modules
confirming none use the assumed-shape/rank `BIND(C)` pattern this
warning targets outside the excluded underscore-prefixed convention.
- Full `precommit.py` regression run found zero regressions
attributable to this change (all observed failures traced to an
unrelated, pre-existing upstream crash, confirmed via an A/B control
build with this change fully reverted).
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: f95e5ea5a5eb719e05754de235aaba8e20e6a36b
https://github.com/llvm/llvm-project/commit/f95e5ea5a5eb719e05754de235aaba8e20e6a36b
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/clang/include/clang/Config/BUILD.gn
Log Message:
-----------
[gn] Fix Interpreter/emulated-tls.cpp on mac (#227132)
In, #225475 (5dfe8605911e), CLANG_HAVE_EMUTLS_GET_ADDRESS got hardcoded
to 0 in the GN build, while the CMake build has a config-time check for
__emutls_get_address.
On mac and linux, compiler-rt provides that symbol, so set
CLANG_HAVE_EMUTLS_GET_ADDRESS to 1 there. That way, __emutls_get_address
is force-linked as absolute symbol and things are happy.
(With it set to 0. clang-repl dlsym()s for the symbol, which works on
Linux where it's found in libgcc_s.so.1, but it doesn't work on mac.)
Commit: 9f009662f3fba1d8955e5e79261c60c2f98d24b6
https://github.com/llvm/llvm-project/commit/9f009662f3fba1d8955e5e79261c60c2f98d24b6
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCCGAttributes.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsCG.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCComputeLowering.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsCG.cpp
M mlir/test/Dialect/OpenACC/acc-compute-lowering-loop.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCUtilsCGTest.cpp
Log Message:
-----------
[mlir][OpenACC] Record gang(static:) chunk size on lowered loops (#227037)
Lower OpenACC `gang(static:)` through compute lowering as
`acc.chunk_size`. A constant size is stored directly; `static:*` and a
non-constant size are recorded as -1. `gang(static:)` also maps to gang
dimension 1.
Commit: bc1a55167c5b0c32a755ce51597bd35a9db85660
https://github.com/llvm/llvm-project/commit/bc1a55167c5b0c32a755ce51597bd35a9db85660
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
M llvm/lib/Target/NVPTX/NVPTXUtilities.h
M llvm/test/CodeGen/NVPTX/call_bitcast_byval.ll
M llvm/test/CodeGen/NVPTX/callchain.ll
M llvm/test/CodeGen/NVPTX/empty-type.ll
A llvm/test/CodeGen/NVPTX/fp-global.ll
M llvm/test/CodeGen/NVPTX/i1-param.ll
M llvm/test/CodeGen/NVPTX/managed.ll
M llvm/test/CodeGen/NVPTX/noreturn.ll
A llvm/test/CodeGen/NVPTX/odd-integer-width.ll
M llvm/test/CodeGen/NVPTX/param-align.ll
A llvm/test/CodeGen/NVPTX/ptr-global.ll
M llvm/test/CodeGen/NVPTX/vector-global.ll
M llvm/test/DebugInfo/NVPTX/debug-info.ll
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: 5b3ae0006a69c8a6c3cb8c1dddf3556f413aa037
https://github.com/llvm/llvm-project/commit/5b3ae0006a69c8a6c3cb8c1dddf3556f413aa037
Author: Alex MacLean <amaclean at nvidia.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[NVPTX] Consolidate AsmPrinter type and global variable printing (#222240)
Commit: 1637562456ab8561fa2602a438604cac3ddf4bd0
https://github.com/llvm/llvm-project/commit/1637562456ab8561fa2602a438604cac3ddf4bd0
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPShuffleAnalysis.h
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: e59523e9a9dece16edb17341ee14ade7be8753a9
https://github.com/llvm/llvm-project/commit/e59523e9a9dece16edb17341ee14ade7be8753a9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
Log Message:
-----------
[SLP][NFC]Fix GCC 7 ICE and unused binding warnings, NFC
Reported in https://lab.llvm.org/buildbot/#/builders/116/builds/31627
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/227151
Commit: f85fe6efc523b4f9d2ecb11ccaeefef49ab5e6f3
https://github.com/llvm/llvm-project/commit/f85fe6efc523b4f9d2ecb11ccaeefef49ab5e6f3
Author: Ian Anderson <iana at apple.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/test/Driver/Inputs/MacOSX15.0.sdk/SDKSettings.json
M clang/test/Driver/Inputs/MacOSX15.1.sdk/SDKSettings.json
M clang/test/Driver/modulemap-allow-subdirectory-search.c
M clang/test/InstallAPI/Inputs/MacOSX13.0.sdk/SDKSettings.json
Log Message:
-----------
[NFC][darwin][test] Fix the hand spacing in the SDKSettings files (#227133)
I hand spaced the VersionMap keys in the SDKSettings files to make it
easier to see where the gaps are where a version of Xcode updated one
SDK but not the other. I almost got them all right, but mis-spaced one
in macOS_iOSMac.
Commit: d718391361333d378a5bce643bbdef553f81c203
https://github.com/llvm/llvm-project/commit/d718391361333d378a5bce643bbdef553f81c203
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/lib/Semantics/check-acc-structure.cpp
M flang/lib/Semantics/check-acc-structure.h
A flang/test/Semantics/OpenACC/acc-routine-loop-nesting.f90
Log Message:
-----------
[flang][acc] Warn when a loop is above its routine parallelism level (#227041)
OpenACC spec allows a routine to parent a loop at its own parallelism
level or below. A higher level is not allowed: gang inside a worker
routine, gang or worker inside a vector routine, gang, worker, or vector
inside a seq routine, and a gang dimension above the routine's gang
dimension. A device-specific routine clause counts the same way.
Flang accepted these loops with no diagnostic. Warn that the clause is
ignored. A loop at the same level or below is left alone, and illegal
nesting of loops remains an error.
Commit: fbac8e1ff3b8b733183e677f49be73ab2210d7df
https://github.com/llvm/llvm-project/commit/fbac8e1ff3b8b733183e677f49be73ab2210d7df
Author: Akhil Goel <akhil.goel at intel.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow G_SMIN/G_SMAX operands and mask sign sensitive results (#226957)
This PR includes `G_SMIN` and `G_SMAX` to the list of sign sensitive
ops. It also masks the result of the sign sensitive ops to their
original widths with a bitwise AND because the later users assume the
upper bits are zero and without masking they read the wrong value.
Commit: 0ec4a7fe84cde933c044dafdcf5cfd983f7d086c
https://github.com/llvm/llvm-project/commit/0ec4a7fe84cde933c044dafdcf5cfd983f7d086c
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
Log Message:
-----------
[lldb/test] Normalize appletvos to tvos in getPlatform() (#227138)
Mirror the existing `iphoneos` -> `ios` SDK-name normalization for
`tvOS`. Without it, an `--apple-sdk` value derived from "appletvos" made
`getPlatform()` return "appletvos", which isn't in
`lldbplatform.__name_lookup`, so `platformIsDarwin(`) returned `False`
and `finalize_build_dictionary` KeyError'd before any `remote-tvos` test
could build.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: c894e63329c144702bd560a8807d17b489e0484b
https://github.com/llvm/llvm-project/commit/c894e63329c144702bd560a8807d17b489e0484b
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227147)
We are seeing this issue in the libc++ runner sets and it can presumably
pop up in the libc runner sets as well in the case of an abnormally long
clone operation.
Commit: b1faf8bc3ebbbe70daaac47a5fcd49006be3709e
https://github.com/llvm/llvm-project/commit/b1faf8bc3ebbbe70daaac47a5fcd49006be3709e
Author: Med Ismail Bennani <ismail at bennani.ma>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbplatform.py
Log Message:
-----------
[lldb/test] Register xros (visionOS) as a Darwin platform (#227142)
`lldbplatform.py` never registered `xros` at all: no enum value, no
`__name_lookup` entry, and it was absent from `__darwin_embedded`/
`darwin_all`. As a result, `platformIsDarwin()` returned `False` for
`xros`, and `finalize_build_dictionary`'s fallback branch, which indexes
`platform_name_to_uname` by the raw platform name, would `KeyError`
before any visionOS test could build.
Add `xros` alongside the other embedded Darwin platforms so it's
recognized the same way `ios`/`tvos`/`watchos`/`bridgeos` already are.
Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>
Commit: 619028d062d90579edb0e80fd2c0a870f83cce84
https://github.com/llvm/llvm-project/commit/619028d062d90579edb0e80fd2c0a870f83cce84
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/lit.cfg.py
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[ProfCheck] Exclude DirectX (#227157)
I don't think anyone runs profiling on DirectX, so exclude it for now.
Also move AMDGPU to the normal exclusion list given there are efforts
around PGO for AMDGPU currently.
Commit: 7b5ec23c6053560e306fce71a4332e2b9793dd7e
https://github.com/llvm/llvm-project/commit/7b5ec23c6053560e306fce71a4332e2b9793dd7e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
R llvm/test/tools/llvm-readobj/ELF/RISCV/eflags-abi.test
A llvm/test/tools/llvm-readobj/ELF/RISCV/eflags.test
Log Message:
-----------
[RISCV][llvm-readobj] Generalize the eflags-abi test to cover all of the eflags. NFC (#227152)
Assisted-by: Claude
Commit: 78f2beb7655e19b3f5a8c55dda3f7b8b20771bed
https://github.com/llvm/llvm-project/commit/78f2beb7655e19b3f5a8c55dda3f7b8b20771bed
Author: Samarth Narang <70980689+snarang181 at users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
M mlir/lib/Conversion/SCFToControlFlow/SCFToControlFlow.cpp
M mlir/lib/Conversion/SCFToGPU/SCFToGPU.cpp
M mlir/lib/Conversion/SCFToOpenMP/SCFToOpenMP.cpp
M mlir/lib/Dialect/Async/Transforms/AsyncParallelFor.cpp
M mlir/lib/Dialect/SCF/IR/SCF.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelForToNestedFors.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopCollapsing.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopFusion.cpp
M mlir/lib/Dialect/SCF/Transforms/ParallelLoopTiling.cpp
M mlir/test/Conversion/SCFToControlFlow/convert-to-cfg.mlir
M mlir/test/Conversion/SCFToGPU/parallel_loop.mlir
A mlir/test/Conversion/SCFToOpenMP/scf-to-openmp-unsigned.mlir
M mlir/test/Dialect/Async/async-parallel-for-async-dispatch.mlir
M mlir/test/Dialect/SCF/ops.mlir
M mlir/test/Dialect/SCF/parallel-loop-fusion.mlir
M mlir/test/Dialect/SCF/parallel-loop-tiling-inbound-check.mlir
M mlir/test/Dialect/SCF/parallel-to-nested-fors.mlir
A mlir/test/Transforms/parallel-loop-collapsing-unsigned.mlir
Log Message:
-----------
[mlir][scf] Add unsignedCmp to scf.parallel and use it in the tiling in-bound check (#226130)
This change mirrors `scf.for` where `scf.parallel` gets an `unsignedCmp`
unit attribute, and every pass that rebuilds or lowers a `scf.parallel`
has to respect it:
- Propagate where a loop is rebuilt from another, such as parallel loop
tiling, parallel loop fusion (which also refuses to fuse loops of
different signedness), parallel-to-nested-fors and SCF-to-CF lowering.
- Decline where the bound arithmetic assumes signed values, such as
SCF-to-GPU, SCF-to-OpenMP, async-parallel-for and the
parallel-loop-collapsing test pass.
Fixes #223233
Commit: 9a0c255ce1efbd80ef501e8151d123876fa4b5d4
https://github.com/llvm/llvm-project/commit/9a0c255ce1efbd80ef501e8151d123876fa4b5d4
Author: Owen Rodley <orodley at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenPGO.cpp
M compiler-rt/test/profile/instrprof-thinlto-indirect-call-promotion.cpp
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/Transforms/IPO/MemProfContextDisambiguation.cpp
M llvm/lib/Transforms/Instrumentation/InstrProfiling.cpp
M llvm/lib/Transforms/Instrumentation/MemProfUse.cpp
M llvm/lib/Transforms/Instrumentation/PGOInstrumentation.cpp
M llvm/lib/Transforms/Scalar/JumpTableToSwitch.cpp
M llvm/test/Instrumentation/cgprofile.ll
M llvm/test/Transforms/JumpTableToSwitch/profile-no-guid-metadata.ll
M llvm/test/Transforms/JumpThreading/thread-prob-1.ll
M llvm/test/Transforms/PGOProfile/Inputs/cspgo_bar_sample.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_gen.ll
M llvm/test/Transforms/PGOProfile/Inputs/thinlto_cspgo_bar_use.ll
M llvm/test/Transforms/PGOProfile/icp_invoke.ll
M llvm/test/Transforms/PGOProfile/icp_invoke_nouse.ll
M llvm/test/Transforms/PGOProfile/thinlto_indirect_call_promotion.ll
M llvm/test/tools/gold/X86/Inputs/thinlto_cspgo_bar.ll
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.c
A llvm/test/tools/llvm-profdata/Inputs/guid-roundtrip.proftext
A llvm/test/tools/llvm-profdata/guid-roundtrip.test
M llvm/unittests/ProfileData/InstrProfTest.cpp
Log Message:
-----------
[InstrProf] Replace !PGOFuncName and !PGOName metadata with !guid (#214134)
!PGOFuncName and !PGOName metadata were attached to internal functions
and vtables during profile annotation to record their original
"<file>;<name>" PGO names before ThinLTO promoted and renamed them. In
post-link LTO passes, InstrProfSymtab read that metadata back so profile
records keyed by the original name's hash could still find the renamed
IR object.
Global objects now carry stable !guid metadata assigned before LTO
renaming, which records the MD5 hash of the original PGO name directly.
See: https://discourse.llvm.org/t/rfc-keep-globalvalue-guids-stable/84801
Use !guid instead of maintaining separate PGO name metadata:
- Stop emitting and reading !PGOFuncName and !PGOName in Clang and
PGOInstrumentation, and remove the metadata helper functions
(createPGOFuncNameMetadata, createPGONameMetadata,
getPGOFuncNameMetadata, and the metadata name getters).
- Unify getIRPGOFuncName(const Function &) and
getPGOName(const GlobalVariable &) into
getIRPGOObjectName(const GlobalObject &).
- In InstrProfSymtab::addFuncWithName and addVTableWithName, key each
name by its own hash as before, and also insert the object's assigned
GUID into MD5FuncMap / MD5VTableMap when it differs from the PGO name
hash. This lets lookups find functions and vtables that LTO has
renamed while preserving lookups by current, deprecated, and canonical
names.
- Remove obsolete !PGOFuncName metadata from test inputs, update the
ThinLTO ICP tests to check for !guid, and add symtab unit tests and an
llvm-profdata text/indexed round-trip test.
Assisted-by: Antigravity
Commit: eabb90030e7908fd2f15d77198c8b1e88f5463a4
https://github.com/llvm/llvm-project/commit/eabb90030e7908fd2f15d77198c8b1e88f5463a4
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU] Canonicalize constant operands of sudot intrinsics (#226478)
Move a constant multiplicand and its sign flag to the second operand.
For example:
```
sudot4(true, 1, false, x, acc, clamp)
->
sudot4(false, x, true, 1, acc, clamp)
```
Commit: f896873b4dddca59ec3c18487cf3f1cf6545df1e
https://github.com/llvm/llvm-project/commit/f896873b4dddca59ec3c18487cf3f1cf6545df1e
Author: Hongyu Chen <xxs_chy at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
Log Message:
-----------
[RISCV][P-ext] Support the missing packed pair (#226992)
This patch supports the packed pair for v2i16.
Some are inconsistent with the spec because existing shuffle-lowering
transforms them into equivalent narrowing shifts or zips.
Commit: 31d7b51dbd5a8a5e58631a3c77421209f562ea5c
https://github.com/llvm/llvm-project/commit/31d7b51dbd5a8a5e58631a3c77421209f562ea5c
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/test/AST/ByteCode/new-delete.cpp
R clang/test/SemaCXX/new-nothrow-by-value.cpp
Log Message:
-----------
[Clang] Add missing release note entry in #226753 (#227078)
As per the feedback from #226753, we add release note for GH-212211.
Also move the test to new-delete.cpp.
Assisted-by: Claude
Commit: 60ac6298c2e70aeeeac1ae388024bbe30f25784a
https://github.com/llvm/llvm-project/commit/60ac6298c2e70aeeeac1ae388024bbe30f25784a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/TailRecursionElimination.cpp
A llvm/test/Transforms/TailCallElim/return-value-select-pgo.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[TailCallElim] Add profile annotations to return value selects
Tail call elimination in some cases can create selects on possible
return values conditioned on whether or not execution is currently in
what was a recursive call. That is equal to the probability with which
we recurse, which in turn can be computed from the block frequencies of
blocks that recurse and blocks that directly return.
Reviewers: mtrofin
Reviewed By: mtrofin
Pull Request: https://github.com/llvm/llvm-project/pull/202518
Commit: dae88f2450b03f9a123cd681a7f698f67bde9ece
https://github.com/llvm/llvm-project/commit/dae88f2450b03f9a123cd681a7f698f67bde9ece
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
A clang/test/CIR/CodeGenCoroutines/coro-agg.cpp
Log Message:
-----------
[CIR] Support aggregate co_await / co_yield in AggExprEmitter (#225412)
Support evaluating `co_await` and `co_yield` expressions whose result is
an aggregate type in `AggExprEmitter`.
Fixes #225317
Commit: 3b0b6d892bdf4eecf4d6fbccf26c6d91fec2d164
https://github.com/llvm/llvm-project/commit/3b0b6d892bdf4eecf4d6fbccf26c6d91fec2d164
Author: theRonShark <ron.lieberman at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/CodeGen/CodeGenAction.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/lib/CodeGen/BackendConsumer.h
M clang/lib/CodeGen/CodeGenAction.cpp
M clang/lib/Interpreter/CMakeLists.txt
M clang/lib/Interpreter/DeviceOffload.cpp
M clang/lib/Interpreter/DeviceOffload.h
M clang/lib/Interpreter/Interpreter.cpp
M clang/unittests/Basic/CMakeLists.txt
R clang/unittests/Basic/TargetIDTest.cpp
Log Message:
-----------
Revert "releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation"" (#227123)
Reverts llvm/llvm-project#226930
AMD author has an additional step to perform, that is still needed.
in contact with Author.
Commit: ec1b3b10a71c2181b0dfb90f1178e2e739680e02
https://github.com/llvm/llvm-project/commit/ec1b3b10a71c2181b0dfb90f1178e2e739680e02
Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Builder/CUDAIntrinsicCall.h
M flang/include/flang/Optimizer/Builder/CUFCommon.h
M flang/include/flang/Optimizer/Dialect/CUF/CUFOps.td
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Builder/CUDAIntrinsicCall.cpp
M flang/lib/Optimizer/Builder/CUFCommon.cpp
M flang/lib/Optimizer/Transforms/CMakeLists.txt
R flang/lib/Optimizer/Transforms/CUDA/CUFFunctionRewrite.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversion.cpp
M flang/lib/Optimizer/Transforms/CUDA/CUFOpConversionLate.cpp
R flang/test/Fir/CUDA/cuda-function-rewrite.mlir
A flang/test/Fir/CUDA/cuda-on-device.mlir
M flang/test/Fir/cuf.mlir
A flang/test/Lower/CUDA/cuda-on-device.cuf
Log Message:
-----------
[flang][cuda] Add cuf.on_device op and lower to it (#227089)
Replace the CUFFunctionRewrite pass, which matched fir.call names and
folded them to constants, with a cuf.on_device operation emitted when
the intrinsic is lowered. CUFOpConversion folds the operation once the
code is in its host or device context, and leaves the host copy of an
OpenACC routine unfolded so the device clone is not baked to false. Any
operation that remains is folded by the late CUF conversion, and the
rewrite pass is dropped from the pipeline.
Commit: eb3163c52e9fbea9c579c16bdb881655fb6536d5
https://github.com/llvm/llvm-project/commit/eb3163c52e9fbea9c579c16bdb881655fb6536d5
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/flang/lib/Optimizer/Builder/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes ec1b3b1 (#227180)
This fixes ec1b3b10a71c2181b0dfb90f1178e2e739680e02 (#227089).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=ec1b3b10a71c2181b0dfb90f1178e2e739680e02
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 2f13592fb1dee32d498c3ec2993d5f109e614abe
https://github.com/llvm/llvm-project/commit/2f13592fb1dee32d498c3ec2993d5f109e614abe
Author: Prajit Rahul <prajitrahul05 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
M mlir/lib/Dialect/ControlFlow/IR/ControlFlowOps.cpp
M mlir/test/Dialect/ControlFlow/canonicalize.mlir
M mlir/test/Dialect/ControlFlow/invalid.mlir
M mlir/test/Dialect/ControlFlow/ops.mlir
Log Message:
-----------
[mlir][cf] Fix cf.switch round-trip for case values wider than 64 bits (#221490)
The `cf.switch` parser reads case values into `int64_t`, and its printer
uses `APInt::getLimitedValue()`, preventing values wider than 64 bits
from round-tripping. Printing negative narrow values as unsigned can
also trigger an assertion when reparsing.
Parse case values into `APInt` and print them directly, so wide and
negative values round-trip correctly. Accept signed or unsigned literals
that fit the switch operand’s bit width, and report an error for values
that do not.
Add regression tests for wide and negative values, integer-width
boundaries, out-of-range diagnostics, and case selection after parsing.
Fixes #220609
Assisted-by: Codex
Commit: fddfd6f01e3f203df3fc1d7fc7769bcb9745d0fa
https://github.com/llvm/llvm-project/commit/fddfd6f01e3f203df3fc1d7fc7769bcb9745d0fa
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
A clang/lib/AST/ByteCode/EvalSettings.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Add `EvalSettings` struct and replace parent `State` (#226175)
We currently always construct a full `EvalInfo` when using the bytecode
interpreter, we then pass it to the `evaluate*` function, which only
copies a few values from it.
Introduce a new `EvalSettings` struct that we pass instead of a `State`.
This is cheaper to construct and we only pass what's needed. There is
one `evaluateAsRValue` overload left that takes a parent `State`, that
will be removed in a subsequent patch.
Commit: f4085066128ac709f25c206c9701285f60a0bf83
https://github.com/llvm/llvm-project/commit/f4085066128ac709f25c206c9701285f60a0bf83
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/test/CIR/CodeGen/pack-indexing.cpp
Log Message:
-----------
[CIR] Support PackIndexingExpr for LValue and Aggregates (#227040)
Support `PackIndexingExpr` in `CIRGenFunction::emitLValue` and
`AggExprEmitter` by visiting its selected expression, matching classic
Clang codegen (`CGExpr.cpp` and `CGExprAgg.cpp`) and completing
`PackIndexingExpr` support across all CIR expression emitters.
Fixes #226928
Assisted by Antigravity and Gemini
Commit: 3376b1f4b2f4db8c7f5c94323e6c9a730d974247
https://github.com/llvm/llvm-project/commit/3376b1f4b2f4db8c7f5c94323e6c9a730d974247
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M lld/test/ELF/pre_init_fini_array.s
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/MC/AsmParser/section_names.s
M llvm/test/MC/ELF/section.s
Log Message:
-----------
[MC,ELF] Set sh_entsize for SHT_INIT_ARRAY/FINI_ARRAY/PREINIT_ARRAY (#226875)
Match GNU Assembler: set sh_entsize to 4/8, regardless of sh_size. This
is mostly cosmetic: sh_entsize is not a useful member for non-merge
sections.
When clang-produced and GCC-produced objects are linked together, the
mismatch makes lld's output sh_entsize 0.
Commit: c5a5943133d558b7bae36fe3074e7777178e7a6e
https://github.com/llvm/llvm-project/commit/c5a5943133d558b7bae36fe3074e7777178e7a6e
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86InstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/X86/x86-avx512-inseltpoison.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[X86][InstCombine] Fix profcheck failures (#227183)
When optimizing some AVX512 masked intrinsics, we would create a select
with a condition derived from the mask. We cannot infer the distribution
of this synthesized condition, so mark it unknown to make profcheck
green.
Commit: 9fe649af67007493c02108b484c8b9259e3d522e
https://github.com/llvm/llvm-project/commit/9fe649af67007493c02108b484c8b9259e3d522e
Author: Vladimir Shiryaev <w at tagolog.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CAS/UnifiedOnDiskCache.cpp
A llvm/test/tools/llvm-cas/validate-if-needed.test
Log Message:
-----------
[CAS] Close the stderr temp file of the out-of-process validator (#226844)
Commit: ef45ca75ce721745b997db165f18e4fdf9e93294
https://github.com/llvm/llvm-project/commit/ef45ca75ce721745b997db165f18e4fdf9e93294
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
Log Message:
-----------
[RISCV] Add common check-prefix to rvp-intrinsics.c. NFC (#227044)
A large number of test cases have the same IR for RV32 and RV64.
Commit: 876ff1506413684af43a3a61fd4ca3b999000aff
https://github.com/llvm/llvm-project/commit/876ff1506413684af43a3a61fd4ca3b999000aff
Author: Abinaya Saravanan <asaravan at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Hexagon/HexagonDepInstrInfo.td
A llvm/test/MC/Hexagon/v79-nontemporal.s
Log Message:
-----------
Add v79 scalar non-temporal forms. (#226017)
Also add support for the non-temporal forms of dcfetch and dczeroa.
Fixes https://github.com/llvm/llvm-project/issues/221485
Commit: ba67350bf808d8bef21cc2d59d7bcd0396adc29d
https://github.com/llvm/llvm-project/commit/ba67350bf808d8bef21cc2d59d7bcd0396adc29d
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-28 (Mon, 28 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaConcept.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
Log Message:
-----------
[clang] Consistently cache failed constraint normalization (#227086)
Previously, if substituting the parameter mappings of a normalized
constraint failed, Sema::getNormalizedAssociatedConstraints() returned
nullptr, but it stored the partially substituted normal form in
NormalizationCache. So the first lookup for such a declaration failed,
but every later lookup returned the broken normal form, and subsumption
checking and the ambiguous-constraint diagnostics then continued with
it.
I believe this wasn't intentional:
- Before #161671 (e9972debc98c), normalization was a single step, and a
failure was cached as nullptr.
- #161671 added the parameter mapping substitution step. It inserted the
normal form into the cache before substituting, and returned nullptr if
the substitution then failed, leaving the non-null normal form in the
cache.
- #165352 (2984a8db804e) moved the insertion after the substitution to
not use an invalidated iterator, but kept inserting the normal form if
the substitution failed.
To fix this, cache failed substitution as nullptr, like a failed
normalization.
As a consequences we don't emit the diagnostics that were only emitted
because the second lookup continued:
- A second "'type name' declared as a pointer to a reference" error
(with its notes) for the same broken concept. For
template<typename T> concept Foo = True<T*>;
template<typename T> concept Bar = Foo<T&>;
template<typename T> requires Bar<T> struct S { };
template<typename T> requires Bar<T> && true struct S<T> { };
the error got reported once for the partial specialization, and also for
the primary template after. Now, we only have the first report.
- A "similar constraint expressions not considered equivalent" note and
its "similar constraint expression here" note, which we computed from
the broken normal form. The actual problem in that test is the broken
constraint, which is still diagnosed.
This also makes it possible to key the normalization cache by constraint
expression without changing which diagnostics are emitted for failures,
which I want to do in a follow-up.
Commit: 633223d573713822fafbff44a05459e4f27963ba
https://github.com/llvm/llvm-project/commit/633223d573713822fafbff44a05459e4f27963ba
Author: Jiahao Guo <eoonguo at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
Log Message:
-----------
[CIR][AArch64] Lower NEON vshrn* intrinsics (#226382)
## summary
part of : https://github.com/llvm/llvm-project/issues/185382
Lower all intrinsics in :
https://arm-software.github.io/acle/neon_intrinsics/advsimd.html#vector-shift-right-and-narrow
Assisted by : gpt-6-sol
Commit: 992ca79c83b0882465a202883109bd4cd167ec00
https://github.com/llvm/llvm-project/commit/992ca79c83b0882465a202883109bd4cd167ec00
Author: Jack Huang <jackhuang1205 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/IRBuilder.h
M llvm/lib/Transforms/Vectorize/VectorCombine.cpp
M llvm/test/Transforms/VectorCombine/binop-scalarize.ll
A llvm/test/Transforms/VectorCombine/cmp-scalarize.ll
M llvm/test/Transforms/VectorCombine/unary-op-scalarize.ll
Log Message:
-----------
[VectorCombine] Pass flags during IR creation (#193271)
Since commit 777d6b5, VectorCombine has been using InstSimplifyFolder to
simplify vector instructions during IR construction. When creating a new
instruction, InstSimplifyFolder may fold the operation and return an
existing operand instead of emitting a new instruction.
In such cases, copying IR flags to the returned value is incorrect and
may unintentionally propagate flags to pre‑existing instructions,
polluting the original IR. To avoid this, flags should be passed at IR
creation rather than being set after construction. Fix #192607.
Commit: a8d2c44b29e9a5caac37dc400cebca5f997ad6a6
https://github.com/llvm/llvm-project/commit/a8d2c44b29e9a5caac37dc400cebca5f997ad6a6
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
Log Message:
-----------
X86: Mark eflags clobbers dead in va_arg expansion (#227197)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 8d79b74443de46e78b4f2c90aa65bd42c491e909
https://github.com/llvm/llvm-project/commit/8d79b74443de46e78b4f2c90aa65bd42c491e909
Author: Timur Baidusenov <timurbaidusenov at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M polly/lib/Transform/ScheduleOptimizer.cpp
A polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll
Log Message:
-----------
[Polly] Keep proximity dependence exact if simplifying it unbounds its distance (#225840)
Before calling the isl scheduler, `runIslScheduleOptimizer` gists the
dependences
with the iteration domains (`-polly-opt-simplify-deps=yes`, the default
since
a26db470834a, 2012). For a statement that reads a value written in one
iteration
of a loop in all later iterations, the gist also drops the upper bound
of that
loop:
{ S[k, i, k] -> S[k, i, j] : k < j <= n - 1 } becomes { S[k, i, k] ->
S[k, i, j] : j > k }
The proximity distance along j is then unbounded. isl's Pluto-like step
needs a
bound `u·n + w` on every proximity distance, finds no row that satisfies
it, and
falls back to carrying dependences one row at a time. For floyd-warshall
this
yields a wavefront over `i + j` below the `k` loop instead of a
permutable band
`(i, j)`. That band is never tiled, and the innermost loop walks the
array
diagonally.
The patch keeps the exact proximity dependence of a statement on itself
when
the gisted dependence has unbounded distances and the exact one has
bounded
distances. Validity dependences, and dependences between different
statements,
are still gisted. The cost of the exact dependences therefore only
applies to
the few maps where the gist removed the bound; heat-3d, where keeping
all
proximity dependences exact makes scheduling take minutes, is
unaffected.
### Measurements
x86-64 (Ryzen 7 9700X), `-O3 -march=native -mllvm -polly`, baseline is
the same
compiler without the change.
| | before | after | |
|---|---|---|---|
| PolyBench 4.2.1 LARGE floyd-warshall (min of 3, pinned) | 26.7 s | 6.8
s | 3.9x |
| llvm-test-suite floyd-warshall (min of 5, pinned) | 60.9 s | 16.4 s |
3.7x |
| compile time floyd-warshall.c (min of 5) | 131 ms | 134 ms | |
| .text floyd-warshall | 4775 | 6298 | |
- Among the 30 PolyBench kernels, only floyd-warshall generates
different code.
- In llvm-test-suite (SingleSource + MultiSource), only floyd-warshall
and two
small regression tests (Regression-C-test_indvars,
GCC-C-execute-20000422-1)
change. All 2137 tests pass in both configurations. The other objects
whose
code differed between the two builds (oggenc, two TSVC programs) differ
by
Polly's pre-existing run-to-run nondeterminism; the patch did not
trigger
there.
- CTMark (`-j1`, pinned, 2 repetitions): identical generated code, total
compile
time within noise.
- With the default 32x32 tiles, floyd-warshall is still 1.2x slower than
plain
-O3 on this machine. That is a tile size effect: with
`-polly-tile-sizes=16,32`
the kernel runs in 1.6 s, 3.5x faster than -O3.
### Test
`polly/test/ScheduleOptimizer/simplify_deps_bounded_proximity.ll`:
floyd-warshall
with a parametric size; checks for the `(k)` band followed by the tiled
`(i, j)`
band. It fails without the patch, which produces the `(i + j)`
wavefront.
Assisted-by: Claude (Anthropic)
Commit: e8c09d19de8212bfb2d5c760c43a21e27729f660
https://github.com/llvm/llvm-project/commit/e8c09d19de8212bfb2d5c760c43a21e27729f660
Author: Nico Weber <thakis at chromium.org>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/InternalsManual.md
M clang/include/clang/Sema/Sema.h
M clang/lib/Sema/SemaConcept.cpp
Log Message:
-----------
[clang] Cache normalized constraints by expression instead of by declaration (#226620)
Sema::NormalizationCache was keyed by the constrained declaration. The
members of a class template specialization are distinct declarations for
every specialization, but they all share the uninstantiated constraint
expressions of the member of the primary template they were instantiated
from. So the constraints of e.g. the constrained constructors of
std::optional, std::span, std::pair or of the members of range adaptors
were normalized from scratch for every single specialization of those
classes that a TU uses. Normalization is expensive: it expands the whole
concept tree below the expression and substitutes the parameter mapping
at every level.
When compiling Chromium, 48%
(chrome/browser/glic/...contents_manager.cc)
to 72% (chrome/browser/ui/views/frame/browser_view.cc) of all
NormalizationCache misses were for expressions that were normalized
before
for a different declaration, and normalization is 4.5% of all compile
time
in a sampling profile.
Instead, key the cache by (expression, pack index). Each associated
constraint is cached separately, and we form the conjunction of a
declaration's associated constraints on every call. That's cheap, and
getNormalizedAssociatedConstraints() is only called on SatisfactionCache
misses and for subsumption checks. Failures are cached as nullptr, like
before.
Build time for 120 random Chromium TUs drawn with probability
proportional to their compile time:
CPU time: 470.0 s => 451.1 s, -4.0%
instructions: 4948.9e9 => 4702.7e9, -5.0%
mean max RSS: 779 MB => 710 MB, -8.9%
(To check noise level, running this with the same binary twice: +-0.04%
CPU time and +-0.01% instructions.)
Recovers some more of the time lost to #161671 and contributes to
improving issue #172266.
No behavior change on the non-error case.
(If several declarations share a constraint expression that fails to
normalize (e.g. the members of different specializations of a class
template), we now diagnose the failure once instead of once per
declaration.)
Commit: 6aeadac52d4f564e5030a1a22013ab381436cce3
https://github.com/llvm/llvm-project/commit/6aeadac52d4f564e5030a1a22013ab381436cce3
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/examples/python/templates/scripted_process.py
Log Message:
-----------
[lldb] Correct types for ScriptedFrame get_function_name get_display_function_name (#226938)
These claimed to return str but the initial value for self.name is None,
and the C++ side returns optional<string>. So I think optional string is
correct here.
Commit: d7daf1d24be8231f7f422ef2bca1003d4b77ec11
https://github.com/llvm/llvm-project/commit/d7daf1d24be8231f7f422ef2bca1003d4b77ec11
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/tools/llvm-profgen/PerfReader.cpp
Log Message:
-----------
[llvm][llvm-profgen] Fix printing bogus trace info on 32-bit (#226965)
And as a result, fix
llvm/test/tools/llvm-profgen/AArch64/cs-bogus-trace.test when run on Arm
32-bit:
https://lab.llvm.org/buildbot/#/builders/122/builds/59
Fixes #225569 / 28fec94991905d8dd8a08658e9590e13b7fe1af5.
`x` is for an unsigned integer but the argument given for it is a
uint64_t. This worked on 64-bit (maybe it's passed in a register), but
not on 32-bit where we got strange values printed.
Use format_hex instead, so we don't have to choose a format code.
Commit: b20896c96deab703d7f0e99301b553a8ef4abad7
https://github.com/llvm/llvm-project/commit/b20896c96deab703d7f0e99301b553a8ef4abad7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILMemIntrinsics.cpp
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/test/CodeGen/DirectX/bugfix_150050_data_scalarize_const_gep.ll
M llvm/test/CodeGen/DirectX/flatten-array.ll
M llvm/test/CodeGen/DirectX/flatten-bug-117273.ll
M llvm/test/CodeGen/DirectX/legalize-i8.ll
M llvm/test/CodeGen/DirectX/llc-vector-load-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-store.ll
M llvm/test/CodeGen/DirectX/scalarize-static-array-of-float-vectors.ll
M llvm/test/tools/dxil-dis/constantexpr-gep.ll
Log Message:
-----------
[DirectX] Don't use IRBuilder to create GEPs (#227000)
This switches the DirectX backend to directly call
`GetElementPtrInst::Create()` instead of creating GEPs via IRBuilder.
IRBuilder will soon start canonicalizing GEPs to ptradd representation
(with the first change being
https://github.com/llvm/llvm-project/pull/226425, affecting constant
expressions only), while DirectX needs GEPs to have specific form.
The change implemented here is a minimal one to unblock further work. In
the future, it will become impossible to construct such GEPs through any
API. The DirectX backend needs to switch to using an intrinsic to
represent any non-canonical GEPs it needs. This followup work is tracked
in https://github.com/llvm/llvm-project/issues/227005.
Commit: bb9dd27ae02c6b4fb49757085aa13af92cc1ccda
https://github.com/llvm/llvm-project/commit/bb9dd27ae02c6b4fb49757085aa13af92cc1ccda
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][bytecode] Use bytecode interpreter in toplevel `Expr::Evaluate*` functions (#226217)
To avoid all the state setup we otherwise do. This also lets us remove
the `EvalInfo::EnableNewConstInterp` flag, which was previously checked
on every `::EvaluateAsRValue` call.
Commit: c68a4ca2a9202d073b569cbfbfb269f21abf7aec
https://github.com/llvm/llvm-project/commit/c68a4ca2a9202d073b569cbfbfb269f21abf7aec
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
M mlir/test/Target/LLVMIR/llvmir-invalid.mlir
Log Message:
-----------
[LLVMIR] Directly lower global initializer GEP to constant expression (#226904)
MLIR lowers global initializers in a very unusual way, by using an
IRBuilder without insertion point, and relying on the fact that for a
well-formed initializer, all the instructions will be converted to
constant expressions and no actual instructions that require insertion
will be produced.
This causes issues for https://github.com/llvm/llvm-project/pull/226425,
which requires an insertion point for CreateGEP to determine the data
layout.
To avoid this, make convertGEPOp() directly produce a constant
expression GEP if there is no insertion point, reusing the existing code
path for inrange GEPs.
Commit: 090b123694953beeb55d003e45c24372858b29b8
https://github.com/llvm/llvm-project/commit/090b123694953beeb55d003e45c24372858b29b8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
Log Message:
-----------
[lldb][test] Handle None function name in frame provider tests (#226936)
Fixes #191859.
On Arm one of the functions has no name, which is a valid state.
```
Num frames: 7
0 frame #0: 0x092a151c a.out`baz at main.c:5:3 --name: baz
1 frame #1: 0x092a1540 a.out`bar at main.c:10:10 --name: bar
2 frame #2: 0x092a1560 a.out`foo at main.c:15:10 --name: foo
3 frame #3: 0x092a158c a.out`main at main.c:20:10 --name: main
4 frame #4: 0xf7ab939a libc.so.6` --name: None
5 frame #5: 0xf7ab943e libc.so.6`__libc_start_main + 94 --name: __libc_start_main
6 frame #6: 0x092a1434 a.out`_start + 40 --name: _start
```
The prefix provider needs to handle that possibility.
Though the Python type annotations on ScriptedFrame say that the name
methods return string, in reality they can return None, which the C++
sides expect. I will fix that in another PR.
Commit: e0bd48983e9d1d0de471a7689573622464c0b332
https://github.com/llvm/llvm-project/commit/e0bd48983e9d1d0de471a7689573622464c0b332
Author: Fangrui Song <i at maskray.me>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/LibASTImporter.md
M clang/docs/UsersManual.md
Log Message:
-----------
[docs] Pass -c when generating a PCH file (#226850)
Without options like -fsyntax-only/-E/-S/-c, the driver runs in link
mode, and a header-only command line produces a PCH only incidentally: a
linker option such as -lm or -Wl,..., including one from a config file,
adds a link job. Use -c in the PCH examples.
Also fix two broken examples: -ignore-pch is a driver option (cc1
rejects -Xclang -ignore-pch), and the relocatable PCH example is
missing -o. In LibASTImporter.md, generate the C++ AST files with
-emit-ast instead of treating .cpp files as headers.
LLM-aided
Commit: 58b102609a9d08fbadb9c3fa1dd88bba2cf7f711
https://github.com/llvm/llvm-project/commit/58b102609a9d08fbadb9c3fa1dd88bba2cf7f711
Author: Pawan Nirpal <pnirpal at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
A llvm/test/Analysis/ScalarEvolution/trip-count-variable-stride-predicate.ll
A llvm/test/Transforms/LoopVectorize/scev-variable-stride-predicate.ll
Log Message:
-----------
[SCEV] - Add positive-stride predicate for backedge-taken count. (#222261)
When `howManyLessThans` encounters a loop with an unknown stride that
cannot be proven finite (no `mustprogress` or side-effect-free
guarantee), SCEV currently returns `CouldNotCompute` for the
backedge-taken count. This blocks downstream consumers like the loop
vectorizer from optimizing such loops.
This patch relaxes the requirement by allowing a predicated
backedge-taken count when `AllowPredicates` is true. Instead of
requiring `loopIsFiniteByAssumption(L)` unconditionally, we add a
`Compare predicate: stride sgt 0` when finiteness cannot be proven.
A positive stride guarantees forward progress, making the BTC formula
correct. The predicate is emitted as a runtime check by consumers
(e.g., the loop vectorizer generates a guard branch before the vector
loop).
This is the SCEV-level fix for a class of variable-increment loops
common in Fortran-style benchmarks, e.g.:
void f(int n, int *a, int *b, int *c, int inc) {
int i = 0;
L10: if (i >= n) goto L20;
a[i] = a[i] + b[i] * c[i];
i = i + inc; // inc unknown at compile time
goto L10;
L20: ;
}
Addressing : https://github.com/llvm/llvm-project/issues/221915
---------
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: ab0582707ef7ea0c4b03dff58ae9c32a9bdfec5c
https://github.com/llvm/llvm-project/commit/ab0582707ef7ea0c4b03dff58ae9c32a9bdfec5c
Author: Ties Stuij <ties.stuij at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/test/builtins/Unit/arm/aeabi_cmpflags_interwork_test.c
Log Message:
-----------
[compiler-rt][ARM] Make interworking test compatible with BTI (#226154)
In the aeabi_cmpflags_interwork_test.c test wrappers, we should return
through lr instead of r3 so that runs with BTI enabled don't fail. As
returns through lr don't require a landing pad, and returns through r3
do.
Commit: a3a37848d8cac394d067a6c9c5d545753556e4e7
https://github.com/llvm/llvm-project/commit/a3a37848d8cac394d067a6c9c5d545753556e4e7
Author: Henrich Lauko <xlauko at mail.muni.cz>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/Diagnostics.h
M mlir/lib/IR/Diagnostics.cpp
M mlir/lib/Tools/mlir-opt/MlirOptMain.cpp
A mlir/test/Pass/remark-final-verify-diagnostics.mlir
M mlir/unittests/IR/Diagnostic.cpp
Log Message:
-----------
[mlir] Own the registrations of SourceMgrDiagnosticVerifierHandler (#226258)
`SourceMgrDiagnosticVerifierHandler::registerInContext` registered a
callback capturing `this` and dropped the handler id, so nothing could
erase it. The constructor did the same in its own context. After the
verifier was destroyed, the next diagnostic called into a dead object.
mlir-opt's per-buffer contexts die first, which hid the bug.
Make both registrations owned:
- The constructor installs its callback through `setHandler`, replacing
the base class's printing handler. That handler was unreachable anyway:
the verifier consumes every diagnostic and reports unexpected ones
itself. The base destructor now erases it.
- `registerInContext` returns a scoped registration. Callers destroy it
before the verifier and the context.
Erasing from every registered context in the destructor would not work:
mlir-opt's per-buffer contexts are already gone by then.
mlir-opt's `performActions` finalized the remark policy only after
textual output; on a failing pipeline the remarks deferred by
`--remark-policy=final` were emitted from `~MLIRContext`, after the
handlers were gone. It now finalizes on every exit, so those remarks
reach the verifier, or the printing handler in the non-verify path where
they were dropped before. A lit test pins this.
Assisted-by: Claude Code (Claude Fable 5.1)
Commit: f72d03de7c159efd3c4a4501323d19c86c17d7a8
https://github.com/llvm/llvm-project/commit/f72d03de7c159efd3c4a4501323d19c86c17d7a8
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVPreLegalizer.cpp
M llvm/test/CodeGen/SPIRV/legalization/signed-narrow-int.ll
Log Message:
-----------
[SPIR-V] Sign extend narrow ints feeding sitofp (#222969)
Commit: 197c16add5b16f4bd68c4f4bae115723e74330e2
https://github.com/llvm/llvm-project/commit/197c16add5b16f4bd68c4f4bae115723e74330e2
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/test-suite.yml
Log Message:
-----------
[GitHub] Add ffmpeg to test-suite.yml workflow (#227219)
This provides additional coverage for vector related codegen
Commit: 5e1ed67dbadba1b2bc254411cf78e61db51687d1
https://github.com/llvm/llvm-project/commit/5e1ed67dbadba1b2bc254411cf78e61db51687d1
Author: Momchil Velikov <momchil.velikov at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/GVNHoist.h
A llvm/include/llvm/Transforms/Scalar/GVNSink.h
A llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/GVNHoist.cpp
M llvm/lib/Transforms/Scalar/GVNSink.cpp
Log Message:
-----------
[GVN] Move `ValueTable` out of `GVN.h` (NFC) (#226233)
* Rename `GVNPass::ValueTable` to `GVNValueTable`, and move it out to
the `llvm` namespace and to its own file `GVNValueTable.h`.
* Move `GVNPass::Expression` into `llvm::GVNValueTable`.
* Move `GVNHoistPass` and `GVNSinkPass` to their own headers.
With these changes `GVHoist.cpp` and `GVNSink.cpp` no longer need to
include `GVN.h` or peek into `GVNPass` internals.
Commit: 6286f77214be257eed1cff70d3e2e16f024e3dfb
https://github.com/llvm/llvm-project/commit/6286f77214be257eed1cff70d3e2e16f024e3dfb
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/test/CodeGen/AArch64/O3-pipeline.ll
M llvm/test/CodeGen/AArch64/coalescer-empty-subrange-early-lis.ll
M llvm/test/CodeGen/AArch64/itofp-bf16.ll
M llvm/test/CodeGen/AArch64/pr161420.ll
M llvm/test/CodeGen/AArch64/sve-streaming-mode-fixed-length-trunc.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fshl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/sdiv.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/srem.i64.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/twoaddr-extract-dyn-v7f64.mir
M llvm/test/CodeGen/AMDGPU/a-v-flat-atomic-cmpxchg.ll
M llvm/test/CodeGen/AMDGPU/acc-ldst.ll
M llvm/test/CodeGen/AMDGPU/add_i128.ll
M llvm/test/CodeGen/AMDGPU/add_i64.ll
M llvm/test/CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.160bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.224bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.288bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.320bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.352bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.384bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.448bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.576bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.640bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.704bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.768bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.832bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.896bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.960bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-mul24-knownbits.ll
M llvm/test/CodeGen/AMDGPU/and.ll
M llvm/test/CodeGen/AMDGPU/any_extend_vector_inreg.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomicrmw_usub_sat.ll
M llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll
M llvm/test/CodeGen/AMDGPU/av-split-dead-valno-crash.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
M llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
M llvm/test/CodeGen/AMDGPU/bitreverse.ll
M llvm/test/CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
M llvm/test/CodeGen/AMDGPU/bswap.ll
M llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll
M llvm/test/CodeGen/AMDGPU/bypass-div.ll
M llvm/test/CodeGen/AMDGPU/clmul.ll
M llvm/test/CodeGen/AMDGPU/consecutive-loads-in-branch.ll
M llvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
M llvm/test/CodeGen/AMDGPU/ctlz.ll
M llvm/test/CodeGen/AMDGPU/ctlz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/ctpop.ll
M llvm/test/CodeGen/AMDGPU/ctpop16.ll
M llvm/test/CodeGen/AMDGPU/ctpop64.ll
M llvm/test/CodeGen/AMDGPU/cttz.ll
M llvm/test/CodeGen/AMDGPU/cttz_zero_poison.ll
M llvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
M llvm/test/CodeGen/AMDGPU/dead-lane.mir
M llvm/test/CodeGen/AMDGPU/div_v2i128.ll
M llvm/test/CodeGen/AMDGPU/ds_gws_align.ll
M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
M llvm/test/CodeGen/AMDGPU/fadd.f16.ll
M llvm/test/CodeGen/AMDGPU/fceil64.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/flat-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_noprivate.ll
M llvm/test/CodeGen/AMDGPU/flat_atomics_i64_system.ll
M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
M llvm/test/CodeGen/AMDGPU/fmax_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmin_legacy.f64.ll
M llvm/test/CodeGen/AMDGPU/fmul.f16.ll
M llvm/test/CodeGen/AMDGPU/fnearbyint.ll
M llvm/test/CodeGen/AMDGPU/fptoi.i128.ll
M llvm/test/CodeGen/AMDGPU/fptrunc.ll
M llvm/test/CodeGen/AMDGPU/freeze.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fshl.ll
M llvm/test/CodeGen/AMDGPU/fsub.f16.ll
M llvm/test/CodeGen/AMDGPU/gfx-callable-return-types.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fsub.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/half.ll
M llvm/test/CodeGen/AMDGPU/hsa-metadata-kernel-code-props.ll
M llvm/test/CodeGen/AMDGPU/identical-subrange-spill-infloop.ll
M llvm/test/CodeGen/AMDGPU/idot2.ll
M llvm/test/CodeGen/AMDGPU/idot4s.ll
M llvm/test/CodeGen/AMDGPU/idot4u.ll
M llvm/test/CodeGen/AMDGPU/idot8u.ll
M llvm/test/CodeGen/AMDGPU/indirect-addressing-si.ll
M llvm/test/CodeGen/AMDGPU/indirect-call.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_dynelt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
M llvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.dual_intersect_ray.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.iglp.opt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.gfx90a.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fadd.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.reduce.fsub.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.sched.group.barrier.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.set.inactive.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.smfmac.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp10.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.fma.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/llvm.maximum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.maxnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.minimum.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.minnum.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
M llvm/test/CodeGen/AMDGPU/llvm.round.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i64.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i8.ll
M llvm/test/CodeGen/AMDGPU/load-global-f32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i16.ll
M llvm/test/CodeGen/AMDGPU/load-global-i32.ll
M llvm/test/CodeGen/AMDGPU/load-global-i8.ll
M llvm/test/CodeGen/AMDGPU/load-local-i16.ll
M llvm/test/CodeGen/AMDGPU/lower-control-flow-live-variables-update.mir
M llvm/test/CodeGen/AMDGPU/machine-sink-temporal-divergence-swdev407790.ll
M llvm/test/CodeGen/AMDGPU/mad-combine.ll
M llvm/test/CodeGen/AMDGPU/mad_uint24.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/memintrinsic-unroll.ll
M llvm/test/CodeGen/AMDGPU/merge-stores.ll
M llvm/test/CodeGen/AMDGPU/mfma-cd-select.ll
M llvm/test/CodeGen/AMDGPU/mfma-no-register-aliasing.ll
M llvm/test/CodeGen/AMDGPU/move-to-valu-atomicrmw-system.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands-non-ptr-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll
M llvm/test/CodeGen/AMDGPU/mul.ll
M llvm/test/CodeGen/AMDGPU/mul_uint24-amdgcn.ll
M llvm/test/CodeGen/AMDGPU/no-remat-indirect-mov.mir
M llvm/test/CodeGen/AMDGPU/operand-folding.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
M llvm/test/CodeGen/AMDGPU/packed-u64.ll
M llvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.ll
M llvm/test/CodeGen/AMDGPU/rewrite-mfma-single-exit-copy.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-reserved-wwm-vgpr.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-joint-dom.ll
M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr.ll
M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
M llvm/test/CodeGen/AMDGPU/schedule-relaxed-occupancy.ll
M llvm/test/CodeGen/AMDGPU/scratch-simple.ll
M llvm/test/CodeGen/AMDGPU/sdiv.ll
M llvm/test/CodeGen/AMDGPU/select.f16.ll
M llvm/test/CodeGen/AMDGPU/shift-and-i64-ubfe.ll
M llvm/test/CodeGen/AMDGPU/shl.ll
M llvm/test/CodeGen/AMDGPU/shl.v2i64.ll
M llvm/test/CodeGen/AMDGPU/shufflevector.v2i64.v8i64.ll
M llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/sminmax.v2i16.ll
M llvm/test/CodeGen/AMDGPU/spill-scavenge-offset.ll
M llvm/test/CodeGen/AMDGPU/spill-vgpr.ll
M llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask-phi-extend.ll
M llvm/test/CodeGen/AMDGPU/sra.ll
M llvm/test/CodeGen/AMDGPU/srem.ll
M llvm/test/CodeGen/AMDGPU/srl.ll
M llvm/test/CodeGen/AMDGPU/sub.ll
M llvm/test/CodeGen/AMDGPU/twoaddr-constrain.ll
M llvm/test/CodeGen/AMDGPU/udiv.ll
M llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll
M llvm/test/CodeGen/AMDGPU/undef-handling-crash-in-ra.ll
M llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
M llvm/test/CodeGen/AMDGPU/unspill-vgpr-after-rewrite-vgpr-mfma.ll
M llvm/test/CodeGen/AMDGPU/urem64.ll
M llvm/test/CodeGen/AMDGPU/v_madak_f16.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fmaximum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-fminimum.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-smin.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umax.ll
M llvm/test/CodeGen/AMDGPU/vector-reduce-umin.ll
M llvm/test/CodeGen/AMDGPU/vgpr-mark-last-scratch-load.ll
M llvm/test/CodeGen/AMDGPU/vni8-across-blocks.ll
M llvm/test/CodeGen/AMDGPU/vselect.ll
M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
M llvm/test/CodeGen/AMDGPU/widen-vselect-and-mask.ll
M llvm/test/CodeGen/AMDGPU/wqm.ll
M llvm/test/CodeGen/AMDGPU/xor.ll
M llvm/test/CodeGen/ARM/O3-pipeline.ll
M llvm/test/CodeGen/ARM/fp-intrinsics-vector.ll
M llvm/test/CodeGen/ARM/inlineasm-operand-implicit-cast.ll
M llvm/test/CodeGen/ARM/llvm.modf.ll
M llvm/test/CodeGen/ARM/llvm.sincos.ll
M llvm/test/CodeGen/ARM/signext-inreg.ll
M llvm/test/CodeGen/ARM/vldlane.ll
M llvm/test/CodeGen/Hexagon/addh.ll
M llvm/test/CodeGen/Hexagon/cttz-elts-widen.ll
M llvm/test/CodeGen/Hexagon/isel-extload-i1.ll
M llvm/test/CodeGen/Hexagon/mulhs.ll
M llvm/test/CodeGen/Hexagon/swp-vect-dotprod.ll
M llvm/test/CodeGen/LoongArch/opt-pipeline.ll
M llvm/test/CodeGen/M68k/pipeline.ll
M llvm/test/CodeGen/PowerPC/O3-pipeline.ll
M llvm/test/CodeGen/PowerPC/dmr-copy.ll
M llvm/test/CodeGen/PowerPC/dmr-enable.ll
M llvm/test/CodeGen/PowerPC/no-rlwimi-trivial-commute.mir
M llvm/test/CodeGen/RISCV/O3-newpm-pipeline.ll
M llvm/test/CodeGen/RISCV/O3-pipeline.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-extract-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll
M llvm/test/CodeGen/RISCV/rvv/fmaximum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fminimum-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vfmsub-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/vwadd.w.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-ops-i128.ll
M llvm/test/CodeGen/SystemZ/atomicrmw-xchg-07.ll
M llvm/test/CodeGen/SystemZ/rot-02.ll
M llvm/test/CodeGen/SystemZ/subregliveness-01.ll
M llvm/test/CodeGen/Thumb/emergency-spill-slot.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-add.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-f64-mul.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-mixed-cases.ll
M llvm/test/CodeGen/Thumb2/mve-complex-deinterleaving-uniform-cases.ll
M llvm/test/CodeGen/Thumb2/mve-ctlz.ll
M llvm/test/CodeGen/Thumb2/mve-fmath.ll
M llvm/test/CodeGen/Thumb2/mve-insertshuffleload.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving-cost.ll
M llvm/test/CodeGen/Thumb2/mve-laneinterleaving.ll
M llvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
M llvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
M llvm/test/CodeGen/Thumb2/mve-sext-masked-load.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle-fp16.ll
M llvm/test/CodeGen/Thumb2/mve-shuffle.ll
M llvm/test/CodeGen/Thumb2/mve-shuffleext.ll
M llvm/test/CodeGen/Thumb2/mve-shufflemov.ll
M llvm/test/CodeGen/Thumb2/mve-vabdus.ll
M llvm/test/CodeGen/Thumb2/mve-vcvt16.ll
M llvm/test/CodeGen/Thumb2/mve-vld2.ll
M llvm/test/CodeGen/Thumb2/mve-vld3.ll
M llvm/test/CodeGen/Thumb2/mve-vld4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vld4.ll
M llvm/test/CodeGen/Thumb2/mve-vldst4.ll
M llvm/test/CodeGen/Thumb2/mve-vst2.ll
M llvm/test/CodeGen/Thumb2/mve-vst3.ll
M llvm/test/CodeGen/Thumb2/mve-vst4-post.ll
M llvm/test/CodeGen/Thumb2/mve-vst4.ll
M llvm/test/CodeGen/Thumb2/mve-zext-masked-load.ll
M llvm/test/CodeGen/X86/active_lane_mask.ll
M llvm/test/CodeGen/X86/addcarry.ll
M llvm/test/CodeGen/X86/apx/mul-i1024.ll
M llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/apx/push2-pop2.ll
M llvm/test/CodeGen/X86/bit-manip-i512.ll
M llvm/test/CodeGen/X86/bitselect.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/combine-bitselect.ll
M llvm/test/CodeGen/X86/combine-or.ll
M llvm/test/CodeGen/X86/combine-rotates.ll
M llvm/test/CodeGen/X86/div-rem-pair-recomposition-unsigned.ll
M llvm/test/CodeGen/X86/fpclamptosat_vec.ll
M llvm/test/CodeGen/X86/ftrunc.ll
M llvm/test/CodeGen/X86/funnel-shift-i512.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i128-udiv.ll
M llvm/test/CodeGen/X86/icmp-abs-C.ll
M llvm/test/CodeGen/X86/inline-asm-A-constraint.ll
M llvm/test/CodeGen/X86/llc-pipeline-npm.ll
M llvm/test/CodeGen/X86/machine-combiner-int-vec.ll
M llvm/test/CodeGen/X86/machine-cse.ll
M llvm/test/CodeGen/X86/masked-urem.ll
M llvm/test/CodeGen/X86/midpoint-int-vec-128.ll
M llvm/test/CodeGen/X86/midpoint-int.ll
M llvm/test/CodeGen/X86/mul-i1024.ll
M llvm/test/CodeGen/X86/mul-i256.ll
M llvm/test/CodeGen/X86/mul-i512.ll
M llvm/test/CodeGen/X86/mul-shift-reassoc.ll
M llvm/test/CodeGen/X86/mul128.ll
M llvm/test/CodeGen/X86/neg-abs.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/opt-pipeline.ll
M llvm/test/CodeGen/X86/pr46877.ll
M llvm/test/CodeGen/X86/scalar-minmax-simd.ll
M llvm/test/CodeGen/X86/shift-amount-mod.ll
M llvm/test/CodeGen/X86/shift-and.ll
M llvm/test/CodeGen/X86/statepoint-cmp-sunk-past-statepoint.ll
M llvm/test/CodeGen/X86/statepoint-relocate-eh.ll
M llvm/test/CodeGen/X86/statepoint-vreg-unlimited-tied-opnds.ll
M llvm/test/CodeGen/X86/ternlog.ll
M llvm/test/CodeGen/X86/twoaddr-lea-eflags-liveintervals.ll
M llvm/test/CodeGen/X86/ucmp.ll
M llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll
M llvm/test/CodeGen/X86/vec_umulo.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i64-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-7.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-lzcnt-128.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-sumla.ll
M llvm/test/CodeGen/X86/vector-partial-reduce-umla.ll
M llvm/test/CodeGen/X86/vector-reduce-ctpop.ll
M llvm/test/CodeGen/X86/vector-reduce-smax.ll
M llvm/test/CodeGen/X86/vector-reduce-smin.ll
M llvm/test/CodeGen/X86/vector-reduce-umax.ll
M llvm/test/CodeGen/X86/vector-reduce-umin.ll
M llvm/test/CodeGen/X86/vector-trunc-packus.ll
M llvm/test/CodeGen/X86/wide-scalar-shift-by-byte-multiple-legalization.ll
M llvm/test/CodeGen/X86/widen_arith-2.ll
M llvm/test/CodeGen/X86/widen_bitcnt.ll
M llvm/test/CodeGen/X86/zext-trunc.ll
M llvm/test/DebugInfo/MIR/X86/mlicm-hoist-post-regalloc.mir
M llvm/test/Transforms/SampleProfile/pseudo-probe-twoaddr.ll
Log Message:
-----------
CodeGen: Compute LiveIntervals before TwoAddressInstructions (#225174)
TwoAddressInstructions is the traditional primary use of LiveVariables, but it has
gained a LiveIntervals path. By moving LiveIntervals earlier, the default flips to rely
on it instead of LiveVariables. The overall test churn is mostly neutral, with more net
wins than losses.
This should move before phi elimination. This is a staging move to incrementally
remove the LiveVariables support from TwoAddressInstructions, and because the
move to running LiveIntervals on SSA is a bigger leap.
This obsoletes -early-live-intervals (though, maybe it could be repurposed for
move before SSA).
Co-authored-by: Claude (Claude-Opus-4.8)
Commit: f0f0fe2d928a4c46dbd60b6d6bf6cf6d9f8b2993
https://github.com/llvm/llvm-project/commit/f0f0fe2d928a4c46dbd60b6d6bf6cf6d9f8b2993
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
R libcxx/utils/ci/images/libcxx_next_runners.txt
R libcxx/utils/ci/images/libcxx_release_runners.txt
R libcxx/utils/ci/images/libcxx_runners.txt
Log Message:
-----------
[libcxx] Delete runner set image versions (#227141)
These are no longer needed now that we have removed the old runner sets.
Commit: cdebdbdba13e79bdb09d328e05b417d2b7614a82
https://github.com/llvm/llvm-project/commit/cdebdbdba13e79bdb09d328e05b417d2b7614a82
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
M llvm/test/Transforms/LoopVectorize/VPlan/record-execution-frequencies.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-based-stride-mv.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-printing-branch-weights.ll
Log Message:
-----------
[VPlan] Use BlockFrequencyInfo's full mass for execution frequencies. (#227006)
Use BlockFrequencyInfo's full mass instead of custom 2^63 for "always
execute".
This updates VPlan's block frequencies to match BFI.
PR: https://github.com/llvm/llvm-project/pull/227006
Commit: f69661de1c6fd034afabc2acf79a888cf7b58c5c
https://github.com/llvm/llvm-project/commit/f69661de1c6fd034afabc2acf79a888cf7b58c5c
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
A llvm/test/Analysis/BlockFrequencyInfo/many-successors-order.ll
Log Message:
-----------
[BFI] Use MapVector in combineWeightsByHashing. (#227027)
combineWeightsByHashing iterated over a DenseMap, which depends on the
hash. Use MapVector to get consistent results, independent of index
type/values.
This is mainly to ensure consistency between users that use different
index numbers, i.e. used for IR BFI and VPlan's use.
PR: https://github.com/llvm/llvm-project/pull/227027
Commit: 724557a9bd1389446ba52d270ad31d78a6071497
https://github.com/llvm/llvm-project/commit/724557a9bd1389446ba52d270ad31d78a6071497
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/two-address-subreg-to-reg-kill.mir
Log Message:
-----------
X86: Fix missing ... separator between functions in mir test (#227228)
The update_mir_test_checks output is incomplete so the later functions
here were really manually checked.
Commit: fa3d17075284bf746f4030ad3371fe5c05b06653
https://github.com/llvm/llvm-project/commit/fa3d17075284bf746f4030ad3371fe5c05b06653
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/FunctionAttrs.cpp
M llvm/test/Transforms/FunctionAttrs/noalias.ll
Log Message:
-----------
[FunctionAttrs] Infer noalias through a null check. (#226956)
Only comparing against null does not captures provenance and should not
impact whether a pointer is noalias or not.
This enables noalias inference in a number of cases for malloc-like
functions:
https://github.com/dtcxzyw/llvm-opt-benchmark-nightly/pull/1459.
PR: https://github.com/llvm/llvm-project/pull/226956
Commit: 6ccc4917217c650428fd36360690dad4a3f69d20
https://github.com/llvm/llvm-project/commit/6ccc4917217c650428fd36360690dad4a3f69d20
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Fix off-by-one crash in `lifetime_capture_by` argument indexing (#227231)
Fixes an off-by-one crash in the lifetime_capture_by attribute handling.
The CapturingArgIdx is already an index into the full Args array, but
the code was incorrectly creating a CallArgs array (dropping the first
argument for instance methods) and then indexing into it with
CapturingArgIdx, causing incorrect argument access and potential
out-of-bounds crashes.
Currently crashes at head: https://godbolt.org/z/7rYczK1z6
Commit: 74c86a79968b3f23eb3b292d318429364709f6b2
https://github.com/llvm/llvm-project/commit/74c86a79968b3f23eb3b292d318429364709f6b2
Author: Jay Foad <jay.foad at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
M llvm/test/CodeGen/AMDGPU/anyext.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/bf16-conversions.ll
M llvm/test/CodeGen/AMDGPU/copy-to-reg-scc-clobber.ll
M llvm/test/CodeGen/AMDGPU/extract-subvector-16bit.ll
M llvm/test/CodeGen/AMDGPU/fcmp.f16.ll
M llvm/test/CodeGen/AMDGPU/fcopysign.bf16.ll
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp-wave32.mir
A llvm/test/CodeGen/AMDGPU/fix-sgpr-copies-scc-cmp.mir
M llvm/test/CodeGen/AMDGPU/fneg-combines.new.ll
M llvm/test/CodeGen/AMDGPU/fneg-modifier-casting.ll
M llvm/test/CodeGen/AMDGPU/fp-classify.ll
M llvm/test/CodeGen/AMDGPU/fp_to_sint.ll
M llvm/test/CodeGen/AMDGPU/fp_to_uint.ll
M llvm/test/CodeGen/AMDGPU/fpow.ll
M llvm/test/CodeGen/AMDGPU/fptosi-sat-scalar.ll
M llvm/test/CodeGen/AMDGPU/fptosi.f16.ll
M llvm/test/CodeGen/AMDGPU/fptoui.f16.ll
M llvm/test/CodeGen/AMDGPU/frem.ll
M llvm/test/CodeGen/AMDGPU/fsqrt.f64.ll
M llvm/test/CodeGen/AMDGPU/literal64.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.class.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.exp2.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.f16.ll
M llvm/test/CodeGen/AMDGPU/llvm.is.fpclass.ll
M llvm/test/CodeGen/AMDGPU/llvm.log.ll
M llvm/test/CodeGen/AMDGPU/llvm.log10.ll
M llvm/test/CodeGen/AMDGPU/llvm.log2.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/mixed-vmem-types.ll
M llvm/test/CodeGen/AMDGPU/or.ll
M llvm/test/CodeGen/AMDGPU/pseudo-scalar-transcendental.ll
M llvm/test/CodeGen/AMDGPU/rsq.f64.ll
M llvm/test/CodeGen/AMDGPU/saddo.ll
M llvm/test/CodeGen/AMDGPU/scmp.ll
M llvm/test/CodeGen/AMDGPU/setcc-f64-hi32mask.ll
M llvm/test/CodeGen/AMDGPU/ssubo.ll
M llvm/test/CodeGen/AMDGPU/ucmp.ll
M llvm/test/CodeGen/AMDGPU/umin-sub-to-usubo-select-combine.ll
M llvm/test/CodeGen/AMDGPU/wave32.ll
Log Message:
-----------
[AMDGPU] Use S_CMP to lower a copy of a lane mask to SCC (#221445)
SIFixSGPRCopies lowers a copy of a lane mask to SCC as an AND with EXEC,
whose destination register is created by the pass and is always dead.
The AND with EXEC is only needed because SCC has to be "any active lane
is set". When the lane mask already has 0 in the bits of all inactive
lanes, that is just "the mask is non-zero", which S_CMP computes without
needing a destination register. In some cases the S_CMP can be optimized
away later by SIInstrInfo::optimizeCompareInstr.
Co-authored-by: Claude Opus 5 (1M context) <noreply at anthropic.com>
Commit: 7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7
https://github.com/llvm/llvm-project/commit/7cf8ecb2ef8acc2bca15f2223a3635f5863a81a7
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsFastISel.cpp
A llvm/test/CodeGen/Mips/Fast-ISel/mul-dead-hilo.ll
Log Message:
-----------
Mips: Mark MUL's existing HI0/LO0 defs dead in FastISel (#227230)
Commit: 5a245737377fec09c871c802cc730189a61df459
https://github.com/llvm/llvm-project/commit/5a245737377fec09c871c802cc730189a61df459
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsCallLowering.cpp
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/aggregate_struct_return.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/call.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/extend_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/float_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/global_address_pic.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/sret_pointer.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/stack_args.ll
M llvm/test/CodeGen/Mips/GlobalISel/irtranslator/var_arg.ll
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/ceil_and_floor.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/dyn_stackalloc.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/fptosi_and_fptoui.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/rem_and_div.mir
M llvm/test/CodeGen/Mips/GlobalISel/legalizer/sitofp_and_uitofp.mir
Log Message:
-----------
Mips/GlobalISel: Mark call's implicit RA def dead (#227233)
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: a4b0944bde4640586dd902d3ad401a6270c8a1fe
https://github.com/llvm/llvm-project/commit/a4b0944bde4640586dd902d3ad401a6270c8a1fe
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/test/CodeGen/AArch64/named-vector-shuffle-reverse-sve.ll
Log Message:
-----------
[AArch64] ISel support for nxv1i1 vector_reverse (#226939)
This ensures llvm.vector.reverse can be selected for nxv1i1 types. These intrinsics can be generated by LoopVectorizer for `VF = vscale x 1` and loops iterating in reverse order.
Commit: d5f6c302fff1aeed8fb6a247c21a694b156778bc
https://github.com/llvm/llvm-project/commit/d5f6c302fff1aeed8fb6a247c21a694b156778bc
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/docs/Hardening.rst
M libcxx/include/__configuration/attributes.h
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: 5c170b01350198b7f1f830fb53253652015077b3
https://github.com/llvm/llvm-project/commit/5c170b01350198b7f1f830fb53253652015077b3
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsOptimizePICCall.cpp
A llvm/test/CodeGen/Mips/optimize-pic-call-dead-gp.ll
Log Message:
-----------
Mips: Mark the $gp setup copy dead when erasing the call's $gp use (#227216)
MipsOptimizePICCall drops the implicit $gp operand from a call when the
lazy binding stub for the callee has already run. The copy that set $gp
up for that call then has no reader left, but nothing flagged it, so the
MIR carried a live def until a later liveness recomputation cleaned it
up.
The pass already walks each block in order, so track the reaching
definition of $gp as it goes and mark it dead when the use is erased.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: e0c49c0739807c8c75d38148babfa338d1e07f6a
https://github.com/llvm/llvm-project/commit/e0c49c0739807c8c75d38148babfa338d1e07f6a
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
A llvm/test/CodeGen/AArch64/GlobalISel/select-tls-macho.ll
Log Message:
-----------
AArch64/GlobalISel: Mark the LR def of the Mach-O TLS call dead (#227234)
The ordinary call path already does this, and the SelectionDAG emitter
marks unused implicit physreg defs dead for free. Without it the dead
flag needs to be reinferred later.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 5aa04826046edad5122d959688c0b8e9950f261f
https://github.com/llvm/llvm-project/commit/5aa04826046edad5122d959688c0b8e9950f261f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/MCTargetDesc/LoongArchMCTargetDesc.cpp
A llvm/test/CodeGen/LoongArch/null-streamer.ll
Log Message:
-----------
LoongArch: Register a null target streamer (#226497)
Emitting a TLS variable's debug location calls into the target streamer,
which was only registered for asm and object output. -filetype=null
therefore null dereferenced.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 80cd6102a79c02763034fbf1b6a1473930b1d4ab
https://github.com/llvm/llvm-project/commit/80cd6102a79c02763034fbf1b6a1473930b1d4ab
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.cpp
M llvm/lib/Target/LoongArch/LoongArchAsmPrinter.h
A llvm/test/CodeGen/LoongArch/module-target-abi.ll
Log Message:
-----------
LoongArch: Respect the target-abi module flag in the ELF header (#226498)
The target streamer read the ABI from MCTargetOptions when constructed,
so the e_flags recorded the command line -target-abi and ignored the
module flag.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: b7bd84ff2a30e08e7f1bd2b36db5f8ec9ba300ee
https://github.com/llvm/llvm-project/commit/b7bd84ff2a30e08e7f1bd2b36db5f8ec9ba300ee
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/AArch64/findlast-epilogue-loop.ll
M llvm/test/Transforms/LoopVectorize/AArch64/sve-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/RISCV/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/RISCV/select-cmp-reduction.ll
M llvm/test/Transforms/LoopVectorize/VPlan/conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/VPlan/interleave-conditional-scalar-assignment-vplan.ll
M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
M llvm/test/Transforms/LoopVectorize/alias-mask.ll
M llvm/test/Transforms/LoopVectorize/conditional-scalar-assignment-interleave-only.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr-tail-folding.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-expr.ll
M llvm/test/Transforms/LoopVectorize/find-last-iv-sinkable-load.ll
M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
M llvm/test/Transforms/LoopVectorize/find-last.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-fold-tail.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
M llvm/test/Transforms/LoopVectorize/select-cmp.ll
Log Message:
-----------
[VPlan] Fix find last reductions not using frozen condition in select (#223962)
A find last reduction is something like:
(select c[n], x[n], (select c[n-1], x[n-1], (select ...)))
So even if previous iterations had poison for c[x], the top-level select
blocks it.
MaskSelect uses the non-frozen Cond, and that in turn is fed into
VPInstruction::ExtractLastActive, which in turn gets expanded to
vector.reduce.umax, which returns poison if any of the lanes were
poison.
So in the case e.g. c[n] = 1, c[n-1] = poison and VF=2, the scalar loop
returns x[n] whilst vector loop returns poison.
We're also introducing multiple uses of Cond which isn't sound for
undef, so for these reasons we need to use the frozen Cond.
Commit: bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
https://github.com/llvm/llvm-project/commit/bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
A llvm/test/CodeGen/NVPTX/convert-fp4-pzo.ll
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir
Log Message:
-----------
[clang][NVPTX] Add support for pzo in f32/f16x2/bf16x2 to FP4 conversions (#225318)
This patch adds support for `pzo` variants and `rz` rounding mode to
existing `f32/f16x2/bf16x2` to `FP4` (`e2m1x2`) conversion intrinsics.
Also adds `clang builtins` for the new variants.
Tests have been verified through `ptxas-13.4`.
PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 5da194580292bc90f6577f3959dda3a9bb6d5366
https://github.com/llvm/llvm-project/commit/5da194580292bc90f6577f3959dda3a9bb6d5366
Author: Anand Mistry (MSFT) <anandmistry at microsoft.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.h
A llvm/test/MC/Mips/eva/set-eva-directive.s
A llvm/test/MC/Mips/eva/set-noeva-directive.s
Log Message:
-----------
[Mips] Add set directive support for EVA instructions (#225888)
Add assembler directives to enable/disable access to EVA instructions,
such as `cachee/lbe/sbe/tlbinv/etc`, with `.set eva/noeva`.
Commit: 84c14dac5c730f5b888b42193d252eb41cc77247
https://github.com/llvm/llvm-project/commit/84c14dac5c730f5b888b42193d252eb41cc77247
Author: Utkarsh Saxena <usx at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/Sema/LifetimeSafety/safety.cpp
Log Message:
-----------
[LifetimeSafety] Add negative-test for `lifetime_capture_by_this` on constructors (#227251)
Commit: 5239371ffa13f30915fe67744be2ea261b74be2a
https://github.com/llvm/llvm-project/commit/5239371ffa13f30915fe67744be2ea261b74be2a
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
Log Message:
-----------
[SSAF] Group virtual method slots into override families (#213317)
A virtual call site can dispatch to any override, so the parameter and
return slots that occupy the same vtable slot across an override chain are
indistinguishable to a caller. Whole-program consumers therefore have to
treat them as one unit or they will reason about a slot that a call never
actually reaches.
Compute those units up front, keyed per slot, so consumers only need a
map lookup rather than their own traversal of the override relation.
Overloads occupy distinct vtable slots and stay in distinct families.
The family representative is the smallest EntityId in the class, which
keeps the result stable across runs.
§2 of rdar://179151603
Assisted-By: claude
Commit: fa10e634e2be9c16a7fdf01aefe0ed45ab6d1b47
https://github.com/llvm/llvm-project/commit/fa10e634e2be9c16a7fdf01aefe0ed45ab6d1b47
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
Log Message:
-----------
[SLP]Support runtime alias checks versioning for blocks in loops
Allow versioning of blocks inside loops, e.g. fully unrolled inner loop,
whose pointers are advanced by the loop header PHIs. Accept header PHIs
as base objects, use the base values directly in the bounds instead of
recomputing loop-variant bases from their recurrences.
Fixes #49896
Assisted-by: Cursor
Reviewers: RKSimon, bababuck
Pull Request: https://github.com/llvm/llvm-project/pull/226955
Commit: d0adadb4a1838eef7050da75d3526169697b121e
https://github.com/llvm/llvm-project/commit/d0adadb4a1838eef7050da75d3526169697b121e
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64Combine.td
Log Message:
-----------
[AArch64][GlobalISel] Reorganise shuffle combines. NFC (#227268)
Other combines had been added between shuffle lowerings, make sure they
are adjacent. Also remove show extra whitespace whilst here.
Commit: 09c59107ab65919fd2c186e57c183819eb42a5df
https://github.com/llvm/llvm-project/commit/09c59107ab65919fd2c186e57c183819eb42a5df
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/test/MC/AMDGPU/misaligned-vgpr-tuples-err.s
M llvm/test/MC/AMDGPU/out-of-range-registers.s
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: 51258c8a1fafac2b274cfe05a92f31c40fab1f93
https://github.com/llvm/llvm-project/commit/51258c8a1fafac2b274cfe05a92f31c40fab1f93
Author: Valery Pykhtin <valery.pykhtin at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[AMDGPU] Route no-modifier reg-or-inline AsmParser operands through HwMode predicate (#221989)
Follow-up to #221988: routes the no-modifier reg-or-inline operands through the HwMode-split *_AlignTarget register classes, like #221988 did for the with-modifiers ones, so VGPR-tuple alignment is enforced by the operand's register class on subtargets that require aligned VGPRs. NFC on subtargets that don't require aligned VGPRs.
Co-Authored-By: Claude [noreply at anthropic.com](mailto:noreply at anthropic.com)
Commit: 940e03584de8bfbcd86fc25de9a738d067d3a342
https://github.com/llvm/llvm-project/commit/940e03584de8bfbcd86fc25de9a738d067d3a342
Author: Gaëtan Bossu <gaetan.bossu at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/test/CodeGenCXX/pragma-loop-predicate.cpp
M clang/test/CodeGenCXX/pragma-loop-safety.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
Log Message:
-----------
[clang] Also disable scalable vectorisation for vectorize(disable) (#227254)
This ensures that #pragma clang loop vectorize(disable) also disables
scalable vectorisation. Only setting the width to 1 could potentially
enable LoopVectorizer to vectorize with VF = vscale x 1. Especially with
the -scalable-vectorization=preferred option.
Commit: c6a561d18f5d0e5af25200d18a2653b9f18c8e87
https://github.com/llvm/llvm-project/commit/c6a561d18f5d0e5af25200d18a2653b9f18c8e87
Author: Corentin Jabot <corentinjabot at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/test/SemaTemplate/temp_arg_nontype_ref.cpp
M clang/test/SemaTemplate/temp_arg_template_p0522.cpp
Log Message:
-----------
[Clang] Fix a regression introduced by #223645. (#227085)
In #223645, I removed a fixme I thought was no longer necessary. But it
was, our test coverage is just patchy.
This just reintroduces it to fix the regression,
I have not investigated whether there was a better solution.
I got the AI to write as much tests as i could think of, however this
revealed regressions introduced in an earlier version of clang, this
weill be fixed separately.
Reported in
https://github.com/llvm/llvm-project/pull/223645#issuecomment-5868853308
Assisted-By: Opus 5.5
Commit: 39b72080e0399a15b0313b4eb24e3dbb0aee3c08
https://github.com/llvm/llvm-project/commit/39b72080e0399a15b0313b4eb24e3dbb0aee3c08
Author: Jack Vickers <jack.vickers at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Tosa/Transforms/TosaNarrowTypes.cpp
M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
Log Message:
-----------
[mlir][tosa] Preserve non-TOSA ops in narrowing passes (#224594)
The TOSA narrowing passes currently reject operations from non-TOSA
dialects even when their types do not require conversion.
This change marks unknown ops as legal provided that their operand and
result types are legal. This follows the approach used by
TosaConvertIntegerTypeToSignless and allows mixed-dialect IR to pass
through TOSA narrowing.
Adds a lit test for each narrowing pass to prove that mixed-dialect is
allowed.
Updates the i64-to-i32 rollback lit test to continue forcing a
conversion failure using illegal operand and result types.
Assisted by: Codex
Commit: c68b1ff4f6af7ed0f96d65739f3826b0ef0fd26c
https://github.com/llvm/llvm-project/commit/c68b1ff4f6af7ed0f96d65739f3826b0ef0fd26c
Author: Hariprasad Ravishankar <hravisha at mathworks.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Conversion/Passes.td
M mlir/include/mlir/Conversion/TosaToLinalg/TosaToLinalg.h
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalg.cpp
M mlir/lib/Conversion/TosaToLinalg/TosaToLinalgPass.cpp
M mlir/test/Conversion/TosaToLinalg/tosa-to-linalg.mlir
Log Message:
-----------
[mlir][tosa] Add allow-non-finites option for float min/max reduction (#222140)
TosaToLinalg seeds float min/max reductions with the largest finite
value of the element type, but the TOSA spec asks for the infinite
bound.
[§2.9.4](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_reduce_min)
seeds REDUCE_MIN with `maximum_s<in_out_t>()`,
[§4.5.1](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_arithmetic_helpers)
defines that as the type maximum after `make_signed`,
[§4.5.2](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_type_conversion_helpers)
makes `make_signed` a no-op for floats, and Table 5 in
[§1.9](https://www.mlplatform.org/tosa/tosa_spec_1_0_2.html#_supported_number_formats)
gives that maximum as `+infinity` for fp16, bf16, fp32 and fp64.
REDUCE_MAX and ARGMAX mirror it. The symptom is a clamp: reduce an
all-`+Inf` tensor and you get `3.40282347E+38` back.
This adds an `allow-non-finites` option to `tosa-to-linalg` that selects
the conforming seed.
**Why a flag rather than just fixing the seed.** Non-finite values
aren't always wanted. TOSA has a format that can't represent them at all
— Table 5 bounds fp8e4m3_t at ±448, "This format has no encoding for
infinities" — and embedded code generation often disables them wholesale
to avoid the support code, as MATLAB Coder's `SupportNonFinite` does.
llvm/torch-mlir#4363 added the same toggle under the same name to
ConvertTorchToLinalg and friends; today setting it `true` is silently
dropped for graphs routed through TOSA, so the two backends disagree on
the same model. This makes the flag mean something on both paths.
**Why the default is false.** It keeps this pass's current output.
torch-mlir defaults to `true` because it already emitted `-inf`, so in
both projects the default is the no-op, and setting the flag the same
way on both sides is what makes the paths agree.
**The `semanticsHasInf` guard.** `APFloat::getInf` is `llvm_unreachable`
under FiniteOnly semantics and silently returns a NaN under NanOnly
semantics, e.g. f8E4M3FN. Without the guard every fp8 min/max reduction
would return NaN through NaN-propagating `arith.minimumf`, which is
worse than the bug being fixed. Tests pin f8E4M3FN to the ±448 fallback
with the option both on and off.
Three smaller notes. The flag governs only identities the pass invents,
not the NaN that `nan_mode = IGNORE` is required to produce. ARGMAX is
updated for uniformity but is NFC in effect, since its running max only
feeds the `UGT`/`OGT` predicate and its value output is discarded.
`max_pool2d` in TosaToLinalgNamed.cpp is wrong the same way but left
alone here, because its initial value doubles as the `tensor.pad`
padding value and needs its own review.
Every pre-existing test in tosa-to-linalg.mlir now runs under both
settings, via a second RUN line sharing the CHECK prefix with only the
four seed constants split into FINITE/NONFINITE. New cases cover f16,
bf16 and f64 min/max, argmax f16, both f8E4M3FN fallbacks, and the
IGNORE seed. check-mlir-conversion is green.
Developed with AI assistance (Claude Opus 5 via Claude Code) per the
[LLVM AI Tool Use Policy](https://llvm.org/docs/AIToolPolicy.html): the
implementation, the tests, and the first draft of this description were
tool-generated, then reviewed and edited by me before posting.
Co-authored-by: Hariprasad Ravishankar <hravisha at ls-01-1c-a0-b8-77-e7-5d.dhcp.mathworks.com>
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 04d107c5289d7f39d5eadbf559d330e7ac545bc7
https://github.com/llvm/llvm-project/commit/04d107c5289d7f39d5eadbf559d330e7ac545bc7
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/AArch64/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/predicated-costs.ll
M llvm/test/Transforms/LoopVectorize/AArch64/reduction-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/blocks-with-dead-instructions.ll
M llvm/test/Transforms/LoopVectorize/RISCV/dead-ops-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/RISCV/truncate-to-minimal-bitwidth-cost.ll
M llvm/test/Transforms/LoopVectorize/RISCV/type-info-cache-evl-crash.ll
M llvm/test/Transforms/LoopVectorize/VPlan/memory-checks.ll
M llvm/test/Transforms/LoopVectorize/X86/cost-model.ll
M llvm/test/Transforms/LoopVectorize/X86/interleave-cost.ll
M llvm/test/Transforms/LoopVectorize/consecutive-ptr-uniforms.ll
M llvm/test/Transforms/LoopVectorize/if-conversion.ll
M llvm/test/Transforms/LoopVectorize/induction.ll
M llvm/test/Transforms/LoopVectorize/interleaved-accesses-metadata.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization-2.ll
M llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
M llvm/test/Transforms/LoopVectorize/metadata.ll
M llvm/test/Transforms/LoopVectorize/opaque-ptr.ll
M llvm/test/Transforms/LoopVectorize/pointer-select-runtime-checks.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/predicated-inductions-vs-first-order-recurrences.ll
M llvm/test/Transforms/LoopVectorize/runtime-check.ll
Log Message:
-----------
[VPlan] Model first memory runtime checks as VPlan recipes. (#221483)
Add VPlanTransforms::addMemoryRuntimeChecks to generate memory runtime
checks directly as VPlan recipes, re-using VPSCEVExpander. This enables
more CSE/simplification opportunities in VPlan, and in the long term
allows us to remove the current slightly hacky runtime check generation
code, which builds checks up front in IR, and removes them again if we
do not vectorize. This whole dance requires quite a bit of code to make
the removal step transparent if the loop was not vectorized.
The initial patch excludes the following checks from VPlan expansion (to
be added in follow-ups), to keep the initial logic as simple as
possible:
* checks in nested loops (VPlan expansion cannot hoist out of the outer
loop)
* diff checks
* bounds requiring expanding AddRecs (currently AddRecs must be expanded
in the Plan's entry)
The IR block built by GeneratedRTChecks::create() is still needed to
cost the checks and to detect that they folded to a constant. Once all
kinds of runtime checks can be created directly in VPlan, we can compute
their cost via the VPlan-based cost model, like other skeleton blocks.
PR: https://github.com/llvm/llvm-project/pull/221483
Commit: e6d803d0cd96bac00bee2e4b8b23b492f99c1590
https://github.com/llvm/llvm-project/commit/e6d803d0cd96bac00bee2e4b8b23b492f99c1590
Author: HernandezJosze <joseantoniohg at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
M lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
Log Message:
-----------
[lldb][Clike][NFC] Fix for #222611 (#227146)
Fixes #222611
This fixes an issue with Verify being conditionally compiled only when
assertions are enabled
Commit: 9790fc2b212b3f558460a00a5245f614c7c83317
https://github.com/llvm/llvm-project/commit/9790fc2b212b3f558460a00a5245f614c7c83317
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
A llvm/test/CodeGen/ARM/load_store_opt_eraseliveregs.mir
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: bbdca00c2b27b77af439872f608ad6632edcc97a
https://github.com/llvm/llvm-project/commit/bbdca00c2b27b77af439872f608ad6632edcc97a
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
[Github] Temporary fix for #226230 (#227144)
It seems that with actions/checkout we run into a 5 minute timeout
somewhere (presumably in the websocket that communicates between the
runner and workflow pods), which causes actions/checkout to succeed but
without actually writing anything out, causing the rest of the workflow
to fail. This patch fixes that by forcing verbose output, which should
ensure there is no 5 minute period without any output.
This issue doesn't seem to impact other parts of the workflow due to
progress indicators.
Commit: 98241b05dd7e3d84144baa5192af515e199ed976
https://github.com/llvm/llvm-project/commit/98241b05dd7e3d84144baa5192af515e199ed976
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/queue_impl.cpp
M libsycl/src/handler.cpp
M libsycl/src/usm_functions.cpp
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libsycl/unittests/queue/queue.cpp
M libsycl/unittests/usm/alloc.cpp
Log Message:
-----------
[libsycl] Add context to exception's throw. (#224668)
sycl::exception class can contain associated context (see 4.13.2.
Exception class interface).
Specification doesn't declare rules about when context must be
associated and when not.
Passing context to exception ctor in all places where context is
available.
Assisted-by: Claude Code.
---------
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 27c315830887f3da871d3ccdb4bb403d8be034b6
https://github.com/llvm/llvm-project/commit/27c315830887f3da871d3ccdb4bb403d8be034b6
Author: Nopileos Isemados <xen134 at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineSelect.cpp
M llvm/test/Transforms/InstCombine/minmax-fold.ll
Log Message:
-----------
[InstCombine] Use context in select-to-umin nonzero check (#225381)
foldSelectICmpMinMax() queries whether W is nonzero without an
instruction context, missing facts from a preceding llvm.assume or
dominating branch. Querying at the comparison enables the existing
select-to-umin fold.
Fix #225345
Commit: 7759daa2e9a57a4fe6445531b405217096f416bd
https://github.com/llvm/llvm-project/commit/7759daa2e9a57a4fe6445531b405217096f416bd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Serialization/ASTReader.cpp
M llvm/include/llvm/Support/Compression.h
M llvm/lib/Support/Compression.cpp
M llvm/unittests/Support/CompressionTest.cpp
Log Message:
-----------
[LLVM] Infer compression format from zlib and zstd headers (#222773)
Summary:
This PR adds two routines that allow users to decompress bitstreams
without explicitly specifying the format. This is inferred from the
bytes
of the object, returning an error if it could not be identified. The
Zstd
standard exposes proper magic bytes, while Zlib needs to be inferred
through the two header bytes.
Because this is a raw bytestream, there is a chance that someone
could get bytes that pass this check, giving no 'reason', but since
the decompression routine requires the expected size there is no
chance it will falsely succeed.
Commit: 6f75865e374f55e9953309425b293b0e364533fd
https://github.com/llvm/llvm-project/commit/6f75865e374f55e9953309425b293b0e364533fd
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
M flang-rt/lib/runtime/CMakeLists.txt
M offload/CMakeLists.txt
Log Message:
-----------
[flang-rt][Offload] Fix builds using the new amdgpu triple spelling (#227110)
Summary:
The offload cache files, such as `FlangOffload.cmake`, build the AMDGPU
runtimes for `amdgpu-amd-amdhsa`, but flang-rt and offload only
recognize AMDGPU triples beginning with `amdgcn`. Just check both like
we do elsewhere. Eventually this can all be dropped.
Commit: 78aa14e1df4f0fb200c66732c4d06f52baabf69d
https://github.com/llvm/llvm-project/commit/78aa14e1df4f0fb200c66732c4d06f52baabf69d
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Reuse `UnitMaskIdx` lambda in `computeRegUnitLaneMasks` (NFC) (#227249)
This simplifies the code at the expense of losing an assert that checks
that one `SUI` matches more than one `RU`s.
Commit: 2dc95bd763b87ffb563e2a90180bb7e8c49ec16a
https://github.com/llvm/llvm-project/commit/2dc95bd763b87ffb563e2a90180bb7e8c49ec16a
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang/include/clang/AST/Expr.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOverload.cpp
Log Message:
-----------
[clang][AST] Make Result parameter of `isCXX11ConstantExpr` mandatory (#226493)
We want to discourage people from just checking if something is a
constant expression without using the value, which we always compute
anyways.
There are only three call sites, all in clang, and all pass a value
already. Change the parameter type to a reference to enforce this.
Commit: c7b2f3191aab2d563d9146d828a195df6103292f
https://github.com/llvm/llvm-project/commit/c7b2f3191aab2d563d9146d828a195df6103292f
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M openmp/module/CMakeLists.txt
Log Message:
-----------
[OpenMP] Install the Fortran module files with libomp-mod (#227116)
Summary:
The `libomp-mod` install component only contains `omp_lib.h`. The module
files are only installed incidentally as part of the Fortran runtime or
directory copy. Just do this directly. These were intentinoally dropped
in https://github.com/llvm/llvm-project/pull/171515, in favor of the
directory copy. However, this means these are ignored when done through
the specific component target.
Shouldn't affect plain installs.
Commit: a72d784c52d0913e2f3b8e6b6588bf6b769d78dc
https://github.com/llvm/llvm-project/commit/a72d784c52d0913e2f3b8e6b6588bf6b769d78dc
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/cmake/config-ix.cmake
M runtimes/CMakeLists.txt
Log Message:
-----------
[runtimes] Disable sanitizers for configuration checks with --unwindlib=none (#227092)
Summary:
in a sanitized runtimes build, every configuration check is linked with
both -fsanitize=... and --unwindlib=none and fails, because the
sanitizer runtimes need the unwinder. This completes an existing TODO by
suppressing this for the compiler flag checks in this configuration.
This shouldn't affect any existing users. Motivation is compiling
`+asan` multilibs for existing OpenMP/Offloading configurations.
Commit: a3697dc8170d16e07bc4c507bb1d33b9d65a4c3c
https://github.com/llvm/llvm-project/commit/a3697dc8170d16e07bc4c507bb1d33b9d65a4c3c
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/cmake/Modules/AddCompilerRT.cmake
M compiler-rt/cmake/Modules/CompilerRTAIXUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTDarwinUtils.cmake
M compiler-rt/cmake/Modules/CompilerRTUtils.cmake
M compiler-rt/cmake/Modules/SanitizerUtils.cmake
M compiler-rt/lib/asan/CMakeLists.txt
M compiler-rt/lib/asan/scripts/CMakeLists.txt
M compiler-rt/lib/copyprof/CMakeLists.txt
M compiler-rt/lib/dfsan/CMakeLists.txt
M compiler-rt/lib/hwasan/CMakeLists.txt
M compiler-rt/lib/hwasan/scripts/CMakeLists.txt
M compiler-rt/lib/memprof/CMakeLists.txt
M compiler-rt/lib/msan/CMakeLists.txt
M compiler-rt/lib/tsan/rtl/CMakeLists.txt
Log Message:
-----------
[compiler-rt] Give every installed file an install component (#227103)
Summary:
LLVM tries to expose install components to allow distributions to choose
the layers to build. Not all of the compiler-rt artifacts were installed
under this configuration. This PR makes this a consistent rule by
updating the existing helper function to require a parent target for the
component.
Adds things like
```
ninja install-dfsan
```
and ensures this installs everything
```
ninja install-compiler-rt-x86_64-unknown-linux-gnu
```
Commit: bbb61bc6145835abf356b80b0209a462cf6a4486
https://github.com/llvm/llvm-project/commit/bbb61bc6145835abf356b80b0209a462cf6a4486
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/CMakeLists.txt
M offload/languages/cuda/CMakeLists.txt
M offload/languages/hip/CMakeLists.txt
M offload/languages/kernel/CMakeLists.txt
M offload/tools/CMakeLists.txt
M offload/tools/deviceinfo/CMakeLists.txt
M offload/tools/kernelreplay/CMakeLists.txt
Log Message:
-----------
[Offload] Fix installing offload through its install components (#227036)
Summary:
Distribution builds install each runtime through its component's install
target rather than the global `install` target. Several pieces of
offload
did not work with this:
- `install-offload` only depended on `omptarget` and `LLVMOffload`, but
the component also installs `LLVMOffloadKernel`. The install failed
unless something else had already built it.
- The CUDA, HIP, and kernel language headers were installed without a
component, so component installs skipped them.
- The offload tools used `add_llvm_tool` which did not build and/or
install. We already removed `add_llvm_library` from the libraries. Now
these use standard `add_execulable`.
Commit: 64055943ed88d6ad9dea11349c4e9aa736b9b493
https://github.com/llvm/llvm-project/commit/64055943ed88d6ad9dea11349c4e9aa736b9b493
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/CMakeLists.txt
M flang-rt/cmake/modules/AddFlangRT.cmake
Log Message:
-----------
[flang-rt] Install the runtime libraries under the flang-rt component (#227073)
Summary:
The Flang-RT libraries were installed without a component, so they were
placed in `Unspecified` and there was no `install-flang-rt` target. The
runtimes build forwards `install-flang-rt` for every enabled runtime, so
requesting flang-rt in a distribution failed on the missing target, and
component installs skipped the libraries. Add the component and its
install targets, matching the existing `flang-rt-headers` and
`flang-rt-mod` components.
Commit: 16c9bb2ea958e6ca41f46f48b4bdb738524e9459
https://github.com/llvm/llvm-project/commit/16c9bb2ea958e6ca41f46f48b4bdb738524e9459
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/SPIRV/cbuffer_global_elim.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/debugtrap-not-translated.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_abort/trap-ext-disabled.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_bit_instructions_remove_cap_if.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-attributes.ll
M llvm/test/CodeGen/SPIRV/extensions/SPV_KHR_non_semantic_info/preserve-gv-metadata.ll
M llvm/test/CodeGen/SPIRV/get-global-id-non-integer-dim.ll
M llvm/test/CodeGen/SPIRV/linkage/available-externally-global.ll
M llvm/test/CodeGen/SPIRV/malformed-mangled-builtin-name.ll
M llvm/test/CodeGen/SPIRV/transcoding/enqueue_kernel.ll
M llvm/test/CodeGen/SPIRV/vk-pushconstant-layout.ll
Log Message:
-----------
[NFC][SPIR-V] Add spirv-val RUN lines where missing (#227245)
Commit: 48073298f8a637d40eeeb213eac44706bf3f0ea8
https://github.com/llvm/llvm-project/commit/48073298f8a637d40eeeb213eac44706bf3f0ea8
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/plugins-nextgen/amdgpu/dynamic_hsa/hsa.cpp
M offload/plugins-nextgen/cuda/dynamic_cuda/cuda.cpp
Log Message:
-----------
[Offload] Try loading dynamic libraries at global scope first (#227020)
Summary:
The intention of the dynamic path is to provide basic linking in cases
where the SDK is not avaialble at the user's build time. Previously this
did a distinct `dlopen` call on the library.
However, in cases where an existing HSA implementation exists at global
scope this can cause multiple instances to be open at the same time.
Specifically this is problematic if mixing with another implementation
(Like HIP or CUDA) or trying to intercept functions (like compiler-rt).
The compiler-rt interceptors currently carry interceptors into `dlsym`
when we should instead just load these at global scope, this makes them
behave more similar to a direct link in these scenarios, which was the
intention.
The fallback remains as the current behavior, should only trigger in
cases where there is an existing HSA in the process.
Commit: 347b2ed7fd5aef25f45b0f2816b49833d1359dca
https://github.com/llvm/llvm-project/commit/347b2ed7fd5aef25f45b0f2816b49833d1359dca
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/liboffload/API/Common.td
M offload/liboffload/src/OffloadImpl.cpp
M offload/tools/offload-tblgen/EntryPointGen.cpp
M offload/unittests/OffloadAPI/init/olInit.cpp
Log Message:
-----------
[Offload] Lazily initialize platforms in the Offloading API (#227084)
Summary:
The Offloading library wraps around the underlying plugins. The problem
is that we currently initialize all plugins we find, even if they are
not needed for the program. This is very expensive for trivial uses, as
fully heterogenous usage is quite rare. In practice this means that you
will always pay a 200 ms penalty for having CUDA installed.
This patch changes the behavior to provide accessors into the plugins
and devices that allows them to be initialized lazily. We use a
once_flag, this should properly take a fast-path check while still
blocking on concurrent use.
Making full use of this will require a way to filter platforms more
specifically. I'm thinking of what this would look like as an API.
I'm thinking that we either have an extra iterate function that takes a
callback on the platform, or we just provide a helper to find all the
devices that can run a given image. Maybe both?
Fixes: #159636
Realnd of: https://github.com/llvm/llvm-project/pull/163272
Commit: 0d546ff00281aca3e0aa2b81573665f3ddb8b5b9
https://github.com/llvm/llvm-project/commit/0d546ff00281aca3e0aa2b81573665f3ddb8b5b9
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix "leak" of PMR resource in benchmark (#216114)
The benchmark was not releasing the monotonic buffer resource, which
means we'd grow a larger and larger pool as Google Benchmark would go
through more and more iterations of the benchmark.
Commit: 69d96b19d754340e23e5c08acd2ffed0e9920b59
https://github.com/llvm/llvm-project/commit/69d96b19d754340e23e5c08acd2ffed0e9920b59
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
M polly/lib/Support/SCEVAffinator.cpp
Log Message:
-----------
[SCEV] Rename SCEVNoWrapFlags to SCEVFlags (NFC) (#225179)
In preparation to extend the flags that ScalarEvolution can represent,
rename SCEVNoWrapFlags to the more general SCEVFlags. In particular, we
preserve the (get|set)NoWrapFlags interface, which simply masks the
no-wrap flags from the newly-introduced (get|set)Flags.
See also: #225065.
Commit: 96983af41ec1408064d7101c4d49d8f6e5fba1d6
https://github.com/llvm/llvm-project/commit/96983af41ec1408064d7101c4d49d8f6e5fba1d6
Author: Kseniya Tikhomirova <kseniya.tikhomirova at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libsycl/include/sycl/__spirv/spirv_vars.hpp
Log Message:
-----------
[libsycl] Remove libsycl declarations of spirv builtins (#227031)
Assisted-by: Claude Code.
Signed-off-by: Tikhomirova, Kseniya <kseniya.tikhomirova at intel.com>
Commit: 10fd0a4ec7ff6d23dab3920f09d69b7e46a471fb
https://github.com/llvm/llvm-project/commit/10fd0a4ec7ff6d23dab3920f09d69b7e46a471fb
Author: David Green <david.green at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[ARM] Invalidate LiveRegPos when erasing current position (#226937)
The load store optimizer could erase an instruction that is currently
holding the position of the LiveRegPos. Make sure we recalculate
LiveRegs if this happens.
Fixes #223630
Commit: 40666908139b18ca57d2735f6c00827c89837149
https://github.com/llvm/llvm-project/commit/40666908139b18ca57d2735f6c00827c89837149
Author: Tomer Shafir <tomer.shafir8 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
M llvm/lib/Target/RISCV/RISCVMachineScheduler.cpp
M llvm/lib/Target/SystemZ/SystemZHazardRecognizer.cpp
M llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp
Log Message:
-----------
[MISched] Extract `operator<<` for SUnit(NFC) (#226785)
Establish a consistent API for printing a SUnit, rather than a scattered
duplication.
Commit: 72a712b0a552fe1f6e44fa445ea389f6519ef491
https://github.com/llvm/llvm-project/commit/72a712b0a552fe1f6e44fa445ea389f6519ef491
Author: Balázs Benics <benicsbalazs at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
M clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
A clang/unittests/ScalableStaticAnalysis/Serialization/JSONFormatTest/VirtualMethodFamilyFormatTest.cpp
Log Message:
-----------
[SSAF] Serialize virtual method summaries and families (#213318)
Per-TU summaries and whole-program results cross process boundaries, and
the JSON layer refuses to write a summary kind it has no format for.
Register both sides so
--ssaf-extract-summaries=VirtualMethod becomes usable and the
family result survives a round trip.
Deserialization tolerates a missing override list, since a root virtual
method legitimately has none.
§3 of rdar://179151603
Assisted-By: claude
Commit: 7e19707aeebbd0ae3101ddc7347fef7a865154f4
https://github.com/llvm/llvm-project/commit/7e19707aeebbd0ae3101ddc7347fef7a865154f4
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Support/InterfaceSupport.h
M mlir/test/mlir-tblgen/op-interface.td
M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
Log Message:
-----------
[mlir][ODS] Copy constant generated interface model prototypes (#226323)
Generate constexpr constructors for interface models whose concept is a
table of callbacks. Construct exact generated models from a static
prototype; keep external and fallback models on their existing path.
In OpenMPDialect.cpp this saves about 0.22B compiler instructions and
10.5KB of text.
Assisted-by: Codex
Commit: b7cc7eed1c272a0ba4798891e5867b974d0cae14
https://github.com/llvm/llvm-project/commit/b7cc7eed1c272a0ba4798891e5867b974d0cae14
Author: Alex Duran <alejandro.duran at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/test/offloading/shared_lib_global_var.c
Log Message:
-----------
[offload][omp] Add NVIDIA LTO to unsupported list in shlib global var test (#227315)
Commit: 2bf008c3ad7fc34de4a6c9eb1bd8910457d48a34
https://github.com/llvm/llvm-project/commit/2bf008c3ad7fc34de4a6c9eb1bd8910457d48a34
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/Sema/SemaOpenMP.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda_codegen.cpp
Log Message:
-----------
[clang][OpenMP] Fix crashes on target regions inside namespace-scope lambdas and blocks (#226691)
Fixes #223397
A `target` region inside a lambda or block at namespace scope crashed
clang in two places. In Sema, `isOpenMPCapturedDecl` decides whether a
global must be captured by walking the function scope stack down to the
innermost OpenMP captured region, stopping at an ordinary function
scope. The capture initializers of a directive's outermost region are
built after all of its regions have been popped. Inside a function that
walk ends at the function's scope, but a namespace-scope lambda or block
has nothing underneath it, so the walk ran off the stack and asserted.
This happens for any global reference, such as `int &r = x; auto l = []
{ #pragma omp target r = 1; };`. The self-referential declaration in the
report is incidental. Once past Sema, CodeGen asserted too: it names the
outlined kernel after the region's parent function, and such a region
has none, even without a reference.
In Sema, running out of scopes now means the same as reaching a function
scope, so the variable is not captured from the current scope. That is
what the same lambda already gets inside a function. In CodeGen, a
region with no parent function is named after the function being
emitted.
Commit: 14b01288b6a80666538100f8798fe492297e6d0b
https://github.com/llvm/llvm-project/commit/14b01288b6a80666538100f8798fe492297e6d0b
Author: Delaram Talaashrafi <dtalaashrafi at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/OpenACC/Transforms/ACCCGToGPU.cpp
M mlir/test/Dialect/OpenACC/acc-cg-to-gpu-predicate-region-reuse-barrier.mlir
Log Message:
-----------
[mlir][OpenACC] Match reuse barriers to the reused private scope (#225570)
A region that writes both gang- and worker-private slots was considered
to be a gang scope and a barrier was missed. This change keeps the two
store sets separate and pick the barrier from the scope that is actually
reused. Follow-up for
https://github.com/llvm/llvm-project/pull/224437#discussion_r4066418696.
Commit: 0b3eb216bba43c93fb416853aaefd1fb382a7aab
https://github.com/llvm/llvm-project/commit/0b3eb216bba43c93fb416853aaefd1fb382a7aab
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
M llvm/test/Transforms/InstCombine/cos-1.ll
M llvm/test/Transforms/InstCombine/cos-sin-intrinsic.ll
Log Message:
-----------
[InstCombine] Don't fold `sin(-x)` to `-sin(x)` if `denormals` may flush to `+0.0` (#227039)
Commit: 7fb36ba334861cb92245f8e4535bc14d068f8776
https://github.com/llvm/llvm-project/commit/7fb36ba334861cb92245f8e4535bc14d068f8776
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/PFTBuilder.cpp
A flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-branch-into-body.f90
A flang/test/Lower/pre-fir-tree-unstructured-internals.f90
M flang/test/Lower/trailing-cycle.f90
Log Message:
-----------
[flang] Detect loops whose branching is confined to their body (#225757)
A DO loop is classified as either structured or unstructured, and a
single raw branch anywhere in its body forces the loop -- and every
construct enclosing it -- onto the unstructured path.
That is stronger than necessary. A loop keeps its structured control
flow as long as its branching neither leaves its body nor enters it from
outside. Classify such a loop separately from a fully unstructured one.
This only classifies: lowering is unchanged. PFT dumps mark the new
classification with '~', which is what the tests key on.
Commit: 13b63a519fcc542667e0ebaa7ffa930e821b531c
https://github.com/llvm/llvm-project/commit/13b63a519fcc542667e0ebaa7ffa930e821b531c
Author: Shravan Sheth <shrashet at qti.qualcomm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/Hexagon/live-vars/live-outs.ll
Log Message:
-----------
[Hexagon] Add missing -mtriple to live-outs test (#227079)
This test's RUN command did not specify a target triple, so lit could
execute it using the host target.
This causes the test to fail when LLVM is built with only the Hexagon
target enabled. Add -mtriple=hexagon so the test consistently runs as a
Hexagon test.
Commit: 236e0ee3d763814d16b3d7947ba740fe4d4e31be
https://github.com/llvm/llvm-project/commit/236e0ee3d763814d16b3d7947ba740fe4d4e31be
Author: John Brawn <john.brawn at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/SROA.cpp
M llvm/test/Transforms/SROA/load-store-overlap.ll
Log Message:
-----------
[SROA] Remove splitSliceTails loop in presplitLoadsAndStores (#227061)
The asserts in this loop can trigger when we presplit an overlapping
load/store pair, and the extra splits it adds don't appear to have any
benefit: we only get them when we have an unsplittable slice that's
fully enclosed inside a splittable slice, and in the test I've managed
to create for this (no_move_enclosed_unsplittable_store, and there are
no existing tests for this) the final SROA output is the same (except
that the variables end up with different names).
Commit: fb1a7d048b4eb2f9a855e961f59c0a4b7bd5ee8b
https://github.com/llvm/llvm-project/commit/fb1a7d048b4eb2f9a855e961f59c0a4b7bd5ee8b
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/Transforms/LoopVectorize/ARM/tail-folding-scalar-epilogue-fallback.ll
M llvm/test/Transforms/LoopVectorize/X86/induction-costs.ll
M llvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization-liveout.ll
M llvm/test/Transforms/LoopVectorize/pr59319-loop-access-info-invalidation.ll
M llvm/test/Transforms/LoopVectorize/select-last-index-fp.ll
M llvm/test/Transforms/PhaseOrdering/AArch64/hoist-runtime-checks.ll
Log Message:
-----------
[LV] Regenerate some CHECK lines (#226468)
Commit: 0cf09fc077d86dd454a58a292da8c047efe64af9
https://github.com/llvm/llvm-project/commit/0cf09fc077d86dd454a58a292da8c047efe64af9
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
A llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Move the rescheduled copy chain back to front (#227289)
rescheduleMIBelowKill sinks an instruction below the kill of its tied
source, along with the run of copies that follows it. With LiveIntervals
the copies are spliced one at a time so handleMove sees a well-formed
block, but they were visited front to back and each inserted before the
previously moved one. This reversed them, and transiently moved a copy
below its use, asserting in handleMoveDown.
Walk them back to front instead, which also preserves the original
order.
Exposed by #225174, which made LiveIntervals available here by default.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 34ba34d7f9bd2c756db7df96d3a5be39f006aa19
https://github.com/llvm/llvm-project/commit/34ba34d7f9bd2c756db7df96d3a5be39f006aa19
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/test/Transforms/InstCombine/bitreverse.ll
M llvm/utils/profcheck-xfail.txt
Log Message:
-----------
[InstCombine] Fix ProfCheck for optimizing bitreverse (#227189)
Commit: 15ec5f2940998ddd77be1571a0d4b932b5a2878a
https://github.com/llvm/llvm-project/commit/15ec5f2940998ddd77be1571a0d4b932b5a2878a
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/AMDGPU/bitcast-vector-extract.ll
Log Message:
-----------
[AMDGPU] Replace GCN-NOT with autogen checks in test (#227148)
The assembly has many v_mov_b32s, so minor scheduling changes can
trigger failure on the GCN-NOT. It seems the test is designed to show
CSE behavior, which still holds even if minor scheduling changes break
the NOT checks.
Commit: e15e5e67f6d5e0fc44c011381a53357a2bd843bf
https://github.com/llvm/llvm-project/commit/e15e5e67f6d5e0fc44c011381a53357a2bd843bf
Author: Folkert de Vries <folkert at folkertdev.nl>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/test/Analysis/CostModel/AArch64/clmul-fixed.ll
M llvm/test/Analysis/CostModel/AArch64/clmul-scalable.ll
M llvm/test/Analysis/CostModel/X86/clmul.ll
M llvm/test/CodeGen/AArch64/clmul-scalable.ll
M llvm/test/CodeGen/AArch64/clmul.ll
M llvm/test/CodeGen/PowerPC/clmul-vector.ll
M llvm/test/CodeGen/RISCV/clmul.ll
M llvm/test/CodeGen/RISCV/clmulh.ll
M llvm/test/CodeGen/RISCV/clmulr.ll
M llvm/test/CodeGen/RISCV/rvv/clmul-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/clmulh-sdnode.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmul.ll
M llvm/test/CodeGen/RISCV/rvv/fixed-vectors-clmulh.ll
M llvm/test/CodeGen/Thumb2/mve-clmul.ll
M llvm/test/CodeGen/X86/clmul-vector-256.ll
M llvm/test/CodeGen/X86/clmul-vector-512.ll
M llvm/test/CodeGen/X86/clmul-vector.ll
M llvm/test/CodeGen/X86/clmul.ll
Log Message:
-----------
[ISel] Improve `clmul` fallback implementation (#204802)
Generalize the approach from
https://github.com/llvm/llvm-project/pull/203727 to narrower and wider
integers.
We still need the fallback for when multiplication isn't available, and
it turns out that for some widths the fallback emits fewer instructions,
the naive fallback is still used for `i1`, `i3`, `i4` and `i9`. I've
also now enabled wider integers (`i128` and `i256` have uses in
cryptography).
Based on my local experiments, the Karatsuba approach (e.g. as in
https://github.com/rust-lang/rust/pull/152132#discussion_r2778609222) is
not actually better than zero extending the input and using
multiplication with holes on the wider type.
CC https://github.com/llvm/llvm-project/issues/203694
CC: @eisenwave
Commit: 09cdef016cfc756b29002cd7870c63b7f1b09c6b
https://github.com/llvm/llvm-project/commit/09cdef016cfc756b29002cd7870c63b7f1b09c6b
Author: DylanFleming-arm <85629460+DylanFleming-arm at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/cosf.h
A libc/src/__support/math/cosf_double_eval.h
A libc/src/__support/math/cosf_float_eval.h
M libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf_double_eval.h
A libc/src/__support/math/sinf_float_eval.h
M libc/test/src/math/CMakeLists.txt
R libc/test/src/math/cosf_float_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
R libc/test/src/math/exhaustive/cosf_float_test.cpp
M libc/test/src/math/exhaustive/cosf_test.cpp
R libc/test/src/math/exhaustive/sinf_float_test.cpp
M libc/test/src/math/exhaustive/sinf_test.cpp
R libc/test/src/math/sinf_float_test.cpp
M libc/test/src/math/sinf_test.cpp
Log Message:
-----------
[libc][math] Reorganize sinf and cosf function selection (#226529)
Reorganises sinf and cosf similarly to #224735 such that:
src/__support/math/func.h selects implementation, and
src/__support/math/func_<type>_eval.h implements func with <type> as the
intermediate computational type.
Commit: 1b5f644b9e3f9dbd9ce061dbfaf9188510cf82cf
https://github.com/llvm/llvm-project/commit/1b5f644b9e3f9dbd9ce061dbfaf9188510cf82cf
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[libc++] Encode the standard version in the ABI tag (#218527)
This prevents ODR mismatch issues from biting us across standard
versions. The order of elements in the ABI tag is now: libc++ version,
hardening mode, assertion semantic, exceptions, standard version.
Fixes #218524
Commit: 6cd0f021ec7372be132b00ff2847822a77966a57
https://github.com/llvm/llvm-project/commit/6cd0f021ec7372be132b00ff2847822a77966a57
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang-rt/cmake/modules/AddFlangRTOffload.cmake
M flang-rt/include/flang-rt/runtime/io-stmt.h
M flang-rt/include/flang-rt/runtime/work-queue.h
M flang-rt/lib/runtime/CMakeLists.txt
M flang-rt/lib/runtime/io-api-common.h
M flang/include/flang/Common/api-attrs.h
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
The amdgcn libflang_rt.runtime.a has undefined references to the DescriptorIoTicket/DerivedIoTicket methods and to flang_rt_verbose_abort. The tickets live in descriptor-io.cpp, which isn't in gpu_sources, but the work queue still refers to them. Any device code that ends up in the work queue (e.g. ALLOCATE of a derived type with default initialization in a target region) then fails to link.
The CUDA PTX build already avoids this with a thin I/O mode. This renames `RT_CUDA_THIN_IO` to `RT_THIN_IO`, defines it in api-attrs.h for the native GPU builds (`RT_GPU_TARGET` without `RT_DEVICE_COMPILATION`), and keeps the CMake define for the CUDA PTX library under the new name. flang_rt_verbose_abort is defined in stl-overrides.cpp, so that's added to gpu_sources.
Tested on gfx90a. The amdgcn library no longer has those undefined symbols, gains only the flang_rt_verbose_abort definition, and doesn't lose any others. A small reproducer (derived type with default init allocated inside a target region) links and runs, and scalar PRINT from device code gives the same output as before. The host library's symbols are identical to before. I haven't built nvptx or the CUDA offload configuration.
Downstream report: ROCm/llvm-project#3517
Commit: 5274c3a051776d95c0314d80ffd84b45be1539d3
https://github.com/llvm/llvm-project/commit/5274c3a051776d95c0314d80ffd84b45be1539d3
Author: Spencer Bryngelson <sbryngelson at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
Log Message:
-----------
[flang-rt] Use thin I/O in the native GPU builds (#226307)
Commit: e65dba4fb29967ab597ca0acb4ec174c1016cd28
https://github.com/llvm/llvm-project/commit/e65dba4fb29967ab597ca0acb4ec174c1016cd28
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/test/Profile/branch-logical-mixed.cpp
M clang/test/Profile/c-captured.c
M clang/test/Profile/c-general.c
M clang/test/Profile/c-ternary.c
M clang/test/Profile/cxx-class.cpp
M clang/test/Profile/cxx-lambda.cpp
M clang/test/Profile/cxx-rangefor.cpp
M clang/test/Profile/cxx-stmt-initializers.cpp
M clang/test/Profile/cxx-templates.cpp
M clang/test/Profile/cxx-throws.cpp
M clang/test/Profile/objc-general.m
M compiler-rt/test/sanitizer_common/TestCases/sanitizer_coverage_allowlist_ignorelist.cpp
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multi-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-multiple-blocks-return.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-non-kernel-declaration.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-dynamic-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-function-param.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-lower-all.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-nested.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access-no-kernel-lds-id.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-indirect-access.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-O0.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-no-heap-ptr.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomic-cmpxchg-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-atomicrmw-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test-memintrinsic-asan.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-test.ll
M llvm/test/CodeGen/AMDGPU/amdgpu-sw-lower-lds-static-lds-vector-ptrs.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor-constexpr-alias.ll
M llvm/test/CodeGen/AMDGPU/lower-ctor-dtor.ll
M llvm/test/CodeGen/AMDGPU/lower-multiple-ctor-dtor.ll
M llvm/test/CodeGen/DirectX/llc-vector-store-scalarize.ll
M llvm/test/CodeGen/DirectX/scalar-load.ll
M llvm/test/CodeGen/RISCV/riscv-promote-constant.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_abilist.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_call.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_load.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_mem_intrinsic.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_other_ops.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_phi.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_select.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store.ll
M llvm/test/Instrumentation/DataFlowSanitizer/origin_store_threshold.ll
M llvm/test/Instrumentation/InstrProfiling/amdgpu-contiguous-counters.ll
M llvm/test/Instrumentation/InstrProfiling/conditional-counter-updates.ll
M llvm/test/Instrumentation/NumericalStabilitySanitizer/basic.ll
M llvm/test/Instrumentation/SanitizerCoverage/missing_dbg.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/gather-scatter-opt.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt-inseltpoison.ll
M llvm/test/Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
M llvm/test/Transforms/LowerIFunc/ifunc-alias.ll
M llvm/test/Transforms/LowerIFunc/ifunc-program-addrspace.ll
M llvm/test/Transforms/LowerIFunc/lower-ifunc.ll
M llvm/test/Transforms/LowerMatrixIntrinsics/const-gep.ll
M llvm/test/Transforms/PGOProfile/counter_promo.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_catchswitch.ll
M llvm/test/Transforms/PGOProfile/counter_promo_exit_merge.ll
M llvm/test/Transforms/PGOProfile/counter_promo_mexits.ll
M llvm/test/Transforms/PGOProfile/counter_promo_sampling.ll
M llvm/test/Transforms/PGOProfile/instr_entry_bb.ll
M llvm/test/Transforms/SROA/phi-gep.ll
M llvm/test/tools/llvm-reduce/ifunc-alias.ll
M llvm/test/tools/llvm-reduce/remove-ifunc-program-addrspace.ll
M llvm/test/tools/llvm-reduce/remove-ifunc.ll
M polly/test/CodeGen/MemAccess/codegen_constant_offset.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type.ll
M polly/test/ScopInfo/invariant_load_access_classes_different_base_type_escaping.ll
Log Message:
-----------
[IRBuilder] Produce canonical constexpr GEPs (#226425)
This switches the IRBuilder to always produce canonical constexpr GEPs
in ptradd form, including in the case where ConstantFolder rather than
TargetFolder is used.
This is done in a slightly hacky way, by passing the DataLayout from the
insertion point into FoldGEP. In the future, when we start
canonicalizing the non-constant GEPs as well, we'll do the
canonicalization directly in IRBuilder and replace FoldGEP with
FoldPtrAdd. (Though it would be even better to make IRBuilder always
require a DataLayout and eliminate the ConstantFolder/TargetFolder
distinction...)
Commit: 976a04b549b3e91e51eb7676d86caa8c34a63571
https://github.com/llvm/llvm-project/commit/976a04b549b3e91e51eb7676d86caa8c34a63571
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
A llvm/test/CodeGen/SystemZ/zos-extern-weak.ll
Log Message:
-----------
[SystemZ][z/OS] Keep weak references weak (#226840)
Fixes #226835.
An `extern_weak` reference must stay unresolved without an error when
the symbol does not exist. On z/OS two kinds of references were always
strong:
- Taking the address of an external function goes through the indirect
symbol `<name>@indirect` (ADA slot `MO_ADA_INDIRECT_FUNC_DESC`). It
never got the weak attribute of the function symbol. The weak attribute
is already set on the function symbol when the ADA is emitted, because
`AsmPrinter::doFinalization` emits the weak references before
`emitEndOfAsmFile`. So the indirect symbol now becomes a weak reference
too.
- An external data reference is a part reference (PR). `GOFF::PRAttr`
had no binding strength, and the PR constructor in `GOFFObjectWriter`
did not set it. `PRAttr` gets a `BindingStrength` field, and
`defineExtern` passes the strength of the symbol.
Without this change, a C program with `extern int wv
__attribute__((weak));` and `extern void wf(void)
__attribute__((weak));` that takes `&wv` and `wf` fails to bind on z/OS
3.1 (IEW2456E for `wv` and `wf`). With the change it binds, and at run
time both addresses are null, as on other targets.
Tests: new `zos-extern-weak.ll` checks `WXTRN wf at indirect` in the HLASM
output and the binding strength of the ER and PR symbols in the object
file. `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported). Without the fix, both checks of
the new test fail.
Found while porting Free Pascal to z/OS (`weakexternal`).
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: b3b5e3303fdaec4bcc524bf834a9bed77c164fc2
https://github.com/llvm/llvm-project/commit/b3b5e3303fdaec4bcc524bf834a9bed77c164fc2
Author: Kareem Ergawy <kergawy at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M flang/include/flang/Lower/AbstractConverter.h
M flang/include/flang/Lower/PFTBuilder.h
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Lower/PFTBuilder.cpp
M flang/test/Lower/OpenACC/acc-cache.f90
A flang/test/Lower/OpenACC/acc-unstructured-internals.f90
M flang/test/Lower/OpenACC/acc-unstructured.f90
R flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
A flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
M flang/test/Lower/OpenMP/wsloop-unstructured-cycle.f90
A flang/test/Lower/OpenMP/wsloop-unstructured-internals.f90
M flang/test/Lower/always-execute-loop-body.f90
A flang/test/Lower/do-loop-branch-to-loop-header.f90
M flang/test/Lower/do-loop-infinite-body-cycle.f90
M flang/test/Lower/do_loop_unstructured.f90
M flang/test/Lower/select-case-statement.f90
Log Message:
-----------
[flang] Lower loops whose branching is confined to their body structurally (#225758)
Such a loop was classified separately by a previous change but still
lowered as a raw CFG, so its structured form was lost.
Lower it structurally instead, with its body folded into a region that
can hold the branching. The loop keeps its bounds on the op, so it
remains available to whatever transforms or parallelizes it. Only the
body is folded: the loop control statements are emitted as they are for
any structured loop, since a branch from outside may target either of
them.
Loops an OpenACC or OpenMP directive owns are lowered the same way, so
they keep their form too.
Commit: 907a8095efa25c68ee6c3354830f9c632518dd69
https://github.com/llvm/llvm-project/commit/907a8095efa25c68ee6c3354830f9c632518dd69
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Fix out-of-bounds read in the associative container query benchmarks (#227070)
The query benchmarks for associative containers would access the pool of
keys to use in the benchmark out-of-bounds.
Commit: 3b8bb27206645009167c62fc422c33be7246bc5a
https://github.com/llvm/llvm-project/commit/3b8bb27206645009167c62fc422c33be7246bc5a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
Log Message:
-----------
[libc++] Use a union for uninitialized storage in associative container benchmarks (#227068)
This removes the need for reinterpret_cast when accessing the containers
constructed in the scratch space, and fixes the PMR constructor
benchmark passing the wrong pointer to DoNotOptimize.
Commit: 7dadbf7cda25adeeac6b513226105b9ea432ab8a
https://github.com/llvm/llvm-project/commit/7dadbf7cda25adeeac6b513226105b9ea432ab8a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
Log Message:
-----------
[libc++] Fix use-after-free in the monotonic_buffer benchmark (#227072)
We would release the monotonic_buffer_resource before the closing brace,
which runs the destructor of the list and accesses the nodes.
Commit: a2b6f776837db7b88059abe4c22741cca47fe901
https://github.com/llvm/llvm-project/commit/a2b6f776837db7b88059abe4c22741cca47fe901
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks-alloca.ll
Log Message:
-----------
[SLP]Fix alloca handling in runtime alias check versioning (#227341)
Do not duplicate allocas when versioning a block: keep the leading
static allocas in the header block and reject blocks with any other
alloca. Duplicating them moved static allocas out of the entry block
and merged the clones through a PHI, which is invalid for lifetime
markers.
Fixes #227328
Commit: b690595c4005015840065bcf1006ef46ba05d6b7
https://github.com/llvm/llvm-project/commit/b690595c4005015840065bcf1006ef46ba05d6b7
Author: Q <60785373+StarryCSF at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Add packed multiply high parts accumulate intrinsics (#224261)
Add intrinsics, Clang builtins and SelectionDAG support for the RISC-V P
multiply high accumulate with byte/halfword index operations.
See
https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-high-parts-accumulate.
The pmhacc.h.bXX forms operate on the whole register and select directly
on both RV32 and RV64.
The pmhacc.w.hXX forms select directly on RV64, on RV32 there is no
64-bit packed form, so the intrinsics split into a pair of scalar
mhacc.h0/mhacc.h1 accumulations, one per result word.
Commit: b0fb9358d471a0436b72b0f117bf9d1a1ca3216e
https://github.com/llvm/llvm-project/commit/b0fb9358d471a0436b72b0f117bf9d1a1ca3216e
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/test/CodeGen/X86/frem.ll
M llvm/test/CodeGen/X86/half.ll
M llvm/test/CodeGen/X86/i64-mem-copy.ll
M llvm/test/CodeGen/X86/oddshuffles.ll
M llvm/test/CodeGen/X86/subvectorwise-store-of-vector-splat.ll
M llvm/test/CodeGen/X86/vector-half-conversions.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-3.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-2.ll
M llvm/test/CodeGen/X86/vector-interleaved-load-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i16-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-5.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i32-stride-8.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-4.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-6.ll
M llvm/test/CodeGen/X86/vector-interleaved-store-i8-stride-8.ll
M llvm/test/CodeGen/X86/vector-shuffle-512-v64.ll
M llvm/test/CodeGen/X86/vector-shuffle-concatenation.ll
M llvm/test/CodeGen/X86/x86-interleaved-access.ll
Log Message:
-----------
[X86] LowerStore - peek through oneuse bitcasts to see if vector is freely splittable. (#227282)
Peek through bitcasts when seeing if we can avoid an unnecessary
concat_vectors and store the subvectors directly - if the concat had
been worth it, combineConcatVectorOps would have moved the concat
further up.
Helps avoid more cases of unnecessary vzeroupper, 256-bit usage etc. in
particular on AVX1 targets (Sandybridge, Jaguar and Bulldozer all
benefit from this), but AVX2/512 targets as well.
Commit: 2c9a8d473b7b9bfe1e070e2456a7d57a55790201
https://github.com/llvm/llvm-project/commit/2c9a8d473b7b9bfe1e070e2456a7d57a55790201
Author: MMS IT GmbH <info at mms-it.ch>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
M llvm/test/CodeGen/SystemZ/zos-lower-constant.ll
Log Message:
-----------
[SystemZ][z/OS] Use a function descriptor for external functions in initializers (#226682)
The address of an external function in a static initializer was emitted
as a V-con, i.e. the entry point, while an XPLINK function pointer must
point to a function descriptor. A call through such a pointer loads the
environment and entry point from the machine code of the function.
Create a descriptor in the ADA for external functions as well, as is
already done for internal functions and for constructor/destructor lists
(`emitXXStructorList`).
`zos-lower-constant.ll` is updated: the pointer to the external function
`bar` now points to its descriptor in the ADA.
A minimal program (`int (*p)(void) = ext;` called from `main`) ended
with S0C6 at address `0707070707070707` on z/OS 3.1; with this change it
returns the expected value.
Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1303 passed, 19 unsupported).
Fixes #226658.
Assisted-by: Claude Code (Anthropic)
🤖 Generated with [Claude Code](https://claude.com/claude-code)
Commit: 36422efb8f9d62924dbd43a2cacd1e44c68cb9a8
https://github.com/llvm/llvm-project/commit/36422efb8f9d62924dbd43a2cacd1e44c68cb9a8
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/unittests/Bitcode/DataLayoutUpgradeTest.cpp
Log Message:
-----------
[llvm] Upgrade ARM data layouts that are missing Fi8 (#224639)
Such as the ones in
https://github.com/llvm/llvm-test-suite/tree/main/Bitcode/simd_ops,
which started failing to compile after
https://github.com/llvm/llvm-project/pull/224012
stopped us overriding the module data layout.
fatal error: error in backend: Can't create a MachineFunction using a
Module with a Target-incompatible DataLayout attached
Target DataLayout: e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64
Module DataLayout: e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64
The old layout is p32:32-i64, the new is p32:32-Fi8-i64.
In this change I have added this case to the data layout upgrades. If
there's no p32:32, the layout is not changed, also if there is already a
"Fi" or "Fn" in the layout. These cases may not exist or be valid in
reality, but I need some fallback behaviour just in case.
Commit: bbc6e8fb045cad3cb7291ffa9320a1c1b5810c82
https://github.com/llvm/llvm-project/commit/bbc6e8fb045cad3cb7291ffa9320a1c1b5810c82
Author: David Spickett <david.spickett at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
Log Message:
-----------
[lldb][AArch64][Linux] Add llvm_unreachable after some RegisterSetType switches (#223375)
The ones where you are supposed to case X: return Y;. We do enable the
not fully covered switch warning, so the unreachable just makes the
mistake more obvious.
I did not change GetInvalidationMask because this will be refactored by
#223373.
Commit: 046e55ba043775c28db139395303fcc467d18a1b
https://github.com/llvm/llvm-project/commit/046e55ba043775c28db139395303fcc467d18a1b
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/include/list
M libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/push_range_container_adaptors.h
M libcxx/test/std/containers/container.adaptors/queue/queue.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/queue/queue.defn/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.defn/push_range.pass.cpp
Log Message:
-----------
[libc++] Add coverage for push_range on stack/queue with non-default underlying containers (#210730)
This increases the test coverage for stack/queue and actually caught an
issue in list::__invariants which was previously dead code.
Commit: e90c043329524ac718a3d04189ffe960936e8719
https://github.com/llvm/llvm-project/commit/e90c043329524ac718a3d04189ffe960936e8719
Author: Joseph Huber <huberjn at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/offload/ubsan_offload_hsa_interceptors.cpp
Log Message:
-----------
[compiler-rt] Remove dlsym interceptor for HSA UBSan (#227022)
Summary:
This existed to handle the OpenMP case that dynamically opened via
`dlsym`. However, https://github.com/llvm/llvm-project/pull/227020
removes the need for this by first checking the global space first.
The main motivation is that the `dlsym` interceptor layer was the most
janky part of this whole affair and was a major blocker to supporting
`-shared-libsan` in https://github.com/llvm/llvm-project/pull/226551.
Commit: 8ce1ee44b2f777797df77b5421c66efbe986d3d1
https://github.com/llvm/llvm-project/commit/8ce1ee44b2f777797df77b5421c66efbe986d3d1
Author: Jack Frankland <jack.frankland at arm.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/lib/Dialect/Arith/Utils/Utils.cpp
A mlir/unittests/Dialect/Arith/ArithUtilsTest.cpp
A mlir/unittests/Dialect/Arith/CMakeLists.txt
M mlir/unittests/Dialect/CMakeLists.txt
Log Message:
-----------
[mlir][arith] Support equal-width float conversions (#225346)
Use arith.convertf in convertScalarToDtype when converting between
floating-point types that have the same bit width but different
semantics.
Add focused unit coverage for f16-to-bf16 and bf16-to-f16 conversions.
Assisted-by: Codex
Commit: e3c719620d5e827d5b81851c1714e0abd2b88dfc
https://github.com/llvm/llvm-project/commit/e3c719620d5e827d5b81851c1714e0abd2b88dfc
Author: Akash Dutta <137309513+akadutta at users.noreply.github.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/PowerPC/PPCISelLowering.cpp
M llvm/lib/Target/PowerPC/PPCISelLowering.h
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.h
A llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.ll
M llvm/test/CodeGen/AMDGPU/loop-header-align-gfx950.mir
Log Message:
-----------
[AMDGPU] Don't apply gfx950 fetch-window loop align to the wrong block (#221821)
MachineBlockPlacement aligns the backedge destination after loop
rotation, which may not be the LoopInfo header. Query that block for the
32-byte request and the 4-byte pad cap so they stay consistent.
## Summary
- Pass the block being aligned into `getPrefLoopAlignment` so gfx950
fetch-window alignment uses the backedge destination, not only the
LoopInfo header.
- Unrotated 8-byte headers still get capped.
- Rotated 4-byte landing pads are no longer given uncapped 32-byte
alignment.
Commit: 3272c2894cbe0687fd7ba924f8fdfa770d630b14
https://github.com/llvm/llvm-project/commit/3272c2894cbe0687fd7ba924f8fdfa770d630b14
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .github/workflows/test-suite/aarch64.cmake
Log Message:
-----------
[GitHub] Fix test-suite.yml FFmpeg build with AArch64 (#227346)
On AArch64 there are assembly files that need CMAKE_ASM_COMPILER_TARGET
and CMAKE_ASM_FLAGS_INIT set
Commit: 05a75e831476a8446d9319f56ce46851da86fb68
https://github.com/llvm/llvm-project/commit/05a75e831476a8446d9319f56ce46851da86fb68
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/DenseMap.h
Log Message:
-----------
[ADT] Move DenseMapIterator above DenseMapBase (NFC) (#227208)
This patch moves the definition of DenseMapIterator right above
DenseMapBase so that all classes in DenseMap.h are defined in the
bottom-up order without forward declarations:
- DenseMapStorage
- SmallDenseMapStorage
- DenseMapIterator
- DenseMapBase
- DenseMap
- SmallDenseMap
Assisted-by: Antigravity
Commit: 91b08a503f4f712ea8ce83dc3887f8be7738e95a
https://github.com/llvm/llvm-project/commit/91b08a503f4f712ea8ce83dc3887f8be7738e95a
Author: Nathan Corbyn <n_corbyn at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
Log Message:
-----------
[MISched](NFC) Factor control dependency construction state and logic out of `buildSchedGraph` (#226533)
Continuing the groundwork for a proper implementation of #205689, factor
the control dependency construction state and logic out of
`ScheduleDAGInstrs` into a friend class. This will also enable us to
further break up `buildSchedGraph` to make, e.g., the barrier chain
handling easier to comprehend.
Commit: f30100d7c010bbd856aea19aa5b54880ffd2f58c
https://github.com/llvm/llvm-project/commit/f30100d7c010bbd856aea19aa5b54880ffd2f58c
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libcxx/utils/ci/lnt/dispatch-benchmarks
M libcxx/utils/ci/lnt/run-benchmarks
Log Message:
-----------
[libc++][NFC] Fix typos in the LNT tooling (#227347)
Commit: 08ba06eaa556554c8afb52dad73ff70eb4bf60ec
https://github.com/llvm/llvm-project/commit/08ba06eaa556554c8afb52dad73ff70eb4bf60ec
Author: Vijay Kandiah <vkandiah at nvidia.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/OpenACC/OpenACCUtilsTiling.h
M mlir/lib/Dialect/OpenACC/Transforms/ACCLoopTiling.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCUtilsTiling.cpp
M mlir/test/Dialect/OpenACC/acc-loop-tiling.mlir
Log Message:
-----------
[mlir][OpenACC] Fix tile clause element bounds for descending loops (#227185)
acc.loops could have negative steps, but ACCLoopTiling computed each
element loop's bound assuming an ascending one. Both halves of that
computation were wrong for a descending dimension: the inclusive edge
subtracted one instead of adding one, and the bound was clamped with min
instead of max.
For `DO j = n, floor, -1` under `tile(32)`, the last tile's bound came
out as `min(floor, j - 33)`, which selects `j - 33` whenever it falls
below the floor. The element loop then ran past the end of the iteration
space, reading and writing outside the array.
With this change, we pick the clamp and the inclusive edge from the
step's direction. When the sign is only known at runtime, we compute
both and select on it.
The tiling tests had no coverage of negative steps or of inclusive upper
bounds. This patch adds four new tests: descending, descending with an
inclusive bound, ascending with an inclusive bound, and a runtime-signed
step.
Commit: c3460c8c55e3b98912d7444518f3d7b98de8ae9c
https://github.com/llvm/llvm-project/commit/c3460c8c55e3b98912d7444518f3d7b98de8ae9c
Author: Tom Honermann <tom.honermann at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
Log Message:
-----------
[Clang][docs] Markup corrections for attribute documentation (#226729)
The conversion of Clang attribute documentation from reST to MyST
markdown did not transform markup correctly in all cases. Additionally,
some PRs that were originally authored for reST were merged after the
conversion resulting in reST formatted markdown getting re-introduced.
This change corrects all such cases the author was able to identify,
applies markup that was previously missing, corrects a few typos along
the way, and even adds a missing attribute documentation reference that
has prevented the `#pragma clang loop` `pipeline` and
`pipeline_initiation_interval` documentation from being published since
2019.
Commit: 9cafc5e731d39b5f5879c77e4e217f9cc76a2711
https://github.com/llvm/llvm-project/commit/9cafc5e731d39b5f5879c77e4e217f9cc76a2711
Author: Oleksandr Tarasiuk <oleksandr.tarasiuk at outlook.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/test/CXX/basic/basic.start/basic.start.main/p2.cpp
M clang/test/SemaTemplate/GH71595.cpp
Log Message:
-----------
[Clang] prevent instantiation of invalid friend function templates (#227038)
Fixes #226673
---
This patch addresses the issue in which an invalid friend function
template is instantiated as a valid declaration, leading to a crash upon
a later redeclaration.
---
This fixes a regression introduced by
https://github.com/llvm/llvm-project/pull/216555
Commit: d909762a50d59d3d37f7008f23719efe6dd353b7
https://github.com/llvm/llvm-project/commit/d909762a50d59d3d37f7008f23719efe6dd353b7
Author: Hansang Bae <hansang.bae at intel.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M offload/plugins-nextgen/common/src/PluginInterface.cpp
Log Message:
-----------
[Offload] Remove unreachable code (#227100)
The function already has an early return after failed allocation.
Commit: ca811cfa9e82f7e9f0ceaafb3bda23b9ae896251
https://github.com/llvm/llvm-project/commit/ca811cfa9e82f7e9f0ceaafb3bda23b9ae896251
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
R llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
Log Message:
-----------
[RISCV] Remove combineTruncSelectToSMaxUSat. (#227162)
This is covered by InstCombine for the motivating benchmark.
Commit: 55400d78d517f37aa4a53dc5a6a589e96a30a47f
https://github.com/llvm/llvm-project/commit/55400d78d517f37aa4a53dc5a6a589e96a30a47f
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/CodeGen/DIE.h
Log Message:
-----------
[CodeGen] Remove DIE::setForceChildren and DIE::ForceChildren (NFC) (#227207)
The last caller of DIE::setForceChildren was removed on March 6, 2017
in commit a175512b18478848bdbe203f2d25dc417860e3c5, leaving
DIE::ForceChildren always false.
Assisted-by: Antigravity
Commit: 02404370e82a97c43b2edc858cd79d042e85da6a
https://github.com/llvm/llvm-project/commit/02404370e82a97c43b2edc858cd79d042e85da6a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
Log Message:
-----------
[lldb][Windows] Register the shadow listener in PlatformWindows (#227277)
`PlatformWindows::DebugProcess` and `PlatformWindows::Attach` create the
Process and hijack its events, but never call
`Process::SetShadowListener` with the listener from the launch or attach
info. `PlatformPOSIX`, `PlatformRemoteGDBServer` and `Target::Launch`'s
all do.
On Windows a shadow listener set with `SBLaunchInfo::SetShadowListener`
therefore never gets an event, which is why
`TestEvents.test_shadow_listener` failed on every run (`"Shadow listener
got event too"`) on both the lldb-server and the in-process backend.
Call `SetShadowListener` in both, and in Attach only touch `process_sp`
once it is known to be non-null (HijackProcessEvents was called before
the null check).
I was able to reproduce the failure at desk on a machine that's under
load. The issue no longer reproduces after this patch.
Fixes https://github.com/llvm/llvm-project/issues/37721.
rdar://188700614
Commit: 7ed1f4881e17f82c2686fa8dfada717d30e550ba
https://github.com/llvm/llvm-project/commit/7ed1f4881e17f82c2686fa8dfada717d30e550ba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/test/CodeGen/X86/twoaddr-reschedule-copy-chain.mir
Log Message:
-----------
TwoAddressInstructions: Add another reschedule copy order test (#227342)
Another test for the fix from #227289, which hit a different
assert condition.
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 3f91f4809e2b5af8ed2f97b4cc43220b279b7f7a
https://github.com/llvm/llvm-project/commit/3f91f4809e2b5af8ed2f97b4cc43220b279b7f7a
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/test/API/commands/expression/issue_11588/Test11588.py
Log Message:
-----------
[lldb][Windows] Format in-process x86 and x64 GPRs as lowercase hex (#227299)
The in-process Windows plugin printed `x86`/`x64` registers in uppercase
hex, unlike every other register table.
`Test11588` compares against lowercase hex, so it only passed when the
address happened to have no letters.
This patch uses lowercase hex, matching `lldb-server`. Test11588 is
re-enabled.
Commit: 9076414489edb1db74ec6f7bc22a715d1cd66f0c
https://github.com/llvm/llvm-project/commit/9076414489edb1db74ec6f7bc22a715d1cd66f0c
Author: arsnyder16 <asnyder at minitab.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M openmp/runtime/src/kmp_invoke_microtask.cpp
M openmp/runtime/test/misc_bugs/many-microtask-args.c
A openmp/runtime/test/misc_bugs/too-many-microtask-args.c
Log Message:
-----------
[OpenMP] Support up to 32 arguments in the generic microtask dispatcher (#211071)
Extend the generic `__kmp_invoke_microtask` implementation to support up
to 32 microtask arguments.
The generic dispatcher currently handles at most 15 arguments. OpenMP
regions with more captured variables terminate at runtime.
This affects WebAssembly because call_indirect requires the callee type
to exactly match the call-site type. Unlike assembly dispatchers on
platforms such as x86_64, the generic C++ implementation cannot
construct an arbitrary-arity call dynamically and must provide each
supported signature explicitly.
Real-world OpenMP regions can exceed the existing limit; the motivating
cases require between 16 and 21 arguments.
A longer-term alternative would be to change the compiler/runtime
convention for generic-dispatch targets so captured-variable pointers
are passed through a single packed context argument. That would remove
the fixed upper bound, but it would require coordinated Clang and OpenMP
runtime changes and consideration of compatibility with objects produced
using the existing variadic microtask ABI. This change keeps the
existing ABI and provides a focused runtime-only fix.
Commit: db7c669fa2addda945c7fede438f562d443a1ad1
https://github.com/llvm/llvm-project/commit/db7c669fa2addda945c7fede438f562d443a1ad1
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M llvm/include/llvm/TargetParser/Triple.h
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/TargetParser/Triple.cpp
Log Message:
-----------
ARM: Move abi name implied float abi to TargetParser (#226774)
ARMTargetMachine overrode the default float abi based on the abi name.
Move this logic to TargetParser so the ABI will be computable without
depending on codegen.
Co-authored-by: Claude Sonnet 5 <noreply at anthropic.com>
Commit: 43d9238a7f79d0a6714b9ffa4af97484fed8429e
https://github.com/llvm/llvm-project/commit/43d9238a7f79d0a6714b9ffa4af97484fed8429e
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-zip.ll
Log Message:
-----------
[RISCV][P-Ext] Prefer pack/ppairo.h over pncvt.h/pncvth.h in shuffle lowering (#227105)
These have equivalent behavior, but pncvt.h/pncvth.h requires the input
to be a register pair. Shuffle lowering doesn't know if the sources came
from the same 64-bit value so using pncvt.h/pncvth.h may overconstrain
register allocation and require copies.
If some hardware has better performance for pncvt.h/pncvth.h we
can consider ways to intelligently pick the two alternatives. For
now just pick pack/ppairo.h.
Commit: c2333b4d0497f8a7d36653e4f3c022b4a86557f2
https://github.com/llvm/llvm-project/commit/c2333b4d0497f8a7d36653e4f3c022b4a86557f2
Author: Scott Linder <scott.linder at amd.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M clang/docs/conf.py
M clang/docs/index.md
Log Message:
-----------
[docs] Enforce unambiguous toctree in clang/docs (#224101)
The rationale and methodology are the same as in
03511907c7a9908f7902e18d3789371a63bb91b1 just in `clang` this time.
Commit: 667cfbec38942e08bd67fa51cc05e63686dd01b9
https://github.com/llvm/llvm-project/commit/667cfbec38942e08bd67fa51cc05e63686dd01b9
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M libc/include/CMakeLists.txt
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/common-threads-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
A libc/include/llvm-libc-macros/threads-macros.h
M libc/include/threads.yaml
M libc/include/unistd.yaml
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/thread.cpp
M libc/src/unistd/linux/CMakeLists.txt
M libc/src/unistd/linux/sysconf.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_tss_test.cpp
M libc/test/integration/src/threads/tss_test.cpp
M libc/test/src/unistd/CMakeLists.txt
M libc/test/src/unistd/sysconf_test.cpp
Log Message:
-----------
[libc] Reset thread-specific key value before invoking destructor (#226134)
POSIX specifies that before calling a thread-specific key destructor,
the value of the key must be set to NULL (so pthread_getspecific returns
NULL from inside the destructor), and that the destructor pass must
repeat up to PTHREAD_DESTRUCTOR_ITERATIONS times if destructors
re-associate non-NULL values with keys.
This patch sets the key payload to nullptr prior to calling the
destructor, and loops over the key array up to the destructor iteration
limit as long as non-NULL values remain.
Along with that:
- introduce common-threads-macros.h to share the destructor iteration
count (4) between C (TSS_DTOR_ITERATIONS) and POSIX
(PTHREAD_DESTRUCTOR_ITERATIONS), and use it internally
- expose TSS_DTOR_ITERATIONS in threads.h
- expose and implement _SC_THREAD_DESTRUCTOR_ITERATIONS in sysconf
Note that I am not fixing the issue where a deleted key's destructor can
still run on thread exit if it was already cached in thread-local
storage. Fixing that properly will require tracking key generations or
validity across threads, so I'm leaving that for separate work
(#226122).
Fixes #194029.
Assisted-by: Gemini
Commit: 61242a65274204ca05be0e490478e74ab1918619
https://github.com/llvm/llvm-project/commit/61242a65274204ca05be0e490478e74ab1918619
Author: Steven Wu <stevenwu at apple.com>
Date: 2026-09-29 (Tue, 29 Sep 2026)
Changed paths:
M .ci/green-dragon/lldb-windows.groovy
M .github/workflows/bazel-checks.yml
M .github/workflows/build-ci-container-tooling.yml
M .github/workflows/build-ci-container-windows.yml
M .github/workflows/build-ci-container.yml
M .github/workflows/build-libc-container.yml
M .github/workflows/build-metrics-container.yml
M .github/workflows/check-ci.yml
M .github/workflows/ci-post-commit-analyzer.yml
M .github/workflows/commit-access-greeter.yml
M .github/workflows/commit-access-review.yml
M .github/workflows/compiler-rt-libc-builtins-tests.yml
M .github/workflows/containers/github-action-ci-tooling/Dockerfile
M .github/workflows/containers/github-action-ci/Dockerfile
M .github/workflows/containers/libc/Dockerfile
M .github/workflows/docs.yml
M .github/workflows/email-check.yaml
M .github/workflows/get-llvm-version/action.yml
M .github/workflows/gha-codeql.yml
M .github/workflows/hlsl-test-all.yaml
M .github/workflows/ids-check.yml
M .github/workflows/issue-release-workflow.yml
M .github/workflows/issue-write.yml
M .github/workflows/libc-freebsd-vm-tests.yml
M .github/workflows/libc-fullbuild-tests.yml
M .github/workflows/libc-overlay-tests.yml
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M bolt/include/bolt/Core/BinaryFunction.h
M bolt/include/bolt/Core/DebugNames.h
M bolt/include/bolt/Passes/LongJmp.h
M bolt/lib/Core/BinaryContext.cpp
M bolt/lib/Core/BinaryFunction.cpp
M bolt/lib/Core/BinaryFunctionProfile.cpp
M bolt/lib/Core/DebugNames.cpp
M bolt/lib/Core/DynoStats.cpp
M bolt/lib/Passes/BinaryPasses.cpp
M bolt/lib/Passes/FrameAnalysis.cpp
M bolt/lib/Passes/FrameOptimizer.cpp
M bolt/lib/Passes/IdenticalCodeFolding.cpp
M bolt/lib/Passes/IndirectCallPromotion.cpp
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M bolt/lib/Passes/JTFootprintReduction.cpp
M bolt/lib/Passes/LongJmp.cpp
M bolt/lib/Passes/PLTCall.cpp
M bolt/lib/Passes/ProfileQualityStats.cpp
M bolt/lib/Passes/ReorderAlgorithm.cpp
M bolt/lib/Passes/ReorderData.cpp
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M bolt/lib/Passes/RetpolineInsertion.cpp
M bolt/lib/Passes/ShrinkWrapping.cpp
M bolt/lib/Passes/StokeInfo.cpp
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M bolt/lib/Profile/DataAggregator.cpp
M bolt/lib/Rewrite/BinaryPassManager.cpp
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M bolt/lib/Rewrite/RewriteInstance.cpp
M bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
M bolt/lib/Utils/CommandLineOpts.cpp
A bolt/test/AArch64/fix-block-count-multiple.s
A bolt/test/AArch64/fix-block-counts-indirect-branch.s
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A bolt/test/AArch64/relax-branches-with-thunk-chain.s
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A bolt/test/RISCV/fix-block-count-multiple.s
A bolt/test/RISCV/fix-block-counts-indirect-branch.s
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A bolt/test/X86/fix-block-counts-indirect-branch.s
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M bolt/tools/merge-fdata/merge-fdata.cpp
M clang-tools-extra/clang-tidy/bugprone/NarrowingConversionsCheck.cpp
M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
M clang-tools-extra/clangd/index/YAMLSerialization.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/tool/ClangdMain.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
A clang-tools-extra/docs/clang-tidy/checks/readability/redundant-lambda-parameter-list.md
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A clang-tools-extra/docs/clang-tidy/checks/readability/simplify-boolean-expr.md
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M clang-tools-extra/docs/conf.py
M clang-tools-extra/test/clang-tidy/checkers/bugprone/redundant-branch-condition.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp
M clang/CMakeLists.txt
M clang/bindings/python/clang/cindex.py
M clang/bindings/python/tests/cindex/test_cursor.py
M clang/cmake/caches/Release.cmake
M clang/docs/AllocToken.md
M clang/docs/ClangLinkerWrapper.md
M clang/docs/ClangOffloadBundler.md
M clang/docs/ClangTransformerTutorial.md
M clang/docs/ControlFlowIntegrity.md
M clang/docs/ControlFlowIntegrityDesign.md
A clang/docs/HLSL/DynamicResources.md
M clang/docs/HLSL/HLSLDocs.md
M clang/docs/InternalsManual.md
M clang/docs/IntroductionToTheClangAST.md
M clang/docs/LanguageExtensions.md
M clang/docs/LibASTImporter.md
M clang/docs/LifetimeSafety.md
M clang/docs/ReleaseNotes.md
M clang/docs/SafeBuffers.md
M clang/docs/ScalableStaticAnalysis/user-docs/SummaryExtraction.md
M clang/docs/SourceBasedCodeCoverage.md
M clang/docs/UsersManual.md
M clang/docs/WarningSuppressionMappings.md
M clang/docs/analyzer/checkers.md
M clang/docs/analyzer/conf.py
M clang/docs/analyzer/user-docs/Annotations.md
M clang/docs/conf.py
M clang/docs/index.md
M clang/include/clang/AST/APValue.h
M clang/include/clang/AST/ASTConcept.h
M clang/include/clang/AST/ASTContext.h
M clang/include/clang/AST/CharUnits.h
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/DeclContextInternals.h
M clang/include/clang/AST/DeclFriend.h
M clang/include/clang/AST/Expr.h
M clang/include/clang/AST/MatrixUtils.h
M clang/include/clang/AST/NestedNameSpecifierBase.h
M clang/include/clang/AST/OpenMPClause.h
M clang/include/clang/AST/PropertiesBase.td
M clang/include/clang/AST/Redeclarable.h
M clang/include/clang/AST/TypeBase.h
M clang/include/clang/AST/TypeProperties.td
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Facts.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/FactsGenerator.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LifetimeSafety.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/LoanPropagation.h
M clang/include/clang/Analysis/Analyses/LifetimeSafety/Origins.h
M clang/include/clang/Basic/Attr.td
M clang/include/clang/Basic/AttrDocs.td
M clang/include/clang/Basic/BuiltinHeaders.def
M clang/include/clang/Basic/Builtins.td
M clang/include/clang/Basic/BuiltinsAArch64.td
M clang/include/clang/Basic/BuiltinsAMDGPU.td
M clang/include/clang/Basic/BuiltinsAMDGPUDocs.td
M clang/include/clang/Basic/BuiltinsNVPTX.td
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/Basic/BuiltinsX86.td
M clang/include/clang/Basic/DiagnosticSemaKinds.td
M clang/include/clang/Basic/HLSLIntrinsics.td
M clang/include/clang/Basic/LangOptions.def
M clang/include/clang/Basic/TargetID.h
M clang/include/clang/Basic/TargetInfo.h
M clang/include/clang/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
M clang/include/clang/CIR/Dialect/IR/CIROps.td
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/Driver/Driver.h
M clang/include/clang/Driver/Types.h
M clang/include/clang/Interpreter/Interpreter.h
M clang/include/clang/Options/FlangOptions.td
M clang/include/clang/Options/Options.td
A clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
M clang/include/clang/ScalableStaticAnalysis/Core/Model/EntityId.h
M clang/include/clang/Sema/HLSLExternalSemaSource.h
M clang/include/clang/Sema/Sema.h
M clang/include/clang/Sema/SemaARM.h
M clang/include/clang/Sema/SemaHLSL.h
M clang/include/clang/Sema/SemaX86.h
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/APValue.cpp
M clang/lib/AST/ASTContext.cpp
M clang/lib/AST/ASTImporter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/ByteCodeEmitter.h
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Context.cpp
M clang/lib/AST/ByteCode/Context.h
M clang/lib/AST/ByteCode/Disasm.cpp
M clang/lib/AST/ByteCode/EvalEmitter.cpp
M clang/lib/AST/ByteCode/EvalEmitter.h
A clang/lib/AST/ByteCode/EvalSettings.h
M clang/lib/AST/ByteCode/EvaluationResult.cpp
M clang/lib/AST/ByteCode/EvaluationResult.h
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/InterpStack.cpp
M clang/lib/AST/ByteCode/InterpStack.h
M clang/lib/AST/ByteCode/InterpState.cpp
M clang/lib/AST/ByteCode/InterpState.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/Expr.cpp
M clang/lib/AST/ExprConstShared.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/AST/NestedNameSpecifier.cpp
M clang/lib/AST/Type.cpp
M clang/lib/Analysis/LifetimeSafety/Facts.cpp
M clang/lib/Analysis/LifetimeSafety/FactsGenerator.cpp
M clang/lib/Analysis/LifetimeSafety/LifetimeAnnotations.cpp
M clang/lib/Analysis/LifetimeSafety/LiveOrigins.cpp
M clang/lib/Analysis/LifetimeSafety/LoanPropagation.cpp
M clang/lib/Analysis/LifetimeSafety/Origins.cpp
M clang/lib/Analysis/UnsafeBufferUsage.cpp
M clang/lib/Basic/TargetID.cpp
M clang/lib/Basic/Targets/OSTargets.h
M clang/lib/Basic/Targets/PPC.cpp
M clang/lib/Basic/Targets/PPC.h
M clang/lib/Basic/Targets/Sparc.cpp
M clang/lib/Basic/Targets/Sparc.h
M clang/lib/Basic/Targets/WebAssembly.cpp
M clang/lib/Basic/Targets/WebAssembly.h
M clang/lib/Basic/Targets/X86.cpp
M clang/lib/Basic/Targets/X86.h
M clang/lib/CIR/CMakeLists.txt
M clang/lib/CIR/CodeGen/CIRGenAtomic.cpp
M clang/lib/CIR/CodeGen/CIRGenBuilder.h
M clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
M clang/lib/CIR/CodeGen/CIRGenClass.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenCoroutine.cpp
M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprAggregate.cpp
M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
M clang/lib/CIR/CodeGen/CIRGenExprComplex.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.h
M clang/lib/CIR/CodeGen/CIRGenItaniumCXXABI.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/FlattenCFG.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRCXXABI.h
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerItaniumCXXABI.cpp
M clang/lib/CIR/Dialect/Transforms/TargetLowering/LowerMicrosoftCXXABI.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/BackendUtil.cpp
M clang/lib/CodeGen/CGBlocks.cpp
M clang/lib/CodeGen/CGDebugInfo.cpp
M clang/lib/CodeGen/CGExpr.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGExprScalar.cpp
M clang/lib/CodeGen/CGHLSLBuiltins.cpp
M clang/lib/CodeGen/CGHLSLRuntime.cpp
M clang/lib/CodeGen/CGHLSLRuntime.h
M clang/lib/CodeGen/CGLoopInfo.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGObjCRuntime.cpp
M clang/lib/CodeGen/CGStmtOpenMP.cpp
M clang/lib/CodeGen/CGVTT.cpp
M clang/lib/CodeGen/CodeGenFunction.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/CodeGenPGO.cpp
M clang/lib/CodeGen/CodeGenTypes.cpp
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/lib/CodeGen/CoverageMappingGen.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/PPC.cpp
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/lib/CodeGen/Targets/X86.cpp
M clang/lib/DependencyScanning/DependencyScanningWorker.cpp
M clang/lib/Driver/Driver.cpp
M clang/lib/Driver/ToolChains/Clang.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Driver/ToolChains/HIPUtility.cpp
M clang/lib/Driver/ToolChains/Hexagon.cpp
M clang/lib/Driver/Types.cpp
M clang/lib/Format/ContinuationIndenter.cpp
M clang/lib/Headers/CMakeLists.txt
M clang/lib/Headers/arm_acle.h
A clang/lib/Headers/avx10v2aux_512intrin.h
A clang/lib/Headers/avx10v2auxintrin.h
M clang/lib/Headers/cpuid.h
M clang/lib/Headers/hlsl.h
M clang/lib/Headers/hlsl/hlsl_detail.h
M clang/lib/Headers/hlsl/hlsl_intrinsic_helpers.h
A clang/lib/Headers/hlsl/hlsl_resources.h
M clang/lib/Headers/immintrin.h
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalAction.cpp
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Interpreter/Interpreter.cpp
M clang/lib/Lex/HeaderSearch.cpp
M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysis.cpp
A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyFormat.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.cpp
M clang/lib/Sema/HLSLBuiltinTypeDeclBuilder.h
M clang/lib/Sema/HLSLExternalSemaSource.cpp
M clang/lib/Sema/HeuristicResolver.cpp
M clang/lib/Sema/SemaAMDGPU.cpp
M clang/lib/Sema/SemaARM.cpp
M clang/lib/Sema/SemaChecking.cpp
M clang/lib/Sema/SemaConcept.cpp
M clang/lib/Sema/SemaDeclCXX.cpp
M clang/lib/Sema/SemaExpr.cpp
M clang/lib/Sema/SemaExprMember.cpp
M clang/lib/Sema/SemaHLSL.cpp
M clang/lib/Sema/SemaOpenACCAtomic.cpp
M clang/lib/Sema/SemaOpenMP.cpp
M clang/lib/Sema/SemaOverload.cpp
M clang/lib/Sema/SemaPPC.cpp
M clang/lib/Sema/SemaRISCV.cpp
M clang/lib/Sema/SemaStmt.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateDeduction.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/SemaType.cpp
M clang/lib/Sema/SemaX86.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/Serialization/ASTReader.cpp
M clang/lib/Serialization/ASTWriterStmt.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLambdaCapturesChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.h
M clang/lib/Tooling/CommonOptionsParser.cpp
M clang/test/AST/ByteCode/builtin-functions.cpp
M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
A clang/test/AST/ByteCode/codegen.cl
M clang/test/AST/ByteCode/const-base-cast.cpp
M clang/test/AST/ByteCode/invalid.cpp
M clang/test/AST/ByteCode/new-delete.cpp
M clang/test/AST/ByteCode/records.cpp
M clang/test/AST/ByteCode/references.cpp
M clang/test/AST/HLSL/ByteAddressBuffers-AST.hlsl
A clang/test/AST/HLSL/DynamicResources-AST.hlsl
M clang/test/AST/HLSL/StructuredBuffers-AST.hlsl
M clang/test/AST/HLSL/TypedBuffers-AST.hlsl
M clang/test/AST/HLSL/matrix-alias.hlsl
M clang/test/AST/HLSL/matrix_layout_attr.hlsl
A clang/test/Analysis/Checkers/WebKit/call-args-dependent-arg.cpp
A clang/test/Analysis/Checkers/WebKit/call-args-generic-lambda.cpp
A clang/test/Analysis/Checkers/WebKit/local-vars-dependent-init.cpp
A clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
M clang/test/Analysis/Checkers/WebKit/mock-system-header.h
A clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
A clang/test/Analysis/Checkers/WebKit/unborrowed-lambda-captures.cpp
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-lambda-captures.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-preserves-unrelated-zero-length-insert.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-stderr-without-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/empty-input.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/identical-overlap.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/no-conflict-sarif-empty.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/non-overlapping.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/order-invariance.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/parent-dir-missing.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-identical-non-zero-length.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-zero-length-insert.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-cluster-of-three-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/sarif-out-parent-dir-missing.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input-internal-conflict.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-all-conflict.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-conflicts-different-offsets-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict-sarif.test
M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict.test
M clang/test/CIR/Analysis/alias-analysis-modref.cir
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/alignment.c
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/assign-operator.cpp
M clang/test/CIR/CodeGen/atomic.c
M clang/test/CIR/CodeGen/attr-target-x86.c
M clang/test/CIR/CodeGen/base-init-eh.cpp
M clang/test/CIR/CodeGen/bitint-memory.c
M clang/test/CIR/CodeGen/bitint-record-layout.c
R clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
A clang/test/CIR/CodeGen/bitint-wide-be.c
A clang/test/CIR/CodeGen/bitint-wide.c
M clang/test/CIR/CodeGen/bitint.c
M clang/test/CIR/CodeGen/builtin-call.cpp
A clang/test/CIR/CodeGen/builtin-memcpy.c
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-mixed.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-sret.cpp
A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk.cpp
M clang/test/CIR/CodeGen/class.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper-eh.cpp
M clang/test/CIR/CodeGen/cleanup-conditional-with-wrapper.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/compound_literal.c
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/cxx-rewritten-binary-operator.cpp
A clang/test/CIR/CodeGen/cxx20-module-initializer-ms-abi.cppm
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/delete-array-aligned.cpp
A clang/test/CIR/CodeGen/delete-array-overaligned-cookie.cpp
M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
M clang/test/CIR/CodeGen/delete-array.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit.cpp
A clang/test/CIR/CodeGen/dtor-comdat-key.cpp
M clang/test/CIR/CodeGen/dtors.cpp
M clang/test/CIR/CodeGen/empty-union.cpp
M clang/test/CIR/CodeGen/fixed-point-literal.c
M clang/test/CIR/CodeGen/fp-contract.c
A clang/test/CIR/CodeGen/global-const-alignment.cpp
M clang/test/CIR/CodeGen/global-init-fenv.cpp
M clang/test/CIR/CodeGen/global-ptr-init.cpp
M clang/test/CIR/CodeGen/global-section.c
M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
M clang/test/CIR/CodeGen/globals.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
A clang/test/CIR/CodeGen/lambda-explicit-obj.cpp
M clang/test/CIR/CodeGen/lambda.cpp
M clang/test/CIR/CodeGen/libc.c
M clang/test/CIR/CodeGen/lifetime-marker.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/loop.cpp
A clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/CIR/CodeGen/new-null.cpp
M clang/test/CIR/CodeGen/no-odr-use.cpp
A clang/test/CIR/CodeGen/nobuiltin-replaceable-allocation.cpp
M clang/test/CIR/CodeGen/non-odr-use-non-ref.cpp
M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
M clang/test/CIR/CodeGen/pack-indexing.cpp
M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
M clang/test/CIR/CodeGen/pointer-to-data-member-indirect-field.cpp
M clang/test/CIR/CodeGen/pointer-width-32bit.cpp
M clang/test/CIR/CodeGen/pragma-fenv_access.c
M clang/test/CIR/CodeGen/predefined-expr.c
M clang/test/CIR/CodeGen/rtti-member-pointer.cpp
M clang/test/CIR/CodeGen/rtti-qualfn.cpp
A clang/test/CIR/CodeGen/sdk-version.c
M clang/test/CIR/CodeGen/side-effect.cpp
M clang/test/CIR/CodeGen/source-loc.cpp
M clang/test/CIR/CodeGen/static-local-in-ctor.cpp
M clang/test/CIR/CodeGen/static-local-info.cpp
M clang/test/CIR/CodeGen/tls-model.cpp
M clang/test/CIR/CodeGen/union-agg-init.c
M clang/test/CIR/CodeGen/union-copy-move-assignment.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/vector-strict-fp.cpp
M clang/test/CIR/CodeGen/virtual-function-calls.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenBuiltins/X86/avx512vbmi2-builtins.c
M clang/test/CIR/CodeGenBuiltins/builtin-bit-cast.cpp
M clang/test/CIR/CodeGenBuiltins/builtin-nondeterministic-value.c
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic-sve.c
A clang/test/CIR/CodeGenBuiltins/builtin-reduce-arithmetic.c
M clang/test/CIR/CodeGenBuiltins/builtin-undef-rvalue.cpp
M clang/test/CIR/CodeGenBuiltins/builtins-elementwise.c
M clang/test/CIR/CodeGenCUDA/address-spaces.cu
M clang/test/CIR/CodeGenCUDA/device-stub.cu
M clang/test/CIR/CodeGenCUDA/kernel-call.cu
A clang/test/CIR/CodeGenCUDA/missing-gpubinary.cu
M clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/global-refs.cpp
M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
M clang/test/CIR/CodeGenCXX/virtual-base-cast.cpp
M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
M clang/test/CIR/CodeGenCXX/vtable-pure-deleted-funcs.cpp
M clang/test/CIR/CodeGenCXX/zero_init_bases.cpp
A clang/test/CIR/CodeGenCoroutines/coro-agg.cpp
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A clang/test/CIR/CodeGenHIP/builtins-amdgcn-prefetch.hip
R clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
M clang/test/CIR/CodeGenOpenMP/not-yet-implemented.c
M clang/test/CIR/CodeGenOpenMP/parallel.c
A clang/test/CIR/Diagnostics/mlir-error-routing.cpp
R clang/test/CIR/Diagnostics/mlir-error-routing.cu
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M clang/test/CIR/IR/enum-attrs.cir
M clang/test/CIR/IR/fenv.cir
A clang/test/CIR/IR/funnel-shift.cir
M clang/test/CIR/IR/global.cir
M clang/test/CIR/IR/invalid-cast.cir
M clang/test/CIR/IR/invalid-cmp.cir
A clang/test/CIR/IR/invalid-cuda-device-binary.cir
M clang/test/CIR/IR/invalid-delete-array.cir
A clang/test/CIR/IR/invalid-funnel-shift.cir
A clang/test/CIR/IR/invalid-matrix.cir
M clang/test/CIR/IR/invalid-static-local-info.cir
M clang/test/CIR/IR/invalid-static-local.cir
M clang/test/CIR/IR/invalid-tls.cir
M clang/test/CIR/IR/invalid-vtable.cir
A clang/test/CIR/IR/matrix.cir
M clang/test/CIR/IR/static-local-info.cir
M clang/test/CIR/IR/static-local.cir
M clang/test/CIR/IR/string-trailing-zeros.cir
M clang/test/CIR/IR/var-registration.cir
M clang/test/CIR/IR/vtable-addrpt.cir
M clang/test/CIR/IR/vtable-attr.cir
M clang/test/CIR/IR/vtt-addrpoint.cir
M clang/test/CIR/Lowering/call-llvm-intrinsic.cir
M clang/test/CIR/Lowering/fenv.cir
A clang/test/CIR/Lowering/funnel-shift.cir
A clang/test/CIR/Lowering/not.cir
M clang/test/CIR/Lowering/vtt-addrpoint.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem-indirect.cir
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem.cir
M clang/test/CIR/Transforms/flatten-cleanup-scope-musttail.cir
M clang/test/CIR/Transforms/vector-cmp-fold.cir
M clang/test/CXX/basic/basic.start/basic.start.main/p2.cpp
M clang/test/CXX/temp/temp.constr/temp.constr.normal/p1.cpp
R clang/test/ClangScanDeps/build-session-validation-relocated-modules.c
A clang/test/ClangScanDeps/modules-context-hash-case-sensitive-vfs-paths.c
M clang/test/ClangScanDeps/modules-context-hash-module-map-path.c
M clang/test/ClangScanDeps/modules-relocated-mm-macro.c
A clang/test/CodeGen/AArch64/atomic-store-hint-template.cpp
M clang/test/CodeGen/AArch64/neon-intrinsics.c
M clang/test/CodeGen/AArch64/neon/intrinsics.c
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_dup.c
R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_len.c
A clang/test/CodeGen/AArch64/sve/addv.c
M clang/test/CodeGen/AArch64/sve/dup.c
M clang/test/CodeGen/AArch64/sve/len.c
M clang/test/CodeGen/PowerPC/attr-target-clones.c
A clang/test/CodeGen/RISCV/lto-module-asm-abi.c
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
A clang/test/CodeGen/Sparc/sparc-long-double-abi.c
M clang/test/CodeGen/Sparc/sparc-vaarg.c
M clang/test/CodeGen/Sparc/sparcv8-abi.c
M clang/test/CodeGen/Sparc/variadic-aggregate.c
A clang/test/CodeGen/WebAssembly/target-abi-module-flag.c
A clang/test/CodeGen/X86/avx10_2_v2aux-builtins-errors.c
A clang/test/CodeGen/X86/avx10_2_v2aux-builtins.c
A clang/test/CodeGen/X86/empty-struct-union-array.c
M clang/test/CodeGen/X86/sse41-builtins-constrained.c
M clang/test/CodeGen/X86/sse41-builtins.c
M clang/test/CodeGen/align-loops.c
M clang/test/CodeGen/arm_acle.c
M clang/test/CodeGen/attr-target-x86.c
M clang/test/CodeGen/builtin-cpu-supports-all.c
M clang/test/CodeGen/builtins-arm64.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/matrix-type-indexing.c
M clang/test/CodeGen/msp430-register-names.c
M clang/test/CodeGen/ptrauth-qualifier-const-init.c
M clang/test/CodeGen/ptrauth-restricted-intptr-qualifier.c
M clang/test/CodeGen/target-builtin-noerror.c
M clang/test/CodeGen/thread-model.c
M clang/test/CodeGenCUDA/record-layout.cu
A clang/test/CodeGenCXX/GH176161.cpp
M clang/test/CodeGenCXX/OmitRTTIComponentABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/PR26569.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/deleted-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-hwasan.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/constructor-init.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis.cpp
A clang/test/CodeGenCXX/dllexport-rtti-visibility.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/dllimport-rtti.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/global-init.cpp
M clang/test/CodeGenCXX/mangle-class-nttp.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-interface.cpp
M clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
M clang/test/CodeGenCXX/pragma-loop-predicate.cpp
M clang/test/CodeGenCXX/pragma-loop-safety.cpp
M clang/test/CodeGenCXX/pragma-loop.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call-2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp
M clang/test/CodeGenCXX/ptrauth-global-constant-initializers.cpp
M clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
M clang/test/CodeGenCXX/ptrauth-rtti-layout.cpp
M clang/test/CodeGenCXX/ptrauth-type-info-vtable.cpp
M clang/test/CodeGenCXX/ptrauth-virtual-function.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-in-vtt.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/rtti-mingw64.cpp
M clang/test/CodeGenCXX/rtti-qualfn.cpp
M clang/test/CodeGenCXX/skip-vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/static-init-wasm.cpp
M clang/test/CodeGenCXX/static-init.cpp
M clang/test/CodeGenCXX/strict-vtable-pointers.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/visibility.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-align.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
M clang/test/CodeGenHLSL/BasicFeatures/matrix-type-indexing.hlsl
A clang/test/CodeGenHLSL/builtins/InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWBuffer-Interlocked.hlsl
A clang/test/CodeGenHLSL/builtins/RWByteAddressBuffer-InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RWTexture-Interlocked.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAdd.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedAnd.hlsl
A clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedExchange.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMax.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedMin.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedOr.hlsl
M clang/test/CodeGenHLSL/builtins/RasterizerOrderedByteAddressBuffer-InterlockedXor.hlsl
A clang/test/CodeGenHLSL/builtins/WaveReadLaneFirst.hlsl
M clang/test/CodeGenHLSL/builtins/fmod.hlsl
M clang/test/CodeGenHLSL/builtins/mul.hlsl
M clang/test/CodeGenHLSL/builtins/transpose.hlsl
M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
A clang/test/CodeGenHLSL/matrix-layout-register-representation.hlsl
M clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
A clang/test/CodeGenHLSL/resources/dynamic-resources.hlsl
A clang/test/CodeGenHLSL/semantics/SV_InstanceID.vs.hlsl
M clang/test/CodeGenObjC/attr-exception.m
A clang/test/CodeGenObjC/exceptions-seh.m
M clang/test/CodeGenObjC/ptrauth-attr-exception.m
M clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m
M clang/test/CodeGenObjC/ptrauth-block-isa.m
M clang/test/CodeGenObjC/ptrauth-class-ro.m
M clang/test/CodeGenObjC/ptrauth-objc-isa-super.m
M clang/test/CodeGenObjC/ptrauth-objc-method-list-pointer.m
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx12-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-err.cl
A clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13-w32-err.cl
M clang/test/CodeGenOpenCL/builtins-amdgcn-gfx13.cl
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M clang/test/Driver/Inputs/MacOSX15.1.sdk/SDKSettings.json
R clang/test/Driver/Inputs/object0.o
M clang/test/Driver/aix-ld.c
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A clang/test/Driver/flifetime-safety-c.c
A clang/test/Driver/hexagon-eh-frame-pic.c
M clang/test/Driver/modulemap-allow-subdirectory-search.c
R clang/test/Driver/pch-inputs.h
A clang/test/Driver/print-enabled-extensions/riscv-gaisler-gr765.c
M clang/test/Driver/print-supported-extensions-riscv.c
M clang/test/Driver/riscv-cpus.c
M clang/test/Driver/riscv32-toolchain-extra.c
M clang/test/Driver/riscv64-toolchain-extra.c
M clang/test/Driver/sanitize-trap-loop.c
M clang/test/Driver/x86-target-features.c
M clang/test/Frontend/stack-layout-remark.c
M clang/test/InstallAPI/Inputs/MacOSX13.0.sdk/SDKSettings.json
M clang/test/InstallAPI/exclusive-passes-platform.test
A clang/test/Interpreter/HIP/hip-environment.hip
A clang/test/Interpreter/HIP/lit.local.cfg
A clang/test/Interpreter/failed-input-keeps-redecls.cpp
A clang/test/Interpreter/nonexistent-xcc-file.cpp
M clang/test/Misc/target-invalid-cpu-note/riscv.c
A clang/test/Modules/implicit-module-map-path-case-sensitive.c
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
A clang/test/OpenMP/collapse_iv_width_codegen.cpp
M clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp
A clang/test/OpenMP/for_loop_bitint_messages.c
M clang/test/OpenMP/for_reduction_codegen_UDR.cpp
A clang/test/OpenMP/gh154704.cpp
A clang/test/OpenMP/reduction_non_copyable_with_initializer.cpp
M clang/test/OpenMP/target_data_use_device_ptr_inheritance_codegen.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda.cpp
A clang/test/OpenMP/target_global_ref_namespace_scope_lambda_codegen.cpp
A clang/test/OpenMP/target_map_address_space_codegen.c
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M clang/unittests/Analysis/LifetimeSafetyTest.cpp
M clang/unittests/Basic/FileManagerTest.cpp
M clang/unittests/CIR/FenvOpTest.cpp
M clang/unittests/Format/FormatTest.cpp
M clang/unittests/Lex/LexerTest.cpp
A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyAnalysisTest.cpp
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A compiler-rt/test/ubsan/TestCases/Misc/Posix/trap_loop_detect.cpp
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M flang/test/Integration/dense-array-any-rank.f90
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M flang/test/Lower/CUDA/cuda-data-attribute.cuf
M flang/test/Lower/CUDA/cuda-data-transfer.cuf
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M flang/test/Lower/CUDA/cuda-doconc.cuf
M flang/test/Lower/CUDA/cuda-gpu-managed.cuf
M flang/test/Lower/CUDA/cuda-gpu-unified.cuf
M flang/test/Lower/CUDA/cuda-kernel-alloca-block.cuf
M flang/test/Lower/CUDA/cuda-managed-func-result.cuf
M flang/test/Lower/CUDA/cuda-mod.cuf
M flang/test/Lower/CUDA/cuda-module-use.cuf
A flang/test/Lower/CUDA/cuda-on-device.cuf
M flang/test/Lower/CUDA/cuda-pointer-sync.cuf
M flang/test/Lower/CUDA/cuda-program-global.cuf
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A flang/test/Lower/CUDA/finit-local-cuda.cuf
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M flang/test/Lower/HLFIR/allocatable-and-pointer-status-change.f90
M flang/test/Lower/HLFIR/allocatable-return.f90
M flang/test/Lower/HLFIR/array-ctor-as-elemental-nested.f90
M flang/test/Lower/HLFIR/array-ctor-as-inlined-temp.f90
M flang/test/Lower/HLFIR/array-ctor-as-runtime-temp.f90
M flang/test/Lower/HLFIR/array-ctor-character.f90
M flang/test/Lower/HLFIR/array-ctor-derived.f90
M flang/test/Lower/HLFIR/array-ctor-index.f90
M flang/test/Lower/HLFIR/bindc-entry-stmt.f90
M flang/test/Lower/HLFIR/calls-array-results.f90
M flang/test/Lower/HLFIR/calls-f77.f90
M flang/test/Lower/HLFIR/charconvert.f90
M flang/test/Lower/HLFIR/convert-mbox-to-value.f90
M flang/test/Lower/HLFIR/convert-variable-block.f90
M flang/test/Lower/HLFIR/cray-pointers.f90
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M flang/test/Lower/HLFIR/dummy-scope.f90
M flang/test/Lower/HLFIR/elemental-array-ops.f90
M flang/test/Lower/HLFIR/elemental-call-vector-subscripts.f90
M flang/test/Lower/HLFIR/elemental-result-length.f90
M flang/test/Lower/HLFIR/elemental-user-procedure-ref-polymorphic.f90
M flang/test/Lower/HLFIR/entry_return.f90
M flang/test/Lower/HLFIR/function-return-as-expr.f90
M flang/test/Lower/HLFIR/goto-do-body.f90
M flang/test/Lower/HLFIR/ignore-rank-unlimited-polymorphic.f90
M flang/test/Lower/HLFIR/index.f90
M flang/test/Lower/HLFIR/intrinsic-dynamically-optional.f90
M flang/test/Lower/HLFIR/intrinsic-subroutines.f90
M flang/test/Lower/HLFIR/matmul.f90
M flang/test/Lower/HLFIR/maxloc.f90
M flang/test/Lower/HLFIR/maxval.f90
M flang/test/Lower/HLFIR/minloc.f90
M flang/test/Lower/HLFIR/minval.f90
M flang/test/Lower/HLFIR/null.f90
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M flang/test/Lower/HLFIR/proc-pointer-comp-pass.f90
M flang/test/Lower/HLFIR/procedure-designators.f90
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M flang/test/Lower/HLFIR/procedure-pointer-in-generics.f90
M flang/test/Lower/HLFIR/procedure-pointer.f90
M flang/test/Lower/HLFIR/product.f90
M flang/test/Lower/HLFIR/select-type-selector.f90
M flang/test/Lower/HLFIR/structure-constructor.f90
M flang/test/Lower/HLFIR/sum.f90
M flang/test/Lower/HLFIR/tdesc-character-comp-init.f90
M flang/test/Lower/HLFIR/transpose.f90
M flang/test/Lower/HLFIR/trim.f90
M flang/test/Lower/HLFIR/user-defined-assignment.f90
M flang/test/Lower/HLFIR/vector-subscript-as-value.f90
M flang/test/Lower/HLFIR/visible-cray-pointer-target.f90
M flang/test/Lower/HLFIR/where.f90
M flang/test/Lower/Intrinsics/associated-proc-pointers.f90
M flang/test/Lower/Intrinsics/associated.f90
M flang/test/Lower/Intrinsics/bessel_yn.f90
M flang/test/Lower/Intrinsics/btest.f90
M flang/test/Lower/Intrinsics/c_associated.f90
M flang/test/Lower/Intrinsics/c_devptr_eq_ne.f90
M flang/test/Lower/Intrinsics/c_funloc.f90
M flang/test/Lower/Intrinsics/c_loc.f90
M flang/test/Lower/Intrinsics/c_ptr_eq_ne.f90
M flang/test/Lower/Intrinsics/chdir.f90
M flang/test/Lower/Intrinsics/free.f90
M flang/test/Lower/Intrinsics/get_command.f90
M flang/test/Lower/Intrinsics/getcwd-function.f90
M flang/test/Lower/Intrinsics/getpid.f90
M flang/test/Lower/Intrinsics/hostnm-func.f90
M flang/test/Lower/Intrinsics/ibset.f90
M flang/test/Lower/Intrinsics/ichar.f90
M flang/test/Lower/Intrinsics/ieee_class.f90
M flang/test/Lower/Intrinsics/ieee_compare.f90
M flang/test/Lower/Intrinsics/ieee_flag.f90
M flang/test/Lower/Intrinsics/ieee_logb.f90
M flang/test/Lower/Intrinsics/ieee_max_min.f90
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M flang/test/Lower/Intrinsics/ieee_rint_int.f90
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M flang/test/Lower/Intrinsics/malloc.f90
M flang/test/Lower/Intrinsics/min.f90
A flang/test/Lower/Intrinsics/mvbits-unsigned.f90
M flang/test/Lower/Intrinsics/nearest.f90
M flang/test/Lower/Intrinsics/not.f90
M flang/test/Lower/Intrinsics/perror.f90
M flang/test/Lower/Intrinsics/putenv-func.f90
M flang/test/Lower/Intrinsics/rand.f90
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M flang/test/Lower/Intrinsics/reduce.f90
M flang/test/Lower/Intrinsics/rename.f90
M flang/test/Lower/Intrinsics/selected_char_kind.f90
M flang/test/Lower/Intrinsics/selected_logical_kind.f90
M flang/test/Lower/Intrinsics/show_descriptor.f90
M flang/test/Lower/Intrinsics/size.f90
M flang/test/Lower/Intrinsics/system_clock.f90
M flang/test/Lower/Intrinsics/time.f90
M flang/test/Lower/Intrinsics/transfer.f90
M flang/test/Lower/Intrinsics/unlink-func.f90
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M flang/test/Lower/MIF/coarray_allocation2.f90
M flang/test/Lower/OpenACC/acc-atomic-capture.f90
M flang/test/Lower/OpenACC/acc-atomic-read.f90
M flang/test/Lower/OpenACC/acc-atomic-update-hlfir.f90
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A flang/test/Lower/OpenACC/acc-data-cuda-device.f90
M flang/test/Lower/OpenACC/acc-data-operands-remapping.f90
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M flang/test/Lower/OpenACC/acc-data.f90
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M flang/test/Lower/OpenACC/acc-declare-common-present-in-function.f90
M flang/test/Lower/OpenACC/acc-declare-globals.f90
M flang/test/Lower/OpenACC/acc-declare-unified.f90
M flang/test/Lower/OpenACC/acc-declare-use-associated-allocatable.f90
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A flang/test/Lower/OpenACC/acc-unstructured-internals.f90
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M flang/test/Lower/OpenMP/DelayedPrivatization/target-firstprivate.f90
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M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-implicit-scalar-map.f90
M flang/test/Lower/OpenMP/DelayedPrivatization/target-private-multiple-variables.f90
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M flang/test/Lower/OpenMP/Todo/allocate-clause-unsupported.f90
M flang/test/Lower/OpenMP/Todo/dispatch.f90
R flang/test/Lower/OpenMP/Todo/metadirective-loop-unstructured.f90
A flang/test/Lower/OpenMP/Todo/scope-allocate-clause-unsupported.f90
R flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
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M flang/test/Lower/OpenMP/block-use-predetermined-privatization.f90
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M flang/test/Lower/OpenMP/block_predetermined_privatization.f90
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M flang/test/Lower/OpenMP/cancellationpoint.f90
M flang/test/Lower/OpenMP/common-atomic-lowering.f90
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M flang/test/Lower/OpenMP/copyin.f90
M flang/test/Lower/OpenMP/cray-pointers01.f90
M flang/test/Lower/OpenMP/critical.f90
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M flang/test/Lower/OpenMP/default-clause-byref.f90
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M flang/test/Lower/OpenMP/delayed-privatization-private-firstprivate.f90
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A flang/test/Lower/OpenMP/dispatch.f90
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M flang/test/Lower/OpenMP/hlfir-seqloop-parallel.f90
M flang/test/Lower/OpenMP/hlfir-to-fir-conv-omp.mlir
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M flang/test/Lower/OpenMP/lastprivate-allocatable.f90
M flang/test/Lower/OpenMP/lastprivate-commonblock.f90
M flang/test/Lower/OpenMP/lastprivate-conditional-nested-parallel.f90
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A flang/test/Lower/OpenMP/metadirective-loop-unstructured.f90
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M flang/test/Lower/OpenMP/omp-declare-reduction-derivedtype.f90
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M flang/test/Lower/OpenMP/optional-argument-map-2.f90
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M flang/test/Lower/OpenMP/parallel-reduction-array-lb.f90
M flang/test/Lower/OpenMP/parallel-reduction-array.f90
M flang/test/Lower/OpenMP/parallel-reduction-byref.f90
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M flang/test/Lower/OpenMP/parallel-reduction-pointer-array.f90
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A flang/test/Lower/finit-local-exclusions.f90
A flang/test/Lower/finit-local-f128.f90
A flang/test/Lower/finit-local-kind-mapping-rtchar.f90
A flang/test/Lower/finit-local-kind-mapping-subbyte.f90
A flang/test/Lower/finit-local-kind-mapping.f90
A flang/test/Lower/finit-local-logical-llvm.f90
A flang/test/Lower/finit-local-packed.f90
A flang/test/Lower/finit-local-ppc-vector-llvm.f90
A flang/test/Lower/finit-local-real10-llvm.f90
A flang/test/Lower/finit-local-unsigned.f90
A flang/test/Lower/finit-local-volatile-llvm.f90
A flang/test/Lower/finit-local-volatile-real10.f90
A flang/test/Lower/finit-local-volatile.f90
A flang/test/Lower/finit-local.f90
M flang/test/Lower/forall-pointer-assignment.f90
M flang/test/Lower/forall/degenerate.f90
M flang/test/Lower/forall/forall-allocatable-2.f90
M flang/test/Lower/forall/forall-allocatable.f90
M flang/test/Lower/forall/forall-where-2.f90
M flang/test/Lower/global-alignment.f90
M flang/test/Lower/goto-do-body.f90
M flang/test/Lower/host_module_variable_instantiation_use_device.f90
A flang/test/Lower/if-constant-condition.f90
M flang/test/Lower/ifconvert.f90
M flang/test/Lower/infinite_loop.f90
M flang/test/Lower/inline-hlfir-assign-pointer-omp.f90
M flang/test/Lower/inline_directive.f90
M flang/test/Lower/inlinealways-directive.f90
M flang/test/Lower/intentout-deallocate.f90
M flang/test/Lower/io-derived-type.f90
A flang/test/Lower/io-implied-do-collapse.f90
M flang/test/Lower/io-implied-do-fixes.f90
M flang/test/Lower/io-statement-1.f90
M flang/test/Lower/io-statement-3.f90
M flang/test/Lower/io-statement-clean-ups.f90
M flang/test/Lower/io-write.f90
M flang/test/Lower/ivdep.f90
M flang/test/Lower/loops.f90
M flang/test/Lower/mixed_loops.f90
M flang/test/Lower/module-parameter-linkonce-odr.f90
M flang/test/Lower/module_definition.f90
M flang/test/Lower/module_use.f90
M flang/test/Lower/namelist-common-block.f90
M flang/test/Lower/namelist.f90
M flang/test/Lower/nullify-polymorphic.f90
M flang/test/Lower/optional-value-caller.f90
M flang/test/Lower/pointer-assignments.f90
M flang/test/Lower/pointer-association-polymorphic.f90
M flang/test/Lower/pointer-default-init.f90
M flang/test/Lower/pointer-initial-target-2.f90
M flang/test/Lower/pointer-references.f90
M flang/test/Lower/pointer-results-as-arguments.f90
M flang/test/Lower/pointer-runtime.f90
M flang/test/Lower/polymorphic-temp.f90
M flang/test/Lower/polymorphic-types.f90
M flang/test/Lower/polymorphic.f90
M flang/test/Lower/pre-fir-tree-assigned-goto.f90
A flang/test/Lower/pre-fir-tree-branch-into-body.f90
A flang/test/Lower/pre-fir-tree-incoming-branches.f90
A flang/test/Lower/pre-fir-tree-unstructured-internals.f90
M flang/test/Lower/select-case-statement.f90
M flang/test/Lower/select-type-2.fir
M flang/test/Lower/select-type.f90
M flang/test/Lower/simd-directive.f90
M flang/test/Lower/statement-function.f90
M flang/test/Lower/stop-statement.f90
M flang/test/Lower/structure-constructors-alloc-comp.f90
M flang/test/Lower/submodule.f90
M flang/test/Lower/trailing-cycle.f90
M flang/test/Lower/transformational-intrinsics.f90
M flang/test/Lower/typeof-classof.f90
A flang/test/Lower/unique-internal-linkage-names.f90
M flang/test/Lower/unroll.f90
M flang/test/Lower/unroll_and_jam.f90
M flang/test/Lower/unsigned-ops.f90
M flang/test/Lower/variable-common-viewed-as-module-var.f90
M flang/test/Lower/variable.f90
M flang/test/Lower/vector-always.f90
M flang/test/Lower/vector-subscript-io.f90
M flang/test/Lower/vectorlength.f90
M flang/test/Lower/volatile-derived-type.f90
M flang/test/Lower/volatile-openmp1.f90
M flang/test/Lower/volatile-string.f90
M flang/test/Lower/volatile1.f90
M flang/test/Lower/volatile2.f90
M flang/test/Lower/volatile3.f90
M flang/test/Lower/volatile4.f90
M flang/test/Lower/while_loop.f90
M flang/test/Lower/zero-size.f90
M flang/test/Parser/acc-label-do.f90
A flang/test/Semantics/OpenACC/acc-routine-loop-nesting.f90
M flang/test/Semantics/OpenMP/allocate02.f90
M flang/test/Semantics/OpenMP/allocate03.f90
M flang/test/Semantics/OpenMP/allocate04.f90
M flang/test/Semantics/OpenMP/allocate05.f90
M flang/test/Semantics/OpenMP/allocate06.f90
M flang/test/Semantics/OpenMP/allocate07.f90
M flang/test/Semantics/OpenMP/allocate09.f90
M flang/test/Semantics/OpenMP/allocators01.f90
M flang/test/Semantics/OpenMP/allocators05.f90
M flang/test/Semantics/OpenMP/declare-reduction-ambiguous.f90
M flang/test/Semantics/OpenMP/defaultmap-clause-none.f90
M flang/test/Semantics/OpenMP/depend01.f90
M flang/test/Semantics/OpenMP/do-concurrent-collapse.f90
M flang/test/Semantics/OpenMP/masked.f90
M flang/test/Semantics/OpenMP/nontemporal.f90
M flang/test/Semantics/OpenMP/ordered01.f90
M flang/test/Semantics/OpenMP/requires01.f90
M flang/test/Semantics/OpenMP/requires02.f90
M flang/test/Semantics/OpenMP/requires03.f90
M flang/test/Semantics/OpenMP/requires06.f90
M flang/test/Semantics/OpenMP/requires07.f90
M flang/test/Semantics/OpenMP/requires08.f90
M flang/test/Semantics/OpenMP/requires09.f90
M flang/test/Semantics/OpenMP/simd-only.f90
A flang/test/Semantics/OpenMP/taskwait-nowait.f90
A flang/test/Semantics/bind-c20.f90
A flang/test/Semantics/bind-c21.f90
M flang/test/Semantics/call10.f90
A flang/test/Semantics/interface-body-data.f90
M flang/test/Transforms/CUF/cuf-kernel-licm.fir
M flang/test/Transforms/DoConcurrent/basic_device.f90
M flang/test/Transforms/DoConcurrent/basic_host.f90
M flang/test/Transforms/DoConcurrent/basic_host.mlir
M flang/test/Transforms/DoConcurrent/locality_specifiers_simple.mlir
M flang/test/Transforms/DoConcurrent/locally_destroyed_temp.f90
M flang/test/Transforms/DoConcurrent/multiple_iteration_ranges.f90
M flang/test/Transforms/DoConcurrent/not_perfectly_nested.f90
M flang/test/Transforms/DoConcurrent/reduce_add.mlir
M flang/test/Transforms/DoConcurrent/reduce_all_regions.mlir
M flang/test/Transforms/DoConcurrent/reduce_local.mlir
M flang/test/Transforms/DoConcurrent/skip_all_nested_loops.f90
M flang/test/Transforms/FIRToMemRef/slice.mlir
A flang/test/Transforms/OpenACC/acc-implicit-data-device-data.fir
M flang/test/Transforms/OpenACC/acc-implicit-declare-module-parameter.fir
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-alloca.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-embox.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-rebox.F90
M flang/test/Transforms/OpenACC/acc-implicit-declare-type-descriptor-type_desc.F90
M flang/test/Transforms/OpenMP/lower-workdistribute-fission-host.mlir
M flang/test/Transforms/OpenMP/lower-workdistribute-fission-target.mlir
M flang/test/Transforms/OpenMP/lower-workshare-thread-local.mlir
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
A flang/test/Transforms/debug-include-file.fir
M flang/test/Transforms/debug-module-submodule-procedure.fir
A flang/test/Transforms/debug-submodule.fir
M flang/test/Transforms/do-concurrent-localizer-dealloc-region.fir
M flang/test/Transforms/do-concurrent-localizer-init-region.fir
A flang/test/Transforms/function-attrs-unique-internal-linkage-names.fir
A flang/test/Transforms/licm-acc-captured-ref.fir
A flang/test/Transforms/licm-acc-compute-only.fir
A flang/test/Transforms/licm-scope.fir
M flang/test/Transforms/licm.fir
M flang/test/Transforms/loop-versioning.fir
M flang/test/Transforms/lower-repack-arrays.fir
M flang/test/Transforms/simplifyintrinsics.fir
M flang/test/Transforms/stack-arrays-lifetime.fir
M flang/test/Transforms/stack-arrays.fir
M flang/test/Transforms/tbaa-cray-pointer.fir
M flang/test/Transforms/tbaa-derived-type-records.fir
M flang/test/Transforms/tbaa-derived-with-descriptor.fir
M flang/test/Transforms/tbaa-for-common-vars.fir
M flang/test/Transforms/tbaa-for-global-equiv-vars.fir
M flang/test/Transforms/tbaa-target-inlined-results.fir
M flang/test/Transforms/tbaa-value-dummy-arg.fir
M flang/test/Transforms/tbaa-with-dummy-scope.fir
M flang/test/Transforms/tbaa-with-dummy-scope2.fir
M flang/test/Transforms/tbaa.fir
M flang/test/Transforms/tbaa2.fir
M flang/test/Transforms/tbaa3.fir
M flang/test/Transforms/tbaa4.fir
M flang/tools/bbc/bbc.cpp
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/app.h
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/i386/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/docs/conf.py
M libc/fuzzing/__support/CMakeLists.txt
M libc/hdr/CMakeLists.txt
A libc/hdr/poll_macros.h
A libc/hdr/sys_xattr_macros.h
M libc/include/CMakeLists.txt
M libc/include/arpa/inet.yaml
M libc/include/fcntl.yaml
M libc/include/grp.yaml
M libc/include/llvm-libc-macros/CMakeLists.txt
A libc/include/llvm-libc-macros/common-threads-macros.h
M libc/include/llvm-libc-macros/limits-macros.h
M libc/include/llvm-libc-macros/linux/CMakeLists.txt
M libc/include/llvm-libc-macros/linux/fcntl-macros.h
A libc/include/llvm-libc-macros/linux/sys-xattr-macros.h
M libc/include/llvm-libc-macros/linux/unistd-macros.h
A libc/include/llvm-libc-macros/sys-xattr-macros.h
A libc/include/llvm-libc-macros/threads-macros.h
M libc/include/poll.yaml
M libc/include/pwd.yaml
M libc/include/sched.yaml
M libc/include/stdio.yaml
M libc/include/stdlib.yaml
M libc/include/sys/select.yaml
M libc/include/sys/stat.yaml
M libc/include/sys/xattr.yaml
M libc/include/threads.yaml
M libc/include/unistd.yaml
M libc/lib/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/FPUtil/FEnvImpl.h
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
A libc/src/__support/File/file_io_result.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/access.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/chdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/chmod.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/close.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/dup3.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/faccessat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fchmod.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/fdatasync.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/fgetxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/fsetxattr.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/fsync.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/ftruncate.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/getcwd.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/getxattr.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/lgetxattr.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/link.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/lseek.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/lsetxattr.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/memfd_create.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/mkdir.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/mkdirat.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/pause.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/ppoll.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/pselect6.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/read.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/readlink.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/readlinkat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/rename.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/renameat.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/rmdir.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/setxattr.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/statx.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/unlink.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/unlinkat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/utimensat.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/write.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/block.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.cpp
M libc/src/__support/freetrie.h
M libc/src/__support/math/CMakeLists.txt
M libc/src/__support/math/bf16sub.h
M libc/src/__support/math/bf16subf.h
M libc/src/__support/math/bf16subf128.h
M libc/src/__support/math/cosf.h
A libc/src/__support/math/cosf_double_eval.h
A libc/src/__support/math/cosf_float_eval.h
M libc/src/__support/math/lgammaf.h
M libc/src/__support/math/sinf.h
A libc/src/__support/math/sinf_double_eval.h
A libc/src/__support/math/sinf_float_eval.h
M libc/src/__support/net/CMakeLists.txt
M libc/src/__support/net/address.cpp
M libc/src/__support/net/address.h
M libc/src/__support/printf_core/float_dec_converter.h
M libc/src/__support/printf_core/float_dec_converter_limited.h
M libc/src/__support/printf_core/float_hex_converter.h
M libc/src/__support/printf_core/float_inf_nan_converter.h
M libc/src/__support/pwd/flat_file_db.h
M libc/src/__support/threads/CMakeLists.txt
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/tls.cpp
A libc/src/__support/threads/linux/riscv/CMakeLists.txt
A libc/src/__support/threads/linux/riscv/tls.cpp
M libc/src/__support/threads/linux/thread.cpp
A libc/src/__support/threads/linux/x86_64/CMakeLists.txt
A libc/src/__support/threads/linux/x86_64/tls.cpp
M libc/src/__support/threads/thread.cpp
M libc/src/__support/tlsf_table.h
M libc/src/arpa/inet/CMakeLists.txt
A libc/src/arpa/inet/inet_pton.cpp
A libc/src/arpa/inet/inet_pton.h
M libc/src/fcntl/CMakeLists.txt
M libc/src/fcntl/linux/CMakeLists.txt
A libc/src/fcntl/linux/posix_fallocate.cpp
A libc/src/fcntl/posix_fallocate.h
M libc/src/grp/CMakeLists.txt
A libc/src/grp/getgrgid.cpp
A libc/src/grp/getgrgid.h
A libc/src/grp/getgrnam.cpp
A libc/src/grp/getgrnam.h
A libc/src/grp/getgrouplist.cpp
A libc/src/grp/getgrouplist.h
M libc/src/grp/grp_utils.cpp
M libc/src/grp/grp_utils.h
M libc/src/poll/CMakeLists.txt
M libc/src/poll/linux/CMakeLists.txt
A libc/src/poll/linux/ppoll.cpp
A libc/src/poll/ppoll.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_create.cpp
M libc/src/pwd/CMakeLists.txt
A libc/src/pwd/getpwent_r.cpp
A libc/src/pwd/getpwent_r.h
M libc/src/pwd/pwd_utils.cpp
M libc/src/pwd/pwd_utils.h
M libc/src/sched/CMakeLists.txt
A libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/clone.cpp
M libc/src/stdio/CMakeLists.txt
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/file_internal.h
M libc/src/stdio/linux/CMakeLists.txt
A libc/src/stdio/linux/renameat.cpp
A libc/src/stdio/renameat.h
M libc/src/stdlib/CMakeLists.txt
M libc/src/stdlib/linux/CMakeLists.txt
A libc/src/stdlib/linux/secure_getenv.cpp
A libc/src/stdlib/secure_getenv.h
M libc/src/stdlib/str_from_util.h
M libc/src/stdlib/strfromd.cpp
M libc/src/stdlib/strfromf.cpp
M libc/src/stdlib/strfroml.cpp
M libc/src/sys/select/CMakeLists.txt
M libc/src/sys/select/linux/CMakeLists.txt
A libc/src/sys/select/linux/pselect.cpp
M libc/src/sys/select/linux/select.cpp
A libc/src/sys/select/pselect.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mknod.cpp
A libc/src/sys/stat/linux/mknodat.cpp
A libc/src/sys/stat/mknod.h
A libc/src/sys/stat/mknodat.h
M libc/src/sys/xattr/CMakeLists.txt
A libc/src/sys/xattr/fgetxattr.h
M libc/src/sys/xattr/flistxattr.h
A libc/src/sys/xattr/fsetxattr.h
A libc/src/sys/xattr/getxattr.h
A libc/src/sys/xattr/lgetxattr.h
M libc/src/sys/xattr/linux/CMakeLists.txt
A libc/src/sys/xattr/linux/fgetxattr.cpp
M libc/src/sys/xattr/linux/flistxattr.cpp
A libc/src/sys/xattr/linux/fsetxattr.cpp
A libc/src/sys/xattr/linux/getxattr.cpp
A libc/src/sys/xattr/linux/lgetxattr.cpp
M libc/src/sys/xattr/linux/listxattr.cpp
M libc/src/sys/xattr/linux/llistxattr.cpp
A libc/src/sys/xattr/linux/lsetxattr.cpp
A libc/src/sys/xattr/linux/setxattr.cpp
M libc/src/sys/xattr/listxattr.h
M libc/src/sys/xattr/llistxattr.h
A libc/src/sys/xattr/lsetxattr.h
A libc/src/sys/xattr/setxattr.h
M libc/src/threads/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
A libc/src/unistd/fdatasync.h
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/fdatasync.cpp
A libc/src/unistd/linux/pause.cpp
M libc/src/unistd/linux/sysconf.cpp
A libc/src/unistd/pause.h
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/CMakeLists.txt
R libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/CMakeLists.txt
R libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
R libc/startup/linux/x86_64/tls.cpp
M libc/test/integration/src/pthread/CMakeLists.txt
M libc/test/integration/src/pthread/pthread_tss_test.cpp
M libc/test/integration/src/stdlib/CMakeLists.txt
A libc/test/integration/src/stdlib/secure_getenv_test.cpp
M libc/test/integration/src/threads/tss_test.cpp
M libc/test/shared/shared_math_constexpr_test.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/arpa/inet/CMakeLists.txt
A libc/test/src/arpa/inet/inet_pton_test.cpp
M libc/test/src/fcntl/CMakeLists.txt
A libc/test/src/fcntl/posix_fallocate_test.cpp
M libc/test/src/grp/CMakeLists.txt
A libc/test/src/grp/getgrgid_test.cpp
A libc/test/src/grp/getgrnam_test.cpp
A libc/test/src/grp/getgrouplist_test.cpp
M libc/test/src/math/CMakeLists.txt
R libc/test/src/math/cosf_float_test.cpp
M libc/test/src/math/cosf_test.cpp
M libc/test/src/math/exhaustive/CMakeLists.txt
R libc/test/src/math/exhaustive/cosf_float_test.cpp
M libc/test/src/math/exhaustive/cosf_test.cpp
R libc/test/src/math/exhaustive/sinf_float_test.cpp
M libc/test/src/math/exhaustive/sinf_test.cpp
R libc/test/src/math/sinf_float_test.cpp
M libc/test/src/math/sinf_test.cpp
M libc/test/src/poll/CMakeLists.txt
A libc/test/src/poll/ppoll_test.cpp
M libc/test/src/pwd/CMakeLists.txt
A libc/test/src/pwd/getpwent_r_test.cpp
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/linux/CMakeLists.txt
A libc/test/src/sched/linux/clone_test.cpp
M libc/test/src/stdio/CMakeLists.txt
A libc/test/src/stdio/renameat_test.cpp
M libc/test/src/stdlib/strfromf_test.cpp
M libc/test/src/sys/select/CMakeLists.txt
A libc/test/src/sys/select/pselect_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
M libc/test/src/sys/stat/chmod_test.cpp
A libc/test/src/sys/stat/mknod_test.cpp
A libc/test/src/sys/stat/mknodat_test.cpp
M libc/test/src/sys/xattr/CMakeLists.txt
R libc/test/src/sys/xattr/flistxattr_test.cpp
A libc/test/src/sys/xattr/fxattr_test.cpp
R libc/test/src/sys/xattr/listxattr_test.cpp
R libc/test/src/sys/xattr/llistxattr_test.cpp
A libc/test/src/sys/xattr/lxattr_test.cpp
A libc/test/src/sys/xattr/xattr_test.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/fdatasync_test.cpp
A libc/test/src/unistd/pause_test.cpp
M libc/test/src/unistd/sysconf_test.cpp
M libcxx/cmake/caches/Generic-llvm-libc.cmake
A libcxx/docs/ABIGuarantees.md
R libcxx/docs/ABIGuarantees.rst
A libcxx/docs/AddingNewCIJobs.md
R libcxx/docs/AddingNewCIJobs.rst
A libcxx/docs/CodingGuidelines.md
R libcxx/docs/CodingGuidelines.rst
A libcxx/docs/Contributing.md
R libcxx/docs/Contributing.rst
A libcxx/docs/Contributing/NewStandardProcedure.md
R libcxx/docs/Contributing/NewStandardProcedure.rst
A libcxx/docs/Contributing/PostMeetingProcedure.md
R libcxx/docs/Contributing/PostMeetingProcedure.rst
A libcxx/docs/Contributing/ReleaseProcedure.md
R libcxx/docs/Contributing/ReleaseProcedure.rst
A libcxx/docs/DesignDocs/ABIVersioning.md
R libcxx/docs/DesignDocs/ABIVersioning.rst
A libcxx/docs/DesignDocs/AtomicDesign.md
R libcxx/docs/DesignDocs/AtomicDesign.rst
A libcxx/docs/DesignDocs/CapturingConfigInfo.md
R libcxx/docs/DesignDocs/CapturingConfigInfo.rst
A libcxx/docs/DesignDocs/ExperimentalFeatures.md
R libcxx/docs/DesignDocs/ExperimentalFeatures.rst
A libcxx/docs/DesignDocs/ExtendedCXX03Support.md
R libcxx/docs/DesignDocs/ExtendedCXX03Support.rst
A libcxx/docs/DesignDocs/FeatureTestMacros.md
R libcxx/docs/DesignDocs/FeatureTestMacros.rst
A libcxx/docs/DesignDocs/FileTimeType.md
R libcxx/docs/DesignDocs/FileTimeType.rst
A libcxx/docs/DesignDocs/HeaderRemovalPolicy.md
R libcxx/docs/DesignDocs/HeaderRemovalPolicy.rst
M libcxx/docs/Hardening.rst
M libcxx/docs/Status/Cxx17Issues.csv
M libcxx/docs/TestingLibcxx.rst
M libcxx/docs/conf.py
M libcxx/docs/index.rst
M libcxx/include/CMakeLists.txt
M libcxx/include/__algorithm/pstl.h
M libcxx/include/__chrono/convert_to_tm.h
M libcxx/include/__chrono/duration.h
M libcxx/include/__configuration/abi.h
M libcxx/include/__configuration/attributes.h
M libcxx/include/__format/buffer.h
M libcxx/include/__locale_dir/locale_base_api.h
M libcxx/include/__locale_dir/locale_base_api/bsd_locale_fallbacks.h
M libcxx/include/__locale_dir/num.h
M libcxx/include/__locale_dir/support/aix.h
M libcxx/include/__locale_dir/support/bsd_like.h
M libcxx/include/__locale_dir/support/fuchsia.h
M libcxx/include/__locale_dir/support/linux.h
M libcxx/include/__locale_dir/support/newlib.h
M libcxx/include/__locale_dir/support/no_locale/strtonum.h
M libcxx/include/__locale_dir/support/openbsd.h
M libcxx/include/__locale_dir/support/windows.h
M libcxx/include/__ostream/print.h
M libcxx/include/__pstl/backend_fwd.h
M libcxx/include/__pstl/backends/default.h
M libcxx/include/__pstl/backends/libdispatch.h
M libcxx/include/__pstl/backends/serial.h
M libcxx/include/__pstl/backends/std_thread.h
A libcxx/include/__pstl/cpu_algos/swap_ranges.h
M libcxx/include/__ranges/adjacent_transform_view.h
M libcxx/include/__ranges/adjacent_view.h
M libcxx/include/__ranges/chunk_by_view.h
M libcxx/include/__ranges/common_view.h
M libcxx/include/__ranges/concat_view.h
M libcxx/include/__ranges/counted.h
M libcxx/include/__ranges/drop_view.h
M libcxx/include/__ranges/drop_while_view.h
M libcxx/include/__ranges/elements_view.h
M libcxx/include/__ranges/empty_view.h
M libcxx/include/__ranges/enumerate_view.h
M libcxx/include/__ranges/filter_view.h
M libcxx/include/__ranges/iota_view.h
M libcxx/include/__ranges/join_view.h
M libcxx/include/__ranges/join_with_view.h
M libcxx/include/__ranges/lazy_split_view.h
M libcxx/include/__ranges/movable_box.h
M libcxx/include/__ranges/non_propagating_cache.h
M libcxx/include/__ranges/rbegin.h
M libcxx/include/__ranges/rend.h
M libcxx/include/__ranges/reverse_view.h
M libcxx/include/__ranges/single_view.h
M libcxx/include/__ranges/split_view.h
M libcxx/include/__ranges/stride_view.h
M libcxx/include/__ranges/take_view.h
M libcxx/include/__ranges/take_while_view.h
M libcxx/include/__ranges/to.h
M libcxx/include/__ranges/transform_view.h
M libcxx/include/__ranges/views.h
M libcxx/include/__ranges/zip_transform_view.h
M libcxx/include/__ranges/zip_view.h
M libcxx/include/complex
M libcxx/include/list
M libcxx/include/module.modulemap.in
M libcxx/include/valarray
M libcxx/src/std_stream.h
M libcxx/src/support/win32/locale_win32.cpp
M libcxx/test/CMakeLists.txt
R libcxx/test/benchmarks/CMakeLists.txt
A libcxx/test/benchmarks/algorithms/nonmodifying/pstl.find.bench.cpp
A libcxx/test/benchmarks/algorithms/sorting/pstl.sort.bench.cpp
M libcxx/test/benchmarks/containers/associative/associative_container_benchmarks.h
M libcxx/test/benchmarks/containers/string.bench.cpp
M libcxx/test/benchmarks/filesystem.bench.cpp
A libcxx/test/benchmarks/lit.local.cfg
M libcxx/test/benchmarks/monotonic_buffer.bench.cpp
A libcxx/test/benchmarks/numeric/pstl.transform_reduce.bench.cpp
M libcxx/test/configs/harness-configuration.cfg.in
M libcxx/test/configs/ibm-libc++-shared.cfg.in
M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
A libcxx/test/libcxx/input.output/iostream.objects/cin-read-stdio-sync.sh.cpp
A libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/pstl.swap_ranges.pass.cpp
M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp
M libcxx/test/std/containers/container.adaptors/priority.queue/priqueue.members/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/push_range_container_adaptors.h
M libcxx/test/std/containers/container.adaptors/queue/queue.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/queue/queue.defn/push_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.cons/from_range.pass.cpp
M libcxx/test/std/containers/container.adaptors/stack/stack.defn/push_range.pass.cpp
A libcxx/test/std/numerics/complex.number/complex/complex_requires_cv_unqualified_object.verify.cpp
A libcxx/test/std/numerics/numarray/template.valarray/valarray_requires_cv_unqualified_object.verify.cpp
M libcxx/test/std/thread/thread.threads/thread.thread.this/sleep_for.signals.pass.cpp
M libcxx/test/std/time/months.pass.cpp
M libcxx/test/std/time/years.pass.cpp
A libcxx/test/std/utilities/format/format.functions/bug_154670.pass.cpp
M libcxx/utils/ci/docker/linux-builder.dockerfile
R libcxx/utils/ci/images/libcxx_next_runners.txt
R libcxx/utils/ci/images/libcxx_release_runners.txt
R libcxx/utils/ci/images/libcxx_runners.txt
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/dispatch-benchmarks
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
A libcxx/utils/ci/lnt/run-libstdcxx-benchmarks
R libcxx/utils/ci/lnt/schema.yaml
A libcxx/utils/ci/lnt/schemas/libcxx.yaml
A libcxx/utils/ci/lnt/schemas/libstdcxx.yaml
M libcxx/utils/ci/run-buildbot
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/format.py
A libcxx/utils/libcxx/test/googlebenchmark.py
M libcxx/utils/libcxx/test/params.py
M libcxx/utils/test-at-commit
M libcxxabi/src/cxa_personality.cpp
M libcxxabi/test/CMakeLists.txt
M libcxxabi/test/configs/cmake-bridge.cfg.in
M libcxxabi/test/cxa_thread_atexit_test.pass.cpp
M libsycl/include/sycl/__spirv/spirv_vars.hpp
M libsycl/src/CMakeLists.txt
M libsycl/src/detail/context_impl.cpp
M libsycl/src/detail/device_image_wrapper.cpp
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/offload/offload_utils.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
M libsycl/src/detail/queue_impl.cpp
A libsycl/src/detail/suppress_extra_warnings.hpp
M libsycl/src/handler.cpp
M libsycl/src/usm_functions.cpp
A libsycl/test/basic/linux-rpath.test
M libsycl/test/lit.cfg.py
M libsycl/unittests/common/unittests_helper.hpp
M libsycl/unittests/handler/semantics.cpp
M libsycl/unittests/mock/helpers.hpp
M libsycl/unittests/queue/memcpy.cpp
M libsycl/unittests/queue/prefetch.cpp
M libsycl/unittests/queue/queue.cpp
M libsycl/unittests/usm/alloc.cpp
M libunwind/include/unwind_wasm.h
M libunwind/src/Unwind-wasm.c
M libunwind/test/CMakeLists.txt
M libunwind/test/configs/cmake-bridge.cfg.in
M lld/ELF/Arch/X86_64.cpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/MarkLive.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/ELF/SyntheticSections.h
M lld/ELF/Writer.cpp
M lld/MachO/InputSection.cpp
M lld/MachO/InputSection.h
M lld/MachO/MapFile.cpp
M lld/MachO/Relocations.cpp
M lld/MachO/Symbols.cpp
M lld/MachO/Symbols.h
M lld/MachO/SyntheticSections.cpp
M lld/MachO/SyntheticSections.h
M lld/MachO/Writer.cpp
M lld/docs/conf.py
M lld/test/ELF/lto/riscv-target-abi.ll
M lld/test/ELF/ppc64-long-branch-rel14.s
M lld/test/ELF/pre_init_fini_array.s
M lld/test/ELF/systemz-gotent-relax-align.s
M lld/test/ELF/why-live.test
M lld/test/ELF/x86-64-gotpc-relax-too-far-relr.s
M lld/test/ELF/x86-64-plt.s
M lld/test/ELF/x86-64-tls-gdie.s
M lld/test/ELF/x86-64-tls-pltoff64.s
M lld/test/ELF/x86-64-tlsdesc-gd.s
M lld/test/MachO/arm64-objc-stubs-dead.s
M lld/test/MachO/arm64-objc-stubs.s
M lld/test/MachO/arm64-reloc-tlv-load.s
M lld/test/MachO/flat-namespace-interposable.s
A lld/test/MachO/got-to-tlv-reference.s
M lld/test/MachO/indirect-symtab.s
R lld/test/MachO/invalid/bad-got-to-dylib-tlv-reference.s
R lld/test/MachO/invalid/bad-got-to-tlv-reference.s
M lld/test/MachO/map-file.s
M lld/test/MachO/objc-stubs-order-file.s
M lld/test/MachO/tapi-link.s
M lld/test/MachO/tlv-dylib.s
A lld/test/MachO/tlv-dynamic-lookup-x86.s
A lld/test/MachO/tlv-dynamic-lookup.s
A lld/test/MachO/tlv-non-lazy-pointer.s
M lld/test/MachO/weak-binding.s
M lld/test/MachO/weak-reference.s
M lld/test/MachO/x86-64-objc-stubs.s
M lld/test/wasm/check-arch-32-in-64.test
M lld/test/wasm/check-arch-64-in-32.test
M lld/test/wasm/dylink.s
M lld/test/wasm/emit-relocs.s
M lld/test/wasm/locals-duplicate.test
M lld/test/wasm/lto/relocatable-undefined.ll
M lld/test/wasm/pie.s
M lld/test/wasm/relocatable.ll
M lld/test/wasm/rpath.s
M lld/test/wasm/shared-needed.s
M lld/test/wasm/shared-weak-undefined.s
M lld/test/wasm/shared.s
M lld/test/wasm/shared64.s
M lld/test/wasm/signature-mismatch-relocatable.s
M lld/test/wasm/signature-mismatch.s
M lld/test/wasm/stack-pointer.s
M lld/test/wasm/tls-export.s
M lld/test/wasm/weak-alias.s
M lld/wasm/InputFiles.cpp
M lld/wasm/SyntheticSections.cpp
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/interface/SBProcessExtensions.i
M lldb/docs/conf.py
M lldb/docs/dil-expr-lang.ebnf
M lldb/examples/darwin/heap_find/heap.py
M lldb/examples/darwin/heap_find/heap/heap_find.cpp
M lldb/examples/python/file_extract.py
M lldb/examples/python/templates/scripted_process.py
M lldb/examples/synthetic/libcxx.py
M lldb/include/lldb/API/SBBreakpoint.h
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/Breakpoint/Breakpoint.h
M lldb/include/lldb/Breakpoint/BreakpointLocation.h
M lldb/include/lldb/Breakpoint/StopCondition.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Host/common/NativeProcessProtocol.h
M lldb/include/lldb/Interpreter/CommandOptionArgumentTable.h
M lldb/include/lldb/Interpreter/Interfaces/ScriptedHookInterface.h
M lldb/include/lldb/Target/DynamicRegisterInfo.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Target/ThreadPlan.h
A lldb/include/lldb/Target/ThreadPlanRunToBreakpoint.h
M lldb/include/lldb/Utility/Args.h
M lldb/include/lldb/Utility/Broadcaster.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/include/lldb/Utility/DataEncoder.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/include/lldb/Utility/RegularExpression.h
M lldb/include/lldb/Utility/State.h
M lldb/include/lldb/Utility/Status.h
M lldb/include/lldb/Utility/Stream.h
M lldb/include/lldb/Utility/StreamBuffer.h
M lldb/include/lldb/Utility/StreamString.h
M lldb/include/lldb/Utility/StructuredData.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/lldbinline.py
M lldb/packages/Python/lldbsuite/test/lldbplatform.py
M lldb/packages/Python/lldbsuite/test/lldbplatformutil.py
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/source/API/SBBreakpoint.cpp
M lldb/source/API/SBData.cpp
M lldb/source/API/SBProcess.cpp
M lldb/source/API/SBValue.cpp
M lldb/source/Breakpoint/Breakpoint.cpp
M lldb/source/Breakpoint/BreakpointLocation.cpp
M lldb/source/Commands/CommandObjectBreakpoint.cpp
M lldb/source/Commands/CommandObjectDWIMPrint.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Commands/CommandObjectVersion.cpp
M lldb/source/Commands/Options.td
M lldb/source/Core/Address.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/IOHandlerCursesGUI.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/Expression/UserExpression.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Interpreter/CommandInterpreter.cpp
M lldb/source/Interpreter/OptionGroupFormat.cpp
M lldb/source/Plugins/DynamicLoader/FreeBSD-Kernel/DynamicLoaderFreeBSDKernel.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/Highlighter/TreeSitter/Swift/tree-sitter-swift/scanner.c
M lldb/source/Plugins/ObjectContainer/CMakeLists.txt
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/CMakeLists.txt
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/ObjectContainerClangOffloadBundle.cpp
A lldb/source/Plugins/ObjectContainer/Clang-Offload-Bundle/ObjectContainerClangOffloadBundle.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/ObjectFile/wasm/ObjectFileWasm.cpp
M lldb/source/Plugins/Platform/MacOSX/CMakeLists.txt
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Platform/Windows/PlatformWindows.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.cpp
M lldb/source/Plugins/Process/FreeBSD-Kernel-Core/ProcessFreeBSDKernelCore.h
M lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp
M lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp
M lldb/source/Plugins/Process/Windows/Common/x64/RegisterContextWindows_x64.cpp
M lldb/source/Plugins/Process/Windows/Common/x86/RegisterContextWindows_x86.cpp
M lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.cpp
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedHookPythonInterface.h
M lldb/source/Plugins/ScriptInterpreter/Python/Interfaces/ScriptedPythonInterface.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/SymbolFile/NativePDB/SymbolFileNativePDB.cpp
M lldb/source/Plugins/TypeSystem/CMakeLists.txt
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
A lldb/source/Plugins/TypeSystem/Clike/CMakeLists.txt
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.cpp
A lldb/source/Plugins/TypeSystem/Clike/TypeSystemClike.h
M lldb/source/Symbol/ObjectFile.cpp
M lldb/source/Target/CMakeLists.txt
M lldb/source/Target/DynamicRegisterInfo.cpp
M lldb/source/Target/Process.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Target/Target.cpp
M lldb/source/Target/TargetProperties.td
A lldb/source/Target/ThreadPlanRunToBreakpoint.cpp
M lldb/source/Utility/Args.cpp
M lldb/source/Utility/DataExtractor.cpp
M lldb/source/Utility/Policy.cpp
M lldb/source/Utility/Stream.cpp
M lldb/source/Utility/StreamString.cpp
M lldb/source/Utility/StructuredData.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp
M lldb/test/API/api/multithreaded/TestMultithreaded.py
M lldb/test/API/api/multithreaded/common.h
M lldb/test/API/api/multithreaded/listener_test.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_callback.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_location_callback.cpp
M lldb/test/API/api/multithreaded/test_listener_event_description.cpp
M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
M lldb/test/API/api/multithreaded/test_listener_resume.cpp
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
M lldb/test/API/commands/dwim-print/TestDWIMPrint.py
M lldb/test/API/commands/expression/issue_11588/Test11588.py
M lldb/test/API/commands/frame/var/TestFrameVar.py
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/functionalities/archives/Makefile
M lldb/test/API/functionalities/breakpoint/breakpoint_conditions/TestBreakpointConditions.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/TestDataFormatterStdString.py
M lldb/test/API/functionalities/duplicate-archive-members/Makefile
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/functionalities/scripted_extensions/TestScriptedExtensionsDiagnostics.py
M lldb/test/API/functionalities/scripted_extensions/malformed_scripted_extensions.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/TestFrameProviderPassThroughPrefix.py
M lldb/test/API/functionalities/scripted_frame_provider/pass_through_prefix/frame_provider.py
M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py
M lldb/test/API/functionalities/scripted_process/addressable_bits_scripted_process.py
M lldb/test/API/lang/objc/conflicting-definition/Makefile
M lldb/test/API/lang/objc/hidden-ivars/Makefile
M lldb/test/API/lit.cfg.py
M lldb/test/API/macosx/branch-islands/Makefile
M lldb/test/API/macosx/expedited-recent-reads/TestExpeditedRecentReads.py
M lldb/test/API/macosx/expedited-stack-memory/main.c
M lldb/test/API/macosx/find-dsym/bundle-with-dot-in-filename/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/Makefile
M lldb/test/API/macosx/find-dsym/deep-bundle/TestDeepBundle.py
M lldb/test/API/macosx/function-starts/Makefile
M lldb/test/API/macosx/function-starts/TestFunctionStarts.py
A lldb/test/API/macosx/lazy_library/Makefile
A lldb/test/API/macosx/lazy_library/TestStepThroughLazyLibrary.py
A lldb/test/API/macosx/lazy_library/library.c
A lldb/test/API/macosx/lazy_library/main.c
M lldb/test/API/macosx/lc-note/additional-registers/add-lcnote.cpp
M lldb/test/API/python_api/event/TestEvents.py
M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py
M lldb/test/API/python_api/sbmodule/Makefile
M lldb/test/API/python_api/value/TestValueAPI.py
M lldb/test/API/python_api/watchpoint/TestSetWatchpoint.py
M lldb/test/API/python_api/watchpoint/main.c
M lldb/test/API/tools/lldb-dap/evaluate/TestDAP_evaluate.py
M lldb/test/API/tools/lldb-dap/evaluate/main.cpp
M lldb/test/API/tools/lldb-server/main.cpp
M lldb/test/API/windows/launch/replace-dll/TestReplaceDLL.py
A lldb/test/Shell/ObjectFile/wasm/data-segment-names.yaml
A lldb/test/Shell/ScriptInterpreter/Python/nested_command_selected_target.test
M lldb/test/Shell/Settings/Inputs/EchoCommandsAll.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNoComments.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNone.out
A lldb/test/Shell/SymbolFile/NativePDB/Inputs/corrupt-public-offset.py
A lldb/test/Shell/SymbolFile/NativePDB/dedupe-exported-public-symbols.cpp
A lldb/test/Shell/SymbolFile/NativePDB/public-symbol-offset-past-section-end.cpp
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/PseudoTerminal.cpp
M lldb/tools/debugserver/source/RNBServices.cpp
M lldb/tools/debugserver/source/debugserver.cpp
M lldb/tools/lldb-dap/DAP.cpp
M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp
M lldb/tools/lldb-dap/LLDBUtils.h
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/tools/lldb-fuzzer/CMakeLists.txt
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/CMakeLists.txt
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/corefile.dict
A lldb/tools/lldb-fuzzer/lldb-corefile-fuzzer/lldb-corefile-fuzzer.cpp
M lldb/unittests/Callback/CMakeLists.txt
M lldb/unittests/Core/CMakeLists.txt
M lldb/unittests/Interpreter/CMakeLists.txt
M lldb/unittests/ObjectContainer/CMakeLists.txt
A lldb/unittests/ObjectContainer/ObjectContainerClangOffloadBundleTest.cpp
M lldb/unittests/Platform/CMakeLists.txt
M lldb/unittests/Process/CMakeLists.txt
M lldb/unittests/Process/gdb-remote/CMakeLists.txt
M lldb/unittests/Protocol/CMakeLists.txt
M lldb/unittests/Target/CMakeLists.txt
M lldb/unittests/Utility/DataEncoderTest.cpp
M lldb/unittests/Utility/DataExtractorTest.cpp
M lldb/unittests/Utility/PolicyTest.cpp
M lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestClient.cpp
M llvm/cmake/modules/FindLibXml2.cmake
M llvm/cmake/modules/GetLibraryName.cmake
M llvm/docs/AIToolPolicy.md
M llvm/docs/AMDGPU/DeveloperGuideline.rst
M llvm/docs/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack/AMDGPUDwarfExtensionAllowLocationDescriptionOnTheDwarfExpressionStack.md
M llvm/docs/AMDGPUDwarfExtensionsForHeterogeneousDebugging.rst
M llvm/docs/AMDGPUUsage.rst
M llvm/docs/AdminTasks.md
A llvm/docs/AlignedBundling.md
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M llvm/docs/CodeGenerator.md
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M llvm/docs/CodingStandards.md
M llvm/docs/CommandGuide/lit.md
M llvm/docs/CommandGuide/llvm-cov.md
M llvm/docs/CommandGuide/llvm-ir2vec.md
M llvm/docs/CommandGuide/llvm-remarkutil.md
M llvm/docs/CommandLine.md
M llvm/docs/CompileCudaWithLLVM.md
A llvm/docs/ConvergenceAndUniformity.md
R llvm/docs/ConvergenceAndUniformity.rst
A llvm/docs/ConvergentOperations.md
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A llvm/docs/DependenceGraphs/index.md
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M llvm/docs/DeveloperPolicy.md
M llvm/docs/DirectX/SemanticSignatures.md
M llvm/docs/ExtendingLLVM.md
A llvm/docs/FaultMaps.md
R llvm/docs/FaultMaps.rst
A llvm/docs/FuzzingLLVM.md
R llvm/docs/FuzzingLLVM.rst
A llvm/docs/GetElementPtr.md
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M llvm/docs/GettingInvolved.md
M llvm/docs/GettingStarted.md
A llvm/docs/GitBisecting.md
R llvm/docs/GitBisecting.rst
M llvm/docs/GitHub.md
A llvm/docs/GitHubActionsRunners.md
R llvm/docs/GitHubActionsRunners.rst
M llvm/docs/GitRepositoryPolicy.md
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A llvm/docs/HowToAddABuilder.md
R llvm/docs/HowToAddABuilder.rst
M llvm/docs/HowToBuildWithPGO.md
M llvm/docs/HowToCrossCompileBuiltinsOnArm.md
M llvm/docs/HowToCrossCompileLLVM.md
A llvm/docs/HowToReleaseLLVM.md
R llvm/docs/HowToReleaseLLVM.rst
A llvm/docs/HowToSetUpLLVMStyleRTTI.md
R llvm/docs/HowToSetUpLLVMStyleRTTI.rst
A llvm/docs/HowToSubmitABug.md
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A llvm/docs/HowToUseInstrMappings.md
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A llvm/docs/InAlloca.md
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M llvm/docs/InstrProfileFormat.md
M llvm/docs/InstrRefDebugInfo.md
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A llvm/docs/KernelInfo.md
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M llvm/docs/LFI.md
M llvm/docs/LangRef.md
M llvm/docs/Lexicon.md
A llvm/docs/LoopFusion.md
R llvm/docs/LoopFusion.rst
M llvm/docs/LoopTerminology.md
M llvm/docs/MIRLangRef.md
A llvm/docs/MLGO.md
R llvm/docs/MLGO.rst
M llvm/docs/MarkdownQuickstartTemplate.md
M llvm/docs/MeetupGuidelines.md
M llvm/docs/MemProf.md
M llvm/docs/MergeFunctions.md
M llvm/docs/NVPTXUsage.md
M llvm/docs/ORCv2.md
M llvm/docs/OpaquePointers.md
M llvm/docs/PDB/HashTable.md
M llvm/docs/PointerAuth.md
M llvm/docs/ProgrammersManual.md
M llvm/docs/Proposals/VectorPredication.md
M llvm/docs/QualGroup.md
M llvm/docs/RISCV/RISCVVectorExtension.md
M llvm/docs/RISCVUsage.md
M llvm/docs/ReleaseNotes.md
M llvm/docs/RemoveDIsDebugInfo.md
M llvm/docs/SandboxIR.md
M llvm/docs/ScudoHardenedAllocator.md
M llvm/docs/SecurityTransparencyReports.md
M llvm/docs/SphinxQuickstartTemplate.md
M llvm/docs/SupportPolicy.md
M llvm/docs/TestingGuide.md
M llvm/docs/UndefinedBehavior.md
M llvm/docs/conf.py
M llvm/docs/tutorial/BuildingAJIT1.md
M llvm/docs/tutorial/BuildingAJIT4.md
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.md
M llvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl10.md
M llvm/examples/Kaleidoscope/MCJIT/cached/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/cached/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/complete/genk-timing.py
M llvm/examples/Kaleidoscope/MCJIT/complete/split-lib.py
M llvm/examples/Kaleidoscope/MCJIT/lazy/genk-timing.py
M llvm/examples/OrcV2Examples/LLJITDumpObjects/LLJITDumpObjects.cpp
M llvm/examples/SpeculativeJIT/SpeculativeJIT.cpp
M llvm/include/llvm-c/Core.h
M llvm/include/llvm-c/DebugInfo.h
A llvm/include/llvm/ABI/DefaultTargetInfo.h
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/ADT/DenseMap.h
M llvm/include/llvm/ADT/DenseMapInfo.h
M llvm/include/llvm/ADT/DepthFirstIterator.h
M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
M llvm/include/llvm/Analysis/ConstantFolding.h
M llvm/include/llvm/Analysis/IVDescriptors.h
M llvm/include/llvm/Analysis/InstSimplifyFolder.h
M llvm/include/llvm/Analysis/InstructionSimplify.h
M llvm/include/llvm/Analysis/LazyValueInfo.h
M llvm/include/llvm/Analysis/Loads.h
M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h
M llvm/include/llvm/Analysis/ScalarEvolutionPatternMatch.h
M llvm/include/llvm/Analysis/SimplifyQuery.h
M llvm/include/llvm/Analysis/TargetFolder.h
M llvm/include/llvm/Analysis/TargetTransformInfo.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/AsmParser/LLParser.h
M llvm/include/llvm/AsmParser/LLToken.h
M llvm/include/llvm/BinaryFormat/Dwarf.def
M llvm/include/llvm/BinaryFormat/Dwarf.h
M llvm/include/llvm/BinaryFormat/ELF.h
M llvm/include/llvm/BinaryFormat/Wasm.h
M llvm/include/llvm/Bitcode/LLVMBitCodes.h
M llvm/include/llvm/CGData/CodeGenData.h
M llvm/include/llvm/CGData/CodeGenDataReader.h
M llvm/include/llvm/CodeGen/AsmPrinter.h
M llvm/include/llvm/CodeGen/BasicTTIImpl.h
M llvm/include/llvm/CodeGen/DIE.h
M llvm/include/llvm/CodeGen/FunctionLoweringInfo.h
M llvm/include/llvm/CodeGen/ISDOpcodes.h
M llvm/include/llvm/CodeGen/MIRParser/MIParser.h
M llvm/include/llvm/CodeGen/MIRYamlMapping.h
M llvm/include/llvm/CodeGen/MachinePipeliner.h
M llvm/include/llvm/CodeGen/MachineRegisterInfo.h
M llvm/include/llvm/CodeGen/Passes.h
M llvm/include/llvm/CodeGen/SDPatternMatch.h
M llvm/include/llvm/CodeGen/ScheduleDAG.h
M llvm/include/llvm/CodeGen/ScheduleDAGInstrs.h
M llvm/include/llvm/CodeGen/TargetLowering.h
M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
M llvm/include/llvm/CodeGen/TargetRegisterInfo.h
M llvm/include/llvm/CodeGen/WinEHPrepare.h
M llvm/include/llvm/DebugInfo/GSYM/GsymCreator.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/ExecutionEngine/Orc/Core.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
M llvm/include/llvm/ExecutionEngine/Orc/JITTargetMachineBuilder.h
M llvm/include/llvm/ExecutionEngine/Orc/Shared/SPSCI/DlfcnSPSCI.h
M llvm/include/llvm/Frontend/HLSL/SemanticSignaturePacking.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
M llvm/include/llvm/IR/AutoUpgrade.h
M llvm/include/llvm/IR/ConstantFolder.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/IRBuilderFolder.h
M llvm/include/llvm/IR/InstVisitor.h
M llvm/include/llvm/IR/Instruction.def
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Instructions.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsAArch64.td
M llvm/include/llvm/IR/IntrinsicsAMDGPU.td
M llvm/include/llvm/IR/IntrinsicsDirectX.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/IntrinsicsSPIRV.td
M llvm/include/llvm/IR/IntrinsicsX86.td
M llvm/include/llvm/IR/Metadata.h
M llvm/include/llvm/IR/NoFolder.h
M llvm/include/llvm/IR/RuntimeLibcalls.td
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/IR/Verifier.h
M llvm/include/llvm/MC/MCAsmInfo.h
M llvm/include/llvm/MC/MCGOFFAttributes.h
M llvm/include/llvm/MC/MCSectionGOFF.h
M llvm/include/llvm/Object/Binary.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Object/ELFTypes.h
M llvm/include/llvm/ObjectYAML/COFFYAML.h
M llvm/include/llvm/ObjectYAML/WasmYAML.h
M llvm/include/llvm/ProfileData/InstrProf.h
M llvm/include/llvm/ProfileData/SampleProf.h
M llvm/include/llvm/ProfileData/SampleProfWriter.h
M llvm/include/llvm/SandboxIR/Pass.h
M llvm/include/llvm/SandboxIR/Value.h
A llvm/include/llvm/Support/AArch64MemoryHints.h
M llvm/include/llvm/Support/AutoConvert.h
M llvm/include/llvm/Support/CommandLine.h
M llvm/include/llvm/Support/Compression.h
M llvm/include/llvm/Target/CGPassBuilderOption.h
M llvm/include/llvm/Target/TargetMachine.h
M llvm/include/llvm/Target/TargetSelectionDAG.td
M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
A llvm/include/llvm/TargetParser/IntelGPUTargetParser.def
A llvm/include/llvm/TargetParser/IntelGPUTargetParser.h
M llvm/include/llvm/TargetParser/PPCTargetParser.def
M llvm/include/llvm/TargetParser/PPCTargetParser.h
M llvm/include/llvm/TargetParser/Triple.h
M llvm/include/llvm/TargetParser/X86TargetParser.def
M llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
M llvm/include/llvm/Transforms/InstCombine/InstCombiner.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
A llvm/include/llvm/Transforms/Scalar/GVNHoist.h
A llvm/include/llvm/Transforms/Scalar/GVNSink.h
A llvm/include/llvm/Transforms/Scalar/GVNValueTable.h
M llvm/include/llvm/Transforms/Scalar/JumpThreading.h
M llvm/include/llvm/Transforms/Utils/Local.h
M llvm/include/llvm/Transforms/Utils/LoopUtils.h
M llvm/include/llvm/Transforms/Utils/SampleProfileInference.h
M llvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
M llvm/include/llvm/Transforms/Vectorize/LoopVectorizationLegality.h
M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
M llvm/include/module.modulemap
M llvm/lib/ABI/CMakeLists.txt
A llvm/lib/ABI/DefaultTargetInfo.cpp
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/Analysis/BasicAliasAnalysis.cpp
M llvm/lib/Analysis/BlockFrequencyInfoImpl.cpp
M llvm/lib/Analysis/BranchProbabilityInfo.cpp
M llvm/lib/Analysis/CaptureTracking.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/ConstraintSystem.cpp
M llvm/lib/Analysis/IR2Vec.cpp
M llvm/lib/Analysis/IVDescriptors.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/InstructionSimplify.cpp
M llvm/lib/Analysis/LazyValueInfo.cpp
M llvm/lib/Analysis/Loads.cpp
M llvm/lib/Analysis/LoopAccessAnalysis.cpp
M llvm/lib/Analysis/LoopCacheAnalysis.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ScalarEvolutionDivision.cpp
M llvm/lib/Analysis/ScalarEvolutionNormalization.cpp
M llvm/lib/Analysis/StaticDataProfileInfo.cpp
M llvm/lib/Analysis/TargetTransformInfo.cpp
M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/Analysis/VectorUtils.cpp
M llvm/lib/AsmParser/LLLexer.cpp
M llvm/lib/AsmParser/LLParser.cpp
M llvm/lib/BinaryFormat/Dwarf.cpp
M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
M llvm/lib/CGData/CodeGenData.cpp
M llvm/lib/CGData/CodeGenDataReader.cpp
M llvm/lib/CodeGen/AllocationOrder.cpp
M llvm/lib/CodeGen/AllocationOrder.h
M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
M llvm/lib/CodeGen/AtomicExpandPass.cpp
M llvm/lib/CodeGen/BasicBlockMatchingAndInference.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/CommandFlags.cpp
M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/GlobalISel/InlineAsmLowering.cpp
M llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
M llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
M llvm/lib/CodeGen/MIR2Vec.cpp
M llvm/lib/CodeGen/MIRParser/MIRParser.cpp
M llvm/lib/CodeGen/MIRPrinter.cpp
M llvm/lib/CodeGen/MachineBasicBlock.cpp
M llvm/lib/CodeGen/MachineBlockPlacement.cpp
M llvm/lib/CodeGen/MachineCycleAnalysis.cpp
M llvm/lib/CodeGen/MachineOutliner.cpp
M llvm/lib/CodeGen/MachinePipeliner.cpp
M llvm/lib/CodeGen/MachineRegisterInfo.cpp
M llvm/lib/CodeGen/MachineScheduler.cpp
M llvm/lib/CodeGen/MacroFusion.cpp
M llvm/lib/CodeGen/PHIElimination.cpp
M llvm/lib/CodeGen/RegAllocFast.cpp
M llvm/lib/CodeGen/RegAllocGreedy.cpp
M llvm/lib/CodeGen/ScheduleDAG.cpp
M llvm/lib/CodeGen/ScheduleDAGInstrs.cpp
M llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
M llvm/lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGPrinter.cpp
M llvm/lib/CodeGen/SelectionDAG/StatepointLowering.cpp
M llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
M llvm/lib/CodeGen/SjLjEHPrepare.cpp
M llvm/lib/CodeGen/StackColoring.cpp
M llvm/lib/CodeGen/TargetLoweringBase.cpp
M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
M llvm/lib/CodeGen/TargetPassConfig.cpp
M llvm/lib/CodeGen/TargetRegisterInfo.cpp
M llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
M llvm/lib/CodeGen/WasmEHPrepare.cpp
M llvm/lib/CodeGen/WinEHPrepare.cpp
M llvm/lib/DebugInfo/GSYM/GsymCreator.cpp
M llvm/lib/DebugInfo/PDB/Native/InfoStreamBuilder.cpp
M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
M llvm/lib/DebugInfo/PDB/Native/NamedStreamMap.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/Orc/COFFPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/COFFVCRuntimeSupport.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/JITTargetMachineBuilder.cpp
M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/Frontend/HLSL/SemanticSignaturePacking.cpp
M llvm/lib/Frontend/HLSL/SemanticSignatures.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
M llvm/lib/HTTP/HTTPClient.cpp
M llvm/lib/IR/AsmWriter.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/ConstantRange.cpp
M llvm/lib/IR/Constants.cpp
M llvm/lib/IR/Core.cpp
M llvm/lib/IR/CycleInfo.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Instructions.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Metadata.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/OptBisect.cpp
M llvm/lib/IR/PassManager.cpp
M llvm/lib/IR/RuntimeLibcalls.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/IR/Verifier.cpp
M llvm/lib/LTO/LTO.cpp
M llvm/lib/Linker/IRMover.cpp
M llvm/lib/MC/ELFObjectWriter.cpp
M llvm/lib/MC/GOFFObjectWriter.cpp
M llvm/lib/MC/MCAssembler.cpp
M llvm/lib/MC/MCDwarf.cpp
M llvm/lib/MC/MCObjectFileInfo.cpp
M llvm/lib/MC/MCPseudoProbe.cpp
M llvm/lib/MC/MCSymbolGOFF.cpp
M llvm/lib/MC/WasmObjectWriter.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/Object/WasmObjectFile.cpp
M llvm/lib/ObjectYAML/COFFEmitter.cpp
M llvm/lib/ObjectYAML/COFFYAML.cpp
M llvm/lib/ObjectYAML/DWARFEmitter.cpp
M llvm/lib/ObjectYAML/WasmEmitter.cpp
M llvm/lib/ObjectYAML/WasmYAML.cpp
M llvm/lib/Passes/CodeGenPassBuilder.cpp
M llvm/lib/Passes/PassBuilder.cpp
M llvm/lib/Passes/PassBuilderPipelines.cpp
M llvm/lib/Passes/PassRegistry.def
M llvm/lib/ProfileData/InstrProf.cpp
M llvm/lib/ProfileData/InstrProfReader.cpp
M llvm/lib/ProfileData/InstrProfWriter.cpp
M llvm/lib/ProfileData/SampleProfWriter.cpp
M llvm/lib/SandboxIR/Instruction.cpp
M llvm/lib/SandboxIR/Value.cpp
M llvm/lib/Support/AutoConvert.cpp
M llvm/lib/Support/CMakeLists.txt
M llvm/lib/Support/CommandLine.cpp
M llvm/lib/Support/Compression.cpp
M llvm/lib/Support/DebugCounter.cpp
A llvm/lib/Support/DenseMap.cpp
M llvm/lib/Support/KnownFPClass.cpp
M llvm/lib/Support/Regex.cpp
M llvm/lib/Support/StringRef.cpp
M llvm/lib/Support/Unix/Path.inc
M llvm/lib/Support/raw_socket_stream.cpp
M llvm/lib/Support/regcomp.c
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
M llvm/lib/Target/AArch64/AArch64Combine.td
M llvm/lib/Target/AArch64/AArch64FastISel.cpp
M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
M llvm/lib/Target/AArch64/AArch64ISelLowering.h
M llvm/lib/Target/AArch64/AArch64InstrAtomics.td
M llvm/lib/Target/AArch64/AArch64InstrFormats.td
M llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
M llvm/lib/Target/AArch64/AArch64InstrInfo.h
M llvm/lib/Target/AArch64/AArch64InstrInfo.td
M llvm/lib/Target/AArch64/AArch64PTrueCoalescing.cpp
M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
M llvm/lib/Target/AArch64/AArch64TargetMachine.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AArch64/SVEInstrFormats.td
M llvm/lib/Target/AMDGPU/AMDGPU.h
M llvm/lib/Target/AMDGPU/AMDGPU.td
M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUFeatures.td
M llvm/lib/Target/AMDGPU/AMDGPUGlobalISelDivergenceLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUIGroupLP.cpp
M llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
M llvm/lib/Target/AMDGPU/AMDGPULaneMaskUtils.h
M llvm/lib/Target/AMDGPU/AMDGPULateCodeGenPrepare.cpp
M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUMemoryUtils.h
M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
M llvm/lib/Target/AMDGPU/AMDGPUPostLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPreLegalizerCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp
M llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPURewriteAGPRCopyMFMA.cpp
M llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
M llvm/lib/Target/AMDGPU/AMDGPUSwLowerLDS.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
M llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
M llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
M llvm/lib/Target/AMDGPU/CMakeLists.txt
M llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
M llvm/lib/Target/AMDGPU/GCNILPSched.cpp
M llvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.h
M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
M llvm/lib/Target/AMDGPU/GCNSubtarget.h
M llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp
M llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp
M llvm/lib/Target/AMDGPU/R600Processors.td
M llvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
M llvm/lib/Target/AMDGPU/SIFoldOperands.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.h
M llvm/lib/Target/AMDGPU/SIInstrInfo.td
M llvm/lib/Target/AMDGPU/SIInstructions.td
M llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
M llvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
M llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
A llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
M llvm/lib/Target/AMDGPU/SIRegisterInfo.h
M llvm/lib/Target/AMDGPU/SIRegisterInfo.td
M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
M llvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
M llvm/lib/Target/AMDGPU/SOPInstructions.td
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
M llvm/lib/Target/AMDGPU/VOP2Instructions.td
M llvm/lib/Target/AMDGPU/VOP3Instructions.td
M llvm/lib/Target/ARM/ARMAsmPrinter.cpp
M llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
M llvm/lib/Target/ARM/ARMBlockPlacement.cpp
M llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
M llvm/lib/Target/ARM/ARMFixCortexA57AES1742098Pass.cpp
M llvm/lib/Target/ARM/ARMISelLowering.cpp
M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
M llvm/lib/Target/ARM/ARMLoadStoreOptimizer.cpp
M llvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.cpp
M llvm/lib/Target/ARM/ARMTargetMachine.h
M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
M llvm/lib/Target/ARM/ARMTargetObjectFile.h
M llvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
M llvm/lib/Target/ARM/ARMTargetTransformInfo.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/ARM/MVETPAndVPTOptimisationsPass.cpp
M llvm/lib/Target/ARM/MVETailPredUtils.h
M llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
M llvm/lib/Target/ARM/Thumb1InstrInfo.cpp
M llvm/lib/Target/AVR/AVR.h
M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
M llvm/lib/Target/AVR/AVRDevices.td
M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
M llvm/lib/Target/AVR/AVRISelLowering.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.cpp
M llvm/lib/Target/AVR/AVRInstrInfo.td
M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
M llvm/lib/Target/AVR/AVRTargetMachine.h
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
R llvm/lib/Target/AVR/TODO.md
M llvm/lib/Target/BPF/BPFTargetTransformInfo.h
M llvm/lib/Target/DirectX/DXIL.td
M llvm/lib/Target/DirectX/DXILDataScalarization.cpp
M llvm/lib/Target/DirectX/DXILFlattenArrays.cpp
M llvm/lib/Target/DirectX/DXILLegalizePass.cpp
M llvm/lib/Target/DirectX/DXILMemIntrinsics.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILOpLowering.cpp
M llvm/lib/Target/DirectX/DXILResourceAccess.cpp
M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/Hexagon/Hexagon.h
Log Message:
-----------
Rebase on main
Created using spr 1.3.7
Compare: https://github.com/llvm/llvm-project/compare/14cd55664b43...61242a652742
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