[all-commits] [llvm/llvm-project] bd9d96: [clang][NVPTX] Add support for pzo in f32/f16x2/bf...

[Dharuni R Acharya via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
      https://github.com/llvm/llvm-project/commit/bd9d96ce12d083a8de6e06c5dffd1b79a5cbef47
  Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
  Date:   2026-09-29 (Tue, 29 Sep 2026)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsNVPTX.td
    M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
    M clang/test/CodeGen/builtins-nvptx.c
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    A llvm/test/CodeGen/NVPTX/convert-fp4-pzo.ll
    M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
    M mlir/test/Target/LLVMIR/nvvm/convert_fp4x2.mlir

  Log Message:
  -----------
  [clang][NVPTX] Add support for pzo in f32/f16x2/bf16x2 to FP4 conversions (#225318)

This patch adds support for `pzo` variants and `rz` rounding mode to 
existing `f32/f16x2/bf16x2` to `FP4` (`e2m1x2`) conversion intrinsics.

Also adds `clang builtins` for the new variants.

Tests have been verified through `ptxas-13.4`.

PTX ISA Reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt

---------

Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>



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