[all-commits] [llvm/llvm-project] f2f70f: [llubi] Error if main is not a definition (#226475)

Zach Goldthorpe via All-commits all-commits at lists.llvm.org
Mon Sep 28 10:17:42 PDT 2026


  Branch: refs/heads/users/zGoldthorpe/wide-copies/materialise
  Home:   https://github.com/llvm/llvm-project
  Commit: f2f70fc15fca532f4968ba211e430e269dd18489
      https://github.com/llvm/llvm-project/commit/f2f70fc15fca532f4968ba211e430e269dd18489
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    A llvm/test/tools/llubi/main_declaration.ll
    M llvm/tools/llubi/llubi.cpp

  Log Message:
  -----------
  [llubi] Error if main is not a definition (#226475)

Currently this crashes. Ran into this while using llubi with
llvm-reduce.


  Commit: 2dc2a1f1b94f1953f0ef52bd748fb1f0c07cd780
      https://github.com/llvm/llvm-project/commit/2dc2a1f1b94f1953f0ef52bd748fb1f0c07cd780
  Author: Anonmiraj <ezzibrahimx at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M libc/src/__support/math/lgammaf.h

  Log Message:
  -----------
  [libc][math] Fix lgammaf 1-ULP errors in non-FMA builds  (#225449)

There were some inaccuracies in the non-FMA builds.
I retested exhaustively with FMA both enabled and disabled, and all
tests seems to pass noww.


  Commit: e1dc804fcc352b841e798efe0aa4a6c40ba1f2b3
      https://github.com/llvm/llvm-project/commit/e1dc804fcc352b841e798efe0aa4a6c40ba1f2b3
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/test/tools/llvm-objdump/MachO/AArch64/macho-arm64-subtypes.test
    M llvm/test/tools/llvm-objdump/MachO/universal-arm64.test

  Log Message:
  -----------
  Add more llvm-objdump test coverage for arm64e.x1 (#224110)


  Commit: 6ad85f11c5151f18a3686322e37f8e64a48be327
      https://github.com/llvm/llvm-project/commit/6ad85f11c5151f18a3686322e37f8e64a48be327
  Author: Timur Baidusenov <timurbaidusenov at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M polly/lib/Analysis/ScopBuilder.cpp
    M polly/test/ScopInfo/issue190128.ll
    M polly/test/ScopInfo/simple_loop_unsigned.ll
    A polly/test/ScopInfo/zext-loop-bound-unbounded.ll

  Log Message:
  -----------
  [Polly] Do not assume loops to be bounded if latch conditions are invalid (#226202)

If a loop with an `<nsw>` induction variable appears to be unbounded for
some parameter values, `addLoopBoundsToHeaderDomain` removes them from
its domain without a runtime check, but the loop may only appear
unbounded because its latch condition is modeled incorrectly for these
values, e.g. `(zext i16 %n to i64)` is modeled as `n` under the
assumption `n >= 0`. Removing them also dropped that assumption, so for
`n < 0` the loop was not executed at all instead of running `65536 + n`
iterations. Exclude the parameter values for which the latch conditions
are invalid by a runtime check instead.

Fixes #192616 and #192618.

Assisted-by: Claude (Anthropic)


  Commit: 9de286c070e3f3176e7bbfb79d3c4d95807e19a5
      https://github.com/llvm/llvm-project/commit/9de286c070e3f3176e7bbfb79d3c4d95807e19a5
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M flang/lib/Semantics/check-omp-structure.cpp
    M flang/lib/Semantics/check-omp-structure.h
    M flang/lib/Semantics/check-omp-syntax.cpp
    M flang/lib/Semantics/check-omp-variant.cpp

  Log Message:
  -----------
  [flang][OpenMP] Rename some symbols in check-omp-syntax.cpp (#226484)

Some function names did not conform to the naming convention. Include a
couple of other non-significant changes.


  Commit: ff5f397d6cd06d0eb72f798b4454d490050fb442
      https://github.com/llvm/llvm-project/commit/ff5f397d6cd06d0eb72f798b4454d490050fb442
  Author: Lei Zhang <antiagainst at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
    A llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll

  Log Message:
  -----------
  [AMDGPU] Fix dynamic LDS consistency check in setDynLDSAlign (#225825)

5bf967cb132b ("[RFC][AMDGPU] Add BARRIER address space") changed the
absolute-address check in `setDynLDSAlign` to read the dynamic LDS
global being lowered (`GV`) instead of the kernel's representative
`llvm.amdgcn.<kernel>.dynlds` variable (`Dyn`).

`amdgpu-lower-module-lds` attaches `!absolute_symbol` only to the
representative; uses of the original dynamic LDS global inside the
kernel are left in place and never carry that metadata. As a result, a
kernel that accesses dynamic LDS both directly and through a non-inlined
callee now aborts with "Inconsistent metadata on dynamic LDS variable".


  Commit: a514ce406f06bfbebeb5d8d9bc76e9cc5ec6a92b
      https://github.com/llvm/llvm-project/commit/a514ce406f06bfbebeb5d8d9bc76e9cc5ec6a92b
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn

  Log Message:
  -----------
  [gn] Add clang_static_plugin_sources to link out-of-tree plugins into clang (#226381)

This is useful for testing and profiling e.g. Chromium's clang plugins
without having to export symbols from the clang binary.

    # args.gn
    clang_static_plugin_sources = [

"/path/to/chromium/src/tools/clang/plugins/FindBadConstructsAction.cpp",
      ...
    ]
    clang_static_plugin_include_dirs = [ "/path/to/chromium/src" ]

...or put the above in a gni file and put just `import("plugins.gni")`
in args.gn

No behavior change if the list is empty (the default).


  Commit: 1978a469493fec319cd61e2eac42abade837fafc
      https://github.com/llvm/llvm-project/commit/1978a469493fec319cd61e2eac42abade837fafc
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/CodeGen/CGBlocks.cpp
    M clang/lib/Serialization/ASTWriterStmt.cpp

  Log Message:
  -----------
  [clang] Migrate away from PointerUnion::dyn_cast (NFC) (#226390)

Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:

  // FIXME: Replace the uses of is(), get() and dyn_cast() with
  //        isa<T>, cast<T> and the llvm::dyn_cast<T>

Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
ExprWithCleanups::CleanupObject because it is always nonnull.
Specifically, ExprWithCleanups::getObjects() is populated from a slice
of Sema::ExprCleanupObjects, which only receives nonnull pointers in
the following places:

- Sema::BuildCompoundLiteralExpr
- Sema::ActOnBlockStmtExpr
- Sema::BuildBlockForLambdaConversion

Assisted-by: Antigravity


  Commit: 76d4a51fe990d5915c8b30587b09d57e45d533a2
      https://github.com/llvm/llvm-project/commit/76d4a51fe990d5915c8b30587b09d57e45d533a2
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
    M llvm/lib/Transforms/Vectorize/VPlanValue.h

  Log Message:
  -----------
  [Vectorize] Remove unused functions (NFC) (#226392)

BoUpSLP::TreeEntry::isOneOf:
The last caller was removed on April 1, 2025 in commit
0e3049c562ccdea288c3b1f3b3d1ce5992d284b0.

BoUpSLP::ScheduleCopyableData::verify:
Introduced on August 11, 2025 in commit
2d7b55a028139dde58a994a65895841190dfde96 without any callers.

HorizontalReduction::hasSameParent:
The last caller was removed on July 29, 2024 in commit
197f4a90519df308d9bfddcc931f7683a5ae9cb9.

VPBlockBase::getHierarchicalPredecessors:
The last caller was removed on May 24, 2025 in commit
dcef154b5caf6556e69bb18bbb0506d274aa474e.

VPIRFlags::isNonNeg:
The last caller was removed on July 1, 2025 in commit
6b3d2b629cc3805d483ec4522cc97e2540070ae1.

VPHistogramRecipe::getOpcode:
Introduced on September 27, 2024 in commit
6f1a8c2da278a04565877e277bc4d5b70055ac74 without any callers.

VPWidenInductionRecipe::setStepValue:
The last caller was removed on May 22, 2026 in commit
5c853423f4f9e7296b7596b7f3ccade481686bfd.

VPReductionPHIRecipe::isPartialReduction:
Introduced on November 26, 2025 in commit
071d1fb8beda4c0ec9ede0acab12a382f34758fe without any callers.

VPTransformState::reset:
The last callers were removed on May 3, 2026 in commit
efd429fdfb6f3f0a6991d9d08ab15ca89f27a7c3.

VPValue::hasDefiningRecipe:
The last caller was removed on June 28, 2026 in commit
7abad0faf4bfe1cb674d7fd362cc31edb1d0c460.

Assisted-by: Antigravity


  Commit: 58e81dc9a3e25cc41ad26f7cf222dea2c4aa391b
      https://github.com/llvm/llvm-project/commit/58e81dc9a3e25cc41ad26f7cf222dea2c4aa391b
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
    M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-load-live-out.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
    M llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
    M llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
    M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
    M llvm/test/Transforms/LoopVectorize/predicated-single-exit.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
    M llvm/test/Transforms/LoopVectorize/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll

  Log Message:
  -----------
  [VPlan] Use frozen combined condition in early exit first-active-lane (#223643)

Combined is used both to compute if an early exit was taken via
VPInstruction::AnyOf, as well as the index of the early-exited lane in
VPInstruction::FirstActiveLane.

Combined can have poison lanes past the exited lane, so the AnyOf uses
freeze to prevent branching on poison. However FirstActiveLane on a
vector with a poison lane is poison (see #223935), so we need to also
use the frozen version of Combined to prevent poison there.


  Commit: 7af28a7e7b3073593d5f394d02b10f382d6cbab1
      https://github.com/llvm/llvm-project/commit/7af28a7e7b3073593d5f394d02b10f382d6cbab1
  Author: Kai Nacke <kai.peter.nacke at ibm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/MC/GOFFObjectWriter.cpp
    M llvm/test/CodeGen/SystemZ/zos-section-1.ll
    M llvm/test/CodeGen/SystemZ/zos-section-2.ll
    M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll

  Log Message:
  -----------
  [SystemZ][z/OS] Use section ordinal for temporary symbols (#226306)

A relocation involving a temporary symbol is interpreted as offset of
the symbol to the section begin. Currently, this is resolved via the
begin symbol of the section. However, that symbol may also have the
temporary flag set, and therefore has an index of 0. Since a symbol is
emitted of reach section, it is safe to use the ordinal of the section
instead, avoiding all issues with temporary symbols.


  Commit: 621e088c0f5d435506a0d344d3b62ddc11f16147
      https://github.com/llvm/llvm-project/commit/621e088c0f5d435506a0d344d3b62ddc11f16147
  Author: Ebuka Ezike <e_ezike at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/session_helpers.py
    M lldb/tools/lldb-dap/Handler/ThreadsRequestHandler.cpp

  Log Message:
  -----------
  [lldb-dap] Always return the up-to-date thread if possible. (#226140)

Only send the initial thread list if the process is not stopped and only
the first time.

Remove the workaround in tests. This should not affect tests since we
mostly get the `threadId` from a stopped event.


  Commit: edd241997b82b7803bd496933e340762cc06bd77
      https://github.com/llvm/llvm-project/commit/edd241997b82b7803bd496933e340762cc06bd77
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h

  Log Message:
  -----------
  [LV] Remove unused VectorizationFactor comparison operators (NFC) (#226511)

VectorizationFactor::operator== and operator!= have no users. Remove it.


  Commit: 8ccb1826dad0257eda59d88b5fd35a0bc3b933f8
      https://github.com/llvm/llvm-project/commit/8ccb1826dad0257eda59d88b5fd35a0bc3b933f8
  Author: Pedro Vicente <pmadcv at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/docs/LangRef.md
    M llvm/docs/ReleaseNotes.md
    M llvm/include/llvm-c/Core.h
    M llvm/include/llvm/Analysis/InstSimplifyFolder.h
    M llvm/include/llvm/Analysis/TargetFolder.h
    M llvm/include/llvm/AsmParser/LLParser.h
    M llvm/include/llvm/AsmParser/LLToken.h
    M llvm/include/llvm/Bitcode/LLVMBitCodes.h
    M llvm/include/llvm/IR/ConstantFolder.h
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/IRBuilderFolder.h
    M llvm/include/llvm/IR/InstVisitor.h
    M llvm/include/llvm/IR/Instruction.def
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/NoFolder.h
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
    A llvm/test/Assembler/bitinsert-bitextract-invalid.ll
    A llvm/test/Assembler/bitinsert-bitextract.ll
    M llvm/test/Bitcode/compatibility.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract.ll
    A llvm/test/Verifier/bitextract-bitinsert-invalid-verifier.ll
    M llvm/test/tools/llvm-ir2vec/entities.ll
    M llvm/test/tools/llvm-ir2vec/triplets.ll
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/unittests/Analysis/IR2VecTest.cpp

  Log Message:
  -----------
  [IR] Implementation and lowering of `bitinsert` and `bitextract` (#200605)

This PR introduces `bitinsert` and `bitextract` instructions for LLVM
IR. These allow bit manipulation for byte types. Both were lowered to
GlobalIsel and SDag.

Tests were added for AArch64, AMDGPU, ARM, PowerPC, RISCV, x86 and LLVM
IR.

The LangRef was updated to document the new instructions.

The lowering of `bitextract` and `bitinsert` instructions are
implemented using integer operations.
In order to obtain the results for `bitextract`, a shift right
instruction with a specific offset is used (that can be a variable or an
immediate).
Relative to floating-point, in `bitinsert`, we reinterpret the bits of
the floating-point value as if it is an integer.

Pointer operands and results are reinterpreted as if by bitcast, as
specified in the LangRef.

This PR is based on the RFC:
https://discourse.llvm.org/t/rfc-bitinsert-and-bitextract-instructions-for-llvm-ir-2/90764


  Commit: 5b8e65685b4fe99191a217bfa0527c51cf36925c
      https://github.com/llvm/llvm-project/commit/5b8e65685b4fe99191a217bfa0527c51cf36925c
  Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M offload/include/Shared/SourceInfo.h
    M openmp/docs/ReleaseNotes.md

  Log Message:
  -----------
  [Offload][OpenMP] remove SourceInfo::removePath (#226283)

Following discussion on
https://discourse.llvm.org/t/rfc-add-opt-in-option-for-full-source-paths-in-offload-info-output/91901
this commit removes SourceInfo::removePath which changes
LIBOMPTARGET_INFO to provide a non truncated source path:

``` c
#include <stdio.h>

#define N 4

int main(void) {
  int a[N];
  for (int i = 0; i < N; ++i)
    a[i] = 0;
#pragma omp target map(tofrom : a[0 : N])
  {
    a[0] = 1;
  }
  printf("%d\n", a[0]); /* expect 1 */
  return 0;
}
```

``` bash
clang -fopenmp -fopenmp-targets=amdgcn-amd-amdhsa -g ./test/test.c

# new
LIBOMPTARGET_INFO=-1 ./a.out
omptarget device 0 info: Entering OpenMP kernel at ./test/test.c:9:1 with 1 arguments:

# old
LIBOMPTARGET_INFO=-1 ./a.out
omptarget device 0 info: Entering OpenMP kernel at test.c:9:1 with 1 arguments:
```


  Commit: 0551d60c516c2dc161007ee9ed466f36be40667d
      https://github.com/llvm/llvm-project/commit/0551d60c516c2dc161007ee9ed466f36be40667d
  Author: Zorojuro <sawantsukumar at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M libc/src/__support/math/bf16sub.h
    M libc/src/__support/math/bf16subf.h
    M libc/src/__support/math/bf16subf128.h
    M libc/test/shared/shared_math_constexpr_test.cpp

  Log Message:
  -----------
  [libc] Make bf16sub functions constexpr (#223506)

Makes the bf16sub for all types constexpr along with tests


  Commit: d4c354ca333192d2db3d45b2b028a98f9fbbd347
      https://github.com/llvm/llvm-project/commit/d4c354ca333192d2db3d45b2b028a98f9fbbd347
  Author: Maksim Levental <maksim.levental at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M mlir/include/mlir-c/Rewrite.h
    M mlir/lib/CAPI/Transforms/Rewrite.cpp
    M mlir/test/CAPI/CMakeLists.txt
    M mlir/test/CAPI/rewrite.c

  Log Message:
  -----------
  [mlir-c] Add mlirDialectMaterializeConstant (#206553)

Exposes `Dialect::materializeConstant` through the MLIR C API, letting
callers ask a dialect to build a constant operation for a given
attribute and type.

Assisted by: Claude


  Commit: 14f451262dc753b53f79a103744dd6988894467f
      https://github.com/llvm/llvm-project/commit/14f451262dc753b53f79a103744dd6988894467f
  Author: Derek Schuff <dschuff at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/Basic/Targets/WebAssembly.cpp
    M clang/lib/Basic/Targets/WebAssembly.h
    M clang/test/CodeGen/thread-model.c
    M clang/test/CodeGenCXX/static-init-wasm.cpp
    M clang/test/Preprocessor/init.c
    M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
    M llvm/lib/TargetParser/Triple.cpp
    R llvm/test/CodeGen/WebAssembly/coalesce-features-thread-model.ll

  Log Message:
  -----------
  [clang][WeAssembly] Do not override thread model when building without atomics (#225981)

This change does 2 things. The first is to revert #223917, setting the
Triple's
default thread model back to posix. The second is to stop overriding it
when
atomics are not enabled.

This means that compiles with no thread- or atomics-related flags will
get the default posix thread model, independently of whether they get
_REENTRANT defined or the atomics feature is enabled. Practically this
means that the thread model will always be posix unless explicitly
overridden at the driver command line.

The leftover setting of Opts.POSIXThreads became a no-op when used
with the clang driver because the logic would only activate when
-pthread
was not already used (since the driver has separate logic linking
several
flags together).

This is a safer version of the status quo before the thread-model
module flag was introduced, because atomics are still lowered
in the same way but there is no risk of unsafe initialization
or LICM in such scenarios. We could probably further simplify
the interaction between various thread- and atomics-related
flags and thread agnosticism, but this is a small step
that fixes a known hazard.


  Commit: 73fc71b19905b15e6ff14ae3149c6fabce961c1b
      https://github.com/llvm/llvm-project/commit/73fc71b19905b15e6ff14ae3149c6fabce961c1b
  Author: Jan Svoboda <jan_svoboda at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/unittests/Lex/LexerTest.cpp

  Log Message:
  -----------
  [clang][test] Fix lifetimes of HS/PP options (#225885)

PR #133467 changed how lifetimes work for `PreprocessorOptions`. In
LexerTest.cpp, the lifetimes were set up incorrectly, leading to
potential use-after-free crashes. This PR fixes that by expanding the
lifetime of both `PreprocessorOptions` and `HeaderSearchOptions`.


  Commit: 9068aede6fcbd3e47602fce96fbb077e3e4d8cc4
      https://github.com/llvm/llvm-project/commit/9068aede6fcbd3e47602fce96fbb077e3e4d8cc4
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll

  Log Message:
  -----------
  [LV] Fix early exit tests after #223643. NFC (#226521)


  Commit: 44f262eb67778e6bcb7675599384e010062cae10
      https://github.com/llvm/llvm-project/commit/44f262eb67778e6bcb7675599384e010062cae10
  Author: Alison Zhang <alisonzhang at ibm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-preserves-unrelated-zero-length-insert.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-stderr-without-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/empty-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/identical-overlap.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/no-conflict-sarif-empty.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/non-overlapping.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/order-invariance.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-identical-non-zero-length.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-zero-length-insert.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-cluster-of-three-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-conflict-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/sarif-out-parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input-internal-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-all-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-conflict-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-conflicts-different-offsets-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-input-conflict.test

  Log Message:
  -----------
  [test][ssaf][AIX] Fix sed -i portability for AIX (#226293)

AIX's sed does not support the `-i` flag, causing the tests added in
https://github.com/llvm/llvm-project/pull/216183 to fail on AIX. This
patch updates the tests to use a POSIX-compliant redirect instead.


  Commit: f1129f338806da062347a8ce019b88b51452917f
      https://github.com/llvm/llvm-project/commit/f1129f338806da062347a8ce019b88b51452917f
  Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    R llvm/test/Transforms/PGOProfile/Inputs/indirect_call.proftext
    M llvm/test/Transforms/PGOProfile/indirect_call_annotation.ll

  Log Message:
  -----------
  [NFC][PGOProfile] Inline icall annotation proftext test (#226324)


  Commit: 378ceb307bbc729bb918601a28c468df419b4d34
      https://github.com/llvm/llvm-project/commit/378ceb307bbc729bb918601a28c468df419b4d34
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    M clang/lib/Headers/riscv_packed_simd.h
    M clang/test/CodeGen/RISCV/rvp-intrinsics.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll

  Log Message:
  -----------
  [RISCV][P-Ext] Add builtins and IR intrinsics for packed shifts. (#225968)

The packed shift instructions use 5-bit shift amounts regardless of
element width. The C intrinsic should match this which means we can't
use C shift operators to implement them.

Rename RISCVISD::PSHL to RISCVISD::PSLL.


  Commit: 1f9d3b2506fa32981fd281aab56357404af53ffe
      https://github.com/llvm/llvm-project/commit/1f9d3b2506fa32981fd281aab56357404af53ffe
  Author: Ellis Hoag <ellis.sparky.hoag at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:

  Log Message:
  -----------
  [NFC][PGOProfile] Inline icall annotation proftext test (#226324)


  Commit: bff7b7503c1cdfdba72bcd12ef8208ad42130946
      https://github.com/llvm/llvm-project/commit/bff7b7503c1cdfdba72bcd12ef8208ad42130946
  Author: Ömer Sinan Ağacan <omer at osa1.net>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll

  Log Message:
  -----------
  [msan] Update intrinsic list in arm64-vmax.ll (NFC) (#226387)

The intrinsics llvm.aarch64.neon.{u,s}{min,max} were removed in
0ce1b5f91add535d1e8b910ee90c178e054c65eb, remove the mentions of them in
the test file as per the review comment in #225339.


  Commit: 6ec87e7ec4b3ca6f665a02e05d0e5fe9c37cd6cc
      https://github.com/llvm/llvm-project/commit/6ec87e7ec4b3ca6f665a02e05d0e5fe9c37cd6cc
  Author: Anshul Nigham <nigham at google.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel

  Log Message:
  -----------
  [Bazel] Add Telemetry dependency to lldb-dap (#226526)

Fixes lldb-dap bazel layering failure introduced in commit 1cc5657c4ff6,
where LLDBUtils.h includes llvm/Telemetry/Telemetry.h.


  Commit: 23e12c97a04c034a9487f4b95e3531d1ead90c59
      https://github.com/llvm/llvm-project/commit/23e12c97a04c034a9487f4b95e3531d1ead90c59
  Author: Kunal Dubey <xakep8 at protonmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenBuilder.h
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/test/CIR/IR/enum-attrs.cir
    M clang/test/CIR/Lowering/call-llvm-intrinsic.cir

  Log Message:
  -----------
  [CIR] Added fast-math flags to LLVM intrinsic calls (#224899)

Added fast-math flags attribute to CIR which cir.call_llvm_intrinsic now
carries through DirectToLLVM lowering. CIR now preserves fast-math flags
such as reassoc when lowering to llvm.call_intrinsic.

Added test for the same.


  Commit: 774b4527fd60dc5ef7ed6539a8f2e6fe100e337b
      https://github.com/llvm/llvm-project/commit/774b4527fd60dc5ef7ed6539a8f2e6fe100e337b
  Author: Ryan Buchner <rbuchner at qti.qualcomm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll

  Log Message:
  -----------
  [Analysis][RISCV] More accurately estimate the cost of strided vector loads (#175135)

For small constant strides, attempt to predict the amount of coalescing
that will be done by the target machine to give a better cost estimate.

Currently, strided loads/stores are costed as having a cost of 1 per
element (i.e. being equivalent to scalar loads/stores).

---------

Co-authored-by: Luke Lau <luke_lau at icloud.com>


  Commit: f2b3ba3affb147bf085fd58f1f7261dd32ae91c8
      https://github.com/llvm/llvm-project/commit/f2b3ba3affb147bf085fd58f1f7261dd32ae91c8
  Author: Sang Ik Lee <sang.ik.lee at intel.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_gemm_bf16.mlir
    R mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F8.mlir

  Log Message:
  -----------
  [MLIR][XeGPU] Add MXFP fp8 WG GEMM tests and use shared input set (#225944)

Adds four workgroup-level tests, updates two and renames one, so that
seven tests covering bf16, mx-fp4 and mx-fp8 exercise the same
arithmetic on the same operand values and check against the same
expected result.

1. simple_mxfp_gemm -> simple_mxfp_gemm_F4 - renamed, for consistency
with the F4/F8 suffixes used by the quantize and dequantize tests

2. (new) simple_gemm_bf16 - non-quantized bf16 GEMM at the MXFP problem
size, as the unquantized comparison point, and where the shared input
set is documented
3. (new) simple_mxfp_gemm_F8 - f8E5M2 operands with f8E8M0FNU scales
4. (new) simple_mxfp_gemm_dequantizeB_F8                 
5. (new) simple_mxfp_gemm_quantizeA_F8 - fp8 counterparts of the
existing fp4 tests
6. simple_mxfp_gemm_dequantizeB_F4 and simple_mxfp_gemm_quantizeA_F4 are
updated in place.

What the update changes:

* Meaningful operand values. The tests previously used all-ones
operands, which cannot distinguish a correct kernel from one that swaps
the two fp4 values in a byte, misapplies a scale, or mixes up lanes or
tiles. Operands are now drawn from the 8 magnitudes e2m1 can represent -
0, 0.5, 1, 1.5, 2, 3, 4, 6 - indexed by (i + k) % 8 and (j + k) % 8, so
consecutive K values differ and the packing is exercised. Every value is
exact in f4E2M1FN, f8E5M2, bf16 and f32, which is what lets one input
set serve all three formats.

* Non-unit block scales. A carries a per-K-block divisor and B a
per-K-block scale, three of each, all powers of two, cycling per block
of 32. The quantized formats realise the same values through their own
scales, so a scale that is ignored or applied to the wrong block now
changes the result.

* One reference result. Each test computes its expected C with a host
f32 GEMM over f32 shadows of the operands, filled in the same loop that
writes the device operands so the two cannot drift. Every product is a
multiple of 0.25 and the largest result is well under 2^24, so the
accumulation is exact and the comparison is bit-for-bit rather than
approximate.

* A labelled result line. verifyMemRefF32's mismatch count is printed as
"mismatches: <n>" via printString/printI64/printNewline and matched with
{{^mismatches: 0$}}. A bare "0" check is a substring match over all of
stdout, so it passes on any 0 the runtime happens to print, including
one inside a larger number, and cannot distinguish a correct run from a
kernel that never ran.

* A fix for the fp4 A operand in simple_mxfp_gemm_F4.
gpu.alloc/memcpy/dealloc size a memref by rounding the element type up
to a whole byte - the size is lowered as gep(null, numElements) on i4,
which LLVM strides by 1 byte - so a packed fp4 memref is sized at twice
its real footprint. The test allocated A as memref<256x4096xf4E2M1FN>,
giving a 512 KB overread of a 524288-byte host buffer; because
mgpuMemcpy is asynchronous the fault surfaces later, at the stream sync
inside the first mgpuMemFree, so the test passed regardless. A now
crosses as memref<524288xi8> and is viewed as fp4 on the device, which
is what the B operand already does.

All seven follow the existing convention in this directory: the mlir-opt
compile is the active RUN line and the mlir-runner pipeline is kept
behind RUN-DISABLED with a MISMATCH check prefix, so no device is needed
and the compile-only run cannot pick up the result check.


  Commit: b3ed324d42c0487e38980f4beddbb67c096f5f3f
      https://github.com/llvm/llvm-project/commit/b3ed324d42c0487e38980f4beddbb67c096f5f3f
  Author: Keith Smiley <keithbsmiley at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lld/test/Unit/lit.cfg.py
    M lld/unittests/AsLibELF/CMakeLists.txt
    M lld/unittests/AsLibELF/OutputStream.cpp
    M lld/unittests/AsLibELF/ROCm.cpp

  Log Message:
  -----------
  [lld][test] Use LLVM helpers for input file discovery (#220404)

This was a suggestion on #220340 to avoid the custom env var handling
and use the `getInputFileDirectory` helper from the LLVM support library


  Commit: 07aec21c88f48907b5da1d42f4522e106d30a9f1
      https://github.com/llvm/llvm-project/commit/07aec21c88f48907b5da1d42f4522e106d30a9f1
  Author: Guo Chen <guochen2 at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    A llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
    M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
    M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
    A llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll

  Log Message:
  -----------
  [AMDGPU] merge 16bit mov pairs in post-RA peephole  (#208625)

Address https://github.com/llvm/llvm-project/issues/207011. Add 5
patterns to merge 16bit mov pairs.

Since we hoist instruction which might cross the waitcnt boundary,
insert a new pass before waitcnt for this transformation

Co-Authored-By: Claude


  Commit: 3621db6aff701dcd9e6ff54ea281d24ee2f43448
      https://github.com/llvm/llvm-project/commit/3621db6aff701dcd9e6ff54ea281d24ee2f43448
  Author: Akash Manna <akash.manna.mymail at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/lib/Sema/SemaOpenMP.cpp
    A clang/test/OpenMP/for_loop_bitint_messages.c

  Log Message:
  -----------
  [Clang][OpenMP] Fix crash on `_BitInt` loop bounds and counters in loop analysis (#226464)

Fixes #140074

When building the iteration count of an OpenMP loop, Sema derives a few
integer types from bit widths, e.g. to promote the upper bound to an
unsigned type as wide as the wider bound so that `upper - lower` cannot
overflow. Those types came from `ASTContext::getIntTypeForBitwidth`,
which only knows the standard integer widths and returns a null type for
anything else. With a bound or loop counter of type `_BitInt(931)` the
request was for a 960-bit type, the result was null, and it went
straight into `PerformImplicitConversion`, which asserted. The
`collapse(2)` in the reduced reproducer is incidental; a plain `#pragma
omp for` on the same loop crashes the same way.

The loop analysis now goes through a small helper that asks for the
standard type first and otherwise builds the `_BitInt` type of that
width and signedness with `ASTContext::getBitIntType`. It is used at the
three places that derive a type from a loop width: the upper-bound
promotion in `calculateNumIters`, the conversion to the loop variable's
width in `buildNumIterations`, and the logical iteration type in
`ActOnOpenMPCanonicalLoop`. Wide `_BitInt` loop variables are then
narrowed to the runtime's 64-bit iteration variable with the existing
warning, the same as `__int128` today.


  Commit: 05f0bf084929c4fdbb5ac2952047ed00cd1d8b57
      https://github.com/llvm/llvm-project/commit/05f0bf084929c4fdbb5ac2952047ed00cd1d8b57
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h

  Log Message:
  -----------
  Mips: Remove redundant Triple copy from the subtarget (#226528)

MCSubtargetInfo already stores the target triple, so MipsSubtarget's own
copy is unnecessary.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 3bcbae4bed67f5cadd9f68d39af47ae5b5af1794
      https://github.com/llvm/llvm-project/commit/3bcbae4bed67f5cadd9f68d39af47ae5b5af1794
  Author: Alex Langford <alangford at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lldb/include/lldb/Target/DynamicRegisterInfo.h
    M lldb/source/Target/DynamicRegisterInfo.cpp

  Log Message:
  -----------
  [lldb] Introduce DynamicRegisterInfo::RegisterSetWithStorage (#225555)

The RegisterSet struct is created in 2 different ways:
1.) Statically in headers/source files for register sets that are known
    ahead of time.
2.) Dynamically according to input from outside of LLDB. Usually this is
through the gdb-remote stub, but may also come from a python script or
    by determining an ISA variant's features (e.g. in RISCV).

This PR aims to address the lifetime of strings in RegisterSet. In
scenario (1), the lifetime of all data in a RegisterSet is static and
there is no concern about dangling pointers. However, in scenario (2),
DynamicRegisterInfo maintains a vector of RegisterSets. Until now, it
has relied on ConstString to persist the storage for the strings
indefinitely. As part of my quest to remove ConstString, I am
introducing a new struct wrapping RegisterSet that is responsible for
the storage and lifetime of the underlying RegisterSet strings.


  Commit: d220d5e8239db918bd68f404dae589385a8029e8
      https://github.com/llvm/llvm-project/commit/d220d5e8239db918bd68f404dae589385a8029e8
  Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/include/clang/Interpreter/Interpreter.h
    M clang/lib/Interpreter/Interpreter.cpp
    A clang/test/Interpreter/HIP/hip-environment.hip
    A clang/test/Interpreter/HIP/lit.local.cfg
    M clang/test/lit.cfg.py
    M clang/tools/clang-repl/ClangRepl.cpp

  Log Message:
  -----------
  [clang-repl] Initialized HIP environment for clang-repl (#217582)

This PR initializes the HIP environment for clang-repl. Since an
IncrementalHipDeviceParser does not exist yet, a message is printed
after the environment setup indicating that the HIP environment was set
up but is not yet supported.

It also adds a test file that runs clang-repl with the -hip option and
checks that this message is printed. Once the parser is built, the
current test file will be removed and replaced with tests that verify
the complete flow.

This PR has a prerequisite, #217228, which skips emitting the
`__hip_cuid_` global under incremental extensions. Without it,
clang-repl's HIP mode would emit the same symbol in every incremental
module and fail at JIT link with a duplicate-symbol error.

Assisted by Claude Opus 4.8


  Commit: 0ae27ad06c80796bdae576e27a44b2877e5c2a4f
      https://github.com/llvm/llvm-project/commit/0ae27ad06c80796bdae576e27a44b2877e5c2a4f
  Author: Gaëtan Bossu <gaetan.bossu at arm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
    M llvm/test/CodeGen/AArch64/sve-int-arith.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll

  Log Message:
  -----------
  Revert "[AArch64][CostModel] Consider some nxv1 operations as legal" (#226531)

Reverts llvm/llvm-project#214471

This caused a failure in
https://lab.llvm.org/buildbot/#/builders/198/builds/15417 and I want to
spend a bit more time to test the ISel for vector_reverse and
vector_splice. It's also quite surprising that the test picked a VF of
`vscale x 1`


  Commit: 9214c04da2ea302b773797f50ad11636c7bab097
      https://github.com/llvm/llvm-project/commit/9214c04da2ea302b773797f50ad11636c7bab097
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/CodeGen/CGLoopInfo.cpp
    M clang/test/CodeGen/align-loops.c

  Log Message:
  -----------
  clang: Emit llvm.loop.align metadata for -falign-loops (#223147)


  Commit: 9dcb4291cea195b9f0941d39540a4f2ccb9ff6bd
      https://github.com/llvm/llvm-project/commit/9dcb4291cea195b9f0941d39540a4f2ccb9ff6bd
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lldb/test/API/python_api/value/TestValueAPI.py

  Log Message:
  -----------
  [lldb][test] Skip the sp/rsp check in register sets that have no rsp (#226176)

The test asserts the ABI name `"sp"` resolves to `"rsp"` within the same
register set. However, on Windows the architectural 16-bit `"sp"` lives
in `"supplementary registers"` while `"rsp"` is in `"General Purpose
Registers"`, so there is nothing to compare against.


https://learn.microsoft.com/en-us/windows-hardware/drivers/debugger/x64-architecture

This fixes `python_api/value/TestValueAPI.py` (`test_register`) on
Windows in swiftlang.


  Commit: 51ccdfeadcfe29b1d46f978e8582ada109aebb91
      https://github.com/llvm/llvm-project/commit/51ccdfeadcfe29b1d46f978e8582ada109aebb91
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M libcxx/test/benchmarks/containers/string.bench.cpp

  Log Message:
  -----------
  [libc++] Add benchmark for string::pop_back() (#223729)


  Commit: 68d354f5795682ea1fe03304ac3e7b2a43a36b0d
      https://github.com/llvm/llvm-project/commit/68d354f5795682ea1fe03304ac3e7b2a43a36b0d
  Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M offload/include/Shared/SourceInfo.h
    M openmp/docs/ReleaseNotes.md

  Log Message:
  -----------
  Revert "[Offload][OpenMP] remove SourceInfo::removePath (#226283)" (#226557)

This reverts commit 5b8e65685b4fe99191a217bfa0527c51cf36925c.

In https://github.com/llvm/llvm-project/pull/226283 I forgot to update
info.c to account for the full file paths in its output, will update
commit with fixed test and re open PR


  Commit: d92a0c1e5eba51dbf9a4c2a61a709b6758f2e40d
      https://github.com/llvm/llvm-project/commit/d92a0c1e5eba51dbf9a4c2a61a709b6758f2e40d
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M mlir/include/mlir/IR/BuiltinDialect.td
    M mlir/include/mlir/IR/BuiltinOps.td
    M mlir/test/IR/module-op.mlir
    M mlir/test/Transforms/sccp-callgraph.mlir
    M mlir/test/Transforms/test-symbol-dce.mlir
    M mlir/test/python/dialects/ml_program.py

  Log Message:
  -----------
  [MLIR] Enable strict assembly properties for the builtin dialect (#225750)


  Commit: 48884d2ddba0718960f68eb01a5b8c42c089f27c
      https://github.com/llvm/llvm-project/commit/48884d2ddba0718960f68eb01a5b8c42c089f27c
  Author: Cyndy Ishida <cyndy_ishida at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/Lex/HeaderSearch.cpp
    A clang/test/ClangScanDeps/modules-context-hash-case-sensitive-vfs-paths.c
    M clang/test/ClangScanDeps/modules-context-hash-module-map-path.c
    A clang/test/Modules/implicit-module-map-path-case-sensitive.c

  Log Message:
  -----------
  [clang][Modules] Respect case sensitivity when hashing implicit module map path (#226339)

Before this patch, the implicit module hash normalized the module map
path, but explicit modules always respected the case in paths. This
worked by depending on FileEntry caching and/or relocation checking to
resolve correctly. This behavior was both subtle and difficult to
understand. Instead, respect the casing in paths for hashing to match
explicitly built modules so they can never diverge.

This patch also updates `modules-context-hash-module-map-path.c` to
match a downstream version that already tested for the case where vfs
overlay entries differ by case but point to the same file.
`modules-context-hash-case-sensitive-vfs-paths.c` is the same but points
to different underlying files.


  Commit: 36e7743d8ec9e743ae66485ddf2a6b27549c8833
      https://github.com/llvm/llvm-project/commit/36e7743d8ec9e743ae66485ddf2a6b27549c8833
  Author: Anshil Gandhi <95053726+gandhi56 at users.noreply.github.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp

  Log Message:
  -----------
  [SandboxVec][LoadStoreVec][NFC] Tighten bundle element types (#226348)

Use Instruction*/Constant* for LoadStoreVec APIs where that is what
callers hold, and template getCombinedVectorTypeFor so BndlRef is not
forced through a non-covariant Value* conversion.

Co-authored-by: Cursor <cursoragent at cursor.com>


  Commit: 72674697a28c25467649c4993eb033dc4af65951
      https://github.com/llvm/llvm-project/commit/72674697a28c25467649c4993eb033dc4af65951
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll

  Log Message:
  -----------
  [LV] Add tests for zero branch weights and execution frequencies (NFC). (#226553)

Add missing test coverage for VPlan-based execution frequency
computation:
 * blocks entered via an edge with zero branch weight, 
 * blocks whose sibling edge has zero weight, 
 * nested branches whose skipping edges have zero weight, 
* a block executing on all paths through the loop after a switch whose
probabilities do not add up to 1,
 * frequencies below the smallest representable non-zero one
 * all-zero weights making a join's frequency unknown
 * estimated frequencies propagating through a branch with weights.

Also updates
llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
to check frequencies directly after the frequencies have been recorded.


  Commit: a9809116ca6130906f20c727464ba8e878b59aa5
      https://github.com/llvm/llvm-project/commit/a9809116ca6130906f20c727464ba8e878b59aa5
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M .github/workflows/libcxx-benchmark-commit.yml
    M .github/workflows/libcxx-benchmark-cron.yml
    M .github/workflows/libcxx-pr-benchmark.yml
    M libcxx/utils/ci/lnt/README.md
    M libcxx/utils/ci/lnt/machines.json
    M libcxx/utils/ci/lnt/run-benchmarks
    M libcxx/utils/ci/run-buildbot

  Log Message:
  -----------
  [libc++] Add a benchmark machine for libstdc++ (#226346)

Add a machine that benchmarks the libstdc++ shipped with GCC 16 on macOS
instead of a libc++ build. To enable that, generalize the scripts and
workflows to make more aspects of machines.json optional (e.g. support
machines that don't need to build libc++).


  Commit: 8dc7b3d92cc6371d942dc7619a81faa1f56de938
      https://github.com/llvm/llvm-project/commit/8dc7b3d92cc6371d942dc7619a81faa1f56de938
  Author: Joshua Batista <jbatista at microsoft.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/HLSLIntrinsics.td
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/Sema/SemaHLSL.cpp
    A clang/test/CodeGenHLSL/builtins/WaveReadLaneFirst.hlsl
    A clang/test/SemaHLSL/BuiltIns/WaveReadLaneFirst-errors.hlsl
    M clang/test/SemaHLSL/WaveBuiltinAvailability.hlsl
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    A llvm/test/CodeGen/DirectX/LongVector/wave-readlane-first.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst_mat.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/wave-readlane-first.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst_mat.ll

  Log Message:
  -----------
  Add WaveReadLaneFirst HLSL function (#220373)

This PR adds the `WaveReadLaneFirst` HLSL function.

Fixes https://github.com/llvm/llvm-project/issues/99164
Assisted by: Github Copilot


  Commit: 7b42d2f9991c3680627878a49b1b323cb56176a0
      https://github.com/llvm/llvm-project/commit/7b42d2f9991c3680627878a49b1b323cb56176a0
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 07aec21c88f4 (#226571)


  Commit: cc527d5399997024a68be6241e3a70a6f05a338e
      https://github.com/llvm/llvm-project/commit/cc527d5399997024a68be6241e3a70a6f05a338e
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn

  Log Message:
  -----------
  [gn] port b3ed324d42c04 (#226570)


  Commit: bbd2e0f7ce13d2a1ff8336018d3b034eb3c698a0
      https://github.com/llvm/llvm-project/commit/bbd2e0f7ce13d2a1ff8336018d3b034eb3c698a0
  Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/test/CodeGen/Mips/extins.ll

  Log Message:
  -----------
  [Mips] Enable generic bitfield extract preparation (#226491)

Enable CodeGenPrepare's shift sinking when the subtarget supports
bitfield extract instructions. This exposes shift-and-mask patterns
across basic blocks to the existing MIPS extract combine.

Use hasExtractInsert() to keep this disabled for pre-r2 targets and
MIPS16. Add a minimal cross-block regression case to extins.ll.


  Commit: 5bc083e278a59853fcfcf3649ba7a20457ead1e5
      https://github.com/llvm/llvm-project/commit/5bc083e278a59853fcfcf3649ba7a20457ead1e5
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn

  Log Message:
  -----------
  [gn] port b3ed324d42c04 more (#226574)


  Commit: 0a21a0712b800a3cc1af87e1d0ceb1a84f2b24bd
      https://github.com/llvm/llvm-project/commit/0a21a0712b800a3cc1af87e1d0ceb1a84f2b24bd
  Author: Patrick Rachford <pat at modular.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/MC/WasmObjectWriter.cpp
    M llvm/test/MC/WebAssembly/reloc-pic64.s

  Log Message:
  -----------
  [WebAssembly] Emit i64 GOT import globals on wasm64 (#226326)

WasmObjectWriter hardcodes the synthetic GOT import globals
(GOT.mem/GOT.func) to i32, but on wasm64 they hold 64-bit addresses, so
the object is type-invalid against the i64 global.get that consumes
them. wasm-ld already emits i64 GOT imports on wasm64, so this aligns
the object writer with the linker: the import type is gated on
is64Bit(), and the reloc-pic64 expectations are updated. The wasm32
checks are unchanged.


  Commit: 229e7000493f118d49d23073d3bfa613b3798d85
      https://github.com/llvm/llvm-project/commit/229e7000493f118d49d23073d3bfa613b3798d85
  Author: Marcos Ramirez Joos <mramirezjoos.oss at proton.me>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M libc/src/__support/FPUtil/FEnvImpl.h

  Log Message:
  -----------
  [libc] Avoid system fenv.h in FEnvImpl.h when LIBC_MATH_HAS_NO_EXCEPT is set (#224384)

The warning being added under #199009 triggers errors in subprojects
(e.g., flang) using libc headers that gate the use of `#pragma STDC
FENV_ACCESS ON` on the internal libc
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag, when building under
`-Wfenv-access -Werror`. As the idea is for these subprojects to not
access the libc FP environment (see
https://github.com/llvm/llvm-project/pull/199009#issuecomment-5299119396),
gating the use of system fenv.h functions on the
`LIBC_MATH_HAS_NO_EXCEPT` flag avoids having to specify the
`LIBC_COMPILER_HAS_STDC_FENV_ACCESS` flag when building them.

The three line removals are a clean-up related to
https://github.com/llvm/llvm-project/pull/200268. These uses are
redundant as the called functions already use the pragma when
appropriate.


  Commit: 7ca0ce59bb82557a3052666562cc8f0d6d03ec41
      https://github.com/llvm/llvm-project/commit/7ca0ce59bb82557a3052666562cc8f0d6d03ec41
  Author: Finn Plummer <mail at inbelic.dev>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
    M llvm/test/CodeGen/DirectX/LoadInput.ll
    M llvm/test/CodeGen/DirectX/StoreOutput.ll

  Log Message:
  -----------
  [DirectX] Preserve all shader-stage bits during DXIL op lowering (#225874)

The vertex-stage bit is above bit 15 and was lost when the mask was
narrowed to uint16_t. This would cause an incorrect lowering error:
https://godbolt.org/z/rEMj8ssK9.

 Corrected by keeping it as a 32 bit value.
 
 Assisted by: ChatGPT 6 Astra


  Commit: 44c84768990686eb1e24b4d1dcbd13fff37442bb
      https://github.com/llvm/llvm-project/commit/44c84768990686eb1e24b4d1dcbd13fff37442bb
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPostRA.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPreEmit.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
    M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp

  Log Message:
  -----------
  [RISCV] Replace uses of RegState::Define. NFC (#226569)

Either pass the destination register to the BuildMI call or use addDef
if there are multiple defs or other flags are set.


  Commit: 19d72fd6deab2ea3addd8b945807abd02b1bbb70
      https://github.com/llvm/llvm-project/commit/19d72fd6deab2ea3addd8b945807abd02b1bbb70
  Author: Kerry McLaughlin <kerry.mclaughlin at arm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
    M clang/lib/Sema/SemaARM.cpp
    M llvm/include/llvm/Support/AArch64MemoryHints.h
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp

  Log Message:
  -----------
  [AArch64] Rename memory hints to avoid clash with arm_acle.h macros (#226432)

Renames the hints in AArch64MemoryHints.h, as HINT_STSHH_KEEP and
HINT_STSHH_STRM are already defined in arm_acle.h.


  Commit: e76dd51398a8ceac33e9e5bf3253dd6b03b965dd
      https://github.com/llvm/llvm-project/commit/e76dd51398a8ceac33e9e5bf3253dd6b03b965dd
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll

  Log Message:
  -----------
  [SLP][NFC]ADd a test with the missed vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226581


  Commit: d506ee743cdaef27448964890f813bd3b7da7953
      https://github.com/llvm/llvm-project/commit/d506ee743cdaef27448964890f813bd3b7da7953
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll

  Log Message:
  -----------
  [SLP]Reuse the trimmed nodes in the perfectly matched gathers of the same user

The gather node, perfectly matching the node of the same user
transformed to gather during throttling, did not treat this node as a
reuse source, and was costed and emitted as a separate buildvector.

Fixes #219030

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226582


  Commit: f57595ff59a0f012e0481c69613be907942c30b1
      https://github.com/llvm/llvm-project/commit/f57595ff59a0f012e0481c69613be907942c30b1
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp

  Log Message:
  -----------
  [VPlan] Only exempt MaskedCond from cross-block dominance in verifier. (#226512)

Previously the verifier skipped all use-before-def checks for
MaskedCond, including uses in the same block before the definition.
Restrict the exemption to users in blocks not dominated by the 
MaskedCond's block, so same-block use-before-def is still diagnosed.


  Commit: 08af99fae9e079b448cd8877fc57376efe680cda
      https://github.com/llvm/llvm-project/commit/08af99fae9e079b448cd8877fc57376efe680cda
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/SDPatternMatch.h

  Log Message:
  -----------
  [SDPatternMatch] Implement m_True/False using SelectionDAG::isBoolConstant. (#226216)

Better than duplicating existing functionality.


  Commit: e4af48bd3b330282f36f075d6fa7a4a0742376c1
      https://github.com/llvm/llvm-project/commit/e4af48bd3b330282f36f075d6fa7a4a0742376c1
  Author: Ehsan Amiri <ehsan.amiri at huawei.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LoopFuse.cpp
    A llvm/test/Transforms/LoopFusion/guard_skip_empty_block.ll

  Log Message:
  -----------
  [LoopFusion] Cleanup control flow before Fusion (#226289)

Non-loop successor of loop guard is sometimes modified by JumpThreading
(and potentially some other passes) to jump to a new block, that doesn't
post dominate the exit block of the loop:

   Guard:    br %c, %Preheader, %Skip
   Skip:     br %Merge
   ...
   Exit:     br %Merge
   Merge:    ...

Later on, this block becomes empty, so it can be removed. Its presence
prevents Loop::getLoopGuardBranch() from detecting the loop guard which
results in missed fusion opportunities. SimplifyCFG will run when "Skip"
is still not optimzied, so it cannot resolve this issue.

Assisted by Claude Code


  Commit: ee3b6b045bc37b156c3860481090d68367e961dc
      https://github.com/llvm/llvm-project/commit/ee3b6b045bc37b156c3860481090d68367e961dc
  Author: agozillon <Andrew.Gozillon at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M flang/lib/Lower/OpenMP/ClauseProcessor.cpp
    M flang/lib/Lower/OpenMP/Utils.cpp
    M flang/lib/Lower/OpenMP/Utils.h
    M flang/test/Lower/OpenMP/declare-mapper.f90
    A flang/test/Lower/OpenMP/target-map-nested-dtype-allocatable-member.f90

  Log Message:
  -----------
  [Flang][OpenMP] Fix broken offload test caused by MapInfoFinalization code movement (#226384)

This change addresses the breakage in
target-map-nested-dtype-allocatable-member.f90 I inadvertently broke it
by removing the excess bit of implicit mapping code in the
MapInfoFinalizaiton pass without correctly addressing it.

This PR tries to do so by allowing mappers to be generated for member
maps such as var1%b, var2%b, which were previously being blocked.

Currently (and conveniently for this patch) we do avoid duplicate maps
in the scenario where we specify something along the lines of:

map(tofrom: var1, var1%b, var2, var2%b)

But that is through the fact that we completely negate var1/var2's
mapper attachment in this scenario, which I do not believe is the
correct behavior. But it's the existing behavior and facilitates this
patch, but it is something I'll see if I can address in a follow up PR
in the near future, the logic might need a bit of debating. For now this
simply seeks to amend the existing test without rocking the boat more
than required (that's the hope at least).


  Commit: ae614a9564425ab206940f2b91607b1d77826068
      https://github.com/llvm/llvm-project/commit/ae614a9564425ab206940f2b91607b1d77826068
  Author: Aaron <58265908+aaronsms at users.noreply.github.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/unittests/Format/FormatTest.cpp

  Log Message:
  -----------
  [clang-format] Preserve enum initializer continuation indentation (#223435)

Fixes #223011

Enum assignment operators are annotated as TT_EnumEqual so they can be
aligned independently in #194154. However, this means
ContinuationIndenter no longer recognizes a wrapped enum `=` as
TT_BinaryOperator. As a result, it may force unnecessary breaks within
the RHS binary expression.

Co-authored-by: Aaron Saw Min Sern <aaron at aaronsms.com>


  Commit: 4db3dceb8d7bffa4b69042fe043652d616396237
      https://github.com/llvm/llvm-project/commit/4db3dceb8d7bffa4b69042fe043652d616396237
  Author: Jeremy Kun <jkun at google.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Support/StringRef.cpp
    M llvm/unittests/ADT/StringRefTest.cpp

  Log Message:
  -----------
  [llvm] produce a more consistent estimates of bit width needed when parsing an integer (#205947)

A colleague of mine noticed that `"12535824225335233"` parses in MLIR's
integer attribute parser as a 68-bit integer, even though it is a 53-bit
constant. I traced this back to `StringRef::consumeInteger`'s heuristic
estimate of the bit size. This change replaces that heuristic with a
default 64-bit storage, doubling the storage as more digits are parsed.
This produces a potentially larger over-estimate of the total storage
required, but does so in a less arbitrary manner and reduces the
over-approximation for numbers close to the 64-bit boundary.

Nb., A first iteration of this change tightened that estimate to at most
a 1-bit overapproximation with a lookup-table.

Assisted by Gemini


  Commit: 1b4e7f41268eb3db5300e79256764140e509e3f5
      https://github.com/llvm/llvm-project/commit/1b4e7f41268eb3db5300e79256764140e509e3f5
  Author: Akash Manna <akash.manna.mymail at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/lib/Sema/SemaType.cpp
    M clang/test/Sema/large-bit-int.c
    M clang/test/Sema/types.c
    M clang/test/SemaCXX/vector.cpp

  Log Message:
  -----------
  [Clang] Enforce the same size limits for `vector_size` and `ext_vector_type` (#226375)

Fixes #165458

A `bool` vector declared with `ext_vector_type` isn't lowered as an LLVM
vector in memory: `ConvertTypeForMem` packs it into a single integer
with one bit per element. `BuildExtVectorType` only checked that the
element count fits in 32 bits, though, so a vector of 187,553,262 bools
got through Sema and the first consumer that needed its memory type (the
zero initializer of a tentative definition here) asked
`IntegerType::get` for far more than the 2^23 bits it supports. The
count matters for every element type, not just `bool`, because Sema also
forms bool vectors out of other vectors (`c ? true : false` with a
`char` vector condition), and `vector_size` was no better off with its
limits of 2^32 elements and 2^61 bytes.

Both attributes now go through the same two limits when the type is
built, reusing the existing "vector size too large" error: at most
`llvm::IntegerType::MAX_INT_BITS` (2^23) elements, and at most 2^28
bytes so that the natural alignment, the size rounded up to a power of
two, still fits in the `unsigned` alignment of `TypeInfo`. These replace
the old `isIntN(61)` and `UINT32_MAX` checks in `BuildVectorType`.


  Commit: 210ecf77c9021941ee32c496df8b715615163df4
      https://github.com/llvm/llvm-project/commit/210ecf77c9021941ee32c496df8b715615163df4
  Author: Eli Friedman <efriedma at qti.qualcomm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/IPO/Instrumentor.cpp

  Log Message:
  -----------
  [Instrumentor] Use CreateAllocationSize to compute size of alloca (#226330)

No significant functional change, but the IR might look slightly
different.


  Commit: 14e819f14307fd85fe830cf9fe8d168a27b3db89
      https://github.com/llvm/llvm-project/commit/14e819f14307fd85fe830cf9fe8d168a27b3db89
  Author: Eli Friedman <efriedma at qti.qualcomm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h

  Log Message:
  -----------
  [Instrumentor] Delete dead code from getAlloca() (#226331)


  Commit: 8af5ec67c2001eb379d53cc61ccce0ca521a6c3c
      https://github.com/llvm/llvm-project/commit/8af5ec67c2001eb379d53cc61ccce0ca521a6c3c
  Author: Abhay Kanhere <a_kanhere at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/include/llvm/IR/AutoUpgrade.h
    M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll.bc

  Log Message:
  -----------
  [AutoUpgrade] Upgrade old-style !tbaa.struct field tags (#225967)

Extend the TBAA auto-upgrade to rewrite old-style scalar field tags
inside !tbaa.struct
to the struct-path aware format. bitcode (MetadataLoader) upgraded to
match the existing top-level !tbaa upgrade.


  Commit: 35df00b0aa5d9f4deec215306dc24d247f5eb66c
      https://github.com/llvm/llvm-project/commit/35df00b0aa5d9f4deec215306dc24d247f5eb66c
  Author: Abhay Kanhere <a_kanhere at apple.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll

  Log Message:
  -----------
  [TBAA] Recover !tbaa for a memcpy of struct with same type fields (#214116)

When InstCombine widens a small same-typed aggregate copy into an
integer load/store, it derives no !tbaa, and !tbaa.struct is nulled out,
so the load/store are left untyped. An untyped access may-alias every
typed access and blocks optimization:

  struct Coord { int x, y; };
void copy_if_inbounds(Coord *dst, const Coord *src, const long *bound,
int n) {
    for (int i = 0; i < n; ++i)
      if (i < *bound)
        dst[i] = *src;   // {int,int} copy -> memcpy + !tbaa.struct
  }

compare this to field-by-field copy, which has typed field access
void copy_fields_if_inbounds(Coord *dst, const Coord *src, const long
*bound, int n) {
    for (int i = 0; i < n; ++i)
if (i < *bound) { dst[i].x = src->x; dst[i].y = src->y; } // per-field,
typed
  }


  Commit: 1173687801b5ab1e996f1aef21b760318e5da8c9
      https://github.com/llvm/llvm-project/commit/1173687801b5ab1e996f1aef21b760318e5da8c9
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp

  Log Message:
  -----------
  [VPlan] Use NeedsSingleScalar consistently for ::get (NFC). (#226494)

IsScalar/IsSingleScalar as used currently may be consfusing, as it could
be read as implying that the VPValue is a single-scalar, see
https://github.com/llvm/llvm-project/pull/226153.

But here it means that the caller only needs a single scalar. Update
wording.

PR: https://github.com/llvm/llvm-project/pull/226494


  Commit: b4842bea58e6ca2a3de8692d5214b2441285513d
      https://github.com/llvm/llvm-project/commit/b4842bea58e6ca2a3de8692d5214b2441285513d
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
    M llvm/test/CodeGen/AMDGPU/call-constant.ll
    M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll

  Log Message:
  -----------
  [GlobalISel] Preserve volatile and ordered atomic stores of undef (#226265)

Guard `erase_undef_store` with `isUnordered()`, matching InstCombine.
Ensures volatile and ordered atomic stores are preserved.

---------

Co-authored-by: Hongyu Chen <hongchen at nvidia.com>


  Commit: f9f5ed22a7026261aec0075caa9862953a8a5fe6
      https://github.com/llvm/llvm-project/commit/f9f5ed22a7026261aec0075caa9862953a8a5fe6
  Author: Joseph Huber <huberjn at outlook.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/runtimes/CMakeLists.txt

  Log Message:
  -----------
  [LLVM] Use complete runtime dependency list for multilibs (#226580)

Summary:
The current handling makes the multilib job depend on the base runtimes
job. This means that we will potentially depend on things that don't
necessarily need to be built to fulfil the multilibs job. Instead, just
depend on the individual targets for that multilib.


  Commit: 91d0e2e91e2dc4c4729cbe911f67388453ee509d
      https://github.com/llvm/llvm-project/commit/91d0e2e91e2dc4c4729cbe911f67388453ee509d
  Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M offload/include/Shared/SourceInfo.h
    M offload/test/offloading/info.c
    M openmp/docs/ReleaseNotes.md

  Log Message:
  -----------
  [Offload][OpenMP] remove SourceInfo::removePath (#226586)

This Pr is the same as https://github.com/llvm/llvm-project/pull/226283
(which was reverted in https://github.com/llvm/llvm-project/pull/226557)
This Pr is the same as https://github.com/llvm/llvm-project/pull/226283
but with an update to info.c to account for the new full path output.


  Commit: 5f3a611fa194ca76c91d3889adb68532cef44cee
      https://github.com/llvm/llvm-project/commit/5f3a611fa194ca76c91d3889adb68532cef44cee
  Author: Jackson Stogel <jtstogel at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M utils/bazel/MODULE.bazel.lock
    M utils/bazel/linux_uapi.bzl

  Log Message:
  -----------
  [bazel] Download linux UAPI headers when no local dir is set (#216868)

This PR defines a hermetic source for `@linux_api//:linux_uapi_headers`
that will be used in CI. If no `LINUX_UAPI_INCLUDE_DIR` value is
specified, then Bazel will download the linux-libc-dev debian package
and use its headers.

I originally wanted to pull from https://github.com/torvalds/linux and
build UAPI headers from source as it gives more control, but the repo is
rather large and took ~20s to download and ~10s to build. Using the
debian package's headers is closer to what the LLVM-libc fullbuild CI
[currently
does](https://github.com/llvm/llvm-project/blob/007551bacb899a409218574908d96b0633d52018/.github/workflows/containers/libc/Dockerfile#L38)
and is very fast.


  Commit: c4195f63a560990bdb854357d66f759259bf1d3e
      https://github.com/llvm/llvm-project/commit/c4195f63a560990bdb854357d66f759259bf1d3e
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M mlir/docs/Interfaces.md
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/test/mlir-tblgen/op-interface.td
    M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp

  Log Message:
  -----------
  [mlir][ODS] Share operation interface methods with raw-op bodies (NFC) (#226317)

Allow an operation interface method to use a shared callback when its
body only needs the raw Operation. Use it for OpenMP block-argument
indexing and slicing methods, avoiding per-operation wrappers while
preserving the existing fallback and external model paths.

Reduces the size of the OpenMP dialect text section by 1.68%.

Assisted-by: Codex


  Commit: 7fbfd203131aa597c63d89e45392454280f89cfa
      https://github.com/llvm/llvm-project/commit/7fbfd203131aa597c63d89e45392454280f89cfa
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lldb/include/lldb/Utility/StructuredData.h
    M lldb/source/Commands/CommandObjectVersion.cpp
    M lldb/source/Utility/StructuredData.cpp

  Log Message:
  -----------
  [lldb] Add StructuredData::Dictionary::ForEachSorted (NFC) (#226597)

`Dictionary::Serialize`, `Dictionary::GetDescription` and the build
configuration dump in `CommandObjectVersion` each collect the
dictionary's keys and sort them before iterating, so that the output
doesn't depend on StringMap's ordering. Factor that into a new
`ForEachSorted` method.

Signed-off-by: Med Ismail Bennani <ismail at bennani.ma>


  Commit: 5cab2963e13496c272a482145b11796e9e26eeb4
      https://github.com/llvm/llvm-project/commit/5cab2963e13496c272a482145b11796e9e26eeb4
  Author: Demetrios Chiuratto Agourakis <demetrios at agourakis.med.br>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/X86/llvm.frexp.ll

  Log Message:
  -----------
  [SelectionDAG] Fix result index and vector width in unrollExpandedOp (#225886)

Fixes #224127.

In `DAGTypeLegalizer::WidenVectorResult`, `unrollExpandedOp` computes
the unroll count and widened vector type from the result being legalized
(`ResNo`) rather than unconditionally using result 0. For multi-result
nodes where result types differ (e.g. `ISD::FFREXP`), this prevents
mismatched vector widths and preserves the correct result index from
`DAG.UnrollVectorOp`.

Assisted-by: Claude

---------

Co-authored-by: Demetrios Chiuratto Agourakis <agourakis82 at gmail.com>


  Commit: 5aa8fcc29bc47056411b3d23b0e7acc981ec3934
      https://github.com/llvm/llvm-project/commit/5aa8fcc29bc47056411b3d23b0e7acc981ec3934
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll

  Log Message:
  -----------
  [RISCV] Support swapped select operands in combineTruncSelectToSMaxUSat. (#226584)

Handle (trunc (vselect (setugt X, 2^N-1), (sext (setgt X, 0)), X)) in
addition to the existing (trunc (vselect (setult X, 2^N), X,
(sext (setgt X, 0)))) form.

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply at anthropic.com>


  Commit: 7e91ef5d6aeaa7191a9354ddcff67d84bd8aebaf
      https://github.com/llvm/llvm-project/commit/7e91ef5d6aeaa7191a9354ddcff67d84bd8aebaf
  Author: Michael G. Kazakov <mike.kazakov at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M libcxx/include/CMakeLists.txt
    M libcxx/include/__algorithm/pstl.h
    M libcxx/include/__pstl/backend_fwd.h
    M libcxx/include/__pstl/backends/default.h
    M libcxx/include/__pstl/backends/libdispatch.h
    M libcxx/include/__pstl/backends/serial.h
    M libcxx/include/__pstl/backends/std_thread.h
    A libcxx/include/__pstl/cpu_algos/swap_ranges.h
    M libcxx/include/module.modulemap.in
    M libcxx/test/libcxx/algorithms/pstl.iterator-requirements.verify.cpp
    A libcxx/test/std/algorithms/alg.modifying.operations/alg.swap/pstl.swap_ranges.pass.cpp
    M libcxx/test/std/algorithms/pstl.exception_handling.pass.cpp

  Log Message:
  -----------
  [libc++][pstl] Implementation of parallel std::swap_ranges() based on parallel __for_each (#224967)

This PR adds an implementation of parallel `std::swap_ranges()` based on
`__parallel_for_each_iter_pair()`.

The implementation is effectively a one-liner, but has to deal with
iterator ranges, thus is located in `cpu_algos`:
```c++
__pstl::__parallel_for_each_iter_pair<_Backend>(
    first1, last1, first2,
    [](ForwardIterator1 brick_first1, ForwardIterator1 brick_last1, ForwardIterator2 brick_first2) {
        std::swap_ranges(std::move(brick_first1), std::move(brick_last1), std::move(brick_first2));
    });
```

Part of #99938


  Commit: 7fc4f276a4d0a4b1f968003d863ee50dc9ebcedd
      https://github.com/llvm/llvm-project/commit/7fc4f276a4d0a4b1f968003d863ee50dc9ebcedd
  Author: Valentin Clement (バレンタイン クレメン) <clementval at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M flang/lib/Parser/openacc-parsers.cpp
    M flang/test/Parser/acc-label-do.f90

  Log Message:
  -----------
  [flang][openacc] Build full shared-label DO nests in AccNonBlockDoConstruct (#225997)

When an `!$acc loop` is associated with a labeled DO,
AccNonBlockDoConstruct
turned only that outer loop into a DoConstruct and left sibling
LabelDoStmts
that share the same terminator for later CanonicalizeDo. An inner `!$acc
loop`
then swallowed the shared terminator into its own DoConstruct, so
AnalyzeLabels (which runs before CanonicalizeDo) rejected the remaining
LabelDoStmts with "Label 'N' is not in DO loop scope".

Recurse on nested LabelDoStmts while parsing the associated loop so the
whole shared-label nest is a DoConstruct before label analysis. Add a
parser test where only the outer and innermost loops have LOOP
directives.


  Commit: ce8e98386b89cf25065349c0e8147f839afda5dd
      https://github.com/llvm/llvm-project/commit/ce8e98386b89cf25065349c0e8147f839afda5dd
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorInterfaces.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAInterfaces.td
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td

  Log Message:
  -----------
  [mlir][Interfaces] Share more operation interface bodies (NFC) (#226603)

Use raw operation access for methods that do not depend on the concrete
operation type. Keep typed access where operation-specific APIs are
needed.

This save a little bit of code size and improves build time.

Assisted-by: Codex


  Commit: b5426c132f47b14874de7ce26a4e1bca80182e4c
      https://github.com/llvm/llvm-project/commit/b5426c132f47b14874de7ce26a4e1bca80182e4c
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt-c/support/Logging.h
    M orc-rt/test/unit/support/LoggingTest.cpp

  Log Message:
  -----------
  [orc-rt] Add ORC_RT_LOG_ENABLED macro. (#226500)

ORC_RT_LOG_ENABLED(Level) reports whether log sites at the given level
are compiled in, taking into account both the backend and the
ORC_RT_LOG_LEVEL floor. It takes the same level token as ORC_RT_LOG and
can be used in preprocessor conditionals, allowing code that relies on
logging to surface something important (e.g. a logging error reporter)
to choose an alternative when logging is compiled out.


  Commit: f739fbc831cbd670b9dc3044a492240cfede20c3
      https://github.com/llvm/llvm-project/commit/f739fbc831cbd670b9dc3044a492240cfede20c3
  Author: Benjamin Maxwell <benjamin.maxwell at arm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    A llvm/test/Transforms/LoopVectorize/AArch64/diff-checks-force-interleave-count.ll

  Log Message:
  -----------
  [LV] Honor -force-vector-interleave when generating diff checks  (#225768)

We use both IC and UserIC in the checks below. However, once those
checks are done, UserIC will always override IC if it's non-zero. That
means using the max is unnecessary and can result in overly conservative
checks when UserIC < IC.


  Commit: 201e76d4559e9d8acdfec1c202df8f2269acbd8b
      https://github.com/llvm/llvm-project/commit/201e76d4559e9d8acdfec1c202df8f2269acbd8b
  Author: Changpeng Fang <changpeng.fang at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/DetectDeadLanes.cpp
    A llvm/test/CodeGen/AMDGPU/detect-dead-lanes-reg-sequence-narrow-slot.mir
    M llvm/test/CodeGen/AMDGPU/frem.ll
    A llvm/test/CodeGen/AMDGPU/true16-uniform-f16-phi-copysign.ll

  Log Message:
  -----------
  [CodeGen] Fix DetectDeadLanes for same-class copies with mismatched widths (#226556)

isCrossCopy() returned early whenever source and destination shared a
register class, treating the transfer as lane-for-lane. That is wrong
when a REG_SEQUENCE names a subregister slot narrower than the source
operand, e.g. a 32-bit vreg used as the lo16 piece of another 32-bit
vreg. Only take the early exit when the two widths match; otherwise fall
through to findCommonRegClass().

Fixes: ROCM-31212


  Commit: 3a2787d5ca6ba0271f7203997f8a9b65679398a4
      https://github.com/llvm/llvm-project/commit/3a2787d5ca6ba0271f7203997f8a9b65679398a4
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt-c/config.h.in
    M orc-rt/include/orc-rt-c/support/Logging.h

  Log Message:
  -----------
  [orc-rt] Move ORC_RT_LOG_ENABLED into config.h. (#226617)

ORC_RT_LOG_ENABLED depends only on the logging configuration values
defined in config.h, but was defined in Logging.h, so checking whether a
log level is compiled in required pulling in the logging backend's
headers (e.g. <os/log.h>).

This commit moves ORC_RT_LOG_ENABLED (and its level-token aliases) into
config.h, so that headers can check the logging configuration without
including Logging.h.


  Commit: f8c2918d49d3a3803ae3c9e1b6c216b24db9ad51
      https://github.com/llvm/llvm-project/commit/f8c2918d49d3a3803ae3c9e1b6c216b24db9ad51
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/AArch64/ordered-reduction-of-loads.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/ordered-reduction.ll

  Log Message:
  -----------
  [SLP][NFC]Add extra test for reductions vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226618


  Commit: 90c150f868adb53b45dbf7489e93a23c22f6b6b3
      https://github.com/llvm/llvm-project/commit/90c150f868adb53b45dbf7489e93a23c22f6b6b3
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/tools/clang-format/ClangFormat.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp

  Log Message:
  -----------
  Replace cl::bits with cl::list. NFC (#226399)

cl::bits packs enum values into an unsigned, which would block migration
to TableGen based representation. The three users only test membership.

LLM-aided


  Commit: 0b61b734cf84a19491f4bcb61e04956995807051
      https://github.com/llvm/llvm-project/commit/0b61b734cf84a19491f4bcb61e04956995807051
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang-tools-extra/clangd/tool/ClangdMain.cpp

  Log Message:
  -----------
  [clangd] Report retired flags after parsing (#226360)

cl::callback will be removed to enable migration to TableGen

https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/3

LLM-aided


  Commit: ab08c75ffe0a40626a4dc62ed010d6e3ceece056
      https://github.com/llvm/llvm-project/commit/ab08c75ffe0a40626a4dc62ed010d6e3ceece056
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M bolt/lib/Passes/BinaryPasses.cpp
    M bolt/lib/Passes/ReorderFunctions.cpp
    M bolt/lib/Profile/DataAggregator.cpp

  Log Message:
  -----------
  [BOLT] Remove cl::callback uses (#226359)

cl::callback will be removed to enable migration to TableGen based
representation.

https://discourse.llvm.org/t/rfc-declare-library-command-line-options-in-tablegen-one-struct-per-library/91877/3

LLM-aided


  Commit: e59a0c697552ae7d1c3aeed5774e829cdc5e16b5
      https://github.com/llvm/llvm-project/commit/e59a0c697552ae7d1c3aeed5774e829cdc5e16b5
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt/bedrock/Session.h
    M orc-rt/lib/bedrock/Session.cpp
    M orc-rt/test/unit/CommonTestUtils.h
    M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
    M orc-rt/test/unit/bedrock/SessionTest.cpp
    M orc-rt/tools/ogre/ogre.cpp

  Log Message:
  -----------
  [orc-rt] Pass the reporting Session to Session error reporters. (#226622)

Session error reporters previously received only the Error, and had to
be supplied to the Session constructor, so they had no direct way to
refer to the Session reporting the error (e.g. to include its address in
a log message).

This commit changes ErrorReporterFn to take the reporting Session along
with the Error, and adds a Session::logErrors reporter that logs errors
via ORC_RT_LOG at Error level in the Session category. logErrors is only
available when Error-level logging is compiled in
(ORC_RT_LOG_ENABLED(Error)), so that it can't silently discard errors in
configurations where logging is compiled out. The noErrors and
AccumulateErrors test helpers are updated to work as both plain and
Session error reporters.


  Commit: 240a9cb75dd9210cae8e987700d0ef6537b723cb
      https://github.com/llvm/llvm-project/commit/240a9cb75dd9210cae8e987700d0ef6537b723cb
  Author: Twice <twice at apache.org>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M mlir/python/mlir/dialects/ext.py
    M mlir/test/python/dialects/ext.py

  Log Message:
  -----------
  [MLIR][Python] Allow `Attribute` to denote unconstrained attributes in Python-defined ops (#224679)

Operation definitions support attribute constraints such as
`IntegerAttr`, `StringAttr`, and `IntegerAttr | StringAttr`, but
currently reject `Attribute` itself.

This change allows `Attribute` to denote an unconstrained attribute,
accepting both built-in and Python-defined attributes:

```python
class MyOp(MyDialect.Operation, name="my_op"):
    arg: Operand
    attr: Attribute
    res: Result
```

This complements the unconstrained `Operand` and `Result` annotations
introduced in #220216. The annotation also works with `attribute()`
field specifiers, including `kw_only` and `default_factory`.

Assisted-by: Codex / GPT6


  Commit: 163950475fc724cd5d62e868bdb46ba0c39e5519
      https://github.com/llvm/llvm-project/commit/163950475fc724cd5d62e868bdb46ba0c39e5519
  Author: Steffen Larsen <sholstla at amd.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
    M clang/test/CIR/CodeGenCUDA/address-spaces.cu

  Log Message:
  -----------
  [CIR] Attach address space to global variables (#226455)

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>


  Commit: 60059de6eb6d647857ac55b48d465580aa3ecdc5
      https://github.com/llvm/llvm-project/commit/60059de6eb6d647857ac55b48d465580aa3ecdc5
  Author: A. Jiang <de34 at live.cn>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M libcxx/include/__ranges/adjacent_transform_view.h
    M libcxx/include/__ranges/adjacent_view.h
    M libcxx/include/__ranges/chunk_by_view.h
    M libcxx/include/__ranges/common_view.h
    M libcxx/include/__ranges/concat_view.h
    M libcxx/include/__ranges/counted.h
    M libcxx/include/__ranges/drop_view.h
    M libcxx/include/__ranges/drop_while_view.h
    M libcxx/include/__ranges/elements_view.h
    M libcxx/include/__ranges/empty_view.h
    M libcxx/include/__ranges/enumerate_view.h
    M libcxx/include/__ranges/filter_view.h
    M libcxx/include/__ranges/iota_view.h
    M libcxx/include/__ranges/join_view.h
    M libcxx/include/__ranges/join_with_view.h
    M libcxx/include/__ranges/lazy_split_view.h
    M libcxx/include/__ranges/movable_box.h
    M libcxx/include/__ranges/non_propagating_cache.h
    M libcxx/include/__ranges/rbegin.h
    M libcxx/include/__ranges/rend.h
    M libcxx/include/__ranges/reverse_view.h
    M libcxx/include/__ranges/single_view.h
    M libcxx/include/__ranges/split_view.h
    M libcxx/include/__ranges/stride_view.h
    M libcxx/include/__ranges/take_view.h
    M libcxx/include/__ranges/take_while_view.h
    M libcxx/include/__ranges/to.h
    M libcxx/include/__ranges/transform_view.h
    M libcxx/include/__ranges/views.h
    M libcxx/include/__ranges/zip_transform_view.h
    M libcxx/include/__ranges/zip_view.h

  Log Message:
  -----------
  [libc++][NFC] Avoid empty namespace in internal headers of `<ranges>` (#226034)

...in pre-C++20/23 modes. This follows up
0c94a978df783bd67535350eac84088fc482716a and fixes more complaints from
clang-tidy checks in CI.


  Commit: 18af9ef08eec59d1bce7b941f164ba3f866acf59
      https://github.com/llvm/llvm-project/commit/18af9ef08eec59d1bce7b941f164ba3f866acf59
  Author: Douglas Yung <douglas.yung at sony.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/lib/Sema/SemaOpenMP.cpp
    R clang/test/OpenMP/error_message.c
    M clang/test/OpenMP/error_message.cpp
    M clang/test/OpenMP/parallel_message_messages.cpp

  Log Message:
  -----------
  Revert "[clang][OpenMP] Only accept char strings in the message clause" (#226636)

Reverts llvm/llvm-project#226080

The newly added test error_message.c is failing on the PS4 bot 
https://lab.llvm.org/buildbot/#/builders/144/builds/66294


  Commit: e0316c1b4762263caa49e3c41ddde752a2b6b775
      https://github.com/llvm/llvm-project/commit/e0316c1b4762263caa49e3c41ddde752a2b6b775
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/ByteCodeEmitter.h
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Context.cpp
    M clang/lib/AST/ByteCode/Disasm.cpp
    M clang/lib/AST/ByteCode/EvalEmitter.cpp
    M clang/lib/AST/ByteCode/EvalEmitter.h
    M clang/lib/AST/ByteCode/EvaluationResult.cpp
    M clang/lib/AST/ByteCode/EvaluationResult.h
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/ExprConstShared.h
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/AST/ByteCode/builtin-functions.cpp
    M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
    M clang/test/AST/ByteCode/references.cpp
    M clang/test/CodeGenCXX/global-init.cpp
    M clang/test/SemaCXX/PR19955.cpp
    M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp

  Log Message:
  -----------
  Revert "[clang][bytecode] Stop relying on `CheckEvaluationResult()` (… (#226637)

…#186045)"

This reverts commit 55b498466a7b2620d09fcdf1b2300f71a35f6d8b.

This breaks two msan builders and reproducing the failure locally takes
forever.


  Commit: 6a37cee09997b28c6cc708dd36b283bbd5bd7147
      https://github.com/llvm/llvm-project/commit/6a37cee09997b28c6cc708dd36b283bbd5bd7147
  Author: asudarsa-qti <asudarsa at qti.qualcomm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/lib/Interpreter/IncrementalAction.cpp
    A clang/test/Interpreter/nonexistent-xcc-file.cpp

  Log Message:
  -----------
  Fix for a clang-repl crash when passing non-existent file to --Xcc (#225861)

Problem: When clang-repl fails to initialize because an --Xcc file does
not exist, Interpreter::create() destroys the partially initialized
Interpreter. Its destructor unconditionally calls FinalizeAction(),
which invokes FrontendAction::EndSourceFile() without a registered
CompilerInstance and triggers an assertion.
Fix: Track whether interpreter initialization completed successfully and
only finalize the frontend action for successfully initialized
interpreters.
Test: Add a regression test covering a nonexistent --Xcc file.

This change resolves https://github.com/llvm/llvm-project/issues/225429

Assisted by gpt-5.6-luna

---------

Co-authored-by: Anutosh Bhat <andersonbhat491 at gmail.com>


  Commit: c4896792fb97b2ad237c5c404cdda2d0cd4fcf61
      https://github.com/llvm/llvm-project/commit/c4896792fb97b2ad237c5c404cdda2d0cd4fcf61
  Author: Med Ismail Bennani <ismail at bennani.ma>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M lldb/include/lldb/Target/Process.h
    M lldb/source/API/SBProcess.cpp
    M lldb/source/Target/Process.cpp
    M lldb/test/API/python_api/process/address-masks/TestAddressMasks.py

  Log Message:
  -----------
  [lldb] Rebuild stack frames when a process address mask changes (#224989)


  Commit: 4257da8ee2e84b3e62d2a2a5010e81823b799805
      https://github.com/llvm/llvm-project/commit/4257da8ee2e84b3e62d2a2a5010e81823b799805
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-fixed-vf-no-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll

  Log Message:
  -----------
  [LV] Always try to use fixed VF for low TC loops if no epilogue allowed. (#226318)

Remove the MaxPowerOf2RuntimeVF gate for falling back to using fixed
width VFs when no epilogue is allowed and the trip count is below the
minimum for tail folding.

MaxPowerOf2RuntimeVF being not set means we cannot compute the maximum
runtime VF, due to missing max vscale. In that case we are not able to
determine if a epilogue loop remains for scalable VFs, but we can still
pick a fixed VF, if no epilogue remains for it.

Also updates processLoop to ignore CM_EpilogueNotNeededFoldTail, if the
trip count is below the tail-folding threshold.

PR: https://github.com/llvm/llvm-project/pull/226318


  Commit: 825903711948134578537eda6dd94a488ed50319
      https://github.com/llvm/llvm-project/commit/825903711948134578537eda6dd94a488ed50319
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt/support/bind.h
    M orc-rt/test/unit/support/bind-test.cpp

  Log Message:
  -----------
  [orc-rt] make bind_front match std::bind_front semantics. (#226646)

orc_rt::bind_front stands in for std::bind_front until the ORC runtime
can use C++20, so code written against it should keep working after the
switch. This commit brings its behavior in line with std::bind_front:

- noexcept propagation
- const and rvalue call operators, forwarding the wrapper's qualifiers
- no fallback to a differently-qualified call operator
- reference return types
- member pointers
- copyable wrappers, including nested binds

The unit tests are reorganized and extended to cover these.

Assisted-by: Claude


  Commit: 0b4f72d00bdd2ef1707c5098d12936bfa159b414
      https://github.com/llvm/llvm-project/commit/0b4f72d00bdd2ef1707c5098d12936bfa159b414
  Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Interpreter/Interpreter.h
    M clang/lib/CodeGen/BackendConsumer.h
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/lib/Interpreter/DeviceOffload.h
    M clang/lib/Interpreter/Interpreter.cpp
    M clang/unittests/Basic/CMakeLists.txt
    A clang/unittests/Basic/TargetIDTest.cpp

  Log Message:
  -----------
  [clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation (#218337)

This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.

This PR only adds the parser class, wiring it into Interpreter.cpp and
the end-to-end tests will come in a follow-up.

Assisted by Claude Opus 4.8


  Commit: 5f609f950d2e80addf5566623013db68394334db
      https://github.com/llvm/llvm-project/commit/5f609f950d2e80addf5566623013db68394334db
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/docs/CommandLine.md
    M llvm/include/llvm/Support/CommandLine.h
    M llvm/unittests/Support/CommandLineTest.cpp

  Log Message:
  -----------
  [Support] Remove cl::bits (#226628)

cl::list covers the same use, and cl::bits would block migration to
TableGen based representation.

LLM-aided


  Commit: c0b6ee14c2f8dece229da557352e116f9a6d7064
      https://github.com/llvm/llvm-project/commit/c0b6ee14c2f8dece229da557352e116f9a6d7064
  Author: David Green <david.green at arm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll

  Log Message:
  -----------
  [AArch64] Add tests for sve fixed length reverse shuffles. NFC (#226661)


  Commit: 96b5cc3d836494c56c8d5ae1e73e90864eb19a5d
      https://github.com/llvm/llvm-project/commit/96b5cc3d836494c56c8d5ae1e73e90864eb19a5d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/BranchProbabilityInfo.h
    M llvm/lib/Analysis/BranchProbabilityInfo.cpp

  Log Message:
  -----------
  [BPI] Add getEdgeProbabilitiesFromWeights (NFC). (#226560)

Move computing edge probabilities from branch weights to a static
helper. This allows re-using the core logic when computing execution
frequencies in VPlan, fixing a number of subtle differences.

While touching the code, also modernize the code slightly.

Note that the helper does not handle the case where all successors are
unreachable. This would need additional info and is not needed for the
VPlan case.

PR: https://github.com/llvm/llvm-project/pull/226560


  Commit: 97e9558844822e1ff8f986319ef354fda42b8215
      https://github.com/llvm/llvm-project/commit/97e9558844822e1ff8f986319ef354fda42b8215
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/DetectDeadLanes.cpp
    R llvm/test/CodeGen/AMDGPU/detect-dead-lanes-reg-sequence-narrow-slot.mir
    M llvm/test/CodeGen/AMDGPU/frem.ll
    R llvm/test/CodeGen/AMDGPU/true16-uniform-f16-phi-copysign.ll

  Log Message:
  -----------
  Revert "[CodeGen] Fix DetectDeadLanes for same-class copies with mismatched widths" (#226665)

Reverts llvm/llvm-project#226556

This is handling malformed IR and adding size based instead of register
class based reasoning


  Commit: d94f3a52dad756d7354a9ca688b4ac76a97b9d38
      https://github.com/llvm/llvm-project/commit/d94f3a52dad756d7354a9ca688b4ac76a97b9d38
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/test/unit/CMakeLists.txt
    R orc-rt/test/unit/bedrock/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/SocketTestUtils.h
    M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
    A orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp

  Log Message:
  -----------
  [orc-rt] Make socket unit tests portable; build them on POSIX. (#226662)

SimpleRemoteCAOverSocketTest.cpp tests a POSIX-only implementation, so
move it to the POSIX source list. Its tests are portable, so move the
fixture's POSIX code into SocketTestUtils (makeStreamSocketPair,
sendAll, recvAll, makeNativeNonStreamSocket) rather than moving the file
under sys/posix; a Windows transport will need only Windows definitions
of those helpers.

makeStreamSocketPair documents the properties the tests rely on beyond a
connected stream pair: neither direction buffers StallingPayloadSize
bytes, and closing an end delivers what it already sent even if it has
unread data. AF_UNIX provides both; a loopback TCP pair may not.

SocketConnectorTest.cpp tests fd adoption with pipe and fcntl, so it is
a test of the POSIX implementation: move it to sys/posix/.

Assisted-by: Claude


  Commit: a4e311d3f80f0bc1b0912d3f9f650a8d949a06e5
      https://github.com/llvm/llvm-project/commit/a4e311d3f80f0bc1b0912d3f9f650a8d949a06e5
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
    M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp

  Log Message:
  -----------
  [ORC] Call createPThreadKey through a Proxy in MachO/ELFNixPlatform (#226656)

Replace the callSPSWrapper calls in MachOPlatform::createPThreadKey and
ELFNixPlatform::createPThreadKey with a Proxy built over the address
recorded during bootstrap, using a local CI descriptor for each
platform's create_pthread_key wrapper. The address stays in the
platforms' RuntimeFunction table, which is filled uniformly by the
bootstrap recording pass.


  Commit: 0407861c32056a8ac57de2d7ef304ebbb3922139
      https://github.com/llvm/llvm-project/commit/0407861c32056a8ac57de2d7ef304ebbb3922139
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsAsmPrinter.h
    M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
    M llvm/lib/Target/Mips/MipsCallLowering.cpp
    M llvm/lib/Target/Mips/MipsFastISel.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/Mips/MipsMachineFunction.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp

  Log Message:
  -----------
  Mips: Route ABI queries through the subtarget (#226667)


  Commit: e7019f85692bab245c02f4fa433b37105f2d9c0d
      https://github.com/llvm/llvm-project/commit/e7019f85692bab245c02f4fa433b37105f2d9c0d
  Author: Ivan Ho <ivan.ho at cl.cam.ac.uk>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
    M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
    M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir

  Log Message:
  -----------
  [MLIR][IRDL] Instantiate "." in IRDL-defined names as nested namespaces (#207035)

In PR #187911, it was revealed that the constraints on IRDL op names
placed by irdl-to-cpp were too restrictive.
This PR will address that by allowing "." in operation names to denote
nested namespaces, but not "$".

To discuss:
- ops like `wmma.f16.16x16x64.bf8_bf` cannot be registered as C++
identifiers cannot begin with a number. In discussions, we have opted to
prefix the generated namespaces with _.

Codex was used to generate the lit tests.

Close #187911.

Assisted-by: OpenAI Codex (GPT-5 and 6)


  Commit: e8e4a54cfbbc054ec9801dea03e6c6868bf0708a
      https://github.com/llvm/llvm-project/commit/e8e4a54cfbbc054ec9801dea03e6c6868bf0708a
  Author: David Green <david.green at arm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll

  Log Message:
  -----------
  [AArch64] Use SVE rev for full reverse shuffles with SVE128 (#224589)

When the vscale_range is always 1, we can make use of the SVE rev
instruction to perform a full 128bit vector reverse.

Sidesteps #223597 for SVE128


  Commit: fccc8632f21fa8a13f7962932b614e8c1079d9ac
      https://github.com/llvm/llvm-project/commit/fccc8632f21fa8a13f7962932b614e8c1079d9ac
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
    M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
    M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp

  Log Message:
  -----------
  [orc-rt] SimpleRemoteCAOverSocket: require a stream socket. (#226676)

SimpleRemote framing reads each message in as many parts as the socket
delivers it, which a socket that preserves message boundaries (datagram,
seqpacket) would truncate. Check SO_TYPE up front and reject anything
but SOCK_STREAM; the socket is owned by then, so it is closed on
failure.

Assisted-by: Claude


  Commit: e9e27436e89127e5e42863cc6804945b3619b015
      https://github.com/llvm/llvm-project/commit/e9e27436e89127e5e42863cc6804945b3619b015
  Author: Ben Shi <2283975856 at qq.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
    M llvm/lib/Target/AVR/AVRDevices.td
    M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
    R llvm/lib/Target/AVR/TODO.md

  Log Message:
  -----------
  [AVR][NFC] Improve some comment messages (#226423)


  Commit: c495a9b796c46456e523a5eeb3690415ba99f5db
      https://github.com/llvm/llvm-project/commit/c495a9b796c46456e523a5eeb3690415ba99f5db
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M flang/include/flang/Optimizer/Dialect/CUF/CUFDialect.td
    M flang/include/flang/Optimizer/Dialect/FIRCG/CGOps.td
    M flang/include/flang/Optimizer/Dialect/FIRDialect.td
    M flang/include/flang/Optimizer/Dialect/MIF/MIFDialect.td
    M flang/include/flang/Optimizer/HLFIR/HLFIROpBase.td
    M mlir/docs/DefiningDialects/Operations.md
    M mlir/docs/DefiningDialects/_index.md
    M mlir/docs/ReleaseNotes.md
    M mlir/examples/toy/Ch4/include/toy/Ops.td
    M mlir/examples/toy/Ch5/include/toy/Ops.td
    M mlir/examples/toy/Ch6/include/toy/Ops.td
    M mlir/examples/toy/Ch7/include/toy/Ops.td
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUBase.td
    M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
    M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
    M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
    M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
    M mlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationBase.td
    M mlir/include/mlir/Dialect/Complex/IR/ComplexBase.td
    M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
    M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
    M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
    M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
    M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
    M mlir/include/mlir/Dialect/IRDL/IR/IRDL.td
    M mlir/include/mlir/Dialect/Index/IR/IndexDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td
    M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
    M mlir/include/mlir/Dialect/MLProgram/IR/MLProgramBase.td
    M mlir/include/mlir/Dialect/MPI/IR/MPI.td
    M mlir/include/mlir/Dialect/Math/IR/MathBase.td
    M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
    M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
    M mlir/include/mlir/Dialect/PDL/IR/PDLDialect.td
    M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
    M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
    M mlir/include/mlir/Dialect/Quant/IR/QuantBase.td
    M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
    M mlir/include/mlir/Dialect/SMT/IR/SMTDialect.td
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
    M mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td
    M mlir/include/mlir/Dialect/Shard/IR/ShardBase.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
    M mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
    M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
    M mlir/include/mlir/Dialect/UB/IR/UBOps.td
    M mlir/include/mlir/Dialect/Vector/IR/Vector.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSABase.td
    M mlir/include/mlir/Dialect/X86/X86.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
    M mlir/include/mlir/IR/BuiltinDialect.td
    M mlir/include/mlir/IR/DialectBase.td
    M mlir/test/lib/Dialect/Test/TestDialect.td
    M mlir/test/mlir-tblgen/op-format-invalid.td
    M mlir/test/mlir-tblgen/op-format.td
    M mlir/test/python/python_test_ops.td

  Log Message:
  -----------
  [mlir] Enable strict properties in assembly formats by default (#225742)

Make strict property assembly formats the default and remove redundant
per-dialect settings. Keep legacy test fixtures explicitly opted out and
update the documentation.

Downstream can opt out for now using `let
useStrictPropertiesInAssemblyFormat = 0;` ; This will be removed in a
future release.

Part of #155475 

Assisted-by: Codex


  Commit: 9f8d812535d90508d9932cc7c7d39756a5e5d2db
      https://github.com/llvm/llvm-project/commit/9f8d812535d90508d9932cc7c7d39756a5e5d2db
  Author: theRonShark <ron.lieberman at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Interpreter/Interpreter.h
    M clang/lib/CodeGen/BackendConsumer.h
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/lib/Interpreter/DeviceOffload.h
    M clang/lib/Interpreter/Interpreter.cpp
    M clang/unittests/Basic/CMakeLists.txt
    R clang/unittests/Basic/TargetIDTest.cpp

  Log Message:
  -----------
  Revert "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226679)

Reverts llvm/llvm-project#218337 buildbot failures


  Commit: 10872feadab49e23b8a2ef831dc454b712937ae2
      https://github.com/llvm/llvm-project/commit/10872feadab49e23b8a2ef831dc454b712937ae2
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduced-value-next-to-fused-fmul.ll
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-sunk-into-fadd-block.ll

  Log Message:
  -----------
  [SLP][NFC]Add extra FMA candidates tests, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226684


  Commit: 8b96ddbf9cb3437ee4e47a9f60dc983a1f2be8d5
      https://github.com/llvm/llvm-project/commit/8b96ddbf9cb3437ee4e47a9f60dc983a1f2be8d5
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/trimmed-node-matching-gather-emitted-first.ll

  Log Message:
  -----------
  [SLP]Do not reuse transformed nodes in gathers emitted before their user

Gathers of the users with all scalars used outside the block are emitted
before the user, while the transformed nodes are emitted with the user.
Reusing such a transformed node postponed the gather and moved only the
last instruction of the transformed node buildvector, breaking dominance.

Fixes #226674

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226687


  Commit: ea0493b90c036776652105da246ce3fa56e33901
      https://github.com/llvm/llvm-project/commit/ea0493b90c036776652105da246ce3fa56e33901
  Author: Balázs Benics <benicsbalazs at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
    M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
    M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
    A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
    A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyExtractorTest.cpp
    A clang/unittests/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamilyTestSupport.h
    M clang/unittests/ScalableStaticAnalysis/CMakeLists.txt
    A clang/unittests/ScalableStaticAnalysis/ParsedAST.h

  Log Message:
  -----------
  [SSAF] Extract the virtual method override relation per TU (#213316)

A virtual call may dispatch to any override of its callee, so a whole-program
analysis cannot reason about a method's parameters and return value in
isolation. It needs to know which method overrides which, and which slots
that relates. Collect this per TU, so a later pass can join the related
slots into families.

JSON serialization lands separately, so the summary is not writable via
`--ssaf-extract-summaries` yet.

§1 of rdar://179151603

Assisted-By: claude


  Commit: 2305da864cb3b66e1fe857c3018bf7d94253bb8a
      https://github.com/llvm/llvm-project/commit/2305da864cb3b66e1fe857c3018bf7d94253bb8a
  Author: Dmitry Sidorov <Dmitry.Sidorov at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll

  Log Message:
  -----------
  [NFC][SLP][AMDGPU] Precommit a cross-block fmul fadd contraction test (#226609)

Two contract fmuls feed contract fadds in different successors. AMDGPU
sinks such an fmul into the block of its user and fuses the pair, so the
scalar form is one fma per path. Record the current behaviour, the pair
is kept scalar when the fmul is operand 0 of the fadd and paired when it
is operand 1.


  Commit: 6b85e67a473ebe127aa31b742adc1fe2d53cb5bf
      https://github.com/llvm/llvm-project/commit/6b85e67a473ebe127aa31b742adc1fe2d53cb5bf
  Author: Konstantinos Parasyris <koparasy at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
    M clang/test/CIR/CodeGenCUDA/device-stub.cu
    A clang/test/CIR/CodeGenCUDA/missing-gpubinary.cu
    A clang/test/CIR/Diagnostics/mlir-error-routing.cpp
    R clang/test/CIR/Diagnostics/mlir-error-routing.cu
    A clang/test/CIR/IR/invalid-cuda-device-binary.cir

  Log Message:
  -----------
  [CIR][CUDA] Read fat binary in CIRGen and store its bytes on the module (#225971)

Two problems with the current implementation of GPU CIR:

1. `LoweringPrepare` read the fat binary from disk, via
`astCtx->getSourceManager().getFileManager().getVirtualFileSystem()`. A
   transform pass should not do I/O, and this is one of the `ASTContext`
   dependencies that keeps the post-CIRGen pipeline from being IR-to-IR.
Some of the related discussion on this has been done
[here](https://discourse.llvm.org/t/rfc-clangir-making-cir-pipeline-boundaries-first-class-driver-artifacts/90998)
and PR: #219048
2. `#cir.cu.binary_handle` stored the *file path*. That's a build input,
not a
property of the program: it bakes one machine's directory layout into a
   `.cir`.

The PR removes the file path and adds an attribute
CIRGen now reads the file in and records the contents 
as `#cir.cu.device_binary`, a `StringAttr` of raw bytes. The
attribute is deleted once LoweringPrepare "consumes" it. 

A couple of notes:
1. The GPU dialect has a similar representation. We may want to move
towards that direction slowly, but I don't see any value doing this now.
It will confuse the direction of this PR. 
2. The test `clang/test/CIR/Diagnostics/mlir-error-routing.cu` has
completely
changed, because it relied on an error occurring when the file attribute
was missing.
Since we deleted that attribute completely, the test was failing.

---------

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 0a90c92d5285cae7f7b7ae26573e39df5898cafc
      https://github.com/llvm/llvm-project/commit/0a90c92d5285cae7f7b7ae26573e39df5898cafc
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M mlir/examples/toy/Ch4/include/toy/Ops.td
    M mlir/examples/toy/Ch5/include/toy/Ops.td
    M mlir/examples/toy/Ch6/include/toy/Ops.td
    M mlir/examples/toy/Ch7/include/toy/Ops.td
    M mlir/test/Analysis/DataFlow/test-last-modified-callgraph.mlir
    M mlir/test/Analysis/DataFlow/test-last-modified.mlir
    M mlir/test/Analysis/DataFlow/test-next-access.mlir
    M mlir/test/Analysis/DataFlow/test-strided-metadata-range-analysis.mlir
    M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
    M mlir/test/Dialect/Affine/int-range-interface.mlir
    M mlir/test/Dialect/Affine/simplify-min-max-ops.mlir
    M mlir/test/Dialect/Affine/simplify-with-bounds.mlir
    M mlir/test/Dialect/Affine/transform-op-simplify-min-max-ops.mlir
    M mlir/test/Dialect/Arith/int-range-analysis-convergence.mlir
    M mlir/test/Dialect/Arith/int-range-interface.mlir
    M mlir/test/Dialect/Arith/int-range-loop-iter-args.mlir
    M mlir/test/Dialect/Arith/int-range-narrowing.mlir
    M mlir/test/Dialect/Arith/int-range-opts-bug-119045.mlir
    M mlir/test/Dialect/Arith/int-range-opts.mlir
    M mlir/test/Dialect/GPU/int-range-interface-cluster.mlir
    M mlir/test/Dialect/GPU/int-range-interface.mlir
    M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
    M mlir/test/Dialect/MemRef/int-range-inference.mlir
    M mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
    M mlir/test/Dialect/Tensor/int-range-inference.mlir
    M mlir/test/Dialect/Vector/int-range-interface.mlir
    M mlir/test/IR/attribute.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops-invalid.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops.mlir
    M mlir/test/Transforms/loop-invariant-code-motion.mlir
    M mlir/test/Transforms/make-composed-folded-affine-apply.mlir
    M mlir/test/lib/Dialect/Test/TestDialect.td
    M mlir/test/lib/Dialect/Test/TestOps.td
    M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
    M mlir/test/mlir-tblgen/constant-str-attr-invalid.mlir
    M mlir/test/mlir-tblgen/op-format-invalid.td
    M mlir/test/mlir-tblgen/op-format.mlir
    M mlir/test/mlir-tblgen/op-format.td
    M mlir/test/mlir-tblgen/pattern.mlir
    M mlir/test/python/dialects/python_test.py
    M mlir/test/python/python_test_ops.td

  Log Message:
  -----------
  [mlir] Remove remaining strict property assembly opt-outs (#226702)

Migrate Toy, test, and Python dialect formats to use prop-dict for
inherent properties. Update assembly fixtures and expected output for
strict property printing.

Assisted-by: Codex


  Commit: 688a1498b3ce9011ee58c214086e3cd408e86f5e
      https://github.com/llvm/llvm-project/commit/688a1498b3ce9011ee58c214086e3cd408e86f5e
  Author: Amit Tiwari <Amit.Tiwari at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/lib/Sema/SemaOpenMP.cpp
    A clang/test/OpenMP/collapse_iv_width_codegen.cpp

  Log Message:
  -----------
  [Clang][OpenMP] Optimize `collapse` IV bit-width precision expression (#225612)

`collapse` used to build both a 32-bit and a 64-bit trip-count, then
keep one.

This patch does the same in `checkOpenMPLoop`:

If we know 32-bit is enough, build only 32-bit.
Else build 64-bit first.
Build 32-bit only when the product is a compile-time constant and fits.

Origin: `flatten` already builds only the width it keeps.


  Commit: e217205575ac65acd6d301b036bea8875f5eaa16
      https://github.com/llvm/llvm-project/commit/e217205575ac65acd6d301b036bea8875f5eaa16
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll

  Log Message:
  -----------
  [VPlan] Mark default value or ExtractLastActive as only first lane used. (#226153)

The default value (operand 0) of ExtractLastActive is the scalar value
of @llvm.experimental.vector.extract.last.active. Only the first lane is
used, mark accordingly.

PR: https://github.com/llvm/llvm-project/pull/226153


  Commit: f950b04465ee6a198f3fa5644e4f70711041df8a
      https://github.com/llvm/llvm-project/commit/f950b04465ee6a198f3fa5644e4f70711041df8a
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/lib/Transforms/Utils/LoopUnroll.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp

  Log Message:
  -----------
  [Transforms] Remove unused functions (NFC) (#226655)

createAnyOfReduction:
The last caller was removed on January 18, 2026 in commit
ae1bd068db293c494c4c6314da3b9d138706460d.

canHaveUnrollRemainder:
The last caller, in an assert, was removed on May 1, 2026 in commit
316f0d3bfeaf7eee7b6d4ae60d357a8216ec5264.

Assisted-by: Antigravity


  Commit: ab52e9f971d626346d70190df72636b477f6c089
      https://github.com/llvm/llvm-project/commit/ab52e9f971d626346d70190df72636b477f6c089
  Author: Yordan Vásquez <vyordangiovani at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/include/complex
    M libcxx/include/valarray
    A libcxx/test/std/numerics/complex.number/complex/complex_requires_cv_unqualified_object.verify.cpp
    A libcxx/test/std/numerics/numarray/template.valarray/valarray_requires_cv_unqualified_object.verify.cpp

  Log Message:
  -----------
  [libc++] Add static_assert diagnostics for LWG3133 named requirements (#212360)

Add a static_assert to both std::complex<T> and std::valarray<T>
requiring that T be a cv-unqualified object type that satisfies the
Cpp17DefaultConstructible, Cpp17CopyConstructible, Cpp17CopyAssignable,
and Cpp17Destructible named requirements, per the revised wording in
[numeric.requirements]. This mirrors the existing pattern already used
by std::optional<T>.

Non-_v (class-style) trait forms are used throughout so that the
assertion is well-formed even when <complex>/<valarray> are included in
C++03/11/14 mode.

Test coverage:
- A .verify.cpp for complex<T> and one for valarray<T>, each covering
six failure modes: cv-qualified types, and one type violating each of
the four named requirements individually.

Follows-up e062a29cf865bb7cadea6cb605c9f3515e5b883f.


  Commit: 5302d361339066363854a4e12e16e413af9ce1ce
      https://github.com/llvm/llvm-project/commit/5302d361339066363854a4e12e16e413af9ce1ce
  Author: geoffreygaren <ggaren at apple.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/docs/analyzer/checkers.md
    M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
    M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
    M clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp

  Log Message:
  -----------
  [WebKit Checkers] Add built-in recognition for standard view types (#226350)

libc++ doesn't fully annotate `[[clang::lifetimebound]]` for all view
types. This results in false negatives in borrow checking.

Ultimately we need to fix this in libc++, but for now we can work around
the most common / most important false negatives. For example, borrow
checking can now check

    for (auto& x : vector | std::views::reverse) { ... }

Assisted-by: Claude


  Commit: 207f7f00ced9adf54e79f2bbf2c59a485a608495
      https://github.com/llvm/llvm-project/commit/207f7f00ced9adf54e79f2bbf2c59a485a608495
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/test/Analysis/CostModel/X86/arith-fp.ll

  Log Message:
  -----------
  [CostModel][X86] arith-fp.ll - test AVX512DQ instead of AVX512BW (#226519)

AVX512DQ has instructions relevant to fp arithmetic (vXi64 fp2int in particular)


  Commit: d297af3b3d7a086d64f1477cfa682a16fcfa3260
      https://github.com/llvm/llvm-project/commit/d297af3b3d7a086d64f1477cfa682a16fcfa3260
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/LoopVectorize/AArch64/sve-induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll

  Log Message:
  -----------
  [LV] Add tests for wide induction wrap flags (NFC). (#226715)

Add tests for:
* inductions where the lane offsets may signed-overflow, even if the
scalar induction values do not,
* inductions whose increment does not directly update the phi, where the
increment's wrap flags do not apply to the induction,
* narrow inductions where the VF may exceed the signed maximum of the
induction type.


  Commit: 555d8a58b85f0cfcbad0fc7cf7b13bbef4d4ca30
      https://github.com/llvm/llvm-project/commit/555d8a58b85f0cfcbad0fc7cf7b13bbef4d4ca30
  Author: David Green <david.green at arm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h

  Log Message:
  -----------
  [AArch64] Reorganise perfect shuffle generation. NFC (#224526)

This adds a generatePerfectShuffle implementation for parsing through
the perfect shuffle tables, generating a list of ShuffleEntry's that
represent the sequence of shuffles that need to be performed. This is
intended to be a NFC as-is, allowing it to be reused in global isel and
extended in the future to handle shuffles that are not part of the
shuffle table. The number of instructions generated can also be used for
costing shuffles, as we do for immediate generation.


  Commit: 0ead65c731fa09596fbcc9b5109e504e9e7adb7e
      https://github.com/llvm/llvm-project/commit/0ead65c731fa09596fbcc9b5109e504e9e7adb7e
  Author: Michael G. Kazakov <mike.kazakov at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A libcxx/test/benchmarks/algorithms/nonmodifying/pstl.find.bench.cpp
    A libcxx/test/benchmarks/algorithms/sorting/pstl.sort.bench.cpp
    A libcxx/test/benchmarks/numeric/pstl.transform_reduce.bench.cpp

  Log Message:
  -----------
  [libc++][pstl] Add more benchmarks of the parallel algorithms (#225908)

This PR adds benchmarks of these 3 parallel algorithms:
- `std::find(policy, ...)`
- `std::sort(policy, ...)`
- `std::transform_reduce(policy, ...)`

---------

Co-authored-by: Louis Dionne <ldionne.2 at gmail.com>


  Commit: 6aefa9a60eb523ca3d8601ab69509e057730ac8d
      https://github.com/llvm/llvm-project/commit/6aefa9a60eb523ca3d8601ab69509e057730ac8d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
    M llvm/lib/Target/ARM/ARMTargetObjectFile.h
    M llvm/test/CodeGen/ARM/module-target-abi.ll

  Log Message:
  -----------
  ARM: Remove cached TargetABI from ARMBaseTargetMachine (#226482)

This cannot account for the "target-abi" module flag, so
let the uses query that. ARMElfTargetObjectFile was the one user of
this value, so this failed to respect the module flag.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>


  Commit: fc99ddb168769dd732f40b74c09f9d800c30e7e3
      https://github.com/llvm/llvm-project/commit/fc99ddb168769dd732f40b74c09f9d800c30e7e3
  Author: Alan Zhao <ayzhao at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/cmake/modules/GetLibraryName.cmake

  Log Message:
  -----------
  [cmake][Windows] Do not strip library prefixes on Windows (#226635)


  Commit: 808c726db2fe24f7ba2901f5701ae19cfe602f0a
      https://github.com/llvm/llvm-project/commit/808c726db2fe24f7ba2901f5701ae19cfe602f0a
  Author: Prajit Rahul <prajitrahul05 at gmail.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/docs/Lexicon.md

  Log Message:
  -----------
  [LLVM][Docs] Define IR in the lexicon (#221388)

Define IR in the LLVM lexicon using terminology from the LLVM Language
Reference Manual, including its SSA-based structure and three equivalent
representations.

Fixes #139867

AI Usage: ChatGPT


  Commit: 315a38a1ef3825e4e7ebe188353b4c5329751453
      https://github.com/llvm/llvm-project/commit/315a38a1ef3825e4e7ebe188353b4c5329751453
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUtils.h
    M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
    M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
    M llvm/test/Transforms/LoopVectorize/pr35773.ll
    M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
    M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll

  Log Message:
  -----------
  [VPlan] Take wide induction wrap flags from the increment of the phi. (#226726)

The binary operator of an integer InductionDescriptor is the incoming
value from the latch, which is not required to have the phi as operand.
E.g. for

  %x = add i32 %iv, 5
  %iv.next = add nuw nsw i32 %x, 1

the flags only apply to %x + 1, while the induction step is 6, and %iv +
6 may wrap even though %iv.next does not. Determine the wrap flags from
the increment of the header phi instead, and only if it adds to or
subtracts from the phi directly.


  Commit: 899d817c7950c997402cd229935cd822acf45b08
      https://github.com/llvm/llvm-project/commit/899d817c7950c997402cd229935cd822acf45b08
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/countable-early-exit-no-epilogue.ll

  Log Message:
  -----------
  [LV] Skip low-trip count logic there is no scalar tail. (#225633)

https://github.com/llvm/llvm-project/pull/195823 added logic consider
vectorization of low trip count loops if there was no or a single
iteration remaining.

This causes loops to be vectorized with a VF where no scalar tail
remains, even if it is required for legality (loop with multiple
countable exits require scalar epilogue to pick the exit).

For now, limit to cases where there's a scalar iteration remaining.

PR: https://github.com/llvm/llvm-project/pull/225633


  Commit: e0b3e4c82911376fcb2dfcbc4a3dd3f4f5891aba
      https://github.com/llvm/llvm-project/commit/e0b3e4c82911376fcb2dfcbc4a3dd3f4f5891aba
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/LoopAccessAnalysis.h
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp

  Log Message:
  -----------
  [LAA] Remove unused functions (NFC) (#226733)

Remove RuntimePointerChecking::empty and LoopAccessInfo::getNumLoads /
getNumStores, which have no callers, together with the NumLoads and
NumStores counters that were only read by the latter.


  Commit: 8c153f78f7c0a842edfee3f1601dee1776c941d6
      https://github.com/llvm/llvm-project/commit/8c153f78f7c0a842edfee3f1601dee1776c941d6
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/ScalarEvolutionExpressions.h

  Log Message:
  -----------
  [SCEV] Remove unused classof(const SCEVUse *) overloads (NFC) (#226734)

isa/cast/dyn_cast on SCEVUse go through simplify_type or CastInfo.
classof(SCEVUse) is unused.


  Commit: 7615da10b75c57286a4032eac8bb43c1b8d2ba46
      https://github.com/llvm/llvm-project/commit/7615da10b75c57286a4032eac8bb43c1b8d2ba46
  Author: Dan Salvato <dan at teamsalvato.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrArithmetic.td
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Bits/btst.ll
    M llvm/test/CodeGen/M68k/Control/cmp.ll
    M llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
    M llvm/test/CodeGen/M68k/Control/setcc.ll
    M llvm/test/CodeGen/M68k/Data/load-extend.ll
    M llvm/test/CodeGen/M68k/Data/sext-i1.ll
    M llvm/test/CodeGen/M68k/register-spills.ll

  Log Message:
  -----------
  [M68k] Finish implementation of `MOVX` (move and extend) pseudo-instructions and fix related errors (#218938)

This patch adds remaining addressing modes to the "move and extend"
pseudo-instructions, and fixes a few errors and inconsistencies in the
logic that caused inefficient code generation.

- Remaining addressing modes were implemented to match non-pseudo `MOVE`
instructions.
- Names of the pseudos now correctly reflect the register classes they
operate on, e.g. `MOVZXd32r16` for XR16 -> DR32.
- Fixed an issue where `MOVZX` could be allocated to an address
register, which has no way to zero-extend the result. (There were even
some of these in the test `register-spills.ll`, emitted as illegal
instructions, but the test doesn't have instruction verification
enabled, so it wasn't caught.)
- Fixed some `extload` patterns where the register was unnecessarily
extended to 32 bits before being truncated to its final size, causing
redundant instructions to be omitted.
- Fixed `anyext` patterns lowering to `MOVZX` instead of `MOVX`, causing
unnecessary zero-extensions.
- An inconsistency was fixed where the expansion logic would perform a
source-sized move when loading from memory, but a destination-sized move
when moving between registers. They now always perform a source-sized
move, which improves clarity in the assembly output and has more
opportunity for future optimizations.


  Commit: bf529329b5ce85d42a5c793951ec9b31100cd84e
      https://github.com/llvm/llvm-project/commit/bf529329b5ce85d42a5c793951ec9b31100cd84e
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    A clang/test/CodeGen/RISCV/lto-module-asm-abi.c
    A cross-project-tests/.clang-format
    A cross-project-tests/riscv/lit.local.cfg
    A cross-project-tests/riscv/lto-inline-asm-abi.c
    M lld/test/ELF/lto/riscv-target-abi.ll
    M llvm/test/CodeGen/RISCV/module-asm-features.ll
    M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
    M llvm/test/LTO/RISCV/module-asm.ll
    M llvm/test/MC/RISCV/mapping-across-sections.s

  Log Message:
  -----------
  [RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)

No functional change intended here, just adding test coverage for RISC-V LTO
inline assembly ABI handling (following up on
https://github.com/llvm/llvm-project/pull/223606) and for the `$x<arch>` ELF
mapping symbols emitted for module and function target features.

The `TODO`s for `.lto_discard` dropping module inline asm target features and
for the missing/duplicate `$x<arch>` mapping symbols will be addressed in the
following commits.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225129


  Commit: 22d3cccd0beaf7d2c7728d0bc6fa347283b0bc13
      https://github.com/llvm/llvm-project/commit/22d3cccd0beaf7d2c7728d0bc6fa347283b0bc13
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M cross-project-tests/riscv/lto-inline-asm-abi.c
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/test/LTO/RISCV/module-asm.ll

  Log Message:
  -----------
  [LTO] Preserve module inline asm target properties for .lto_discard and symvers (#225130)

Previously, LTO::addRegularLTO() and IRLinker::run() called
prependModuleInlineAsm() and appendModuleInlineAsm() with a plain string when
synthesizing `.lto_discard` and imported `.symver` directives, creating a new
GlobalAsmFragment with empty TargetCPU and TargetFeatures instead of preserving
the existing module inline asm's properties. Copy the front fragment's Props so
these synthesized directives are merged into the module's inline asm with the
same target features.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225130


  Commit: 0ab3502ec56a5d8330c79849945b9fefd2668f01
      https://github.com/llvm/llvm-project/commit/0ab3502ec56a5d8330c79849945b9fefd2668f01
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/test/MC/RISCV/mapping-across-sections.s

  Log Message:
  -----------
  [RISC-V][MC] Fix mapping symbol section tracking on popSection() (#225131)

Previously, RISCVELFStreamer::changeSection() saved LastEMS and LastEmittedArch
under getPreviousSection().first instead of getCurrentSection().first. When
MCStreamer::popSection() switches back to a previous section,
getPreviousSection() already points to the destination section being restored
rather than the section being exited. This clobbered the destination section's
saved mapping symbol state and caused duplicate `$x<arch>` mapping symbols to
be emitted whenever returning to `.text`.

Use getCurrentSection().first instead, matching AArch64ELFStreamer and
ARMELFStreamer.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225131


  Commit: 6eeb3b4ebdae20cd5f1e0fe5e74df3b418b654e2
      https://github.com/llvm/llvm-project/commit/6eeb3b4ebdae20cd5f1e0fe5e74df3b418b654e2
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M cross-project-tests/riscv/lto-inline-asm-abi.c
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h

  Log Message:
  -----------
  [RISC-V][MC] Update ELF streamer ArchString in setFlagsFromFeatures() (#225140)

During LTO, the TargetMachine subtarget is initialized with the linker's
default CPU (e.g. `generic-rv64`, `rv64i2p1`), while
RISCVAsmPrinter::emitStartOfAsmFile() reconstructs the module's actual ISA from
the `riscv-isa` module flag and calls RISCVTargetStreamer::setFlagsFromFeatures()
and RISCVTargetStreamer::emitTargetAttributes(). Because
RISCVTargetELFStreamer previously only initialized InitialArchString and
ArchString in its constructor rather than in setFlagsFromFeatures(), direct
object emission bypassed the update and tagged `.text` with `$xrv64i2p1`
instead of the module's full architecture string.

Move the InitialArchString and ArchString initialization into
RISCVTargetELFStreamer::setFlagsFromFeatures() and also call setArchString()
alongside emitTextAttribute(RISCVAttrs::ARCH, ...) in
RISCVTargetStreamer::emitTargetAttributes().

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225140


  Commit: 0e2ebe79f5c4ea36d7daecb76fb4867452d6973e
      https://github.com/llvm/llvm-project/commit/0e2ebe79f5c4ea36d7daecb76fb4867452d6973e
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/test/CodeGen/RISCV/module-asm-features.ll
    M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll

  Log Message:
  -----------
  [RISC-V] Update streamer ArchString in emitTargetFeaturePush() (#225133)

Previously, RISCVAsmPrinter::emitTargetFeaturePush() only emitted `.option push`
and `.option arch` without updating the streamer's active ArchString. When
emitting an ELF object file directly (`-filetype=obj`),
RISCVTargetELFStreamer::emitDirectiveOptionArch() is a no-op while
emitTargetFeaturePop() resets ArchString back to the pushed ArchString, so
module-level inline assembly and functions with custom `target-features` failed
to emit updated `$x<arch>` mapping symbols.

Call RTS.setArchString() with the parsed ISA string in emitTargetFeaturePush()
so `-filetype=obj` records the active `$x<arch>` mapping symbol alongside
`.option arch`.

This commit was created with the help of AI tools

Pull-Request: https://github.com/llvm/llvm-project/pull/225133


  Commit: b380036c75b82ab16aa988331b65cea6323091e7
      https://github.com/llvm/llvm-project/commit/b380036c75b82ab16aa988331b65cea6323091e7
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M .github/workflows/docs.yml

  Log Message:
  -----------
  [Github] Build BOLT docs on changes (#226747)

We were already set up to build the BOLT docs, but the workflow did not
actually trigger on changes to the BOLT docs specifically. This change
fixes that.


  Commit: fb9596b7117dac3a1bc680b1041464944d0caa24
      https://github.com/llvm/llvm-project/commit/fb9596b7117dac3a1bc680b1041464944d0caa24
  Author: Letu Ren <fantasquex at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    M mlir/test/Target/LLVMIR/llvmir.mlir

  Log Message:
  -----------
  [MLIR][LLVM] Produce canonical const GEP in convertGEPOp (#226699)

The DataLayout overload of ConstantExpr::getGetElementPtr is the form
that replaces typed constant GEPs. Use it for inrange GEPs and fail
translation when the indices cannot be reduced to a byte offset.

This resolves
https://github.com/llvm/llvm-project/pull/220424#discussion_r4092337505

Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>


  Commit: e54a8d183eda0097771b422399ee929a334fb0af
      https://github.com/llvm/llvm-project/commit/e54a8d183eda0097771b422399ee929a334fb0af
  Author: Alan Zhao <ayzhao at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/cmake/modules/GetLibraryName.cmake

  Log Message:
  -----------
  [cmake][Windows] Fix CMake variable (#226745)

As a follow-up fix to #226635, the variable is `WIN32` not `Win32`.


  Commit: 32ee4f7ed0ba2f169d22416c73360146153c9711
      https://github.com/llvm/llvm-project/commit/32ee4f7ed0ba2f169d22416c73360146153c9711
  Author: Craig Topper <craig.topper at sifive.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/SDPatternMatch.h

  Log Message:
  -----------
  [SDPatternMatch] Simplify EffectiveOperands and drop the template specialization. NFC (#226036)

The chain and glue operands are in fixed locations, we don't need a loop
to find them.

Use the template parameter to skip the constructor body instead of using
template specialization.


  Commit: 50f802581bd16b82bd68a9a4682cdbdc560368df
      https://github.com/llvm/llvm-project/commit/50f802581bd16b82bd68a9a4682cdbdc560368df
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M clang/include/clang/AST/APValue.h
    M clang/lib/AST/ExprConstant.cpp

  Log Message:
  -----------
  [clang][AST] Mark APValue as LLVM_ATTRIBUTE_WARN_UNUSED (#226632)


  Commit: 4c85cbebc59d62d6845ea31f649d8519813b55ff
      https://github.com/llvm/llvm-project/commit/4c85cbebc59d62d6845ea31f649d8519813b55ff
  Author: Reid Kleckner <rkleckner at nvidia.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/docs/AllocToken.md
    M clang/docs/ClangLinkerWrapper.md
    M clang/docs/ClangOffloadBundler.md
    M clang/docs/ClangTransformerTutorial.md
    M clang/docs/ControlFlowIntegrity.md
    M clang/docs/ControlFlowIntegrityDesign.md
    M clang/docs/InternalsManual.md
    M clang/docs/IntroductionToTheClangAST.md
    M clang/docs/LanguageExtensions.md
    M clang/docs/LibASTImporter.md
    M clang/docs/LifetimeSafety.md
    M clang/docs/SafeBuffers.md
    M clang/docs/ScalableStaticAnalysis/user-docs/SummaryExtraction.md
    M clang/docs/WarningSuppressionMappings.md
    M clang/docs/analyzer/checkers.md
    M clang/docs/analyzer/user-docs/Annotations.md
    M clang/docs/conf.py
    M clang/include/clang/Basic/AttrDocs.td
    M llvm/docs/SphinxQuickstartTemplate.md
    M utils/docs/llvm_sphinx/ext/absolute_links.py
    M utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md

  Log Message:
  -----------
  [docs] Replace clang.llvm.org/docs links with Sphinx links (#222507)

Use Sphinx document and option roles or project-relative links for links
within the Clang documentation. Repair stale generated-document
fragments found while validating the replacements. This ensures that
standalone documentation builds are self-contained, although
cross-project links (Clang->LLVM) typically go via absolute llvm.org
hrefs.

Part of #214861

Assisted-by: Codex


  Commit: dbea9bd01b3ffec3ff35bfacb628257db8655ee5
      https://github.com/llvm/llvm-project/commit/dbea9bd01b3ffec3ff35bfacb628257db8655ee5
  Author: Amilendra Kodithuwakku <amilendra.kodithuwakku at arm.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M bolt/docs/conf.py

  Log Message:
  -----------
  [docs][bolt] Remove Markdown enum (#226411)

Remove use of Markdown enum from the bolt docs. Related to #223829.

This should fix our ATfL build
[failure](https://github.com/arm/arm-toolchain/actions/runs/36103090912/job/107969633028#step:7:22533)
```
Traceback (most recent call last):
  File "/workspace/python/.venv/lib/python3.12/site-packages/sphinx/config.py", line 529, in eval_config_file
    exec(code, namespace)  # NoQA: S102
    ^^^^^^^^^^^^^^^^^^^^^
  File "/workspace/src/bolt/docs/conf.py", line 18, in <module>
    globals().update(common_conf(tags, markdown=Markdown.NEVER))
                                                ^^^^^^^^
NameError: name 'Markdown' is not defined
```


  Commit: 126dbd97fc5d33edf43a1fce12fb5d3ea46e5be7
      https://github.com/llvm/llvm-project/commit/126dbd97fc5d33edf43a1fce12fb5d3ea46e5be7
  Author: Alexander Richardson <alexrichardson at google.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M clang/test/CodeGen/RISCV/lto-module-asm-abi.c

  Log Message:
  -----------
  [Clang][RISC-V] Fix lto-module-asm-abi.c on non-asserts/no-lld builds (#226752)

Pass `-fno-discard-value-names` so the `entry:` label is preserved in
non-asserts builds, and drop `-fuse-ld=lld` so the driver check succeeds
on bots that do not have `ld.lld` installed.

Fixes: bf529329b5ce ("[RISC-V][LTO] Add baseline tests for LTO inline assembly and mapping symbols (#225129)")
Pull-Request: https://github.com/llvm/llvm-project/pull/226752


  Commit: 57721b7c631b3dacc8f59b2467992e3ff4866cc6
      https://github.com/llvm/llvm-project/commit/57721b7c631b3dacc8f59b2467992e3ff4866cc6
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M orc-rt/include/CMakeLists.txt
    M orc-rt/include/orc-rt-c/config.h.in
    A orc-rt/include/orc-rt-c/support/LogLevel.h
    M orc-rt/include/orc-rt-c/support/Logging.h
    M orc-rt/include/orc-rt/bedrock/Session.h

  Log Message:
  -----------
  [orc-rt] Move ORC_RT_LOG_ENABLED out of config.h; catch typos. (#226751)

Move ORC_RT_LOG_ENABLED to orc-rt-c/support/LogLevel.h so that config.h
is kept for build options only.

Switch to using function-like macros so that typos in level-names become
compilation errors.


  Commit: 689040ca0cb30b3f93edb5e51f64333b23e4610f
      https://github.com/llvm/llvm-project/commit/689040ca0cb30b3f93edb5e51f64333b23e4610f
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/TargetLoweringObjectFileImpl.h
    M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
    M llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
    M llvm/lib/Target/M68k/M68kTargetObjectFile.h

  Log Message:
  -----------
  CodeGen: Remove shadowing TargetMachine members from COFF and M68k TLOFs (#226769)

TargetLoweringObjectFile::Initialize already records the TargetMachine
in a base class field.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 9bf0c497dceba0c7eb882c0f2a96c8151ce74ae3
      https://github.com/llvm/llvm-project/commit/9bf0c497dceba0c7eb882c0f2a96c8151ce74ae3
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
    M orc-rt/lib/bedrock/ConnectorRegistry.cpp
    M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
    M orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
    M orc-rt/tools/ogre/ogre.cpp

  Log Message:
  -----------
  [orc-rt] Simplify ConnectorRegistry::connect and ogre setup. (#226772)

ConnectorRegistry::connect and ConnectorFn now take the Session and
BootstrapInfo directly, replacing the GetAttachInfo callback and the
AttachInfo struct. The callback let the Session be built lazily, after
the connector had validated its spec, but a connection can fail after
validation anyway, so callers already had to handle discarding a Session
built for a failed connection. Build the Session first, then connect.

ogre's setup is restructured to match: makeSession detects the process
info, builds a thread-pool dispatcher and the Session, adds the host
services, then connects; runOgre waits for the detach. Errors are
reported via Session::logErrors when logging is enabled.

SocketConnectorTest now connects a real Session. Its ownership test
adopts a non-stream socket, which the connector accepts and
createSimpleRemoteCAOverSocket then rejects, rather than relying on a
failing GetAttachInfo.


  Commit: 80b46c9d74a868cd20720cc7932a2f88bda43d25
      https://github.com/llvm/llvm-project/commit/80b46c9d74a868cd20720cc7932a2f88bda43d25
  Author: Letu Ren <fantasquex at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M clang/test/CIR/CodeGenBuiltins/builtin-nondeterministic-value.c

  Log Message:
  -----------
  [CIR][NFC] Add vector of boolean test to __builtin_nondeterministic_value (#219550)

Assisted-by: grok-4.6
Signed-off-by: Letu Ren <fantasquex at gmail.com>


  Commit: dfde6ac69e6e0c5a717042de3fa7f118eea7d830
      https://github.com/llvm/llvm-project/commit/dfde6ac69e6e0c5a717042de3fa7f118eea7d830
  Author: Mamadou Wane <mamadouswane at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.md
    M clang-tools-extra/test/clang-tidy/checkers/bugprone/redundant-branch-condition.cpp

  Log Message:
  -----------
  [clang-tidy] Fix redundant-branch-condition false positive in loops (#225827)

Fixes #205685.

`bugprone-redundant-branch-condition` decides whether the condition
variable changes between the outer and inner `if` by comparing source
positions. When a loop sits between the two, a mutation that comes after
the inner `if` in the source still runs before the inner condition is
evaluated again on the next iteration, so the check reports a redundant
condition that isn't, and the fix-it changes behavior.

The fix walks the parents of the inner `if` up to the outer `if` and
finds the outermost enclosing loop. If the variable is mutated anywhere
in that loop, the check does not warn. This follows NagyDonat's
suggestion in the issue: the existing check already covers mutations
between the outer condition and the loop, so only the loop itself needs
the extra query. The walk passes through declarations, so an inner `if`
inside a lambda stored in a variable is handled too, and it stops at the
enclosing function. I chose a syntactic walk instead of the CFG
(`utils::ExprSequence`), since it covers the range the issue asks for
without building a CFG on every match.

Tests cover `for`, `while`, `do`, and range-based `for`, a mutation in a
`do`/`while` condition, a lambda stored in a variable inside the loop,
and an inner loop whose enclosing loop does the mutation. Each of these
warns without the patch. Three positive cases confirm the warning is
kept when the loop never mutates the variable, when the mutation comes
after the loop, and when the loop encloses both `if` statements.

Limitations:
- Any mutation in the loop suppresses the warning, including one
followed by an exit from the loop (`break`, `return`, `throw`) or one
that cannot make the condition false. The inner condition is still
redundant in those cases; telling them apart needs the CFG. I added the
`break` case under Unhandled Cases. The change only removes warnings, so
it adds no new false positives.
- Loops built with `goto` and Objective-C `for ... in` loops are not
recognized, so the false positive remains there.

I used Claude to help write the code. I tested and reviewed all of it
myself, and worked through the approach and suggestions with Claude.


  Commit: 719341a64c02261b7b43e4aa6a25f597cca8626d
      https://github.com/llvm/llvm-project/commit/719341a64c02261b7b43e4aa6a25f597cca8626d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/TargetTransformInfo.h
    M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
    M llvm/test/Analysis/CostModel/X86/speculative-load.ll

  Log Message:
  -----------
  [TTI] Provide conservative legality + costs for @llvm.speculative.load. (#180036)

Add TTI support for @llvm.speculative.load, including cost and legaltiy
checking support.

The initial implementation for AArch64 checks if the loaded type is
<= 16 bytes, and only considers such cases legal due to MTE.

PR: 
https://github.com/llvm/llvm-project/pull/180036


Depends on https://github.com/llvm/llvm-project/pull/179642


  Commit: 6909c17f14683203621f5a3d8fbf04dfd5d9c623
      https://github.com/llvm/llvm-project/commit/6909c17f14683203621f5a3d8fbf04dfd5d9c623
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll

  Log Message:
  -----------
  [ConstraintElim] Don't request SCEV if there are no loops. (NFC) (#226736)

ConstraintElimination only uses SCEV when there are any loops. Don't
request the analysis if there are no loops.

This reduces compile-time a bit (more for workloads with large number of
functions w/o loops):

stage1-O3: -0.03%
stage1-ReleaseThinLTO: -0.04%
stage1-ReleaseLTO-g: -0.02%
stage1-aarch64-O3: -0.03%
stage2-O3: -0.04%
stage2-clang: -0.09%


https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c4453240417d8705b0752c3feda8d02365f8175c&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/226736


  Commit: 57630fd809ca4964f887dd531e1a09618d962b10
      https://github.com/llvm/llvm-project/commit/57630fd809ca4964f887dd531e1a09618d962b10
  Author: Chibuoyim (Wilson) Ogbonna <chibuoyim.faith.ogbonna at huawei.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    R clang/test/CodeGen/AArch64/sve-intrinsics/acle_sve_addv.c
    A clang/test/CodeGen/AArch64/sve/addv.c

  Log Message:
  -----------
  [clang][CIR] Add tests for SVE ADDV intrinsics (#225648)

This adds CIR tests for `svaddv` (plain SVE) intrinsics following the
task description in
[223963](https://github.com/llvm/llvm-project/issues/223963).

Moves and adapts `sve-intrinsics/acle_sve_addv.c` to `sve/addv.c`.


  Commit: 68fddbbe019b63698e9c4a898b313b9112019cab
      https://github.com/llvm/llvm-project/commit/68fddbbe019b63698e9c4a898b313b9112019cab
  Author: David Green <david.green at arm.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll

  Log Message:
  -----------
  [DAG] Scalarise trivial splat operations (#226257)

This fixes an issue reported on #224255, where a single active lane
masked store is converted to a v1f16 extract_subvector, which becomes a
v1f16 splat, which fails to scalarize. Add the necessary trivial
scalarisation of the splat by using the f16 input operand.

(I was originally going to fix this by generating a scalar f16 extract
directly (which would have the benefit of treating f16 as legal), but
that seems to cause a regression in 2 x86 tests).


  Commit: 6b51046ae30cd78fc4b26605e2dcf3b70c282f4c
      https://github.com/llvm/llvm-project/commit/6b51046ae30cd78fc4b26605e2dcf3b70c282f4c
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-gathered-leftover-leaf.ll

  Log Message:
  -----------
  [SLP]Fix erasing gathered leftover narrowed reduction leaves

A leftover narrowed reduction leaf, only gathered in the tree, loses all
users once the tree scalars are erased and is swept as a dead operand,
though the reduction epilogue still uses it. Keep such values alive.

Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5855368565

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226782


  Commit: a9407d59c4abfb8bf49da7dfcec6775707288b9e
      https://github.com/llvm/llvm-project/commit/a9407d59c4abfb8bf49da7dfcec6775707288b9e
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/include/__ostream/print.h

  Log Message:
  -----------
  [libc++] Port #200996 to ostream (#226372)

Reduces the time to compile a TU with just `#include <ostream>` from
254.7 ms ± 3.0 ms to 227.7 ms ± 2.1 ms on my system (-std=c++23, -O2,
arm64 macOS).

See #195466 for details. Without this, the call is evaluated when the
template is parsed, which evaluates format_string's consteval
constructor for "\n" in every translation unit that includes <ostream>,
even if nothing calls println().

No behavior change.


  Commit: 14df65f5db67d0096ef2360abb1e30891dae66b5
      https://github.com/llvm/llvm-project/commit/14df65f5db67d0096ef2360abb1e30891dae66b5
  Author: Leonidas Spyropoulos <artafinde at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/include/__chrono/duration.h
    M libcxx/test/std/time/months.pass.cpp
    M libcxx/test/std/time/years.pass.cpp

  Log Message:
  -----------
  [libc++][chrono] Fix years/months periods on GCC/i386 (#223669)

`static_cast<int>(365.2425 * 60 * 60 * 24)`, added in
f537b4e51822b19780386e0575ff95e82f8ec445, isn't exactly 31556952 on
every host: GCC targeting i386 folds it in x87 extended precision and
gets 31556951, making `years::period` and `months::period` coprime and
breaking `year_month` arithmetic.

Use the literal values instead, there's no readability to lose since
they were only there to avoid a template instantiation in the first
place.

Signed-off-by: Leonidas Spyropoulos <artafinde at archlinux.org>


  Commit: 0b401e859b9fec54231b11ffb39085ea02e053c0
      https://github.com/llvm/llvm-project/commit/0b401e859b9fec54231b11ffb39085ea02e053c0
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
    M llvm/lib/Target/PowerPC/PPC.h
    M llvm/tools/dsymutil/DwarfLinkerForBinary.h
    M llvm/tools/llvm-cov/CodeCoverage.cpp
    M llvm/tools/llvm-objdump/COFFDump.h
    M llvm/tools/llvm-objdump/ELFDump.h
    M llvm/tools/llvm-objdump/OffloadDump.cpp
    M llvm/tools/llvm-objdump/WasmDump.h
    M llvm/tools/llvm-profgen/PerfReader.h

  Log Message:
  -----------
  [llvm] Remove declarations without definitions (NFC) (#226764)

HexagonConstEvaluator::evaluateHexVector2: Added on July 28, 2016 in
commit 167d918225ecd05a63f6b8d449c317feda741e18 without a definition or
any callers.

initializePPCExpandISELPass: The definition and caller were removed on
August 27, 2024 in commit 8e901c255df45e38cb1d69a576804029e20868bf.

dsymutil::DwarfLinkerForBinary::createStreamer: The definition and
caller were removed on April 1, 2023 in commit
36f351098cd50809658493d9b2e22a795874bab0 (when the non-template
declaration in DwarfLinkerForBinary.h was replaced with a template
declaration without a definition).

exportCoverageDataToJson: The definition and caller were replaced with
CoverageExporterJson on January 4, 2018 in commit
1ef3a778ac47564aa5a7f04bbf572d22d1c616fb.

objdump::printCOFFFileHeader, objdump::printELFFileHeader, and
objdump::printWasmFileHeader: The definitions and callers were replaced
with Dumper::printPrivateHeaders on July 14, 2023 in commit
0af663f80da0009f6fd879cf4d41743d4c88a2db.

disassembleObject: Added on May 23, 2025 in commit
51a03ed27282166d418399f2ade9814ea5be9944 without a definition or any
callers.

sampleprof::VirtualUnwinder::recordRangeCount: The definition and
callers were removed on January 11, 2021 in commit
3869309a0c92735228afaa5663d1c10bb372bb54.

Assisted-by: Antigravity


  Commit: 1345a4fa8d60bdd33d59b7a1c0613eaef7d8e01f
      https://github.com/llvm/llvm-project/commit/1345a4fa8d60bdd33d59b7a1c0613eaef7d8e01f
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll

  Log Message:
  -----------
  [SLP][NFC]Add an extra test witj missing vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226802


  Commit: 0f5a125bad555b6bf4bb2318b9f1ea7936adf19d
      https://github.com/llvm/llvm-project/commit/0f5a125bad555b6bf4bb2318b9f1ea7936adf19d
  Author: Reid Kleckner <rkleckner at nvidia.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    A libcxx/docs/ABIGuarantees.md
    R libcxx/docs/ABIGuarantees.rst
    A libcxx/docs/AddingNewCIJobs.md
    R libcxx/docs/AddingNewCIJobs.rst
    A libcxx/docs/CodingGuidelines.md
    R libcxx/docs/CodingGuidelines.rst
    A libcxx/docs/Contributing.md
    R libcxx/docs/Contributing.rst
    A libcxx/docs/Contributing/NewStandardProcedure.md
    R libcxx/docs/Contributing/NewStandardProcedure.rst
    A libcxx/docs/Contributing/PostMeetingProcedure.md
    R libcxx/docs/Contributing/PostMeetingProcedure.rst
    A libcxx/docs/Contributing/ReleaseProcedure.md
    R libcxx/docs/Contributing/ReleaseProcedure.rst
    A libcxx/docs/DesignDocs/ABIVersioning.md
    R libcxx/docs/DesignDocs/ABIVersioning.rst
    A libcxx/docs/DesignDocs/AtomicDesign.md
    R libcxx/docs/DesignDocs/AtomicDesign.rst
    A libcxx/docs/DesignDocs/CapturingConfigInfo.md
    R libcxx/docs/DesignDocs/CapturingConfigInfo.rst
    A libcxx/docs/DesignDocs/ExperimentalFeatures.md
    R libcxx/docs/DesignDocs/ExperimentalFeatures.rst
    A libcxx/docs/DesignDocs/ExtendedCXX03Support.md
    R libcxx/docs/DesignDocs/ExtendedCXX03Support.rst
    A libcxx/docs/DesignDocs/FeatureTestMacros.md
    R libcxx/docs/DesignDocs/FeatureTestMacros.rst
    A libcxx/docs/DesignDocs/FileTimeType.md
    R libcxx/docs/DesignDocs/FileTimeType.rst
    A libcxx/docs/DesignDocs/HeaderRemovalPolicy.md
    R libcxx/docs/DesignDocs/HeaderRemovalPolicy.rst
    M libcxx/include/__configuration/abi.h

  Log Message:
  -----------
  [libc++][docs] Rename documentation files to Markdown (batch 1) (#221512)

Tracking issue: #201242
See the [migration guide] for more information. 

[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines

This is the initial straight rename commit. It will probably break the
docs build, but it has to be a separate PR for blame preservation
purposes.


  Commit: 61b428e0edfe674b84d77f7b55aa687fce3b501e
      https://github.com/llvm/llvm-project/commit/61b428e0edfe674b84d77f7b55aa687fce3b501e
  Author: Reid Kleckner <rkleckner at nvidia.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/docs/ABIGuarantees.md
    M libcxx/docs/AddingNewCIJobs.md
    M libcxx/docs/CodingGuidelines.md
    M libcxx/docs/Contributing.md
    M libcxx/docs/Contributing/NewStandardProcedure.md
    M libcxx/docs/Contributing/PostMeetingProcedure.md
    M libcxx/docs/Contributing/ReleaseProcedure.md
    M libcxx/docs/DesignDocs/ABIVersioning.md
    M libcxx/docs/DesignDocs/AtomicDesign.md
    M libcxx/docs/DesignDocs/CapturingConfigInfo.md
    M libcxx/docs/DesignDocs/ExperimentalFeatures.md
    M libcxx/docs/DesignDocs/ExtendedCXX03Support.md
    M libcxx/docs/DesignDocs/FeatureTestMacros.md
    M libcxx/docs/DesignDocs/FileTimeType.md
    M libcxx/docs/DesignDocs/HeaderRemovalPolicy.md
    M libcxx/docs/conf.py

  Log Message:
  -----------
  [libc++][docs] Convert documentation from reST to Markdown (batch 1) (#221513)

This is the first batch of changes to migrate libc++ documentation from
rst to markdown.

I use a local pixel diff tool to compare the rendered HTML, and all
diffs seem like fixes. They tend to fall into the following categories:

- dashed bullet lists were previously not rendered, but now they are
- extra indentation interpreted as blockquotes has been removed
- single backticks are now codefont spans, not italic spans

Tracking issue: #201242
See the [migration guide] for more information. 

[migration guide]:
https://llvm.org/docs/SphinxQuickstartTemplate.html#markdown-migration-guidelines
This is a stacked PR based on #221512, which will be a standalone commit
that
renames *.rst -> *.md before this PR lands for history preservation
purposes.

-----

Before/after validation links:
| Source file | Before HTML | After HTML |
| --- | --- | --- |
| `libcxx/docs/ABIGuarantees.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/before/libcxx/docs/ABIGuarantees.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/after/libcxx/docs/ABIGuarantees.html)
|
| `libcxx/docs/AddingNewCIJobs.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/before/libcxx/docs/AddingNewCIJobs.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/after/libcxx/docs/AddingNewCIJobs.html)
|
| `libcxx/docs/CodingGuidelines.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/before/libcxx/docs/CodingGuidelines.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/after/libcxx/docs/CodingGuidelines.html)
|
| `libcxx/docs/Contributing/NewStandardProcedure.md` |
[before](https://llvmdocs.staging.reidkleckner.dev/before/libcxx/docs/Contributing/NewStandardProcedure.html)
|
[after](https://llvmdocs.staging.reidkleckner.dev/after/libcxx/docs/Contributing/NewStandardProcedure.html)
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| `libcxx/docs/Contributing/PostMeetingProcedure.md` |
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  Commit: 6cff1c56d1678e3d7eb70650d1fe138eac80c05e
      https://github.com/llvm/llvm-project/commit/6cff1c56d1678e3d7eb70650d1fe138eac80c05e
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll

  Log Message:
  -----------
  [SLP]Look through truncation of shifted extracted sub-fields

The masked sub-field of the shifted truncation of a wider scalar was
matched with the truncation as its source, while the other fields
matched the scalar itself, so the gather of the fields was rejected.
The field is within the truncated bits, look through the truncation.

Fixes #74380

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226803


  Commit: 20bbd88cf9e7be286b25c29c877c2d0564da9ecf
      https://github.com/llvm/llvm-project/commit/20bbd88cf9e7be286b25c29c877c2d0564da9ecf
  Author: Guy David <guyda96 at gmail.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    A llvm/test/Transforms/SimplifyCFG/AArch64/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/RISCV/speculate-mask-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/X86/speculate-mask-phi-select-cost.ll

  Log Message:
  -----------
  [SimplifyCFG] Cost speculated selects with their real scalar condition (#217664)

`validateAndCostRequiredSelects()` priced the selects that
`speculativelyExecuteBB()` would create using
`CmpInst::makeCmpResultType(PN->getType())` as the condition type. For a
vector phi, that asks the target for the cost of a per-lane vector
select, but the select actually created uses the branch condition, which
is always a scalar `i1`.

This only changes behaviour where a target's cost model distinguishes
the two condition types. Of the targets checked, only AArch64 does.

This may worsen the compiler's output in RISC-V, X86, ARM, so no
intention to merge soon before collecting more feedback on how the
different targets should communicate this property.


  Commit: f8cfaa7dc0caf6bd51b82798718c51ac3fd68c12
      https://github.com/llvm/llvm-project/commit/f8cfaa7dc0caf6bd51b82798718c51ac3fd68c12
  Author: Jake Egan <Jake.egan at ibm.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/test/configs/ibm-libc++-shared.cfg.in

  Log Message:
  -----------
  [libc++][AIX] Add system library path via blibpath for lldb (#223837)

On AIX some tools we use for testing libc++, like lldb, are linked
against the system libc++, which has additional members (e.g
`shr2_64.o`) that the newly built libc++.a doesn't have. But the current
test harness set the `LIBPATH` to point at the newly built libc++, which
can load break these tools.

This change removes the `LIBPATH` and instead sets the `blibpath`
(equivalent to rpath on other systems), which helps lldb find the system
libc++.a, while still running the tests against the libc++ build under
test.


  Commit: db9f06ce021c54523afc8bf9d0cfe45aba2eba09
      https://github.com/llvm/llvm-project/commit/db9f06ce021c54523afc8bf9d0cfe45aba2eba09
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
    M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp

  Log Message:
  -----------
  Remove cl::callback from AArch64CodeLayoutOpt and AddressSanitizer (#226757)

cl::callback will be removed to enable migration to TableGen based
representation

LLM-aided


  Commit: 8e6f2603dc5d4a93400aa8ba28ea624644be0c9a
      https://github.com/llvm/llvm-project/commit/8e6f2603dc5d4a93400aa8ba28ea624644be0c9a
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/include/llvm/ADT/DenseMap.h
    M llvm/include/llvm/ADT/DenseMapInfo.h
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/DenseMap.cpp
    M llvm/unittests/ADT/DenseMapTest.cpp
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn

  Log Message:
  -----------
  [DenseMap] Share rehash and grow for relocatable bucket types. NFC (#225018)

DenseMap is heavily instantiated and moveFrom and grow are among the
largest code families. For trivially copy constructible and destructible
bucket types (also satisfied by std::pair), call an out-of-line
`growRelocatable` with size/align/hasher (dictionary passing style).

A pointer key hashed by its value hashes inline, which a null
BucketHasher asks for, sparing a call per entry.
DenseMapInfo<T *>::PointerValueHash names the class declaring it, so an
info that specializes or inherits it to hash the pointee -- Attributor's
InstExclusionSet, VPCSEDenseMapInfo, MachineInstrExpressionTrait --
keeps its own hash. Any other key hashes through a thunk, one per
(KeyT, KeyInfoT) whatever the map's value type.

SmallDenseMap's in-place rehash for remove_if shares the loop through
`rehashRelocatable`. It rehashes once rather than into a temporary map
and back, which can reorder a probe chain that wraps around the table.

Building clang takes 0.86% fewer instructions and the binary is 0.64%
smaller.

Aided by Opus 5


  Commit: 9e44a6664500bcc01fb9ddc35710b4d0fd748b06
      https://github.com/llvm/llvm-project/commit/9e44a6664500bcc01fb9ddc35710b4d0fd748b06
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll

  Log Message:
  -----------
  [SLP][NFC]Add extra tests with incorrect vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226827


  Commit: eea552937b1e30c8b74bf3748cccab1357dd0d57
      https://github.com/llvm/llvm-project/commit/eea552937b1e30c8b74bf3748cccab1357dd0d57
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll

  Log Message:
  -----------
  [SLP]Fix reused scales for sub-fields gathered in natural order

The reduction root sub-fields were emitted in the natural order, but the
reused values were scaled by the original lane order. Reorder the root
scalars instead.

Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5858504241

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226828


  Commit: d0ea8a8e46091f71684091f48412ce500165d76f
      https://github.com/llvm/llvm-project/commit/d0ea8a8e46091f71684091f48412ce500165d76f
  Author: Martin Storsjö <martin at martin.st>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/unittests/Support/LLVMToolSession/LLVMToolSessionTest.cpp

  Log Message:
  -----------
  [unittests] Fix a recent test on Windows with LLVM_WINDOWS_PREFER_FORWARD_SLASH (#224963)

This fixes errors like these:
```
Expected equality of these values:
  Context.Path
    Which is: "D:/a/llvm-mingw/llvm-mingw/llvm-project/build/unittests/Support/LLVMToolSession/./LLVMToolSessionTests.exe"
  ExecutablePath.c_str()
    Which is: "D:\\a\\llvm-mingw\\llvm-mingw\\llvm-project\\build\\unittests\\Support\\LLVMToolSession\\.\\LLVMToolSessionTests.exe"
```


  Commit: df7a21f8210426653d12c50475651c4d7518b804
      https://github.com/llvm/llvm-project/commit/df7a21f8210426653d12c50475651c4d7518b804
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h

  Log Message:
  -----------
  [LV] Remove EpilogueLoopVectorizationInfo::EpilogueUF (NFC). (#226792)

The epilogue vector loop is always unrolled by 1: the only construction
site passes 1 and the constructor asserted it. Drop the field and use 1
directly at its users, and drop the now always 1 EpilogueUF parameter of
addMinimumVectorEpilogueIterationCheck.

Clean-up in preparation for removing/simplifying
EpilogueLoopVectorizationInfo.


  Commit: d8b43a8db3cd5314e5c9cc51af04fca342715187
      https://github.com/llvm/llvm-project/commit/d8b43a8db3cd5314e5c9cc51af04fca342715187
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    A llvm/test/CodeGen/Mips/target-abi-module-flag.ll

  Log Message:
  -----------
  Mips: Properly account for target-abi in subtarget construction (#226721)


  Commit: 5ad4959a040a6e31eba7ab46f3bf4fd41cd224dc
      https://github.com/llvm/llvm-project/commit/5ad4959a040a6e31eba7ab46f3bf4fd41cd224dc
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/NestedNameSpecifierBase.h
    M clang/lib/AST/NestedNameSpecifier.cpp

  Log Message:
  -----------
  [clang] Unique NamespaceAndPrefixStorages with a UniquingSet (NFC) (#224221)

This patch migrates NamespaceAndPrefixStorages in ASTContext from
llvm::FoldingSet to llvm::UniquingSet.

NamespaceAndPrefixStorage keys on a pair of const NamespaceBaseDecl *
and NestedNameSpecifier.  Switching to UniquingSet allows us to look
up storages with a typed key, eliminating FoldingSetNodeID
serialization at lookup sites and removing
NamespaceAndPrefixStorage::Profile.

Assisted-by: Antigravity


  Commit: 15eef1398e36befcaaf6cc19872805f6eb3ae5a4
      https://github.com/llvm/llvm-project/commit/15eef1398e36befcaaf6cc19872805f6eb3ae5a4
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.h
    M llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
    M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
    M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp

  Log Message:
  -----------
  [ORC] Call Perf/VTune support wrappers through Proxies (#226677)

Hold PerfSupportPlugin's start/end registration wrappers and
VTuneSupportPlugin's unregister wrapper as Proxy members, replacing
their callSPSWrapper calls. Each proxy is built in the constructor from
the address it already takes, so the constructor signatures are
unchanged. The Perf impl and VTune register wrappers are only used as
alloc-action tags and stay ExecutorAddrs.


  Commit: dbde1428562362792d85cb9bbb58415f1b21cb48
      https://github.com/llvm/llvm-project/commit/dbde1428562362792d85cb9bbb58415f1b21cb48
  Author: Jared Wyles <jared.wyles at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
    M orc-rt/test/regression/lit.cfg.py

  Log Message:
  -----------
  [orc-rt] Fixing linux tests to enable CI (#226766)


  Commit: a432c764f54c72f60bb1c2df0c050e5cc29db2dd
      https://github.com/llvm/llvm-project/commit/a432c764f54c72f60bb1c2df0c050e5cc29db2dd
  Author: Ben Shi <2283975856 at qq.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86RegisterInfo.td

  Log Message:
  -----------
  [X86][NFC] Simplify definition of TMM registers (#226779)


  Commit: 6c75b015778cdb22d688d6c6f6e40ccb6d9eb352
      https://github.com/llvm/llvm-project/commit/6c75b015778cdb22d688d6c6f6e40ccb6d9eb352
  Author: Letu Ren <fantasquex at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/test/Dialect/LLVMIR/roundtrip.mlir
    M mlir/test/Target/LLVMIR/Import/intrinsic.ll
    M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir

  Log Message:
  -----------
  [mlir][LLVM] Add smulh and umulh intrinsics. (#226776)

Assisted-by: grok-4.7
Signed-off-by: Letu Ren <fantasquex at gmail.com>


  Commit: cef4b65cbd0d960b7ab8aa19654be28f5a5f830e
      https://github.com/llvm/llvm-project/commit/cef4b65cbd0d960b7ab8aa19654be28f5a5f830e
  Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll

  Log Message:
  -----------
  [AMDGPU][InstCombine] Fold zero dot operands to accumulator (#225003)

Fold AMDGPU dot intrinsics when either operand is zero.

`dot(a, 0) = 0` and `dot(0, b) = 0`, so replace the intrinsic with its
accumulator.
This avoids unrelated clamp and add/sub reassociation cases.


  Commit: 373c54d763c98487df27599247412f80d933e177
      https://github.com/llvm/llvm-project/commit/373c54d763c98487df27599247412f80d933e177
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
    M orc-rt/test/tools/orc-rt-process-info-check.cpp

  Log Message:
  -----------
  [orc-rt] Prefix test tool output, update test. (#226862)

Prefix the triple, page-size, and cpu-features lines of the
orc-rt-process-info-check. The prefixes can be used to ensure that the
test doesn't try to match patterns against the wrong lines.

Also relaxes the feature string check to allow an empty feature string.


  Commit: 795457f653fb5e9f769678ed025ecb63d7bfbf53
      https://github.com/llvm/llvm-project/commit/795457f653fb5e9f769678ed025ecb63d7bfbf53
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/BinaryFormat/ELF.h
    M llvm/include/llvm/Object/ELFTypes.h
    M llvm/lib/MC/ELFObjectWriter.cpp

  Log Message:
  -----------
  [MC] Add ELF::getSymbolInfo and fix bitwise OR between enumeration types. NFC (#226860)

`ELF::STT_FILE | ELF::STB_LOCAL` puts the binding in the type bits,
which only works because STB_LOCAL is 0.

It combines enumerators from two distinct unnamed enums, which is
deprecated in C++20 and ill-formed in C++26 (P2864R2).


  Commit: d34c0c8bdcd3c718eb1f4b125a44bd3863dd3ef6
      https://github.com/llvm/llvm-project/commit/d34c0c8bdcd3c718eb1f4b125a44bd3863dd3ef6
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
    M orc-rt/test/regression/lit.cfg.py

  Log Message:
  -----------
  [orc-rt] Rename os-version substitution. (#226863)

This substitution is available and being tested on all platforms. It's
currently only populated on Darwin, but may be useful on other
platforms, so rename it to reflect its role.


  Commit: 372dc97670f7b3ce422dc26e5f626b2711426e8d
      https://github.com/llvm/llvm-project/commit/372dc97670f7b3ce422dc26e5f626b2711426e8d
  Author: ykiko <ykiko at clice.io>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M libcxx/include/__format/buffer.h
    A libcxx/test/std/utilities/format/format.functions/bug_154670.pass.cpp

  Log Message:
  -----------
  [libc++][format] Don't leave the output buffer full after a bulk write (#226791)

__output_buffer::push_back writes a code unit before it makes room, so
the buffer must always have a free one. __copy, __transform and __fill
write in chunks of the available space and could end with the buffer
full. Formatting into a back_insert_iterator of a string, vector or
deque goes through a 256 code unit buffer, so an argument or fill whose
length is a multiple of 256, followed by a literal, wrote that literal
past the end of the buffer.

Make room in a full buffer at the end of these functions, as push_back
does.

Fixes #154670


  Commit: 6bc9070d58e6b1396f380fcc48234e49ede900f8
      https://github.com/llvm/llvm-project/commit/6bc9070d58e6b1396f380fcc48234e49ede900f8
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M clang/lib/Sema/SemaOverload.cpp

  Log Message:
  -----------
  [clang] clang-format two constructors (#226737)

I'd like to change these two in a patch, and the diff looks a bit
confusing since they aren't formatted yet. So format them in a prep
commit to make the diff clearer.

No behavior change.


  Commit: af39a0147d97320ccf9de1ca4a58f92a519ecbff
      https://github.com/llvm/llvm-project/commit/af39a0147d97320ccf9de1ca4a58f92a519ecbff
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
    M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn

  Log Message:
  -----------
  [gn build] Port ea0493b90c03 (#226870)


  Commit: 3e36b024db71848df98de3124953316c49dd9131
      https://github.com/llvm/llvm-project/commit/3e36b024db71848df98de3124953316c49dd9131
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn

  Log Message:
  -----------
  [gn build] Port 7e91ef5d6aea (#226869)


  Commit: fb720063a6a01d1d31c8ac1b9318e5259110be58
      https://github.com/llvm/llvm-project/commit/fb720063a6a01d1d31c8ac1b9318e5259110be58
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/test/regression/README.md
    M orc-rt/test/regression/jit-free-foundations/lit.local.cfg
    M orc-rt/test/regression/languages/c/lit.local.cfg
    M orc-rt/test/regression/languages/c/return-zero.c
    M orc-rt/test/regression/lit.cfg.py
    M orc-rt/test/regression/object-formats/lit.local.cfg
    M orc-rt/test/regression/object-formats/mach-o/arm64/return-zero.s

  Log Message:
  -----------
  [orc-rt] Rename lit %{jit} substitution to %{obj-jit}. (#226867)

This substitution jit-loads object files via llvm-jitlink. Future tests,
e.g. for lazy compilation, may want to JIT from other representations
and will need different substitutions. Rename now to make the intent
clear and save us renaming later.


  Commit: c52392a6f464e5aa6bff198e4056ca58e43e0656
      https://github.com/llvm/llvm-project/commit/c52392a6f464e5aa6bff198e4056ca58e43e0656
  Author: aokblast <aokblast at FreeBSD.org>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Opcodes.td
    M clang/lib/AST/ExprConstant.cpp
    A clang/test/SemaCXX/new-nothrow-by-value.cpp

  Log Message:
  -----------
  [Clang][ExprConst] Drop PRValue for nothrow new (#226753)

A user defined operator new can accept prvalue for nothrow. However, it
should not be a ConstExpr. Early returns by
isUsableAsGlobalAllocationFunctionInConstantEvaluation instead of doing
LValue evaluation.
Also, move CheckPlacement new logic into new OpCode. This decouples
checking from Interp.cpp to Compiler.cpp.


  Commit: b1f5907d79d1d52ca5e938875ca4018ed6fb8bd7
      https://github.com/llvm/llvm-project/commit/b1f5907d79d1d52ca5e938875ca4018ed6fb8bd7
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp

  Log Message:
  -----------
  [llvm-jitlink] Call __orc_rt_run_program_wrapper through a Proxy (#226859)

Replace runWithRuntime's callSPSWrapper call with a Proxy.


  Commit: bebb7fe62f8883d822f084687cfb84c5cfe12bbb
      https://github.com/llvm/llvm-project/commit/bebb7fe62f8883d822f084687cfb84c5cfe12bbb
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/AST/APValue.h
    M clang/include/clang/AST/CharUnits.h
    M clang/lib/AST/APValue.cpp
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ExprConstant.cpp

  Log Message:
  -----------
  [clang][NFC] Pass/Return `CharUnits` by value (#226115)

`CharUnits` is just an `int64_t`, but passed around by const reference
for some reason.

Also update the `CharUnits` documentation since we touch most of the
lines anyway (due to clang-format).


  Commit: b1f66905515904d048c9c53e92b1c0d2423aca19
      https://github.com/llvm/llvm-project/commit/b1f66905515904d048c9c53e92b1c0d2423aca19
  Author: Sairudra More <sairudra60 at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M flang/docs/OpenMPSupport.md
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    A flang/test/Integration/OpenMP/allocate-clause-equivalence.f90
    A flang/test/Integration/OpenMP/scope-allocate-clause.f90
    M flang/test/Lower/OpenMP/Todo/allocate-clause-unsupported.f90
    A flang/test/Lower/OpenMP/Todo/scope-allocate-clause-unsupported.f90
    M flang/test/Lower/OpenMP/scope.f90
    M flang/test/Lower/OpenMP/target-scope.f90
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
    M mlir/test/Dialect/OpenMP/invalid.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Target/LLVMIR/openmp-allocate-clause.mlir
    A mlir/test/Target/LLVMIR/openmp-scope-allocate-clause.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir

  Log Message:
  -----------
  [flang][OpenMP] Support allocate clauses on scope constructs (#221229)

Flang already lowers OpenMP 5.2 `allocate` clauses on `scope` constructs
to `omp.scope`, but LLVM IR translation previously rejected them.

This change maps allocation operands to their corresponding private or
firstprivate slots and reuses the existing allocator-backed
private-storage and OpenMPIRBuilder allocation/free paths.

Support is currently limited to host-side fixed-size intrinsic scalar
private and firstprivate variables, including SAVE variables and
individually listed COMMON-block members. Arrays, descriptors, pointers,
allocatables, derived types, named COMMON-block list items, and
target/device allocation remain unsupported.


  Commit: a98dcad4fed01b7d1d2f3a5306a30d658059c431
      https://github.com/llvm/llvm-project/commit/a98dcad4fed01b7d1d2f3a5306a30d658059c431
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/include/llvm/ADT/DenseMap.h
    M llvm/utils/LLVMVisualizers/llvm.natvis
    M llvm/utils/gdb-scripts/prettyprinters.py
    M llvm/utils/lldbDataFormatters.py

  Log Message:
  -----------
  [ADT] Extract DenseMapStorage from DenseMap (NFC) (#226664)

This patch extracts the bucket and occupancy storage management from
DenseMap into a new helper class, densemap::detail::DenseMapStorage,
and updates DenseMap to use it via composition.

DenseMapBase::Rep is also moved to densemap::detail::StorageRep so
that DenseMapStorage::getRep() can return it directly.

This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255).  I'm planning to post a similar patch for
SmallDenseMap before actually removing CRTP.


  Commit: 4564e3842abad0130a6dba143e91307e1336224e
      https://github.com/llvm/llvm-project/commit/4564e3842abad0130a6dba143e91307e1336224e
  Author: Jared Wyles <jared.wyles at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
    M orc-rt/tools/ogre/CMakeLists.txt

  Log Message:
  -----------
  [orc-rt] add stub for windows socket support. (#226855)


  Commit: e50507339d91208da79b28f70d4f927828bb7d29
      https://github.com/llvm/llvm-project/commit/e50507339d91208da79b28f70d4f927828bb7d29
  Author: Mend Renovate <bot at renovateapp.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M .github/workflows/bazel-checks.yml
    M .github/workflows/build-ci-container-tooling.yml
    M .github/workflows/build-ci-container-windows.yml
    M .github/workflows/build-ci-container.yml
    M .github/workflows/build-libc-container.yml
    M .github/workflows/build-metrics-container.yml
    M .github/workflows/check-ci.yml
    M .github/workflows/ci-post-commit-analyzer.yml
    M .github/workflows/commit-access-review.yml
    M .github/workflows/compiler-rt-libc-builtins-tests.yml
    M .github/workflows/docs.yml
    M .github/workflows/email-check.yaml
    M .github/workflows/get-llvm-version/action.yml
    M .github/workflows/gha-codeql.yml
    M .github/workflows/hlsl-test-all.yaml
    M .github/workflows/ids-check.yml
    M .github/workflows/issue-release-workflow.yml
    M .github/workflows/issue-write.yml
    M .github/workflows/libc-freebsd-vm-tests.yml
    M .github/workflows/libc-fullbuild-tests.yml
    M .github/workflows/libc-overlay-tests.yml
    M .github/workflows/libc-shared-tests.yml
    M .github/workflows/libclang-abi-tests.yml
    M .github/workflows/libcxx-benchmark-commit.yml
    M .github/workflows/libcxx-benchmark-cron.yml
    M .github/workflows/libcxx-build-containers.yml
    M .github/workflows/libcxx-pr-benchmark.yml
    M .github/workflows/libcxx-pr-check-generated-files.yml
    M .github/workflows/libcxx-pr-conformance-tests.yaml
    M .github/workflows/libcxx-pr-test-tools.yml
    M .github/workflows/lldb-pylint-action.yml
    M .github/workflows/llvm-abi-tests.yml
    M .github/workflows/llvm-bugs.yml
    M .github/workflows/mlir-spirv-tests.yml
    M .github/workflows/new-prs.yml
    M .github/workflows/pr-code-format.yml
    M .github/workflows/pr-code-lint.yml
    M .github/workflows/premerge.yaml
    M .github/workflows/prune-branches.yml
    M .github/workflows/release-asset-audit.yml
    M .github/workflows/release-binaries.yml
    M .github/workflows/release-documentation.yml
    M .github/workflows/release-llvm-testing-tools.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml
    M .github/workflows/scorecard.yml
    M .github/workflows/spirv-tests.yml
    M .github/workflows/sycl-tests.yml
    M .github/workflows/test-suite.yml
    M .github/workflows/test-unprivileged-download-artifact.yml
    M .github/workflows/upload-release-artifact/action.yml
    M .github/workflows/version-check.yml
    M .github/workflows/zizmor.yml

  Log Message:
  -----------
  Update [Github] Update GHA Dependencies to v7 (#226858)

This PR contains the following updates:

| Package | Type | Update | Change |
|---|---|---|---|
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v6.0.3` → `v7.0.1` |
| [actions/checkout](https://redirect.github.com/actions/checkout) |
action | major | `v6.0.2` → `v7.0.1` |
| [actions/labeler](https://redirect.github.com/actions/labeler) |
action | major | `v6.2.0` → `v7.0.0` |
| [actions/setup-node](https://redirect.github.com/actions/setup-node) |
action | major | `v6.5.0` → `v7.0.0` |
|
[actions/setup-python](https://redirect.github.com/actions/setup-python)
| action | major | f |


  Commit: e7dc4d6436526c4c7b31afec47a47530d98a6801
      https://github.com/llvm/llvm-project/commit/e7dc4d6436526c4c7b31afec47a47530d98a6801
  Author: Pavel Labath <pavel at labath.sk>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M libc/src/__support/OSUtil/linux/syscall_wrappers/close.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/dup.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/dup2.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/dup3.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/fcntl.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/fsync.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/ftruncate.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/lseek.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/memfd_create.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/read.h
    M libc/src/__support/OSUtil/linux/syscall_wrappers/write.h

  Log Message:
  -----------
  [libc] Migrate file I/O syscall wrappers to syscall_checked (#226477)

Migrate a batch of related file descriptor and core I/O syscall wrappers
to use syscall_checked instead of manual syscall_impl error checking.

While in there:
- update file headers to the new style
- reformat includes into a single block so clang-format can sort them

Assisted-by: Gemini


  Commit: be628f333947bf070839e6706f6701099e0c83eb
      https://github.com/llvm/llvm-project/commit/be628f333947bf070839e6706f6701099e0c83eb
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M libcxx/utils/ci/docker/linux-builder.dockerfile

  Log Message:
  -----------
  [libcxx] Still use CMake 3.31 in the CI image (#226749)

This ensures support with the minimum supported version rather than what
26.04 ships with by default (4.2.3).


  Commit: 70f22b8e024924ff69674da78a61da4c200b0e3c
      https://github.com/llvm/llvm-project/commit/70f22b8e024924ff69674da78a61da4c200b0e3c
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir

  Log Message:
  -----------
  CodeGen: Fix SplitCriticalEdge using wrong VNInfo for subranges (#226214)

This fixes verifier errors when LiveIntervals is run before phi
elimination.

When extending a live interval across a newly split critical edge for a
PHI source operand, the subrange segments were added using the VNInfo of
the main range instead of the subrange's own value. Look up the
subrange's value at the predecessor's last index, as the other subrange
loop in the same function already does, and skip subranges with no value
there.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 7cb518a5a1acf0c2c1df7b5ed207518c45046916
      https://github.com/llvm/llvm-project/commit/7cb518a5a1acf0c2c1df7b5ed207518c45046916
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CodeGen/AsmPrinter.h
    M llvm/include/llvm/CodeGen/BasicTTIImpl.h
    M llvm/include/llvm/CodeGen/TargetLowering.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64TargetMachine.h
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/AVR/AVRTargetMachine.h
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
    M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/PowerPC/PPCTargetMachine.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.h
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
    M llvm/lib/Target/VE/VEISelLowering.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h

  Log Message:
  -----------
  TargetMachine: Remove pointer-size query methods (#226404)

Remove the shim methods from the TargetMachine's copy of the DataLayout, 
which will soon be eliminated. The Module owns the authoritative DataLayout, 
so callers should read the value from the contextual Module.

Completely unreasonably, Mips's ABI name can change the pointer size which
we probably should just not support. Many other triple checks will never be 
correct. This avoids potential mismatches in these contexts, but I still expect
this to be widely broken.

Some of the TargetLowering constructor changes and AMDGPULegalizerInfo
changes are kind of annoying. We could pass in the DataLayout through the 
subtarget constructors but it didn't seem worth the effort and the information 
should be derivable from the triple anyway.

Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>


  Commit: ee28ae7685e567d56e9ebb15ac4daf451d43f998
      https://github.com/llvm/llvm-project/commit/ee28ae7685e567d56e9ebb15ac4daf451d43f998
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/tools/ogre/ogre.cpp

  Log Message:
  -----------
  [orc-rt] Add comments to the ogre utility. NFC. (#226900)


  Commit: 55f6f9304fff9a69373d6703d782b8e401d0af86
      https://github.com/llvm/llvm-project/commit/55f6f9304fff9a69373d6703d782b8e401d0af86
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M orc-rt/cmake/OrcRTTesting.cmake
    M orc-rt/test/regression/README.md
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-pointer-in-data.c
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-store.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-array-element-load.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-data-load.c
    M orc-rt/test/regression/languages/c/lit.local.cfg
    M orc-rt/test/regression/lit.cfg.py

  Log Message:
  -----------
  [orc-rt] Add initial C addressing regression tests. (#226901)

Add tests that check that JIT'd C code can address data, both in the
same object and in other objects. Each test covers a single construct
(e.g. a load of static data, or a pointer to an array element in another
object stored in initialized data), since linker/loader bugs usually
crash the JIT'd program, and a crash identifies only the failing test.
Each test runs at -O0 and -O2.

To support multi-object tests, add a split-file substitution and lit
feature, and accept .test files in languages/c.

Update the README's test conventions to match: one construct per test,
"Check that" and "Stresses:" header comments, -O0 and -O2 RUN lines, and
guidance on keeping constructs alive under optimization without hiding
the optimized lowering.

Assisted-by: Claude


  Commit: bbbfd872877d184d6a5bd0d2a5322c9fe8387648
      https://github.com/llvm/llvm-project/commit/bbbfd872877d184d6a5bd0d2a5322c9fe8387648
  Author: Lang Hames <lhames at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/docs/ORCv2.md
    M llvm/include/llvm/ExecutionEngine/Orc/Core.h
    M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
    M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp

  Log Message:
  -----------
  [ORC] Remove callSPSWrapper, callSPSWrapperAsync, and callWrapper (#226893)

All in-tree callers now use Proxy. Remove the SPS convenience call
methods from ExecutionSession and ExecutorProcessControl, along with the
unit tests that exercised them (Proxy dispatch is covered by
SPSProxySpecTest). Also remove the blocking callWrapper convenience
methods, which have no remaining users.

Add a "How to call functions in the executor" section to
llvm/docs/ORCv2.md describing Proxy, controller-interface descriptors
and sps::ProxySpec, how lookupAndApply and recordProxy resolve proxies,
and how to migrate from callSPSWrapper.

Clients calling these methods directly should migrate to Proxy; see "How
to call functions in the executor" in llvm/docs/ORCv2.md.


  Commit: 10cd57a6f616dc4836ef572399410d62b16f701d
      https://github.com/llvm/llvm-project/commit/10cd57a6f616dc4836ef572399410d62b16f701d
  Author: Fangrui Song <i at maskray.me>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/CGData/CodeGenData.h
    M llvm/include/llvm/CGData/CodeGenDataReader.h
    M llvm/lib/CGData/CodeGenData.cpp
    M llvm/lib/CGData/CodeGenDataReader.cpp
    M llvm/lib/LTO/LTO.cpp
    M llvm/tools/llvm-cgdata/llvm-cgdata.cpp

  Log Message:
  -----------
  [CGData] Stop exporting cl::opts. NFC (#226861)

LTO reads `-codegen-data-thinlto-two-rounds` through
`extern cl::opt<bool> CodeGenDataThinLTOTwoRounds`, and llvm-cgdata
assigns
`IndexedCodeGenDataLazyLoading`, exported from CodeGenDataReader.h. Add
`cgdata::thinLTOTwoRounds()` for LTO, and pass lazy loading to
`CodeGenDataReader::create` as a parameter, so that the options can be
file-local.

Aided by Opus 5.5


  Commit: 4362da25049882128f50a0f6b4fb69c1a0f8fd57
      https://github.com/llvm/llvm-project/commit/4362da25049882128f50a0f6b4fb69c1a0f8fd57
  Author: Pankaj Dwivedi <pankajkumar.divedi at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir

  Log Message:
  -----------
  [AMDGPU] Add wait states between different MFMAs sharing an accumulator (#218363)

A full-register src2/C read after an MFMA write emits no wait states,
relying on accumulator forwarding that only works while the chain stays
on one MFMA. Two different MFMAs sharing an accumulator instead need the
wait states of a partial overlap: on gfx950, v_mfma_f32_16x16x32_f16
then
v_mfma_f32_16x16x16_f16 on the same tuple needs 5 and got none. Compare
canonicalized opcodes so mac and register-bank forms still match.

Assisted-by: Claude Opus 5


  Commit: 7a931b5ec3f305a51f702cb0702d2a07f7e74c0b
      https://github.com/llvm/llvm-project/commit/7a931b5ec3f305a51f702cb0702d2a07f7e74c0b
  Author: Kiroo (Chanung) <ung at zlfn.space>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp

  Log Message:
  -----------
  [GlobalISel] Use getCmpLibcallReturnType() for FCMP libcalls (NFC) (#226813)

The GCC soft-float comparison routines return `CMPtype`, not always
`i32`.


https://gcc.gnu.org/onlinedocs/gccint/Soft-float-library-routines.html#Comparison-functions-1
> 3.2.3 Comparison functions
> There are two sets of basic comparison functions.
> ...
> Runtime Function: CMPtype __unordsf2 (float a, float b)
> Runtime Function: CMPtype __unorddf2 (double a, double b)
> Runtime Function: CMPtype __unordtf2 (long double a, long double b)
> ...

The FCMP libcall result was hardcoded to i32. Use
`getCmpLibcallReturnType()`, as SelectionDAG does.

NFC for in-tree targets.

Co-authored-by: Thorbjørn Ravn Andersen <tra at ravnand.dk>


  Commit: 8fe3fdd6630e04b48dd8253894a8d4ba429e4663
      https://github.com/llvm/llvm-project/commit/8fe3fdd6630e04b48dd8253894a8d4ba429e4663
  Author: Oliver Hunt <oliver at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    A llvm/test/Assembler/invalid-diexpression-arg-negative.ll
    A llvm/test/DebugInfo/AArch64/dbg-value-arg-index-out-of-range.ll
    A llvm/test/Transforms/HotColdSplit/split-out-dbg-val-arglist.ll
    A llvm/test/Verifier/dbg-record-expression-arg-out-of-range.ll

  Log Message:
  -----------
  [CodeExtractor][Verifier] Fix OoB read when a DIExpression is used multiple times (#226857)

#224360 made fixupDebugInfoPostExtraction reuse the existing
DIExpression, but this is not sound if the expression is referenced
multiple times, as occurs with cold/hot code splitting.

This PR is the trivial fix of restricting this change to only apply if
there is a single user of the expression.

I've also added an additional verifier guard to capture these failures.

Fixes #226848

AI usage: Claude used to find a way to construct
dbg-value-arg-index-out-of-range.ll so that I could add a verifier guard
that bypassed the other existing verifier guards.


  Commit: cb9ee31ad93d35af0ee9172cd368dd537546a8d6
      https://github.com/llvm/llvm-project/commit/cb9ee31ad93d35af0ee9172cd368dd537546a8d6
  Author: jeanPerier <jperier at nvidia.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M flang/include/flang/Optimizer/Transforms/Passes.td
    M flang/lib/Optimizer/Transforms/CMakeLists.txt
    M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
    A flang/test/Transforms/licm-acc-captured-ref.fir
    A flang/test/Transforms/licm-acc-compute-only.fir
    A flang/test/Transforms/licm-scope.fir

  Log Message:
  -----------
  Reland [flang] Support scoped LICM and OpenACC capture provenance (#225401)  (#226909)

Follow compute-region capture operands when checking whether scalar and
scalar-descriptor loads are safe to speculate. Preserve the existing
optional, array-element, and loop-modification safety checks.

Add an optional only-inside operation-name selector while retaining
function-scoped alias analysis. Resolve the name once per function and
compare interned operation names during ancestor traversal. The default
continues to select all loops. An explicit name selects loops with a
matching ancestor within the function, including the function itself.

Cover capture safety, host exclusion, non-OpenACC and nested scopes,
loop boundaries, unmatched names, and the function boundary.

The motivation for this is to allow running LICM only on device relevant
loop at O0.

Reland #225401 with CMakeFiles.txt change to fix shared library builds.


  Commit: 084a4e6002a9b718adb31dd906b233cafd3a9814
      https://github.com/llvm/llvm-project/commit/084a4e6002a9b718adb31dd906b233cafd3a9814
  Author: Steffen Larsen <sholstla at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
    M clang/test/CIR/CodeGenHIP/builtins-amdgcn-gfx10.hip

  Log Message:
  -----------
  [CIR][AMDGPU] Implement __builtin_amdgcn_*_dpp* builtins (#226469)

This commit implements the `__builtin_amdgcn_update_dpp`,
`__builtin_amdgcn_mov_dpp`, and `__builtin_amdgcn_mov_dpp8` builtins in
CIR, closely matching the implementation in
CodeGenFunction::EmitAMDGPUBuiltinExpr from OGCG.

Assisted-by: Claude Sonnet 5

Signed-off-by: Steffen Holst Larsen <sholstla at amd.com>


  Commit: 44d86afe24ce107f76141ae45f6fe44c44675bbe
      https://github.com/llvm/llvm-project/commit/44d86afe24ce107f76141ae45f6fe44c44675bbe
  Author: Kane Wang <wangqiang1 at kylinos.cn>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp

  Log Message:
  -----------
  [GlobalISel][NFC] Restore the extended LLT flag to its saved value in tests (#224897)

AArch64GISelMITest's setUp() constructs an AArch64TargetMachine, which
unconditionally enables the process-global extended LLT flag. Ending the
ExtLLT tests with setUseExtended(false) therefore disables the flag for
every test that runs afterwards in the same process.

Save the flag's value on entry and restore it on exit instead.


  Commit: 310cf744bd0c1af7b07377a8fa5a6c2fd72ef4a3
      https://github.com/llvm/llvm-project/commit/310cf744bd0c1af7b07377a8fa5a6c2fd72ef4a3
  Author: Luke Lau <luke at igalia.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp

  Log Message:
  -----------
  [VPlan] Remove (X && Y) | (X && !Y) -> X combine. NFC (#219368)

We have smaller combines that can take care of this now that we process
recipes in a worklist after #213900


  Commit: 6ee306ddac89f9cbfc8815e8956240f0bf832dcb
      https://github.com/llvm/llvm-project/commit/6ee306ddac89f9cbfc8815e8956240f0bf832dcb
  Author: Chris Kennelly <ckennelly at ckennelly.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    A llvm/test/CodeGen/X86/bzhi-standalone-mask.ll

  Log Message:
  -----------
  [X86] Select standalone ~(-1 << n) masks as BZHI (#226158)

InstCombine canonicalizes (1 << n) - 1 to xor (shl -1, n), -1. When that
mask feeds an AND, X86DAGToDAGISel::matchBitExtract folds the whole
expression into BZHI, and the add form is selected as BZHI even on its
own because Select enters matchBitExtract from ISD::ADD. The xor form on
its own is not: a mask that is returned, stored, or consumed by anything
but AND is selected as mov -1; shlx; not.

Enter matchBitExtract from ISD::XOR too under BMI2, so the standalone
mask becomes mov -1; bzhi. That is one instruction shorter and avoids
the shlx+not dependency chain. BMI1-only targets keep the shift form,
since BEXTR would need the count moved into bits 15:8 first.

Assisted-by: Claude Code


  Commit: 3804292c4c3adcd4b8505dc78aed73e211b44752
      https://github.com/llvm/llvm-project/commit/3804292c4c3adcd4b8505dc78aed73e211b44752
  Author: David Spickett <david.spickett at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/unittests/ObjectContainer/ObjectContainerClangOffloadBundleTest.cpp

  Log Message:
  -----------
  [lldb] Fix offload bundle unit tests on 32-bit systems (#226922)

DataExtractor::GetByteSize returns uint64_t for reasons I don't yet
understand. I might change it to size_t but let's unblock the build for
now.

Fixes #222362 / 08ee0ef5da10d27d5776df1e1ff81c46a38d9b5c.


  Commit: 2a96d5737524012839e786699a0b327f22d1cfee
      https://github.com/llvm/llvm-project/commit/2a96d5737524012839e786699a0b327f22d1cfee
  Author: ioana ghiban <ioana.ghiban at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
    M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
    M mlir/lib/IR/BuiltinTypes.cpp
    M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
    M mlir/test/Dialect/GPU/decompose-memrefs.mlir
    M mlir/test/Dialect/MemRef/canonicalize.mlir
    M mlir/test/Dialect/MemRef/elide-reinterpret-cast-load.mlir
    M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
    M mlir/test/Dialect/MemRef/ops.mlir

  Log Message:
  -----------
  [mlir][memref] Enforce consistent reinterpret_cast metadata (#217338)

This PR implements [[RFC] Clarify `memref.reinterpret_cast` Verification
of Dynamic
Metadata](https://discourse.llvm.org/t/rfc-clarify-memref-reinterpret-cast-verification-of-dynamic-metadata).

## Context
`memref.reinterpret_cast` describes its result through both its mixed
offset/size/stride metadata and its result `MemRefType`. Currently,
verification allowed a dynamic result-type correspond to static
operation metadata, introducing inconsistent descriptors.

For example, the verifier permits:
```mlir
%r = memref.reinterpret_cast %base
    to offset: [0], sizes: [%n, 2], strides: [%s, 1] : memref<f32>
      to memref<?x?xf32, strided<[?, ?], offset: ?>>
```
where the operation constructs a descriptor with a statically known
second size and stride, but the result type does not expose those facts.

## Changes
This PR consolidates the verifier to require `reinterpret_cast` result
type’s sizes, offset, and strides to exactly match the static/dynamic
representation and values of the operation metadata.

Transforms that create `memref.reinterpret_cast`, including GPU memref
decomposition and strided-metadata expansion for `subview` and
`collapse_shape`, now derive the result type from the final, potentially
folded descriptor instead of inheriting the original operation’s result
type.

When this descriptor-derived type differs from the original result type,
the rewrite inserts a `memref.cast` back to the original type. These
rewrites are not type-conversion patterns, so their existing
users—including function returns and calls—must retain their original
types. Identity stride layouts are canonicalized when possible to avoid
unnecessary explicit layouts and casts.

Tests are updated to use result types consistent with their
`reinterpret_cast` metadata. In the SPIR-V tests, the size `10` is
represented by an SSA value because those cases intentionally remain
dynamically shaped and lower to element pointers; making the size static
would change the SPIR-V pointee type and prevent the existing
`reinterpret_cast` lowering from applying.

A regression test also verifies that folded `subview` offsets and
strides are reflected in the generated `reinterpret_cast` type.

---
Assisted-by: Codex (refine implementation + tests). I reviewed all code
and tests before submission.


  Commit: fe5ace607b587df1d46174846c40e3afe2c0a4a3
      https://github.com/llvm/llvm-project/commit/fe5ace607b587df1d46174846c40e3afe2c0a4a3
  Author: Yuvaraj Venkatesh <yuvaraj.venkatesh at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
    M mlir/test/Dialect/Tosa/canonicalize.mlir
    M mlir/test/Dialect/Tosa/constant_folding.mlir
    M mlir/test/Dialect/Tosa/ops.mlir
    M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
    M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
    M mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold-dense-resource.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
    M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir

  Log Message:
  -----------
  [mlir][tosa] Add assembly format for CONST (#226147)

This commit adds an assembly format for the TOSA CONST operation.
Previously, the generic assembly format was used while all other
operations had a custom format. It takes advantage of the incoming
textual format changes in #217291, to minimise impact to downstream
consumers.


  Commit: 9fdcf6a0cafba6af912da2acb58f19addeb7722c
      https://github.com/llvm/llvm-project/commit/9fdcf6a0cafba6af912da2acb58f19addeb7722c
  Author: Momchil Velikov <momchil.velikov at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/Scalar/GVN.h
    M llvm/lib/Transforms/Scalar/GVN.cpp

  Log Message:
  -----------
  [GVN] Decouple GVNValueTable and GVNPass (NFC) (#226232)

This is a first patch in series with the ultimate goal to move `GVNPass`
out of `GVN.h` and into `GVN.cpp`.

This is not straightforward because because of the rather tangled
dependencies between `GVNPass`, `GVNHoistPass`, `ValueTable`, and
`LeaderMap`.

The `GVNHoistPass` pass references `GVNPass::ValueTable`, by peeking
into `GVNPass`, resp. including `GVN.h`. Since `GVNHoistPass` does not
actually depend on `GVNPass` itself, but only on the `ValueTable` it
contains, it would make more sense to move `ValueTable` out of `GVN.h`
to its own header file, to be included by both `GVN.h` and
`GVNHoist.cpp.`

That's not entirely straightforward either since `ValueTable` has
several member functions taking a `GVNPass` reference as an argument.
This prevents moving `GVNPass` out of `GVN.h` and into an anonymous
namespace in `GVN.cpp`.

These `GVNPass` (in `ValueTable`) references are only used to access the
`LeaderMap`. Consequently, `LeaderMap` can be moved out of `GVNPass` and
into the `llvm` namespace and forward declared for its uses by
`ValueTable` (when `ValueTable` gets its own header).

This patch moves the `LeaderMap` out of `GVNPass`, into the `llvm`
namespace, and renames it to `GVNLeaderMap`.


  Commit: be2eb0a91356ae3a1910d8226137b54db480166d
      https://github.com/llvm/llvm-project/commit/be2eb0a91356ae3a1910d8226137b54db480166d
  Author: Mariusz Sikora <mariusz.sikora at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err-fake16.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err.s

  Log Message:
  -----------
  [AMDGPU] Add gfx13 MC support for exclusive scan instructions (#226077)


  Commit: f1de563a490b486738e65a6fef040e0e40d1bb21
      https://github.com/llvm/llvm-project/commit/f1de563a490b486738e65a6fef040e0e40d1bb21
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll

  Log Message:
  -----------
  [SLP][NFC]Add a test with the missing runtime checks for vectorization, NFC



Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/226947


  Commit: 4c31d2c7641e180c2c9098e466b2247bb470fc25
      https://github.com/llvm/llvm-project/commit/4c31d2c7641e180c2c9098e466b2247bb470fc25
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll

  Log Message:
  -----------
  AMDGPU: Make rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll less allocator sensitive (#226913)

This test is sensitive to the exact split and spills which occur, and disappeared  under 
a future upstream improvement. Use basic RA with a fixed occupancy since it more
stably produces the spill pattern.

Also add a codegen reference test for the same kernel, so future codegen
improvements are visible.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: c44450f30d17c64005fc74c506a01c373ddf702c
      https://github.com/llvm/llvm-project/commit/c44450f30d17c64005fc74c506a01c373ddf702c
  Author: Weiwen He <60433849+he-weiwen at users.noreply.github.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
    A llvm/test/CodeGen/X86/cmp-shrink-unsigned.ll

  Log Message:
  -----------
  [X86] Shrink i32 unsigned compares to i8/i16 when high bits are zero (#197801)

Shrink i32 compares to 8 or 16 bit for non-constant operands when high
bits are zero, following the precedent of i64 -> i32 case.

Fixes the cases in #196827 where both sides of the compare are
non-constants, as this allows the `and(X, mask) `to be eliminated
downstream in DAGCombine.

I believe we can extend to constant operands as long as the length
changing prefix problem for i16 immediates is accounted for - however:
1. it's not sufficient to fix the remaining cases in the motivating
issue alone: when the rhs is constant, InstCombine clear the bits in the
mask that does not affect the comparison result (`icmp (and X, 255),
123` -> `icmp (and X, 252), 123`), so the mask does not fill the full
width of the truncated type, making the analysis trickier.
2. it leads to a lot of check line drifts, i'm not sure if it's worth
the effort to account for all of them, even if most don't look like
regressions.


  Commit: a945adae2eb9236392fbbfe1ab5181f8c073d6f8
      https://github.com/llvm/llvm-project/commit/a945adae2eb9236392fbbfe1ab5181f8c073d6f8
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp

  Log Message:
  -----------
  [SCEV] Use makeExactNoWrapRegion for constant operands. (NFC) (#223973)

Use makeExactNoWrapRegion when constant is available.

Together with https://github.com/llvm/llvm-project/pull/223969, this
reduces compile-time in SCEV heavy workloads:

stage1-O3: -0.10%
stage1-ReleaseThinLTO: -0.0.9%
stage1-ReleaseLTO-g: -0.08%
stage1-aarch64-O3: -0.09%
stage2-O3: -0.07%

https://llvm-compile-time-tracker.com/compare.php?from=016fa12d18058b83c528f2af859e45df4548034f&to=e2efeaf6a19ac8c53170f2a2b196f3d38268fd32&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/223973


  Commit: 7f133e72828d68cbd8ce06bf64ea0fe8b8528c06
      https://github.com/llvm/llvm-project/commit/7f133e72828d68cbd8ce06bf64ea0fe8b8528c06
  Author: Nikita Popov <npopov at redhat.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/AsmParser/LLParser.h
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/test/Bitcode/upgrade-tbaa.ll
    A llvm/test/Bitcode/upgrade-tbaa.ll.bc
    M polly/test/CodeGen/OpenMP/single_loop_with_loop_invariant_baseptr.ll

  Log Message:
  -----------
  [AsmParser] Remove TBAA auto-upgrade in IR parser (#226914)

At this point, the struct path TBAA format is more than a decade old, so
remove support for upgrading from the old format in the textual IR
parser. Bitcode upgrade support is retained, as bitcode is backwards
compatible.

This avoids introduction of new tests using the old format. Existing
tests were migrated in https://github.com/llvm/llvm-project/pull/226051.


  Commit: 82aa78850bb1c90df3d747062555b2f34b0466c5
      https://github.com/llvm/llvm-project/commit/82aa78850bb1c90df3d747062555b2f34b0466c5
  Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Analysis/ScalarEvolution.h
    M llvm/lib/Analysis/ScalarEvolution.cpp

  Log Message:
  -----------
  [SCEV] Rename SCEVFlags -> SCEVFlagsPair (NFC) (#226935)

Make it clear that it's a pair of no-wrap flags, and free up the
SCEVFlags name for renaming SCEVNoWrapFlags to it.


  Commit: c786529445a1ecb3e8618eba4d68132e40c2e40f
      https://github.com/llvm/llvm-project/commit/c786529445a1ecb3e8618eba4d68132e40c2e40f
  Author: Mian Miftah <mmiftah.duna at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/test/Transforms/SimplifyCFG/hoist-common-skip.ll

  Log Message:
  -----------
  [SimplifyCFG] Drop UB-implying attributes when hoisting speculatively (#226746)

`hoistCommonCodeFromSuccessors()` can hoist identical instructions past
non-identical ones that it skips. If a skipped instruction may throw or
not return, the hoisted instruction is speculated, but it keeps its
UB-implying attributes and metadata, like `noundef`. Drop them in that
case, as SimplifyCFG already does when it speculates.


  Commit: bc4c516f6e324d147eaeea1bd7d58eb57d03a671
      https://github.com/llvm/llvm-project/commit/bc4c516f6e324d147eaeea1bd7d58eb57d03a671
  Author: David Spickett <david.spickett at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/test/API/functionalities/scripted_frame_provider/thread_filter/TestFrameProviderThreadFilter.py

  Log Message:
  -----------
  [lldb][test] Enable TestFrameProviderThreadFilter.py on Arm (#226953)

Fixes #191855. I do not know why, but this test no longer crashes on
Arm.


  Commit: 17b078d0b68d8d081e5add811b0d6cd91b374160
      https://github.com/llvm/llvm-project/commit/17b078d0b68d8d081e5add811b0d6cd91b374160
  Author: Tomas Matheson <Tomas.Matheson at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/test/Transforms/InferFunctionAttrs/annotate.ll

  Log Message:
  -----------
  [BuildLibCalls] Infer attributes for posix_memalign (#226943)

Handle posix_memalign in inferNonMandatoryLibFuncAttrs.


  Commit: 3123f219c9a536a586df1d253d13ec49ab95ca38
      https://github.com/llvm/llvm-project/commit/3123f219c9a536a586df1d253d13ec49ab95ca38
  Author: Mian Miftah <mmiftah.duna at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/IPO/MergeFunctions.cpp
    A llvm/test/Transforms/MergeFunc/redirect-call-debug-loc.ll

  Log Message:
  -----------
  [MergeFunctions] Add debug locations to redirected calls (#225625)

A call to a function without debug info does not need a debug location,
even in a function with debug info. If MergeFunctions redirects such a
call to an equivalent function that has debug info, the verifier fails:

```
inlinable function call in a function with debug info must have a !dbg location
```

Before redirecting such a call, give it a line 0 location in the scope
of the caller, as `DwarfEHPrepare` does for the call to the rewind
function. This covers both ways calls are redirected:
`replaceDirectCallers()`, and `replaceAllUsesWith()` for `unnamed_addr`
functions.


  Commit: 380d489bcd2a4e4dbe877f9518ee696348f419ea
      https://github.com/llvm/llvm-project/commit/380d489bcd2a4e4dbe877f9518ee696348f419ea
  Author: David Spickett <david.spickett at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp

  Log Message:
  -----------
  [lldb][test] Fix undefined behaviour in multi process driver (#226949)

This code was using strcmp on function names. Function names can be null
(see SBFrame::GetFunctionName), and passing null to strcmp is UB.


  Commit: ccd2a3f748d7a4898fe2850491796f01603e8d72
      https://github.com/llvm/llvm-project/commit/ccd2a3f748d7a4898fe2850491796f01603e8d72
  Author: Dávid Bolvanský <david.bolvansky at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp

  Log Message:
  -----------
  [BasicAA] Compute minimal access extents lazily (#226931)

`aliasCheck` computes the minimal extent of an access before calling
`isObjectSmallerThan`, even though the latter immediately returns false
when the other pointer is not an identified object.

Move the extent computation behind the existing `isIdentifiedObject`
check. This preserves the result: whenever the extent can affect the
answer, the same value is computed and used as before; otherwise only
unused work is skipped.


  Commit: 4df13761d078a2f3c10c4ed7fab033df116b6cdc
      https://github.com/llvm/llvm-project/commit/4df13761d078a2f3c10c4ed7fab033df116b6cdc
  Author: Tim Besard <tim.besard at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A llvm/test/Transforms/SLPVectorizer/X86/strength-reducible-address.ll

  Log Message:
  -----------
  [SLP] Add tests for affine loop address computations (NFC) (#226907)

Precommit tests for #226220: related affine address recurrences in a
loop whose index arithmetic SLP currently vectorizes and extracts per
lane for scalar loads and stores, which LSR would otherwise turn into
pointer increments.

`X86/strength-reducible-address.ll` has Haswell and skylake-avx512 RUN
lines. It covers strided loads, constant-offset GEPs, and a load/store
at the same address. The negative cases are loop-loaded offsets,
escaping addresses, and offsets computed in the preheader. The checks
are generated with current main.


  Commit: eac59201583b098cbd6b4b4619d165e90f50937d
      https://github.com/llvm/llvm-project/commit/eac59201583b098cbd6b4b4619d165e90f50937d
  Author: Vikash Gupta <Vikash.Gupta at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
    A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-freeze.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir

  Log Message:
  -----------
  [GlobalISel] Support GISelValueTracking for G_FREEZE. (#223696)

Port the SDAG FREEZE handling to GlobalISel. Look through G_FREEZE in
computeKnownBits, computeNumSignBits, and computeKnownFPClass when the
source is guaranteed not undef or poison.

Part of #150515.

---------

Co-authored-by: Matt Arsenault <arsenm2 at gmail.com>


  Commit: 71cbaace075d39f87063afa9d0da165ee04345b3
      https://github.com/llvm/llvm-project/commit/71cbaace075d39f87063afa9d0da165ee04345b3
  Author: David Green <david.green at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/binopshuffles.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
    M llvm/test/CodeGen/AArch64/neon-truncstore.ll
    M llvm/test/CodeGen/AArch64/store.ll
    M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll

  Log Message:
  -----------
  [AArch64] Combine truncate(buildvector) -> buildvector (#223787)

If late in the pipeline we are left with truncate(buildvector), we can
generate the buildvector directly. This helps remove the xtn and can
lead to other simplification.


  Commit: ca1b270af6e567ae7caa50cd2b3ede418b7cde5f
      https://github.com/llvm/llvm-project/commit/ca1b270af6e567ae7caa50cd2b3ede418b7cde5f
  Author: Abhina Sree <Abhina.Sreeskantharajan at ibm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/tools/clang-ssaf-src-edit-merge/SrcEditMerge.cpp

  Log Message:
  -----------
  [SystemZ][z/OS] Open text files as text (#226518)

This patch fixes lit regressions in clang-ssaf-src-edit-merge by opening
text files as text.


  Commit: 6861b01646bd770523e94f3efe572f598cfdcc53
      https://github.com/llvm/llvm-project/commit/6861b01646bd770523e94f3efe572f598cfdcc53
  Author: Igor Wodiany <igor.wodiany at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/ObjectYAML/DWARFEmitter.cpp

  Log Message:
  -----------
  [DWARFYAML] Declare `OffsetEntryCount` as `uint64_t` (#224631)

This prevents a potential multiplication overflow when `OffsetsSize` is
calculated and fixes an issue reported by a CodeQL scan.


  Commit: 141ad3d5e3312eccc977b20af18c978e46fd9b40
      https://github.com/llvm/llvm-project/commit/141ad3d5e3312eccc977b20af18c978e46fd9b40
  Author: Dhairyashil R G <dhairyashil25 at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir

  Log Message:
  -----------
  [MLIR][NVVM] Add SM version requirements to mbarrier Ops (#224105)

The mbarrier Ops had no `NVVMRequiresSM` trait, so a `gpu.module`
targeting an older chip (e.g. `sm_75`) accepted them, and the error only
showed up later. This adds the trait to all 13 of them, same as #192257
and `mbarrier.check_layout` in #217252.

| floor | Ops |
|---|---|
| `sm_80` | `init`, `inval`, `arrive`, `arrive_drop`,
`arrive.nocomplete`, `arrive_drop.nocomplete`, `test.wait` |
| `sm_90` | `expect_tx`, `complete_tx`, `arrive.expect_tx`,
`arrive_drop.expect_tx`, `try_wait`, `try_wait.parity` |

The floors come from the Target ISA Notes in the [PTX ISA
8.5](https://docs.nvidia.com/cuda/pdf/ptx_isa_8.5.pdf) (section
9.7.12.15), and they match the backend: every Op that lowers to an
intrinsic fails to compile one arch below its floor and compiles at it.
`arrive_drop` at sm_80 relies on #222916.

Since the trait is per Op, some settings that need sm_90 still get
through on sm_80: an explicit `count`, `scope = cluster`, a
`shared::cluster` pointer, `relaxed = true`, or `layout` on `init`.
Catching those would mean the Ops implementing `getRequiredMinSMVersion`
themselves, which no Op does yet. Happy to add that if you'd like. PTX
version isn't covered either (#69448).

One behaviour change: `gpu-lower-to-nvvm-pipeline` and
`nvvm-attach-target` default to `sm_75`, so using mbarrier Ops with that
default now fails earlier, with a clear message. `verifyTarget = false`
turns the check off.

Tests are in `nvvm_check_target_sm.mlir`: one failing case per Op just
below its floor, plus passing cases at the floor, above it, and on
`sm_90a`.

Assisted-by: Claude


  Commit: 3eb90f564e8b3c8bc93c1f139589ebad30f09b9e
      https://github.com/llvm/llvm-project/commit/3eb90f564e8b3c8bc93c1f139589ebad30f09b9e
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll

  Log Message:
  -----------
  [VPlan] Distribute execution frequencies with BlockFrequencyInfo's code. (#226841)

Instead of hand-rolling frequency propagating, manually construct BFI
and use BFI::distributeMass.

Adds a final step where frequencies are rounded up to at least one, to
distinguish between unreachable and almost never executed blocks. This
matches BFI behavior.

Note that we need to still track whether frequencies are from edges with
unknown profile info.

PR: https://github.com/llvm/llvm-project/pull/226841


  Commit: d8b7da91eb8d8c2232c58a9f8b9f2136861da343
      https://github.com/llvm/llvm-project/commit/d8b7da91eb8d8c2232c58a9f8b9f2136861da343
  Author: Will Hawkins <hawkinsw at obs.cr>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm-c/DebugInfo.h
    M llvm/include/llvm/BinaryFormat/Dwarf.def
    M llvm/include/llvm/BinaryFormat/Dwarf.h
    M llvm/lib/BinaryFormat/Dwarf.cpp
    A llvm/test/DebugInfo/Generic/compileunit-source-language-name-roc.ll

  Log Message:
  -----------
  [DWARF] Support Roc Language (#225631)

The Roc language has been assigned language codes for DWARF v5 and v6.
See [DWARF Issue 260821.1](https://dwarfstd.org/issues/260828.1.html).


  Commit: cf5a39d92984abb7e6e2bac57af6dd9c0abba21a
      https://github.com/llvm/llvm-project/commit/cf5a39d92984abb7e6e2bac57af6dd9c0abba21a
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc

  Log Message:
  -----------
  [OpenMP] Add/update descriptors for extension clauses (#226509)


  Commit: 5d8b5942fa5924d1bf1920fe63623d8e50c58d9a
      https://github.com/llvm/llvm-project/commit/5d8b5942fa5924d1bf1920fe63623d8e50c58d9a
  Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc

  Log Message:
  -----------
  [OpenMP] Update modifier set properties on some clauses (#226508)

The modifier sets on DEPEND, NUM_TEAMS and REDUCTION in 6.1 only have
the exclusive property.


  Commit: 8af4ce85a25634994ebd19223dac15213b1a7dbc
      https://github.com/llvm/llvm-project/commit/8af4ce85a25634994ebd19223dac15213b1a7dbc
  Author: Mehdi Amini <joker.eph at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
    M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
    M clang/test/CIR/Analysis/alias-analysis-modref.cir
    M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
    M clang/test/CIR/CodeGen/alignment.c
    M clang/test/CIR/CodeGen/atomic.c
    M clang/test/CIR/CodeGen/bitint-memory.c
    M clang/test/CIR/CodeGen/bitint-record-layout.c
    M clang/test/CIR/CodeGen/bitint-wide-be.c
    M clang/test/CIR/CodeGen/bitint-wide.c
    M clang/test/CIR/CodeGen/bitint.c
    M clang/test/CIR/CodeGen/builtin-call.cpp
    M clang/test/CIR/CodeGen/compound_literal.c
    M clang/test/CIR/CodeGen/delete-array-aligned.cpp
    M clang/test/CIR/CodeGen/delete-array-overaligned-cookie.cpp
    M clang/test/CIR/CodeGen/delete-array-throwing-dtor.cpp
    M clang/test/CIR/CodeGen/delete-array-unsized-dtor.cpp
    M clang/test/CIR/CodeGen/delete-array.cpp
    M clang/test/CIR/CodeGen/empty-union.cpp
    M clang/test/CIR/CodeGen/fixed-point-literal.c
    M clang/test/CIR/CodeGen/fp-contract.c
    M clang/test/CIR/CodeGen/global-const-alignment.cpp
    M clang/test/CIR/CodeGen/global-init-fenv.cpp
    M clang/test/CIR/CodeGen/global-section.c
    M clang/test/CIR/CodeGen/global-tls-dyn-init.cpp
    M clang/test/CIR/CodeGen/globals.cpp
    M clang/test/CIR/CodeGen/lambda.cpp
    M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
    M clang/test/CIR/CodeGen/no-odr-use.cpp
    M clang/test/CIR/CodeGen/non-odr-use-non-ref.cpp
    M clang/test/CIR/CodeGen/nonzeroinit-struct.cpp
    M clang/test/CIR/CodeGen/paren-list-agg-init.cpp
    M clang/test/CIR/CodeGen/pointer-to-data-member-indirect-field.cpp
    M clang/test/CIR/CodeGen/pointer-width-32bit.cpp
    M clang/test/CIR/CodeGen/pragma-fenv_access.c
    M clang/test/CIR/CodeGen/predefined-expr.c
    M clang/test/CIR/CodeGen/source-loc.cpp
    M clang/test/CIR/CodeGen/static-local-in-ctor.cpp
    M clang/test/CIR/CodeGen/static-local-info.cpp
    M clang/test/CIR/CodeGen/tls-model.cpp
    M clang/test/CIR/CodeGen/union-agg-init.c
    M clang/test/CIR/CodeGen/vbase.cpp
    M clang/test/CIR/CodeGen/vector-strict-fp.cpp
    M clang/test/CIR/CodeGen/vtt.cpp
    M clang/test/CIR/CodeGenCUDA/address-spaces.cu
    M clang/test/CIR/CodeGenCUDA/device-stub.cu
    M clang/test/CIR/CodeGenCUDA/kernel-call.cu
    M clang/test/CIR/CodeGenCXX/global-refs.cpp
    M clang/test/CIR/CodeGenCXX/init-priority-attr.cpp
    M clang/test/CIR/CodeGenCXX/vtable-linkage.cpp
    M clang/test/CIR/CodeGenCXX/zero_init_bases.cpp
    M clang/test/CIR/IR/attribute-visibility.cir
    M clang/test/CIR/IR/fenv.cir
    M clang/test/CIR/IR/global.cir
    M clang/test/CIR/IR/invalid-cast.cir
    M clang/test/CIR/IR/invalid-cmp.cir
    M clang/test/CIR/IR/invalid-delete-array.cir
    M clang/test/CIR/IR/invalid-static-local-info.cir
    M clang/test/CIR/IR/invalid-static-local.cir
    M clang/test/CIR/IR/invalid-tls.cir
    M clang/test/CIR/IR/invalid-vtable.cir
    M clang/test/CIR/IR/static-local-info.cir
    M clang/test/CIR/IR/static-local.cir
    M clang/test/CIR/IR/string-trailing-zeros.cir
    M clang/test/CIR/IR/var-registration.cir
    M clang/test/CIR/IR/vtable-addrpt.cir
    M clang/test/CIR/IR/vtable-attr.cir
    M clang/test/CIR/IR/vtt-addrpoint.cir
    M clang/test/CIR/Lowering/call-llvm-intrinsic.cir
    M clang/test/CIR/Lowering/fenv.cir
    M clang/test/CIR/Lowering/vtt-addrpoint.cir
    M clang/test/CIR/Transforms/vector-cmp-fold.cir
    M clang/unittests/CIR/FenvOpTest.cpp

  Log Message:
  -----------
  Make CIR assembly formats strict properties compatible (#226600)

Bind inherent attributes explicitly in CIR operation formats and update
assembly tests for the resulting syntax.

Assisted-by: Codex


  Commit: 2fa97ac9671c00e8ddff5cc85a82ff84cebaf392
      https://github.com/llvm/llvm-project/commit/2fa97ac9671c00e8ddff5cc85a82ff84cebaf392
  Author: Timm Baeder <tbaeder at redhat.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/AST/ByteCode/ByteCodeEmitter.h
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Context.cpp
    M clang/lib/AST/ByteCode/Disasm.cpp
    M clang/lib/AST/ByteCode/EvalEmitter.cpp
    M clang/lib/AST/ByteCode/EvalEmitter.h
    M clang/lib/AST/ByteCode/EvaluationResult.cpp
    M clang/lib/AST/ByteCode/EvaluationResult.h
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/InterpBuiltinObjectSize.cpp
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/ExprConstShared.h
    M clang/lib/AST/ExprConstant.cpp
    M clang/test/AST/ByteCode/builtin-functions.cpp
    M clang/test/AST/ByteCode/codegen-constexpr-unknown.cpp
    M clang/test/AST/ByteCode/references.cpp
    M clang/test/CodeGenCXX/global-init.cpp
    M clang/test/SemaCXX/PR19955.cpp
    M clang/test/SemaCXX/cxx2c-expansion-stmts.cpp

  Log Message:
  -----------
  Reapply "[clang][bytecode] Stop relying on `CheckEvaluationResult()` … (#226879)

…(… (#226637)

This reverts commit e0316c1b4762263caa49e3c41ddde752a2b6b775.

This time we also check `Pointee.isInitialized()` in
`PtrView::isInitialized()` to catch cases where we call `invokeDtor()`
on a Block.


  Commit: b5cae89e8463dd397960f8a37bb877a06306c0f4
      https://github.com/llvm/llvm-project/commit/b5cae89e8463dd397960f8a37bb877a06306c0f4
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    M llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
    M llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
    M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll

  Log Message:
  -----------
  [SLP]Fix fmul/fadd fusion costs and retry FMA seeds after all blocks

Fix the cost for the scalar of fmul+fadd pairs: fused fmul lanes add
the full fmul cost, fadd lanes with gathered fmuls were costed as
fmuladd, and the FMulAdd combine missed fmuls in the second operand,
c - a*b and constant lanes. Cost fused fmul lanes at (fmuladd - fadd),
such fadd lanes at (fmuladd - fmul), form the combine for either
operand, and treat a multi-use reduction root as fused. Extract nodes
take no credit for extracts the target folds into their users.

Reviewers: RKSimon, bababuck, MrSidims

Pull Request: https://github.com/llvm/llvm-project/pull/226117


  Commit: 74f859b9d46e480fe43d7b904b1e80efb8a331a2
      https://github.com/llvm/llvm-project/commit/74f859b9d46e480fe43d7b904b1e80efb8a331a2
  Author: Aayush Mainali <aayushmainali.codes at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
    M clang-tools-extra/docs/ReleaseNotes.md
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp

  Log Message:
  -----------
  [clang-tidy] Fix readability-trailing-comma false positive on #endif (#219634)

The `readability-trailing-comma` check looks at the token immediately
before an enum's closing brace to decide whether a trailing comma is
present. When the last enumerators are wrapped in `#ifdef` / `#else` /
`#endif`, that token is the directive identifier `endif`, so the check
reports a missing comma and `-fix` inserts `,` after `#endif`. That is
outside the enumerator list and corrupts the source even when every
enumerator already has a trailing comma.

Skip the diagnostic when the token before `}` is a preprocessor
directive (`#` or a token preceded by `#`). An enumerator whose name
happens to be `endif` is still diagnosed, because it is not preceded by
`#`.

Fixes #218957


  Commit: d789b97789e1a220d3e8b58c76bdd0cb495c3736
      https://github.com/llvm/llvm-project/commit/d789b97789e1a220d3e8b58c76bdd0cb495c3736
  Author: Haohai Wen <haohai.wen at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/ObjectYAML/COFFYAML.h
    M llvm/lib/ObjectYAML/COFFEmitter.cpp
    M llvm/lib/ObjectYAML/COFFYAML.cpp
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map-pgo-analysis-map.yaml
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map.yaml
    A llvm/test/tools/yaml2obj/COFF/section-semantic-content.yaml

  Log Message:
  -----------
  [yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)


  Commit: b3f84790c4e5092745b22525bd249146ccf2ebad
      https://github.com/llvm/llvm-project/commit/b3f84790c4e5092745b22525bd249146ccf2ebad
  Author: Haohai Wen <haohai.wen at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:

  Log Message:
  -----------
  [yaml2obj][COFF] Add BBAddrMap support to yaml2coff (#224504)

Teach yaml2coff to emit .llvm_bb_addr_map sections using the same
BBAddrMap YAML schema as yaml2elf.

Treat Entries as the complete section payload and reject its use with
SectionData, StructuredData, or SizeOfRawData.


  Commit: 30ffad255bbde381abe1146446a6974d0b27ff37
      https://github.com/llvm/llvm-project/commit/30ffad255bbde381abe1146446a6974d0b27ff37
  Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

  Log Message:
  -----------
  [Bazel] Fixes 2a96d57 (#226932)

This fixes 2a96d5737524012839e786699a0b327f22d1cfee (#217338).

Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=2a96d5737524012839e786699a0b327f22d1cfee

Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>


  Commit: 271cb24b4d3831c719bc8282748f8266d3d08598
      https://github.com/llvm/llvm-project/commit/271cb24b4d3831c719bc8282748f8266d3d08598
  Author: Mirko Brkušanin <Mirko.Brkusanin at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-register-pressure.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-vgpr-limit.ll
    M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll

  Log Message:
  -----------
  [AMDGPU] Limit DVGPR entry function max VGPRs to block size (#226242)

AMDGPUPromoteAlloca.cpp has its own version of `getMaxVGPRs` so limit is
enforced in two places.

Co-Authored-By: Claude


  Commit: 20913cfb73ee109c0ad4e9cb298e2c1a0595fb0b
      https://github.com/llvm/llvm-project/commit/20913cfb73ee109c0ad4e9cb298e2c1a0595fb0b
  Author: Igor Wodiany <igor.wodiany at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp

  Log Message:
  -----------
  [PDB] Prevent potential overflow when calculating `Base` in `formatMsfStreamData` (#224662)

The `Base` is calculated as a product of two 32-bits number but the
results is assigned to a 64-bit value. By casting one of the operands to
64-bit, the multiplication is done using the whole width of the `Base`
variable, preventing a potential overflow. This fixes an issue reported
by a CodeQL scan.


  Commit: 26f6f833e6b11db16003fe6033049b9a6f615019
      https://github.com/llvm/llvm-project/commit/26f6f833e6b11db16003fe6033049b9a6f615019
  Author: David Green <david.green at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/test/CodeGen/AArch64/add.ll
    M llvm/test/CodeGen/AArch64/andorxor.ll
    M llvm/test/CodeGen/AArch64/arm64-rev.ll
    M llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
    M llvm/test/CodeGen/AArch64/bitcast.ll
    M llvm/test/CodeGen/AArch64/ctlz.ll
    M llvm/test/CodeGen/AArch64/ctpop.ll
    M llvm/test/CodeGen/AArch64/cttz.ll
    M llvm/test/CodeGen/AArch64/ldst-opt.ll
    M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
    M llvm/test/CodeGen/AArch64/mul.ll
    M llvm/test/CodeGen/AArch64/neon-rshrn.ll
    M llvm/test/CodeGen/AArch64/neon-truncstore.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/shufflevector.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/store.ll
    M llvm/test/CodeGen/AArch64/sub.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll

  Log Message:
  -----------
  [AArch64] Add custom v2i32->v2i16 store lowering. (#223659)

This extends the existing v4i16->v4i8 lowering to handle v2i32->v2i16
stores too, which in general helps keep the number of instructions down.


  Commit: 21277fd5587ad8055b47d5684d6a313e09860325
      https://github.com/llvm/llvm-project/commit/21277fd5587ad8055b47d5684d6a313e09860325
  Author: Nikolas Klauser <nikolasklauser at berlin.de>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M libcxx/test/benchmarks/containers/string.bench.cpp

  Log Message:
  -----------
  [libc++] Add a benchmark for string::append (#226559)


  Commit: 83c3a2d69a927491bf9785ad5012a8db6eeb7e1a
      https://github.com/llvm/llvm-project/commit/83c3a2d69a927491bf9785ad5012a8db6eeb7e1a
  Author: Alex Duran <alejandro.duran at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M offload/plugins-nextgen/level_zero/src/L0Program.cpp
    A offload/test/offloading/shared_lib_global_var.c

  Log Message:
  -----------
  [offload][l0] Execute dynamic linking for all formats (#226980)

Also do dynamic linking when necessary for Offload Binaries and SPIR-V
images and not just for the old ELF format.


  Commit: 7eb87fc1e1126c6c064731c6e476ffccc6e5c490
      https://github.com/llvm/llvm-project/commit/7eb87fc1e1126c6c064731c6e476ffccc6e5c490
  Author: David Spickett <david.spickett at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/test/API/api/multithreaded/common.h

  Log Message:
  -----------
  [lldb][test] Simplify multithreaded_queue (#226979)

This makes it easier to see how the timeout is applied in pop.

push now releases the mutex before notifying, where before the watchers
would have to wait for push to return. Likely not going to make anything
much faster, but it makes a bit more sense. Finish adding the new item,
then notify.


  Commit: 3eda2aebadd430199a1d588b6b22c966af5356d5
      https://github.com/llvm/llvm-project/commit/3eda2aebadd430199a1d588b6b22c966af5356d5
  Author: Raphael Isemann <rise at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/test/API/python_api/event/TestEvents.py

  Log Message:
  -----------
  [lldb][test] Disable TestEvents.py (#226486)

This test is flaky on Linux, macOS and Windows. The usual failure on
macOS is as follows:

```
FAIL: test_shadow_listener (TestEvents.EventAPITestCase)
----------------------------------------------------------------------
Traceback (most recent call last):
llvm-project/lldb/packages/Python/lldbsuite/test/decorators.py", line 801, in wrapper
    func(*args, **kwargs)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 485, in test_shadow_listener
    state, restarted = self.wait_for_next_event(None, False)
llvm-project/lldb/test/API/python_api/event/TestEvents.py", line 346, in wait_for_next_event
    self.assertEqual(
>>> AssertionError: 2 != 3 : matching stop hook
Config=arm64-/Users/ec2-user/jenkins/workspace/llvm.org/lldb-cmake-matrix/lldb-build/bin/clang
----------------------------------------------------------------------
```

The test is already skipped on all platforms except macOS. This patch
skips it on all platforms.


  Commit: e3cf33561946626500b3a3684430ce5da61d2882
      https://github.com/llvm/llvm-project/commit/e3cf33561946626500b3a3684430ce5da61d2882
  Author: Andreas Jonson <andjo403 at hotmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    A llvm/test/Transforms/InstCombine/pr226504-commuted.ll
    A llvm/test/Transforms/InstCombine/pr226504.ll

  Log Message:
  -----------
  [InstCombine] Fix miscompilation in sinkNotIntoOtherHandOfLogicalOp (#226783)

Consider the following: `or X, (not (not X))`
sinkNotIntoOtherHandOfLogicalOp calls `freelyInvert(X)` but as X is used
in the not this call result in the new instruction is `and (not X), (not
(not X)) -> and (not X), X` instead of the expected `and (not X), (not
X)`

fixes https://github.com/llvm/llvm-project/issues/226504


  Commit: b5a51c5b670728f0b3bcb3d31bc063821cbcfb4b
      https://github.com/llvm/llvm-project/commit/b5a51c5b670728f0b3bcb3d31bc063821cbcfb4b
  Author: Alexey Samsonov <vonosmas at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M libc/include/fcntl.yaml
    M libc/include/llvm-libc-macros/linux/fcntl-macros.h

  Log Message:
  -----------
  [libc] Add a few missing fcntl.h macro. (#226810)

* Add a few POSIX-specified symbolic constants to `<fcntl.h>`:
`O_RSYNC`,
  `AT_SYMLINK_FOLLOW`, and `F_DUPFD_CLOEXEC`.
* Don't add `_CLOFORK` variants, since those are not supported by Linux.
* List the constants in the `fcntl.yaml` file for posterity.


  Commit: c226f8dec63924b6fef645f5818eb42f52ffd1fe
      https://github.com/llvm/llvm-project/commit/c226f8dec63924b6fef645f5818eb42f52ffd1fe
  Author: MMS IT GmbH <info at mms-it.ch>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    A llvm/test/CodeGen/SystemZ/zos-frame-callee-saved.ll
    M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
    M llvm/test/CodeGen/SystemZ/zos-ret-addr.ll

  Log Message:
  -----------
  [SystemZ][z/OS] Allocate a stack frame when callee-saved registers are saved (#226681)

On z/OS (XPLINK64), a function without calls and without stack objects
that uses callee-saved registers got a stack size of 0. No stack frame
was allocated, so `STMG` stored the registers relative to the unchanged
stack pointer, i.e. into the register save area of the caller's DSA,
overwriting the caller's saved return address. Only skip the frame when
there is nothing to save.

Two existing tests (`zos-ret-addr.ll`, `zos-frameaddr.ll`) encoded this
store into the caller's frame and are updated; the values returned by
`llvm.returnaddress`/`llvm.frameaddress` are unchanged (the old stack
pointer is still read from offset 2048 of the current frame). New test
`zos-frame-callee-saved.ll`.

Found with GMP 6.3.0 on z/OS 3.1 (`mpn_mul_1`): code after the call ran
twice, then S0C4/S0C6. With this change GMP works.

Tests: `llvm-lit test/CodeGen/SystemZ test/MC/SystemZ test/MC/GOFF`
passes (1304 passed, 19 unsupported).

Fixes #226657.

Assisted-by: Claude Code (Anthropic)

🤖 Generated with [Claude Code](https://claude.com/claude-code)


  Commit: b4bccce2099984c74e5b29d767b586cb7b6e8dd6
      https://github.com/llvm/llvm-project/commit/b4bccce2099984c74e5b29d767b586cb7b6e8dd6
  Author: Alex Strelnikov <strel at google.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M libc/src/__support/printf_core/float_dec_converter.h
    M libc/src/__support/printf_core/float_dec_converter_limited.h
    M libc/src/__support/printf_core/float_hex_converter.h
    M libc/src/__support/printf_core/float_inf_nan_converter.h
    M libc/src/stdlib/str_from_util.h
    M libc/src/stdlib/strfromd.cpp
    M libc/src/stdlib/strfromf.cpp
    M libc/src/stdlib/strfroml.cpp
    M libc/test/src/stdlib/strfromf_test.cpp

  Log Message:
  -----------
  [libc] Fix strfromf handling inf/nan. (#225805)

The root cause of #217708 is primarily in
libc/src/stdlib/str_from_util.h, which splits the utilities into
1. `parse_from_format()` which takes in a floating point and returns a
`FormatSection`, and
2. `strfromfloat_convert()`, which takes in the `FormatSection` and not
the floating point value.

`parse_from_format()` [does special case
handling](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L41-L49)
for `float`: it must place a `double` into `FormatSection::conv_val_raw`
when working with `%a` or `%A`. `strfromfloat_convert()` extracts the
bits from `conv_val_raw` to create `fputil::FPBits<T>`, but it [always
uses the template
type](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/str_from_util.h#L115),
effectively creating type confusion when those bits are passed to
`convert_float_hex_exp()`.

An additional challenge in strfrom* functions is that the format string
naturally does not need or support a length modifier as in printf
functions. This is mostly a non-issue as `strfromfloat_convert()` is
templated on floating point type, and calls the "typed" conversion
functions. However, there are no templated / typed versions of
`convert_float_hex_exp()` or `convert_inf_nan()`. These two functions
currently depend on the value of `FormatSection::length_modifier` to
extract the correct type out of `FormatSection::conv_val_raw`:
[`convert_float_hex_exp()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_hex_converter.h#L70-L86)
and
[`convert_inf_nan()`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/__support/printf_core/float_inf_nan_converter.h#L46-L60).
This coupling interacts with the type confusion created in
`strfromfloat_convert()`, and forces the implementation of `strfroml()`
to [manually set the
`length_modifier`](https://github.com/llvm/llvm-project/blob/35fe7e14ecb4e50182fe93123e1876824d14bb94/libc/src/stdlib/strfroml.cpp#L26-L28).

The fix in this PR:
1. Merges the two str_from_float.h utility functions to remove the type
confusion.
2. Lifts the dependency on `FormatSection::length_modifier` and
`conv_val_raw` out of `convert_float_hex_exp()` and `convert_inf_nan()`;
similarly to how the "typed" conversion functions currently work, but
without templating on float point.
3. Updates some conversion function names to mark which ones only handle
finite floating point values.

This allows `strfroml()` to not manually set the length modifier. It
also enables `strfromf128()` to be added in a straightforward
implementation, because it will not need to depend on the existence of
`LengthModifier::Q`, controlled in part by
`LIBC_COPT_PRINTF_NO_CONVERT_FLOAT128‎`. In the future, it may be good
to separate `conv_val_raw` out of `FormatSection` to be its own argument
to non-typed functions.

Fixes #217708.


  Commit: 18763d854a42a4db9c49a1434c4f48e6467714ed
      https://github.com/llvm/llvm-project/commit/18763d854a42a4db9c49a1434c4f48e6467714ed
  Author: aokblast <aokblast at FreeBSD.org>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A llvm/test/tools/llvm-strings/chunk-boundary.test
    M llvm/tools/llvm-strings/llvm-strings.cpp

  Log Message:
  -----------
  [llvm-strings] Use small buffer instead of reading whole file (#163073)


  Commit: 5961b1283fab21a6836be87cbc693c8c81089b83
      https://github.com/llvm/llvm-project/commit/5961b1283fab21a6836be87cbc693c8c81089b83
  Author: Alex MacLean <amaclean at nvidia.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
    M clang/test/CodeGen/builtins-nvptx.c
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
    M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll

  Log Message:
  -----------
  [NVPTX] Auto-upgrade NVVM mulhi intrinsics to generic mulh (#226578)


  Commit: e721bde41d23ee1bc8c6f0413c1f7da8af388171
      https://github.com/llvm/llvm-project/commit/e721bde41d23ee1bc8c6f0413c1f7da8af388171
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/integration-shuffle-vector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exp.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir

  Log Message:
  -----------
  AArch64: Mark the LR def of GlobalISel calls dead (#226256)

In SelectionDAG InstrEmitter would have marked this dead.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 47d9dee08242cb69c284fa47a642e4af978f911f
      https://github.com/llvm/llvm-project/commit/47d9dee08242cb69c284fa47a642e4af978f911f
  Author: David Spickett <david.spickett at arm.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/test/API/api/multithreaded/common.h
    M lldb/test/API/api/multithreaded/test_listener_event_description.cpp
    M lldb/test/API/api/multithreaded/test_listener_event_process_state.cpp
    M lldb/test/API/api/multithreaded/test_listener_resume.cpp

  Log Message:
  -----------
  [lldb][test][NFC] Set multithreaded_queue pop timeout in one place (#226988)

All callers of pop were passing 5 seconds. I don't forsee us needing to
change it per caller either, so just hardcode it in pop().


  Commit: 63cb4e37ce2caf24426c08cf54c11e44f80d1fb0
      https://github.com/llvm/llvm-project/commit/63cb4e37ce2caf24426c08cf54c11e44f80d1fb0
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .github/workflows/libcxx-benchmark-commit.yml
    A .github/workflows/libcxx-benchmark-libstdcxx.yml
    M libcxx/utils/ci/lnt/README.md
    M libcxx/utils/ci/lnt/machines.json
    A libcxx/utils/ci/lnt/run-libstdcxx-benchmarks
    R libcxx/utils/ci/lnt/schema.yaml
    A libcxx/utils/ci/lnt/schemas/libcxx.yaml
    A libcxx/utils/ci/lnt/schemas/libstdcxx.yaml

  Log Message:
  -----------
  [libc++] Use a self-contained job to run libstdc++ benchmarks (#226985)

After trying to retrofit libstdc++ benchmarking into our existing libc++
pipeline, I am giving up and setting up a self-contained job to do it
instead. It's much simpler as we can just run exactly what we need
instead of fighting to decouple libc++ specific logic from the libc++
benchmarking pipeline.

Various parts can still be extracted (e.g. gathering hardware
information for LNT reports, reading machines.json, etc) and will be
extracted in future iterations.

Also, add the corresponding libstdcxx LNT test suite schema so we can
start submitting results to it.


  Commit: 0d429d44791ec27e40f08b3e9d51b743ee7fd870
      https://github.com/llvm/llvm-project/commit/0d429d44791ec27e40f08b3e9d51b743ee7fd870
  Author: Andrey Grabezhnoy <andrey.grabezhnoy at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/test/Transforms/LICM/hoist-binop.ll

  Log Message:
  -----------
  [LICM] Preserve nsw when reassociating integer adds (#221210)

When LICM reassociates (LV + C1) + C2 into LV + (C1 + C2), it currently
drops nsw unless both original additions also have nuw.

After applying the usual OverflowTracking flags, set nsw directly on
both generated additions when both original additions have nsw and value
tracking proves that C1 + C2 cannot overflow in signed arithmetic. This
enables hoistAdd() later in the same LICM run.

Tests cover constant operands, scalar and vector operands proven safe
through known bits, operands constrained by dominating assumptions, and
the case where only the outer addition has nsw.

[Alive2 proof](https://alive2.llvm.org/ce/z/DC2dWY) of the
reassociation. The llvm.assume models the separately established fact
that C1 + C2 cannot overflow in signed arithmetic. The public example
uses i8 to finish quickly; the same proof also succeeds locally with
i32.

Fixes #220897


  Commit: 92c62f30ec4a9d9ec9786aa403922fad7d536ae2
      https://github.com/llvm/llvm-project/commit/92c62f30ec4a9d9ec9786aa403922fad7d536ae2
  Author: Pedro da Rosa Pinheiro <pedarosa04 at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
    M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
    M clang/test/CIR/CodeGenOpenMP/parallel.c

  Log Message:
  -----------
  [CIR][OpenMP] Implement lowering for the 'num_threads' clause for 'parallel' directive (#202466)

Implementing the emission of the "single-dimension" `num_threads` clause
for the `#pragma omp parallel` directive. The clause just accepts an
integer value and creates the `numThreadsVars` `llvm::SmallVector` with
that single value (representing a single num_thread dimension).

Based myself off of PR #172501 that implements the lowering for the
`proc_bind` clause.

Following this, I'll work on a PR to adapt CIR to deal with the
"dimensions" modifier introduced in openmp 6.1 (as also tackled by PR
#171767).

### Evidence:
Output of: `python3 build/bin/llvm-lit -sv
clang/test/CIR/CodeGenOpenMP/parallel.c`

```
llvm-lit: /home/pedro/dev/projects/my-llvm-project/llvm/utils/lit/lit/llvm/config.py:569: note: using clang: /home/pedro/dev/projects/my-llvm-project/build/bin/clang

Testing Time: 0.09s

Total Discovered Tests: 1
  Passed: 1 (100.00%)
```


  Commit: df11f86c50a1399c7af2816facd330988c19b32b
      https://github.com/llvm/llvm-project/commit/df11f86c50a1399c7af2816facd330988c19b32b
  Author: aokblast <aokblast at FreeBSD.org>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:

  Log Message:
  -----------
  [llvm-strings] Use small buffer instead of reading whole file (#163073)

To prevent large memory footprint, we use small buffer and a seperated
string to print. This can largely reduce the memory consumption when
processing.

In the following example, the test file is a clang-24 debug build
binary. Each runs with three rounds and use the median number as a
result.

reading from stdin:

blast at localhost ~/o/l/build (main)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null

Executed in    3.94 secs    fish           external
   usr time    3.03 secs    2.27 millis    3.03 secs
   sys time    1.43 secs    0.00 millis    1.43 secs

Memory usage is 3.784 GB from valgrind massif.
reading from file:

blast at localhost ~/o/l/build (main)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null

Executed in    2.99 secs    fish           external
   usr time    2.91 secs    1.14 millis    2.91 secs
   sys time    0.08 secs    0.00 millis    0.08 secs

Memory usage is 1.802 GB from valgrind massif.
This patch:
reading from stdin:


blast at localhost ~/o/l/build (strings/fix_oom)> time cat ./bin/clang-24 |
./bin/llvm-strings > /dev/null

Executed in    2.53 secs    fish           external
   usr time    2.28 secs    0.00 millis    2.28 secs
   sys time    0.34 secs    1.33 millis    0.33 secs

Memory usage is 78.03 KB from valgrind massif.
reading from file:

blast at localhost ~/o/l/build (strings/fix_oom)> time ./bin/llvm-strings
./bin/clang-24 > /dev/null

Executed in    2.57 secs    fish           external
   usr time    2.37 secs  641.00 micros    2.37 secs
   sys time    0.20 secs  206.00 micros    0.20 secs

Memory usage is 78.13 KB from valgrind massif.


  Commit: fdcab03ed53bfa5842f6af464d3ffd50a19e3188
      https://github.com/llvm/llvm-project/commit/fdcab03ed53bfa5842f6af464d3ffd50a19e3188
  Author: Louis Dionne <ldionne.2 at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .github/workflows/libcxx-benchmark-libstdcxx.yml

  Log Message:
  -----------
  [libc++] Update GHA pins in libcxx-benchmark-libstdcxx.yml (#227003)

This workflow landed with older versions of actions/checkout and
actions/setup-python than the (recently updated) versions used by other
workflows.


  Commit: e1941f8db3ab710e4ff3eb6b6fb32d4c8eb79b82
      https://github.com/llvm/llvm-project/commit/e1941f8db3ab710e4ff3eb6b6fb32d4c8eb79b82
  Author: Jackson Stogel <jtstogel at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl

  Log Message:
  -----------
  [bazel][libc] Refactor to allow copts under full-build mode (#226851)

This PR moves away from having sets of predefined groups of `copts` to
just directly listing `copts` for each target. The idea behind
[`copt_sets`](https://github.com/llvm/llvm-project/blob/dbde1428562362792d85cb9bbb58415f1b21cb48/utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl#L80)
in `_libc_library` was to restrict the different ways `copts` could be
defined, since `libc_release_library` doesn't respect `copts` and in
general having fewer combinations of `copts` allows for using fewer
`cc_library` targets. This PR allows `copts` to only be configurable if
the target is full-build only, so at least overlay libc function are
still more restricted.


  Commit: a401e6562a56a21c6c8f0844d8b8bf9f270bf827
      https://github.com/llvm/llvm-project/commit/a401e6562a56a21c6c8f0844d8b8bf9f270bf827
  Author: Jackson Stogel <jtstogel at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel

  Log Message:
  -----------
  [bazel] Port 4faf0ae, 15cff90, 9028ff14, 4057f8e4 (#226853)


  Commit: d5275610d14e0911000246139dd537890f30831b
      https://github.com/llvm/llvm-project/commit/d5275610d14e0911000246139dd537890f30831b
  Author: Jiaxun Yang <jiaxun.yang at flygoat.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
    A llvm/test/CodeGen/Mips/msa/f16vec-shuffle.ll

  Log Message:
  -----------
  [Mips] Promote MSA half-vector shuffles to integer vectors (#226105)

Promote v8f16 VECTOR_SHUFFLE operations to v8i16 to avoid expanding them
through EXTRACT_VECTOR_ELT and BUILD_VECTOR with an illegal scalar f16
type.

Fixes: #223618
Assisted-by: Codex # Tests


  Commit: eb7f12adf832667a08debc0cdc65f762f615a99d
      https://github.com/llvm/llvm-project/commit/eb7f12adf832667a08debc0cdc65f762f615a99d
  Author: Alexey Bataev <a.bataev at outlook.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-minbw-root.ll

  Log Message:
  -----------
  [SLP]Fix narrowed leaf masks for demoted reduction root

The root of the narrowed-leaf reduction may be demoted and resized to the
reduction bitwidth of the wide reduction operations, while the masks are
built for the narrow leaves type, causes the crash.

Fixes https://github.com/llvm/llvm-project/pull/224919#issuecomment-5869787812

Reviewers: 

Pull Request: https://github.com/llvm/llvm-project/pull/227009


  Commit: 19b0091751d8c786c92e749a2d3404595edd359b
      https://github.com/llvm/llvm-project/commit/19b0091751d8c786c92e749a2d3404595edd359b
  Author: Jackson Stogel <jtstogel at gmail.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .github/workflows/bazel-checks.yml

  Log Message:
  -----------
  [Github] Add LLVM-libc's full-build to Bazel Checks workflow (#224749)

Adds a job to run LLVM-libc's full build test suite in Bazel via
`bazelisk test -- at llvm-project//libc:build_mode=full
@llvm-project//libc/...`. It is part of an effort to support LLVM-libc's
full build functionality in Bazel.


  Commit: d87df4a9c352b275d89ef62f549c9225c0e51a51
      https://github.com/llvm/llvm-project/commit/d87df4a9c352b275d89ef62f549c9225c0e51a51
  Author: Will Hawkins <hawkinsw at obs.cr>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/MC/MCDwarf.cpp

  Log Message:
  -----------
  [MC][Dwarf] Support DWARF Version 6 in CIE (#226997)

According to the latest draft (as of 9/28/2026) of the V6 specification
of DWARF, section 8.24 states

"The value of the CIE version number is 4."

(PDF of the draft as of 9/28/2026 available at
https://snapshots.sourceware.org/dwarfstd/dwarf-spec/latest/dwarf6-20260920-2248.pdf).

Fixes #226994.


  Commit: 9e34a621d761e73eeb7e4a1c62070d4fd5ce1d0a
      https://github.com/llvm/llvm-project/commit/9e34a621d761e73eeb7e4a1c62070d4fd5ce1d0a
  Author: Alex Duran <alejandro.duran at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M offload/test/offloading/shared_lib_global_var.c

  Log Message:
  -----------
  [offload][omp] Mark shlib_global_var test unsupported for AMD (#227008)

The shared library test introduced in #226980 seems to fail with the AMD
builbot so mark it unsupported for AMD GPUs.


  Commit: c472da0034ee42666d626b57e026b54013649f8f
      https://github.com/llvm/llvm-project/commit/c472da0034ee42666d626b57e026b54013649f8f
  Author: Erich Keane <ekeane at nvidia.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/Sema/SemaOpenACCAtomic.cpp
    M clang/test/SemaOpenACC/atomic-construct.cpp

  Log Message:
  -----------
  [OpenACC] Fix diagnostic for atomic assignment (#227004)

Not sure how this escaped having code coverage, but a mis-placed closing
paren caused this to go very wrong :) This patch fixes it and adds the
original test case.

Fixes: #226905


  Commit: f37b81afe94a1625ccd2b949d3bbfde78d612db9
      https://github.com/llvm/llvm-project/commit/f37b81afe94a1625ccd2b949d3bbfde78d612db9
  Author: Tuomas Kärnä <tuomas.karna at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
    M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
    M mlir/test/Dialect/Linalg/erase-unused-operands-and-results.mlir
    M mlir/test/Dialect/Linalg/swap-extract-slice-with-fill.mlir
    A mlir/test/Dialect/Linalg/td/erase-unused-operands-and-results.mlir
    A mlir/test/Dialect/Linalg/td/swap-extract-slice-with-fill.mlir
    R mlir/test/Dialect/Linalg/transform-op-swap-extract-slice-with-fill.mlir
    M mlir/test/python/dialects/transform.py

  Log Message:
  -----------
  [mlir][transform] add ApplyEraseUnusedOperandsAndResultsPatternsOp transform op (#225864)

The existing pattern
`mlir::linalg::populateEraseUnusedOperandsAndResultsPatterns` can remove
unused linalg op operands and/or results. At the moment, this pattern is
however only applicable via the `linalg-fuse-elementwise-ops` pass. This
PR exposes this pattern via a standalone transform dialect op.

Following the naming convention, the transform op is called
`transform.apply_patterns.linalg.erase_unused_operands_and_results`. The
the Python bindings expose it as
`transform.structured.apply_patterns_linalg_erase_unused_operands_and_results()`.

Assisted-by: Claude


  Commit: 6e3c393f4a4dcf07b16df1f442883dcecf8bd011
      https://github.com/llvm/llvm-project/commit/6e3c393f4a4dcf07b16df1f442883dcecf8bd011
  Author: Phoebe Linck <phoebe.linck at hpe.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M flang/lib/Lower/OpenMP/OpenMP.cpp
    M flang/lib/Semantics/check-omp-structure.cpp
    R flang/test/Lower/OpenMP/Todo/taskwait-nowait.f90
    A flang/test/Semantics/OpenMP/taskwait-nowait.f90
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
    M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir

  Log Message:
  -----------
  [Flang][OpenMP] Support 'nowait' clause on taskwait (#219247)

No longer errors when a `nowait` clause is present on a `taskwait`, and
passes the info along to the runtime call `__kmpc_omp_taskwait_deps_51`.
Note that the runtime doesn't appear to use the `has_no_wait` parameter
at the moment, so `taskwait depend(...) nowait` will still block on
tasks it is dependent on. This should match the current Clang behavior.


  Commit: 0203bc81f2869a8cf7e0d78759d2e40878d9afae
      https://github.com/llvm/llvm-project/commit/0203bc81f2869a8cf7e0d78759d2e40878d9afae
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbinline.py

  Log Message:
  -----------
  [lldb][test] Let inline tests opt into PDB debug info (#227001)

`MakeInlineTest` builds the test class with `type()`, so
`LLDBTestCaseFactory` only sees the attributes passed in that call.
Setting `TEST_WITH_PDB_DEBUG_INFO=True` on the returned class is too
late: the debug info variants have already been generated without pdb.

This patch adds a `test_with_pdb_debug_info` keyword argument that is
forwarded as the class attribute. It defaults to `False`, so existing
inline tests are unchanged.

rdar://188590558


  Commit: 357a253eedf18fc8e113731a5e816741cdea20d9
      https://github.com/llvm/llvm-project/commit/357a253eedf18fc8e113731a5e816741cdea20d9
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py

  Log Message:
  -----------
  [lldb][test] Rename session logs through their extended-length path (#226976)

On Windows, renaming `Incomplete.log` to `<Prefix>_<test-name>.log`
makes the destination longer than the source, so it can cross `MAX_PATH`
where the source did not. `os.rename` then fails with `WinError 3` on a
file that exists, and a test that behaved correctly is reported as
unresolved:

```
FileNotFoundError: [WinError 3] The system cannot find the path specified:
   '...\Incomplete.log' -> '...\ExpectedFailure_test_implementation_only_import_main_executable_resilient_no_library_module_dwarf_clang_swift.log'
```

Address the destination through `lldbutil.get_extended_windows_path`,
including the existence check and removal above it.


  Commit: 5c20fe98552af8fdbcd7ce714c1fad1f1e731a65
      https://github.com/llvm/llvm-project/commit/5c20fe98552af8fdbcd7ce714c1fad1f1e731a65
  Author: Aditya Sinha <155882262+AdityaSinha149 at users.noreply.github.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Interpreter/Interpreter.h
    M clang/lib/CodeGen/BackendConsumer.h
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/Interpreter/CMakeLists.txt
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/lib/Interpreter/DeviceOffload.h
    M clang/lib/Interpreter/Interpreter.cpp
    M clang/unittests/Basic/CMakeLists.txt
    A clang/unittests/Basic/TargetIDTest.cpp

  Log Message:
  -----------
  releand "[clang-repl] Implement IncrementalHIPDeviceParser for HIP device compilation" (#226930)

This PR implements the IncrementalHIPDeviceParser. It takes each
incremental statement's device code and lowers it all the way to a
loadable HIP fat binary: linking the ROCm device libraries, running the
AMDGPU optimization/codegen pipeline, producing a .hsaco code object,
and embedding it as __hip_fatbin for the host runtime to register and
launch.

This PR only adds the parser class, wiring it into `Interpreter.cpp`;
the end-to-end tests will come in a follow-up.

Reland of #218337 (reverted in #226679 due to buildbot failures): the
original hit a build race where `DeviceOffload.cpp` could be compiled
before the tablegen-generated `AMDGPUTargetParserDef.inc` existed. Fixed
by adding `target_parser_gen `to `clang/lib/Interpreter/CMakeLists.txt`.

Assisted by Claude Opus 4.8


  Commit: b550208f48a83a889910e50456003438fc81cd76
      https://github.com/llvm/llvm-project/commit/b550208f48a83a889910e50456003438fc81cd76
  Author: Folkert de Vries <folkert at folkertdev.nl>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
    M llvm/test/CodeGen/Mips/msa/bitcast.ll

  Log Message:
  -----------
  [MIPS] add f16 vector bitcast patterns (#226287)

came across this failure

https://godbolt.org/z/YPK78ea76

```llvm
; -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64

define <4 x float> @f(<8 x half> %a) {
  %b = bitcast <8 x half> %a to <4 x float>
  ret <4 x float> %b
}
```

Gives 

```
LLVM ERROR: Cannot select: 0x3b4ac900: v8f16 = bitcast 0x3b4acf90
  0x3b4acf90: v4i32 = insert_vector_elt 0x3b4aceb0, 0x3b4ac5f0, Constant:i32<3>
    0x3b4aceb0: v4i32 = insert_vector_elt 0x3b4acdd0, 0x3b4ac510, Constant:i32<2>
      0x3b4acdd0: v4i32 = insert_vector_elt 0x3b4accf0, 0x3b4ac3c0, Constant:i32<1>
        0x3b4accf0: v4i32 = insert_vector_elt undef:v4i32, 0x3b4ac2e0, Constant:i32<0>
          0x3b4ac2e0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %1
        0x3b4ac3c0: i32,ch = CopyFromReg 0x3b3c7b88, Register:i32 %2
      0x3b4ac510: i32,ch = load<(load (s32) from %fixed-stack.1)> 0x3b3c7b88, FrameIndex:i32<-1>, poison:i32
    0x3b4ac5f0: i32,ch = load<(load (s32) from %fixed-stack.0)> 0x3b3c7b88, FrameIndex:i32<-2>, poison:i32
In function: f
```

Just adding the patterns fixes that, and seems straightforward enough.
I'm using `fexupl` in the tests to force the bitcast, otherwise the
bitcast just gets optimized out (and just a store of the input vector
type happens).

This test should maybe start using the automatic update script?


  Commit: 28acf4e5adf67b336b6ac86cf3db0f1088b140b9
      https://github.com/llvm/llvm-project/commit/28acf4e5adf67b336b6ac86cf3db0f1088b140b9
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .ci/green-dragon/lldb-windows.groovy

  Log Message:
  -----------
  [lldb][Windows][CI] remove in process plugin testing (#226989)

lldb-server is now the default on Windows, stop testing the in process
plugin.


  Commit: d9495236da19d3f11d6e00ad13f15281e879c61f
      https://github.com/llvm/llvm-project/commit/d9495236da19d3f11d6e00ad13f15281e879c61f
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll

  Log Message:
  -----------
  [X86] Add tests for CCMP chain leaves with a folded flag source (#226797)

Tests for #217682

Assisted-by: Claude Code


  Commit: d359e9d80b4baaa2699ed5fc613533a6a147e188
      https://github.com/llvm/llvm-project/commit/d359e9d80b4baaa2699ed5fc613533a6a147e188
  Author: Vladimir Shiryaev <w at tagolog.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Support/raw_socket_stream.cpp
    M llvm/unittests/Support/raw_socket_stream_test.cpp

  Log Message:
  -----------
  [llvm][Support] Use ::closesocket for native sockets on Windows (#226613)

Calling ::close on a Windows SOCKET that has not been converted with
_open_osfhandle crashes and aborts the process with 0xC0000409 instead
of returning an error.

Use ::closesocket on Windows for those sockets, and keep ::close on
POSIX.


  Commit: 33eb30d7b79d79558afcf65186d2b97dfb000efe
      https://github.com/llvm/llvm-project/commit/33eb30d7b79d79558afcf65186d2b97dfb000efe
  Author: 陈子昂 <2802328816 at qq.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    M clang/lib/Headers/riscv_packed_simd.h
    M clang/test/CodeGen/RISCV/rvp-intrinsics.c
    M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    A llvm/test/CodeGen/RISCV/rvp-widening-shift.ll

  Log Message:
  -----------
  [Clang][RISCV] Add packed widening shift intrinsics (#224790)

This PR adds support for the Packed Widening Shift intrinsics:

- `__riscv_pwsll_s_u16x4`
- `__riscv_pwsll_s_u32x2`
- `__riscv_pwsla_s_i16x4`
- `__riscv_pwsla_s_i32x2`


  Commit: 517839bdb319b9a604087909c1af9a699884df24
      https://github.com/llvm/llvm-project/commit/517839bdb319b9a604087909c1af9a699884df24
  Author: Simon Pilgrim <llvm-dev at redking.me.uk>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/test/Transforms/LoopVectorize/intrinsic.ll

  Log Message:
  -----------
  [VectorUtils] Allow trivial vectorization of llvm.pdep and llvm.pext intrinsics (#227019)


  Commit: 0767e7c6bace2f7df6d13601b021280b569d371a
      https://github.com/llvm/llvm-project/commit/0767e7c6bace2f7df6d13601b021280b569d371a
  Author: Charles Zablit <c_zablit at apple.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M lldb/packages/Python/lldbsuite/test/lldbtest.py

  Log Message:
  -----------
  [lldb][test] Don't add pdb to explicitly tagged debug info categories (#226999)

`LLDBTestCaseFactory` appends `"pdb"` to `dbginfo_categories` whenever
the class sets `TEST_WITH_PDB_DEBUG_INFO=True`. When a test method is
tagged with explicit debug info categories
(`@add_test_categories(["dwarf"])`), `dbginfo_categories` is the set
intersection of the method's categories and the known debug info
categories, not a list, so the class failed to load with

```
      AttributeError: 'set' object has no attribute 'append'
```
and dotest reported the whole file as UNRESOLVED.

Only add "pdb" when the method is not tagged, which is also the only
case where the default categories are used.

rdar://188589961


  Commit: a0f704dc2dbdc0a77e7cc100c640eb63f80028c7
      https://github.com/llvm/llvm-project/commit/a0f704dc2dbdc0a77e7cc100c640eb63f80028c7
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Analysis/ScalarEvolution.cpp

  Log Message:
  -----------
  [SCEV] Skip invalidation with empty ValueExprMap (NFC). (#226845)

forgetLoop, forgetValue and forgetValues walk the def-use chains from
the forgotten instructions and erase each visited value's SCEV. This can
be expensive.

If ValueExprMap is empty, there's nothing to forget and skipping the
walk reduces compile-time a bit:
stage1-O3: -0.05%
stage1-ReleaseThinLTO: -0.05%
stage1-ReleaseLTO-g: -0.03%
stage1-aarch64-O3: -0.04%
stage2-O3: -0.05%
stage2-clang: -0.01%


https://llvm-compile-time-tracker.com/compare.php?from=899d817c7950c997402cd229935cd822acf45b08&to=c43f92b9840b62f75ab8a45b7379188d78d81135&stat=instructions:u

PR: https://github.com/llvm/llvm-project/pull/226845


  Commit: 221fe115600f4051c7d3a92614da15e183073afa
      https://github.com/llvm/llvm-project/commit/221fe115600f4051c7d3a92614da15e183073afa
  Author: Farzon Lotfi <farzonlotfi at microsoft.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/MatrixUtils.h
    M clang/include/clang/AST/PropertiesBase.td
    M clang/include/clang/AST/TypeBase.h
    M clang/include/clang/AST/TypeProperties.td
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CodeGenTypes.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaStmt.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/test/AST/HLSL/matrix_layout_attr.hlsl
    M clang/test/CodeGen/matrix-type-indexing.c
    M clang/test/CodeGenHLSL/BasicFeatures/MatrixElementTypeCast.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/MatrixExplicitTruncation.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/MatrixImplicitTruncation.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/MatrixInitializerListOrder.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/MatrixToAndFromVectorConstructors.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/VectorElementwiseCast.hlsl
    M clang/test/CodeGenHLSL/BasicFeatures/matrix-type-indexing.hlsl
    M clang/test/CodeGenHLSL/builtins/mul.hlsl
    M clang/test/CodeGenHLSL/builtins/transpose.hlsl
    M clang/test/CodeGenHLSL/matrix-layout-attr-overrides-default.hlsl
    A clang/test/CodeGenHLSL/matrix-layout-register-representation.hlsl
    M clang/test/CodeGenHLSL/resources/MatrixElement_cbuffer.hlsl
    M clang/test/SemaHLSL/matrix_layout_attr.hlsl

  Log Message:
  -----------
  [HLSL] Preserve matrix layout as AST storage metadata (#225519)

fixes #213996
fixes #211977
fixes https://godbolt.org/z/rhTYx1KGf

Keep matrix layout metadata on noncanonical matrix types without
affecting type identity, overload resolution, deduction, or mangling.

Normalize matrix values to column-major register representation when
loading from memory, and convert them back to the destination layout
when storing. Preserve layout metadata through typedefs, arrays,
records, resources, serialization, AST import, and template
substitution.

This change also starts the reversal of encoding row\column major via
indexing changes in codegen and instead ops for a stable index but
transpose intrinsics for swapping matrix majorness.


  Commit: 81cdde2cef226f50fcd7db798b5ee5e22dcb1dba
      https://github.com/llvm/llvm-project/commit/81cdde2cef226f50fcd7db798b5ee5e22dcb1dba
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir

  Log Message:
  -----------
  AArch64: Mark the NZCV def dead for unused overflow results (#227018)

Avoid implicitly depending on later recomputed dead flags.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 8ece76768f67c9a5ff67a45db38dee7bb700dc20
      https://github.com/llvm/llvm-project/commit/8ece76768f67c9a5ff67a45db38dee7bb700dc20
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/include/llvm/ADT/DenseMap.h

  Log Message:
  -----------
  [ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)

This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.

This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664).  With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.

Assisted-by: Antigravity


  Commit: 4fce7d6bfb18abfd20021e679f8fce489a6ed898
      https://github.com/llvm/llvm-project/commit/4fce7d6bfb18abfd20021e679f8fce489a6ed898
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/include/clang/AST/ASTContext.h
    M clang/lib/AST/ASTContext.cpp

  Log Message:
  -----------
  [clang] Add one-entry cache for ASTContext::getDeclAttrs() (#226610)

In libc++, almost every decl has attributes, so ASTContext::DeclAttrs
has 50k-150k entries when using libc++. But attributes are often queried
several times in a row for the same decl (e.g. `D->hasAttr<A>() ||
D->hasAttr<B>()`). Numbers for some Chromium TUs:

                                        getDeclAttrs()  same Decl as   table
                                        calls           previous call  size
    blink logical_box_fragment.cc       19.6M           88.4%          156132
    glic_webui_contents_manager.cc      16.0M           86.1%          144545
    tflite kernels/conv.cc               6.1M           91.2%           52623

So add a one-element cache. AttrVecs are allocated separately, so
keeping a pointer to the result is safe.

Build time for 60 random Chromium TUs drawn with probability
proportional to their compile time:

    CPU time: 240.3 s => 237.4 s, -1.20%
    instructions: 2489.0e9 => 2452.9e9, -1.45%

(To check noise level, running this with the same binary twice: +-0.04%
CPU time, +-0.01% instructions.)

Every one of the 60 TUs improves, by 0.98% to 2.26% in instructions.

No behavior change.


  Commit: fc1e244c970c1ab169fb1b43c06797a931fe7082
      https://github.com/llvm/llvm-project/commit/fc1e244c970c1ab169fb1b43c06797a931fe7082
  Author: Kazu Hirata <kazu at google.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:

  Log Message:
  -----------
  [ADT] Extract SmallDenseMapStorage from SmallDenseMap (NFC) (#226882)

This patch extracts the inline and heap bucket and occupancy storage
management from SmallDenseMap into a new helper class,
densemap::detail::SmallDenseMapStorage, and updates SmallDenseMap to
use it via composition.

This is part of the effort to replace CRTP in DenseMapBase with
composition (see #168255 and #226664).  With both DenseMapStorage and
SmallDenseMapStorage in place, the next patch will remove CRTP from
DenseMapBase.

Assisted-by: Antigravity


  Commit: f4c1a20178107dd75e0b38ff875bcb0a1b48d6a0
      https://github.com/llvm/llvm-project/commit/f4c1a20178107dd75e0b38ff875bcb0a1b48d6a0
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
    A llvm/test/CodeGen/X86/fpcw-dead-eflags.ll

  Log Message:
  -----------
  X86: Mark EFLAGS dead on the FP control word OR (#227017)

Fix custom inserters to add dead flags.

Co-authored-by: Claude Opus 5 <noreply at anthropic.com>


  Commit: 99667ddd5e99f3cf2dfe3e12912e1ae37626f3ba
      https://github.com/llvm/llvm-project/commit/99667ddd5e99f3cf2dfe3e12912e1ae37626f3ba
  Author: Evgenii Kudriashov <evgenii.kudriashov at intel.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    A llvm/test/CodeGen/X86/apx/bls-egpr.ll

  Log Message:
  -----------
  [X86][APX] Precommit test for BLSI/BLSMSK i8 patterns with EGPR (NFC) (#226793)

The i8 BLSI/BLSMSK patterns always select the VEX forms, so when only
extended GPRs (r16-r31) are available the operands get spilled instead
of using the EVEX forms.

Tests for #226796

Assisted-by: Claude Code

Co-authored-by: Claude Opus 5.5 (1M context) <noreply at anthropic.com>


  Commit: 1306e151f1b7874b0dee2e8b037a5a117e6e809b
      https://github.com/llvm/llvm-project/commit/1306e151f1b7874b0dee2e8b037a5a117e6e809b
  Author: Nico Weber <thakis at chromium.org>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M clang/lib/Analysis/UnsafeBufferUsage.cpp

  Log Message:
  -----------
  [-Wunsafe-buffer-usage] Speed up warning a bit (#226605)

Checking a type is faster than calling ignoreUnsafeBufferIn...(). The
latter has to get the Stmt's begin loc, look up diagnostic state and
suppression, etc. And the type check lets us skip most Stmts cheaply, so
do that first.

In a sampling profile of 48 Chromium TUs (which are built with
-Wunsafe-buffer-usage), UnsafeBufferUsageReporter's
ignoreUnsafeBufferInLibcCall() and ignoreUnsafeBufferInContainer() were
1.35% and 1.29% of the total compile time, and 3.75% for
checkUnsafeBufferUsage() as a whole.

For 60 random Chromium TUs drawn with probability proportional to their
compile time, sum over all TUs:

    CPU time: 242.9 s => 237.5 s, -2.2%
    instructions: 2452.6e9 => 2371.8e9, -3.3%

No behavior change.


  Commit: 0040f3a277c0b9badaec072cb75062ad6ae650b2
      https://github.com/llvm/llvm-project/commit/0040f3a277c0b9badaec072cb75062ad6ae650b2
  Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .ci/green-dragon/lldb-windows.groovy
    M .github/workflows/bazel-checks.yml
    M .github/workflows/build-ci-container-tooling.yml
    M .github/workflows/build-ci-container-windows.yml
    M .github/workflows/build-ci-container.yml
    M .github/workflows/build-libc-container.yml
    M .github/workflows/build-metrics-container.yml
    M .github/workflows/check-ci.yml
    M .github/workflows/ci-post-commit-analyzer.yml
    M .github/workflows/commit-access-review.yml
    M .github/workflows/compiler-rt-libc-builtins-tests.yml
    M .github/workflows/docs.yml
    M .github/workflows/email-check.yaml
    M .github/workflows/get-llvm-version/action.yml
    M .github/workflows/gha-codeql.yml
    M .github/workflows/hlsl-test-all.yaml
    M .github/workflows/ids-check.yml
    M .github/workflows/issue-release-workflow.yml
    M .github/workflows/issue-write.yml
    M .github/workflows/libc-freebsd-vm-tests.yml
    M .github/workflows/libc-fullbuild-tests.yml
    M .github/workflows/libc-overlay-tests.yml
    M .github/workflows/libc-shared-tests.yml
    M .github/workflows/libclang-abi-tests.yml
    M .github/workflows/libcxx-benchmark-commit.yml
    M .github/workflows/libcxx-benchmark-cron.yml
    A .github/workflows/libcxx-benchmark-libstdcxx.yml
    M .github/workflows/libcxx-build-containers.yml
    M .github/workflows/libcxx-pr-benchmark.yml
    M .github/workflows/libcxx-pr-check-generated-files.yml
    M .github/workflows/libcxx-pr-conformance-tests.yaml
    M .github/workflows/libcxx-pr-test-tools.yml
    M .github/workflows/lldb-pylint-action.yml
    M .github/workflows/llvm-abi-tests.yml
    M .github/workflows/llvm-bugs.yml
    M .github/workflows/mlir-spirv-tests.yml
    M .github/workflows/new-prs.yml
    M .github/workflows/pr-code-format.yml
    M .github/workflows/pr-code-lint.yml
    M .github/workflows/premerge.yaml
    M .github/workflows/prune-branches.yml
    M .github/workflows/release-asset-audit.yml
    M .github/workflows/release-binaries.yml
    M .github/workflows/release-documentation.yml
    M .github/workflows/release-llvm-testing-tools.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml
    M .github/workflows/scorecard.yml
    M .github/workflows/spirv-tests.yml
    M .github/workflows/sycl-tests.yml
    M .github/workflows/test-suite.yml
    M .github/workflows/test-unprivileged-download-artifact.yml
    M .github/workflows/upload-release-artifact/action.yml
    M .github/workflows/version-check.yml
    M .github/workflows/zizmor.yml
    M bolt/docs/conf.py
    M bolt/lib/Passes/BinaryPasses.cpp
    M bolt/lib/Passes/ReorderFunctions.cpp
    M bolt/lib/Profile/DataAggregator.cpp
    M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
    M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
    M clang-tools-extra/clangd/tool/ClangdMain.cpp
    M clang-tools-extra/docs/ReleaseNotes.md
    M clang-tools-extra/test/clang-tidy/checkers/bugprone/redundant-branch-condition.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp
    M clang/docs/AllocToken.md
    M clang/docs/ClangLinkerWrapper.md
    M clang/docs/ClangOffloadBundler.md
    M clang/docs/ClangTransformerTutorial.md
    M clang/docs/ControlFlowIntegrity.md
    M clang/docs/ControlFlowIntegrityDesign.md
    M clang/docs/InternalsManual.md
    M clang/docs/IntroductionToTheClangAST.md
    M clang/docs/LanguageExtensions.md
    M clang/docs/LibASTImporter.md
    M clang/docs/LifetimeSafety.md
    M clang/docs/ReleaseNotes.md
    M clang/docs/SafeBuffers.md
    M clang/docs/ScalableStaticAnalysis/user-docs/SummaryExtraction.md
    M clang/docs/WarningSuppressionMappings.md
    M clang/docs/analyzer/checkers.md
    M clang/docs/analyzer/user-docs/Annotations.md
    M clang/docs/conf.py
    M clang/include/clang/AST/APValue.h
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/CharUnits.h
    M clang/include/clang/AST/MatrixUtils.h
    M clang/include/clang/AST/NestedNameSpecifierBase.h
    M clang/include/clang/AST/PropertiesBase.td
    M clang/include/clang/AST/TypeBase.h
    M clang/include/clang/AST/TypeProperties.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/HLSLIntrinsics.td
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Interpreter/Interpreter.h
    A clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
    M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/lib/AST/APValue.cpp
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Opcodes.td
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/NestedNameSpecifier.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/Analysis/UnsafeBufferUsage.cpp
    M clang/lib/Basic/Targets/WebAssembly.cpp
    M clang/lib/Basic/Targets/WebAssembly.h
    M clang/lib/CIR/CodeGen/CIRGenBuilder.h
    M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
    M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
    M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
    M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
    M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
    M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CodeGen/BackendConsumer.h
    M clang/lib/CodeGen/CGBlocks.cpp
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/CodeGen/CGLoopInfo.cpp
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/CodeGen/CodeGenTypes.cpp
    M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
    M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/lib/Headers/riscv_packed_simd.h
    M clang/lib/Interpreter/CMakeLists.txt
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/lib/Interpreter/DeviceOffload.h
    M clang/lib/Interpreter/IncrementalAction.cpp
    M clang/lib/Interpreter/Interpreter.cpp
    M clang/lib/Lex/HeaderSearch.cpp
    M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
    A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
    M clang/lib/Sema/SemaARM.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaOpenACCAtomic.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaStmt.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTWriterStmt.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
    M clang/test/AST/ByteCode/references.cpp
    M clang/test/AST/HLSL/matrix_layout_attr.hlsl
    M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
    M clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-preserves-unrelated-zero-length-insert.test
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    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/empty-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/identical-overlap.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/no-conflict-sarif-empty.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/non-overlapping.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/order-invariance.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-identical-non-zero-length.test
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    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/range-overlap-cluster-of-three-sarif.test
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    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/sarif-out-parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input-internal-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-all-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-conflict-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-conflicts-different-offsets-sarif.test
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    M llvm/include/llvm/ExecutionEngine/Orc/Core.h
    M llvm/include/llvm/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.h
    M llvm/include/llvm/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.h
    M llvm/include/llvm/ExecutionEngine/Orc/ExecutorProcessControl.h
    M llvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
    M llvm/include/llvm/IR/AutoUpgrade.h
    M llvm/include/llvm/IR/ConstantFolder.h
    M llvm/include/llvm/IR/IRBuilder.h
    M llvm/include/llvm/IR/IRBuilderFolder.h
    M llvm/include/llvm/IR/InstVisitor.h
    M llvm/include/llvm/IR/Instruction.def
    M llvm/include/llvm/IR/Instructions.h
    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/include/llvm/IR/NoFolder.h
    M llvm/include/llvm/Object/ELFTypes.h
    M llvm/include/llvm/ObjectYAML/COFFYAML.h
    M llvm/include/llvm/Support/AArch64MemoryHints.h
    M llvm/include/llvm/Support/CommandLine.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
    M llvm/include/llvm/Transforms/Scalar/GVN.h
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    M llvm/lib/Analysis/BranchProbabilityInfo.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/BinaryFormat/Dwarf.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CGData/CodeGenData.cpp
    M llvm/lib/CGData/CodeGenDataReader.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
    M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
    M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
    M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
    M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
    M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
    M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/lib/MC/ELFObjectWriter.cpp
    M llvm/lib/MC/GOFFObjectWriter.cpp
    M llvm/lib/MC/MCDwarf.cpp
    M llvm/lib/MC/WasmObjectWriter.cpp
    M llvm/lib/ObjectYAML/COFFEmitter.cpp
    M llvm/lib/ObjectYAML/COFFYAML.cpp
    M llvm/lib/ObjectYAML/DWARFEmitter.cpp
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/DenseMap.cpp
    M llvm/lib/Support/StringRef.cpp
    M llvm/lib/Support/raw_socket_stream.cpp
    M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
    M llvm/lib/Target/AArch64/AArch64TargetMachine.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    A llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
    M llvm/lib/Target/ARM/ARMTargetObjectFile.h
    M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
    M llvm/lib/Target/AVR/AVRDevices.td
    M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
    M llvm/lib/Target/AVR/AVRTargetMachine.h
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
    R llvm/lib/Target/AVR/TODO.md
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
    M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
    M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrArithmetic.td
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
    M llvm/lib/Target/M68k/M68kTargetObjectFile.h
    M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsAsmPrinter.h
    M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
    M llvm/lib/Target/Mips/MipsCallLowering.cpp
    M llvm/lib/Target/Mips/MipsFastISel.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
    M llvm/lib/Target/Mips/MipsMachineFunction.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
    M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/PowerPC/PPC.h
    M llvm/lib/Target/PowerPC/PPCTargetMachine.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPostRA.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPreEmit.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
    M llvm/lib/Target/VE/VEISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.td
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/lib/Transforms/IPO/Instrumentor.cpp
    M llvm/lib/Transforms/IPO/MergeFunctions.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/lib/Transforms/Scalar/GVN.cpp
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/lib/Transforms/Scalar/LoopFuse.cpp
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/lib/Transforms/Utils/LoopUnroll.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUtils.h
    M llvm/lib/Transforms/Vectorize/VPlanValue.h
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/runtimes/CMakeLists.txt
    M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
    M llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
    M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
    M llvm/test/Analysis/CostModel/X86/arith-fp.ll
    M llvm/test/Analysis/CostModel/X86/speculative-load.ll
    M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
    M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
    A llvm/test/Assembler/bitinsert-bitextract-invalid.ll
    A llvm/test/Assembler/bitinsert-bitextract.ll
    A llvm/test/Assembler/invalid-diexpression-arg-negative.ll
    M llvm/test/Bitcode/compatibility.ll
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll.bc
    M llvm/test/Bitcode/upgrade-tbaa.ll
    A llvm/test/Bitcode/upgrade-tbaa.ll.bc
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/integration-shuffle-vector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-freeze.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exp.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
    M llvm/test/CodeGen/AArch64/add.ll
    M llvm/test/CodeGen/AArch64/andorxor.ll
    M llvm/test/CodeGen/AArch64/arm64-rev.ll
    M llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
    M llvm/test/CodeGen/AArch64/binopshuffles.ll
    M llvm/test/CodeGen/AArch64/bitcast.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract.ll
    M llvm/test/CodeGen/AArch64/ctlz.ll
    M llvm/test/CodeGen/AArch64/ctpop.ll
    M llvm/test/CodeGen/AArch64/cttz.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
    M llvm/test/CodeGen/AArch64/ldst-opt.ll
    M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
    M llvm/test/CodeGen/AArch64/mul.ll
    M llvm/test/CodeGen/AArch64/neon-rshrn.ll
    M llvm/test/CodeGen/AArch64/neon-truncstore.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/shufflevector.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/store.ll
    M llvm/test/CodeGen/AArch64/sub.ll
    M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
    A llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll
    M llvm/test/CodeGen/AArch64/sve-int-arith.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
    M llvm/test/CodeGen/AMDGPU/call-constant.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-register-pressure.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-vgpr-limit.ll
    M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
    A llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
    A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
    M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
    A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
    M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
    A llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
    M llvm/test/CodeGen/ARM/module-target-abi.ll
    M llvm/test/CodeGen/DirectX/LoadInput.ll
    A llvm/test/CodeGen/DirectX/LongVector/wave-readlane-first.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
    M llvm/test/CodeGen/DirectX/StoreOutput.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst_mat.ll
    M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Bits/btst.ll
    M llvm/test/CodeGen/M68k/Control/cmp.ll
    M llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
    M llvm/test/CodeGen/M68k/Control/setcc.ll
    M llvm/test/CodeGen/M68k/Data/load-extend.ll
    M llvm/test/CodeGen/M68k/Data/sext-i1.ll
    M llvm/test/CodeGen/M68k/register-spills.ll
    M llvm/test/CodeGen/Mips/extins.ll
    M llvm/test/CodeGen/Mips/msa/bitcast.ll
    A llvm/test/CodeGen/Mips/msa/f16vec-shuffle.ll
    A llvm/test/CodeGen/Mips/target-abi-module-flag.ll
    M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
    M llvm/test/CodeGen/RISCV/module-asm-features.ll
    M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
    A llvm/test/CodeGen/RISCV/rvp-widening-shift.ll
    M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/wave-readlane-first.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst_mat.ll
    A llvm/test/CodeGen/SystemZ/zos-frame-callee-saved.ll
    M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
    M llvm/test/CodeGen/SystemZ/zos-ret-addr.ll
    M llvm/test/CodeGen/SystemZ/zos-section-1.ll
    M llvm/test/CodeGen/SystemZ/zos-section-2.ll
    M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
    R llvm/test/CodeGen/WebAssembly/coalesce-features-thread-model.ll
    A llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/apx/bls-egpr.ll
    A llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/bzhi-standalone-mask.ll
    M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
    A llvm/test/CodeGen/X86/cmp-shrink-unsigned.ll
    M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
    A llvm/test/CodeGen/X86/fpcw-dead-eflags.ll
    M llvm/test/CodeGen/X86/llvm.frexp.ll
    A llvm/test/DebugInfo/AArch64/dbg-value-arg-index-out-of-range.ll
    A llvm/test/DebugInfo/Generic/compileunit-source-language-name-roc.ll
    M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
    M llvm/test/LTO/RISCV/module-asm.ll
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err-fake16.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err.s
    M llvm/test/MC/RISCV/mapping-across-sections.s
    M llvm/test/MC/WebAssembly/reloc-pic64.s
    M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
    A llvm/test/Transforms/HotColdSplit/split-out-dbg-val-arglist.ll
    M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
    A llvm/test/Transforms/InstCombine/pr226504-commuted.ll
    A llvm/test/Transforms/InstCombine/pr226504.ll
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
    M llvm/test/Transforms/LICM/hoist-binop.ll
    A llvm/test/Transforms/LoopFusion/guard_skip_empty_block.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/diff-checks-force-interleave-count.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-fixed-vf-no-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/sve-induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/countable-early-exit-no-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
    M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-load-live-out.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
    M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
    M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/intrinsic.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
    M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
    M llvm/test/Transforms/LoopVectorize/pr35773.ll
    M llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
    M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
    M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
    M llvm/test/Transforms/LoopVectorize/predicated-single-exit.ll
    M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
    M llvm/test/Transforms/LoopVectorize/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
    A llvm/test/Transforms/MergeFunc/redirect-call-debug-loc.ll
    R llvm/test/Transforms/PGOProfile/Inputs/indirect_call.proftext
    M llvm/test/Transforms/PGOProfile/indirect_call_annotation.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/ordered-reduction-of-loads.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduced-value-next-to-fused-fmul.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-sunk-into-fadd-block.ll
    M llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/ordered-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll
    A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-gathered-leftover-leaf.ll
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-minbw-root.ll
    M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
    A llvm/test/Transforms/SLPVectorizer/X86/strength-reducible-address.ll
    A llvm/test/Transforms/SLPVectorizer/X86/trimmed-node-matching-gather-emitted-first.ll
    M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
    A llvm/test/Transforms/SimplifyCFG/AArch64/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/RISCV/speculate-mask-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/X86/speculate-mask-phi-select-cost.ll
    M llvm/test/Transforms/SimplifyCFG/hoist-common-skip.ll
    A llvm/test/Verifier/bitextract-bitinsert-invalid-verifier.ll
    A llvm/test/Verifier/dbg-record-expression-arg-out-of-range.ll
    A llvm/test/tools/llubi/main_declaration.ll
    M llvm/test/tools/llvm-ir2vec/entities.ll
    M llvm/test/tools/llvm-ir2vec/triplets.ll
    M llvm/test/tools/llvm-objdump/MachO/AArch64/macho-arm64-subtypes.test
    M llvm/test/tools/llvm-objdump/MachO/universal-arm64.test
    A llvm/test/tools/llvm-strings/chunk-boundary.test
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map-pgo-analysis-map.yaml
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map.yaml
    A llvm/test/tools/yaml2obj/COFF/section-semantic-content.yaml
    M llvm/tools/dsymutil/DwarfLinkerForBinary.h
    M llvm/tools/llubi/llubi.cpp
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
    M llvm/tools/llvm-cov/CodeCoverage.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-objdump/COFFDump.h
    M llvm/tools/llvm-objdump/ELFDump.h
    M llvm/tools/llvm-objdump/OffloadDump.cpp
    M llvm/tools/llvm-objdump/WasmDump.h
    M llvm/tools/llvm-profgen/PerfReader.h
    M llvm/tools/llvm-strings/llvm-strings.cpp
    M llvm/unittests/ADT/DenseMapTest.cpp
    M llvm/unittests/ADT/StringRefTest.cpp
    M llvm/unittests/Analysis/IR2VecTest.cpp
    M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
    M llvm/unittests/Support/CommandLineTest.cpp
    M llvm/unittests/Support/LLVMToolSession/LLVMToolSessionTest.cpp
    M llvm/unittests/Support/raw_socket_stream_test.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
    M llvm/utils/LLVMVisualizers/llvm.natvis
    M llvm/utils/gdb-scripts/prettyprinters.py
    M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
    M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
    M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
    M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
    M llvm/utils/lldbDataFormatters.py
    M mlir/docs/DefiningDialects/Operations.md
    M mlir/docs/DefiningDialects/_index.md
    M mlir/docs/Interfaces.md
    M mlir/docs/ReleaseNotes.md
    M mlir/examples/toy/Ch4/include/toy/Ops.td
    M mlir/examples/toy/Ch5/include/toy/Ops.td
    M mlir/examples/toy/Ch6/include/toy/Ops.td
    M mlir/examples/toy/Ch7/include/toy/Ops.td
    M mlir/include/mlir-c/Rewrite.h
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUBase.td
    M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
    M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
    M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
    M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
    M mlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationBase.td
    M mlir/include/mlir/Dialect/Complex/IR/ComplexBase.td
    M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
    M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
    M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
    M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
    M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
    M mlir/include/mlir/Dialect/IRDL/IR/IRDL.td
    M mlir/include/mlir/Dialect/Index/IR/IndexDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td
    M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
    M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
    M mlir/include/mlir/Dialect/MLProgram/IR/MLProgramBase.td
    M mlir/include/mlir/Dialect/MPI/IR/MPI.td
    M mlir/include/mlir/Dialect/Math/IR/MathBase.td
    M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
    M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/include/mlir/Dialect/PDL/IR/PDLDialect.td
    M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
    M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
    M mlir/include/mlir/Dialect/Quant/IR/QuantBase.td
    M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
    M mlir/include/mlir/Dialect/SMT/IR/SMTDialect.td
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
    M mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td
    M mlir/include/mlir/Dialect/Shard/IR/ShardBase.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorInterfaces.td
    M mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
    M mlir/include/mlir/Dialect/UB/IR/UBOps.td
    M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
    M mlir/include/mlir/Dialect/Vector/IR/Vector.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSABase.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAInterfaces.td
    M mlir/include/mlir/Dialect/X86/X86.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
    M mlir/include/mlir/IR/BuiltinOps.td
    M mlir/include/mlir/IR/DialectBase.td
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
    M mlir/lib/CAPI/Transforms/Rewrite.cpp
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
    M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
    M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
    M mlir/lib/IR/BuiltinTypes.cpp
    M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
    M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
    M mlir/python/mlir/dialects/ext.py
    M mlir/test/Analysis/DataFlow/test-last-modified-callgraph.mlir
    M mlir/test/Analysis/DataFlow/test-last-modified.mlir
    M mlir/test/Analysis/DataFlow/test-next-access.mlir
    M mlir/test/Analysis/DataFlow/test-strided-metadata-range-analysis.mlir
    M mlir/test/CAPI/CMakeLists.txt
    M mlir/test/CAPI/rewrite.c
    M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
    M mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
    M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
    M mlir/test/Dialect/Affine/int-range-interface.mlir
    M mlir/test/Dialect/Affine/simplify-min-max-ops.mlir
    M mlir/test/Dialect/Affine/simplify-with-bounds.mlir
    M mlir/test/Dialect/Affine/transform-op-simplify-min-max-ops.mlir
    M mlir/test/Dialect/Arith/int-range-analysis-convergence.mlir
    M mlir/test/Dialect/Arith/int-range-interface.mlir
    M mlir/test/Dialect/Arith/int-range-loop-iter-args.mlir
    M mlir/test/Dialect/Arith/int-range-narrowing.mlir
    M mlir/test/Dialect/Arith/int-range-opts-bug-119045.mlir
    M mlir/test/Dialect/Arith/int-range-opts.mlir
    M mlir/test/Dialect/GPU/decompose-memrefs.mlir
    M mlir/test/Dialect/GPU/int-range-interface-cluster.mlir
    M mlir/test/Dialect/GPU/int-range-interface.mlir
    M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir
    M mlir/test/Dialect/LLVMIR/roundtrip.mlir
    M mlir/test/Dialect/Linalg/erase-unused-operands-and-results.mlir
    M mlir/test/Dialect/Linalg/swap-extract-slice-with-fill.mlir
    A mlir/test/Dialect/Linalg/td/erase-unused-operands-and-results.mlir
    A mlir/test/Dialect/Linalg/td/swap-extract-slice-with-fill.mlir
    R mlir/test/Dialect/Linalg/transform-op-swap-extract-slice-with-fill.mlir
    M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
    M mlir/test/Dialect/MemRef/canonicalize.mlir
    M mlir/test/Dialect/MemRef/elide-reinterpret-cast-load.mlir
    M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
    M mlir/test/Dialect/MemRef/int-range-inference.mlir
    M mlir/test/Dialect/MemRef/ops.mlir
    M mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
    M mlir/test/Dialect/OpenMP/invalid.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Dialect/Tensor/int-range-inference.mlir
    M mlir/test/Dialect/Tosa/canonicalize.mlir
    M mlir/test/Dialect/Tosa/constant_folding.mlir
    M mlir/test/Dialect/Tosa/ops.mlir
    M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
    M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
    M mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold-dense-resource.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
    M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
    M mlir/test/Dialect/Vector/int-range-interface.mlir
    M mlir/test/IR/attribute.mlir
    M mlir/test/IR/module-op.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_gemm_bf16.mlir
    R mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F8.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops-invalid.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops.mlir
    M mlir/test/Target/LLVMIR/Import/intrinsic.ll
    M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
    M mlir/test/Target/LLVMIR/llvmir.mlir
    M mlir/test/Target/LLVMIR/openmp-allocate-clause.mlir
    A mlir/test/Target/LLVMIR/openmp-scope-allocate-clause.mlir
    M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir
    M mlir/test/Transforms/loop-invariant-code-motion.mlir
    M mlir/test/Transforms/make-composed-folded-affine-apply.mlir
    M mlir/test/Transforms/sccp-callgraph.mlir
    M mlir/test/Transforms/test-symbol-dce.mlir
    M mlir/test/lib/Dialect/Test/TestOps.td
    M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
    M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
    M mlir/test/mlir-tblgen/constant-str-attr-invalid.mlir
    M mlir/test/mlir-tblgen/op-format-invalid.td
    M mlir/test/mlir-tblgen/op-format.mlir
    M mlir/test/mlir-tblgen/op-format.td
    M mlir/test/mlir-tblgen/op-interface.td
    M mlir/test/mlir-tblgen/pattern.mlir
    M mlir/test/python/dialects/ext.py
    M mlir/test/python/dialects/ml_program.py
    M mlir/test/python/dialects/python_test.py
    M mlir/test/python/dialects/transform.py
    M mlir/test/python/python_test_ops.td
    M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
    M offload/include/Shared/SourceInfo.h
    M offload/plugins-nextgen/level_zero/src/L0Program.cpp
    M offload/test/offloading/info.c
    A offload/test/offloading/shared_lib_global_var.c
    M openmp/docs/ReleaseNotes.md
    M orc-rt/cmake/OrcRTTesting.cmake
    M orc-rt/include/CMakeLists.txt
    A orc-rt/include/orc-rt-c/support/LogLevel.h
    M orc-rt/include/orc-rt-c/support/Logging.h
    M orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
    M orc-rt/include/orc-rt/bedrock/Session.h
    M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
    M orc-rt/include/orc-rt/support/bind.h
    M orc-rt/lib/bedrock/ConnectorRegistry.cpp
    M orc-rt/lib/bedrock/Session.cpp
    M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
    M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
    A orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
    M orc-rt/test/regression/README.md
    M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
    M orc-rt/test/regression/jit-free-foundations/lit.local.cfg
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-pointer-in-data.c
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-store.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-array-element-load.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-data-load.c
    M orc-rt/test/regression/languages/c/lit.local.cfg
    M orc-rt/test/regression/languages/c/return-zero.c
    M orc-rt/test/regression/lit.cfg.py
    M orc-rt/test/regression/object-formats/lit.local.cfg
    M orc-rt/test/regression/object-formats/mach-o/arm64/return-zero.s
    M orc-rt/test/tools/orc-rt-process-info-check.cpp
    M orc-rt/test/unit/CMakeLists.txt
    M orc-rt/test/unit/CommonTestUtils.h
    M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
    M orc-rt/test/unit/bedrock/SessionTest.cpp
    R orc-rt/test/unit/bedrock/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/SocketTestUtils.h
    M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
    A orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
    M orc-rt/test/unit/support/LoggingTest.cpp
    M orc-rt/test/unit/support/bind-test.cpp
    M orc-rt/tools/ogre/CMakeLists.txt
    M orc-rt/tools/ogre/ogre.cpp
    M polly/lib/Analysis/ScopBuilder.cpp
    M polly/test/CodeGen/OpenMP/single_loop_with_loop_invariant_baseptr.ll
    M polly/test/ScopInfo/issue190128.ll
    M polly/test/ScopInfo/simple_loop_unsigned.ll
    A polly/test/ScopInfo/zext-loop-bound-unbounded.ll
    M utils/bazel/MODULE.bazel.lock
    M utils/bazel/linux_uapi.bzl
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
    M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
    M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
    M utils/docs/llvm_sphinx/ext/absolute_links.py
    M utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md

  Log Message:
  -----------
  Merge branch 'main' into users/zGoldthorpe/wide-copies/precommit


  Commit: 98089d284573dfa8d8ca9057260a9aceccf94668
      https://github.com/llvm/llvm-project/commit/98089d284573dfa8d8ca9057260a9aceccf94668
  Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M .ci/green-dragon/lldb-windows.groovy
    M .github/workflows/bazel-checks.yml
    M .github/workflows/build-ci-container-tooling.yml
    M .github/workflows/build-ci-container-windows.yml
    M .github/workflows/build-ci-container.yml
    M .github/workflows/build-libc-container.yml
    M .github/workflows/build-metrics-container.yml
    M .github/workflows/check-ci.yml
    M .github/workflows/ci-post-commit-analyzer.yml
    M .github/workflows/commit-access-review.yml
    M .github/workflows/compiler-rt-libc-builtins-tests.yml
    M .github/workflows/docs.yml
    M .github/workflows/email-check.yaml
    M .github/workflows/get-llvm-version/action.yml
    M .github/workflows/gha-codeql.yml
    M .github/workflows/hlsl-test-all.yaml
    M .github/workflows/ids-check.yml
    M .github/workflows/issue-release-workflow.yml
    M .github/workflows/issue-write.yml
    M .github/workflows/libc-freebsd-vm-tests.yml
    M .github/workflows/libc-fullbuild-tests.yml
    M .github/workflows/libc-overlay-tests.yml
    M .github/workflows/libc-shared-tests.yml
    M .github/workflows/libclang-abi-tests.yml
    M .github/workflows/libcxx-benchmark-commit.yml
    M .github/workflows/libcxx-benchmark-cron.yml
    A .github/workflows/libcxx-benchmark-libstdcxx.yml
    M .github/workflows/libcxx-build-containers.yml
    M .github/workflows/libcxx-pr-benchmark.yml
    M .github/workflows/libcxx-pr-check-generated-files.yml
    M .github/workflows/libcxx-pr-conformance-tests.yaml
    M .github/workflows/libcxx-pr-test-tools.yml
    M .github/workflows/lldb-pylint-action.yml
    M .github/workflows/llvm-abi-tests.yml
    M .github/workflows/llvm-bugs.yml
    M .github/workflows/mlir-spirv-tests.yml
    M .github/workflows/new-prs.yml
    M .github/workflows/pr-code-format.yml
    M .github/workflows/pr-code-lint.yml
    M .github/workflows/premerge.yaml
    M .github/workflows/prune-branches.yml
    M .github/workflows/release-asset-audit.yml
    M .github/workflows/release-binaries.yml
    M .github/workflows/release-documentation.yml
    M .github/workflows/release-llvm-testing-tools.yml
    M .github/workflows/release-sources.yml
    M .github/workflows/release-tasks.yml
    M .github/workflows/scorecard.yml
    M .github/workflows/spirv-tests.yml
    M .github/workflows/sycl-tests.yml
    M .github/workflows/test-suite.yml
    M .github/workflows/test-unprivileged-download-artifact.yml
    M .github/workflows/upload-release-artifact/action.yml
    M .github/workflows/version-check.yml
    M .github/workflows/zizmor.yml
    M bolt/docs/conf.py
    M bolt/lib/Passes/BinaryPasses.cpp
    M bolt/lib/Passes/ReorderFunctions.cpp
    M bolt/lib/Profile/DataAggregator.cpp
    M clang-tools-extra/clang-tidy/bugprone/RedundantBranchConditionCheck.cpp
    M clang-tools-extra/clang-tidy/readability/TrailingCommaCheck.cpp
    M clang-tools-extra/clangd/tool/ClangdMain.cpp
    M clang-tools-extra/docs/ReleaseNotes.md
    M clang-tools-extra/test/clang-tidy/checkers/bugprone/redundant-branch-condition.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma-cxx11.cpp
    M clang-tools-extra/test/clang-tidy/checkers/readability/trailing-comma.cpp
    M clang/docs/AllocToken.md
    M clang/docs/ClangLinkerWrapper.md
    M clang/docs/ClangOffloadBundler.md
    M clang/docs/ClangTransformerTutorial.md
    M clang/docs/ControlFlowIntegrity.md
    M clang/docs/ControlFlowIntegrityDesign.md
    M clang/docs/InternalsManual.md
    M clang/docs/IntroductionToTheClangAST.md
    M clang/docs/LanguageExtensions.md
    M clang/docs/LibASTImporter.md
    M clang/docs/LifetimeSafety.md
    M clang/docs/ReleaseNotes.md
    M clang/docs/SafeBuffers.md
    M clang/docs/ScalableStaticAnalysis/user-docs/SummaryExtraction.md
    M clang/docs/WarningSuppressionMappings.md
    M clang/docs/analyzer/checkers.md
    M clang/docs/analyzer/user-docs/Annotations.md
    M clang/docs/conf.py
    M clang/include/clang/AST/APValue.h
    M clang/include/clang/AST/ASTContext.h
    M clang/include/clang/AST/CharUnits.h
    M clang/include/clang/AST/MatrixUtils.h
    M clang/include/clang/AST/NestedNameSpecifierBase.h
    M clang/include/clang/AST/PropertiesBase.td
    M clang/include/clang/AST/TypeBase.h
    M clang/include/clang/AST/TypeProperties.td
    M clang/include/clang/Basic/AttrDocs.td
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/BuiltinsRISCV.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/include/clang/Basic/HLSLIntrinsics.td
    M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
    M clang/include/clang/CIR/Dialect/IR/CIRAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRCUDAAttrs.td
    M clang/include/clang/CIR/Dialect/IR/CIRDialect.td
    M clang/include/clang/CIR/Dialect/IR/CIROps.td
    M clang/include/clang/CodeGen/CodeGenAction.h
    M clang/include/clang/Interpreter/Interpreter.h
    A clang/include/clang/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodFamily.h
    M clang/include/clang/ScalableStaticAnalysis/BuiltinAnchorSources.def
    M clang/include/clang/Sema/SemaHLSL.h
    M clang/lib/AST/APValue.cpp
    M clang/lib/AST/ASTContext.cpp
    M clang/lib/AST/ASTImporter.cpp
    M clang/lib/AST/ByteCode/Compiler.cpp
    M clang/lib/AST/ByteCode/Interp.cpp
    M clang/lib/AST/ByteCode/Interp.h
    M clang/lib/AST/ByteCode/Opcodes.td
    M clang/lib/AST/ByteCode/Pointer.cpp
    M clang/lib/AST/ByteCode/Pointer.h
    M clang/lib/AST/ExprConstant.cpp
    M clang/lib/AST/NestedNameSpecifier.cpp
    M clang/lib/AST/Type.cpp
    M clang/lib/Analysis/UnsafeBufferUsage.cpp
    M clang/lib/Basic/Targets/WebAssembly.cpp
    M clang/lib/Basic/Targets/WebAssembly.h
    M clang/lib/CIR/CodeGen/CIRGenBuilder.h
    M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
    M clang/lib/CIR/CodeGen/CIRGenCUDANV.cpp
    M clang/lib/CIR/CodeGen/CIRGenDecl.cpp
    M clang/lib/CIR/CodeGen/CIRGenExprCXX.cpp
    M clang/lib/CIR/CodeGen/CIRGenModule.cpp
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.cpp
    M clang/lib/CIR/CodeGen/CIRGenOpenMPClause.h
    M clang/lib/CIR/CodeGen/CIRGenStmtOpenMP.cpp
    M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
    M clang/lib/CIR/Dialect/Transforms/CXXABILowering.cpp
    M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
    M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
    M clang/lib/CodeGen/BackendConsumer.h
    M clang/lib/CodeGen/CGBlocks.cpp
    M clang/lib/CodeGen/CGExpr.cpp
    M clang/lib/CodeGen/CGExprScalar.cpp
    M clang/lib/CodeGen/CGHLSLBuiltins.cpp
    M clang/lib/CodeGen/CGHLSLRuntime.h
    M clang/lib/CodeGen/CGLoopInfo.cpp
    M clang/lib/CodeGen/CodeGenAction.cpp
    M clang/lib/CodeGen/CodeGenTypes.cpp
    M clang/lib/CodeGen/TargetBuiltins/ARM.cpp
    M clang/lib/CodeGen/TargetBuiltins/NVPTX.cpp
    M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
    M clang/lib/Format/ContinuationIndenter.cpp
    M clang/lib/Headers/riscv_packed_simd.h
    M clang/lib/Interpreter/CMakeLists.txt
    M clang/lib/Interpreter/DeviceOffload.cpp
    M clang/lib/Interpreter/DeviceOffload.h
    M clang/lib/Interpreter/IncrementalAction.cpp
    M clang/lib/Interpreter/Interpreter.cpp
    M clang/lib/Lex/HeaderSearch.cpp
    M clang/lib/ScalableStaticAnalysis/Analyses/CMakeLists.txt
    A clang/lib/ScalableStaticAnalysis/Analyses/VirtualMethodFamily/VirtualMethodEntityExtractor.cpp
    M clang/lib/Sema/SemaARM.cpp
    M clang/lib/Sema/SemaExpr.cpp
    M clang/lib/Sema/SemaHLSL.cpp
    M clang/lib/Sema/SemaOpenACCAtomic.cpp
    M clang/lib/Sema/SemaOpenMP.cpp
    M clang/lib/Sema/SemaOverload.cpp
    M clang/lib/Sema/SemaStmt.cpp
    M clang/lib/Sema/SemaType.cpp
    M clang/lib/Sema/TreeTransform.h
    M clang/lib/Serialization/ASTWriterStmt.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
    M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
    M clang/test/AST/ByteCode/references.cpp
    M clang/test/AST/HLSL/matrix_layout_attr.hlsl
    M clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
    M clang/test/Analysis/Checkers/WebKit/unborrowed-call-args.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
    M clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-preserves-unrelated-zero-length-insert.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/conflict-stderr-without-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/empty-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/identical-overlap.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/no-conflict-sarif-empty.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/non-overlapping.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/order-invariance.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-identical-non-zero-length.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/pre-dedup-zero-length-insert.test
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    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/sarif-out-parent-dir-missing.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input-internal-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/single-input.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-all-conflict.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/three-input-conflict-sarif.test
    M clang/test/Analysis/Scalable/ssaf-src-edit-merge/two-conflicts-different-offsets-sarif.test
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    M llvm/include/llvm/IR/IntrinsicsDirectX.td
    M llvm/include/llvm/IR/IntrinsicsNVVM.td
    M llvm/include/llvm/IR/IntrinsicsRISCV.td
    M llvm/include/llvm/IR/IntrinsicsSPIRV.td
    M llvm/include/llvm/IR/NoFolder.h
    M llvm/include/llvm/Object/ELFTypes.h
    M llvm/include/llvm/ObjectYAML/COFFYAML.h
    M llvm/include/llvm/Support/AArch64MemoryHints.h
    M llvm/include/llvm/Support/CommandLine.h
    M llvm/include/llvm/Target/TargetMachine.h
    M llvm/include/llvm/Transforms/IPO/InstrumentorUtils.h
    M llvm/include/llvm/Transforms/Scalar/GVN.h
    M llvm/include/llvm/Transforms/Utils/LoopUtils.h
    M llvm/include/llvm/Transforms/Vectorize/SLPVectorizer.h
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.h
    M llvm/include/llvm/Transforms/Vectorize/SandboxVectorizer/VecUtils.h
    M llvm/lib/Analysis/BasicAliasAnalysis.cpp
    M llvm/lib/Analysis/BranchProbabilityInfo.cpp
    M llvm/lib/Analysis/LoopAccessAnalysis.cpp
    M llvm/lib/Analysis/ScalarEvolution.cpp
    M llvm/lib/Analysis/TargetTransformInfo.cpp
    M llvm/lib/Analysis/TypeBasedAliasAnalysis.cpp
    M llvm/lib/Analysis/VectorUtils.cpp
    M llvm/lib/AsmParser/LLLexer.cpp
    M llvm/lib/AsmParser/LLParser.cpp
    M llvm/lib/BinaryFormat/Dwarf.cpp
    M llvm/lib/Bitcode/Reader/BitcodeReader.cpp
    M llvm/lib/Bitcode/Reader/MetadataLoader.cpp
    M llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
    M llvm/lib/CGData/CodeGenData.cpp
    M llvm/lib/CGData/CodeGenDataReader.cpp
    M llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
    M llvm/lib/CodeGen/CodeGenPrepare.cpp
    M llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
    M llvm/lib/CodeGen/GlobalISel/GISelValueTracking.cpp
    M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp
    M llvm/lib/CodeGen/MachineBasicBlock.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h
    M llvm/lib/CodeGen/TargetLoweringBase.cpp
    M llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
    M llvm/lib/DebugInfo/PDB/Native/LinePrinter.cpp
    M llvm/lib/ExecutionEngine/Orc/Debugging/PerfSupportPlugin.cpp
    M llvm/lib/ExecutionEngine/Orc/Debugging/VTuneSupportPlugin.cpp
    M llvm/lib/ExecutionEngine/Orc/ELFNixPlatform.cpp
    M llvm/lib/ExecutionEngine/Orc/MachOPlatform.cpp
    M llvm/lib/Frontend/OpenMP/OMPDescriptors.inc
    M llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
    M llvm/lib/IR/AsmWriter.cpp
    M llvm/lib/IR/AutoUpgrade.cpp
    M llvm/lib/IR/Core.cpp
    M llvm/lib/IR/Instruction.cpp
    M llvm/lib/IR/Instructions.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/LTO/LTO.cpp
    M llvm/lib/Linker/IRMover.cpp
    M llvm/lib/MC/ELFObjectWriter.cpp
    M llvm/lib/MC/GOFFObjectWriter.cpp
    M llvm/lib/MC/MCDwarf.cpp
    M llvm/lib/MC/WasmObjectWriter.cpp
    M llvm/lib/ObjectYAML/COFFEmitter.cpp
    M llvm/lib/ObjectYAML/COFFYAML.cpp
    M llvm/lib/ObjectYAML/DWARFEmitter.cpp
    M llvm/lib/Support/CMakeLists.txt
    A llvm/lib/Support/DenseMap.cpp
    M llvm/lib/Support/StringRef.cpp
    M llvm/lib/Support/raw_socket_stream.cpp
    M llvm/lib/Target/AArch64/AArch64CodeLayoutOpt.cpp
    M llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64PerfectShuffle.h
    M llvm/lib/Target/AArch64/AArch64TargetMachine.h
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
    M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
    M llvm/lib/Target/AMDGPU/AMDGPU.h
    M llvm/lib/Target/AMDGPU/AMDGPU.td
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
    M llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUMachineFunctionInfo.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUPassRegistry.def
    M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
    M llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h
    M llvm/lib/Target/AMDGPU/CMakeLists.txt
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/lib/Target/AMDGPU/GCNSubtarget.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    M llvm/lib/Target/AMDGPU/SIISelLowering.h
    M llvm/lib/Target/AMDGPU/SIInstrInfo.td
    A llvm/lib/Target/AMDGPU/SIPostRA16BitMovFolding.cpp
    M llvm/lib/Target/AMDGPU/VOP3Instructions.td
    M llvm/lib/Target/ARM/ARMInstructionSelector.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.cpp
    M llvm/lib/Target/ARM/ARMTargetMachine.h
    M llvm/lib/Target/ARM/ARMTargetObjectFile.cpp
    M llvm/lib/Target/ARM/ARMTargetObjectFile.h
    M llvm/lib/Target/AVR/AVRAsmPrinter.cpp
    M llvm/lib/Target/AVR/AVRDevices.td
    M llvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
    M llvm/lib/Target/AVR/AVRISelLowering.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.cpp
    M llvm/lib/Target/AVR/AVRInstrInfo.td
    M llvm/lib/Target/AVR/AVRRegisterInfo.cpp
    M llvm/lib/Target/AVR/AVRTargetMachine.h
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCAsmInfo.cpp
    M llvm/lib/Target/AVR/MCTargetDesc/AVRMCTargetDesc.h
    R llvm/lib/Target/AVR/TODO.md
    M llvm/lib/Target/DirectX/DXIL.td
    M llvm/lib/Target/DirectX/DXILOpBuilder.cpp
    M llvm/lib/Target/DirectX/DXILShaderFlags.cpp
    M llvm/lib/Target/Hexagon/HexagonConstPropagation.cpp
    M llvm/lib/Target/Hexagon/HexagonTargetMachine.h
    M llvm/lib/Target/LoongArch/LoongArchTargetMachine.h
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrArithmetic.td
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/lib/Target/M68k/M68kTargetObjectFile.cpp
    M llvm/lib/Target/M68k/M68kTargetObjectFile.h
    M llvm/lib/Target/MSP430/MSP430AsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsAsmPrinter.cpp
    M llvm/lib/Target/Mips/MipsAsmPrinter.h
    M llvm/lib/Target/Mips/MipsBranchExpansion.cpp
    M llvm/lib/Target/Mips/MipsCallLowering.cpp
    M llvm/lib/Target/Mips/MipsFastISel.cpp
    M llvm/lib/Target/Mips/MipsISelLowering.cpp
    M llvm/lib/Target/Mips/MipsMSAInstrInfo.td
    M llvm/lib/Target/Mips/MipsMachineFunction.cpp
    M llvm/lib/Target/Mips/MipsRegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp
    M llvm/lib/Target/Mips/MipsSEISelLowering.cpp
    M llvm/lib/Target/Mips/MipsSERegisterInfo.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.cpp
    M llvm/lib/Target/Mips/MipsSubtarget.h
    M llvm/lib/Target/Mips/MipsTargetMachine.cpp
    M llvm/lib/Target/Mips/MipsTargetMachine.h
    M llvm/lib/Target/NVPTX/NVPTXAsmPrinter.cpp
    M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
    M llvm/lib/Target/PowerPC/PPC.h
    M llvm/lib/Target/PowerPC/PPCTargetMachine.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVELFStreamer.h
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
    M llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
    M llvm/lib/Target/RISCV/RISCVAsmPrinter.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPostRA.cpp
    M llvm/lib/Target/RISCV/RISCVExpandPseudoPreEmit.cpp
    M llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
    M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
    M llvm/lib/Target/RISCV/RISCVInsertVSETVLI.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfo.cpp
    M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
    M llvm/lib/Target/RISCV/RISCVLoadStoreOptimizer.cpp
    M llvm/lib/Target/RISCV/RISCVProcessors.td
    M llvm/lib/Target/RISCV/RISCVSubtarget.h
    M llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
    M llvm/lib/Target/RISCV/RISCVTargetMachine.h
    M llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
    M llvm/lib/Target/RISCV/RISCVZilsdOptimizer.cpp
    M llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp
    M llvm/lib/Target/SPIRV/SPIRVSubtarget.cpp
    M llvm/lib/Target/Sparc/SparcISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZISelLowering.cpp
    M llvm/lib/Target/SystemZ/SystemZXPLINKAsmPrinter.cpp
    M llvm/lib/Target/VE/VEISelLowering.cpp
    M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
    M llvm/lib/Target/X86/GISel/X86LegalizerInfo.cpp
    M llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
    M llvm/lib/Target/X86/X86ISelLowering.cpp
    M llvm/lib/Target/X86/X86RegisterInfo.td
    M llvm/lib/Target/X86/X86TargetMachine.cpp
    M llvm/lib/Target/X86/X86TargetMachine.h
    M llvm/lib/TargetParser/Triple.cpp
    M llvm/lib/Transforms/IPO/Instrumentor.cpp
    M llvm/lib/Transforms/IPO/MergeFunctions.cpp
    M llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
    M llvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
    M llvm/lib/Transforms/Scalar/ConstraintElimination.cpp
    M llvm/lib/Transforms/Scalar/GVN.cpp
    M llvm/lib/Transforms/Scalar/LICM.cpp
    M llvm/lib/Transforms/Scalar/LoopFuse.cpp
    M llvm/lib/Transforms/Utils/BuildLibCalls.cpp
    M llvm/lib/Transforms/Utils/CodeExtractor.cpp
    M llvm/lib/Transforms/Utils/LoopUnroll.cpp
    M llvm/lib/Transforms/Utils/LoopUtils.cpp
    M llvm/lib/Transforms/Utils/SimplifyCFG.cpp
    M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
    M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
    M llvm/lib/Transforms/Vectorize/SLPVectorizer/SLPUtils.cpp
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/Passes/LoadStoreVec.cpp
    M llvm/lib/Transforms/Vectorize/SandboxVectorizer/VecUtils.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.cpp
    M llvm/lib/Transforms/Vectorize/VPlan.h
    M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
    M llvm/lib/Transforms/Vectorize/VPlanHelpers.h
    M llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
    M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
    M llvm/lib/Transforms/Vectorize/VPlanUtils.cpp
    M llvm/lib/Transforms/Vectorize/VPlanUtils.h
    M llvm/lib/Transforms/Vectorize/VPlanValue.h
    M llvm/lib/Transforms/Vectorize/VPlanVerifier.cpp
    M llvm/runtimes/CMakeLists.txt
    M llvm/test/Analysis/CostModel/AArch64/masked_ldst.ll
    M llvm/test/Analysis/CostModel/AArch64/speculative-load.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-arith.ll
    M llvm/test/Analysis/CostModel/AArch64/sve-ldst.ll
    M llvm/test/Analysis/CostModel/RISCV/vp-intrinsics.ll
    M llvm/test/Analysis/CostModel/X86/arith-fp.ll
    M llvm/test/Analysis/CostModel/X86/speculative-load.ll
    M llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt
    M llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt
    M llvm/test/Assembler/auto_upgrade_nvvm_intrinsics.ll
    A llvm/test/Assembler/bitinsert-bitextract-invalid.ll
    A llvm/test/Assembler/bitinsert-bitextract.ll
    A llvm/test/Assembler/invalid-diexpression-arg-negative.ll
    M llvm/test/Bitcode/compatibility.ll
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll
    A llvm/test/Bitcode/upgrade-tbaa-struct.ll.bc
    M llvm/test/Bitcode/upgrade-tbaa.ll
    A llvm/test/Bitcode/upgrade-tbaa.ll.bc
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv-ios.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/arm64-this-return.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-alias.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-ifunc.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-signext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-sret-demotion.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-zeroext.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-sret.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call-weak.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator-tail-call.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/call-translator.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/combiner-load-store-indexing.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/integration-shuffle-vector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/invoke-region.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-delayed-stack-protector.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-hoisted-constants.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-protector-trap-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unreachable.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-unwind-inline-asm.ll
    A llvm/test/CodeGen/AArch64/GlobalISel/knownbits-freeze.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/knownfpclass-ops.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-atan2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-bzero.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exceptions.ll
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-exp.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fexp2.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fmaxnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fminnum.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpenv.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-fpmode.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memcpy-et-al.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-memlib-debug-loc.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-modf.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-pow.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-rem.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sin.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/legalize-sinh.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-undef.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-sadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uadde.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-uaddo.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usube.mir
    M llvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
    M llvm/test/CodeGen/AArch64/add.ll
    M llvm/test/CodeGen/AArch64/andorxor.ll
    M llvm/test/CodeGen/AArch64/arm64-rev.ll
    M llvm/test/CodeGen/AArch64/arm64-storebytesmerge.ll
    M llvm/test/CodeGen/AArch64/binopshuffles.ll
    M llvm/test/CodeGen/AArch64/bitcast.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AArch64/bitinsert-bitextract.ll
    M llvm/test/CodeGen/AArch64/ctlz.ll
    M llvm/test/CodeGen/AArch64/ctpop.ll
    M llvm/test/CodeGen/AArch64/cttz.ll
    M llvm/test/CodeGen/AArch64/fp-intrinsics-vector.ll
    M llvm/test/CodeGen/AArch64/ldst-opt.ll
    M llvm/test/CodeGen/AArch64/lowmaskedlanes.ll
    M llvm/test/CodeGen/AArch64/mul.ll
    M llvm/test/CodeGen/AArch64/neon-rshrn.ll
    M llvm/test/CodeGen/AArch64/neon-truncstore.ll
    M llvm/test/CodeGen/AArch64/sadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/shufflevector.ll
    M llvm/test/CodeGen/AArch64/ssub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/store.ll
    M llvm/test/CodeGen/AArch64/sub.ll
    M llvm/test/CodeGen/AArch64/sve-extract-vector-to-predicate-store.ll
    A llvm/test/CodeGen/AArch64/sve-fixed-length-shuffle-reverse.ll
    M llvm/test/CodeGen/AArch64/sve-int-arith.ll
    M llvm/test/CodeGen/AArch64/uadd_sat_vec.ll
    M llvm/test/CodeGen/AArch64/usub_sat_vec.ll
    M llvm/test/CodeGen/AArch64/vec3-loads-ext-trunc-stores.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.intersect_ray.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/merge-values-s16-true16.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
    M llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
    M llvm/test/CodeGen/AMDGPU/add.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.1024bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.128bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.256bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.32bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.48bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.512bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.64bit.ll
    M llvm/test/CodeGen/AMDGPU/amdgcn.bitcast.96bit.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/AMDGPU/bitinsert-bitextract.ll
    M llvm/test/CodeGen/AMDGPU/call-constant.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation-direct-chain.ll
    M llvm/test/CodeGen/AMDGPU/dvgpr-vgpr-count-propagation.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-register-pressure.ll
    A llvm/test/CodeGen/AMDGPU/dynamic-vgpr-entry-vgpr-limit.ll
    M llvm/test/CodeGen/AMDGPU/dynamic-vgpr-reserve-stack-for-cwsr.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
    M llvm/test/CodeGen/AMDGPU/invalid-addrspacecast.ll
    A llvm/test/CodeGen/AMDGPU/lds-dynamic-direct-and-indirect-use.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline-npm.ll
    M llvm/test/CodeGen/AMDGPU/llc-pipeline.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.msaa.load.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.waitcnt.out.order.ll
    M llvm/test/CodeGen/AMDGPU/lower-work-group-id-intrinsics-pal.ll
    M llvm/test/CodeGen/AMDGPU/mad-mix-hi-bf16.ll
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx90a.mir
    M llvm/test/CodeGen/AMDGPU/mai-hazards-gfx942.mir
    A llvm/test/CodeGen/AMDGPU/phi-elimination-split-critical-edge-subranges.mir
    M llvm/test/CodeGen/AMDGPU/promote-alloca-vgpr-ratio.ll
    M llvm/test/CodeGen/AMDGPU/repeated-divisor.ll
    A llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store-codegen.ll
    M llvm/test/CodeGen/AMDGPU/rewrite-vgpr-mfma-to-agpr-spill-multi-store.ll
    M llvm/test/CodeGen/AMDGPU/scalar_to_vector.ll
    A llvm/test/CodeGen/AMDGPU/si-post-ra-merge-v-mov-b16.mir
    M llvm/test/CodeGen/AMDGPU/sub.v2i16.ll
    M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll
    M llvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/ARM/bitinsert-bitextract.ll
    M llvm/test/CodeGen/ARM/module-target-abi.ll
    M llvm/test/CodeGen/DirectX/LoadInput.ll
    A llvm/test/CodeGen/DirectX/LongVector/wave-readlane-first.ll
    M llvm/test/CodeGen/DirectX/ShaderFlags/wave-ops.ll
    M llvm/test/CodeGen/DirectX/StoreOutput.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/DirectX/WaveReadLaneFirst_mat.ll
    M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Bits/btst.ll
    M llvm/test/CodeGen/M68k/Control/cmp.ll
    M llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
    M llvm/test/CodeGen/M68k/Control/setcc.ll
    M llvm/test/CodeGen/M68k/Data/load-extend.ll
    M llvm/test/CodeGen/M68k/Data/sext-i1.ll
    M llvm/test/CodeGen/M68k/register-spills.ll
    M llvm/test/CodeGen/Mips/extins.ll
    M llvm/test/CodeGen/Mips/msa/bitcast.ll
    A llvm/test/CodeGen/Mips/msa/f16vec-shuffle.ll
    A llvm/test/CodeGen/Mips/target-abi-module-flag.ll
    M llvm/test/CodeGen/NVPTX/mulhi-intrins.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/PowerPC/bitinsert-bitextract.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/RISCV/bitinsert-bitextract.ll
    M llvm/test/CodeGen/RISCV/module-asm-features.ll
    M llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
    M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
    A llvm/test/CodeGen/RISCV/rvp-widening-shift.ll
    M llvm/test/CodeGen/RISCV/rvv/trunc-select-to-max-usat.ll
    A llvm/test/CodeGen/SPIRV/extensions/SPV_EXT_long_vector/wave-readlane-first.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst.ll
    A llvm/test/CodeGen/SPIRV/hlsl-intrinsics/WaveReadLaneFirst_mat.ll
    A llvm/test/CodeGen/SystemZ/zos-frame-callee-saved.ll
    M llvm/test/CodeGen/SystemZ/zos-frameaddr.ll
    M llvm/test/CodeGen/SystemZ/zos-ret-addr.ll
    M llvm/test/CodeGen/SystemZ/zos-section-1.ll
    M llvm/test/CodeGen/SystemZ/zos-section-2.ll
    M llvm/test/CodeGen/SystemZ/zos-symbol-2.ll
    R llvm/test/CodeGen/WebAssembly/coalesce-features-thread-model.ll
    A llvm/test/CodeGen/X86/GlobalISel/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/apx/bls-egpr.ll
    A llvm/test/CodeGen/X86/apx/ccmp-flag-source.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-common-offsets.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract-fp.ll
    A llvm/test/CodeGen/X86/bitinsert-bitextract.ll
    A llvm/test/CodeGen/X86/bzhi-standalone-mask.ll
    M llvm/test/CodeGen/X86/cmp-shiftX-maskX.ll
    A llvm/test/CodeGen/X86/cmp-shrink-unsigned.ll
    M llvm/test/CodeGen/X86/fp-intrinsics-flags.ll
    A llvm/test/CodeGen/X86/fpcw-dead-eflags.ll
    M llvm/test/CodeGen/X86/llvm.frexp.ll
    A llvm/test/DebugInfo/AArch64/dbg-value-arg-index-out-of-range.ll
    A llvm/test/DebugInfo/Generic/compileunit-source-language-name-roc.ll
    M llvm/test/Instrumentation/MemorySanitizer/AArch64/arm64-vmax.ll
    M llvm/test/LTO/RISCV/module-asm.ll
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3-fake16.s
    M llvm/test/MC/AMDGPU/gfx13_asm_vop3.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err-fake16.s
    A llvm/test/MC/AMDGPU/gfx13_asm_vop3_from_vop1_err.s
    M llvm/test/MC/RISCV/mapping-across-sections.s
    M llvm/test/MC/WebAssembly/reloc-pic64.s
    M llvm/test/Transforms/ConstraintElimination/analysis-invalidation.ll
    A llvm/test/Transforms/HotColdSplit/split-out-dbg-val-arglist.ll
    M llvm/test/Transforms/InferFunctionAttrs/annotate.ll
    M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
    A llvm/test/Transforms/InstCombine/pr226504-commuted.ll
    A llvm/test/Transforms/InstCombine/pr226504.ll
    M llvm/test/Transforms/InstCombine/struct-assign-tbaa.ll
    M llvm/test/Transforms/LICM/hoist-binop.ll
    A llvm/test/Transforms/LoopFusion/guard_skip_empty_block.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/conditional-scalar-assignment.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/diff-checks-force-interleave-count.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/early_exit_costs.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/epilog-vectorization-widen-inductions.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/force-scalable-vectorization-always.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/invalid-costs.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/low-trip-count-fixed-vf-no-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-alloca.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-call.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/scalable-vectorization-cost-tuning.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/simple_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll
    A llvm/test/Transforms/LoopVectorize/AArch64/sve-induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/AArch64/sve-low-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment-fold-tail.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/countable-early-exit-no-epilogue.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/early-exit-live-out.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/short-trip-count.ll
    M llvm/test/Transforms/LoopVectorize/RISCV/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/execution-frequencies-match-bfi.ll
    M llvm/test/Transforms/LoopVectorize/VPlan/uncountable-early-exit-vplan.ll
    M llvm/test/Transforms/LoopVectorize/X86/conditional-scalar-assignment.ll
    M llvm/test/Transforms/LoopVectorize/X86/pr36524.ll
    M llvm/test/Transforms/LoopVectorize/X86/predicated-instruction-cost.ll
    M llvm/test/Transforms/LoopVectorize/dereferenceable-info-from-assumption-constant-size.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-calls.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-load-live-out.ll
    M llvm/test/Transforms/LoopVectorize/early-exit-unary-ops.ll
    M llvm/test/Transforms/LoopVectorize/find-last-ptr-induction.ll
    M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll
    M llvm/test/Transforms/LoopVectorize/induction.ll
    M llvm/test/Transforms/LoopVectorize/intrinsic.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-non-const-iv-start.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp-trunc.ll
    M llvm/test/Transforms/LoopVectorize/iv-select-cmp.ll
    M llvm/test/Transforms/LoopVectorize/multiple-early-exits.ll
    M llvm/test/Transforms/LoopVectorize/pr30654-phiscev-sext-trunc.ll
    M llvm/test/Transforms/LoopVectorize/pr35773.ll
    M llvm/test/Transforms/LoopVectorize/predicated-early-exits-interleave.ll
    M llvm/test/Transforms/LoopVectorize/predicated-inductions.ll
    M llvm/test/Transforms/LoopVectorize/predicated-multiple-exits.ll
    M llvm/test/Transforms/LoopVectorize/predicated-single-exit.ll
    M llvm/test/Transforms/LoopVectorize/replicate-region-branch-weights.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-cond-poison.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-deref-assumptions.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave-only.ll
    M llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll
    M llvm/test/Transforms/LoopVectorize/single-value-blend-phis.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit.ll
    M llvm/test/Transforms/LoopVectorize/single_early_exit_live_outs.ll
    M llvm/test/Transforms/LoopVectorize/sink-to-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll
    M llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-predicated-early-exit.ll
    A llvm/test/Transforms/MergeFunc/redirect-call-debug-loc.ll
    R llvm/test/Transforms/PGOProfile/Inputs/indirect_call.proftext
    M llvm/test/Transforms/PGOProfile/indirect_call_annotation.ll
    M llvm/test/Transforms/PhaseOrdering/AArch64/reassociate-fma-pairs.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/extracts-folded-into-fmul-users-no-credit.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-candidates-after-store-chains.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fma-chain-no-alt-node-reduction.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/hor-fp-reduction-instcount.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/ordered-reduction-of-loads.ll
    A llvm/test/Transforms/SLPVectorizer/AArch64/reduced-value-next-to-fused-fmul.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/reduction-root-multi-use-fma.ll
    M llvm/test/Transforms/SLPVectorizer/AArch64/vec3-reorder-reshuffle.ll
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/cross-block-fmul-fadd.ll
    A llvm/test/Transforms/SLPVectorizer/AMDGPU/fmul-sunk-into-fadd-block.ll
    M llvm/test/Transforms/SLPVectorizer/NVPTX/ordered-reduction-fma-fusion.ll
    M llvm/test/Transforms/SLPVectorizer/RISCV/ordered-reduction.ll
    A llvm/test/Transforms/SLPVectorizer/RISCV/trimmed-node-matching-gather.ll
    A llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields-shifted-trunc.ll
    M llvm/test/Transforms/SLPVectorizer/X86/extracted-subfields.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
    M llvm/test/Transforms/SLPVectorizer/X86/fsub-fmul-rhs-combine.ll
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-gathered-leftover-leaf.ll
    A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-minbw-root.ll
    M llvm/test/Transforms/SLPVectorizer/X86/runtime-alias-checks.ll
    M llvm/test/Transforms/SLPVectorizer/X86/slp-fma-loss-ordered.ll
    A llvm/test/Transforms/SLPVectorizer/X86/strength-reducible-address.ll
    A llvm/test/Transforms/SLPVectorizer/X86/trimmed-node-matching-gather-emitted-first.ll
    M llvm/test/Transforms/SLPVectorizer/consecutive-access.ll
    A llvm/test/Transforms/SimplifyCFG/AArch64/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/ARM/speculate-vector-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/RISCV/speculate-mask-phi-select-cost.ll
    A llvm/test/Transforms/SimplifyCFG/X86/speculate-mask-phi-select-cost.ll
    M llvm/test/Transforms/SimplifyCFG/hoist-common-skip.ll
    A llvm/test/Verifier/bitextract-bitinsert-invalid-verifier.ll
    A llvm/test/Verifier/dbg-record-expression-arg-out-of-range.ll
    A llvm/test/tools/llubi/main_declaration.ll
    M llvm/test/tools/llvm-ir2vec/entities.ll
    M llvm/test/tools/llvm-ir2vec/triplets.ll
    M llvm/test/tools/llvm-objdump/MachO/AArch64/macho-arm64-subtypes.test
    M llvm/test/tools/llvm-objdump/MachO/universal-arm64.test
    A llvm/test/tools/llvm-strings/chunk-boundary.test
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map-pgo-analysis-map.yaml
    A llvm/test/tools/yaml2obj/COFF/bb-addr-map.yaml
    A llvm/test/tools/yaml2obj/COFF/section-semantic-content.yaml
    M llvm/tools/dsymutil/DwarfLinkerForBinary.h
    M llvm/tools/llubi/llubi.cpp
    M llvm/tools/llvm-c-test/echo.cpp
    M llvm/tools/llvm-cgdata/llvm-cgdata.cpp
    M llvm/tools/llvm-cov/CodeCoverage.cpp
    M llvm/tools/llvm-jitlink/llvm-jitlink.cpp
    M llvm/tools/llvm-objdump/COFFDump.h
    M llvm/tools/llvm-objdump/ELFDump.h
    M llvm/tools/llvm-objdump/OffloadDump.cpp
    M llvm/tools/llvm-objdump/WasmDump.h
    M llvm/tools/llvm-profgen/PerfReader.h
    M llvm/tools/llvm-strings/llvm-strings.cpp
    M llvm/unittests/ADT/DenseMapTest.cpp
    M llvm/unittests/ADT/StringRefTest.cpp
    M llvm/unittests/Analysis/IR2VecTest.cpp
    M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
    M llvm/unittests/ExecutionEngine/Orc/ExecutionSessionWrapperFunctionCallsTest.cpp
    M llvm/unittests/Support/CommandLineTest.cpp
    M llvm/unittests/Support/LLVMToolSession/LLVMToolSessionTest.cpp
    M llvm/unittests/Support/raw_socket_stream_test.cpp
    M llvm/unittests/Transforms/Vectorize/VPlanVerifierTest.cpp
    M llvm/utils/LLVMVisualizers/llvm.natvis
    M llvm/utils/gdb-scripts/prettyprinters.py
    M llvm/utils/gn/secondary/clang/lib/ScalableStaticAnalysis/Analyses/BUILD.gn
    M llvm/utils/gn/secondary/clang/tools/driver/BUILD.gn
    M llvm/utils/gn/secondary/clang/unittests/ScalableStaticAnalysis/BUILD.gn
    M llvm/utils/gn/secondary/libcxx/include/BUILD.gn
    M llvm/utils/gn/secondary/lld/unittests/AsLibELF/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
    M llvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/LogicalView/BUILD.gn
    M llvm/utils/gn/secondary/llvm/unittests/DebugInfo/PDB/BUILD.gn
    M llvm/utils/lldbDataFormatters.py
    M mlir/docs/DefiningDialects/Operations.md
    M mlir/docs/DefiningDialects/_index.md
    M mlir/docs/Interfaces.md
    M mlir/docs/ReleaseNotes.md
    M mlir/examples/toy/Ch4/include/toy/Ops.td
    M mlir/examples/toy/Ch5/include/toy/Ops.td
    M mlir/examples/toy/Ch6/include/toy/Ops.td
    M mlir/examples/toy/Ch7/include/toy/Ops.td
    M mlir/include/mlir-c/Rewrite.h
    M mlir/include/mlir/Dialect/AMDGPU/IR/AMDGPUBase.td
    M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
    M mlir/include/mlir/Dialect/Arith/IR/ArithBase.td
    M mlir/include/mlir/Dialect/ArmNeon/ArmNeon.td
    M mlir/include/mlir/Dialect/ArmSME/IR/ArmSME.td
    M mlir/include/mlir/Dialect/ArmSVE/IR/ArmSVE.td
    M mlir/include/mlir/Dialect/Async/IR/AsyncDialect.td
    M mlir/include/mlir/Dialect/Bufferization/IR/BufferizationBase.td
    M mlir/include/mlir/Dialect/Complex/IR/ComplexBase.td
    M mlir/include/mlir/Dialect/ControlFlow/IR/ControlFlowOps.td
    M mlir/include/mlir/Dialect/DLTI/DLTIBase.td
    M mlir/include/mlir/Dialect/EmitC/IR/EmitCBase.td
    M mlir/include/mlir/Dialect/Func/IR/FuncOps.td
    M mlir/include/mlir/Dialect/GPU/IR/GPUBase.td
    M mlir/include/mlir/Dialect/IRDL/IR/IRDL.td
    M mlir/include/mlir/Dialect/Index/IR/IndexDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
    M mlir/include/mlir/Dialect/LLVMIR/ROCDLDialect.td
    M mlir/include/mlir/Dialect/LLVMIR/VCIXOps.td
    M mlir/include/mlir/Dialect/LLVMIR/XeVMOps.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgBase.td
    M mlir/include/mlir/Dialect/Linalg/IR/LinalgInterfaces.td
    M mlir/include/mlir/Dialect/Linalg/TransformOps/LinalgTransformOps.td
    M mlir/include/mlir/Dialect/MLProgram/IR/MLProgramBase.td
    M mlir/include/mlir/Dialect/MPI/IR/MPI.td
    M mlir/include/mlir/Dialect/Math/IR/MathBase.td
    M mlir/include/mlir/Dialect/MemRef/IR/MemRefBase.td
    M mlir/include/mlir/Dialect/NVGPU/IR/NVGPU.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCBase.td
    M mlir/include/mlir/Dialect/OpenACC/OpenACCOpsInterfaces.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPDialect.td
    M mlir/include/mlir/Dialect/OpenMP/OpenMPOpsInterfaces.td
    M mlir/include/mlir/Dialect/PDL/IR/PDLDialect.td
    M mlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
    M mlir/include/mlir/Dialect/Ptr/IR/PtrDialect.td
    M mlir/include/mlir/Dialect/Quant/IR/QuantBase.td
    M mlir/include/mlir/Dialect/SCF/IR/SCFOps.td
    M mlir/include/mlir/Dialect/SMT/IR/SMTDialect.td
    M mlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
    M mlir/include/mlir/Dialect/Shape/IR/ShapeBase.td
    M mlir/include/mlir/Dialect/Shard/IR/ShardBase.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td
    M mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorInterfaces.td
    M mlir/include/mlir/Dialect/Tensor/IR/TensorBase.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOpBase.td
    M mlir/include/mlir/Dialect/Tosa/IR/TosaOps.td
    M mlir/include/mlir/Dialect/Transform/IR/TransformDialect.td
    M mlir/include/mlir/Dialect/UB/IR/UBOps.td
    M mlir/include/mlir/Dialect/Utils/StaticValueUtils.h
    M mlir/include/mlir/Dialect/Vector/IR/Vector.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSABase.td
    M mlir/include/mlir/Dialect/WasmSSA/IR/WasmSSAInterfaces.td
    M mlir/include/mlir/Dialect/X86/X86.td
    M mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td
    M mlir/include/mlir/IR/BuiltinOps.td
    M mlir/include/mlir/IR/DialectBase.td
    M mlir/include/mlir/Interfaces/ControlFlowInterfaces.td
    M mlir/lib/CAPI/Transforms/Rewrite.cpp
    M mlir/lib/Dialect/GPU/CMakeLists.txt
    M mlir/lib/Dialect/GPU/Transforms/DecomposeMemRefs.cpp
    M mlir/lib/Dialect/IRDL/IR/IRDL.cpp
    M mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp
    M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
    M mlir/lib/Dialect/MemRef/Transforms/ExpandStridedMetadata.cpp
    M mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
    M mlir/lib/Dialect/Utils/StaticValueUtils.cpp
    M mlir/lib/IR/BuiltinTypes.cpp
    M mlir/lib/Target/IRDLToCpp/IRDLToCpp.cpp
    M mlir/lib/Target/LLVMIR/Dialect/LLVMIR/LLVMToLLVMIRTranslation.cpp
    M mlir/lib/Target/LLVMIR/Dialect/OpenMP/OpenMPToLLVMIRTranslation.cpp
    M mlir/python/mlir/dialects/ext.py
    M mlir/test/Analysis/DataFlow/test-last-modified-callgraph.mlir
    M mlir/test/Analysis/DataFlow/test-last-modified.mlir
    M mlir/test/Analysis/DataFlow/test-next-access.mlir
    M mlir/test/Analysis/DataFlow/test-strided-metadata-range-analysis.mlir
    M mlir/test/CAPI/CMakeLists.txt
    M mlir/test/CAPI/rewrite.c
    M mlir/test/Conversion/MemRefToSPIRV/memref-to-spirv.mlir
    M mlir/test/Conversion/TosaToSPIRVTosa/graph-constant-mark.mlir
    M mlir/test/Dialect/Affine/affine-loop-normalize.mlir
    M mlir/test/Dialect/Affine/int-range-interface.mlir
    M mlir/test/Dialect/Affine/simplify-min-max-ops.mlir
    M mlir/test/Dialect/Affine/simplify-with-bounds.mlir
    M mlir/test/Dialect/Affine/transform-op-simplify-min-max-ops.mlir
    M mlir/test/Dialect/Arith/int-range-analysis-convergence.mlir
    M mlir/test/Dialect/Arith/int-range-interface.mlir
    M mlir/test/Dialect/Arith/int-range-loop-iter-args.mlir
    M mlir/test/Dialect/Arith/int-range-narrowing.mlir
    M mlir/test/Dialect/Arith/int-range-opts-bug-119045.mlir
    M mlir/test/Dialect/Arith/int-range-opts.mlir
    M mlir/test/Dialect/GPU/decompose-memrefs.mlir
    M mlir/test/Dialect/GPU/int-range-interface-cluster.mlir
    M mlir/test/Dialect/GPU/int-range-interface.mlir
    M mlir/test/Dialect/LLVMIR/nvvm_check_target_sm.mlir
    M mlir/test/Dialect/LLVMIR/roundtrip.mlir
    M mlir/test/Dialect/Linalg/erase-unused-operands-and-results.mlir
    M mlir/test/Dialect/Linalg/swap-extract-slice-with-fill.mlir
    A mlir/test/Dialect/Linalg/td/erase-unused-operands-and-results.mlir
    A mlir/test/Dialect/Linalg/td/swap-extract-slice-with-fill.mlir
    R mlir/test/Dialect/Linalg/transform-op-swap-extract-slice-with-fill.mlir
    M mlir/test/Dialect/MLProgram/pipeline-globals.mlir
    M mlir/test/Dialect/MemRef/canonicalize.mlir
    M mlir/test/Dialect/MemRef/elide-reinterpret-cast-load.mlir
    M mlir/test/Dialect/MemRef/expand-strided-metadata.mlir
    M mlir/test/Dialect/MemRef/int-range-inference.mlir
    M mlir/test/Dialect/MemRef/ops.mlir
    M mlir/test/Dialect/OpenACC/acc-implicit-routine.mlir
    M mlir/test/Dialect/OpenMP/invalid.mlir
    M mlir/test/Dialect/OpenMP/ops.mlir
    M mlir/test/Dialect/Tensor/int-range-inference.mlir
    M mlir/test/Dialect/Tosa/canonicalize.mlir
    M mlir/test/Dialect/Tosa/constant_folding.mlir
    M mlir/test/Dialect/Tosa/ops.mlir
    M mlir/test/Dialect/Tosa/tosa-arith-const-to-tosa-const.mlir
    M mlir/test/Dialect/Tosa/tosa-convert-integer-type-to-signless.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-depthwise.mlir
    M mlir/test/Dialect/Tosa/tosa-decompose-transpose-conv.mlir
    M mlir/test/Dialect/Tosa/tosa-gather-scatter-hardening.mlir
    M mlir/test/Dialect/Tosa/tosa-infer-shapes.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold-dense-resource.mlir
    M mlir/test/Dialect/Tosa/tosa-layerwise-constant-fold.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f32-to-f16.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-f64-to-f32.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32-aggressive.mlir
    M mlir/test/Dialect/Tosa/tosa-narrow-i64-to-i32.mlir
    M mlir/test/Dialect/Tosa/tosa-reduce-transposes.mlir
    M mlir/test/Dialect/Vector/int-range-interface.mlir
    M mlir/test/IR/attribute.mlir
    M mlir/test/IR/module-op.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_gemm_bf16.mlir
    R mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_dequantizeB_F8.mlir
    M mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F4.mlir
    A mlir/test/Integration/Dialect/XeGPU/WG/simple_mxfp_gemm_quantizeA_F8.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops-invalid.mlir
    M mlir/test/Interfaces/InferIntRangeInterface/infer-int-range-test-ops.mlir
    M mlir/test/Target/LLVMIR/Import/intrinsic.ll
    M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
    M mlir/test/Target/LLVMIR/llvmir.mlir
    M mlir/test/Target/LLVMIR/openmp-allocate-clause.mlir
    A mlir/test/Target/LLVMIR/openmp-scope-allocate-clause.mlir
    M mlir/test/Target/LLVMIR/openmp-taskwait-depend.mlir
    M mlir/test/Target/LLVMIR/openmp-todo.mlir
    M mlir/test/Transforms/loop-invariant-code-motion.mlir
    M mlir/test/Transforms/make-composed-folded-affine-apply.mlir
    M mlir/test/Transforms/sccp-callgraph.mlir
    M mlir/test/Transforms/test-symbol-dce.mlir
    M mlir/test/lib/Dialect/Test/TestOps.td
    M mlir/test/lib/Dialect/Test/TestOpsSyntax.td
    M mlir/test/lib/Dialect/TestIRDLToCpp/test_irdl_to_cpp.irdl.mlir
    M mlir/test/mlir-tblgen/constant-str-attr-invalid.mlir
    M mlir/test/mlir-tblgen/op-format-invalid.td
    M mlir/test/mlir-tblgen/op-format.mlir
    M mlir/test/mlir-tblgen/op-format.td
    M mlir/test/mlir-tblgen/op-interface.td
    M mlir/test/mlir-tblgen/pattern.mlir
    M mlir/test/python/dialects/ext.py
    M mlir/test/python/dialects/ml_program.py
    M mlir/test/python/dialects/python_test.py
    M mlir/test/python/dialects/transform.py
    M mlir/test/python/python_test_ops.td
    M mlir/tools/mlir-tblgen/OpInterfacesGen.cpp
    M offload/include/Shared/SourceInfo.h
    M offload/plugins-nextgen/level_zero/src/L0Program.cpp
    M offload/test/offloading/info.c
    A offload/test/offloading/shared_lib_global_var.c
    M openmp/docs/ReleaseNotes.md
    M orc-rt/cmake/OrcRTTesting.cmake
    M orc-rt/include/CMakeLists.txt
    A orc-rt/include/orc-rt-c/support/LogLevel.h
    M orc-rt/include/orc-rt-c/support/Logging.h
    M orc-rt/include/orc-rt/bedrock/ConnectorRegistry.h
    M orc-rt/include/orc-rt/bedrock/Session.h
    M orc-rt/include/orc-rt/bedrock/sps/SimpleRemoteCAOverSocket.h
    M orc-rt/include/orc-rt/support/bind.h
    M orc-rt/lib/bedrock/ConnectorRegistry.cpp
    M orc-rt/lib/bedrock/Session.cpp
    M orc-rt/lib/bedrock/sys/posix/SocketConnector.cpp
    M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
    A orc-rt/lib/bedrock/sys/windows/SocketConnector.cpp
    M orc-rt/test/regression/README.md
    M orc-rt/test/regression/jit-free-foundations/check-rt-process-info.test
    M orc-rt/test/regression/jit-free-foundations/lit.local.cfg
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-array-element-pointer-in-data.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/global-data-load.test
    A orc-rt/test/regression/languages/c/addressing/cross-object/hidden-data-load.test
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-pointer-in-data.c
    A orc-rt/test/regression/languages/c/addressing/same-object/global-data-store.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-array-element-load.c
    A orc-rt/test/regression/languages/c/addressing/same-object/static-data-load.c
    M orc-rt/test/regression/languages/c/lit.local.cfg
    M orc-rt/test/regression/languages/c/return-zero.c
    M orc-rt/test/regression/lit.cfg.py
    M orc-rt/test/regression/object-formats/lit.local.cfg
    M orc-rt/test/regression/object-formats/mach-o/arm64/return-zero.s
    M orc-rt/test/tools/orc-rt-process-info-check.cpp
    M orc-rt/test/unit/CMakeLists.txt
    M orc-rt/test/unit/CommonTestUtils.h
    M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
    M orc-rt/test/unit/bedrock/SessionTest.cpp
    R orc-rt/test/unit/bedrock/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/SocketTestUtils.h
    M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
    A orc-rt/test/unit/bedrock/sys/posix/SocketConnectorTest.cpp
    M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
    M orc-rt/test/unit/support/LoggingTest.cpp
    M orc-rt/test/unit/support/bind-test.cpp
    M orc-rt/tools/ogre/CMakeLists.txt
    M orc-rt/tools/ogre/ogre.cpp
    M polly/lib/Analysis/ScopBuilder.cpp
    M polly/test/CodeGen/OpenMP/single_loop_with_loop_invariant_baseptr.ll
    M polly/test/ScopInfo/issue190128.ll
    M polly/test/ScopInfo/simple_loop_unsigned.ll
    A polly/test/ScopInfo/zext-loop-bound-unbounded.ll
    M utils/bazel/MODULE.bazel.lock
    M utils/bazel/linux_uapi.bzl
    M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/libc_build_rules.bzl
    M utils/bazel/llvm-project-overlay/libc/startup/linux/BUILD.bazel
    M utils/bazel/llvm-project-overlay/libc/startup/linux/x86_64/BUILD.bazel
    M utils/bazel/llvm-project-overlay/lldb/BUILD.bazel
    M utils/bazel/llvm-project-overlay/mlir/BUILD.bazel
    M utils/docs/llvm_sphinx/ext/absolute_links.py
    M utils/docs/llvm_sphinx/ext/absolute_links_test/markdown.md

  Log Message:
  -----------
  Merge branch 'users/zGoldthorpe/wide-copies/precommit' into users/zGoldthorpe/wide-copies/materialise


  Commit: dbfdca09a977fbfb7955e1d116fcea87bf011d1f
      https://github.com/llvm/llvm-project/commit/dbfdca09a977fbfb7955e1d116fcea87bf011d1f
  Author: Zach Goldthorpe <Zach.Goldthorpe at amd.com>
  Date:   2026-09-28 (Mon, 28 Sep 2026)

  Changed paths:
    M llvm/test/CodeGen/AMDGPU/v_swap_b16.ll

  Log Message:
  -----------
  Resolve merge conflict in lit test


Compare: https://github.com/llvm/llvm-project/compare/dd47b249093f...dbfdca09a977

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