[all-commits] [llvm/llvm-project] 45dde8: [AMDGPU] Move dynamic VGPR addressability to Targe...

Chinmay Deshpande via All-commits all-commits at lists.llvm.org
Sun Sep 27 11:21:18 PDT 2026


  Branch: refs/heads/users/chinmaydd/amdgpu-targetparser-vgpr-addressability
  Home:   https://github.com/llvm/llvm-project
  Commit: 45dde814328f9ecf3cd957719277b7dafe61f698
      https://github.com/llvm/llvm-project/commit/45dde814328f9ecf3cd957719277b7dafe61f698
  Author: Chinmay Deshpande <chdeshpa at amd.com>
  Date:   2026-09-27 (Sun, 27 Sep 2026)

  Changed paths:
    M llvm/include/llvm/TargetParser/AMDGPUTargetParser.h
    M llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
    M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
    M llvm/lib/Target/AMDGPU/GCNSubtarget.h
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
    M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
    M llvm/lib/TargetParser/AMDGPUTargetParser.cpp
    M llvm/tools/llvm-calc-occupancy/llvm-calc-occupancy.cpp
    M llvm/unittests/TargetParser/TargetParserTest.cpp

  Log Message:
  -----------
  [AMDGPU] Move dynamic VGPR addressability to TargetParser

Extend getAddressableNumVGPRs with a dynamic block size and share the
eight-block limit through TargetParser. Remove the BaseInfo counterpart
and update its subtarget, occupancy, scheduler, and diagnostic callers.

Cover dynamic addressability, static limits, and unified register files.

Change-Id: Ie4dae7ba34cce8e8ea50e24f7075242a8a045505



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