[all-commits] [llvm/llvm-project] 7615da: [M68k] Finish implementation of `MOVX` (move and e...

[Dan Salvato via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 7615da10b75c57286a4032eac8bb43c1b8d2ba46
      https://github.com/llvm/llvm-project/commit/7615da10b75c57286a4032eac8bb43c1b8d2ba46
  Author: Dan Salvato <dan at teamsalvato.com>
  Date:   2026-09-26 (Sat, 26 Sep 2026)

  Changed paths:
    M llvm/lib/Target/M68k/M68kExpandPseudo.cpp
    M llvm/lib/Target/M68k/M68kInstrArithmetic.td
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/lib/Target/M68k/M68kInstrInfo.cpp
    M llvm/lib/Target/M68k/M68kInstrInfo.h
    M llvm/test/CodeGen/M68k/Arith/divide-by-constant.ll
    M llvm/test/CodeGen/M68k/Arith/smul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Arith/umul-with-overflow.ll
    M llvm/test/CodeGen/M68k/Bits/btst.ll
    M llvm/test/CodeGen/M68k/Control/cmp.ll
    M llvm/test/CodeGen/M68k/Control/non-cmov-switch.ll
    M llvm/test/CodeGen/M68k/Control/setcc.ll
    M llvm/test/CodeGen/M68k/Data/load-extend.ll
    M llvm/test/CodeGen/M68k/Data/sext-i1.ll
    M llvm/test/CodeGen/M68k/register-spills.ll

  Log Message:
  -----------
  [M68k] Finish implementation of `MOVX` (move and extend) pseudo-instructions and fix related errors (#218938)

This patch adds remaining addressing modes to the "move and extend"
pseudo-instructions, and fixes a few errors and inconsistencies in the
logic that caused inefficient code generation.

- Remaining addressing modes were implemented to match non-pseudo `MOVE`
instructions.
- Names of the pseudos now correctly reflect the register classes they
operate on, e.g. `MOVZXd32r16` for XR16 -> DR32.
- Fixed an issue where `MOVZX` could be allocated to an address
register, which has no way to zero-extend the result. (There were even
some of these in the test `register-spills.ll`, emitted as illegal
instructions, but the test doesn't have instruction verification
enabled, so it wasn't caught.)
- Fixed some `extload` patterns where the register was unnecessarily
extended to 32 bits before being truncated to its final size, causing
redundant instructions to be omitted.
- Fixed `anyext` patterns lowering to `MOVZX` instead of `MOVX`, causing
unnecessary zero-extensions.
- An inconsistency was fixed where the expansion logic would perform a
source-sized move when loading from memory, but a destination-sized move
when moving between registers. They now always perform a source-sized
move, which improves clarity in the assembly output and has more
opportunity for future optimizations.



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