[all-commits] [llvm/llvm-project] 6258c4: [AMDGPU] Fix missed WMMA C-operand co-exec hazard
Petar Jovanovic via All-commits
all-commits at lists.llvm.org
Fri Sep 25 07:02:56 PDT 2026
Branch: refs/heads/users/petar-jovanovic/amdgpu-wmma-coexec-c-hazard
Home: https://github.com/llvm/llvm-project
Commit: 6258c4699d2912c28d5d6df625cecf966e1620dc
https://github.com/llvm/llvm-project/commit/6258c4699d2912c28d5d6df625cecf966e1620dc
Author: Petar Jovanovic <petar.jovanovic at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
M llvm/test/CodeGen/AMDGPU/wmma-coexecution-valu-hazards.mir
Log Message:
-----------
[AMDGPU] Fix missed WMMA C-operand co-exec hazard
The gfx1250 WMMA co-execution hazard check treats only A, B and the
SWMMAC index as registers the in-flight MMA still reads. C (src2 of a
non-SWMMAC WMMA) is missing, so a VALU scheduled into the MMA's shadow
can clobber C and the MMA consumes the new value.
This is latent while C is tied to vdst, since the existing D check then
covers it. It miscompiles where the tie does not hold: for
v_wmma_bf16f32_16x16x32_bf16, whose D is narrower than C, and for the
_threeaddr form of any WMMA.
Add src2 to the checked set for non-SWMMAC WMMAs.
To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications
More information about the All-commits
mailing list