[all-commits] [llvm/llvm-project] a631bc: [IR][REVEC] Define llvm.vector.repeat intrinsic (#...

[Gaëtan Bossu via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: a631bc15c5445e48124a06a884ecf4bf9ec491e2
      https://github.com/llvm/llvm-project/commit/a631bc15c5445e48124a06a884ecf4bf9ec491e2
  Author: Gaëtan Bossu <gaetan.bossu at arm.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/docs/LangRef.md
    M llvm/include/llvm/CodeGen/ISDOpcodes.h
    M llvm/include/llvm/IR/Intrinsics.td
    M llvm/include/llvm/Target/TargetSelectionDAG.td
    M llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
    M llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
    M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
    M llvm/lib/IR/Verifier.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
    M llvm/lib/Target/AArch64/AArch64ISelLowering.h
    M llvm/lib/Target/AArch64/SVEInstrFormats.td
    A llvm/test/CodeGen/AArch64/sve-vector-repeat.ll
    A llvm/test/Verifier/vector-repeat-intrinsic-invalid.ll
    A llvm/test/Verifier/vector-repeat-intrinsic-valid.ll
    M llvm/unittests/CodeGen/SelectionDAGNodeConstructionTest.cpp

  Log Message:
  -----------
  [IR][REVEC] Define llvm.vector.repeat intrinsic (#208212)

This intrinsic is used to repeat a <N x Ty> fixed-length vector `vscale`
times to form a <vscale x N x Ty> scalable vector. The patch adds
legalisation support and ISel for AArch64.

This intrinsic is required to support re-vectorisation of fixed-length
vectors to scalable ones, as shufflevector instructions do not support
scalable vectors. Re-vectorisation was discussed in this RFC:
https://discourse.llvm.org/t/rfc-re-vectorisation-to-wider-vectors-in-loopvectorizer/91071

Assisted-by: codex (tests)



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