[all-commits] [llvm/llvm-project] d9dbd9: [VPlan] Only retain NSW when possible in getFlagsF...

[Florian Hahn via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: d9dbd9671c1f2481727a9015d7fa23129a7c396d
      https://github.com/llvm/llvm-project/commit/d9dbd9671c1f2481727a9015d7fa23129a7c396d
  Author: Florian Hahn <flo at fhahn.com>
  Date:   2026-09-25 (Fri, 25 Sep 2026)

  Changed paths:
    M llvm/lib/Transforms/Vectorize/VPlanUtils.h
    M llvm/test/Transforms/LoopVectorize/X86/x86-interleaved-accesses-masked-group.ll
    M llvm/test/Transforms/LoopVectorize/induction-wrapflags.ll

  Log Message:
  -----------
  [VPlan] Only retain NSW when possible in getFlagsFromIndDesc. (#226315)

getFlagsFromIndDesc is used to get the flags to use for wide inductions.
Those are normalized to Adds, with the step negated if the induction
binop is Sub.

Only retain all flags for Add. For Sub, never retain NUW and only keep
NSW if the step is known to not be signed min.

Alive2 Proofs showing incorrect NUW/NSW transfer and transfer of NSW if
step is != signed INT_MIN: https://alive2.llvm.org/ce/z/zGKeZg

Fixes https://github.com/llvm/llvm-project/issues/224024.



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