[all-commits] [llvm/llvm-project] bb4004: [AMDGPU] Insert wmma coexec anti-hints rule
Syadus Sefat via All-commits
all-commits at lists.llvm.org
Fri Sep 25 01:48:46 PDT 2026
Branch: refs/heads/users/mssefat/anti-hints-pr5-amdgpu-pre-ra-coexec-anti-hint
Home: https://github.com/llvm/llvm-project
Commit: bb4004f41b930037ecbdeea4621b4405cd31ed53
https://github.com/llvm/llvm-project/commit/bb4004f41b930037ecbdeea4621b4405cd31ed53
Author: mssefat <syadus.sefat at gmail.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNPreRAAntiHints.cpp
M llvm/lib/Target/AMDGPU/GCNPreRAAntiHints.h
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/mul.ll
A llvm/test/CodeGen/AMDGPU/anti-hints-addr-xcnt.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-multi-hazard.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-multi-rule.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-swmmac-war-index.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-trans-src0.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-va-vdst.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-wmma-war.gfx1250.mir
A llvm/test/CodeGen/AMDGPU/anti-hints-wmma-waw.gfx1250.mir
M llvm/test/CodeGen/AMDGPU/anyext-s16-to-s64.ll
M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/bf16.ll
M llvm/test/CodeGen/AMDGPU/branch-relaxation-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
M llvm/test/CodeGen/AMDGPU/ds_write2.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.bf16.ll
M llvm/test/CodeGen/AMDGPU/fcanonicalize.ll
M llvm/test/CodeGen/AMDGPU/flat-load-saddr-to-vaddr.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-load.ll
M llvm/test/CodeGen/AMDGPU/flat-saddr-store.ll
M llvm/test/CodeGen/AMDGPU/fp-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/fp64-min-max-buffer-ptr-atomics.ll
M llvm/test/CodeGen/AMDGPU/global-load-xcnt.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.load.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.av.store.b128.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.atomic.pk.add.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.private.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.is.shared.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.gfx950.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.mfma.scale.f32.32x32x64.f8f6f4.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ptr.s.buffer.load.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.rcp.bf16.ll
M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.store.ll
M llvm/test/CodeGen/AMDGPU/llvm.sqrt.bf16.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
M llvm/test/CodeGen/AMDGPU/lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/max.ll
M llvm/test/CodeGen/AMDGPU/min.ll
M llvm/test/CodeGen/AMDGPU/pk-lshl-add-u64.ll
M llvm/test/CodeGen/AMDGPU/sad.ll
M llvm/test/CodeGen/AMDGPU/trans-bf16-omod.ll
M llvm/test/CodeGen/AMDGPU/vopd3-imm-fold.ll
Log Message:
-----------
[AMDGPU] Insert wmma coexec anti-hints rule
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