[all-commits] [llvm/llvm-project] bacc5b: [AMDGPU] Track allocator-reserved register pressur...
Dhruva Chakrabarti via All-commits
all-commits at lists.llvm.org
Thu Sep 24 18:21:00 PDT 2026
Branch: refs/heads/users/dhruvachak/fix_tuple_handling
Home: https://github.com/llvm/llvm-project
Commit: bacc5bd4b0f58d2d8f9cb2ded9eb5dd390b08676
https://github.com/llvm/llvm-project/commit/bacc5bd4b0f58d2d8f9cb2ded9eb5dd390b08676
Author: Dhruva Chakrabarti <Dhruva.Chakrabarti at amd.com>
Date: 2026-09-25 (Fri, 25 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/GCNRegPressure.cpp
M llvm/lib/Target/AMDGPU/GCNRegPressure.h
M llvm/lib/Target/AMDGPU/GCNSchedStrategy.cpp
Log Message:
-----------
[AMDGPU] Track allocator-reserved register pressure separately
GCNRegPressure counts a tuple at its live lane count, but the excess and
critical limits the scheduler compares against are expressed in
allocatable registers. A tuple is reserved at its full class width for
its whole live range, so lanes that are dead at a given point are still
unavailable to any other value, and the live lane count underestimates
what the allocator has to set aside.
Track a third set of per-kind values recording the reserved width, and
use it for the pressure the GCN trackers hand to the scheduling
heuristics.
Also add -amdgpu-trackers-compare-rp to print the GCN tracker and the
generic tracker pressure side by side for every candidate, which is what
the discrepancy was found with.
WIP
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