[all-commits] [llvm/llvm-project] 6549d7: M68k: Use data register classes for the 16->32 ext...

[Matt Arsenault via All-commits]

  Branch: refs/heads/users/arsenm/m68k/movszx-32-16-data-regclass
  Home:   https://github.com/llvm/llvm-project
  Commit: 6549d7fdca2813bc32cf1512f58f427a54468da6
      https://github.com/llvm/llvm-project/commit/6549d7fdca2813bc32cf1512f58f427a54468da6
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/lib/Target/M68k/M68kInstrData.td
    M llvm/test/CodeGen/M68k/register-spills.ll

  Log Message:
  -----------
  M68k: Use data register classes for the 16->32 extending move pseudos

MOVSXd32d16 and MOVZXd32d16 declared both operands with the XR32/XR16
classes, which include the address registers. The post-RA expansion of
these pseudos emits AND32di, MOV16dd and EXT32, all of which require a
data register, so allocating an address register produces invalid code:

  $a6 = AND32di $a6(tied-def 0), 65535, implicit-def $ccr

Every pattern selecting these pseudos already restricts the source to
MxDRD16, so constrain the pseudos to the data register classes.

This fixes machine verifier errors in the touched test.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>



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