[all-commits] [llvm/llvm-project] 63d15e: [GlobalISel] Only narrow IEEE half in narrowScalar...

[Kane Wang via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 63d15eed742076b33100a5051f27aece1287b104
      https://github.com/llvm/llvm-project/commit/63d15eed742076b33100a5051f27aece1287b104
  Author: Kane Wang <wangqiang1 at kylinos.cn>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
    M llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp

  Log Message:
  -----------
  [GlobalISel] Only narrow IEEE half in narrowScalarFPTOI (#223615)

narrowScalarFPTOI swaps a conversion for a narrower one plus an
extension, which is only valid if every finite value of the source fits
in the narrow type. The guard tests the width, so it also accepts
bfloat, which has float's exponent range.

Match LLT::float16() instead of LLT::scalar(16). Register types come
from LLT::floatingPoint(), which degrades to ANY_SCALAR without extended
LLTs, and an ANY_SCALAR LLT matches any scalar of the same size, so this
is unchanged on such targets. AArch64 and AMDGPU only narrow
LLT::float16() sources and WebAssembly does not narrow these at all, so
they are unaffected too.



To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications