[all-commits] [llvm/llvm-project] b19a36: [mlir][Affine] Prevent buffer hoisting out of affi...

[Matteo Di Iorio via All-commits]

  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: b19a36aaf4b9aaea539b903bd515b54a9f23a639
      https://github.com/llvm/llvm-project/commit/b19a36aaf4b9aaea539b903bd515b54a9f23a639
  Author: Matteo Di Iorio <104271382+splicer3 at users.noreply.github.com>
  Date:   2026-09-24 (Thu, 24 Sep 2026)

  Changed paths:
    M mlir/include/mlir/Dialect/Affine/IR/AffineOps.td
    M mlir/test/Dialect/Bufferization/Transforms/buffer-loop-hoisting.mlir

  Log Message:
  -----------
  [mlir][Affine] Prevent buffer hoisting out of affine.parallel (#225324)

I noticed that `buffer-loop-hoisting` can move allocations out of
`affine.parallel`, making a buffer that should be local to each
iteration shared between the parallel iterations.

`AffineParallelOp` implements `LoopLikeOpInterface` but was missing the
`HasParallelRegion` trait, so `isSequentialLoop` treated it as
sequential. This adds the missing trait to `affine.parallel`, allowing
the pass to recognize the parallel boundary without changing the
hoisting logic.

I’ve added a regression test based on the reproducer in #225149, which
checks that the allocation stays inside `affine.parallel` and that the
store and load still use that allocation.

Fixes #225149.



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