[all-commits] [llvm/llvm-project] 1e5e53: [Clang][Sema] Add fortify warnings for recv and re...

Vitaly Buka via All-commits all-commits at lists.llvm.org
Wed Sep 23 12:42:05 PDT 2026 

  Branch: refs/heads/users/vitalybuka/spr/nfctransforms-add-missing-vector-include-to-sampleprofileinferenceh
  Home:   https://github.com/llvm/llvm-project
  Commit: 1e5e53db7a6f0170b9d7783acb5a7d0e23a73968
      https://github.com/llvm/llvm-project/commit/1e5e53db7a6f0170b9d7783acb5a7d0e23a73968
  Author: Venkatesh Srinivasan <156861430+venk-ks at users.noreply.github.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/include/clang/Basic/BuiltinHeaders.def
    M clang/include/clang/Basic/Builtins.td
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/Sema/warn-fortify-source-recv-not-builtin.c
    M clang/test/Sema/warn-fortify-source.c

  Log Message:
  -----------
  [Clang][Sema] Add fortify warnings for recv and recvfrom (#223520)

Add `-Wfortify-source` diagnostics for `recv` and `recvfrom` when the size argument exceeds the destination buffer size.

Part of #142230

Assisted-by: Gemini


  Commit: 126134200f56180ef0b5cdab9f627d043f8e918d
      https://github.com/llvm/llvm-project/commit/126134200f56180ef0b5cdab9f627d043f8e918d
  Author: Matt Arsenault <Matthew.Arsenault at amd.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
    A llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-dead-carry.mir
    A llvm/test/CodeGen/AMDGPU/shrink-dead-vcc-def.mir
    R llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir

  Log Message:
  -----------
  AMDGPU: Preserve carry-out dead flag in buildShrunkInst (#225798)

Shrinking from the e64 to the e32 form drops the explicit carry-out def
in favor of an implicit vcc def. If the original carry out had a dead
flag, preserve it in the shrunk instruction's implicit-def operand.

Co-Authored-By: Claude Opus 5 <noreply at anthropic.com>


  Commit: 77c91047fb488f1b8d45678065a9b9a0c8e86189
      https://github.com/llvm/llvm-project/commit/77c91047fb488f1b8d45678065a9b9a0c8e86189
  Author: Aiden Grossman <aidengrossman at google.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M llvm/lib/Target/SPIRV/SPIRVLegalizeResourceBinding.cpp

  Log Message:
  -----------
  [SPIRV] Fix -Wunused-variable in #224488 (#225897)

Use [[maybe_unused]] as the operations either have side effects where we
can't inline them into the assert or the definitions/variable names
provide additional clarity.


  Commit: a26ba32319c157f5b8d6f59528ec001db9ff4055
      https://github.com/llvm/llvm-project/commit/a26ba32319c157f5b8d6f59528ec001db9ff4055
  Author: Daniel Chen <cdchen at ca.ibm.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M flang/lib/Optimizer/Builder/FIRBuilder.cpp
    M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
    M flang/test/Fir/CUDA/predefined-variables.mlir
    M flang/test/Fir/copy-codegen.fir
    M flang/test/HLFIR/assign-codegen-derived.fir
    M flang/test/Lower/CUDA/cuda-devptr.cuf
    M flang/test/Lower/Intrinsics/transfer.f90
    M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
    M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90

  Log Message:
  -----------
  [flang] Fix TRANSFER into derived type with tail padding (#223814)

When assigning a derived type value whose allocated size exceeds its
declared
field size (e.g. `SEQUENCE` type `{i32, i8}` — 5 bytes of fields, 8
bytes
allocated due to ABI tail padding), the assignment path in
`genRecordAssignment` took a "simple type" fast path that called
`genComponentByComponentAssignment`. That function iterated over
declared
fields and copied them one by one via `fir.coordinate_of`/`fir.load`/
`fir.store`, silently skipping the tail-padding bytes and leaving them
**unwritten** in the destination.

This is a compatibility choice rather than a correctness fix: F2023
10.2.1.3
p15 defines derived-type intrinsic assignment component by component,
and p16
allows any means with the same effect, so padding is outside the defined
effect
on either side. gfortran preserves the full allocated storage (including
padding
bytes) on assignment; this patch aligns flang's behaviour with gfortran
for two
cases:

- **`TRANSFER` into a padded SEQUENCE type**: `x = transfer(raw, x)` now
copies
all transferred bytes — including those that fall in the padding region
— into
`x`. A round-trip `raw = transfer(x, raw)` then recovers the original
value.
- **Structure constructor**: `x = t(1, 2_c_int8_t)` now copies the full
temporary, so the padding bytes written into `x` are the temporary's
padding
  bytes rather than being left unwritten.

Fix: replace `genComponentByComponentAssignment` with `fir::CopyOp`
(emitting
`fir.copy`). `fir.copy` defers the size computation to codegen via
`genTypeStrideInBytes` and the LLVM data layout, which includes tail
padding.
The dead `genComponentByComponentAssignment` function (≈80 lines) is
removed.

### no_overlap / memmove

`no_overlap` is only sound when the operands are *known* to be
non-overlapping. The `!recTy.isSequence()` fast-path condition is an
*assumption* rather than a proven fact: `flang/docs/Aliasing.md`
documents a
configuration where a Cray pointee aliases a variable with the `TARGET`
attribute, producing overlapping operands even for a non-SEQUENCE type.

A separate `noOverlap` flag is `true` only when non-overlap is *proven*
—
either the LHS is a compiler temporary, or `fir::AliasAnalysis`
explicitly
returns `NoAlias`. When `noOverlap` is `false`, `fir.copy` lowers to
`memmove`, which is correct for all overlap configurations. The
`disjoint`
gate (which selects `fir.copy` over the `_FortranAAssign` runtime path)
is
unchanged.

### Volatile operands

The ref type for each `fir.copy` operand is computed using
`builder.getRefType(recTy, fir::isa_volatile_type(addr.getType()))`, so
a
`fir.convert` is only emitted when the element type actually differs
(e.g. a
module record type assigned to a structurally identical local SEQUENCE
type)
and volatility is always preserved. This ensures whole-record assignment
to or
from a `volatile` derived-type variable passes `ConvertOp::verify` under
`--strict-fir-volatile-verifier`.

### CUFPredefinedVarToGPU

`processDeclareOp` previously cast every use of a predefined-variable
`fir.declare` to `fir.coordinate_of` without a null check, crashing when
the
use was anything else. A whole-record assignment such as `idx =
threadIdx`
lowers to `fir.copy %threadidx to %idx`, producing a non-coordinate use
that
triggered the crash.

`fir.copy` uses of a predefined-variable declare are now expanded into
three
per-field NVVM register reads + stores, so the destination receives
actual GPU
register values rather than a copy from the global backing variable.
Each
field store uses a reference type that inherits the destination's
volatility,
so a `volatile` destination (e.g. `type(dim3), volatile :: idx`)
produces
volatile stores and passes `--strict-fir-volatile-verifier`. The declare
and
the global are erased once all uses are handled; `fir.call` and other
unrecognised uses keep the declare alive.

### Known follow-ups

`fir.copy` does not yet implement `FirAliasTagOpInterface` (recorded as
a TODO
in `FIROps.td`) and its lowering does not forward alignment from the
operand
types. Every simple derived-type assignment now routed through
`fir.copy` —
including the OpenACC/OpenMP recipes and the CUDA paths changed by this
patch —
loses its per-dummy TBAA tags and emits `align 1` instead of the natural
field
alignment. Both losses are conservative and the code remains correct,
but they
may affect optimisation quality at `-O2` and above. Implementing
`FirAliasTagOpInterface` and propagating alignment are left as follow-up
work.

### Example

```fortran
program transfer_bindc_tail_pad
  use iso_c_binding, only: c_int, c_int8_t, c_sizeof
  implicit none
  type :: t
    sequence
    integer(c_int)    :: a
    integer(c_int8_t) :: b
  end type
  type(t) :: x
  integer, parameter :: n = int(STORAGE_SIZE(x)/8)
  character(len=n) :: raw, rawx
  equivalence (x, rawx)

  print *, ' STORAGE_SIZE({i32, 8}) bits =', storage_size(x)
  rawx = repeat(achar(0), n)
  raw = repeat(achar(255), n)
  print *, "raw before round trip"
  x = transfer(raw, x)
  print *, "intermediate round trip value"
  call printbytes(rawx)
  print *, "raw after round trip"
  raw = transfer(x, raw)
  call printbytes(raw)

  contains
  subroutine printbytes(c)
    character(*) :: c
    integer :: i
    do i = 1, n
      print '(i2,1x,z2.2)', i, iachar(c(i:i))
    end do
  end subroutine
end program
```

Before this patch (padding bytes left unwritten; the zeros come from
`rawx = repeat(achar(0), n)` — with a different initialiser the values
would differ):
```
> a.out
  STORAGE_SIZE({i32, 8}) bits = 64
 raw before round trip
 intermediate round trip value
 1 FF
 2 FF
 3 FF
 4 FF
 5 FF
 6 00
 7 00
 8 00
 raw after round trip
 1 FF
 2 FF
 3 FF
 4 FF
 5 FF
 6 00
 7 00
 8 00
```

After this patch, consistent with gfortran (source bytes fully
preserved):
```
> a.out
  STORAGE_SIZE({i32, 8}) bits =          64
 raw before round trip
 intermediate round trip value
 1 FF
 2 FF
 3 FF
 4 FF
 5 FF
 6 FF
 7 FF
 8 FF
 raw after round trip
 1 FF
 2 FF
 3 FF
 4 FF
 5 FF
 6 FF
 7 FF
 8 FF
```

Assisted-by: IBM Bob


  Commit: b8d50145149b07fab3c7d1fb867fd781f927da8c
      https://github.com/llvm/llvm-project/commit/b8d50145149b07fab3c7d1fb867fd781f927da8c
  Author: Adam Smith <adams at nvidia.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
    M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
    M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-mixed.cpp
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-sret.cpp
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk.cpp
    M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
    M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir

  Log Message:
  -----------
  [CIR] Read a non-byval parameter back out of its spill slot (#225010)

CallConvLowering recognizes a forwarded non-byval indirect argument by
the slot its operand was loaded from. At -O1 and above cir-simplify
folds that load away when the slot is a constant alloca, which is what
CIRGen emits for a const-qualified by-value parameter. The walk that
gives each such parameter's slot the alignment the ABI promises now also
reads the record back out of the slot at the spill and points the
parameter's call-argument uses at that load, so an Expand, byval or
coerced argument reads it too.

Assisted-by: Cursor / claude-opus-5


  Commit: 6384c2a903291e267980dba2c8bd58c1072b441e
      https://github.com/llvm/llvm-project/commit/6384c2a903291e267980dba2c8bd58c1072b441e
  Author: Vitaly Buka <vitalybuka at google.com>
  Date:   2026-09-23 (Wed, 23 Sep 2026)

  Changed paths:
    M clang/docs/ReleaseNotes.md
    M clang/include/clang/Basic/BuiltinHeaders.def
    M clang/include/clang/Basic/Builtins.td
    M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
    M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.cpp
    M clang/lib/CIR/Dialect/Transforms/TargetLowering/CIRABIRewriteContext.h
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-mixed.cpp
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk-sret.cpp
    A clang/test/CIR/CodeGen/call-conv-lowering-x86_64-non-byval-thunk.cpp
    M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-forward-param.cir
    M clang/test/CIR/Transforms/abi-lowering/indirect-non-byval-nyi.cir
    A clang/test/Sema/warn-fortify-source-recv-not-builtin.c
    M clang/test/Sema/warn-fortify-source.c
    M flang/lib/Optimizer/Builder/FIRBuilder.cpp
    M flang/lib/Optimizer/Transforms/CUDA/CUFPredefinedVarToGPU.cpp
    M flang/test/Fir/CUDA/predefined-variables.mlir
    M flang/test/Fir/copy-codegen.fir
    M flang/test/HLFIR/assign-codegen-derived.fir
    M flang/test/Lower/CUDA/cuda-devptr.cuf
    M flang/test/Lower/Intrinsics/transfer.f90
    M flang/test/Lower/OpenACC/acc-firstprivate-derived-user-assign.f90
    M flang/test/Lower/OpenACC/acc-firstprivate-derived.f90
    M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
    M llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
    M llvm/lib/Target/SPIRV/SPIRVLegalizeResourceBinding.cpp
    A llvm/test/CodeGen/AMDGPU/fold-immediate-operand-shrink-dead-carry.mir
    A llvm/test/CodeGen/AMDGPU/shrink-dead-vcc-def.mir
    R llvm/test/CodeGen/AMDGPU/shrink-v-cmp-wave32-dead-vcc-lo.mir

  Log Message:
  -----------
  Merge branch 'main' into users/vitalybuka/spr/nfctransforms-add-missing-vector-include-to-sampleprofileinferenceh


Compare: https://github.com/llvm/llvm-project/compare/b771db4977d3...6384c2a90329

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