[all-commits] [llvm/llvm-project] 680c55: [lldb] Add error logging to DIL (#224763)
Chinmay Deshpande via All-commits
all-commits at lists.llvm.org
Wed Sep 23 09:51:42 PDT 2026
Branch: refs/heads/users/chinmaydd/amdgpu-generic-classification-test-timeout
Home: https://github.com/llvm/llvm-project
Commit: 680c555e5841a7afbb03b0fa2665e92dacbca380
https://github.com/llvm/llvm-project/commit/680c555e5841a7afbb03b0fa2665e92dacbca380
Author: Ilia Kuklin <ikuklin at accesssoftek.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/source/Target/StackFrame.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
Log Message:
-----------
[lldb] Add error logging to DIL (#224763)
This patch also adds a new `EvaluateTree` interface for the Interpreter,
since putting the logging into the existing `Evaluate` would output the
message every time it's called internally.
Commit: 035c786e9e0ca450c73435dee5a4d4a2d268a509
https://github.com/llvm/llvm-project/commit/035c786e9e0ca450c73435dee5a4d4a2d268a509
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/attr-target-x86.c
Log Message:
-----------
[CIR] Fix target attr test (#225534)
After #206888 our printed checks are broken. Fix them.
Commit: 8a251309cb33a35faf1d591379b50c3047c0d5dc
https://github.com/llvm/llvm-project/commit/8a251309cb33a35faf1d591379b50c3047c0d5dc
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/utils/git/code-format-helper.py
Log Message:
-----------
[CI] Ignore ';' comments in .ll files in undef deprecator (#225509)
Without this patch, UndefGetFormatHelper matches across ';' comment
markers on added lines in .ll files, flagging false positives whenever
the word 'undef' appears in a test comment.
This patch stops matching at ';' on added lines in .ll files so comments
are ignored while uses of undef in IR instructions are still caught.
Assisted-by: Antigravity
Commit: 943c30efb207f7143395fa8b21b94e59f6704d2c
https://github.com/llvm/llvm-project/commit/943c30efb207f7143395fa8b21b94e59f6704d2c
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
Log Message:
-----------
[SLP][NFC]Update/add some new tests for fmuladd cases, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225553
Commit: 97458f644132d62bb938823394b716b684956f49
https://github.com/llvm/llvm-project/commit/97458f644132d62bb938823394b716b684956f49
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.h
M clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
Log Message:
-----------
[CIR] Compare access ranges of pointers into the same object (#225166)
Two pointers at different offsets into the same object were previously
reported as MayAlias, because whether they overlap depends on how many
bytes each access touches. This change extends the analysis to use the
access size from the pointee type and compare the byte ranges the two
accesses cover. Disjoint ranges don't alias, overlapping ranges
partially alias. Access to different members of a record are now
reported as NoAlias, while a member compared against the record it
belongs to is reported as PartialAlias.
Accesses whose extent isn't statically known, such as those through a
pointer to void, keep the conservative answer.
Assisted-by: Cursor / various models
Commit: 2382abc88740a62ecc2f81769b2a3f2e92cbc75a
https://github.com/llvm/llvm-project/commit/2382abc88740a62ecc2f81769b2a3f2e92cbc75a
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/include/clang/CIR/LoweringHelpers.h
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/array.cpp
R clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
A clang/test/CIR/CodeGen/bitint-wide.c
A clang/test/CIR/CodeGen/global-const-alignment.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/loop.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
Log Message:
-----------
[CIR] Implement lowering for BitInt that needs to be an array (#225470)
On bitint types that are not powers of 2, we have to represent them as
an array. This patch modifies 'convertTypeForMemory' to do that.
However, that ends up causing a couple of problems, that this also ends
up fixing:
First: constant init needs to also lower to this type/get that correct,
so this introduces 'getBitIntStorageAttr' to manage that
Second: The 'copy' op lowering was getting its layout from the lowered
type, which is no longer correct. Since this is suposed to be the same
as what we get from CIR, this is jsut switched to use that instead.
Third: this ran into an issue with cir.copy in LoweringPrepare where we
didn't properly copy the alignment over. The result was our copy
operation didn't get alignment correct. This patch fixes that too.
Fourth: Load/Store/VecMaskedLoad all had to change how they got the type
for their lowering. Since what they care about is actually the effecitve
'type' itself and not the actual type of the memory the case of the
array-lowering, this patch introduces convertTypeForLoadStore, which is
the effective memory type(no cast required, since LLVM-IR doesn't
care!), rather than the array type.
ALL the above matches classic codegen.
AI Disclosure: I went back and forth with analysis with Claude on this
one, and it wrote most of the tests, but I did every single check-line
:)
Commit: c0be35f9fcacfc32d537718fe345ee8aa26a87bb
https://github.com/llvm/llvm-project/commit/c0be35f9fcacfc32d537718fe345ee8aa26a87bb
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
A clang/test/CIR/CodeGen/lambda-explicit-obj.cpp
Log Message:
-----------
[CIR] Fix lambda explicit object parameters (#225518)
We seem to have diverged significantly from classic compiler here,
likely because the incubator missed these changes. The result was the
exmaple given in the test would crash because the 'this' argument wasn't
set right.
This patch copy/pastes/lightly modifies classic codegen to get these
lambdas done correctly.
Commit: 4c320dc1ddfef69baf95040c87d45d04055bfb94
https://github.com/llvm/llvm-project/commit/4c320dc1ddfef69baf95040c87d45d04055bfb94
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/CodeGen/nobuiltin-replaceable-allocation.cpp
Log Message:
-----------
[CIR] Lower nobuiltin attribute (#225545)
This causes a problem in tests for global allocation functions, but we
are not currently lowering the 'nobuiltin' attribute to LLVM-IR. This
patch adds the lowering.
Commit: 0ff5abdf5c464312101acfeec8b398eaff43dda8
https://github.com/llvm/llvm-project/commit/0ff5abdf5c464312101acfeec8b398eaff43dda8
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
A clang/test/CIR/Lowering/not.cir
Log Message:
-----------
[CIR] Fix 'cir.not' lowering behavior for >64 bit size (#225541)
We were only inverting the lower 64 bits because we used the
int64_t/uint64_t overload, which only filled in 64 bits. This patch
replaces that with a 'getAllOnes' of the right size.
Commit: 429bc4e837c54335e17c7294b32d754f3d560a02
https://github.com/llvm/llvm-project/commit/429bc4e837c54335e17c7294b32d754f3d560a02
Author: Andy Kaylor <akaylor at nvidia.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/dtors.cpp
Log Message:
-----------
[CIR] Use cleanup active flag with logical operators (#225554)
When temporary expressions are created within a logical binary
operation, we need to use a "cleanup active" flag to guard any cleanups
that are created in the right-hand side of the expression because the
expression may short-circuit and not evaluate the RHS. Failure to do so
had been leading to destructors being called for objects that had never
been constructed.
This fix introduces a regression in destructor call ordering when both
sides of a logical operation create temporaries that require cleanup.
This is a known ordering bug that preceeded this PR but was incidentally
avoided by the previous incorrect handling. The orderig bug will be
fixed in a follow-up change.
Assisted-by: Cursor / various models
Commit: 1adcce186772332e969992d7792188befd615907
https://github.com/llvm/llvm-project/commit/1adcce186772332e969992d7792188befd615907
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/test/Driver/sanitize-trap-loop.c
Log Message:
-----------
[Driver] Link ubsan_loop_detect with --whole-archive (#225498)
`addSanitizerRuntimes` places sanitizer archives before user object
files on the linker command line.
Because `ubsan_loop_detect` was in `NonWholeStaticRuntimes` without `-u`
symbols, single-pass linkers like GNU `ld.bfd` discarded
`libclang_rt.ubsan_loop_detect.a` before seeing references to
`__ubsan_install_trap_loop_detection` or `__ubsan_is_trap_loop`. Move
`ubsan_loop_detect` to `StaticRuntimes` so it is linked with
`--whole-archive`.
Commit: c2b3813133870406f2e4e7c8110e29a065732d9a
https://github.com/llvm/llvm-project/commit/c2b3813133870406f2e4e7c8110e29a065732d9a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/support/bit.h
Log Message:
-----------
[orc-rt] Simplify bit.h countl_zero and bit_width (#225547)
The old countl_zero algorithm wasn't recognized / optimized by clang on
arm64 or x86-64. Switch to a simpler loop that clang recognizes and
rewrite bit_width in terms of countl_zero. NFCI.
Commit: 838c705ee43c97dcb11664f926c8937c224d6987
https://github.com/llvm/llvm-project/commit/838c705ee43c97dcb11664f926c8937c224d6987
Author: Yihan Wang <yronglin777 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/docs/ReleaseNotes.md
M clang/lib/AST/ExprConstant.cpp
M clang/test/SemaCXX/recovery-expr-type.cpp
Log Message:
-----------
[clang] Return early if a value dependent recovery init appeared in constant evaluation context in legacy constant evaluator (#225027)
A recovery default member initializer can be value-dependent even when
the expression referring to the variable is not. Clang should return
early to avoid crash.
This fix the issue found in
https://github.com/llvm/llvm-project/issues/185874#issuecomment-4058045596.
---------
Signed-off-by: yronglin <yronglin777 at gmail.com>
Commit: 71122e716c7f507cb98df69961dbce21a187aa91
https://github.com/llvm/llvm-project/commit/71122e716c7f507cb98df69961dbce21a187aa91
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
Log Message:
-----------
[SelectionDAG] Add ISD::ARITH_FENCE to SelectionDAGDumper. (#225485)
We seem to have no consistency on CamelCase or snake_case in node
naming. I've gone with CamelCase to match the nearby nodes, but happy to
change.
Commit: 82ea1d26eca4bb8d12513d29a71536c35f3ff47b
https://github.com/llvm/llvm-project/commit/82ea1d26eca4bb8d12513d29a71536c35f3ff47b
Author: weiguozhi <57237827+weiguozhi at users.noreply.github.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/test/Frontend/stack-layout-remark.c
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/test/CodeGen/MLRegAlloc/interactive-mode.ll
M llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
M llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
M llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
M llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
M llvm/test/CodeGen/X86/apx/memfold-origVNI-crash.ll
M llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/atom-fixup-lea2.ll
M llvm/test/CodeGen/X86/block-placement.ll
M llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
M llvm/test/CodeGen/X86/fptosi-sat-scalar-f16.ll
M llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
M llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
M llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
M llvm/test/CodeGen/X86/no-split-size.ll
M llvm/test/CodeGen/X86/ragreedy-bug.ll
M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
M llvm/test/CodeGen/X86/sjlj-eh.ll
M llvm/test/CodeGen/X86/speculative-load-hardening.ll
M llvm/test/CodeGen/X86/split-reg-with-hint.ll
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
Log Message:
-----------
[RegAlloc] [X86] Enable callee saved register optimization for x86 (#220090)
Enable callee saved register optimization implemented in
RAGreedy::tryAssignCSRFirstTime() for x86. It can replace save/restore
instructions in prologue/epilogue with register spill/reload in cold
blocks or register splits.
Spec cpu 2006 int result with fdo on skylake.
```
regalloc-csr-cost-scale 0 30
400.perlbench 42.0 42.7
401.bzip2 25.5 26.3
403.gcc 42.1 41.4
429.mcf 45.0 44.4
456.hmmer 38.2 38.2
458.sjeng 32.3 32.0
462.libquantum 68.0 68.9
471.omnetpp 26.9 27.3
473.astar 24.3 24.1
```
445.gobmk, 464.h264ref and 483.xalancbmk didn't work with my base
compiler.
This PR is split from https://github.com/llvm/llvm-project/pull/188609.
Commit: febece38855bf752ebc4b8cbce5d56adab78d1aa
https://github.com/llvm/llvm-project/commit/febece38855bf752ebc4b8cbce5d56adab78d1aa
Author: Wijkqwe <188143146+Wijkqwe at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/test/Dialect/MemRef/invalid.mlir
Log Message:
-----------
[mlir][memref] Reject empty collapse_shape and expand_shape reassociation groups (#225348)
`memref.collapse_shape` and `memref.expand_shape` both accept an empty
reassociation group, which is not a valid reassociation: every group
must be a
non-empty, contiguous segment of dimensions.
* `memref.collapse_shape` with an empty group aborts the compiler for a
non-identity source layout. `CollapseShapeOp::verify` forwards the
reassociation to `computeCollapsedLayoutMap`, which calls
`ArrayRef::back()`
on each group and asserts on the empty one:
mlir-opt: llvm/include/llvm/ADT/ArrayRef.h:151:
const T& llvm::ArrayRef<T>::back() const [with T = long int]:
Assertion `!empty()' failed.
With an identity source layout the op is instead silently accepted.
* `memref.expand_shape` with an empty group is silently accepted: the
empty
group maps a source dimension to no result dimension, so a real
dimension is
dropped without any diagnostic.
The tensor reshape verifiers already reject this input
(https://github.com/llvm/llvm-project/pull/173791,
https://github.com/llvm/llvm-project/issues/222602 /
https://github.com/llvm/llvm-project/pull/222648).
Extract the empty-group check into a helper shared by both memref
verifiers,
mirroring https://github.com/llvm/llvm-project/pull/222648, and invoke
it from `ExpandShapeOp::verify` and
`CollapseShapeOp::verify`.
Add regression tests to `mlir/test/Dialect/MemRef/invalid.mlir`.
Assisted-by: AI.
Commit: 182181c0d21157b362e4a6f1648cf23f58b38cef
https://github.com/llvm/llvm-project/commit/182181c0d21157b362e4a6f1648cf23f58b38cef
Author: Matthias Springer <me at m-sp.org>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/include/mlir/IR/BuiltinTypeInterfaces.td
Log Message:
-----------
[mlir][NFC] Improve `ShapedTypeInterface` documentation (#225282)
Document that each dimension size must be not larger than "signed int64
max".
Related discussion:
https://discourse.llvm.org/t/rfc-vector-should-vector-transfer-read-transfer-write-indices-be-treated-as-unsigned-non-negative/91869/6
Commit: 1f01cb40300e3a76fe0b6b97e0cf1ad36e9b631f
https://github.com/llvm/llvm-project/commit/1f01cb40300e3a76fe0b6b97e0cf1ad36e9b631f
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-leaves-known-bits.ll
Log Message:
-----------
[SLP]Fix crash in bool bitmask reduction match after tree vectorization
The known bits of the narrowed reduction leaves were computed after the
tree vectorization, which drops the operands of the vectorized scalars,
so the analysis dereferenced null operands. Match the bitmask form before
the vectorization and pass the result to the emission.
Fixes #225538
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225568
Commit: ffeffce9253b42370029e3a098bea24e5287a830
https://github.com/llvm/llvm-project/commit/ffeffce9253b42370029e3a098bea24e5287a830
Author: Jonas Devlieghere <jonas at devlieghere.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/interface/SBProcessExtensions.i
M lldb/examples/darwin/heap_find/heap.py
M lldb/examples/darwin/heap_find/heap/heap_find.cpp
M lldb/examples/python/file_extract.py
M lldb/examples/synthetic/libcxx.py
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/Host/common/NativeProcessProtocol.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/Args.h
M lldb/include/lldb/Utility/Broadcaster.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/include/lldb/Utility/DataEncoder.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/include/lldb/Utility/RegularExpression.h
M lldb/include/lldb/Utility/State.h
M lldb/include/lldb/Utility/Status.h
M lldb/include/lldb/Utility/Stream.h
M lldb/include/lldb/Utility/StreamBuffer.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Interpreter/OptionGroupFormat.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Utility/Args.cpp
M lldb/source/Utility/DataExtractor.cpp
M lldb/source/Utility/Stream.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/TestDataFormatterStdString.py
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/macosx/lc-note/additional-registers/add-lcnote.cpp
M lldb/test/API/tools/lldb-server/main.cpp
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/PseudoTerminal.cpp
M lldb/tools/debugserver/source/RNBServices.cpp
M lldb/tools/debugserver/source/debugserver.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/unittests/Utility/DataEncoderTest.cpp
M lldb/unittests/Utility/DataExtractorTest.cpp
Log Message:
-----------
[lldb] Consistently use "null-terminated" across LLDB (NFC) (#224801)
It appears that both spellings are correct, but "null terminator" is far
more common, while "NUL terminator" is technically precise regarding the
ASCII character name. Most common in LLDB was "NULL terminated" which is
the worst of both worlds. This rallies around "null-terminated".
- Adjective -> null-terminated
- Verb -> null-terminate
- Nouns left unhyphenated but lowercased: null terminator, null
termination
Commit: b47a631eeaff515d63232ba5b69f7206ea9ca718
https://github.com/llvm/llvm-project/commit/b47a631eeaff515d63232ba5b69f7206ea9ca718
Author: Schrodinger ZHU Yifan <yifanzhu at rochester.edu>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/fuzzing/__support/CMakeLists.txt
M libc/src/__support/CMakeLists.txt
M libc/src/__support/block.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.cpp
M libc/src/__support/freetrie.h
M libc/src/__support/tlsf_table.h
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/freelist_heap_test.cpp
Log Message:
-----------
[libc] Implement dual freestore rotation for baremetal heap (#209811)
Implement dual FreeStore rotation in FreeListHeap under
LIBC_COPT_BAREMETAL_HEAP_ENABLE_FREESTORE_ROTATION option for baremetal
targets.
- Allocations pull from active store; free() quarantines blocks into
non-active store (1 - active).
- On allocation failure in active store, rotate() flips active index and
migrates/coalesces quarantined blocks into the new active store.
- Added 2-bit prev_free tracking in BlockRef metadata to distinguish
freestore indices.
- Added unit smoke tests and updated fuzzer for dual freestore rotation.
Assisted-by: Gemini and Claude based automation tool (human-in-the-loop)
---------
Co-authored-by: Yifan Zhu <yfzhu at google.com>
Co-authored-by: Claude Fable 5.1 <noreply at anthropic.com>
Commit: 6c95a9274885a7c0490cd8bc67ae7549f479d825
https://github.com/llvm/llvm-project/commit/6c95a9274885a7c0490cd8bc67ae7549f479d825
Author: Vedant Paranjape <veparanjape at microsoft.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
Log Message:
-----------
[LV] Narrow truncated inductions in a VPlan transform (#220730)
VPRecipeBuilder::tryToOptimizeInductionTruncate matched a truncate of an
induction phi on the underlying IR, and it built the narrowed
VPWidenIntOrFpInductionRecipe from the recipe behind the truncate's
operand.
VPlanTransforms already answers the same question on VPValues in
getOptimizableIVOf, which returns the header IV whether the operand is
the IV
itself or an add of the IV and its step.
Add VPlanTransforms::narrowInductionTruncates and do the match there,
reusing
getOptimizableIVOf and restricting it to the phi for now. The pass runs
right
after makeCallWideningDecisions, which preserves the ordering against
makeScalarizationDecisions that the recipe builder relied on. Building
the
recipe in the transform also removes the need for the conversion loop to
special case a truncate and move the recipe into the header phi section,
because the transform inserts it there directly.
Assisted-By: Claude Opus 5
Commit: 3092b4657f1c18587a7ae0cf569f3fce291a5267
https://github.com/llvm/llvm-project/commit/3092b4657f1c18587a7ae0cf569f3fce291a5267
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
Log Message:
-----------
[RISCV][MC] Mark the cv.insert is2 decoder as incomplete (#225574)
This commit addresses the post-commit review of
https://github.com/llvm/llvm-project/pull/225269
Commit: b011bce803b02e0a13a593b70beec93c84a4a2e9
https://github.com/llvm/llvm-project/commit/b011bce803b02e0a13a593b70beec93c84a4a2e9
Author: Zeyi Xu <zeyi2 at nekoarch.cc>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
A llvm/test/MC/Disassembler/RISCV/xthead-invalid-overlap.txt
M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
Log Message:
-----------
[RISCV] Reject XTHeadMemIdx load-update with rd == rs1 (#225271)
In spec: "The encoding of this instruction with equal _rd_ and _rs1_ is
reserved."
This commit fixes the problem in Assembler, Codegen is already correct.
Link:
-
[th.lbia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lbia.adoc#L28)
-
[th.lbib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lbib.adoc#L28)
-
[th.lbuia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lbuia.adoc#L28)
-
[th.lbuib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lbuib.adoc#L28)
-
[th.lhia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lhia.adoc#L28)
-
[th.lhib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lhib.adoc#L28)
-
[th.lhuia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lhuia.adoc#L28)
-
[th.lhuib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lhuib.adoc#L28)
-
[th.lwia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lwia.adoc#L28)
-
[th.lwib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lwib.adoc#L28)
-
[th.lwuia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lwuia.adoc#L28)
-
[th.lwuib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/lwuib.adoc#L28)
-
[th.ldia](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/ldia.adoc#L28)
-
[th.ldib](https://github.com/XUANTIE-RV/thead-extension-spec/blob/d16533b5a9cd790c369d849ddf9a48159a5a235c/xtheadmemidx/ldib.adoc#L28)
--
AI Usage: Cursor is used for resolving conflicts.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: 7e25a95499b340624a607f179fd8ef8cdad8d99a
https://github.com/llvm/llvm-project/commit/7e25a95499b340624a607f179fd8ef8cdad8d99a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-conformance-tests.yaml
Log Message:
-----------
[libc++] Pin down the OS version of macOS runners (#225536)
Otherwise, we sometimes end up using runners that don't have Xcode 26.5
on them. Pinning this allows bumping the version explicitly when we are
ready to.
Commit: 9328848691133de33e96a66058ae486a388e77c1
https://github.com/llvm/llvm-project/commit/9328848691133de33e96a66058ae486a388e77c1
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libcxx/test/benchmarks/containers/string.bench.cpp
Log Message:
-----------
[libc++] Add missing <cstring> include in the string benchmark (#225501)
The benchmark uses std::strlen but never includes <cstring>.
Commit: 1bfe9893f3dc12f1c0f9546564519f02601b2192
https://github.com/llvm/llvm-project/commit/1bfe9893f3dc12f1c0f9546564519f02601b2192
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M libcxx/test/CMakeLists.txt
R libcxx/test/benchmarks/CMakeLists.txt
A libcxx/test/benchmarks/lit.local.cfg
M libcxx/test/configs/harness-configuration.cfg.in
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/format.py
A libcxx/utils/libcxx/test/googlebenchmark.py
M libcxxabi/test/configs/cmake-bridge.cfg.in
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
[libc++] Build GoogleBenchmark directly from Lit (#224192)
Previously, we would build GoogleBenchmark against the just-built
library, not against the library being tested. When testing historical
versions of libc++ or other standard libraries, this breaks. So instead
of building Google Benchmark against the just-built library in CMake, do
it from Lit as part of the test suite's configuration.
I'm not a huge fan of using Lit as a poor man's build system and we
should make the CMake test suite self-contained, however this is a step
in the right direction and it removes a major coupling between the test
suite and the regular libc++ build.
Commit: 7f8640b7bdab5a79ffc02e1a039c09217459f1f9
https://github.com/llvm/llvm-project/commit/7f8640b7bdab5a79ffc02e1a039c09217459f1f9
Author: Phoebe Wang <phoebe.wang at intel.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/test/ELF/x86-64-plt.s
Log Message:
-----------
[lld] Add -z mark-plt support for X86_64 (#206002)
Add option [no]mark-plt to enable it. Dynamic linker can change PLT
entries with JMPABS instruction on supported targets.
Ref.:
https://maskray.me/blog/2021-09-19-all-about-procedure-linkage-table#x86-plt-rewriting
Assisted-by: Claude Sonnet 4.6
---------
Co-authored-by: Claude Opus 4.8 <noreply at anthropic.com>
Commit: 20e7308dbc1b1a6e532a139132e20112ca482b84
https://github.com/llvm/llvm-project/commit/20e7308dbc1b1a6e532a139132e20112ca482b84
Author: Aaditya <115080342+easyonaadit at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
Log Message:
-----------
[AMDGPU] Port Atomic-Optimizer to use Wave Reduction Intrinsics (#211757)
Currently the atomic optimizer creates reductions via intrinsics,
and introduces new control flows.
Replace this sub-target dependent logic with the existing
wave reduction intrinsics, which get lowered in the backend.
This patch ports the uniform-value and divergent-no-return-value cases.
To port the divergent-with-return-value cases, additional scan intrinsics
will need to be added.
Commit: 82732028dc614b08676fd240f8672d1e58174685
https://github.com/llvm/llvm-project/commit/82732028dc614b08676fd240f8672d1e58174685
Author: Dharuni R Acharya <125176188+DharuniRAcharya at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/IR/Intrinsics.h
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/test/TableGen/intrinsic-default-args.td
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
Log Message:
-----------
[LLVM][AutoUpgrade] Support default args on overloaded intrinsics (#217859)
This patch extends intrinsic `DefaultValue` auto-upgrade to overloaded
intrinsics.
---------
Signed-off-by: DharuniRAcharya <dharunira at nvidia.com>
Commit: 3648582c0a41eb675ebc18b91682cb0145cc30e0
https://github.com/llvm/llvm-project/commit/3648582c0a41eb675ebc18b91682cb0145cc30e0
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sys/windows/Memory.cpp
A orc-rt/lib/bedrock/sys/windows/PageSize.cpp
A orc-rt/test/regression/check-rt-process-info.test
R orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
Log Message:
-----------
[orc-rt] Add Windows page size detection (#224520)
Adds Windows page size detection for ORC-RT using GetSystemInfo.
Also updates the process-info regression coverage into a single test
Commit: fa43610d69293a36e54accc5d7864b93ced9c8a4
https://github.com/llvm/llvm-project/commit/fa43610d69293a36e54accc5d7864b93ced9c8a4
Author: Craig Topper <craig.topper at sifive.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/float-imm.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
Log Message:
-----------
[RISCV] Expand scalar FP undef/poison to 0.0 with F extension. (#225567)
This ensures the undef/poison value is always nan-boxed. This is
important if the value ends up being used by a freeze. If the value
isn't properly nan-boxed, it will be treated as a nan in FP contexts
regardless of its lower bits. If the freeze is also cast to an integer,
the lack of nan-boxing will be noticed and the integer will see the real
value of the lower bits.
Fixes #225455.
Commit: 72aeee3df11d606505a30bce5e97b6286365bc35
https://github.com/llvm/llvm-project/commit/72aeee3df11d606505a30bce5e97b6286365bc35
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/regression/check-rt-process-info.test
Log Message:
-----------
[orc-rt] Reconcile check-rt-process-info changes. (#225592)
3648582c0a41 was supposed to make this test more generic, but
accidentally removed it instead.
Reconcile the dropped changes with 3648582c0a41, which added page-size
checking.
Commit: 081cc091b90248c62607c34eff91e7afbf252129
https://github.com/llvm/llvm-project/commit/081cc091b90248c62607c34eff91e7afbf252129
Author: geoffreygaren <ggaren at apple.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M clang/docs/analyzer/checkers.md
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.h
A clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
Log Message:
-----------
[WebKit Checkers] Add alpha.webkit.UnborrowedLocalVarsChecker (#225274)
This is a new checker that requires a Borrow<T> when using a
pointer/reference/view that is lifetimebound to a CanBorrow type.
A CanBorrow type is a type that tracks views into its interior at
runtime, and calls crashIfBorrowed() when it invalidates such views.
Vector is the motivating example.
A design description is available at:
https://github.com/WebKit/WebKit/wiki/SaferCPP:-Borrowed-Pointer-Use-After-Destruction
I implemented UnborrowedLocalVarsChecker in terms of the existing
alpha.webkit.*LocalVarsChecker system because the requirement to hold an
overlooking smart-pointer-like-thing is pretty similar.
In some cases where the new checker is stricter than the existing
checker, this patch conditionalizes the strictness. The plan is to
upgrade existing checkers in a follow-up patch.
Assisted-by: Claude
Commit: 4c8a437d04872b00a4e32e4423ff076e7049cb37
https://github.com/llvm/llvm-project/commit/4c8a437d04872b00a4e32e4423ff076e7049cb37
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/unit/CMakeLists.txt
A orc-rt/test/unit/ErrorMatchers.h
A orc-rt/test/unit/ErrorMatchersTest.cpp
Log Message:
-----------
[orc-rt] Add gmock matchers for Error and Expected<T> (#225596)
Ports llvm/Testing/Support/Error.h to orc_rt: EXPECT_THAT_ERROR and
ASSERT_THAT_ERROR, EXPECT_THAT_EXPECTED and ASSERT_THAT_EXPECTED, and
the Succeeded, Failed, Failed<InfoT>, FailedWithMessage and HasValue
matchers.
Two departures from the original. An orc_rt Error carries at most one
ErrorInfoBase -- there is no joinErrors -- so the holder keeps a single
error, FailedWithMessage takes one matcher rather than a variadic pack,
and FailedWithMessageArray is dropped. ErrorInfoBase has
dynamicRTTIName, so a type mismatch names the type that did turn up
rather than reporting only that the expected one was absent.
Header-only, under test/unit with the other test helpers rather than in
a shipped testing library. ErrorMatchersTest exercises each matcher
against a matching and a non-matching value, the latter through gtest's
failure interception.
Commit: f5f1fd6fc00bdd2ace69100fc5c4a78839f53010
https://github.com/llvm/llvm-project/commit/f5f1fd6fc00bdd2ace69100fc5c4a78839f53010
Author: Kyungwoo Lee <kyulee at meta.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lld/MachO/MapFile.cpp
M lld/MachO/SyntheticSections.h
M lld/test/MachO/arm64-objc-stubs-dead.s
M lld/test/MachO/arm64-objc-stubs.s
M lld/test/MachO/objc-stubs-order-file.s
M lld/test/MachO/x86-64-objc-stubs.s
Log Message:
-----------
[lld-macho] Print Objective-C stubs in map files (#225302)
Match ld-prime by listing synthesized Objective-C message-send stubs in
Mach-O map files, including their final addresses and mode-specific sizes.
Commit: 85fca8f1f49103bd709e33a308356c67f04de2be
https://github.com/llvm/llvm-project/commit/85fca8f1f49103bd709e33a308356c67f04de2be
Author: Purna Chandra <vennelapurnachandra2006 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming.cpp
Log Message:
-----------
[clang-tidy] Fix crash in readability-identifier-naming (#220221)
This PR contains the fix for the `readability-identifier-naming` crash.
The crash happens because the checker calls `hasMemberName` on a base
class without checking if that base class actually has a definition
first (like when it's just forward-declared). I added a
`RD->hasDefinition()` guard to fix it.
Fixes #213948
Commit: 20bc398ee73431ff15eae8581a64aadeea91b8a3
https://github.com/llvm/llvm-project/commit/20bc398ee73431ff15eae8581a64aadeea91b8a3
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
A .github/workflows/libcxx/build-at-commit/action.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Extract building libc++ into a composite action (#224670)
This allows reusing the same build script for the PR benchmark and
the historical benchmarking jobs. This also opens the door to adding
new configurations where the library isn't rebuilt (e.g. where the
artifacts are pulled from a pre-built location, or even testing against
non-libc++.
Assisted by Claude
Commit: 4057f8e45b7fcadf99b60763c873802f8add8770
https://github.com/llvm/llvm-project/commit/4057f8e45b7fcadf99b60763c873802f8add8770
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/config/linux/app.h
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/tls.cpp
A libc/src/__support/threads/linux/riscv/CMakeLists.txt
A libc/src/__support/threads/linux/riscv/tls.cpp
A libc/src/__support/threads/linux/x86_64/CMakeLists.txt
A libc/src/__support/threads/linux/x86_64/tls.cpp
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/CMakeLists.txt
R libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/CMakeLists.txt
R libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
R libc/startup/linux/x86_64/tls.cpp
Log Message:
-----------
[libc] Move Linux TLS routines from crt1.o into libc.a (#225418)
init_tls, cleanup_tls, and set_thread_ptr are per-thread routines used
by both Thread::run in libc.a and main-thread startup in crt1.o, but
tls.cpp was previously only merged into crt1.o. Linking libc.a without
crt1.o (such as a self-contained shared library statically linking
libc.a, or an executable built with -nostartfiles) failed with undefined
hidden symbols when thread.cpp.o was pulled in.
Move {x86_64,aarch64,riscv}/tls.cpp from libc/startup/linux/ to
libc/src/__support/threads/linux/ alongside tcb.h (matching prior
migrations of auxv and program_invocation_name from startup into src so
dependencies flow from startup -> src). Expose them via a forwarding
ALIAS target libc.src.__support.threads.linux.tls depended on by both
thread and do_start, and remove tls from merge_relocatable_object(crt1).
Mark init_tls with [[gnu::flatten]] and compile tls with
${libc_opt_high_flag}. Once tls.cpp.o is in libc.a rather than first on
the link line inside crt1.o, an earlier object compiled with
-fstack-protector-strong can otherwise win COMDAT selection for
LIBC_INLINE helpers (e.g. linux_syscalls::getrandom) in -O0 builds and
read %fs:0x28 before set_thread_ptr initializes the thread pointer.
Change AppProperties app in libc/config/linux/app.h from extern
[[gnu::weak]] (which resolved to NULL without crt1.o) to
LIBC_INLINE_VAR, providing a COMDAT-deduplicated .bss definition shared
by crt1.o and libc.a, matching auxv::value.
Assisted-by: Automated tooling, human reviewed.
Commit: 6506e7380c7f5fced1d6b4cdca58974ee945897b
https://github.com/llvm/llvm-project/commit/6506e7380c7f5fced1d6b4cdca58974ee945897b
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A orc-rt/include/orc-rt-internal/support/sys/WinErrorToORCError.h
M orc-rt/lib/bedrock/sys/windows/Memory.cpp
M orc-rt/test/regression/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
Log Message:
-----------
[orc-rt] Add Windows virtual memory support (#224521)
Adds Windows virtual-memory support for ORC-RT
Also adds a small Windows error helper that converts GetLastError()
results into ORC-RT Error values with the corresponding system message.
Turns back on all the memory tests for windows.
Commit: 926b5e99cf68644ea18ae4573d4bdbfd7edf1cb5
https://github.com/llvm/llvm-project/commit/926b5e99cf68644ea18ae4573d4bdbfd7edf1cb5
Author: Benji Smith <6193112+Benjins at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/test/AST/ByteCode/const-base-cast.cpp
Log Message:
-----------
[clang][bytecode] Fix null ptr upcasts adding offset (#224873)
Previously, this was applying the offset it would for non-null pointers,
but null pointers should always cast to a null pointer result.
Fixes https://github.com/llvm/llvm-project/issues/224869
Commit: d34026a71c20467ceac583b5bddff3fa322d2c82
https://github.com/llvm/llvm-project/commit/d34026a71c20467ceac583b5bddff3fa322d2c82
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/unit/bedrock/ConnectionSpecTest.cpp
Log Message:
-----------
[orc-rt] Use the Error matchers in ConnectionSpecTest (#225603)
Use the Error matchers introduced in 72aeee3df1 to clean up error checks
in ConnectionSpecTest.
Commit: 2dea059adc9a99f30e6aae3ca8b7468164d2b938
https://github.com/llvm/llvm-project/commit/2dea059adc9a99f30e6aae3ca8b7468164d2b938
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sched.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/threads/linux/CMakeLists.txt
M libc/src/__support/threads/linux/thread.cpp
M libc/src/pthread/CMakeLists.txt
M libc/src/sched/CMakeLists.txt
A libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/clone.cpp
M libc/src/threads/CMakeLists.txt
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/linux/CMakeLists.txt
A libc/test/src/sched/linux/clone_test.cpp
Log Message:
-----------
Reland "[libc] Implement clone(2) and use it in thread spawning" (#225384)
This commit reverts 35006688eb78eb5b601e282d21701f430d737888/#225111,
reapplying 9028ff14b18ea678683a4960306051044160bb67/#224257. It fixes an
error in risc-v assembly (forgot to adjust for constant renaming).
The original commit message was:
This patch implements an internal clone syscall wrapper and uses it both
to implement the public clone(2) entry point and to spawn new threads in
libc's thread implementation.
Previously, thread creation in thread.cpp invoked the raw SYS_clone
syscall directly, requiring target-specific inline assembly or register
variables and subtle tricks with __builtin_frame_address to pass
arguments to start_thread in the newly spawned thread.
By introducing an inline assembly clone wrapper that sets up func and
arg on the child stack and jumps to the entry function upon clone
returning in the child, we can simplify start_thread to a normal
function taking a single void * argument and eliminate the frame pointer
hacks as well as the need to compile thread.cpp with
-fno-omit-frame-pointer or optimizations.
The public clone(2) entrypoint delegates to this wrapper after unpacking
its varargs and validating pointers (returning EINVAL like glibc).
A particularly tricky aspect of this patch is the invalidation of the
cached thread IDs. As with fork(), we do this in the parent, but we
cannot do this safely for clone() in all situations. The problematic
case is where the user does not set a custom TLS block (which means the
child uses the parent's block), does not clone the address space (no
copy-on-write), and does not suspend the parent (vfork semantics). In
this case, we just give up and don't touch the thread ID. For this
particular flag, most of the operations in the child are not safe, so
we're assuming the user is prepared for such a restricted environment.
Support is implemented for x86_64, aarch64, and riscv. The
architecture-specific assembly is split out into detail::clone_impl
inside per-architecture headers.
Assisted-by: Gemini
Commit: bad56e4022e1c7d557da204cc721862229f03544
https://github.com/llvm/llvm-project/commit/bad56e4022e1c7d557da204cc721862229f03544
Author: forking-google-bazel-bot[bot] <265904573+forking-google-bazel-bot[bot]@users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[Bazel] Fixes 4057f8e (#225600)
This fixes 4057f8e45b7fcadf99b60763c873802f8add8770 (#225418).
Buildkite error link:
https://buildkite.com/llvm-project/upstream-bazel/builds?commit=4057f8e45b7fcadf99b60763c873802f8add8770
Co-authored-by: Google Bazel Bot <google-bazel-bot at google.com>
Commit: 34d1f71c636d9ea6169b54b10992599030b7496a
https://github.com/llvm/llvm-project/commit/34d1f71c636d9ea6169b54b10992599030b7496a
Author: Petr Hosek <phosek at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
A libc/src/__support/File/file_io_result.h
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/file_internal.h
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
[libc] Extract FileIOResult into its own header (#225464)
This avoids the duplicate definitions.
Commit: 07baaf98151589f642bcf913a57d43ed16a13ba1
https://github.com/llvm/llvm-project/commit/07baaf98151589f642bcf913a57d43ed16a13ba1
Author: SunilKuravinakop <98882378+SunilKuravinakop at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
M flang/test/Lower/OpenMP/Todo/dispatch.f90
A flang/test/Lower/OpenMP/dispatch.f90
M flang/test/Semantics/OpenMP/simd-only.f90
Log Message:
-----------
[flang][OpenMP] Support for dispatch construct (#225356)
Support for omp dispatch and omp dispatch nowait in flang.
-----
Sunil Kuravinakop (koops at hpe.com)
Commit: e0416baf412b44d09be9b300b50a15c57cdf148b
https://github.com/llvm/llvm-project/commit/e0416baf412b44d09be9b300b50a15c57cdf148b
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGVTT.cpp
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/test/CodeGen/ptrauth-qualifier-const-init.c
M clang/test/CodeGen/ptrauth-restricted-intptr-qualifier.c
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/OmitRTTIComponentABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/PR26569.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/deleted-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-hwasan.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/constructor-init.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/dllimport-rtti.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-interface.cpp
M clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call-2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp
M clang/test/CodeGenCXX/ptrauth-global-constant-initializers.cpp
M clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
M clang/test/CodeGenCXX/ptrauth-rtti-layout.cpp
M clang/test/CodeGenCXX/ptrauth-type-info-vtable.cpp
M clang/test/CodeGenCXX/ptrauth-virtual-function.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-in-vtt.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/rtti-mingw64.cpp
M clang/test/CodeGenCXX/rtti-qualfn.cpp
M clang/test/CodeGenCXX/skip-vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/static-init.cpp
M clang/test/CodeGenCXX/strict-vtable-pointers.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/visibility.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-align.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenObjC/attr-exception.m
M clang/test/CodeGenObjC/ptrauth-attr-exception.m
M clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m
M clang/test/CodeGenObjC/ptrauth-block-isa.m
M clang/test/CodeGenObjC/ptrauth-class-ro.m
M clang/test/CodeGenObjC/ptrauth-objc-isa-super.m
M clang/test/CodeGenObjC/ptrauth-objc-method-list-pointer.m
M clang/test/OpenMP/target_data_use_device_ptr_inheritance_codegen.cpp
Log Message:
-----------
[Clang] Use ConstantExpr::getGetElementPtr() with DataLayout (#225415)
This switches Clang to use the API introduced in
https://github.com/llvm/llvm-project/pull/224652. This produces
getelementptr constant expressions in canonical ptradd form.
Commit: d88a7a003f0cea42b6233da0447392d15459e192
https://github.com/llvm/llvm-project/commit/d88a7a003f0cea42b6233da0447392d15459e192
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CodeGenModule.cpp
A clang/test/CodeGen/WebAssembly/target-abi-module-flag.c
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.h
A llvm/test/CodeGen/WebAssembly/multivalue-module-abi.ll
Log Message:
-----------
WebAssembly: Respect target-abi module flag (#224312)
Previously this relied on the TargetABI MCOptions field and ignored
the IR flag.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: f47c2807a4d2585850b771a25dbfe843f8ac7d87
https://github.com/llvm/llvm-project/commit/f47c2807a4d2585850b771a25dbfe843f8ac7d87
Author: Timur Golubovich <timur.golubovich at intel.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
A llvm/test/CodeGen/SPARC/known-bits.ll
M llvm/test/CodeGen/X86/known-bits.ll
M llvm/test/CodeGen/X86/pr38539.ll
Log Message:
-----------
[SelectionDAG] Handle BUILD_PAIR in computeKnownBits (#225073)
Concatenate the known bits of both halves, with operand 0 as the low
half and operand 1 as the high half, matching
TargetLowering::SimplifyDemandedBits and GlobalISel's G_MERGE_VALUES.
Commit: d8aecd0b3ff64a484197e187a292f8841e4f8e93
https://github.com/llvm/llvm-project/commit/d8aecd0b3ff64a484197e187a292f8841e4f8e93
Author: Mariya Podchishchaeva <Mariya.Podchishchaeva at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for wave_shuffle built-in (#225463)
Commit: b313739c953857e0a686cc3b1b1d1b208897bfa9
https://github.com/llvm/llvm-project/commit/b313739c953857e0a686cc3b1b1d1b208897bfa9
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
Log Message:
-----------
[orc-rt] Fix missing #include <deque> in Socket CA. (#225608)
Add missing #include <deque> to SimpleRemoteCAOverSocket.cpp to fix
compile errors on Linux.
Commit: 5e5e63dfc728c38b5aab46b8cd61325fedc562ea
https://github.com/llvm/llvm-project/commit/5e5e63dfc728c38b5aab46b8cd61325fedc562ea
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
A clang/test/AST/ByteCode/codegen.cl
Log Message:
-----------
[clang][bytecode] Add an `IsNull` bit to integral pointers (#202356)
It isn't always the same as 'value == 0'.
Commit: 685e2b1b1231db578da789fb896543ddb311e293
https://github.com/llvm/llvm-project/commit/685e2b1b1231db578da789fb896543ddb311e293
Author: Sven van Haastregt <sven.vanhaastregt at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/utils/TableGen/OptionParserEmitter.cpp
Log Message:
-----------
[TableGen] Avoid deprecated-enum-enum-conversion C++20 warnings; NFC (#218909)
The bitwise OR of different enum types resulted in many C++20
deprecation warnings in the generated option tables:
warning: bitwise operation between different enumeration types
‘llvm::opt::DriverVisibility’ and
‘clang::options::ClangVisibility’ is deprecated
[-Wdeprecated-enum-enum-conversion]
Fix by emitting casts to `unsigned`, matching the types of the
corresponding fields in `OptTable::Info`.
Commit: fba0822290721dd8144708d6c28902a87e3bb830
https://github.com/llvm/llvm-project/commit/fba0822290721dd8144708d6c28902a87e3bb830
Author: Rohan Shenoy <RohanRadhesh.Shenoy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86ISelLowering.cpp
A llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd.ll
Log Message:
-----------
[X86] Fold FMSUBADD into VFCMULC for fp16 complex conjugate multiply (#224533)
We reuse isCFMulFromFMSUBADD from #222896 to fold vfmsubadd into vfcmulc.
As a result using this pattern-match in combineFaddCFmul becomes
redundant as it (c += a * ~b) still becomes vfcmaddcph through the
existing fadd + vfcmulc combine.
Commit: 3661bf5f8b28f065067bd024918ed18957e1f46a
https://github.com/llvm/llvm-project/commit/3661bf5f8b28f065067bd024918ed18957e1f46a
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/CGVTT.cpp
Log Message:
-----------
[CGVTT] Fix indentation (NFC) (#225621)
The indentation in this entire code block was off-by-one, which
incremental clang-format can't handle, so reformat the whole
section.
Commit: 75225e04996471098bacf6888d33ab94cf7595d1
https://github.com/llvm/llvm-project/commit/75225e04996471098bacf6888d33ab94cf7595d1
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp
Log Message:
-----------
[Clang] Fix test with 32-bit triple (#225624)
Commit: b176c11a5e77d32be272a528b4fc8ee24840a8d5
https://github.com/llvm/llvm-project/commit/b176c11a5e77d32be272a528b4fc8ee24840a8d5
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
Log Message:
-----------
[LV] Add tests for missed scalarization opportunities. (#225508)
Add additional test coverage with unnecessary extracts.
Commit: c0590ce37393e481402bd566aa69b1ad57905e50
https://github.com/llvm/llvm-project/commit/c0590ce37393e481402bd566aa69b1ad57905e50
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
Log Message:
-----------
[VPlan] Inline VPInsertPoint::insert. NFC (#225468)
Split off from https://github.com/llvm/llvm-project/pull/213900
This avoids the templating since the return value of wasn't used.
I've also taken the liberty of renaming Point->Iterator since
VPInsertPoint::getPoint is a bit confusing
Commit: a91921eda070d6903896432802845222e49e9713
https://github.com/llvm/llvm-project/commit/a91921eda070d6903896432802845222e49e9713
Author: Pavel Labath <pavel at labath.sk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_create.cpp
Log Message:
-----------
[libc] Remove cross-entrypoint dependencies from pthread_create (#225383)
pthread_create was previously calling public entrypoints
(pthread_attr_init, pthread_attr_destroy, pthread_attr_getstack,
pthread_attr_getguardsize, pthread_attr_getdetachstate), which violates
the rule against internal cross-entrypoint dependencies.
To fix this, I create an internal header (src/pthread/pthread_attr.h)
defining DEFAULT_PTHREAD_ATTR, modeled after DEFAULT_MUTEXATTR in the
mutex code.
pthread_create now defaults to &DEFAULT_PTHREAD_ATTR when the attr
pointer is null, and accesses the struct members directly instead of
going through getter functions. This also makes it clear that getting
the values cannot fail. I also update pthread_attr_init to reuse
DEFAULT_PTHREAD_ATTR to avoid duplicating the default values.
While in there, update the includes to use proxy headers instead of
including <pthread.h> directly, and drop the dependency on errno since
pthread_create returns errors directly rather than setting errno.
Assisted-by: Gemini
Commit: 7fdffde1a3a932069d1aeb38c8c949166838476c
https://github.com/llvm/llvm-project/commit/7fdffde1a3a932069d1aeb38c8c949166838476c
Author: Akash Manna <akash.manna.mymail at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/AST/ByteCode/records.cpp
Log Message:
-----------
[clang][bytecode] Add test for variadic inherited constructor calls (#225611)
Fixes #158529
Calling a variadic constructor through a `using` declaration used to hit
`assert(false && "Can't get arguments from that expression type")` in
`cleanupAfterFunctionCall`. The call site is a
`CXXInheritedCtorInitExpr`, and the cleanup only knew how to count
variadic arguments from a `CallExpr` or `CXXConstructExpr`. A single
level of `using` crashed the same way, the second level in the
reproducer just adds a frame.
This was fixed as a side effect of #207393, which now takes the variadic
size from the frame instead of the call expression. Adding the
reproducer plus a few value checks (single and double level, mixed
vararg types, inside a constexpr function) so it stays fixed.
Commit: 62ea87e542c3fea716875953b9427896f345f7d1
https://github.com/llvm/llvm-project/commit/62ea87e542c3fea716875953b9427896f345f7d1
Author: Haowei <haowei at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libcxx/test/CMakeLists.txt
A libcxx/test/benchmarks/CMakeLists.txt
R libcxx/test/benchmarks/lit.local.cfg
M libcxx/test/configs/harness-configuration.cfg.in
M libcxx/utils/libcxx/test/config.py
M libcxx/utils/libcxx/test/format.py
R libcxx/utils/libcxx/test/googlebenchmark.py
M libcxxabi/test/configs/cmake-bridge.cfg.in
M libunwind/test/configs/cmake-bridge.cfg.in
Log Message:
-----------
Revert "[libc++] Build GoogleBenchmark directly from Lit" (#225620)
Reverts llvm/llvm-project#224192
The original PR introduce implict dependency on cmake from path. Further
more, the cmake invocation from googlebenchmark.py didn't inherit
CMAKE_MAKE_PROGRAM and cmake generator flags from the parent LLVM build,
causing implicit dependency on make. It causes test failures on systems
that do not have these installed or config in their default path.
Commit: febf4155e9856cca9e7719b833e365e794e225bd
https://github.com/llvm/llvm-project/commit/febf4155e9856cca9e7719b833e365e794e225bd
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/test/Transforms/GVN/rle-clobbering-store.ll
Log Message:
-----------
[GVN] Handle value-preserving stores in MSSA-based load elimination (#223793)
Following up on #68322, extend the MemorySSA-based redundant load
elimination path to recognize stores that write back a value previously
loaded from the same location. If nothing modifies the memory location
in between, such stores may be treated as non-clobbering, and the
subsequent load may be redundant.
Commit: 6e47e8fb1eb379e71e8044571511f4fee281b9c4
https://github.com/llvm/llvm-project/commit/6e47e8fb1eb379e71e8044571511f4fee281b9c4
Author: Ramkumar Ramachandra <artagnon at tenstorrent.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Analysis/ScalarEvolution/implied-cond-ge-via-gt-minus-one.ll
Log Message:
-----------
[SCEV] Add implied-cond-ge-via-gt test coverage (#225024)
Add test coverage for a very obscure codepath in howManyLT.
Co-authored-by: Florian Hahn <flo at fhahn.com>
Commit: 942114858fd1124de32a0d1fd3885db8c9f37abb
https://github.com/llvm/llvm-project/commit/942114858fd1124de32a0d1fd3885db8c9f37abb
Author: Christian Kandeler <christian.kandeler at qt.io>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
Log Message:
-----------
[clangd] Don't offer Extract to Function for a VarDecl's initializer (#225434)
Selecting just the initializer of a variable declaration, e.g.
`auto A = [[func()]];`, was incorrectly offered for extraction,
producing a void-returning function called where a value is required:
```cpp
void extracted() { func(); }
void f() { auto A = extracted(); }
```
This doesn't compile (auto can't deduce from void; a fixed type would
likewise fail to convert from void).
`getEnclosingStmt()` ascends from the selected node to what should be
its enclosing statement, rejecting the case where that turns out to be
an `Expr` (meaning the selection is a subexpression of a larger
expression, not a genuine statement). A `VarDecl`'s initializer isn't
caught by that check, though: ascending from it lands on the `VarDecl`
itself, which is a `Decl`, not a `Stmt` or `Expr`. Broaden the check to
reject unless the ascended-to parent is a `Stmt` (note `Expr` is itself
a `Stmt` subtype in Clang's AST, so this still needs the separate
`Expr` check to catch the original case).
Assisted-by: Claude
Commit: 0ceb8668fa909fe48f4d74869817e78d0f325169
https://github.com/llvm/llvm-project/commit/0ceb8668fa909fe48f4d74869817e78d0f325169
Author: Chaitanya <Krishna.Sankisa at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/TargetInfoTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
Log Message:
-----------
[ABI] Thread alloca address space through getNaturalAlignIndirect (#225301)
Summary:
- Indirect arguments were always emitted in address space 0, dropping
the target's alloca address space.
- Mirror classic `ABIInfo::getNaturalAlignIndirect` by making the
address space explicit and sourcing it from a target hook, so
targets whose stack lives in a non-default space (e.g. AMDGPU private)
are lowered correctly.
Changes:
- `TargetInfo.h`: add `getAllocaAddrSpace()` (default 0), the
ABI-library analogue of `DataLayout::getAllocaAddrSpace()`. Make
AddrSpace a required parameter of `getNaturalAlignIndirect`.
- `TargetInfo.cpp`: pass AddrSpace into `ArgInfo::getIndirect`.
- X86/AArch64/BPF: pass `getAllocaAddrSpace()` at all
`getNaturalAlignIndirect` call sites.
- X86/AArch64 unit tests: assert the indirect address space is 0.
Assisted by: claude opus 4.8
Commit: 7ecac8052859d14cc71b08fafdb4100d26eeaa4d
https://github.com/llvm/llvm-project/commit/7ecac8052859d14cc71b08fafdb4100d26eeaa4d
Author: Abid Qadeer <haqadeer at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Support/Utils.h
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
A flang/test/Integration/debug-include-file.f90
M flang/test/Integration/debug-module-2.f90
M flang/test/Integration/debug-module-constant.f90
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
A flang/test/Transforms/debug-include-file.fir
Log Message:
-----------
[flang][debug] Emit debug info for procedures from an INCLUDE'd file. (#225068)
A declaration read through INCLUDE gets a location that is fused with
the inclusion information, carrying a fir::LocationKindArrayAttr.
debugInfoIsAlreadySet treated any fused location as one this pass had
already handled, apart from a fir::LocationKindAttr that is never the
attribute actually used, so handleFuncOp and handleGlobalOp returned
immediately and such a procedure or global got no debug information at
all.
Examine what the fusion holds instead of only whether there is one. The
attribute to look for is now a template argument, so each caller names
the one it would attach itself, a DISubprogramAttr for a function and an
array of DIGlobalVariableExpressionAttr for a global, and no central
list has to be kept in step with them.
Doing only that describes the procedure at the line of the INCLUDE
statement rather than at its own, because the file and line are read
with a cast that a fused location does not satisfy, leaving them at the
compile unit's file and at line 1. Search the location for the
FileLineColLoc in both places instead. Searching it also gives a
variable inlined from another procedure the line it is declared on
rather than that same fallback of 1, which is what changes in
debug-dummy-argument-inline.fir.
---------
Co-authored-by: Cursor <cursoragent at cursor.com>
Commit: e56c2cefc3e7978de4a2d799fa3abec77d75af21
https://github.com/llvm/llvm-project/commit/e56c2cefc3e7978de4a2d799fa3abec77d75af21
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/Value.h
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/test/Analysis/BasicAA/call-escape-source.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
M llvm/test/Analysis/ValueTracking/invariant.group.ll
A llvm/test/Bitcode/upgrade-strip-invariant-group.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
M llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
M llvm/test/CodeGen/Generic/intrinsics.ll
R llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll
M llvm/test/Other/invariant.group.ll
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/DeadStoreElimination/launder.invariant.group.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/GVN/assume-equal.ll
M llvm/test/Transforms/GVN/invariant.group.ll
M llvm/test/Transforms/GlobalOpt/invariant.group.ll
R llvm/test/Transforms/Inline/inline_inv_group.ll
M llvm/test/Transforms/Inline/invariant-group-sroa.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
M llvm/test/Transforms/InstCombine/invariant.group.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/new-delete-itanium.ll
M llvm/test/Transforms/InstSimplify/invariant.group-load.ll
M llvm/test/Transforms/NewGVN/invariant.group.ll
M llvm/test/Transforms/SROA/invariant-group.ll
M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-free-cost.ll
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[IR] Remove llvm.strip.invariant.group intrinsic (#225399)
This intrinsic was originally introduced to make sure that if we have a
dominating condition like `a == launder.invariant.group(a)`, we don't
end up replacing the latter with the former, as that would allow the
optimizer to assume that the memory stays invariant, despite going
through a launder operation. Wrapping both comparison operands in
strip.invariant.group avoids the issue, because replacing one stripped
pointer with another is safe.
The underlying issue was fixed in
https://github.com/llvm/llvm-project/pull/224281 (and prior work), which
ensures that the problematic replacement cannot happen in the first
place.
https://github.com/llvm/llvm-project/pull/225072 stopped emitting
llvm.strip.invariant.group on the clang side.
This PR now removes the intrinsic entirely. To be on the safe side, it
is upgraded to llvm.launder.invariant.group. For Clang's specific usage,
just dropping it would be fine.
Commit: c41e1ef6e1cc650cd05328155408ecb705986f09
https://github.com/llvm/llvm-project/commit/c41e1ef6e1cc650cd05328155408ecb705986f09
Author: Daniel Petrovic <daniel-dev at hotmail.de>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ExprConstant.cpp
M clang/test/Sema/vector-assign.c
Log Message:
-----------
[clang] Fix crash on assigning to _Atomic vectors (#225125)
As described in the issue itself: d=c on _Atomic vector crashed during
the overflow check because isVectorType() doesn't look through _Atomic.
Strip _Atomic before checking operand types.
Fixes #225039
bt:
<img width="1908" height="825" alt="225039_crash_atomic_vector"
src="https://github.com/user-attachments/assets/c5d48ba5-fa9b-43f8-a555-8b9bbe558152"
/>
Co-authored-by: Timm Baeder <tbaeder at redhat.com>
Commit: 0b8d78f0eadfd5e5b790dacb5f8bc712c83fa3e2
https://github.com/llvm/llvm-project/commit/0b8d78f0eadfd5e5b790dacb5f8bc712c83fa3e2
Author: Kiran Chandramohan <kiran.chandramohan at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/issue-write.yml
Log Message:
-----------
[Github] Register Flang integration test check in issue comment workflow (#225500)
Allow issue-write.yml to consume comment artifacts from the Flang
integration test check. Landing this registration first enables testing
of the workflow in #221766.
Commit: 65f27d8ebd9df081f581c5f65e8f82c9be413695
https://github.com/llvm/llvm-project/commit/65f27d8ebd9df081f581c5f65e8f82c9be413695
Author: Fabrice de Gans <Steelskin at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/ids-check.yml
M llvm/utils/git/ids-check-helper.py
Log Message:
-----------
[ids-check] Make the script CWD-independent (#223354)
PR #208780 removed the working directory from the ids-check workflow
step invoking the ids-check-helper script. This caused the script to run
from the workspace root rather than the repository root. It turns out
that the script was not resilient to being run from any arbitrary
directory, which caused idt to never be invoked. This made the workflow
silently succeed without checking anything.
These changes resolve repository-relative paths against the script's own
location instead, assuming it is in the `llvm/utils/git` directory.
This also fixes the script to use the right resource directory when
using a prebuilt idt.
The effort to build LLVM as a dylib is tracked in #109483.
Commit: 309ae98474b69d96541dc28dc6666117842a5f57
https://github.com/llvm/llvm-project/commit/309ae98474b69d96541dc28dc6666117842a5f57
Author: Srinivasa Ravi <srinivasar at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/CodeGen/builtins-nvptx.c
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/test/CodeGen/NVPTX/convert-fp16-pzo.ll
R llvm/test/CodeGen/NVPTX/convert-fp16-rs-pzo.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/test/Target/LLVMIR/nvvm/convert_fp16x2.mlir
Log Message:
-----------
[clang][NVVM][NVPTX] Remove pzo modifier for rs rounding mode conversions (#225012)
This change removes the `pzo` modifier from the `fp16x2` conversion
intrinsics with `rs` rounding mode. This was added in
https://github.com/llvm/llvm-project/pull/214667 due to a bug in the
developer-preview version of the 13.4 PTX ISA docs, and this change
aligns it with the latest PTX ISA docs for 13.4.
PTX ISA reference:
https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#data-movement-and-conversion-instructions-cvt
Commit: 023687b8531d12a8fa639dfce460839a60ea5d3a
https://github.com/llvm/llvm-project/commit/023687b8531d12a8fa639dfce460839a60ea5d3a
Author: Aman Maurya <amanmaurya9209 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/sys/stat.yaml
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mknodat.cpp
A libc/src/sys/stat/mknodat.h
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mknodat_test.cpp
Log Message:
-----------
[libc] Implement mknodat in sys/stat (#225512)
Implement the standard POSIX.1-2008 / POSIX.1-2024 function `mknodat` in
`<sys/stat.h>`.
Fixes #225506
Commit: f4084fbccabf22ed6c3ac44f5800e33024395dac
https://github.com/llvm/llvm-project/commit/f4084fbccabf22ed6c3ac44f5800e33024395dac
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/regression/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
Log Message:
-----------
[orc-rt] Fix regression test after 6506e7380c7f. (#225646)
Fix typo, substitution issues.
Commit: 21f2cf952ccc3de5c0bb6a950cf1037122c13ce6
https://github.com/llvm/llvm-project/commit/21f2cf952ccc3de5c0bb6a950cf1037122c13ce6
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
Log Message:
-----------
Reland "[mlir][SPIR-V] Verify NonPrivatePointer requirement for MakePointer{Available,Visible}" (#213621) (#225499)
Commit: 9e09b11ae67f6fba8dfa8a798bbe130d190b5f2e
https://github.com/llvm/llvm-project/commit/9e09b11ae67f6fba8dfa8a798bbe130d190b5f2e
Author: TelGome <93700071+TelGome at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
Log Message:
-----------
[RISCV][P-ext] Support Packed Multiply High Parts (#225015)
Support [Packed Multiply High
Parts](https://github.com/riscv/riscv-p-spec/blob/master/P-ext-intrinsics.adoc#packed-multiply-high-parts)
Commit: 0bf45de5d6dff4c3b0cceef7a4cbef16f7bc19d5
https://github.com/llvm/llvm-project/commit/0bf45de5d6dff4c3b0cceef7a4cbef16f7bc19d5
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Log Message:
-----------
[AArch64][NFC] Add early bail-out in preferTailFoldingOverEpilogue (#225327)
If the default behaviour is to never tail-fold and the user never
specified the sve-tail-folding option then just bail out early in
preferTailFoldingOverEpilogue to avoid unnecessary computation.
Commit: 6f4f74487d0dedafe2b55d138fa6f8de42665cba
https://github.com/llvm/llvm-project/commit/6f4f74487d0dedafe2b55d138fa6f8de42665cba
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/IR/Module.cpp
Log Message:
-----------
IR: Use cast_or_null for module flag getters (#225629)
The verifier enforces all of these have the correct type
Commit: 9b979d29871667648b5213e9535b9ea86d90d067
https://github.com/llvm/llvm-project/commit/9b979d29871667648b5213e9535b9ea86d90d067
Author: Hassnaa Hamdi <hassnaa.hamdi at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/test/Transforms/LoopVectorize/fold-epilogue-tail.ll
Log Message:
-----------
[LV][EpilogueTF] Exclude loops with recurrences, alias-masking or unmaskable IAI (#224835)
This patch excludes loops with reductions, fixed-order recurrences, or
alias-masking from the tail-folded epilogue path, since those cases
are not yet supported.
It also excludes loops with interleaved accesses when the target doesn't
support masking them, since a tail-folded epilogue reuses the main
loop's IAI and so it can't invalidate those IAI when they can't be masked.
Commit: 4cd2f4d84b3682908be78bc5cd314507a3d80686
https://github.com/llvm/llvm-project/commit/4cd2f4d84b3682908be78bc5cd314507a3d80686
Author: Akshay K <iit.akshay at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
Log Message:
-----------
[X86] Coalesce redundant vector register clears in zero_call_used_regs (#212147)
This pull request improves how the X86 backend implements
`-fzero-call-used-regs` for vector registers by coalescing aliasing
XMM/YMM/ZMM register views before emitting zeroing instructions. Each
physical vector register is now cleared exactly once, eliminating
redundant clears and avoiding unnecessary `vzeroupper` emission.
Vector register zeroing
- Updated `X86FrameLowering::emitZeroCallUsedRegs` to normalize aliasing
XMM/YMM/ZMM registers to a single representative before emitting clears,
mirroring the existing handling for general-purpose registers.
- Registers XMM0–15 are cleared with VEX-encoded zero idioms, while
XMM16–31 are cleared using EVEX-encoded instructions. Since writes to an
XMM destination also zero the upper bits of the enclosing YMM/ZMM
register, each physical vector register is cleared exactly once.
- Eliminates redundant AVX_SET0/AVX512_512_SET0 pseudos, preventing
unnecessary vzeroupper insertion while preserving the same architectural
zeroization.
AVX512F mask register clearing
- `X86InstrInfo::buildClearRegister` incorrectly gated k0–k7 clearing on
`hasVLX()`. `KSET0W` only requires `AVX512F`, so it fixes mask registers
clearing with `-mattr=+avx512f`.
Tests
- Updated `zero-call-used-regs-simd.ll` to reflect the reduced
instruction sequences across the AVX, AVX2, and AVX-512 code paths.
- Added `all_no_live_vec` to verify that `-fzero-call-used-regs=all`
clears each vector register only once and does not emit a spurious
vzeroupper.
Fixes #191911
Assisted-by: Codex
Commit: 6f6f737a6a5c08620c0108161e68dbce190897a7
https://github.com/llvm/llvm-project/commit/6f6f737a6a5c08620c0108161e68dbce190897a7
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ExprConstant.cpp
Log Message:
-----------
[clang][ExprConst] Mark two variables maybe_unused (#225652)
Fix the two buildbot failures from
https://github.com/llvm/llvm-project/pull/225125
Commit: 21ca7b6617bb816eff33faa8e5a60e59ae0a6db0
https://github.com/llvm/llvm-project/commit/21ca7b6617bb816eff33faa8e5a60e59ae0a6db0
Author: Aditya Mishra <hi at mishraaditya.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/docs/FlangDriver.md
Log Message:
-----------
[flang][docs] Fix spelling typo in FlangDriver.md (#219391)
Fixes a minor spelling typo in the Flang driver documentation
(`specialised` -> `specialized`) to align with standard project
documentation guidelines.
Commit: 8026eba98cb3a41f4dc7cde86d24ff9de01ce846
https://github.com/llvm/llvm-project/commit/8026eba98cb3a41f4dc7cde86d24ff9de01ce846
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp
M llvm/unittests/CodeGen/CodeGenTestBase.h
M llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
M llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
M llvm/unittests/CodeGen/MIR2VecTest.cpp
M llvm/unittests/CodeGen/MachineModuleInfoTest.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/CodeGen/X86MCInstLowerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/MIR/MachineStableHashTest.cpp
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
M llvm/unittests/Target/AMDGPU/CSETest.cpp
M llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
M llvm/unittests/Target/AMDGPU/PALMetadata.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Target/X86/X86SelectionDAGTest.cpp
M llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
Log Message:
-----------
unittests: Compute DataLayout from the triple, not the TargetMachine (#224249)
Eventually createDataLayout should be removed, so migrate these uses.
Co-authored-by: Claude (Claude-Opus-4.8) <noreply at anthropic.com>
Commit: ae88993db5db12423779f3a7c96cc04de5a861a6
https://github.com/llvm/llvm-project/commit/ae88993db5db12423779f3a7c96cc04de5a861a6
Author: Jared Wyles <jared.wyles at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/lib/bedrock/sys/windows/DynamicLibrary.cpp
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/Inputs/NativeDylibManagerTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
A orc-rt/test/unit/Inputs/TestVisibility.h
Log Message:
-----------
[orc-rt] Add Windows dynamic library support (#225076)
Dylib windows implementation.
LoadLibraryA and FreeLibrary for library lifetime management.
GetProcAddress for symbol lookup in individual libraries.
We use a sentinel value to emulate global lookup (address of a local
linkage variable).
Uses the same reverse ordering as orc-v1.
Commit: d56ee7ad2a41a46376eb4917e3c3945e9ec7ae2d
https://github.com/llvm/llvm-project/commit/d56ee7ad2a41a46376eb4917e3c3945e9ec7ae2d
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
Log Message:
-----------
[AMDGPU][GlobalISel] Lower spir_kernel formal arguments as kernel args (#225634)
Argument lowering matched only AMDGPU_KERNEL, so spir_kernel fell into
the normal calling convention path and failed, unlike SelectionDAG
Commit: 8022a985db5ae48c64e7b35124ce77935fe99f03
https://github.com/llvm/llvm-project/commit/8022a985db5ae48c64e7b35124ce77935fe99f03
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
Log Message:
-----------
[RISCV] Don't process scalar instructions in VLOptimizer. NFC (#225656)
If an instruction doesn't define or use a vector register it won't
take part in the dataflow analysis. Skipping these improves compile
time. Measured to reduce geomean −0.379% instructions retired on
CTMark w/ a stage2 rva23u64 -O3 Clang build.
Commit: 80a1eaf320f2d4e03bdde28a70151fe3467d14ba
https://github.com/llvm/llvm-project/commit/80a1eaf320f2d4e03bdde28a70151fe3467d14ba
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Scalar/LICM.cpp
R llvm/test/Transforms/LICM/hoist-phi-metadata.ll
R llvm/test/Transforms/LICM/hoist-phi.ll
R llvm/test/Transforms/LICM/pr40317.ll
Log Message:
-----------
[LICM] Drop control-flow hoisting support (#225630)
Control-flow hoisting handling in LICM was originally introduced for
hoisting PNs as part of a delayed phi-to-select conversion effort, whose
enabling however was soon reverted due to compile-time regressions and
the direction never pursued further. As such, unmaintained code has been
removed.
Commit: a4a3c487251eee524c16d6b7b7c3000cdbac6a13
https://github.com/llvm/llvm-project/commit/a4a3c487251eee524c16d6b7b7c3000cdbac6a13
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
Log Message:
-----------
[orc-rt] Make Session::reportError(Error) noexcept. (#225651)
Session::reportError is called in contexts where throwing would be
unsafe (e.g. while holding another Error value to return via the stack),
so it must not throw.
Commit: 7a3edbfbcf4acaaabb80e7e5073692690ef920cd
https://github.com/llvm/llvm-project/commit/7a3edbfbcf4acaaabb80e7e5073692690ef920cd
Author: Charles Zablit <c_zablit at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp
M lldb/test/API/api/multithreaded/TestMultithreaded.py
M lldb/test/API/api/multithreaded/common.h
M lldb/test/API/api/multithreaded/listener_test.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_callback.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_location_callback.cpp
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
Log Message:
-----------
[lldb][Windows] Enable the multithreaded and multiple-debuggers API tests (#224305)
`api/multithreaded` and `api/multiple-debuggers` build a C++ driver
against the SB API. Both were skipped on Windows with `"clang-cl does
not support throw or catch (llvm.org/pr24538)"`, which is no longer what
stops them. Two things do: the drivers fail to compile because
`common.h` and `multi-process-driver.cpp` include `<unistd.h>`
unconditionally, and once they compile they run on a different CRT than
`liblldb.dll`: the gnu-style clang driver links
[`libcmt`](https://github.com/llvm/llvm-project/blob/main/clang/lib/Driver/ToolChains/MSVC.cpp)
unless `-fms-runtime-lib=` is passed, so the driver gets the static CRT
while `liblldb.dll` gets the DLL one.
Fixes:
- Include `<direct.h>` and `<io.h>` instead of `<unistd.h>` on Windows,
and get the working directory with
[`_getcwd`](https://learn.microsoft.com/en-us/cpp/c-runtime-library/reference/getcwd-wgetcwd?view=msvc-170).
- `get_working_dir` returns a `std::string` now.
- `test_stop-hook.cpp` uses `_pipe`/`_fdopen` on Windows, and closes the
pipe streams instead of the descriptors they were opened over, write end
first so the interpreter's I/O thread sees EOF.
- Guard the `<unistd.h>` include in `multi-process-driver.cpp`.
- `buildDriver` passes `-fms-runtime-lib=dll` (`dll_dbg` for a Debug
build) and drops the `libcmt` the driver adds at the link step.
`test_breakpoint_location_callback` stays skipped, for an unrelated
reason: `BreakpointCreateByName` with `eFunctionNameTypeFull` resolves
no location in a PDB build, while `eFunctionNameTypeAuto` resolves one.
Tracked in #224303.
rdar://177435499
Commit: 37e2844bc4681c69f61cbb55376a29ae0445c18c
https://github.com/llvm/llvm-project/commit/37e2844bc4681c69f61cbb55376a29ae0445c18c
Author: Vipul Cariappa <vipulcariappa at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Redeclarable.h
M clang/lib/Interpreter/IncrementalParser.cpp
A clang/test/Interpreter/failed-input-keeps-redecls.cpp
Log Message:
-----------
[clang-repl] Keep earlier declarations alive when an input fails (#218149)
Fixes #201844
Commit: a3a45508d77ca1fa8161c85baaf5e64bc9b8be39
https://github.com/llvm/llvm-project/commit/a3a45508d77ca1fa8161c85baaf5e64bc9b8be39
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/Object/DXContainer.h
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/Object/MachOObjectFile.cpp
Log Message:
-----------
[Object] Widen data size calculation to 64-bits to prevent overflow (#224635)
This patch widens selected operands of the product calculation to
`size_t`/`uint64_t` to prevent multiplication overflow when a 64-bit
data size or offset is being calculated. This fixes a number of issues
reported by a CodeQL scan.
Commit: 5bb2e21c30de31871dd01279c13abcfa2c06e75f
https://github.com/llvm/llvm-project/commit/5bb2e21c30de31871dd01279c13abcfa2c06e75f
Author: David Sherwood <david.sherwood at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
Log Message:
-----------
[LV][NFC] Emit remarks when failing to vectorise early exit loops (#225078)
I spotted recently that when attempting to compile a function with an
early exit loop we don't emit any remarks when we fail to vectorise due
to possible faulting loads. This PR fixes that and other missing
remarks, plus I've also added missing tests for some cases where we fail
to vectorise early exit loops.
For the remarks, I've used debug information to uniquely identify the
remark and associate it with a particular function.
Tests were assisted by Codex (GPT 5.5)
Commit: 34152bb7d2f37e4bedd6eb9b06a21ae54211aedc
https://github.com/llvm/llvm-project/commit/34152bb7d2f37e4bedd6eb9b06a21ae54211aedc
Author: Ayokunle Amodu <ayokunle321 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-prefetch.hip
R clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
Log Message:
-----------
[CIR][AMDGPU] Add support for AMDGCN s_prefetch builtins (#223228)
Adds codegen for the following AMDGCN s_prefetch builtins:
- __builtin_amdgcn_s_prefetch_data
- __builtin_amdgcn_s_prefetch_inst
These are lowered to the corresponding `llvm.amdgcn.s.prefetch`
intrinsics.
Assisted by: Claude Opus 5
Co-authored-by: Claude Opus 5 <noreply at anthropic.com>
Commit: 60b069f413518552eb755d8b07082eb5dbf5bbfd
https://github.com/llvm/llvm-project/commit/60b069f413518552eb755d8b07082eb5dbf5bbfd
Author: Peng Sun <peng.sun at arm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Add MXFP support for REVERSE (#225058)
Accept the six block-scaled MX types in TOSA 1.1 draft compliance
checks. Preserve REVERSE on constant value splats whose block scales can
differ; reversing a unit dimension remains a no-op.
Cover supported types, version and extension requirements, invalid
shapes and axes, and block-scaled canonicalization.
Signed-off-by: Peng Sun <peng.sun at arm.com>
Commit: 9f5238db368d3b99fe115a67a23c05f5a3125b2a
https://github.com/llvm/llvm-project/commit/9f5238db368d3b99fe115a67a23c05f5a3125b2a
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/unit/CMakeLists.txt
Log Message:
-----------
[orc-rt] Drop redundant DEFINE_SYMBOL ORC_RT_TEST_DLL_EXPORTS (#225685)
ORC_RT_TEST_DLL_EXPORTS was already defined in the previous block.
Commit: b05fbd416a24dd85d7aff18016d47526b27c605f
https://github.com/llvm/llvm-project/commit/b05fbd416a24dd85d7aff18016d47526b27c605f
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/trap_loop_detect.cpp
Log Message:
-----------
[compiler-rt][ubsan] Fix ubsan_loop_detect sigaction setup and dynamic symbol list (#225495)
`__ubsan_install_trap_loop_detection` passed an un-initted ` sigaction`
to `sigaction(SIGPROF, ...)`, with garbage in `sa_flags` and `sa_mask`
(such as setting `SA_RESETHAND`, blocking `SIGILL`, and omitting
`SA_SIGINFO`).
This PR fixes it by zero-initialising sigaction
Two other drive-by cleanups:
- set `SA_SIGINFO | SA_RESTART` because ITIMER_PROF fires SIGPROF
periodically. Without SA_RESTART, any blocking syscall (read, write,
waitpid, etc.) interrupted by a periodic SIGPROF tick would spuriously
fail with EINTR instead of transparently resuming after SigprofHandler
returns.
- pass `EXTRA ubsan.syms.extra` to
`add_sanitizer_rt_symbols(clang_rt.ubsan_loop_detect ...)` in
`CMakeLists.txt` so `libclang_rt.ubsan_loop_detect.a.syms` is not
generated as an empty `{ };` dynamic list (which causes a syntax error
with GNU `ld.bfd`).
Commit: 2b14a195cd76ab518545afe907e863f186690831
https://github.com/llvm/llvm-project/commit/2b14a195cd76ab518545afe907e863f186690831
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/ids-check.yml
Log Message:
-----------
workflows/ids-check: Only run when llvm/ files are changed (#225458)
There is no reason to run this for changes to other projects/runtimes.
Commit: 03fb798b28c2b8df00068a0043f6906b1134cdce
https://github.com/llvm/llvm-project/commit/03fb798b28c2b8df00068a0043f6906b1134cdce
Author: Tom Stellard <tstellar at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
Log Message:
-----------
[VPlan] Add missing exports to symbols used in tests (#225491)
Commit: 945b9128ca6655df0dd372067988fea8d6bb8ed1
https://github.com/llvm/llvm-project/commit/945b9128ca6655df0dd372067988fea8d6bb8ed1
Author: Antonio Frighetto <me at antoniofrighetto.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/Analysis/ScalarEvolution.h
Log Message:
-----------
[SCEV] Drop `LLVM_ABI` annotation from header-defined `getSCEVAtExit` (NFC) (#225732)
ids-check was previously failing.
Commit: 1d1284d83ac2cb5d57dfd6cd082c815c597e0f4b
https://github.com/llvm/llvm-project/commit/1d1284d83ac2cb5d57dfd6cd082c815c597e0f4b
Author: Max Brandtner <maxbr at linux.ibm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Utils/Local.cpp
Log Message:
-----------
[SimplifyCFG] Fix typos in comments (NFC) (#225649)
Commit: 869e02f412457ebeb3af54e159d550de75127f14
https://github.com/llvm/llvm-project/commit/869e02f412457ebeb3af54e159d550de75127f14
Author: Kunal Chadha <kunachad at qti.qualcomm.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/test/Analysis/CostModel/AArch64/free-widening-casts.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
Log Message:
-----------
[AArch64] Allow cost-free cast absorption into widening instructions with multiple users (#210460)
Extend getCastInstrCost to recognize cast absorption into widening
instructions (uaddl, saddw, urhadd, etc.) when the cast has multiple
users, not just one.
Previously, the check only looked at a single user (`I->hasOneUser()`),
so a zext/sext feeding more than one widening-eligible instruction was
always costed as non-free, even when every user could individually
absorb it.
This also affected codegen: `optimizeExtendOrTruncateConversion` in
`AArch64ISelLowering.cpp` decides whether to lower a double-widening
zext via tbl shuffles based on whether `getCastInstrCost` reports the
cast as free. With multi-user casts always costed as non-free, this
took the tbl-lowering path in cases where every user could actually
absorb the cast for free, generating unnecessary tbl instructions.
Compiler Explorer:
- Current Assembly: https://godbolt.org/z/hG7oe5h5M
- Expected Assembly: https://godbolt.org/z/EE6xnaxoG
This change factors the per-user check out into
`getUserAbsorbedCastCost()` and applies it across all users of the
cast. The cast is only treated as free if every user can absorb it;
the reported cost is the max of the per-user absorbed costs, to stay
conservative when a partial-widening cost (Src->Src*2) applies for
some user.
Tests:
- free-widening-casts.ll: new cost-model cases with multiple absorbing
users. These cases had a cost of 1 without this change.
- zext-to-tbl.ll: new codegen coverage showing tbl is no longer
generated once the cast is correctly recognized as free.
Commit: 141a9763fff5e135b313b273b44a1abea8ee6b2f
https://github.com/llvm/llvm-project/commit/141a9763fff5e135b313b273b44a1abea8ee6b2f
Author: Krzysztof Parzyszek <Krzysztof.Parzyszek at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_messages.cpp
M llvm/include/llvm/Frontend/OpenMP/OMP.td
Log Message:
-----------
Revert "[clang][OpenMP] ORDERED clause is allowed on FOR in 4.5+ (#22… (#225669)
…5106)"
This reverts commit b0d31f40189dbdcf8b62e2c6ef79b039c5202aba.
This missed the restriction that ORDERED is not allowed when DISTRIBUTE
is a constituent construct.
Commit: d86a3c5b18f762959d2eb6cf5a2f2bb958589a11
https://github.com/llvm/llvm-project/commit/d86a3c5b18f762959d2eb6cf5a2f2bb958589a11
Author: Vy Nguyen <1762963+oontvoo at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
Log Message:
-----------
Fix BUILD file. (#225731)
CMakeList.txt was updated in
https://github.com/llvm/llvm-project/pull/225495
Commit: 3bd7ee0215b7cfeeed0a0f7dc2b0b1bb62fe33cc
https://github.com/llvm/llvm-project/commit/3bd7ee0215b7cfeeed0a0f7dc2b0b1bb62fe33cc
Author: Jeff Bailey <jbailey at raspberryginger.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/include/unistd.yaml
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/pause.h
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pause.cpp
A libc/src/unistd/pause.h
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pause_test.cpp
Log Message:
-----------
[libc] Implement pause (#225365)
Add the linux_syscalls::pause wrapper using SYS_ppoll, along with the
unistd pause entrypoint and unit test on Linux.
Assisted-by: Automated tooling, human reviewed.
Commit: bc9276a5e093e2a941c163d1bace94b7675575e3
https://github.com/llvm/llvm-project/commit/bc9276a5e093e2a941c163d1bace94b7675575e3
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable.ll
M llvm/test/Transforms/LowerTypeTests/cfi-direct-call1.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
M llvm/test/Transforms/LowerTypeTests/icall-branch-funnel.ll
M llvm/test/Transforms/LowerTypeTests/nocfivalue.ll
M llvm/test/Transforms/LowerTypeTests/simple.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable.ll
M llvm/test/Transforms/MergeFunc/cfi-thunk-merging.ll
Log Message:
-----------
[LowerTypeTests] Use getGetElementPtr() overload accepting DataLayout (#225688)
To produce constexpr gep in canonical ptradd form.
Commit: a68d1990c7a7c5ddfc95d766ce2ce7bbc69e6c32
https://github.com/llvm/llvm-project/commit/a68d1990c7a7c5ddfc95d766ce2ce7bbc69e6c32
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/source/API/SBValue.cpp
M lldb/test/API/python_api/watchpoint/TestSetWatchpoint.py
M lldb/test/API/python_api/watchpoint/main.c
Log Message:
-----------
[lldb] Fix SBValue::Watch on a local variable. (#220292)
Setting a watchpoint on an SBValue variable should not trigger after the
life time of the variable. because a new frame can reuse the same
address for a different variable.
Set the name of the variable as the watch spec.
Commit: 9aace93cb4c5330392082d9b179cd0cc41353bfd
https://github.com/llvm/llvm-project/commit/9aace93cb4c5330392082d9b179cd0cc41353bfd
Author: Ebuka Ezike <e_ezike at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/include/lldb/Host/JSONTransport.h
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
Log Message:
-----------
[lldb-dap] Log the error when the adapter fails to write. (#225191)
I noticed this when trying to debug some failures, the Python log are
missing responses when compared to the C++ log.
Change the test case suffix `testcase` from `test_dap` to avoid
confusion with a session log (`dap{session_number}.log`).
Commit: dd33f57479c1d1d86649a1867b79be88ce04da73
https://github.com/llvm/llvm-project/commit/dd33f57479c1d1d86649a1867b79be88ce04da73
Author: Kaviya Rajendiran <67495422+kaviya2510 at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/Options/Options.td
M clang/lib/Driver/ToolChains/Flang.cpp
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
A flang/test/Driver/funique-internal-linkage-names.f90
A flang/test/Lower/unique-internal-linkage-names.f90
A flang/test/Transforms/function-attrs-unique-internal-linkage-names.fir
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
A mlir/test/Target/LLVMIR/Import/sample-profile-suffix-elision-policy.ll
A mlir/test/Target/LLVMIR/sample-profile-suffix-elision-policy.mlir
Log Message:
-----------
[Flang][Driver] Added support for -funique-internal-linkage-names option (#216680)
The option `-funique-internal-linkage-names` appends an MD5 hash suffix
`(.__uniq.<hash>)` to internal procedure names and sets
`"sample-profile-suffix-elision-policy"="selected"` on those functions,
enabling the sample profiler to correctly match profiles to internal
procedures across compilation units.
Implementation:
- Added a unique hash suffix to internal procedure names when
`-funique-internal-linkage-names` is enabled. The suffix is derived from
the source file path and disambiguates identically named internal
procedures across different compilation units, which helps accurate
sample-based profiling.
- Added the function attribute
`"sample-profile-suffix-elision-policy"="selected"` on internal
procedures in LLVM IR. This attribute is used by the LLVM sample profile
loader to control suffix stripping during profile matching
Commit: ada2cfae24585a23acc12077815f59ca76e5b2d1
https://github.com/llvm/llvm-project/commit/ada2cfae24585a23acc12077815f59ca76e5b2d1
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
Log Message:
-----------
[ORC] Mangle EH-frame alloc-action CI names as C (#225682)
Flip the EH-frame register/deregister alloc-action names from Verbatim
to C, so they carry the target's C mangling. These are bootstrap-map
names only (the implementing functions have different linker names):
they're registered by addDefaultBootstrapValuesForHostProcess via
mangledCopy of the same specs, and resolved by EHFrameRegistration-
Plugin and EPCGenericRTDyldMemoryManager through the same specs, so both
sides stay in sync.
Commit: a8af62d00b82c9226cca3b4abdf376158f6bde53
https://github.com/llvm/llvm-project/commit/a8af62d00b82c9226cca3b4abdf376158f6bde53
Author: Luke Lau <luke at igalia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
Log Message:
-----------
[RISCV] Use switches for opcode checks in RISCVInstrPredicates.td. NFC (#225695)
CheckOpcode expands out to a linear search which is slow when there's
lots of opcodes in the list. Using a switch statement allows a jump
table to be emitted which improves compile time, since these predicates
are hammered quite frequently.
Measured to reduce geomean -1.15% instructions retired on CTMark w/ a
stage2 rva23u64 -O3 Clang build.
Assisted-By: Opus 5.5
Commit: 29ce634abb29fc59a147e63e72426c343becf4f9
https://github.com/llvm/llvm-project/commit/29ce634abb29fc59a147e63e72426c343becf4f9
Author: Yao Qi <yao_qi at apple.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestClient.cpp
Log Message:
-----------
[lldb] [Windows] Let LLGS TestClient tolerate async `O` output packets (#225521)
My PR (swiftlang/llvm-project#14269) has a pre-merge test failure on
Windows, and that lead me looking at test LLGSTest.cpp deeply
```
Send Packet: vCont;c
Read Packet: O1b5b3f32356c
lldb-server exiting...
LLGSTest.cpp(30): error: Value of:
llvm::detail::TakeError(Client.ContinueAll())
Expected: succeeded
Actual: failed (Unable to parse StopReply: Invalid packet)
```
`TestClient::SendMessage` read exactly one packet and had no handling
for `O`
(inferior stdout) packets, but inferior output arriving before a stop
reply
was parsed as the stop reply itself. `StopReply::create` accepts only
`T` and
`W`, so it failed. The `O1b5b3f32356c` decodes to `ESC [ ? 2 5 l`, the
sequence that hides the cursor. Windows lldb-server gives the inferior a
ConPTY
created with `PSEUDOCONSOLE_INHERIT_CURSOR`, and ConPTY writes its own
VT
initialization bytes to the output pipe, which reach the client as an
`O` packet.
The fix is that `SendMessage` now uses the inherited
`SendPacketAndReceiveResponseWithOutputSupport`, which loops over
leading `O`
packets via `ReadPacketWithOutputSupport` and passes each payload to a
callback. `TestClient::Continue` had the same gap in the opposite order:
after a
`W` or `X` reply it read one raw packet and required
`ErrorDisconnected`, so an `O`
packet arriving before the socket closed failed the test. It now reads
through
`ReadPacketWithOutputSupport` as well.
The fix reverts 5032c6ea0803 ("[lldb-server] Disable a test on Windows
until it can be
fixed"), which disabled `LaunchModePreservesEnvironment` on Windows.
18b211cb1521 ("Disable stdin/stdout for environment_check inferior
process")
worked around the same root cause from a different source, where an
allocator
message on stderr under sanitizers reached the client the same way. That
commit noted the client "doesn't handle that unexpected output"; this
handles
it.
Assisted-by: claude
Commit: 3c294293f7e57c425e15469896ba98f79652b02f
https://github.com/llvm/llvm-project/commit/3c294293f7e57c425e15469896ba98f79652b02f
Author: Lang Hames <lhames at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M orc-rt/test/unit/AllocActionTestUtils.h
M orc-rt/test/unit/BedrockTestUtils.h
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/DirectCaller.h
M orc-rt/test/unit/Inputs/RTTICrossDylibTestError.h
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
M orc-rt/test/unit/SimplePackedSerializationTestUtils.h
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SocketHandleTest.cpp
M orc-rt/test/unit/bedrock/SocketTestUtils.h
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/MemoryAccessSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
M orc-rt/test/unit/support/AllocActionTest.cpp
M orc-rt/test/unit/support/RTTICrossDylibTest.cpp
M orc-rt/test/unit/support/bind-test.cpp
M orc-rt/test/unit/support/sps/SPSAllocActionTest.cpp
M orc-rt/test/unit/support/sps/SPSMemoryFlagsTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionBufferTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/support/sps/SimplePackedSerializationTest.cpp
Log Message:
-----------
[orc-rt] Move test utils into orc_rt::test, drop qualification (#225733)
Move unit test helpers from the global namespace into orc_rt::test. This
makes them consistent with the newly added ErrorMatchers.h utils, and
allows us to drop the 'orc_rt::' qualification on a lot if identifiers.
Commit: 9120c13792128a993c90e4046717b3c801f787f2
https://github.com/llvm/llvm-project/commit/9120c13792128a993c90e4046717b3c801f787f2
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
A libsycl/src/detail/suppress_extra_warnings.hpp
Log Message:
-----------
[libsycl][NFC] Suppress shadow warnings from LLVM headers (#225089)
The warning for a local variable shadowing a class member is enabled for
libsycl, but not LLVM as a whole. Suppress those for included LLVM
headers.
Commit: 5cf984c8fd62b53a548d17f125611d89ffde68bd
https://github.com/llvm/llvm-project/commit/5cf984c8fd62b53a548d17f125611d89ffde68bd
Author: Mehdi Amini <joker.eph at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
Log Message:
-----------
[mlir][tosa] Update reverse tests for direct axis syntax (#225751)
Use the axis(...) assembly syntax in block-scaled reverse tests. This
matches the existing TOSA operation format and restores test parsing.
Fix post merge #225058
Assisted-by: Codex
Commit: 4b7523d301eac1c7e3b6491f99836e22dc5e804a
https://github.com/llvm/llvm-project/commit/4b7523d301eac1c7e3b6491f99836e22dc5e804a
Author: Sergey Semenov <sergey.semenov at intel.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/Object/Binary.h
Log Message:
-----------
[llvm][NFC] Fix extra semicolon warnings (#224317)
Found while cleaning up additional warnings enabled for libsycl.
Commit: a5bc26f7d2f4d9fbe299288788e1e0377fb406c3
https://github.com/llvm/llvm-project/commit/a5bc26f7d2f4d9fbe299288788e1e0377fb406c3
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
Log Message:
-----------
[mlir][SPIR-V] Support atomic_rmw xori in MemRefToSPIRV (#213204)
Commit: 3c63fcb246f3bf5c2717ec6bd567a46cd65a4c25
https://github.com/llvm/llvm-project/commit/3c63fcb246f3bf5c2717ec6bd567a46cd65a4c25
Author: aokblast <aokblast at FreeBSD.org>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M libcxx/src/std_stream.h
A libcxx/test/libcxx/input.output/iostream.objects/cin-read-stdio-sync.sh.cpp
Log Message:
-----------
[libcxx] Speed up xsgetn for always_noconv (#212010)
Commit: decb0ee138505e73d0eced11a36ec4fee6c0a1ce
https://github.com/llvm/llvm-project/commit/decb0ee138505e73d0eced11a36ec4fee6c0a1ce
Author: Igor Wodiany <igor.wodiany at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/TableGen/RegisterInfoEmitter-noncovered-subreg-lanemask.td
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
Log Message:
-----------
[TableGen] Handle the non-`CoveredBySubRegs` case in `computeRegUnitLaneMasks` (#223653)
Currently `computeRegUnitLaneMasks` ignores non-leaf subregisters as
"their lane masks are fully covered by the leaf subregisters". However
this only holds when `CoveredBySubRegs` is set to true. Otherwise it
causes subregisters with `CoveredBySubRegs` set to false to have missing
lanes.
For example removing `hi16` from SGPR in AMDGPU causes `sub1` to have a
lane mask of `0x8`, which is equal to `sub1_lo16`, whereas the correct
mask should be `0xC` as although `hi16` is not addressable `sub1` covers
both halves.
This patch adds a logic that identifies unclaimed lanes and backfills
them into appropriate subregister units.
Assisted-by: Claude Code
Commit: 12d319e5e5c9609f876bf07dab5716329c105dd7
https://github.com/llvm/llvm-project/commit/12d319e5e5c9609f876bf07dab5716329c105dd7
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
Log Message:
-----------
[WPD] Use getGetElementPtr() overload accepting DataLayout (#225754)
To produce constant GEPs in canonical ptradd form.
Commit: a88189669034268827befe9bb65880a31e91778d
https://github.com/llvm/llvm-project/commit/a88189669034268827befe9bb65880a31e91778d
Author: ahradwan2-public <ahmedwahab1997 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Log Message:
-----------
[AMDGPU][NFC] Compute prologue frame size/alignment in 64-bit (#224734)
In `SIFrameLowering::emitPrologue` the stack-realignment sequence computes its
`S_AND` mask (`-Alignment * scale`), `S_ADD` offset (`(Alignment-1) * scale`)
and the final SP adjustment (`RoundedSize * scale`) from 32-bit locals; the
multiply is done in 32 bits, which CodeGen static analysis flags as a possible
truncation (`cpp/integer-multiplication-cast-to-long`). Widen `NumBytes`,
`RoundedSize` and Alignment to 64-bit. The `AsmPrinter` still truncates via
`printImmediate32`, so emitted asm is unchanged; only the raw MIR immediate of
the realign `S_AND_B32` changes (e.g. `4294443008 -> -524288`). The seven
autogenerated .mir frame tests are regenerated accordingly.
Assisted-by: Cline
Commit: de734ce70b5e9c3c4eeca4306394c1bec1c30f84
https://github.com/llvm/llvm-project/commit/de734ce70b5e9c3c4eeca4306394c1bec1c30f84
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
A llvm/test/CodeGen/AMDGPU/finalize-isel-vadd-co-u32-dead-carry.mir
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
Log Message:
-----------
AMDGPU: Preserve carry-out dead flag in V_ADD_CO_U32 custom inserter (#225736)
EmitInstrWithCustomInserter rebuilds V_ADD/SUB_CO_U32_e32 but did
not carry over the dead flag. Preserve the flag to reduce implicitly
depending on dead flags recomputed by LiveVariables.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 68d3c25ee618d057ef16cea97b34dc2b85d46118
https://github.com/llvm/llvm-project/commit/68d3c25ee618d057ef16cea97b34dc2b85d46118
Author: Adam Smith <adams at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/test/CIR/CodeGen/side-effect.cpp
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem-indirect.cir
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem.cir
Log Message:
-----------
[CIR] Widen memory effects for ABI argument memory (#221067)
A const or pure callee that the ABI rewrites to take an sret slot or a
byval pointer reaches argument memory whatever the source declared, and
a variadic callee does too since its declared parameters do not cover
every argument. CallConvLowering was leaving memory_effects untouched,
so LowerToLLVM emitted memory(none) or memory(read) for functions that
do touch that memory.
CallConvLowering now sets arg_mem to readwrite on #cir.memory_effects
once it knows the signature, and does the same at a call site when the
call passes a slot.
Assisted-by: Cursor / claude-opus-5
Commit: 0601a126c256e09faea980045ac0b787b49dfe39
https://github.com/llvm/llvm-project/commit/0601a126c256e09faea980045ac0b787b49dfe39
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
Log Message:
-----------
[clang][bytecode] Short-circuit inelegible functions when compiling (#225618)
Don't bother setting up parameter maps for functions we know we won't
compile.
Commit: 0e718a81c3a564de6c4c7193c1bd748f7f96eb29
https://github.com/llvm/llvm-project/commit/0e718a81c3a564de6c4c7193c1bd748f7f96eb29
Author: Jeffrey Byrnes <jeffrey.byrnes at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
A llvm/test/CodeGen/AMDGPU/coexec-sched-barrier-latency.mir
M llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
Log Message:
-----------
[AMDGPU] Add BarrierLatency mutations to CoexecSched (#200954)
Change-Id: Id86bbdb427b23f68d39ceee196e4232e91974186
Commit: 2711c15ebeda051a6b3f974c217bb50fdf3bfce2
https://github.com/llvm/llvm-project/commit/2711c15ebeda051a6b3f974c217bb50fdf3bfce2
Author: Timm Baeder <tbaeder at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Pointer.h
Log Message:
-----------
[clang][bytecode] Add a CheckLoad overload taking a PtrView (#225741)
We sometimes create intermediate pointers, which always insert
themselves into the pointer list of a block. Which is slow.
This adds a `CheckLoad()` overload taking a `PtrView`, which we can use
in those cases.
Commit: a4ebc09e5b3337c24cad8cb65e88e8af7977aaf1
https://github.com/llvm/llvm-project/commit/a4ebc09e5b3337c24cad8cb65e88e8af7977aaf1
Author: Erich Keane <ekeane at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/CIR/CodeGen/base-init-eh.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit.cpp
M clang/test/CIR/CodeGen/global-ptr-init.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
M clang/test/CIR/CodeGen/rtti-member-pointer.cpp
M clang/test/CIR/CodeGen/rtti-qualfn.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/virtual-function-calls.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/vtable-pure-deleted-funcs.cpp
Log Message:
-----------
[CIR] Fixup tests after GEP type changed (#225770)
CIR tests with OGCG check lines for GEPs changed to use i8 instead of a
different type in many cases. This patch fixes it. This is from #225415
Every fix ended up moving OGCG closer to what CIR does, so this is a
generally good thing.
Commit: 93236c1e0296ff92f04b38d37ae927673be9f536
https://github.com/llvm/llvm-project/commit/93236c1e0296ff92f04b38d37ae927673be9f536
Author: dong jianqiang <dongjianqiang2 at huawei.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
A llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe_be.s
A llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations_be.s
Log Message:
-----------
[JITLink] Support AArch64 big-endian (BE8) ELF objects (#225120)
The AArch64 ELF backend hard-coded ELF64LE, so aarch64_be
objects failed to load. Follow the PPC64 multi-endian pattern:
the graph builder, aarch64::applyFixup, ELFJITLinker_aarch64,
and the link entry points (link_ELF_aarch64 / link_ELF_aarch64_be)
are templated on llvm::endianness, with data fixups written in the
compile-time target endianness and instructions always little-endian
(the A64 ISA is word-invariant).
Commit: 6d617b831f5b9f354753106f6ffe5fc482209756
https://github.com/llvm/llvm-project/commit/6d617b831f5b9f354753106f6ffe5fc482209756
Author: Jason Van Beusekom <jason.van-beusekom at hpe.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Lower/IO.cpp
A flang/test/Lower/io-implied-do-collapse.f90
Log Message:
-----------
[Flang] add support for collapsed io calls for implicit do loops (#212646)
This is a extension of the work done in #163945 by addind support for IO
lowering to recognize a contiguous single-level io-implied-do in an
unformatted transfer with no condition specifiers, and collapse it into
a single array-section descriptor call instead of emitting a per-element
fir.do_loop.
see RFC:
https://discourse.llvm.org/t/rfc-add-support-for-collapsed-io-calls-for-implicit-do-loops/91416/2
Assisted-by: Opus 4.8
Commit: 8489203ec846d08db23532530419748de09c3374
https://github.com/llvm/llvm-project/commit/8489203ec846d08db23532530419748de09c3374
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
A flang/test/Transforms/licm-acc-captured-ref.fir
A flang/test/Transforms/licm-acc-compute-only.fir
A flang/test/Transforms/licm-scope.fir
Log Message:
-----------
[flang] Support scoped LICM and OpenACC capture provenance (#225401)
Follow compute-region capture operands when checking whether scalar and
scalar-descriptor loads are safe to speculate. Preserve the existing
optional, array-element, and loop-modification safety checks.
Add an optional only-inside operation-name selector while retaining
function-scoped alias analysis. Resolve the name once per function and
compare interned operation names during ancestor traversal. The default
continues to select all loops. An explicit name selects loops with a
matching ancestor within the function, including the function itself.
Cover capture safety, host exclusion, non-OpenACC and nested scopes,
loop boundaries, unmatched names, and the function boundary.
The motivation for this is to allow running LICM only on device relevant
loop at O0.
Commit: 6e6507c6c32917f228a0497fae83ab9d2d3dddf6
https://github.com/llvm/llvm-project/commit/6e6507c6c32917f228a0497fae83ab9d2d3dddf6
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-prio-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/dev-mode-logging.ll
Log Message:
-----------
[MLGO] Update tests after #220090 (#225811)
PR #220090 changed quite a bit some of the costs/default behaviors which
manifested in test failures for the dev mode logging tests.
Commit: bed99cbb50b83f8cdd87f273aee4d6b99dd67a9d
https://github.com/llvm/llvm-project/commit/bed99cbb50b83f8cdd87f273aee4d6b99dd67a9d
Author: jeanPerier <jperier at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/lib/Optimizer/Transforms/LoopInvariantCodeMotion.cpp
R flang/test/Transforms/licm-acc-captured-ref.fir
R flang/test/Transforms/licm-acc-compute-only.fir
R flang/test/Transforms/licm-scope.fir
Log Message:
-----------
Revert "[flang] Support scoped LICM and OpenACC capture provenance" (#225813)
Reverts llvm/llvm-project#225401
Breaks shared library builds.
Commit: f79899f140e5a02a733a8c8d1cf456d658a3739a
https://github.com/llvm/llvm-project/commit/f79899f140e5a02a733a8c8d1cf456d658a3739a
Author: Louis Dionne <ldionne.2 at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/run-buildbot
Log Message:
-----------
[libc++] Encode Lit configuration parameters in machines.json (#225601)
Instead of hardcoding a bunch of Lit parameters in run-benchmarks,
encode them in machines.json and thread them through. This makes
machines.json closer to being the authoritative place describing the
full benchmark configuration.
Commit: 71db60ced71917b09aaf117d900fadad4bb9e343
https://github.com/llvm/llvm-project/commit/71db60ced71917b09aaf117d900fadad4bb9e343
Author: Christian Krause <chris at christiankrause.de>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
A llvm/test/CodeGen/Mips/fpu-delay-in-delay-slot.ll
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll
A llvm/test/CodeGen/Mips/mips1-fpu-load-delay.ll
Log Message:
-----------
[Mips] Respect FPU hazards on MIPS-I to MIPS-III (#223411)
On the oldest MIPS processors the hardware does not wait for a value
loaded from memory to arrive before it runs the next instruction: the
compiler has to leave a one-instruction gap itself. It already did this
for whole-number loads, but not for floating-point ones, so float code
could read the register a moment too early and quietly compute with a
stale value. This change makes the compiler treat floating-point loads
and moves off the math unit the same way it treats whole-number loads,
fixing that silent wrong answer. Newer chips are unaffected: they wait
on their own, and no gap is added for them.
GCC models both of these: [ISA_HAS_LOAD_DELAY and
ISA_HAS_XFER_DELAY](https://github.com/gcc-mirror/gcc/blob/5115c7e447fc07457443df874bf57840e8316d5f/gcc/config/mips/mips.h#L1322-L1334)
in mips.h, and the [hazard/can_delay
attributes](https://github.com/gcc-mirror/gcc/blob/5115c7e447fc07457443df874bf57840e8316d5f/gcc/config/mips/mips.md#L756-L789).
I used Opus 5 (Anthropic) as an assistant while preparing this patch. I
did the investigation and diagnosis myself, reviewed and tested every
change, and verified the GCC source references above against the actual
GCC source before linking them.
Commit: a14634f662776d7c9f3fe15f5eb687dc6287d17c
https://github.com/llvm/llvm-project/commit/a14634f662776d7c9f3fe15f5eb687dc6287d17c
Author: Aiden Grossman <aidengrossman at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-test-tools.yml
Log Message:
-----------
Partially Reapply "[libcxx] Move premerge jobs to k8s mode runner set (#221395)" (#225222)
This reverts commit 5dc57157f12f0ff676e823d9b4d98b45c07e5df2.
Fetching tags for some reason causes `actions/checkout` to fail more
often than not. It turns out we don't need that for any of the libc++
workflows, so just disable it on top of the revert and things should be
working.
Commit: 36f7f848d562a410b21e14cf077a0631d76f0a98
https://github.com/llvm/llvm-project/commit/36f7f848d562a410b21e14cf077a0631d76f0a98
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/test/tools/llvm-offload-wrapper/coff-opt-ref.ll
Log Message:
-----------
[Offloading] Use getGetElementPtr() overload accepting DataLayout (#225766)
To produce constant GEP in canonical ptradd representation.
Commit: a5ba2cf8b46ddaf6690b5b74b2863e4bc76f12a9
https://github.com/llvm/llvm-project/commit/a5ba2cf8b46ddaf6690b5b74b2863e4bc76f12a9
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/SLPVectorizer/AArch64/store-chain-leading-slice-wider-vf.ll
Log Message:
-----------
[SLP][NFC]Add a test with the regressed vectorization (2 vs 4 before), NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225819
Commit: 3eecc4081d4ee225eda7375eee9f79e065f3c411
https://github.com/llvm/llvm-project/commit/3eecc4081d4ee225eda7375eee9f79e065f3c411
Author: Diego Novillo <dnovillo at nvidia.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant-existing-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-cross-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-merge-region.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-module-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-postlegalizer-order.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value.ll
Log Message:
-----------
[SPIRV] Emit NonSemantic DebugValue (#224158)
This adds support for emitting `DebugValue` in
`SPIRVNonSemanticDebugHandler` for `DBG_VALUE` records.
NOTE: Much of the new code was necessary to emit constants and their
types at module scope. I also added a bunch of tests as I started
getting into corner cases.
Since
[`DebugValue`](https://github.khronos.org/SPIRV-Registry/nonsemantic/NonSemantic.Shader.DebugInfo.html#DebugValue)
cannot have forward references, it can only reference already emitted
instructions. `DebugValue` cannot come after merge instructions either,
and SPIR-V requires an id defined in a function block to dominate a
non-phi use. The change has four parts:
1. `analyzeDebugRecords()` resolves placement and availability before
emission begins. Each record stays at its source position unless it lies
between a merge instruction and its terminator, in which case it moves
before the merge. A register value is accepted only when its definition
dominates the record. Records without a legal value are dropped.
2. A constant assignment needs a typed SPIR-V result id, but Machine IR
carries only untyped immediates. The type comes from the variable, and
`buildConstDbgValue()` decides whether the value is sign or zero
extended. The backend reuses a module `OpConstant` with that type and
value, or emits one alongside the line and column constants.
3. Debug info must be removable without changing what the module
requires. The handler creates `OpTypeBool` and 32-bit scalar types,
which need no capability, and reuses 8, 16 and 64-bit types only when
the module already defines them. Any other constant assignment is
dropped.
5. `SPIRVPostLegalizer::generateAssignType` placed `ASSIGN_TYPE` after a
`DBG_VALUE` naming the same register, because `updateRegType()` advances
the insertion point past the debug record. This change resets the
insertion point to just after the definition, so `ASSIGN_TYPE` comes
before the record that names it.
Commit: dec20dfbe042962775095e5394b2979fde9a4f45
https://github.com/llvm/llvm-project/commit/dec20dfbe042962775095e5394b2979fde9a4f45
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Add sudot zero/constant folding tests. NFC (#225321)
<sub>Stack created with <a
href="https://github.com/github/gh-stack">GitHub Stacks CLI</a> • <a
href="https://gh.io/stacks-feedback">Give Feedback 💬</a></sub>
Commit: d343b26ef687cefe30e7f8072d6befa6f2e0829d
https://github.com/llvm/llvm-project/commit/d343b26ef687cefe30e7f8072d6befa6f2e0829d
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-fmul-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/store-chain-leading-slice-wider-vf.ll
Log Message:
-----------
[SLP]Try the wider store slice when the leading VF=2 slice fails
With the register VF 2 the instruction count check may reject the
leading slice of a store chain.
Try the double-width slice at the same position first and keep the wider
slices for the rest of the chain once one is vectorized.
Fixes the remaining perf regression from #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225823
Commit: f96f12533199911caea0ccc0fd96f18df37c8ca4
https://github.com/llvm/llvm-project/commit/f96f12533199911caea0ccc0fd96f18df37c8ca4
Author: Harrison Hao <57025411+harrisonGPU at users.noreply.github.com>
Date: 2026-09-24 (Thu, 24 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
Log Message:
-----------
[AMDGPU][InstCombine] Fold constant add/sub into the dot accumulator (#225002)
`amdgcn.{s,u}dot{2,4,8}(a, b, C) +/- K -> dot(a, b, C +/- K)` when both
the
accumulator C and K are constants. The new constant is computed with
wrapping APInt arithmetic to match the non-clamping accumulate.
Only applies when clamp is false (the saturating accumulate does not
reassociate) and the dot has a single use. K - dot is left alone since
it
would need the dot product negated.
Commit: ae2e61a2b21e38fd8356931aa75baf78a64da365
https://github.com/llvm/llvm-project/commit/ae2e61a2b21e38fd8356931aa75baf78a64da365
Author: Florian Hahn <flo at fhahn.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/test/Analysis/ScalarEvolution/ptrtoaddr-i32-index-width.ll
Log Message:
-----------
[SCEV] Fix sign bits of pointers wider than their index type. (#225786)
ComputeNumSignBits counts bits over the full pointer width. If all sign
bits are in the high bits, the code previously did not adjust the number
of signed bits. For narrow index types, this could result in the number
of sign bits > than the narrow bitwidth triggering an assert in APInt
(test example has 64 bit pointer with 16 bit index width.
If all sign bits are in the high bits outside the index width, they do
not add any information for the index, just use 1 in that case.
Fixes a crash in the added tests.
PR: https://github.com/llvm/llvm-project/pull/225786
Commit: f22fe777f37bd5b901f92fb7c7ab654711e87da5
https://github.com/llvm/llvm-project/commit/f22fe777f37bd5b901f92fb7c7ab654711e87da5
Author: Simon Pilgrim <llvm-dev at redking.me.uk>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
Log Message:
-----------
[CostModel][X86] Add masked memory test coverage for VBMI2 capable CPUs (#225790)
Add tigerlake and znver4/5 coverage - znver4 is going to be a pain as it has awful compressstore perf :(
Prep work for #214613
Commit: 0f58d0420f36f3f374e3ae35f679874e0b4ff4de
https://github.com/llvm/llvm-project/commit/0f58d0420f36f3f374e3ae35f679874e0b4ff4de
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
Log Message:
-----------
[clang] Migrate away from PointerUnion::dyn_cast (NFC) (#225614)
Note that PointerUnion::dyn_cast has been soft deprecated in
PointerUnion.h:
// FIXME: Replace the uses of is(), get() and dyn_cast() with
// isa<T>, cast<T> and the llvm::dyn_cast<T>
Literal migration would result in dyn_cast_if_present (see the
definition of PointerUnion::dyn_cast), but this patch uses dyn_cast on
UnexpandedParameterPack::first because it is always nonnull.
Specifically, UnexpandedParameterPack is constructed only in the
following places, all of which store a nonnull pointer in first, and
first is never modified afterward:
- CollectUnexpandedParameterPacksVisitor::addUnexpanded in
SemaTemplateVariadic.cpp
- TransformLambdaExpr in TreeTransform.h
- TransformSizeOfPackExpr in TreeTransform.h
Assisted-by: Antigravity
Commit: 53e9da7812f3fa8fa79ae5e000552e1110da8da7
https://github.com/llvm/llvm-project/commit/53e9da7812f3fa8fa79ae5e000552e1110da8da7
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/AVR/AVR.h
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/Hexagon/Hexagon.h
M llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/XCore/XCoreISelLowering.h
Log Message:
-----------
[Target] Remove declarations without definitions (NFC) (#225615)
initializeAArch64CFIFixupPass: Added on April 11, 2022 in commit
b4ad28da196d3c2b1bc064b4dc46c3e00e93438f without a definition.
AArch64InstructionSelector::selectReduction: The definition was removed
on November 13, 2023 in commit a604c4b562e99470e397f050f1e8707f923ebed7.
AArch64TargetELFStreamer::insertAttributeInPlace: Added on January 23,
2025 in commit ee99c4d4845db66c4daa2373352133f4b237c942 without a
definition.
ARMInstPrinter::printAM2PostIndexOp: The definition was removed on
September 22, 2012 in commit 2fdbdc58701ef41ab6b52c064723926e6ec4b44f.
ARMMCCodeEmitter::getMachineSoImmOpValue: The definition was removed on
October 12, 2010 in commit 12e493ace4fc5b499361122bc5f25d2c46bea5e4.
ARMMCCodeEmitter::getThumbSRImmOpValue: The definition was removed on
August 17, 2011 in commit 46dd413991f6fa74a1da3f139b386e364dfc9f78.
createAVRBranchSelectionPass: The definition was removed on July 5, 2017
in commit a24aa1990084c15f0ad27dbcff7ab1c96369f0f9.
dxil::DXILOpBuilder::getOpFunctionType: Added on August 2, 2024 in
commit 8cf85653b6f5c90b83f8a5741baad5725d6c6932 without a definition.
dxil::DXILBitcodeWriter::VSTOffsetPlaceholder,
dxil::DXILBitcodeWriter::writeIdentificationBlock,
dxil::DXILBitcodeWriter::writePerModuleFunctionSummaryRecord,
dxil::DXILBitcodeWriter::writeModuleLevelReferences,
dxil::DXILBitcodeWriter::addToStrtab,
dxil::DXILBitcodeWriter::createNamedMetadataAbbrev,
dxil::DXILBitcodeWriter::writeNamedMetadata,
dxil::DXILBitcodeWriter::pushGlobalMetadataAttachment,
dxil::DXILBitcodeWriter::writeOperandBundleTags,
dxil::DXILBitcodeWriter::writeSyncScopeNames,
dxil::DXILBitcodeWriter::writeOperandBundles,
dxil::DXILBitcodeWriter::writeGlobalValueSymbolTable: Added on
April 14, 2022 in commit f2526c1a5c6fe6d2740b68e2d73b85c958fd2719
without uses or definitions.
initializeHexagonMergeActivateWeightPass,
createHexagonMergeActivateWeight: Added on August 5, 2024 in commit
c04857cb2c9f6f2e8add61192c62e48a83938efd without definitions.
createHexagonTargetTransformInfoPass: Added on June 15, 2015 in commit
56efafc0566def51ec7e632e09574ed553296b48 without a definition.
HexagonGlobalSchedulerImpl::CanPromoteToDotNew: Added on February 20,
2026 in commit 7064ff2226141034fdb264c29b97acbc733f8dae without a
definition.
HexagonTargetLowering::LowerANY_EXTEND,
HexagonTargetLowering::LowerSIGN_EXTEND,
HexagonTargetLowering::LowerZERO_EXTEND: The definitions were removed on
February 6, 2018 in commit 8abaf8954a97f20d0fd036e8e32e4b69d23f342e.
HexagonTargetLowering::LowerEH_LABEL: Added on December 12, 2011 in
commit 1213a7a57fdcb6c875b3f79103fc96d3e9d30b40 without a definition.
HexagonPacketizerList::isCurifiable: Added on December 16, 2015 in
commit 56bbf54b4303cac8772b6d66e3bd0668f8013067 without a definition.
HexagonMCChecker::checkBranches: The definition was removed on
December 11, 2017 in commit a8ab1b75cb0d84ea61642d7b7c0139e6e367c28e.
createHexagonMCRegisterInfo: Added on February 6, 2017 in commit
8cdfe8ecf3dd14d128148c5ff0b01d74b082e3c2 without a definition.
HexagonShuffler::restrictNoSlot1: Added on January 17, 2020 in commit
c1873631d0a8f2acca4ab428a1e9abea844d97ff without a definition.
MipsAsmParser::parseImm: The definition was removed on August 8, 2016 in
commit 3feeb9c851a193f42d890b35f36816fae198860f.
MipsAsmParser::validateMSAIndex: The definition was removed on April 1,
2014 in commit b50ccf8e26653781191491aab90c7379f29bd5e1.
MipsMCCodeEmitter::getMSAMemEncoding: The definition was removed on
March 31, 2016 in commit dc0602a2c20a3f514541165a19cb1534597c5dc6.
Mips16DAGToDAGISel::initMips16SPAliasReg: The definition was removed on
June 16, 2016 in commit de7816b0cd3ffbd9775681c408298febe4c10fe3.
MipsAsmPrinter::EmitInstrWithMacroNoAT: The definition was removed on
June 2, 2012 in commit 23327b30ef9af2323dd20248e311ef454f9e0dfa.
MipsTargetLowering::emitSEL_D: The definition was removed on July 20,
2017 in commit be0bc71e023455a32d074b69054b6ffee6f1160e.
MipsSEDAGToDAGISel::selectMULT: The definition was removed on April 11,
2013 in commit 4f1130eb66ff01128c0061ace377c10b74128a45.
MipsSETargetLowering::lowerINT_TO_FP,
MipsSETargetLowering::lowerFP_TO_INT: The definitions were removed on
June 17, 2026 in commit de84e7ccc602fe2ef8b886a9b095c80d110f61a0.
MipsSubtarget::IsLinux: All uses were removed on December 19, 2014 in
commit 8985ba912f00de68f3fccf8bf440a30bf5bdb89e.
MipsSubtarget::OverrideMode, MipsSubtarget::setHelperClassesMips16,
MipsSubtarget::setHelperClassesMipsSE: All uses of OverrideMode and the
definitions of setHelperClassesMips16 and setHelperClassesMipsSE were
removed on July 18, 2014 in commit
4e7d1e7e7bb36bcd715297b36d688bdc0ed96bdf.
initializeNVVMReflectPass: The definition was removed on April 10, 2025
in commit 701d726ef09ea89909df9bd2fdc63c63758fe8d6.
NVPTXDAGToDAGISel::SelectTexSurfHandle: The definition was removed on
June 25, 2025 in commit 70333de6cfa76d2e0e36720d6065edd501a3ad8a.
NVPTXDAGToDAGISel::tryConstantFP: The definition was removed on
December 19, 2024 in commit 310e79875752886a7713911e2a1ec14bc75bd4b3.
NVPTXDAGToDAGISel::SelectCpAsyncBulkTensorReduceCommon: The definition
was removed on August 6, 2026 in commit
1ac19e41a0674925911e88cc5218dfd95a09a3ac.
createPPCMachObjectWriter: The definition was removed on March 2, 2020
in commit 3e851f4a688c42315355aae743b403dddeba9860.
createPPCExpandISELPass: The definition was removed on August 27, 2024
in commit 8e901c255df45e38cb1d69a576804029e20868bf.
SystemZTargetLowering::convertPrevCompareToBranch: The definition was
removed on July 25, 2013 in commit
c3f85d73ab781601b2aababa8ef6572fa437c4ff.
VEAsmParser::parseCCOpOperand: Added on June 5, 2020 in commit
117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca without a definition.
VEAsmParser::parseRDOpOperand: Added on June 10, 2020 in commit
34fef0c980446c3ea9595328e0e525db222870f0 without a definition.
WebAssemblyOptimizeReturnedLegacy::visitCallBase: The definition was
moved to a helper class on July 15, 2026 in commit
491539a8b801aad5706cc32fc54a319791d57a91.
X86FixupInstTuningLegacy::processInstruction: The definition was moved
to a helper class on January 12, 2026 in commit
f6d0a512972a74ef100723b9526a6a0ddb23f894.
XCoreTargetLowering::getReturnAddressFrameIndex: Added on November 7,
2008 in commit ca08e0645a9629980156208506b6ae463b746e42 without a
definition.
Assisted-by: Antigravity
Commit: 20c7e959ac021728f493a1d9aca6883b607313ee
https://github.com/llvm/llvm-project/commit/20c7e959ac021728f493a1d9aca6883b607313ee
Author: Arseniy Obolenskiy <arseniy.obolenskiy at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
Log Message:
-----------
[AMDGPU] Fix assert on empty inline asm register constraint (#225743)
An empty register name reaches this parser from user source, where
StringRef::front() asserts
Commit: d8ec5c857fded543e1daa439aae17af4cf807e8f
https://github.com/llvm/llvm-project/commit/d8ec5c857fded543e1daa439aae17af4cf807e8f
Author: Matt Arsenault <Matthew.Arsenault at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
A llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
Log Message:
-----------
AMDGPU: Mark dead carry-out when rewriting scalar carry op to VALU (#225738)
If an operation is expanded with a dead scc def, the resultant vcc def
will also be dead, so preserve the dead flag. Reduces implicit reliance on
LiveVariables recomputing dead flags later.
Co-authored-by: Claude (Opus 4.8) <noreply at anthropic.com>
Commit: 8a67df6af89be4fcfcd6d6d36cae0a0362868949
https://github.com/llvm/llvm-project/commit/8a67df6af89be4fcfcd6d6d36cae0a0362868949
Author: Kazu Hirata <kazu at google.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
Log Message:
-----------
[Target] Remove declarations without definitions (NFC) (#225615)
initializeAArch64CFIFixupPass: Added on April 11, 2022 in commit
b4ad28da196d3c2b1bc064b4dc46c3e00e93438f without a definition.
AArch64InstructionSelector::selectReduction: The definition was removed
on November 13, 2023 in commit a604c4b562e99470e397f050f1e8707f923ebed7.
AArch64TargetELFStreamer::insertAttributeInPlace: Added on January 23,
2025 in commit ee99c4d4845db66c4daa2373352133f4b237c942 without a
definition.
ARMInstPrinter::printAM2PostIndexOp: The definition was removed on
September 22, 2012 in commit 2fdbdc58701ef41ab6b52c064723926e6ec4b44f.
ARMMCCodeEmitter::getMachineSoImmOpValue: The definition was removed on
October 12, 2010 in commit 12e493ace4fc5b499361122bc5f25d2c46bea5e4.
ARMMCCodeEmitter::getThumbSRImmOpValue: The definition was removed on
August 17, 2011 in commit 46dd413991f6fa74a1da3f139b386e364dfc9f78.
createAVRBranchSelectionPass: The definition was removed on July 5, 2017
in commit a24aa1990084c15f0ad27dbcff7ab1c96369f0f9.
dxil::DXILOpBuilder::getOpFunctionType: Added on August 2, 2024 in
commit 8cf85653b6f5c90b83f8a5741baad5725d6c6932 without a definition.
dxil::DXILBitcodeWriter::VSTOffsetPlaceholder,
dxil::DXILBitcodeWriter::writeIdentificationBlock,
dxil::DXILBitcodeWriter::writePerModuleFunctionSummaryRecord,
dxil::DXILBitcodeWriter::writeModuleLevelReferences,
dxil::DXILBitcodeWriter::addToStrtab,
dxil::DXILBitcodeWriter::createNamedMetadataAbbrev,
dxil::DXILBitcodeWriter::writeNamedMetadata,
dxil::DXILBitcodeWriter::pushGlobalMetadataAttachment,
dxil::DXILBitcodeWriter::writeOperandBundleTags,
dxil::DXILBitcodeWriter::writeSyncScopeNames,
dxil::DXILBitcodeWriter::writeOperandBundles,
dxil::DXILBitcodeWriter::writeGlobalValueSymbolTable: Added on
April 14, 2022 in commit f2526c1a5c6fe6d2740b68e2d73b85c958fd2719
without uses or definitions.
initializeHexagonMergeActivateWeightPass,
createHexagonMergeActivateWeight: Added on August 5, 2024 in commit
c04857cb2c9f6f2e8add61192c62e48a83938efd without definitions.
createHexagonTargetTransformInfoPass: Added on June 15, 2015 in commit
56efafc0566def51ec7e632e09574ed553296b48 without a definition.
HexagonGlobalSchedulerImpl::CanPromoteToDotNew: Added on February 20,
2026 in commit 7064ff2226141034fdb264c29b97acbc733f8dae without a
definition.
HexagonTargetLowering::LowerANY_EXTEND,
HexagonTargetLowering::LowerSIGN_EXTEND,
HexagonTargetLowering::LowerZERO_EXTEND: The definitions were removed on
February 6, 2018 in commit 8abaf8954a97f20d0fd036e8e32e4b69d23f342e.
HexagonTargetLowering::LowerEH_LABEL: Added on December 12, 2011 in
commit 1213a7a57fdcb6c875b3f79103fc96d3e9d30b40 without a definition.
HexagonPacketizerList::isCurifiable: Added on December 16, 2015 in
commit 56bbf54b4303cac8772b6d66e3bd0668f8013067 without a definition.
HexagonMCChecker::checkBranches: The definition was removed on
December 11, 2017 in commit a8ab1b75cb0d84ea61642d7b7c0139e6e367c28e.
createHexagonMCRegisterInfo: Added on February 6, 2017 in commit
8cdfe8ecf3dd14d128148c5ff0b01d74b082e3c2 without a definition.
HexagonShuffler::restrictNoSlot1: Added on January 17, 2020 in commit
c1873631d0a8f2acca4ab428a1e9abea844d97ff without a definition.
MipsAsmParser::parseImm: The definition was removed on August 8, 2016 in
commit 3feeb9c851a193f42d890b35f36816fae198860f.
MipsAsmParser::validateMSAIndex: The definition was removed on April 1,
2014 in commit b50ccf8e26653781191491aab90c7379f29bd5e1.
MipsMCCodeEmitter::getMSAMemEncoding: The definition was removed on
March 31, 2016 in commit dc0602a2c20a3f514541165a19cb1534597c5dc6.
Mips16DAGToDAGISel::initMips16SPAliasReg: The definition was removed on
June 16, 2016 in commit de7816b0cd3ffbd9775681c408298febe4c10fe3.
MipsAsmPrinter::EmitInstrWithMacroNoAT: The definition was removed on
June 2, 2012 in commit 23327b30ef9af2323dd20248e311ef454f9e0dfa.
MipsTargetLowering::emitSEL_D: The definition was removed on July 20,
2017 in commit be0bc71e023455a32d074b69054b6ffee6f1160e.
MipsSEDAGToDAGISel::selectMULT: The definition was removed on April 11,
2013 in commit 4f1130eb66ff01128c0061ace377c10b74128a45.
MipsSETargetLowering::lowerINT_TO_FP,
MipsSETargetLowering::lowerFP_TO_INT: The definitions were removed on
June 17, 2026 in commit de84e7ccc602fe2ef8b886a9b095c80d110f61a0.
MipsSubtarget::IsLinux: All uses were removed on December 19, 2014 in
commit 8985ba912f00de68f3fccf8bf440a30bf5bdb89e.
MipsSubtarget::OverrideMode, MipsSubtarget::setHelperClassesMips16,
MipsSubtarget::setHelperClassesMipsSE: All uses of OverrideMode and the
definitions of setHelperClassesMips16 and setHelperClassesMipsSE were
removed on July 18, 2014 in commit
4e7d1e7e7bb36bcd715297b36d688bdc0ed96bdf.
initializeNVVMReflectPass: The definition was removed on April 10, 2025
in commit 701d726ef09ea89909df9bd2fdc63c63758fe8d6.
NVPTXDAGToDAGISel::SelectTexSurfHandle: The definition was removed on
June 25, 2025 in commit 70333de6cfa76d2e0e36720d6065edd501a3ad8a.
NVPTXDAGToDAGISel::tryConstantFP: The definition was removed on
December 19, 2024 in commit 310e79875752886a7713911e2a1ec14bc75bd4b3.
NVPTXDAGToDAGISel::SelectCpAsyncBulkTensorReduceCommon: The definition
was removed on August 6, 2026 in commit
1ac19e41a0674925911e88cc5218dfd95a09a3ac.
createPPCMachObjectWriter: The definition was removed on March 2, 2020
in commit 3e851f4a688c42315355aae743b403dddeba9860.
createPPCExpandISELPass: The definition was removed on August 27, 2024
in commit 8e901c255df45e38cb1d69a576804029e20868bf.
SystemZTargetLowering::convertPrevCompareToBranch: The definition was
removed on July 25, 2013 in commit
c3f85d73ab781601b2aababa8ef6572fa437c4ff.
VEAsmParser::parseCCOpOperand: Added on June 5, 2020 in commit
117c0d7c1c12e5c82e0f5498fec511e8ae08d9ca without a definition.
VEAsmParser::parseRDOpOperand: Added on June 10, 2020 in commit
34fef0c980446c3ea9595328e0e525db222870f0 without a definition.
WebAssemblyOptimizeReturnedLegacy::visitCallBase: The definition was
moved to a helper class on July 15, 2026 in commit
491539a8b801aad5706cc32fc54a319791d57a91.
X86FixupInstTuningLegacy::processInstruction: The definition was moved
to a helper class on January 12, 2026 in commit
f6d0a512972a74ef100723b9526a6a0ddb23f894.
XCoreTargetLowering::getReturnAddressFrameIndex: Added on November 7,
2008 in commit ca08e0645a9629980156208506b6ae463b746e42 without a
definition.
Assisted-by: Antigravity
Commit: 748e21a693d24bdd9168fa718a1a5146d414e8b2
https://github.com/llvm/llvm-project/commit/748e21a693d24bdd9168fa718a1a5146d414e8b2
Author: Razvan Lupusoru <razvan.lupusoru at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCDeclareActionConversion.cpp
M flang/test/Fir/OpenACC/declare-action-conversion.fir
M flang/test/Lower/OpenACC/acc-declare-allocatable-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-unified.f90
M flang/test/Lower/OpenACC/acc-declare-use-associated-allocatable.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
A mlir/test/Conversion/OpenACCToLLVM/declare.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
Log Message:
-----------
[mlir][acc] Add acc declare codegen to ACCToLLVM (#225557)
Extends the acc to LLVM conversion with codegen for `acc declare`. A
structured declare uses the same data entry points as `acc.data`. An
unstructured declare registers its objects with `__tgt_acc_declare`. A
declare in a declare-action recipe only allocates or frees the device
mirror of an object the host already manages, through
`__tgt_acc_mirror_alloc` and `__tgt_acc_mirror_dealloc`. As with the
other directives, these runtime APIs are not yet finalized; the draft
proposal can be found at
https://github.com/llvm/llvm-project/pull/197894.
Placing the globals that a declare directive names into the device image
is not part of this change.
Co-authored-by: Matsu <kmatsumura at nvidia.com>
Commit: 41ab14be8d53df1df1e46d2a80c37463aeb02a31
https://github.com/llvm/llvm-project/commit/41ab14be8d53df1df1e46d2a80c37463aeb02a31
Author: Konstantinos Parasyris <koparasy at gmail.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
A clang/test/CIR/CodeGen/cxx20-module-initializer-ms-abi.cppm
Log Message:
-----------
[CIR] Fix assertion on Microsoft-ABI C++20 named module initializer (#225565)
Compiling a C++20 named module interface unit for the Microsoft C++ ABI
asserts in `LoweringPrepare`, because the AST fallback for the
initializer name does an unguarded `cast<ItaniumMangleContext>`
([LoweringPrepare.cpp#L2006-L2013](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp#L2006-L2013)).
That fallback is reachable because CIRGen only emits
`cir.cxx_module_init_fn_name` for the Itanium mangler
([CIRGenModule.cpp#L3985-L3996](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CIR/CodeGen/CIRGenModule.cpp#L3985-L3996)),
mirroring classic codegen's `CXX20ModuleInits`
([CodeGenModule.cpp#L596-L601](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CodeGen/CodeGenModule.cpp#L596-L601)).
This deletes the fallback so the attribute is the only channel: absent
means `_GLOBAL__sub_I_` with internal linkage, which is exactly what
classic codegen does for this ABI
([CodeGenModule.cpp#L1205-L1208](https://github.com/llvm/llvm-project/blob/97458f644132d62bb938823394b716b684956f49/clang/lib/CodeGen/CodeGenModule.cpp#L1205-L1208)).
The new test pins that lowering and fails with the same assertion
without the fix. It checks CIR rather than LLVM IR because Microsoft-ABI
CIR cannot reach LLVM IR yet (`EH ABI lowering is not yet implemented
for the Microsoft ABI`). This also drops the last `ASTContext` use in
`buildCXXGlobalInitFunc`.
Commit: 37d97297fd3f1fd8c0c5ba79fc81eddd5553cbbb
https://github.com/llvm/llvm-project/commit/37d97297fd3f1fd8c0c5ba79fc81eddd5553cbbb
Author: Akash Banerjee <akash.banerjee at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M flang-rt/lib/runtime/derived.cpp
A flang-rt/test/Driver/derived-array-destruction.f90
Log Message:
-----------
[Flang] Restrict the scalar destruction fast path to rank-zero components (#224345)
Restrict the scalar destruction fast path to rank-zero components,
preventing invalid frees for zero-sized derived-type components. Add
regression coverage for scalar and array containers.
Commit: ddf72a3aa679bc2b8b93744443a00d8a6a5dfe50
https://github.com/llvm/llvm-project/commit/ddf72a3aa679bc2b8b93744443a00d8a6a5dfe50
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
Log Message:
-----------
[SLP][NFC]Add a test with the missed vectorization after splats, NFC
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225835
Commit: e28d3f11a8ada5012cf28d4a34f9e70c80d6f34e
https://github.com/llvm/llvm-project/commit/e28d3f11a8ada5012cf28d4a34f9e70c80d6f34e
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
Log Message:
-----------
[AMDGPU] Fall back for FP8-to-half conversions without native support (#225528)
The custom `v2i8` source action also handles half results on gfx950,
which has native OCP FP8-to-f32 conversions but lacks FP8-to-f16
instructions. Converting FP8 vectors to half therefore reached
`lowerFromFP8` and asserted that `FP8F16ConversionInsts` was available.
Use generic legalization for half results when the subtarget lacks the
required instructions. Preserve native f32 conversions and native f16
conversions on targets that support them.
Assisted by: Codex (Astra)
Commit: 6b5630dc25728baad8a4daf8697db2da15e7ed58
https://github.com/llvm/llvm-project/commit/6b5630dc25728baad8a4daf8697db2da15e7ed58
Author: Alexey Bataev <a.bataev at outlook.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
Log Message:
-----------
[SLP]Do not reorder the tree to match internal gathers of splat subtrees
The internal gathers of the splat gather subtrees are not used as
shuffle sources, but still defined the order of the main tree gathers.
The reorder shuffle stayed after the subtree was dropped as
unprofitable and rejected the profitable tree.
Fixes the perf regression from #220250, reported in #221717.
Reviewers:
Pull Request: https://github.com/llvm/llvm-project/pull/225839
Commit: f55e761c7fb78381074b07fe7001166c9a1c6019
https://github.com/llvm/llvm-project/commit/f55e761c7fb78381074b07fe7001166c9a1c6019
Author: Amr Hesham <amr96 at programmer.net>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
A clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CIR/IR/invalid-matrix.cir
A clang/test/CIR/IR/matrix.cir
Log Message:
-----------
[CIR] Support builtin matrix type (#221773)
Implement the basic support for the built-in matrix type
Issue #221772
Commit: dcd8f3442430915048c57164c193513d257e8ace
https://github.com/llvm/llvm-project/commit/dcd8f3442430915048c57164c193513d257e8ace
Author: Daniel Cederman <cederman at gaisler.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/test/CodeGen/Sparc/sparcv8-abi.c
Log Message:
-----------
[Sparc][clang] Match GCC's SPARC V8 vector return convention (#222264)
Match GCC's SPARC V8 calling convention for vector return values. Return
floating-point vectors and vectors larger than 64 bits indirectly.
Return smaller integer vectors in floating-point registers.
Assisted-by: Codex
Commit: 4f5ae89a4a8c49549cd3884c1f42f3fbba8d8ff3
https://github.com/llvm/llvm-project/commit/4f5ae89a4a8c49549cd3884c1f42f3fbba8d8ff3
Author: Harald van Dijk <hdijk at accesssoftek.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M lldb/test/Shell/Settings/Inputs/EchoCommandsAll.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNoComments.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNone.out
M llvm/lib/Support/Regex.cpp
M llvm/lib/Support/regcomp.c
A llvm/test/FileCheck/escape.txt
M llvm/unittests/Support/RegexTest.cpp
Log Message:
-----------
[Support] Allow \n, \t, \x in regexes (#223024)
\n and \t were already permitted in Regex::sub, but not in the regex
pattern itself. This commit allows them there too.
\x was not supported at all. This commit allows it both in regex
patterns and in Regex::sub.
The goal is to allow \x to be used in FileCheck patterns and to that
end, a test is also included that this works in FileCheck as expected.
Commit: 4b150e53377a931ab02a2c6b225ccdd75e0d8284
https://github.com/llvm/llvm-project/commit/4b150e53377a931ab02a2c6b225ccdd75e0d8284
Author: Nikita Popov <npopov at redhat.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/test/Transforms/GlobalOpt/storepointer.ll
Log Message:
-----------
[GlobalOpt] Use getGetElementPtr() overload accepting a DataLayout (#225789)
To produce the GEP in canonical ptradd form. Unlike other uses,
this one has to take potential failure to create the constant
expression into account.
It also seems like the GEP path was entirely untested, so I added
some basic test coverage for it.
Commit: 7799236d0b84d6fc49a336393aecaba83c061ddf
https://github.com/llvm/llvm-project/commit/7799236d0b84d6fc49a336393aecaba83c061ddf
Author: Artem Kroviakov <71938912+akroviakov at users.noreply.github.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
Log Message:
-----------
[MLIR][XeGPU] Improve multi-reduction layout inference (#224618)
Commit: a5f766fb57125aaa256536d90a14326177c2adc4
https://github.com/llvm/llvm-project/commit/a5f766fb57125aaa256536d90a14326177c2adc4
Author: Chinmay Deshpande <chdeshpa at amd.com>
Date: 2026-09-23 (Wed, 23 Sep 2026)
Changed paths:
M .github/workflows/ids-check.yml
M .github/workflows/issue-write.yml
M .github/workflows/libcxx-benchmark-commit.yml
M .github/workflows/libcxx-pr-benchmark.yml
M .github/workflows/libcxx-pr-conformance-tests.yaml
M .github/workflows/libcxx-pr-test-tools.yml
A .github/workflows/libcxx/build-at-commit/action.yml
M clang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
M clang-tools-extra/clangd/refactor/tweaks/ExtractFunction.cpp
M clang-tools-extra/clangd/unittests/tweaks/ExtractFunctionTests.cpp
M clang-tools-extra/docs/ReleaseNotes.md
M clang-tools-extra/test/clang-tidy/checkers/readability/identifier-naming.cpp
M clang/docs/ReleaseNotes.md
M clang/docs/analyzer/checkers.md
M clang/include/clang/AST/DeclCXX.h
M clang/include/clang/AST/Redeclarable.h
M clang/include/clang/Basic/BuiltinsRISCV.td
M clang/include/clang/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.h
M clang/include/clang/CIR/Dialect/Builder/CIRBaseBuilder.h
M clang/include/clang/CIR/Dialect/IR/CIRTypeConstraints.td
M clang/include/clang/CIR/Dialect/IR/CIRTypes.td
M clang/include/clang/CIR/Interfaces/CIROpInterfaces.td
M clang/include/clang/CIR/LoweringHelpers.h
M clang/include/clang/Options/Options.td
M clang/include/clang/StaticAnalyzer/Checkers/Checkers.td
M clang/lib/AST/ByteCode/ByteCodeEmitter.cpp
M clang/lib/AST/ByteCode/Compiler.cpp
M clang/lib/AST/ByteCode/Interp.cpp
M clang/lib/AST/ByteCode/Interp.h
M clang/lib/AST/ByteCode/InterpHelpers.h
M clang/lib/AST/ByteCode/Opcodes.td
M clang/lib/AST/ByteCode/Pointer.cpp
M clang/lib/AST/ByteCode/Pointer.h
M clang/lib/AST/ExprConstant.cpp
M clang/lib/CIR/CodeGen/CIRGenBuiltinAMDGPU.cpp
M clang/lib/CIR/CodeGen/CIRGenCleanup.cpp
M clang/lib/CIR/CodeGen/CIRGenExpr.cpp
M clang/lib/CIR/CodeGen/CIRGenExprScalar.cpp
M clang/lib/CIR/CodeGen/CIRGenFunction.cpp
M clang/lib/CIR/CodeGen/CIRGenModule.cpp
M clang/lib/CIR/CodeGen/CIRGenTypes.cpp
M clang/lib/CIR/Dialect/Analysis/CIRBasicAliasAnalysis.cpp
M clang/lib/CIR/Dialect/IR/CIRDialect.cpp
M clang/lib/CIR/Dialect/IR/CIRTypes.cpp
M clang/lib/CIR/Dialect/Transforms/CallConvLoweringPass.cpp
M clang/lib/CIR/Dialect/Transforms/LoweringPrepare.cpp
M clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp
M clang/lib/CIR/Lowering/LoweringHelpers.cpp
M clang/lib/CodeGen/CGExprConstant.cpp
M clang/lib/CodeGen/CGObjCGNU.cpp
M clang/lib/CodeGen/CGObjCMac.cpp
M clang/lib/CodeGen/CGVTT.cpp
M clang/lib/CodeGen/CodeGenModule.cpp
M clang/lib/CodeGen/ConstantInitBuilder.cpp
M clang/lib/CodeGen/ItaniumCXXABI.cpp
M clang/lib/CodeGen/MicrosoftCXXABI.cpp
M clang/lib/CodeGen/TargetBuiltins/RISCV.cpp
M clang/lib/CodeGen/Targets/Sparc.cpp
M clang/lib/Driver/ToolChains/CommonArgs.cpp
M clang/lib/Driver/ToolChains/Flang.cpp
M clang/lib/Headers/riscv_packed_simd.h
M clang/lib/Interpreter/IncrementalParser.cpp
M clang/lib/Sema/SemaTemplate.cpp
M clang/lib/Sema/SemaTemplateInstantiate.cpp
M clang/lib/Sema/SemaTemplateVariadic.cpp
M clang/lib/Sema/TreeTransform.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/ASTUtils.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/PtrTypesSemantics.h
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefCallArgsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefLocalVarsChecker.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.cpp
M clang/lib/StaticAnalyzer/Checkers/WebKit/RawPtrRefSafetyModel.h
A clang/test/AST/ByteCode/codegen.cl
M clang/test/AST/ByteCode/const-base-cast.cpp
M clang/test/AST/ByteCode/records.cpp
A clang/test/Analysis/Checkers/WebKit/mock-canborrow.h
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars-cxx23.cpp
A clang/test/Analysis/Checkers/WebKit/unborrowed-local-vars.cpp
M clang/test/Analysis/Checkers/WebKit/uncounted-local-vars.cpp
M clang/test/CIR/Analysis/alias-analysis-underlying-object.cir
M clang/test/CIR/CodeGen/agg-init-constexpr.cpp
M clang/test/CIR/CodeGen/array.cpp
M clang/test/CIR/CodeGen/attr-target-x86.c
M clang/test/CIR/CodeGen/base-init-eh.cpp
R clang/test/CIR/CodeGen/bitint-split-storage-nyi.c
A clang/test/CIR/CodeGen/bitint-wide.c
M clang/test/CIR/CodeGen/cleanup-conditional.cpp
M clang/test/CIR/CodeGen/ctor-null-init.cpp
A clang/test/CIR/CodeGen/cxx20-module-initializer-ms-abi.cppm
M clang/test/CIR/CodeGen/delegating-ctor.cpp
M clang/test/CIR/CodeGen/destructor-vtable-reinit.cpp
M clang/test/CIR/CodeGen/dtors.cpp
A clang/test/CIR/CodeGen/global-const-alignment.cpp
M clang/test/CIR/CodeGen/global-ptr-init.cpp
M clang/test/CIR/CodeGen/inherited-ctors.cpp
A clang/test/CIR/CodeGen/lambda-explicit-obj.cpp
M clang/test/CIR/CodeGen/local-const-aggregate-name-clash.cpp
M clang/test/CIR/CodeGen/loop.cpp
A clang/test/CIR/CodeGen/matrix.cpp
M clang/test/CIR/CodeGen/multi-vtable.cpp
A clang/test/CIR/CodeGen/nobuiltin-replaceable-allocation.cpp
M clang/test/CIR/CodeGen/rtti-member-pointer.cpp
M clang/test/CIR/CodeGen/rtti-qualfn.cpp
M clang/test/CIR/CodeGen/side-effect.cpp
M clang/test/CIR/CodeGen/vbase.cpp
M clang/test/CIR/CodeGen/virtual-function-calls.cpp
M clang/test/CIR/CodeGen/vtt.cpp
M clang/test/CIR/CodeGenCXX/base-layout.cpp
M clang/test/CIR/CodeGenCXX/sizeof-pack.cpp
M clang/test/CIR/CodeGenCXX/vtable-pure-deleted-funcs.cpp
A clang/test/CIR/CodeGenHIP/builtins-amdgcn-prefetch.hip
R clang/test/CIR/CodeGenHIP/builtins-amdgcn-s-prefetch-inst-nyi.hip
M clang/test/CIR/CodeGenHIP/builtins-amdgcn.hip
M clang/test/CIR/CodeGenHLSL/matrix-element-expr-load.hlsl
A clang/test/CIR/IR/invalid-matrix.cir
A clang/test/CIR/IR/matrix.cir
A clang/test/CIR/Lowering/not.cir
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem-indirect.cir
A clang/test/CIR/Transforms/abi-lowering/memory-effects-argmem.cir
M clang/test/CodeGen/RISCV/rvp-intrinsics.c
M clang/test/CodeGen/Sparc/sparcv8-abi.c
A clang/test/CodeGen/WebAssembly/target-abi-module-flag.c
M clang/test/CodeGen/builtins-nvptx.c
M clang/test/CodeGen/ptrauth-qualifier-const-init.c
M clang/test/CodeGen/ptrauth-restricted-intptr-qualifier.c
M clang/test/CodeGenCUDA/record-layout.cu
M clang/test/CodeGenCXX/OmitRTTIComponentABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/PR26569.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-inheritted-from-parent-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/child-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-1.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/cross-translation-unit-2.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/deleted-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/diamond-virtual-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inheritted-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inline-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/inlined-key-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/multiple-inheritance.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/override-pure-virtual-method.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/overriden-virtual-function.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-and-child-in-comdats.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/parent-vtable-in-comdat.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-flag.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/relative-vtables-hwasan.cpp
M clang/test/CodeGenCXX/RelativeVTablesABI/simple-vtable-definition.cpp
M clang/test/CodeGenCXX/const-init-cxx11.cpp
M clang/test/CodeGenCXX/constructor-init.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis-2.cpp
M clang/test/CodeGenCXX/copy-constructor-synthesis.cpp
M clang/test/CodeGenCXX/dllexport.cpp
M clang/test/CodeGenCXX/dllimport-rtti.cpp
M clang/test/CodeGenCXX/dynamic-cast-address-space.cpp
M clang/test/CodeGenCXX/dynamic-cast-exact.cpp
M clang/test/CodeGenCXX/microsoft-abi-vftables.cpp
M clang/test/CodeGenCXX/microsoft-interface.cpp
M clang/test/CodeGenCXX/ms-local-vft-alias-comdat.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call-2.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-call.cpp
M clang/test/CodeGenCXX/ptrauth-apple-kext-indirect-virtual-dtor-call.cpp
M clang/test/CodeGenCXX/ptrauth-explicit-vtable-pointer-control.cpp
M clang/test/CodeGenCXX/ptrauth-global-constant-initializers.cpp
M clang/test/CodeGenCXX/ptrauth-member-function-pointer.cpp
M clang/test/CodeGenCXX/ptrauth-rtti-layout.cpp
M clang/test/CodeGenCXX/ptrauth-type-info-vtable.cpp
M clang/test/CodeGenCXX/ptrauth-virtual-function.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-in-vtt.cpp
M clang/test/CodeGenCXX/ptrauth-vtable-virtual-inheritance-thunk.cpp
M clang/test/CodeGenCXX/rtti-mingw64.cpp
M clang/test/CodeGenCXX/rtti-qualfn.cpp
M clang/test/CodeGenCXX/skip-vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/static-init.cpp
M clang/test/CodeGenCXX/strict-vtable-pointers.cpp
M clang/test/CodeGenCXX/typeinfo-with-address-space.cpp
M clang/test/CodeGenCXX/visibility.cpp
M clang/test/CodeGenCXX/vtable-align-address-space.cpp
M clang/test/CodeGenCXX/vtable-align.cpp
M clang/test/CodeGenCXX/vtable-assume-load-address-space.cpp
M clang/test/CodeGenCXX/vtable-assume-load.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization-address-space.cpp
M clang/test/CodeGenCXX/vtable-pointer-initialization.cpp
M clang/test/CodeGenCXX/vtt-layout-address-space.cpp
M clang/test/CodeGenCXX/vtt-layout.cpp
M clang/test/CodeGenHIP/sret-nontrivial-copyable.hip
M clang/test/CodeGenObjC/attr-exception.m
M clang/test/CodeGenObjC/ptrauth-attr-exception.m
M clang/test/CodeGenObjC/ptrauth-block-descriptor-pointer.m
M clang/test/CodeGenObjC/ptrauth-block-isa.m
M clang/test/CodeGenObjC/ptrauth-class-ro.m
M clang/test/CodeGenObjC/ptrauth-objc-isa-super.m
M clang/test/CodeGenObjC/ptrauth-objc-method-list-pointer.m
M clang/test/Driver/sanitize-trap-loop.c
M clang/test/Frontend/stack-layout-remark.c
A clang/test/Interpreter/failed-input-keeps-redecls.cpp
M clang/test/OffloadTools/clang-linker-wrapper/linker-wrapper-image.c
M clang/test/OpenMP/distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_data_use_device_ptr_inheritance_codegen.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/target_teams_distribute_parallel_for_simd_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_loop_messages.cpp
M clang/test/OpenMP/teams_distribute_parallel_for_simd_messages.cpp
M clang/test/Sema/vector-assign.c
M clang/test/SemaCXX/recovery-expr-type.cpp
M compiler-rt/lib/ubsan/CMakeLists.txt
M compiler-rt/lib/ubsan/ubsan_loop_detect.cpp
A compiler-rt/test/ubsan/TestCases/Misc/Posix/trap_loop_detect.cpp
M cross-project-tests/intrinsic-header-tests/riscv_packed_simd.c
M flang-rt/lib/runtime/derived.cpp
A flang-rt/test/Driver/derived-array-destruction.f90
M flang/docs/FlangDriver.md
M flang/include/flang/Frontend/CodeGenOptions.def
M flang/include/flang/Lower/Bridge.h
M flang/include/flang/Optimizer/Support/Utils.h
M flang/include/flang/Optimizer/Transforms/Passes.td
M flang/include/flang/Tools/CrossToolHelpers.h
M flang/lib/Frontend/CompilerInvocation.cpp
M flang/lib/Lower/Bridge.cpp
M flang/lib/Lower/IO.cpp
M flang/lib/Lower/OpenACC.cpp
M flang/lib/Lower/OpenMP/OpenMP.cpp
M flang/lib/Optimizer/OpenACC/Transforms/ACCDeclareActionConversion.cpp
M flang/lib/Optimizer/Passes/Pipelines.cpp
M flang/lib/Optimizer/Transforms/AddDebugInfo.cpp
M flang/lib/Optimizer/Transforms/CompilerGeneratedNames.cpp
M flang/lib/Optimizer/Transforms/DebugTypeGenerator.cpp
M flang/lib/Optimizer/Transforms/FunctionAttr.cpp
M flang/lib/Semantics/rewrite-parse-tree.cpp
A flang/test/Driver/funique-internal-linkage-names.f90
M flang/test/Fir/OpenACC/declare-action-conversion.fir
A flang/test/Integration/debug-include-file.f90
M flang/test/Integration/debug-module-2.f90
M flang/test/Integration/debug-module-constant.f90
M flang/test/Lower/OpenACC/acc-declare-allocatable-deallocate.f90
M flang/test/Lower/OpenACC/acc-declare-unified.f90
M flang/test/Lower/OpenACC/acc-declare-use-associated-allocatable.f90
M flang/test/Lower/OpenACC/acc-declare.f90
M flang/test/Lower/OpenMP/Todo/dispatch.f90
A flang/test/Lower/OpenMP/dispatch.f90
A flang/test/Lower/io-implied-do-collapse.f90
A flang/test/Lower/unique-internal-linkage-names.f90
M flang/test/Semantics/OpenMP/simd-only.f90
M flang/test/Transforms/debug-derived-type-1.fir
M flang/test/Transforms/debug-dummy-argument-inline.fir
A flang/test/Transforms/debug-include-file.fir
A flang/test/Transforms/function-attrs-unique-internal-linkage-names.fir
M libc/cmake/modules/LLVMLibCCompileOptionRules.cmake
M libc/config/config.json
M libc/config/linux/aarch64/entrypoints.txt
M libc/config/linux/app.h
M libc/config/linux/arm/entrypoints.txt
M libc/config/linux/riscv/entrypoints.txt
M libc/config/linux/x86_64/entrypoints.txt
M libc/fuzzing/__support/CMakeLists.txt
M libc/include/sched.yaml
M libc/include/sys/stat.yaml
M libc/include/unistd.yaml
M libc/src/__support/CMakeLists.txt
M libc/src/__support/File/CMakeLists.txt
M libc/src/__support/File/file.h
A libc/src/__support/File/file_io_result.h
M libc/src/__support/OSUtil/linux/syscall_wrappers/CMakeLists.txt
A libc/src/__support/OSUtil/linux/syscall_wrappers/aarch64/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/pause.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/riscv/clone.h
A libc/src/__support/OSUtil/linux/syscall_wrappers/x86_64/clone.h
M libc/src/__support/block.h
M libc/src/__support/freelist_heap.h
M libc/src/__support/freestore.h
M libc/src/__support/freetrie.cpp
M libc/src/__support/freetrie.h
M libc/src/__support/threads/linux/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/CMakeLists.txt
A libc/src/__support/threads/linux/aarch64/tls.cpp
A libc/src/__support/threads/linux/riscv/CMakeLists.txt
A libc/src/__support/threads/linux/riscv/tls.cpp
M libc/src/__support/threads/linux/thread.cpp
A libc/src/__support/threads/linux/x86_64/CMakeLists.txt
A libc/src/__support/threads/linux/x86_64/tls.cpp
M libc/src/__support/tlsf_table.h
M libc/src/pthread/CMakeLists.txt
A libc/src/pthread/pthread_attr.h
M libc/src/pthread/pthread_attr_init.cpp
M libc/src/pthread/pthread_create.cpp
M libc/src/sched/CMakeLists.txt
A libc/src/sched/clone.h
M libc/src/sched/linux/CMakeLists.txt
A libc/src/sched/linux/clone.cpp
M libc/src/stdio/baremetal/CMakeLists.txt
M libc/src/stdio/baremetal/file_internal.h
M libc/src/sys/stat/CMakeLists.txt
M libc/src/sys/stat/linux/CMakeLists.txt
A libc/src/sys/stat/linux/mknodat.cpp
A libc/src/sys/stat/mknodat.h
M libc/src/threads/CMakeLists.txt
M libc/src/unistd/CMakeLists.txt
M libc/src/unistd/linux/CMakeLists.txt
A libc/src/unistd/linux/pause.cpp
A libc/src/unistd/pause.h
M libc/startup/linux/CMakeLists.txt
M libc/startup/linux/aarch64/CMakeLists.txt
R libc/startup/linux/aarch64/tls.cpp
M libc/startup/linux/do_start.cpp
M libc/startup/linux/riscv/CMakeLists.txt
R libc/startup/linux/riscv/tls.cpp
M libc/startup/linux/x86_64/CMakeLists.txt
R libc/startup/linux/x86_64/tls.cpp
M libc/test/src/__support/CMakeLists.txt
M libc/test/src/__support/freelist_heap_test.cpp
M libc/test/src/sched/CMakeLists.txt
A libc/test/src/sched/linux/CMakeLists.txt
A libc/test/src/sched/linux/clone_test.cpp
M libc/test/src/sys/stat/CMakeLists.txt
A libc/test/src/sys/stat/mknodat_test.cpp
M libc/test/src/unistd/CMakeLists.txt
A libc/test/src/unistd/pause_test.cpp
M libcxx/src/std_stream.h
M libcxx/test/benchmarks/containers/string.bench.cpp
A libcxx/test/libcxx/input.output/iostream.objects/cin-read-stdio-sync.sh.cpp
M libcxx/utils/ci/lnt/README.md
M libcxx/utils/ci/lnt/machines.json
M libcxx/utils/ci/lnt/run-benchmarks
M libcxx/utils/ci/run-buildbot
M libsycl/src/detail/device_image_wrapper.hpp
M libsycl/src/detail/program_manager.cpp
M libsycl/src/detail/program_manager.hpp
A libsycl/src/detail/suppress_extra_warnings.hpp
M lld/ELF/Config.h
M lld/ELF/Driver.cpp
M lld/ELF/OutputSections.cpp
M lld/ELF/Relocations.cpp
M lld/ELF/SyntheticSections.cpp
M lld/MachO/MapFile.cpp
M lld/MachO/SyntheticSections.h
M lld/test/ELF/x86-64-plt.s
M lld/test/MachO/arm64-objc-stubs-dead.s
M lld/test/MachO/arm64-objc-stubs.s
M lld/test/MachO/objc-stubs-order-file.s
M lld/test/MachO/x86-64-objc-stubs.s
M lldb/bindings/interface/SBProcessDocstrings.i
M lldb/bindings/interface/SBProcessExtensions.i
M lldb/examples/darwin/heap_find/heap.py
M lldb/examples/darwin/heap_find/heap/heap_find.cpp
M lldb/examples/python/file_extract.py
M lldb/examples/synthetic/libcxx.py
M lldb/include/lldb/API/SBError.h
M lldb/include/lldb/Host/JSONTransport.h
M lldb/include/lldb/Host/common/NativeProcessProtocol.h
M lldb/include/lldb/Target/Process.h
M lldb/include/lldb/Target/Target.h
M lldb/include/lldb/Utility/Args.h
M lldb/include/lldb/Utility/Broadcaster.h
M lldb/include/lldb/Utility/ConstString.h
M lldb/include/lldb/Utility/DataEncoder.h
M lldb/include/lldb/Utility/DataExtractor.h
M lldb/include/lldb/Utility/FileSpec.h
M lldb/include/lldb/Utility/RegularExpression.h
M lldb/include/lldb/Utility/State.h
M lldb/include/lldb/Utility/Status.h
M lldb/include/lldb/Utility/Stream.h
M lldb/include/lldb/Utility/StreamBuffer.h
M lldb/include/lldb/ValueObject/DILEval.h
M lldb/include/lldb/ValueObject/DILParser.h
M lldb/include/lldb/lldb-enumerations.h
M lldb/packages/Python/lldbsuite/test/lldbtest.py
M lldb/packages/Python/lldbsuite/test/tools/lldb_dap/testcase.py
M lldb/source/API/SBValue.cpp
M lldb/source/Commands/CommandObjectMemory.cpp
M lldb/source/Core/Address.cpp
M lldb/source/Core/FormatEntity.cpp
M lldb/source/Core/Mangled.cpp
M lldb/source/DataFormatters/StringPrinter.cpp
M lldb/source/Host/common/NativeProcessProtocol.cpp
M lldb/source/Host/windows/Host.cpp
M lldb/source/Interpreter/OptionGroupFormat.cpp
M lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderDarwin.h
M lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
M lldb/source/Plugins/ObjectFile/JSON/ObjectFileJSON.cpp
M lldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.cpp
M lldb/source/Plugins/ObjectFile/Minidump/MinidumpFileBuilder.h
M lldb/source/Plugins/Platform/POSIX/PlatformPOSIX.cpp
M lldb/source/Plugins/Process/elf-core/RegisterUtilities.h
M lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationClient.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
M lldb/source/Plugins/SymbolFile/DWARF/DWARFFormValue.cpp
M lldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
M lldb/source/Target/StackFrame.cpp
M lldb/source/Utility/Args.cpp
M lldb/source/Utility/DataExtractor.cpp
M lldb/source/Utility/Stream.cpp
M lldb/source/ValueObject/DILEval.cpp
M lldb/source/ValueObject/DILLexer.cpp
M lldb/source/ValueObject/DILParser.cpp
M lldb/source/ValueObject/ValueObject.cpp
M lldb/test/API/api/multiple-debuggers/TestMultipleDebuggers.py
M lldb/test/API/api/multiple-debuggers/multi-process-driver.cpp
M lldb/test/API/api/multithreaded/TestMultithreaded.py
M lldb/test/API/api/multithreaded/common.h
M lldb/test/API/api/multithreaded/listener_test.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_callback.cpp
M lldb/test/API/api/multithreaded/test_breakpoint_location_callback.cpp
M lldb/test/API/api/multithreaded/test_stop-hook.cpp
M lldb/test/API/commands/memory/read/TestMemoryRead.py
M lldb/test/API/functionalities/data-formatter/data-formatter-stl/generic/string/TestDataFormatterStdString.py
M lldb/test/API/functionalities/json/object-file/TestObjectFileJSON.py
M lldb/test/API/macosx/lc-note/additional-registers/add-lcnote.cpp
M lldb/test/API/python_api/watchpoint/TestSetWatchpoint.py
M lldb/test/API/python_api/watchpoint/main.c
M lldb/test/API/tools/lldb-server/main.cpp
M lldb/test/Shell/Settings/Inputs/EchoCommandsAll.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNoComments.out
M lldb/test/Shell/Settings/Inputs/EchoCommandsNone.out
M lldb/tools/debugserver/source/DNB.cpp
M lldb/tools/debugserver/source/MacOSX/MachProcess.mm
M lldb/tools/debugserver/source/PseudoTerminal.cpp
M lldb/tools/debugserver/source/RNBServices.cpp
M lldb/tools/debugserver/source/debugserver.cpp
M lldb/tools/lldb-dap/SourceBreakpoint.cpp
M lldb/unittests/Utility/DataEncoderTest.cpp
M lldb/unittests/Utility/DataExtractorTest.cpp
M lldb/unittests/tools/lldb-server/tests/LLGSTest.cpp
M lldb/unittests/tools/lldb-server/tests/TestClient.cpp
M llvm/docs/LangRef.md
M llvm/docs/ReleaseNotes.md
M llvm/include/llvm/ABI/TargetInfo.h
M llvm/include/llvm/ADT/APInt.h
M llvm/include/llvm/Analysis/ScalarEvolution.h
M llvm/include/llvm/Analysis/TargetTransformInfoImpl.h
M llvm/include/llvm/Analysis/ValueTracking.h
M llvm/include/llvm/ExecutionEngine/JITLink/ELF_aarch64.h
M llvm/include/llvm/ExecutionEngine/JITLink/aarch64.h
M llvm/include/llvm/Frontend/OpenMP/OMP.td
M llvm/include/llvm/IR/DebugProgramInstruction.h
M llvm/include/llvm/IR/IRBuilder.h
M llvm/include/llvm/IR/Instruction.h
M llvm/include/llvm/IR/Intrinsics.h
M llvm/include/llvm/IR/Intrinsics.td
M llvm/include/llvm/IR/IntrinsicsNVVM.td
M llvm/include/llvm/IR/IntrinsicsRISCV.td
M llvm/include/llvm/IR/Value.h
M llvm/include/llvm/Object/Binary.h
M llvm/include/llvm/Object/DXContainer.h
M llvm/include/llvm/Transforms/Scalar/GVN.h
M llvm/lib/ABI/TargetInfo.cpp
M llvm/lib/ABI/Targets/AArch64.cpp
M llvm/lib/ABI/Targets/BPF.cpp
M llvm/lib/ABI/Targets/X86.cpp
M llvm/lib/Analysis/ConstantFolding.cpp
M llvm/lib/Analysis/InlineCost.cpp
M llvm/lib/Analysis/ScalarEvolution.cpp
M llvm/lib/Analysis/ValueTracking.cpp
M llvm/lib/CodeGen/CodeGenPrepare.cpp
M llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
M llvm/lib/CodeGen/SelectionDAG/FastISel.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
M llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF.cpp
M llvm/lib/ExecutionEngine/JITLink/ELF_aarch64.cpp
M llvm/lib/ExecutionEngine/JITLink/MachO_arm64.cpp
M llvm/lib/ExecutionEngine/Orc/Shared/OrcRTBridge.cpp
M llvm/lib/Frontend/Offloading/Utility.cpp
M llvm/lib/IR/AutoUpgrade.cpp
M llvm/lib/IR/IRBuilder.cpp
M llvm/lib/IR/Instruction.cpp
M llvm/lib/IR/Intrinsics.cpp
M llvm/lib/IR/Module.cpp
M llvm/lib/IR/Value.cpp
M llvm/lib/Object/DXContainer.cpp
M llvm/lib/Object/MachOObjectFile.cpp
M llvm/lib/Support/Regex.cpp
M llvm/lib/Support/regcomp.c
M llvm/lib/Target/AArch64/AArch64.h
M llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
M llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
M llvm/lib/Target/AArch64/MCTargetDesc/AArch64TargetStreamer.h
M llvm/lib/Target/AMDGPU/AMDGPUAtomicOptimizer.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
M llvm/lib/Target/AMDGPU/AMDGPUCoExecSchedStrategy.cpp
M llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
M llvm/lib/Target/AMDGPU/AMDGPULowerBufferFatPointers.cpp
M llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp
M llvm/lib/Target/AMDGPU/SIFrameLowering.cpp
M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
M llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
M llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
M llvm/lib/Target/ARM/MCTargetDesc/ARMInstPrinter.h
M llvm/lib/Target/ARM/MCTargetDesc/ARMMCCodeEmitter.cpp
M llvm/lib/Target/AVR/AVR.h
M llvm/lib/Target/DirectX/DXILOpBuilder.h
M llvm/lib/Target/DirectX/DXILWriter/DXILBitcodeWriter.cpp
M llvm/lib/Target/Hexagon/Hexagon.h
M llvm/lib/Target/Hexagon/HexagonGlobalScheduler.cpp
M llvm/lib/Target/Hexagon/HexagonISelLowering.h
M llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.h
M llvm/lib/Target/Hexagon/MCTargetDesc/HexagonShuffler.h
M llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp
M llvm/lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.h
M llvm/lib/Target/Mips/Mips16ISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsAsmPrinter.h
M llvm/lib/Target/Mips/MipsDelaySlotFiller.cpp
M llvm/lib/Target/Mips/MipsISelLowering.h
M llvm/lib/Target/Mips/MipsInstrInfo.cpp
M llvm/lib/Target/Mips/MipsSEISelDAGToDAG.h
M llvm/lib/Target/Mips/MipsSEISelLowering.h
M llvm/lib/Target/Mips/MipsSubtarget.h
M llvm/lib/Target/NVPTX/NVPTX.h
M llvm/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp
M llvm/lib/Target/NVPTX/NVPTXInstrInfo.td
M llvm/lib/Target/NVPTX/NVPTXIntrinsics.td
M llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.h
M llvm/lib/Target/PowerPC/PPC.h
M llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
M llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
M llvm/lib/Target/RISCV/RISCVISelLowering.cpp
M llvm/lib/Target/RISCV/RISCVInstrInfoP.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXCV.td
M llvm/lib/Target/RISCV/RISCVInstrInfoXTHead.td
M llvm/lib/Target/RISCV/RISCVInstrPredicates.td
M llvm/lib/Target/RISCV/RISCVVLOptimizer.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.cpp
M llvm/lib/Target/SPIRV/SPIRVNonSemanticDebugHandler.h
M llvm/lib/Target/SPIRV/SPIRVPostLegalizer.cpp
M llvm/lib/Target/SystemZ/SystemZISelLowering.h
M llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyCoalesceFeaturesAndStripAtomics.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyOptimizeReturned.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.cpp
M llvm/lib/Target/WebAssembly/WebAssemblySubtarget.h
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.cpp
M llvm/lib/Target/WebAssembly/WebAssemblyUtilities.h
M llvm/lib/Target/X86/X86FixupInstTuning.cpp
M llvm/lib/Target/X86/X86FrameLowering.cpp
M llvm/lib/Target/X86/X86ISelLowering.cpp
M llvm/lib/Target/X86/X86InstrInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.cpp
M llvm/lib/Target/X86/X86RegisterInfo.h
M llvm/lib/Target/XCore/XCoreISelLowering.h
M llvm/lib/Transforms/IPO/GlobalOpt.cpp
M llvm/lib/Transforms/IPO/LowerTypeTests.cpp
M llvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
M llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
M llvm/lib/Transforms/InstCombine/InstructionCombining.cpp
M llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
M llvm/lib/Transforms/Scalar/GVN.cpp
M llvm/lib/Transforms/Scalar/LICM.cpp
M llvm/lib/Transforms/Utils/Local.cpp
M llvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
M llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
M llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
M llvm/lib/Transforms/Vectorize/VPRecipeBuilder.h
M llvm/lib/Transforms/Vectorize/VPlan.h
M llvm/lib/Transforms/Vectorize/VPlanConstruction.cpp
M llvm/lib/Transforms/Vectorize/VPlanDominatorTree.h
M llvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
M llvm/lib/Transforms/Vectorize/VPlanTransforms.h
M llvm/lib/Transforms/Vectorize/VPlanUtils.h
M llvm/lib/Transforms/Vectorize/VPlanValue.h
M llvm/test/Analysis/BasicAA/call-escape-source.ll
M llvm/test/Analysis/CostModel/AArch64/free-widening-casts.ll
M llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost-inseltpoison.ll
M llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll
M llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
M llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
A llvm/test/Analysis/ScalarEvolution/implied-cond-ge-via-gt-minus-one.ll
M llvm/test/Analysis/ScalarEvolution/ptrtoaddr-i32-index-width.ll
M llvm/test/Analysis/ValueTracking/invariant.group.ll
A llvm/test/Bitcode/upgrade-strip-invariant-group.ll
M llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-no-op-intrinsics.ll
M llvm/test/CodeGen/AArch64/zext-to-tbl.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-amdgpu_kernel.ll
M llvm/test/CodeGen/AMDGPU/arbitrary-fp-from-float-fp8-f16-hw.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-promote-i8.ll
M llvm/test/CodeGen/AMDGPU/atomic-optimizer-volatile.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimization_split_dt_update.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_global_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_mul_one.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_raw_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomic_optimizations_struct_buffer.ll
M llvm/test/CodeGen/AMDGPU/atomics-hw-remarks-gfx90a.ll
M llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
A llvm/test/CodeGen/AMDGPU/coexec-sched-barrier-latency.mir
A llvm/test/CodeGen/AMDGPU/finalize-isel-vadd-co-u32-dead-carry.mir
M llvm/test/CodeGen/AMDGPU/global-atomic-fadd.f32-no-rtn.ll
M llvm/test/CodeGen/AMDGPU/global-atomic-scan.ll
M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global-atomics-fp-wrong-subtarget.ll
M llvm/test/CodeGen/AMDGPU/global_atomic_optimizer_fp_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_iterative_scan_fp.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_optimizer_fp_no_rtn.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fadd.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmax.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fmin.ll
M llvm/test/CodeGen/AMDGPU/global_atomics_scan_fsub.ll
M llvm/test/CodeGen/AMDGPU/inline-asm-out-of-bounds-register.ll
M llvm/test/CodeGen/AMDGPU/insert_waitcnt_for_precise_memory.ll
M llvm/test/CodeGen/AMDGPU/ldsdmacnt_sched.mir
M llvm/test/CodeGen/AMDGPU/local-atomicrmw-fadd.ll
M llvm/test/CodeGen/AMDGPU/lower-buffer-fat-pointers-pointer-ops.ll
A llvm/test/CodeGen/AMDGPU/move-scalar-carry-to-valu-dead-vcc.mir
M llvm/test/CodeGen/AMDGPU/move-to-valu-addsubu64.ll
M llvm/test/CodeGen/AMDGPU/opt-sgpr-to-vgpr-copy.mir
M llvm/test/CodeGen/AMDGPU/promote-alloca-invariant-markers.ll
M llvm/test/CodeGen/AMDGPU/sdiv64.ll
M llvm/test/CodeGen/AMDGPU/si-instr-info-correct-implicit-operands.ll
M llvm/test/CodeGen/Generic/intrinsics.ll
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/Inputs/reference-prio-log-noml.txt
M llvm/test/CodeGen/MLRegAlloc/dev-mode-logging.ll
M llvm/test/CodeGen/MLRegAlloc/interactive-mode.ll
A llvm/test/CodeGen/Mips/fpu-delay-in-delay-slot.ll
M llvm/test/CodeGen/Mips/llvm-ir/fptosi.ll
M llvm/test/CodeGen/Mips/llvm-ir/load.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-dbl.ll
M llvm/test/CodeGen/Mips/llvm-ir/select-flt.ll
A llvm/test/CodeGen/Mips/mips1-fpu-load-delay.ll
M llvm/test/CodeGen/NVPTX/convert-fp16-pzo.ll
R llvm/test/CodeGen/NVPTX/convert-fp16-rs-pzo.ll
M llvm/test/CodeGen/NVPTX/convert-sm103a.ll
M llvm/test/CodeGen/RISCV/bfloat-imm.ll
M llvm/test/CodeGen/RISCV/double-imm.ll
M llvm/test/CodeGen/RISCV/float-imm.ll
M llvm/test/CodeGen/RISCV/half-imm.ll
M llvm/test/CodeGen/RISCV/rvp-simd-32.ll
M llvm/test/CodeGen/RISCV/rvp-simd-64.ll
A llvm/test/CodeGen/SPARC/known-bits.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare-dbg-value-variadic.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-declare.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-inlined-at.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-line-selection-merge.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-local-variable-dbg-value.ll
M llvm/test/CodeGen/SPIRV/debug-info/debug-type-pointer.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant-existing-type.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-constant.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-cross-block.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-merge-region.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-module-scope.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-postlegalizer-order.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-typedef-cycle.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value-unsupported.ll
A llvm/test/CodeGen/SPIRV/debug-info/debug-value.ll
A llvm/test/CodeGen/WebAssembly/multivalue-module-abi.ll
M llvm/test/CodeGen/X86/2007-08-09-IllegalX86-64Asm.ll
M llvm/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
M llvm/test/CodeGen/X86/2008-04-16-ReMatBug.ll
M llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll
M llvm/test/CodeGen/X86/apx/memfold-origVNI-crash.ll
M llvm/test/CodeGen/X86/apx/pr191368.ll
M llvm/test/CodeGen/X86/atom-fixup-lea2.ll
A llvm/test/CodeGen/X86/avx512fp16-combine-fmsubadd.ll
M llvm/test/CodeGen/X86/block-placement.ll
M llvm/test/CodeGen/X86/callbr-asm-branch-folding.ll
M llvm/test/CodeGen/X86/fptosi-sat-scalar-f16.ll
M llvm/test/CodeGen/X86/fptosi-sat-scalar.ll
M llvm/test/CodeGen/X86/fptoui-sat-scalar.ll
M llvm/test/CodeGen/X86/indirect-branch-tracking-eh.ll
M llvm/test/CodeGen/X86/known-bits.ll
M llvm/test/CodeGen/X86/no-split-size.ll
M llvm/test/CodeGen/X86/pr38539.ll
M llvm/test/CodeGen/X86/ragreedy-bug.ll
M llvm/test/CodeGen/X86/ragreedy-hoist-spill.ll
M llvm/test/CodeGen/X86/sjlj-eh.ll
M llvm/test/CodeGen/X86/speculative-load-hardening.ll
M llvm/test/CodeGen/X86/split-reg-with-hint.ll
M llvm/test/CodeGen/X86/statepoint-vreg-details.ll
M llvm/test/CodeGen/X86/statepoint-vreg-invoke.ll
M llvm/test/CodeGen/X86/tail-dup-merge-loop-headers.ll
M llvm/test/CodeGen/X86/tail-opts.ll
M llvm/test/CodeGen/X86/x86-shrink-wrapping.ll
M llvm/test/CodeGen/X86/zero-call-used-regs-simd.ll
A llvm/test/ExecutionEngine/JITLink/AArch64/ELF_ehframe_be.s
A llvm/test/ExecutionEngine/JITLink/AArch64/ELF_relocations_be.s
A llvm/test/FileCheck/escape.txt
R llvm/test/Instrumentation/MemorySanitizer/msan_llvm_strip_invariant.ll
A llvm/test/MC/Disassembler/RISCV/xthead-invalid-overlap.txt
M llvm/test/MC/RISCV/rv64xtheadmemidx-invalid.s
M llvm/test/Other/invariant.group.ll
A llvm/test/TableGen/RegisterInfoEmitter-noncovered-subreg-lanemask.td
M llvm/test/TableGen/intrinsic-default-args.td
M llvm/test/Transforms/Attributor/nocapture-1.ll
M llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
M llvm/test/Transforms/CodeGenPrepare/X86/invariant.group.ll
M llvm/test/Transforms/DeadStoreElimination/launder.invariant.group.ll
M llvm/test/Transforms/FunctionAttrs/nocapture.ll
M llvm/test/Transforms/GVN/assume-equal.ll
M llvm/test/Transforms/GVN/invariant.group.ll
M llvm/test/Transforms/GVN/rle-clobbering-store.ll
M llvm/test/Transforms/GlobalOpt/invariant.group.ll
M llvm/test/Transforms/GlobalOpt/storepointer.ll
R llvm/test/Transforms/Inline/inline_inv_group.ll
M llvm/test/Transforms/Inline/invariant-group-sroa.ll
M llvm/test/Transforms/Inline/launder.invariant.group.ll
M llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.dot.ll
A llvm/test/Transforms/InstCombine/AMDGPU/llvm.amdgcn.sudot.ll
M llvm/test/Transforms/InstCombine/invariant.group.ll
M llvm/test/Transforms/InstCombine/load.ll
M llvm/test/Transforms/InstCombine/new-delete-itanium.ll
M llvm/test/Transforms/InstSimplify/invariant.group-load.ll
R llvm/test/Transforms/LICM/hoist-phi-metadata.ll
R llvm/test/Transforms/LICM/hoist-phi.ll
R llvm/test/Transforms/LICM/pr40317.ll
M llvm/test/Transforms/LoopVectorize/VPlan/vplan-print-before-after-all.ll
M llvm/test/Transforms/LoopVectorize/cast-induction.ll
A llvm/test/Transforms/LoopVectorize/early-exit-live-out-extract-lane.ll
M llvm/test/Transforms/LoopVectorize/early_exit_legality.ll
M llvm/test/Transforms/LoopVectorize/early_exit_store_legality.ll
M llvm/test/Transforms/LoopVectorize/fold-epilogue-tail.ll
M llvm/test/Transforms/LoopVectorize/narrow-to-single-scalar.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/aarch64-jumptable.ll
M llvm/test/Transforms/LowerTypeTests/cfi-direct-call1.ll
M llvm/test/Transforms/LowerTypeTests/function.ll
M llvm/test/Transforms/LowerTypeTests/icall-branch-funnel.ll
M llvm/test/Transforms/LowerTypeTests/nocfivalue.ll
M llvm/test/Transforms/LowerTypeTests/simple.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable-dbg.ll
M llvm/test/Transforms/LowerTypeTests/x86-jumptable.ll
M llvm/test/Transforms/MergeFunc/cfi-thunk-merging.ll
M llvm/test/Transforms/NewGVN/invariant.group.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/extract-fmul-cost.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fadd-with-gathered-fmul-operands.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/fmul-constant-lane-fmuladd-combine.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/loop-accumulator-reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/multiple_reduction.ll
M llvm/test/Transforms/SLPVectorizer/AArch64/splat-gather-subtree-reuse.ll
A llvm/test/Transforms/SLPVectorizer/AArch64/store-chain-leading-slice-wider-vf.ll
M llvm/test/Transforms/SLPVectorizer/X86/fmul-fused-into-scalar-fadd.ll
A llvm/test/Transforms/SLPVectorizer/X86/narrowed-reduction-leaves-known-bits.ll
M llvm/test/Transforms/SROA/invariant-group.ll
M llvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest-free-cost.ll
M llvm/test/Transforms/WholeProgramDevirt/export-vcp.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-begin.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-check.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-end.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-32.ll
M llvm/test/Transforms/WholeProgramDevirt/virtual-const-prop-small-alignment-64.ll
M llvm/test/tools/llvm-offload-wrapper/coff-opt-ref.ll
M llvm/unittests/ABI/AArch64TargetInfoTest.cpp
M llvm/unittests/ABI/TargetInfoTest.cpp
M llvm/unittests/ABI/X86TargetInfoTest.cpp
M llvm/unittests/CodeGen/AMDGPUMetadataTest.cpp
M llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp
M llvm/unittests/CodeGen/CodeGenTestBase.h
M llvm/unittests/CodeGen/DroppedVariableStatsMIRTest.cpp
M llvm/unittests/CodeGen/GlobalISel/GISelMITest.h
M llvm/unittests/CodeGen/GlobalISel/IRTranslatorBF16Test.cpp
M llvm/unittests/CodeGen/MIR2VecTest.cpp
M llvm/unittests/CodeGen/MachineModuleInfoTest.cpp
M llvm/unittests/CodeGen/PassManagerTest.cpp
M llvm/unittests/CodeGen/SelectionDAGTestBase.h
M llvm/unittests/CodeGen/X86MCInstLowerTest.cpp
M llvm/unittests/ExecutionEngine/Orc/RTDyldObjectLinkingLayerTest.cpp
M llvm/unittests/MI/LiveIntervalTest.cpp
M llvm/unittests/MIR/MachineMetadata.cpp
M llvm/unittests/MIR/MachineStableHashTest.cpp
M llvm/unittests/Support/RegexTest.cpp
M llvm/unittests/Target/AArch64/AArch64RegisterInfoTest.cpp
M llvm/unittests/Target/AArch64/AArch64SelectionDAGTest.cpp
M llvm/unittests/Target/AArch64/InstSizes.cpp
M llvm/unittests/Target/AMDGPU/AMDGPUMCExprTest.cpp
M llvm/unittests/Target/AMDGPU/CSETest.cpp
M llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp
M llvm/unittests/Target/AMDGPU/PALMetadata.cpp
M llvm/unittests/Target/ARM/ARMSelectionDAGTest.cpp
M llvm/unittests/Target/ARM/InstSizes.cpp
M llvm/unittests/Target/LoongArch/InstSizes.cpp
M llvm/unittests/Target/RISCV/RISCVInstrInfoTest.cpp
M llvm/unittests/Target/RISCV/RISCVSelectionDAGTest.cpp
M llvm/unittests/Target/SPIRV/SPIRVGlobalRegistryTests.cpp
M llvm/unittests/Target/WebAssembly/WebAssemblyExceptionInfoTest.cpp
M llvm/unittests/Target/X86/MachineSizeOptsTest.cpp
M llvm/unittests/Target/X86/X86SelectionDAGTest.cpp
M llvm/unittests/Transforms/Vectorize/VPlanTestBase.h
M llvm/unittests/tools/llvm-exegesis/X86/SnippetRepetitorTest.cpp
M llvm/utils/TableGen/Basic/CodeGenIntrinsics.cpp
M llvm/utils/TableGen/Common/CodeGenRegisters.cpp
M llvm/utils/TableGen/OptionParserEmitter.cpp
M llvm/utils/git/code-format-helper.py
M llvm/utils/git/ids-check-helper.py
M llvm/utils/gn/secondary/compiler-rt/lib/ubsan/BUILD.gn
M mlir/include/mlir/Conversion/OpenACCToLLVM/ACCToLLVM.h
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeFunctions.def
M mlir/include/mlir/Dialect/OpenACC/OpenACCRuntimeUtils.h
M mlir/include/mlir/Dialect/Tosa/IR/TosaComplianceData.h.inc
M mlir/include/mlir/IR/BuiltinTypeInterfaces.td
M mlir/lib/Conversion/MemRefToSPIRV/MemRefToSPIRV.cpp
M mlir/lib/Conversion/OpenACCToLLVM/ACCDataDirectivePatterns.cpp
M mlir/lib/Dialect/LLVMIR/IR/LLVMMemorySlot.cpp
M mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
M mlir/lib/Dialect/MemRef/IR/MemRefOps.cpp
M mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
M mlir/lib/Dialect/OpenACC/Utils/OpenACCRuntimeUtils.cpp
M mlir/lib/Dialect/SPIRV/IR/MemoryOps.cpp
M mlir/lib/Dialect/Tosa/IR/TosaCanonicalizations.cpp
M mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp
M mlir/lib/Dialect/XeGPU/Transforms/XeGPULayoutImpl.cpp
M mlir/lib/Target/LLVMIR/ModuleImport.cpp
M mlir/lib/Target/LLVMIR/ModuleTranslation.cpp
M mlir/test/Conversion/MemRefToSPIRV/atomic.mlir
A mlir/test/Conversion/OpenACCToLLVM/declare.mlir
M mlir/test/Dialect/LLVMIR/mem2reg.mlir
M mlir/test/Dialect/LLVMIR/roundtrip.mlir
M mlir/test/Dialect/MemRef/invalid.mlir
M mlir/test/Dialect/SPIRV/IR/memory-ops.mlir
M mlir/test/Dialect/Tosa/canonicalize.mlir
M mlir/test/Dialect/Tosa/invalid_extension.mlir
M mlir/test/Dialect/Tosa/ops.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p0-invalid.mlir
M mlir/test/Dialect/Tosa/tosa-validation-version-1p1-valid.mlir
M mlir/test/Dialect/Tosa/verifier.mlir
M mlir/test/Dialect/XeGPU/propagate-layout-subgroup.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
A mlir/test/Target/LLVMIR/Import/sample-profile-suffix-elision-policy.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
M mlir/test/Target/LLVMIR/nvvm/convert_fp16x2.mlir
A mlir/test/Target/LLVMIR/sample-profile-suffix-elision-policy.mlir
M mlir/unittests/Dialect/OpenACC/OpenACCOpsInterfacesTest.cpp
A orc-rt/include/orc-rt-internal/support/sys/WinErrorToORCError.h
M orc-rt/include/orc-rt/bedrock/Session.h
M orc-rt/include/orc-rt/support/bit.h
M orc-rt/lib/bedrock/CMakeLists.txt
M orc-rt/lib/bedrock/sys/posix/sps/SimpleRemoteCAOverSocket.cpp
M orc-rt/lib/bedrock/sys/windows/DynamicLibrary.cpp
M orc-rt/lib/bedrock/sys/windows/Memory.cpp
A orc-rt/lib/bedrock/sys/windows/PageSize.cpp
A orc-rt/test/regression/check-rt-process-info.test
R orc-rt/test/regression/linux/check-rt-process-info.test
M orc-rt/test/regression/lit.cfg.py
M orc-rt/test/unit/AllocActionTestUtils.h
M orc-rt/test/unit/BedrockTestUtils.h
M orc-rt/test/unit/CMakeLists.txt
M orc-rt/test/unit/CommonTestUtils.h
M orc-rt/test/unit/DirectCaller.h
A orc-rt/test/unit/ErrorMatchers.h
A orc-rt/test/unit/ErrorMatchersTest.cpp
M orc-rt/test/unit/Inputs/NativeDylibManagerTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestError.h
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.cpp
M orc-rt/test/unit/Inputs/RTTICrossDylibTestLib.h
A orc-rt/test/unit/Inputs/TestVisibility.h
M orc-rt/test/unit/SimplePackedSerializationTestUtils.h
M orc-rt/test/unit/bedrock/BootstrapInfoTest.cpp
M orc-rt/test/unit/bedrock/ConnectionSpecTest.cpp
M orc-rt/test/unit/bedrock/ExecutorProcessInfoTest.cpp
M orc-rt/test/unit/bedrock/InProcessControllerAccessTest.cpp
M orc-rt/test/unit/bedrock/NativeDylibManagerTest.cpp
M orc-rt/test/unit/bedrock/SessionTest.cpp
M orc-rt/test/unit/bedrock/SimpleNativeMemoryMapTest.cpp
M orc-rt/test/unit/bedrock/SocketHandleTest.cpp
M orc-rt/test/unit/bedrock/SocketTestUtils.h
M orc-rt/test/unit/bedrock/sps/CallSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/MemoryAccessSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/NativeDylibManagerSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleNativeMemoryMapSPSCITest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCAOverSocketTest.cpp
M orc-rt/test/unit/bedrock/sps/SimpleRemoteCATest.cpp
M orc-rt/test/unit/bedrock/sys/posix/SocketTestUtils.cpp
M orc-rt/test/unit/support/AllocActionTest.cpp
M orc-rt/test/unit/support/RTTICrossDylibTest.cpp
M orc-rt/test/unit/support/bind-test.cpp
M orc-rt/test/unit/support/sps/SPSAllocActionTest.cpp
M orc-rt/test/unit/support/sps/SPSMemoryFlagsTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionBufferTest.cpp
M orc-rt/test/unit/support/sps/SPSWrapperFunctionTest.cpp
M orc-rt/test/unit/support/sps/SimplePackedSerializationTest.cpp
M utils/bazel/llvm-project-overlay/libc/BUILD.bazel
Log Message:
-----------
Merge branch 'main' into users/chinmaydd/amdgpu-generic-classification-test-timeout
Compare: https://github.com/llvm/llvm-project/compare/f364fce86b4c...a5f766fb5712
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