[all-commits] [llvm/llvm-project] ba22a9: [AMDGPU] Track va_ssrc / va_sdst hazards

[Jeffrey Byrnes via All-commits]

  Branch: refs/heads/users/jebyrnes/vassrcsdst
  Home:   https://github.com/llvm/llvm-project
  Commit: ba22a9d416c188fdaf28408728da9b0fb3744ab1
      https://github.com/llvm/llvm-project/commit/ba22a9d416c188fdaf28408728da9b0fb3744ab1
  Author: Jeffrey Byrnes <Jeffrey.Byrnes at amd.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
    M llvm/lib/Target/AMDGPU/GCNHazardRecognizer.h
    M llvm/test/CodeGen/AMDGPU/GlobalISel/fp64-atomics-gfx90a.ll
    M llvm/test/CodeGen/AMDGPU/add-max.ll
    M llvm/test/CodeGen/AMDGPU/addrspacecast-gas.ll
    M llvm/test/CodeGen/AMDGPU/asyncmark-gfx12plus.ll
    M llvm/test/CodeGen/AMDGPU/bf16.ll
    M llvm/test/CodeGen/AMDGPU/calling-conventions.ll
    M llvm/test/CodeGen/AMDGPU/carryout-selection.ll
    M llvm/test/CodeGen/AMDGPU/coexec-scheduler.ll
    M llvm/test/CodeGen/AMDGPU/ds_read2-gfx1250.ll
    M llvm/test/CodeGen/AMDGPU/ds_write2.ll
    M llvm/test/CodeGen/AMDGPU/fence-barrier-latency.ll
    M llvm/test/CodeGen/AMDGPU/flat-saddr-atomics.ll
    M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-f16-hw.ll
    M llvm/test/CodeGen/AMDGPU/float-to-arbitrary-fp-fp8-hw.ll
    M llvm/test/CodeGen/AMDGPU/fptrunc.f16.ll
    M llvm/test/CodeGen/AMDGPU/global-atomicrmw-fadd.ll
    M llvm/test/CodeGen/AMDGPU/insert_vector_elt.v2bf16.ll
    M llvm/test/CodeGen/AMDGPU/intrinsic-amdgcn-s-alloc-vgpr.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.atomic.barrier.arrive.rtn.b64.ll
    M llvm/test/CodeGen/AMDGPU/llvm.amdgcn.update.dpp.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i1.ll
    M llvm/test/CodeGen/AMDGPU/load-constant-i32.ll
    M llvm/test/CodeGen/AMDGPU/loop-prefetch-data.ll
    M llvm/test/CodeGen/AMDGPU/memory-legalizer-non-volatile.ll
    M llvm/test/CodeGen/AMDGPU/min.ll
    M llvm/test/CodeGen/AMDGPU/minmax.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp32.ll
    M llvm/test/CodeGen/AMDGPU/packed-fp64.ll
    M llvm/test/CodeGen/AMDGPU/packed-u64.ll
    M llvm/test/CodeGen/AMDGPU/reassoc-mul-add-1-to-mad.ll
    M llvm/test/CodeGen/AMDGPU/sad.ll
    A llvm/test/CodeGen/AMDGPU/va-ssrc-sdst-hazard-sched.mir
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-flushed.ll
    M llvm/test/CodeGen/AMDGPU/waitcnt-loop-ds-prefetch-pattern.ll
    M llvm/test/CodeGen/AMDGPU/whole-wave-functions.ll

  Log Message:
  -----------
  [AMDGPU] Track va_ssrc / va_sdst hazards

Change-Id: Icf64f8ab2bd227a1116873deaff62849a3d7d5e2



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