[all-commits] [llvm/llvm-project] 8890be: [AArch64][GISel][FastISel] Fix Windows "sret inreg...

Eli Friedman via All-commits all-commits at lists.llvm.org
Tue Sep 22 15:46:17 PDT 2026


  Branch: refs/heads/main
  Home:   https://github.com/llvm/llvm-project
  Commit: 8890be35705834c5af8e21424d7900639be03180
      https://github.com/llvm/llvm-project/commit/8890be35705834c5af8e21424d7900639be03180
  Author: Eli Friedman <efriedma at qti.qualcomm.com>
  Date:   2026-09-22 (Tue, 22 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AArch64/AArch64FastISel.cpp
    M llvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
    M llvm/test/CodeGen/AArch64/arm64-windows-calls.ll
    M llvm/test/CodeGen/AArch64/arm64-windows-tailcall.ll

  Log Message:
  -----------
  [AArch64][GISel][FastISel] Fix Windows "sret inreg". (#225190)

5dc8aeb26d2896c65cbea0d3b87f090241444bb6 added a special case to
SelectionDAG ISel for "sret inreg" parameters: they are copied to x0 on
return. There was a review comment suggesting that GISel and FastISel
also needed fixes, but through some mixup the followup never happened.

Fixes #225060



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