[all-commits] [llvm/llvm-project] 965fde: [AMDGPU] Fall back for FP8-to-half conversions wit...

Chinmay Deshpande via All-commits all-commits at lists.llvm.org
Tue Sep 22 14:29:23 PDT 2026


  Branch: refs/heads/users/chinmaydd/builtin-convert-from-arbitrary-fp
  Home:   https://github.com/llvm/llvm-project
  Commit: 965fde2292dc58f5c157905cf171a5cc04c06627
      https://github.com/llvm/llvm-project/commit/965fde2292dc58f5c157905cf171a5cc04c06627
  Author: Chinmay Deshpande <chdeshpa at amd.com>
  Date:   2026-09-20 (Sun, 20 Sep 2026)

  Changed paths:
    M llvm/lib/Target/AMDGPU/SIISelLowering.cpp
    A llvm/test/CodeGen/AMDGPU/arbitrary-fp-to-half-fallback.ll

  Log Message:
  -----------
  [AMDGPU] Fall back for FP8-to-half conversions without native support

The custom v2i8 source action also handles half results on gfx950, which
has native OCP FP8-to-f32 conversions but lacks FP8-to-f16 instructions.
Converting FP8 vectors to half therefore reached lowerFromFP8 and asserted
that FP8F16ConversionInsts was available.

Use generic legalization for half results when the subtarget lacks the
required instructions. Preserve native f32 conversions and native f16
conversions on targets that support them.

Add gfx950 regression coverage for both OCP encodings, including vectors
that widen or split into pairs, and check that native f32 instructions
remain selected.


  Commit: bc5b55aa62d5175830dc91c1b871c77406ca8124
      https://github.com/llvm/llvm-project/commit/bc5b55aa62d5175830dc91c1b871c77406ca8124
  Author: Chinmay Deshpande <chdeshpa at amd.com>
  Date:   2026-09-20 (Sun, 20 Sep 2026)

  Changed paths:
    M clang/docs/LanguageExtensions.md
    M clang/docs/ReleaseNotes.md
    M clang/include/clang/Basic/Builtins.td
    M clang/include/clang/Basic/DiagnosticSemaKinds.td
    M clang/lib/CodeGen/CGBuiltin.cpp
    M clang/lib/Sema/SemaChecking.cpp
    A clang/test/CodeGen/AArch64/builtins-elementwise-convert-from-fp8.c
    A clang/test/CodeGen/builtins-elementwise-convert-from-fp8.c
    A clang/test/Sema/builtins-elementwise-convert-from-fp8-aarch64.c
    A clang/test/Sema/builtins-elementwise-convert-from-fp8-overflow.c
    A clang/test/Sema/builtins-elementwise-convert-from-fp8-riscv.c
    A clang/test/Sema/builtins-elementwise-convert-from-fp8-target.c
    A clang/test/Sema/builtins-elementwise-convert-from-fp8.c
    A clang/test/SemaCUDA/builtins-elementwise-convert-from-fp8.cu
    A clang/test/SemaCXX/builtins-elementwise-convert-from-fp8.cpp
    A clang/test/SemaOpenCL/builtins-elementwise-convert-from-fp8.cl

  Log Message:
  -----------
  [Clang] Add elementwise conversions from encoded FP8 values

Add nine builtins converting Float8E5M2, Float8E4M3FN, and Float8E5M3FNU
encodings to _Float16, __bf16, or float through
llvm.convert.from.arbitrary.fp.

Accept exactly 8-bit integer scalars and generic fixed-length vectors,
preserving vector kinds and element counts without integer promotions.
Also support scalar AArch64 __mfp8 containers. Apply destination type
availability checks, including deferred offload diagnostics, and reject
constant-expression use.

Document the interface and add semantic, template, language-mode,
target-specific, and IR-generation regression coverage.

RFC: https://discourse.llvm.org/t/rfc-clang-elementwise-builtins-for-converting-encoded-floating-point-values/91644


Compare: https://github.com/llvm/llvm-project/compare/f006d5659b04...bc5b55aa62d5

To unsubscribe from these emails, change your notification settings at https://github.com/llvm/llvm-project/settings/notifications


More information about the All-commits mailing list