[all-commits] [llvm/llvm-project] 8306f7: [mlir][arith] Add minimumnumf and maximumnumf oper...
lorenzo chelini via All-commits
all-commits at lists.llvm.org
Tue Sep 22 08:23:44 PDT 2026
Branch: refs/heads/main
Home: https://github.com/llvm/llvm-project
Commit: 8306f7777172718453729ee941734bab9217c9fa
https://github.com/llvm/llvm-project/commit/8306f7777172718453729ee941734bab9217c9fa
Author: lorenzo chelini <l.chelini at icloud.com>
Date: 2026-09-22 (Tue, 22 Sep 2026)
Changed paths:
M mlir/include/mlir/Dialect/Arith/IR/ArithOps.td
M mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td
M mlir/include/mlir/Dialect/Vector/IR/VectorAttributes.td
M mlir/lib/Conversion/ArithToLLVM/ArithToLLVM.cpp
M mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
M mlir/lib/Dialect/Arith/IR/ArithOps.cpp
M mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
M mlir/lib/Dialect/Vector/IR/VectorOps.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorContract.cpp
M mlir/lib/Dialect/Vector/Transforms/LowerVectorScan.cpp
M mlir/lib/Dialect/XeGPU/Utils/XeGPUUtils.cpp
M mlir/test/Conversion/ArithToLLVM/arith-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-reduction-to-llvm.mlir
M mlir/test/Conversion/VectorToLLVM/vector-to-llvm-interface.mlir
M mlir/test/Dialect/Arith/ops.mlir
M mlir/test/Dialect/Vector/ops.mlir
M mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir
A mlir/test/Integration/Dialect/Vector/CPU/reductions-masked-minmaxnum-f32.mlir
M mlir/test/Target/LLVMIR/Import/intrinsic.ll
M mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir
Log Message:
-----------
[mlir][arith] Add minimumnumf and maximumnumf operations (#221658)
Add `arith.minimumnumf` and `arith.maximumnumf`, following
`minimumNumber` and `maximumNumber` from IEEE 754-2019 and the
`llvm.minimumnum`/`llvm.maximumnum` intrinsics. They differ from the
existing `arith.minnumf`/`arith.maxnumf` only in their treatment of
signaling NaNs: the new ops deterministically return the non-NaN
operand, whereas minnumf/maxnumf may return either NaN or the other
operand.
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